xref: /linux/drivers/net/wireless/ath/ath11k/mac.h (revision 955abe0a1b41de5ba61fe4cd614ebc123084d499)
1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */
2 /*
3  * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4  * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5  */
6 
7 #ifndef ATH11K_MAC_H
8 #define ATH11K_MAC_H
9 
10 #include <net/mac80211.h>
11 #include <net/cfg80211.h>
12 #include "wmi.h"
13 
14 struct ath11k;
15 struct ath11k_base;
16 
17 struct ath11k_generic_iter {
18 	struct ath11k *ar;
19 	int ret;
20 };
21 
22 /* number of failed packets (20 packets with 16 sw reties each) */
23 #define ATH11K_KICKOUT_THRESHOLD		(20 * 16)
24 
25 /* Use insanely high numbers to make sure that the firmware implementation
26  * won't start, we have the same functionality already in hostapd. Unit
27  * is seconds.
28  */
29 #define ATH11K_KEEPALIVE_MIN_IDLE		3747
30 #define ATH11K_KEEPALIVE_MAX_IDLE		3895
31 #define ATH11K_KEEPALIVE_MAX_UNRESPONSIVE	3900
32 
33 #define WMI_HOST_RC_DS_FLAG			0x01
34 #define WMI_HOST_RC_CW40_FLAG			0x02
35 #define WMI_HOST_RC_SGI_FLAG			0x04
36 #define WMI_HOST_RC_HT_FLAG			0x08
37 #define WMI_HOST_RC_RTSCTS_FLAG			0x10
38 #define WMI_HOST_RC_TX_STBC_FLAG		0x20
39 #define WMI_HOST_RC_RX_STBC_FLAG		0xC0
40 #define WMI_HOST_RC_RX_STBC_FLAG_S		6
41 #define WMI_HOST_RC_WEP_TKIP_FLAG		0x100
42 #define WMI_HOST_RC_TS_FLAG			0x200
43 #define WMI_HOST_RC_UAPSD_FLAG			0x400
44 
45 #define WMI_HT_CAP_ENABLED			0x0001
46 #define WMI_HT_CAP_HT20_SGI			0x0002
47 #define WMI_HT_CAP_DYNAMIC_SMPS			0x0004
48 #define WMI_HT_CAP_TX_STBC			0x0008
49 #define WMI_HT_CAP_TX_STBC_MASK_SHIFT		3
50 #define WMI_HT_CAP_RX_STBC			0x0030
51 #define WMI_HT_CAP_RX_STBC_MASK_SHIFT		4
52 #define WMI_HT_CAP_LDPC				0x0040
53 #define WMI_HT_CAP_L_SIG_TXOP_PROT		0x0080
54 #define WMI_HT_CAP_MPDU_DENSITY			0x0700
55 #define WMI_HT_CAP_MPDU_DENSITY_MASK_SHIFT	8
56 #define WMI_HT_CAP_HT40_SGI			0x0800
57 #define WMI_HT_CAP_RX_LDPC			0x1000
58 #define WMI_HT_CAP_TX_LDPC			0x2000
59 #define WMI_HT_CAP_IBF_BFER			0x4000
60 
61 /* These macros should be used when we wish to advertise STBC support for
62  * only 1SS or 2SS or 3SS.
63  */
64 #define WMI_HT_CAP_RX_STBC_1SS			0x0010
65 #define WMI_HT_CAP_RX_STBC_2SS			0x0020
66 #define WMI_HT_CAP_RX_STBC_3SS			0x0030
67 
68 #define WMI_HT_CAP_DEFAULT_ALL (WMI_HT_CAP_ENABLED    | \
69 				WMI_HT_CAP_HT20_SGI   | \
70 				WMI_HT_CAP_HT40_SGI   | \
71 				WMI_HT_CAP_TX_STBC    | \
72 				WMI_HT_CAP_RX_STBC    | \
73 				WMI_HT_CAP_LDPC)
74 
75 #define WMI_VHT_CAP_MAX_MPDU_LEN_MASK		0x00000003
76 #define WMI_VHT_CAP_RX_LDPC			0x00000010
77 #define WMI_VHT_CAP_SGI_80MHZ			0x00000020
78 #define WMI_VHT_CAP_SGI_160MHZ			0x00000040
79 #define WMI_VHT_CAP_TX_STBC			0x00000080
80 #define WMI_VHT_CAP_RX_STBC_MASK		0x00000300
81 #define WMI_VHT_CAP_RX_STBC_MASK_SHIFT		8
82 #define WMI_VHT_CAP_SU_BFER			0x00000800
83 #define WMI_VHT_CAP_SU_BFEE			0x00001000
84 #define WMI_VHT_CAP_MAX_CS_ANT_MASK		0x0000E000
85 #define WMI_VHT_CAP_MAX_CS_ANT_MASK_SHIFT	13
86 #define WMI_VHT_CAP_MAX_SND_DIM_MASK		0x00070000
87 #define WMI_VHT_CAP_MAX_SND_DIM_MASK_SHIFT	16
88 #define WMI_VHT_CAP_MU_BFER			0x00080000
89 #define WMI_VHT_CAP_MU_BFEE			0x00100000
90 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP		0x03800000
91 #define WMI_VHT_CAP_MAX_AMPDU_LEN_EXP_SHIT	23
92 #define WMI_VHT_CAP_RX_FIXED_ANT		0x10000000
93 #define WMI_VHT_CAP_TX_FIXED_ANT		0x20000000
94 
95 #define WMI_VHT_CAP_MAX_MPDU_LEN_11454		0x00000002
96 
97 /* These macros should be used when we wish to advertise STBC support for
98  * only 1SS or 2SS or 3SS.
99  */
100 #define WMI_VHT_CAP_RX_STBC_1SS			0x00000100
101 #define WMI_VHT_CAP_RX_STBC_2SS			0x00000200
102 #define WMI_VHT_CAP_RX_STBC_3SS			0x00000300
103 
104 #define WMI_VHT_CAP_DEFAULT_ALL (WMI_VHT_CAP_MAX_MPDU_LEN_11454  | \
105 				 WMI_VHT_CAP_SGI_80MHZ      |       \
106 				 WMI_VHT_CAP_TX_STBC        |       \
107 				 WMI_VHT_CAP_RX_STBC_MASK   |       \
108 				 WMI_VHT_CAP_RX_LDPC        |       \
109 				 WMI_VHT_CAP_MAX_AMPDU_LEN_EXP   |  \
110 				 WMI_VHT_CAP_RX_FIXED_ANT   |       \
111 				 WMI_VHT_CAP_TX_FIXED_ANT)
112 
113 /* FIXME: should these be in ieee80211.h? */
114 #define IEEE80211_VHT_MCS_SUPPORT_0_11_MASK	GENMASK(23, 16)
115 #define IEEE80211_DISABLE_VHT_MCS_SUPPORT_0_11	BIT(24)
116 
117 #define WMI_MAX_SPATIAL_STREAM			3
118 
119 #define ATH11K_CHAN_WIDTH_NUM			8
120 #define ATH11K_BW_NSS_MAP_ENABLE		BIT(31)
121 #define ATH11K_PEER_RX_NSS_160MHZ		GENMASK(2, 0)
122 #define ATH11K_PEER_RX_NSS_80_80MHZ		GENMASK(5, 3)
123 
124 #define ATH11K_OBSS_PD_MAX_THRESHOLD			-82
125 #define ATH11K_OBSS_PD_NON_SRG_MAX_THRESHOLD		-62
126 #define ATH11K_OBSS_PD_THRESHOLD_IN_DBM			BIT(29)
127 #define ATH11K_OBSS_PD_SRG_EN				BIT(30)
128 #define ATH11K_OBSS_PD_NON_SRG_EN			BIT(31)
129 
130 extern const struct htt_rx_ring_tlv_filter ath11k_mac_mon_status_filter_default;
131 
132 #define ATH11K_SCAN_11D_INTERVAL		600000
133 #define ATH11K_11D_INVALID_VDEV_ID		0xFFFF
134 
135 void ath11k_mac_11d_scan_start(struct ath11k *ar, u32 vdev_id);
136 void ath11k_mac_11d_scan_stop(struct ath11k *ar);
137 void ath11k_mac_11d_scan_stop_all(struct ath11k_base *ab);
138 
139 void ath11k_mac_destroy(struct ath11k_base *ab);
140 void ath11k_mac_unregister(struct ath11k_base *ab);
141 int ath11k_mac_register(struct ath11k_base *ab);
142 int ath11k_mac_allocate(struct ath11k_base *ab);
143 int ath11k_mac_hw_ratecode_to_legacy_rate(u8 hw_rc, u8 preamble, u8 *rateidx,
144 					  u16 *rate);
145 u8 ath11k_mac_bitrate_to_idx(const struct ieee80211_supported_band *sband,
146 			     u32 bitrate);
147 u8 ath11k_mac_hw_rate_to_idx(const struct ieee80211_supported_band *sband,
148 			     u8 hw_rate, bool cck);
149 
150 void __ath11k_mac_scan_finish(struct ath11k *ar);
151 void ath11k_mac_scan_finish(struct ath11k *ar);
152 
153 struct ath11k_vif *ath11k_mac_get_arvif(struct ath11k *ar, u32 vdev_id);
154 struct ath11k_vif *ath11k_mac_get_arvif_by_vdev_id(struct ath11k_base *ab,
155 						   u32 vdev_id);
156 u8 ath11k_mac_get_target_pdev_id(struct ath11k *ar);
157 u8 ath11k_mac_get_target_pdev_id_from_vif(struct ath11k_vif *arvif);
158 struct ath11k_vif *ath11k_mac_get_vif_up(struct ath11k_base *ab);
159 
160 struct ath11k *ath11k_mac_get_ar_by_vdev_id(struct ath11k_base *ab, u32 vdev_id);
161 struct ath11k *ath11k_mac_get_ar_by_pdev_id(struct ath11k_base *ab, u32 pdev_id);
162 
163 void ath11k_mac_drain_tx(struct ath11k *ar);
164 void ath11k_mac_peer_cleanup_all(struct ath11k *ar);
165 int ath11k_mac_tx_mgmt_pending_free(int buf_id, void *skb, void *ctx);
166 u8 ath11k_mac_bw_to_mac80211_bw(u8 bw);
167 enum nl80211_he_gi ath11k_mac_he_gi_to_nl80211_he_gi(u8 sgi);
168 enum nl80211_he_ru_alloc ath11k_mac_phy_he_ru_to_nl80211_he_ru_alloc(u16 ru_phy);
169 enum nl80211_he_ru_alloc ath11k_mac_he_ru_tones_to_nl80211_he_ru_alloc(u16 ru_tones);
170 enum ath11k_supported_bw ath11k_mac_mac80211_bw_to_ath11k_bw(enum rate_info_bw bw);
171 enum hal_encrypt_type ath11k_dp_tx_get_encrypt_type(u32 cipher);
172 void ath11k_mac_handle_beacon(struct ath11k *ar, struct sk_buff *skb);
173 void ath11k_mac_handle_beacon_miss(struct ath11k *ar, u32 vdev_id);
174 void ath11k_mac_bcn_tx_event(struct ath11k_vif *arvif);
175 int ath11k_mac_wait_tx_complete(struct ath11k *ar);
176 int ath11k_mac_vif_set_keepalive(struct ath11k_vif *arvif,
177 				 enum wmi_sta_keepalive_method method,
178 				 u32 interval);
179 void ath11k_mac_fill_reg_tpc_info(struct ath11k *ar,
180 				  struct ieee80211_vif *vif,
181 				  struct ieee80211_chanctx_conf *ctx);
182 #endif
183