1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH11K_CORE_H 8 #define ATH11K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/rhashtable.h> 17 #include <linux/average.h> 18 #include <linux/firmware.h> 19 #include <linux/suspend.h> 20 21 #include "qmi.h" 22 #include "htc.h" 23 #include "wmi.h" 24 #include "hal.h" 25 #include "dp.h" 26 #include "ce.h" 27 #include "mac.h" 28 #include "hw.h" 29 #include "hal_rx.h" 30 #include "reg.h" 31 #include "thermal.h" 32 #include "dbring.h" 33 #include "spectral.h" 34 #include "wow.h" 35 #include "fw.h" 36 #include "coredump.h" 37 38 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 39 40 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 41 42 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 43 44 /* Pending management packets threshold for dropping probe responses */ 45 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 46 47 #define ATH11K_INVALID_HW_MAC_ID 0xFF 48 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 49 50 /* SMBIOS type containing Board Data File Name Extension */ 51 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8 52 53 /* SMBIOS type structure length (excluding strings-set) */ 54 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9 55 56 /* The magic used by QCA spec */ 57 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_" 58 59 extern unsigned int ath11k_frame_mode; 60 extern bool ath11k_ftm_mode; 61 62 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 63 64 #define ATH11K_MON_TIMER_INTERVAL 10 65 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ) 66 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3 67 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5 68 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 69 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 70 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 71 72 enum ath11k_supported_bw { 73 ATH11K_BW_20 = 0, 74 ATH11K_BW_40 = 1, 75 ATH11K_BW_80 = 2, 76 ATH11K_BW_160 = 3, 77 }; 78 79 enum ath11k_bdf_search { 80 ATH11K_BDF_SEARCH_DEFAULT, 81 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 82 }; 83 84 enum wme_ac { 85 WME_AC_BE, 86 WME_AC_BK, 87 WME_AC_VI, 88 WME_AC_VO, 89 WME_NUM_AC 90 }; 91 92 #define ATH11K_HT_MCS_MAX 7 93 #define ATH11K_VHT_MCS_MAX 9 94 #define ATH11K_HE_MCS_MAX 11 95 96 enum ath11k_crypt_mode { 97 /* Only use hardware crypto engine */ 98 ATH11K_CRYPT_MODE_HW, 99 /* Only use software crypto */ 100 ATH11K_CRYPT_MODE_SW, 101 }; 102 103 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 104 { 105 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 106 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 107 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 108 WME_AC_VO); 109 } 110 111 enum ath11k_skb_flags { 112 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 113 ATH11K_SKB_CIPHER_SET = BIT(1), 114 }; 115 116 struct ath11k_skb_cb { 117 dma_addr_t paddr; 118 u8 eid; 119 u8 flags; 120 u32 cipher; 121 struct ath11k *ar; 122 struct ieee80211_vif *vif; 123 } __packed; 124 125 struct ath11k_skb_rxcb { 126 dma_addr_t paddr; 127 bool is_first_msdu; 128 bool is_last_msdu; 129 bool is_continuation; 130 bool is_mcbc; 131 bool is_eapol; 132 struct hal_rx_desc *rx_desc; 133 u8 err_rel_src; 134 u8 err_code; 135 u8 mac_id; 136 u8 unmapped; 137 u8 is_frag; 138 u8 tid; 139 u16 peer_id; 140 u16 seq_no; 141 }; 142 143 enum ath11k_hw_rev { 144 ATH11K_HW_IPQ8074, 145 ATH11K_HW_QCA6390_HW20, 146 ATH11K_HW_IPQ6018_HW10, 147 ATH11K_HW_QCN9074_HW10, 148 ATH11K_HW_WCN6855_HW20, 149 ATH11K_HW_WCN6855_HW21, 150 ATH11K_HW_WCN6750_HW10, 151 ATH11K_HW_IPQ5018_HW10, 152 ATH11K_HW_QCA2066_HW21, 153 ATH11K_HW_QCA6698AQ_HW21, 154 }; 155 156 enum ath11k_firmware_mode { 157 /* the default mode, standard 802.11 functionality */ 158 ATH11K_FIRMWARE_MODE_NORMAL, 159 160 /* factory tests etc */ 161 ATH11K_FIRMWARE_MODE_FTM, 162 163 /* Cold boot calibration */ 164 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 165 }; 166 167 extern bool ath11k_cold_boot_cal; 168 169 #define ATH11K_IRQ_NUM_MAX 52 170 #define ATH11K_EXT_IRQ_NUM_MAX 16 171 172 struct ath11k_ext_irq_grp { 173 struct ath11k_base *ab; 174 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 175 u32 num_irq; 176 u32 grp_id; 177 u64 timestamp; 178 bool napi_enabled; 179 struct napi_struct napi; 180 struct net_device *napi_ndev; 181 }; 182 183 enum ath11k_smbios_cc_type { 184 /* disable country code setting from SMBIOS */ 185 ATH11K_SMBIOS_CC_DISABLE = 0, 186 187 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 188 ATH11K_SMBIOS_CC_ISO = 1, 189 190 /* worldwide regdomain */ 191 ATH11K_SMBIOS_CC_WW = 2, 192 }; 193 194 struct ath11k_smbios_bdf { 195 struct dmi_header hdr; 196 197 u8 features_disabled; 198 199 /* enum ath11k_smbios_cc_type */ 200 u8 country_code_flag; 201 202 /* To set specific country, you need to set country code 203 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United 204 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 205 * 0x53). To set country to INDONESIA, then country code value = 206 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 207 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory 208 * setting. 209 */ 210 u16 cc_code; 211 212 u8 bdf_enabled; 213 u8 bdf_ext[]; 214 } __packed; 215 216 #define HEHANDLE_CAP_PHYINFO_SIZE 3 217 #define HECAP_PHYINFO_SIZE 9 218 #define HECAP_MACINFO_SIZE 5 219 #define HECAP_TXRX_MCS_NSS_SIZE 2 220 #define HECAP_PPET16_PPET8_MAX_SIZE 25 221 222 #define HE_PPET16_PPET8_SIZE 8 223 224 /* 802.11ax PPE (PPDU packet Extension) threshold */ 225 struct he_ppe_threshold { 226 u32 numss_m1; 227 u32 ru_mask; 228 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 229 }; 230 231 struct ath11k_he { 232 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 233 u32 hecap_rxmcsnssmap; 234 u32 hecap_txmcsnssmap; 235 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 236 struct he_ppe_threshold hecap_ppet; 237 u32 heop_param; 238 }; 239 240 #define MAX_RADIOS 3 241 242 /* ipq5018 hw param macros */ 243 #define MAX_RADIOS_5018 1 244 #define CE_CNT_5018 6 245 #define TARGET_CE_CNT_5018 9 246 #define SVC_CE_MAP_LEN_5018 17 247 #define RXDMA_PER_PDEV_5018 1 248 249 enum { 250 WMI_HOST_TP_SCALE_MAX = 0, 251 WMI_HOST_TP_SCALE_50 = 1, 252 WMI_HOST_TP_SCALE_25 = 2, 253 WMI_HOST_TP_SCALE_12 = 3, 254 WMI_HOST_TP_SCALE_MIN = 4, 255 WMI_HOST_TP_SCALE_SIZE = 5, 256 }; 257 258 enum ath11k_scan_state { 259 ATH11K_SCAN_IDLE, 260 ATH11K_SCAN_STARTING, 261 ATH11K_SCAN_RUNNING, 262 ATH11K_SCAN_ABORTING, 263 }; 264 265 enum ath11k_11d_state { 266 ATH11K_11D_IDLE, 267 ATH11K_11D_PREPARING, 268 ATH11K_11D_RUNNING, 269 }; 270 271 enum ath11k_dev_flags { 272 ATH11K_CAC_RUNNING, 273 ATH11K_FLAG_CORE_REGISTERED, 274 ATH11K_FLAG_CRASH_FLUSH, 275 ATH11K_FLAG_RAW_MODE, 276 ATH11K_FLAG_HW_CRYPTO_DISABLED, 277 ATH11K_FLAG_BTCOEX, 278 ATH11K_FLAG_RECOVERY, 279 ATH11K_FLAG_UNREGISTERING, 280 ATH11K_FLAG_REGISTERED, 281 ATH11K_FLAG_QMI_FAIL, 282 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 283 ATH11K_FLAG_CE_IRQ_ENABLED, 284 ATH11K_FLAG_EXT_IRQ_ENABLED, 285 ATH11K_FLAG_FIXED_MEM_RGN, 286 ATH11K_FLAG_DEVICE_INIT_DONE, 287 ATH11K_FLAG_MULTI_MSI_VECTORS, 288 ATH11K_FLAG_FTM_SEGMENTED, 289 }; 290 291 enum ath11k_monitor_flags { 292 ATH11K_FLAG_MONITOR_CONF_ENABLED, 293 ATH11K_FLAG_MONITOR_STARTED, 294 ATH11K_FLAG_MONITOR_VDEV_CREATED, 295 }; 296 297 #define ATH11K_IPV6_UC_TYPE 0 298 #define ATH11K_IPV6_AC_TYPE 1 299 300 #define ATH11K_IPV6_MAX_COUNT 16 301 #define ATH11K_IPV4_MAX_COUNT 2 302 303 struct ath11k_arp_ns_offload { 304 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4]; 305 u32 ipv4_count; 306 u32 ipv6_count; 307 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 308 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 309 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT]; 310 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT]; 311 u8 mac_addr[ETH_ALEN]; 312 }; 313 314 struct ath11k_rekey_data { 315 u8 kck[NL80211_KCK_LEN]; 316 u8 kek[NL80211_KCK_LEN]; 317 u64 replay_ctr; 318 bool enable_offload; 319 }; 320 321 /** 322 * struct ath11k_chan_power_info - TPE containing power info per channel chunk 323 * @chan_cfreq: channel center freq (MHz) 324 * e.g. 325 * channel 37/20 MHz, it is 6135 326 * channel 37/40 MHz, it is 6125 327 * channel 37/80 MHz, it is 6145 328 * channel 37/160 MHz, it is 6185 329 * @tx_power: transmit power (dBm) 330 */ 331 struct ath11k_chan_power_info { 332 u16 chan_cfreq; 333 s8 tx_power; 334 }; 335 336 /* ath11k only deals with 160 MHz, so 8 subchannels */ 337 #define ATH11K_NUM_PWR_LEVELS 8 338 339 /** 340 * struct ath11k_reg_tpc_power_info - regulatory TPC power info 341 * @is_psd_power: is PSD power or not 342 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD 343 * @ap_power_type: type of power (SP/LPI/VLP) 344 * @num_pwr_levels: number of power levels 345 * @reg_max: Array of maximum TX power (dBm) per PSD value 346 * @tpe: TPE values processed from TPE IE 347 * @chan_power_info: power info to send to firmware 348 */ 349 struct ath11k_reg_tpc_power_info { 350 bool is_psd_power; 351 u8 eirp_power; 352 enum wmi_reg_6ghz_ap_type ap_power_type; 353 u8 num_pwr_levels; 354 u8 reg_max[ATH11K_NUM_PWR_LEVELS]; 355 s8 tpe[ATH11K_NUM_PWR_LEVELS]; 356 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS]; 357 }; 358 359 struct ath11k_vif { 360 u32 vdev_id; 361 enum wmi_vdev_type vdev_type; 362 enum wmi_vdev_subtype vdev_subtype; 363 u32 beacon_interval; 364 u32 dtim_period; 365 u16 ast_hash; 366 u16 ast_idx; 367 u16 tcl_metadata; 368 u8 hal_addr_search_flags; 369 u8 search_type; 370 371 struct ath11k *ar; 372 struct ieee80211_vif *vif; 373 374 struct wmi_wmm_params_all_arg wmm_params; 375 struct wmi_wmm_params_all_arg muedca_params; 376 struct list_head list; 377 union { 378 struct { 379 u32 uapsd; 380 } sta; 381 struct { 382 /* 127 stations; wmi limit */ 383 u8 tim_bitmap[16]; 384 u8 tim_len; 385 u32 ssid_len; 386 u8 ssid[IEEE80211_MAX_SSID_LEN]; 387 bool hidden_ssid; 388 /* P2P_IE with NoA attribute for P2P_GO case */ 389 u32 noa_len; 390 u8 *noa_data; 391 } ap; 392 } u; 393 394 bool is_started; 395 bool is_up; 396 bool ftm_responder; 397 bool spectral_enabled; 398 bool ps; 399 u32 aid; 400 u8 bssid[ETH_ALEN]; 401 struct cfg80211_bitrate_mask bitrate_mask; 402 struct delayed_work connection_loss_work; 403 struct work_struct bcn_tx_work; 404 int num_legacy_stations; 405 int rtscts_prot_mode; 406 int txpower; 407 bool rsnie_present; 408 bool wpaie_present; 409 bool bcca_zero_sent; 410 bool do_not_send_tmpl; 411 struct ath11k_arp_ns_offload arp_ns_offload; 412 struct ath11k_rekey_data rekey_data; 413 414 struct ath11k_reg_tpc_power_info reg_tpc_info; 415 416 /* Must be last - ends in a flexible-array member. 417 * 418 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 419 * especially because it has a flexible array. Find a better way. 420 */ 421 struct ieee80211_chanctx_conf chanctx; 422 }; 423 424 struct ath11k_vif_iter { 425 u32 vdev_id; 426 struct ath11k_vif *arvif; 427 }; 428 429 struct ath11k_rx_peer_stats { 430 u64 num_msdu; 431 u64 num_mpdu_fcs_ok; 432 u64 num_mpdu_fcs_err; 433 u64 tcp_msdu_count; 434 u64 udp_msdu_count; 435 u64 other_msdu_count; 436 u64 ampdu_msdu_count; 437 u64 non_ampdu_msdu_count; 438 u64 stbc_count; 439 u64 beamformed_count; 440 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 441 u64 nss_count[HAL_RX_MAX_NSS]; 442 u64 bw_count[HAL_RX_BW_MAX]; 443 u64 gi_count[HAL_RX_GI_MAX]; 444 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 445 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 446 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 447 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 448 u64 rx_duration; 449 u64 dcm_count; 450 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 451 }; 452 453 #define ATH11K_HE_MCS_NUM 12 454 #define ATH11K_VHT_MCS_NUM 10 455 #define ATH11K_BW_NUM 4 456 #define ATH11K_NSS_NUM 4 457 #define ATH11K_LEGACY_NUM 12 458 #define ATH11K_GI_NUM 4 459 #define ATH11K_HT_MCS_NUM 32 460 461 enum ath11k_pkt_rx_err { 462 ATH11K_PKT_RX_ERR_FCS, 463 ATH11K_PKT_RX_ERR_TKIP, 464 ATH11K_PKT_RX_ERR_CRYPT, 465 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 466 ATH11K_PKT_RX_ERR_MAX, 467 }; 468 469 enum ath11k_ampdu_subfrm_num { 470 ATH11K_AMPDU_SUBFRM_NUM_10, 471 ATH11K_AMPDU_SUBFRM_NUM_20, 472 ATH11K_AMPDU_SUBFRM_NUM_30, 473 ATH11K_AMPDU_SUBFRM_NUM_40, 474 ATH11K_AMPDU_SUBFRM_NUM_50, 475 ATH11K_AMPDU_SUBFRM_NUM_60, 476 ATH11K_AMPDU_SUBFRM_NUM_MORE, 477 ATH11K_AMPDU_SUBFRM_NUM_MAX, 478 }; 479 480 enum ath11k_amsdu_subfrm_num { 481 ATH11K_AMSDU_SUBFRM_NUM_1, 482 ATH11K_AMSDU_SUBFRM_NUM_2, 483 ATH11K_AMSDU_SUBFRM_NUM_3, 484 ATH11K_AMSDU_SUBFRM_NUM_4, 485 ATH11K_AMSDU_SUBFRM_NUM_MORE, 486 ATH11K_AMSDU_SUBFRM_NUM_MAX, 487 }; 488 489 enum ath11k_counter_type { 490 ATH11K_COUNTER_TYPE_BYTES, 491 ATH11K_COUNTER_TYPE_PKTS, 492 ATH11K_COUNTER_TYPE_MAX, 493 }; 494 495 enum ath11k_stats_type { 496 ATH11K_STATS_TYPE_SUCC, 497 ATH11K_STATS_TYPE_FAIL, 498 ATH11K_STATS_TYPE_RETRY, 499 ATH11K_STATS_TYPE_AMPDU, 500 ATH11K_STATS_TYPE_MAX, 501 }; 502 503 struct ath11k_htt_data_stats { 504 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 505 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 506 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 507 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 508 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 509 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 510 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 511 }; 512 513 struct ath11k_htt_tx_stats { 514 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 515 u64 tx_duration; 516 u64 ba_fails; 517 u64 ack_fails; 518 }; 519 520 struct ath11k_per_ppdu_tx_stats { 521 u16 succ_pkts; 522 u16 failed_pkts; 523 u16 retry_pkts; 524 u32 succ_bytes; 525 u32 failed_bytes; 526 u32 retry_bytes; 527 }; 528 529 DECLARE_EWMA(avg_rssi, 10, 8) 530 531 struct ath11k_sta { 532 struct ath11k_vif *arvif; 533 534 /* the following are protected by ar->data_lock */ 535 u32 changed; /* IEEE80211_RC_* */ 536 u32 bw; 537 u32 nss; 538 u32 smps; 539 enum hal_pn_type pn_type; 540 541 struct work_struct update_wk; 542 struct work_struct set_4addr_wk; 543 struct rate_info txrate; 544 u32 peer_nss; 545 struct rate_info last_txrate; 546 u64 rx_duration; 547 u64 tx_duration; 548 u8 rssi_comb; 549 struct ewma_avg_rssi avg_rssi; 550 s8 rssi_beacon; 551 s8 chain_signal[IEEE80211_MAX_CHAINS]; 552 struct ath11k_htt_tx_stats *tx_stats; 553 struct ath11k_rx_peer_stats *rx_stats; 554 555 #ifdef CONFIG_MAC80211_DEBUGFS 556 /* protected by conf_mutex */ 557 bool aggr_mode; 558 #endif 559 560 bool use_4addr_set; 561 u16 tcl_metadata; 562 563 /* Protected with ar->data_lock */ 564 enum ath11k_wmi_peer_ps_state peer_ps_state; 565 u64 ps_start_time; 566 u64 ps_start_jiffies; 567 u64 ps_total_duration; 568 bool peer_current_ps_valid; 569 570 u32 bw_prev; 571 }; 572 573 #define ATH11K_MIN_5G_FREQ 4150 574 #define ATH11K_MIN_6G_FREQ 5925 575 #define ATH11K_MAX_6G_FREQ 7115 576 #define ATH11K_NUM_CHANS 102 577 #define ATH11K_MAX_5G_CHAN 177 578 579 enum ath11k_state { 580 ATH11K_STATE_OFF, 581 ATH11K_STATE_ON, 582 ATH11K_STATE_RESTARTING, 583 ATH11K_STATE_RESTARTED, 584 ATH11K_STATE_WEDGED, 585 ATH11K_STATE_FTM, 586 /* Add other states as required */ 587 }; 588 589 /* Antenna noise floor */ 590 #define ATH11K_DEFAULT_NOISE_FLOOR -95 591 592 #define ATH11K_INVALID_RSSI_FULL -1 593 594 #define ATH11K_INVALID_RSSI_EMPTY -128 595 596 struct ath11k_fw_stats { 597 struct dentry *debugfs_fwstats; 598 u32 pdev_id; 599 u32 stats_id; 600 struct list_head pdevs; 601 struct list_head vdevs; 602 struct list_head bcn; 603 }; 604 605 struct ath11k_dbg_htt_stats { 606 u8 type; 607 u8 reset; 608 struct debug_htt_stats_req *stats_req; 609 /* protects shared stats req buffer */ 610 spinlock_t lock; 611 }; 612 613 #define MAX_MODULE_ID_BITMAP_WORDS 16 614 615 struct ath11k_debug { 616 struct dentry *debugfs_pdev; 617 struct ath11k_dbg_htt_stats htt_stats; 618 u32 extd_tx_stats; 619 u32 extd_rx_stats; 620 u32 pktlog_filter; 621 u32 pktlog_mode; 622 u32 pktlog_peer_valid; 623 u8 pktlog_peer_addr[ETH_ALEN]; 624 u32 rx_filter; 625 u32 mem_offset; 626 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 627 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 628 }; 629 630 struct ath11k_per_peer_tx_stats { 631 u32 succ_bytes; 632 u32 retry_bytes; 633 u32 failed_bytes; 634 u16 succ_pkts; 635 u16 retry_pkts; 636 u16 failed_pkts; 637 u32 duration; 638 u8 ba_fails; 639 bool is_ampdu; 640 }; 641 642 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 643 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 644 645 struct ath11k { 646 struct ath11k_base *ab; 647 struct ath11k_pdev *pdev; 648 struct ieee80211_hw *hw; 649 struct ath11k_pdev_wmi *wmi; 650 struct ath11k_pdev_dp dp; 651 u8 mac_addr[ETH_ALEN]; 652 struct ath11k_he ar_he; 653 enum ath11k_state state; 654 bool supports_6ghz; 655 struct { 656 struct completion started; 657 struct completion completed; 658 struct completion on_channel; 659 struct delayed_work timeout; 660 enum ath11k_scan_state state; 661 bool is_roc; 662 int vdev_id; 663 int roc_freq; 664 bool roc_notify; 665 } scan; 666 667 struct { 668 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 669 struct ieee80211_sband_iftype_data 670 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 671 } mac; 672 673 unsigned long dev_flags; 674 unsigned int filter_flags; 675 unsigned long monitor_flags; 676 u32 min_tx_power; 677 u32 max_tx_power; 678 u32 txpower_limit_2g; 679 u32 txpower_limit_5g; 680 u32 txpower_scale; 681 u32 power_scale; 682 u32 chan_tx_pwr; 683 u32 num_stations; 684 u32 max_num_stations; 685 /* To synchronize concurrent synchronous mac80211 callback operations, 686 * concurrent debugfs configuration and concurrent FW statistics events. 687 */ 688 struct mutex conf_mutex; 689 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 690 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 691 * channel context data, survey info, test mode data, channel_update_queue. 692 */ 693 spinlock_t data_lock; 694 695 struct list_head arvifs; 696 /* should never be NULL; needed for regular htt rx */ 697 struct ieee80211_channel *rx_channel; 698 699 /* valid during scan; needed for mgmt rx during scan */ 700 struct ieee80211_channel *scan_channel; 701 702 u8 cfg_tx_chainmask; 703 u8 cfg_rx_chainmask; 704 u8 num_rx_chains; 705 u8 num_tx_chains; 706 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 707 u8 pdev_idx; 708 u8 lmac_id; 709 710 struct completion peer_assoc_done; 711 struct completion peer_delete_done; 712 713 int install_key_status; 714 struct completion install_key_done; 715 716 int last_wmi_vdev_start_status; 717 struct completion vdev_setup_done; 718 struct completion vdev_delete_done; 719 720 int num_peers; 721 int max_num_peers; 722 u32 num_started_vdevs; 723 u32 num_created_vdevs; 724 unsigned long long allocated_vdev_map; 725 726 struct idr txmgmt_idr; 727 /* protects txmgmt_idr data */ 728 spinlock_t txmgmt_idr_lock; 729 atomic_t num_pending_mgmt_tx; 730 wait_queue_head_t txmgmt_empty_waitq; 731 732 /* cycle count is reported twice for each visited channel during scan. 733 * access protected by data_lock 734 */ 735 u32 survey_last_rx_clear_count; 736 u32 survey_last_cycle_count; 737 738 /* Channel info events are expected to come in pairs without and with 739 * COMPLETE flag set respectively for each channel visit during scan. 740 * 741 * However there are deviations from this rule. This flag is used to 742 * avoid reporting garbage data. 743 */ 744 bool ch_info_can_report_survey; 745 struct survey_info survey[ATH11K_NUM_CHANS]; 746 struct completion bss_survey_done; 747 748 struct work_struct regd_update_work; 749 struct work_struct channel_update_work; 750 /* protected with data_lock */ 751 struct list_head channel_update_queue; 752 753 struct work_struct wmi_mgmt_tx_work; 754 struct sk_buff_head wmi_mgmt_tx_queue; 755 756 struct ath11k_wow wow; 757 struct completion target_suspend; 758 bool target_suspend_ack; 759 struct ath11k_per_peer_tx_stats peer_tx_stats; 760 struct list_head ppdu_stats_info; 761 u32 ppdu_stat_list_depth; 762 763 struct ath11k_per_peer_tx_stats cached_stats; 764 u32 last_ppdu_id; 765 u32 cached_ppdu_id; 766 int monitor_vdev_id; 767 struct completion fw_mode_reset; 768 u8 ftm_msgref; 769 #ifdef CONFIG_ATH11K_DEBUGFS 770 struct ath11k_debug debug; 771 #endif 772 #ifdef CONFIG_ATH11K_SPECTRAL 773 struct ath11k_spectral spectral; 774 #endif 775 bool dfs_block_radar_events; 776 struct ath11k_thermal thermal; 777 u32 vdev_id_11d_scan; 778 struct completion completed_11d_scan; 779 enum ath11k_11d_state state_11d; 780 bool regdom_set_by_user; 781 int hw_rate_code; 782 u8 twt_enabled; 783 bool nlo_enabled; 784 u8 alpha2[REG_ALPHA2_LEN + 1]; 785 struct ath11k_fw_stats fw_stats; 786 struct completion fw_stats_complete; 787 bool fw_stats_done; 788 789 /* protected by conf_mutex */ 790 bool ps_state_enable; 791 bool ps_timekeeper_enable; 792 s8 max_allowed_tx_power; 793 }; 794 795 struct ath11k_band_cap { 796 u32 phy_id; 797 u32 max_bw_supported; 798 u32 ht_cap_info; 799 u32 he_cap_info[2]; 800 u32 he_mcs; 801 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 802 struct ath11k_ppe_threshold he_ppet; 803 u16 he_6ghz_capa; 804 }; 805 806 struct ath11k_pdev_cap { 807 u32 supported_bands; 808 u32 ampdu_density; 809 u32 vht_cap; 810 u32 vht_mcs; 811 u32 he_mcs; 812 u32 tx_chain_mask; 813 u32 rx_chain_mask; 814 u32 tx_chain_mask_shift; 815 u32 rx_chain_mask_shift; 816 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 817 bool nss_ratio_enabled; 818 u8 nss_ratio_info; 819 }; 820 821 struct ath11k_pdev { 822 struct ath11k *ar; 823 u32 pdev_id; 824 struct ath11k_pdev_cap cap; 825 u8 mac_addr[ETH_ALEN]; 826 }; 827 828 struct ath11k_board_data { 829 const struct firmware *fw; 830 const void *data; 831 size_t len; 832 }; 833 834 struct ath11k_pci_ops { 835 int (*wakeup)(struct ath11k_base *ab); 836 void (*release)(struct ath11k_base *ab); 837 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector); 838 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value); 839 u32 (*window_read32)(struct ath11k_base *ab, u32 offset); 840 }; 841 842 /* IPQ8074 HW channel counters frequency value in hertz */ 843 #define IPQ8074_CC_FREQ_HERTZ 320000 844 845 struct ath11k_bp_stats { 846 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 847 u16 hp; 848 849 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 850 u16 tp; 851 852 /* Number of Backpressure events received for the ring */ 853 u32 count; 854 855 /* Last recorded event timestamp */ 856 unsigned long jiffies; 857 }; 858 859 struct ath11k_dp_ring_bp_stats { 860 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 861 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 862 }; 863 864 struct ath11k_soc_dp_tx_err_stats { 865 /* TCL Ring Descriptor unavailable */ 866 u32 desc_na[DP_TCL_NUM_RING_MAX]; 867 /* Other failures during dp_tx due to mem allocation failure 868 * idr unavailable etc. 869 */ 870 atomic_t misc_fail; 871 }; 872 873 struct ath11k_soc_dp_stats { 874 u32 err_ring_pkts; 875 u32 invalid_rbm; 876 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 877 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 878 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 879 struct ath11k_soc_dp_tx_err_stats tx_err; 880 struct ath11k_dp_ring_bp_stats bp_stats; 881 }; 882 883 struct ath11k_msi_user { 884 char *name; 885 int num_vectors; 886 u32 base_vector; 887 }; 888 889 struct ath11k_msi_config { 890 int total_vectors; 891 int total_users; 892 struct ath11k_msi_user *users; 893 u16 hw_rev; 894 }; 895 896 enum ath11k_pm_policy { 897 ATH11K_PM_DEFAULT, 898 ATH11K_PM_WOW, 899 }; 900 901 /* Master structure to hold the hw data which may be used in core module */ 902 struct ath11k_base { 903 enum ath11k_hw_rev hw_rev; 904 enum ath11k_firmware_mode fw_mode; 905 struct platform_device *pdev; 906 struct device *dev; 907 struct ath11k_qmi qmi; 908 struct ath11k_wmi_base wmi_ab; 909 struct completion fw_ready; 910 int num_radios; 911 /* HW channel counters frequency value in hertz common to all MACs */ 912 u32 cc_freq_hz; 913 914 struct ath11k_dump_file_data *dump_data; 915 size_t ath11k_coredump_len; 916 struct work_struct dump_work; 917 918 struct ath11k_htc htc; 919 920 struct ath11k_dp dp; 921 922 void __iomem *mem; 923 void __iomem *mem_ce; 924 unsigned long mem_len; 925 926 struct { 927 enum ath11k_bus bus; 928 const struct ath11k_hif_ops *ops; 929 } hif; 930 931 struct { 932 struct completion wakeup_completed; 933 } wow; 934 935 struct ath11k_ce ce; 936 struct timer_list rx_replenish_retry; 937 struct ath11k_hal hal; 938 /* To synchronize core_start/core_stop */ 939 struct mutex core_lock; 940 /* Protects data like peers */ 941 spinlock_t base_lock; 942 struct ath11k_pdev pdevs[MAX_RADIOS]; 943 struct { 944 enum WMI_HOST_WLAN_BAND supported_bands; 945 u32 pdev_id; 946 } target_pdev_ids[MAX_RADIOS]; 947 u8 target_pdev_count; 948 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 949 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 950 unsigned long long free_vdev_map; 951 952 /* To synchronize rhash tbl write operation */ 953 struct mutex tbl_mtx_lock; 954 955 /* The rhashtable containing struct ath11k_peer keyed by mac addr */ 956 struct rhashtable *rhead_peer_addr; 957 struct rhashtable_params rhash_peer_addr_param; 958 959 /* The rhashtable containing struct ath11k_peer keyed by id */ 960 struct rhashtable *rhead_peer_id; 961 struct rhashtable_params rhash_peer_id_param; 962 963 struct list_head peers; 964 wait_queue_head_t peer_mapping_wq; 965 u8 mac_addr[ETH_ALEN]; 966 int irq_num[ATH11K_IRQ_NUM_MAX]; 967 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 968 struct ath11k_targ_cap target_caps; 969 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 970 bool pdevs_macaddr_valid; 971 972 struct ath11k_hw_params hw_params; 973 974 const struct firmware *cal_file; 975 976 /* Below regd's are protected by ab->data_lock */ 977 /* This is the regd set for every radio 978 * by the firmware during initialization 979 */ 980 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 981 /* This regd is set during dynamic country setting 982 * This may or may not be used during the runtime 983 */ 984 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 985 struct cur_regulatory_info *reg_info_store; 986 987 /* Current DFS Regulatory */ 988 enum ath11k_dfs_region dfs_region; 989 #ifdef CONFIG_ATH11K_DEBUGFS 990 struct dentry *debugfs_soc; 991 #endif 992 struct ath11k_soc_dp_stats soc_stats; 993 994 unsigned long dev_flags; 995 struct completion driver_recovery; 996 struct workqueue_struct *workqueue; 997 struct work_struct restart_work; 998 struct work_struct update_11d_work; 999 u8 new_alpha2[3]; 1000 struct workqueue_struct *workqueue_aux; 1001 struct work_struct reset_work; 1002 atomic_t reset_count; 1003 atomic_t recovery_count; 1004 atomic_t recovery_start_count; 1005 bool is_reset; 1006 struct completion reset_complete; 1007 struct completion reconfigure_complete; 1008 struct completion recovery_start; 1009 /* continuous recovery fail count */ 1010 atomic_t fail_cont_count; 1011 unsigned long reset_fail_timeout; 1012 struct { 1013 /* protected by data_lock */ 1014 u32 fw_crash_counter; 1015 } stats; 1016 u32 pktlog_defs_checksum; 1017 1018 struct ath11k_dbring_cap *db_caps; 1019 u32 num_db_cap; 1020 1021 /* To synchronize 11d scan vdev id */ 1022 struct mutex vdev_id_11d_lock; 1023 struct timer_list mon_reap_timer; 1024 1025 struct completion htc_suspend; 1026 1027 struct { 1028 enum ath11k_bdf_search bdf_search; 1029 u32 vendor; 1030 u32 device; 1031 u32 subsystem_vendor; 1032 u32 subsystem_device; 1033 } id; 1034 1035 struct { 1036 struct { 1037 const struct ath11k_msi_config *config; 1038 u32 ep_base_data; 1039 u32 irqs[32]; 1040 u32 addr_lo; 1041 u32 addr_hi; 1042 } msi; 1043 1044 const struct ath11k_pci_ops *ops; 1045 } pci; 1046 1047 struct { 1048 u32 api_version; 1049 1050 const struct firmware *fw; 1051 const u8 *amss_data; 1052 size_t amss_len; 1053 const u8 *m3_data; 1054 size_t m3_len; 1055 1056 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT); 1057 } fw; 1058 1059 struct completion restart_completed; 1060 1061 #ifdef CONFIG_NL80211_TESTMODE 1062 struct { 1063 u32 data_pos; 1064 u32 expected_seq; 1065 u8 *eventdata; 1066 } testmode; 1067 #endif 1068 1069 enum ath11k_pm_policy pm_policy; 1070 enum ath11k_pm_policy actual_pm_policy; 1071 struct notifier_block pm_nb; 1072 1073 /* must be last */ 1074 u8 drv_priv[] __aligned(sizeof(void *)); 1075 }; 1076 1077 struct ath11k_fw_stats_pdev { 1078 struct list_head list; 1079 1080 /* PDEV stats */ 1081 s32 ch_noise_floor; 1082 /* Cycles spent transmitting frames */ 1083 u32 tx_frame_count; 1084 /* Cycles spent receiving frames */ 1085 u32 rx_frame_count; 1086 /* Total channel busy time, evidently */ 1087 u32 rx_clear_count; 1088 /* Total on-channel time */ 1089 u32 cycle_count; 1090 u32 phy_err_count; 1091 u32 chan_tx_power; 1092 u32 ack_rx_bad; 1093 u32 rts_bad; 1094 u32 rts_good; 1095 u32 fcs_bad; 1096 u32 no_beacons; 1097 u32 mib_int_count; 1098 1099 /* PDEV TX stats */ 1100 /* Num HTT cookies queued to dispatch list */ 1101 s32 comp_queued; 1102 /* Num HTT cookies dispatched */ 1103 s32 comp_delivered; 1104 /* Num MSDU queued to WAL */ 1105 s32 msdu_enqued; 1106 /* Num MPDU queue to WAL */ 1107 s32 mpdu_enqued; 1108 /* Num MSDUs dropped by WMM limit */ 1109 s32 wmm_drop; 1110 /* Num Local frames queued */ 1111 s32 local_enqued; 1112 /* Num Local frames done */ 1113 s32 local_freed; 1114 /* Num queued to HW */ 1115 s32 hw_queued; 1116 /* Num PPDU reaped from HW */ 1117 s32 hw_reaped; 1118 /* Num underruns */ 1119 s32 underrun; 1120 /* Num hw paused */ 1121 u32 hw_paused; 1122 /* Num PPDUs cleaned up in TX abort */ 1123 s32 tx_abort; 1124 /* Num MPDUs requeued by SW */ 1125 s32 mpdus_requeued; 1126 /* excessive retries */ 1127 u32 tx_ko; 1128 u32 tx_xretry; 1129 /* data hw rate code */ 1130 u32 data_rc; 1131 /* Scheduler self triggers */ 1132 u32 self_triggers; 1133 /* frames dropped due to excessive sw retries */ 1134 u32 sw_retry_failure; 1135 /* illegal rate phy errors */ 1136 u32 illgl_rate_phy_err; 1137 /* wal pdev continuous xretry */ 1138 u32 pdev_cont_xretry; 1139 /* wal pdev tx timeouts */ 1140 u32 pdev_tx_timeout; 1141 /* wal pdev resets */ 1142 u32 pdev_resets; 1143 /* frames dropped due to non-availability of stateless TIDs */ 1144 u32 stateless_tid_alloc_failure; 1145 /* PhY/BB underrun */ 1146 u32 phy_underrun; 1147 /* MPDU is more than txop limit */ 1148 u32 txop_ovf; 1149 /* Num sequences posted */ 1150 u32 seq_posted; 1151 /* Num sequences failed in queueing */ 1152 u32 seq_failed_queueing; 1153 /* Num sequences completed */ 1154 u32 seq_completed; 1155 /* Num sequences restarted */ 1156 u32 seq_restarted; 1157 /* Num of MU sequences posted */ 1158 u32 mu_seq_posted; 1159 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 1160 * (Reset,channel change) 1161 */ 1162 s32 mpdus_sw_flush; 1163 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 1164 s32 mpdus_hw_filter; 1165 /* Num MPDUs truncated by PDG (TXOP, TBTT, 1166 * PPDU_duration based on rate, dyn_bw) 1167 */ 1168 s32 mpdus_truncated; 1169 /* Num MPDUs that was tried but didn't receive ACK or BA */ 1170 s32 mpdus_ack_failed; 1171 /* Num MPDUs that was dropped du to expiry. */ 1172 s32 mpdus_expired; 1173 1174 /* PDEV RX stats */ 1175 /* Cnts any change in ring routing mid-ppdu */ 1176 s32 mid_ppdu_route_change; 1177 /* Total number of statuses processed */ 1178 s32 status_rcvd; 1179 /* Extra frags on rings 0-3 */ 1180 s32 r0_frags; 1181 s32 r1_frags; 1182 s32 r2_frags; 1183 s32 r3_frags; 1184 /* MSDUs / MPDUs delivered to HTT */ 1185 s32 htt_msdus; 1186 s32 htt_mpdus; 1187 /* MSDUs / MPDUs delivered to local stack */ 1188 s32 loc_msdus; 1189 s32 loc_mpdus; 1190 /* AMSDUs that have more MSDUs than the status ring size */ 1191 s32 oversize_amsdu; 1192 /* Number of PHY errors */ 1193 s32 phy_errs; 1194 /* Number of PHY errors drops */ 1195 s32 phy_err_drop; 1196 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 1197 s32 mpdu_errs; 1198 /* Num overflow errors */ 1199 s32 rx_ovfl_errs; 1200 }; 1201 1202 struct ath11k_fw_stats_vdev { 1203 struct list_head list; 1204 1205 u32 vdev_id; 1206 u32 beacon_snr; 1207 u32 data_snr; 1208 u32 num_tx_frames[WLAN_MAX_AC]; 1209 u32 num_rx_frames; 1210 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1211 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1212 u32 num_rts_fail; 1213 u32 num_rts_success; 1214 u32 num_rx_err; 1215 u32 num_rx_discard; 1216 u32 num_tx_not_acked; 1217 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1218 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1219 }; 1220 1221 struct ath11k_fw_stats_bcn { 1222 struct list_head list; 1223 1224 u32 vdev_id; 1225 u32 tx_bcn_succ_cnt; 1226 u32 tx_bcn_outage_cnt; 1227 }; 1228 1229 void ath11k_fw_stats_init(struct ath11k *ar); 1230 void ath11k_fw_stats_pdevs_free(struct list_head *head); 1231 void ath11k_fw_stats_vdevs_free(struct list_head *head); 1232 void ath11k_fw_stats_bcn_free(struct list_head *head); 1233 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats); 1234 1235 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 1236 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 1237 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 1238 1239 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 1240 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 1241 1242 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[]; 1243 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[]; 1244 1245 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 1246 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 1247 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 1248 int ath11k_core_pre_init(struct ath11k_base *ab); 1249 int ath11k_core_init(struct ath11k_base *ath11k); 1250 void ath11k_core_deinit(struct ath11k_base *ath11k); 1251 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1252 enum ath11k_bus bus); 1253 void ath11k_core_free(struct ath11k_base *ath11k); 1254 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1255 struct ath11k_board_data *bd); 1256 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1257 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1258 struct ath11k_board_data *bd, 1259 const char *name); 1260 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1261 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1262 int ath11k_core_check_smbios(struct ath11k_base *ab); 1263 void ath11k_core_halt(struct ath11k *ar); 1264 int ath11k_core_resume_early(struct ath11k_base *ab); 1265 int ath11k_core_resume(struct ath11k_base *ab); 1266 int ath11k_core_suspend(struct ath11k_base *ab); 1267 int ath11k_core_suspend_late(struct ath11k_base *ab); 1268 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1269 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); 1270 1271 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1272 const char *filename); 1273 1274 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1275 { 1276 switch (state) { 1277 case ATH11K_SCAN_IDLE: 1278 return "idle"; 1279 case ATH11K_SCAN_STARTING: 1280 return "starting"; 1281 case ATH11K_SCAN_RUNNING: 1282 return "running"; 1283 case ATH11K_SCAN_ABORTING: 1284 return "aborting"; 1285 } 1286 1287 return "unknown"; 1288 } 1289 1290 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1291 { 1292 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1293 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1294 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1295 } 1296 1297 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1298 { 1299 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1300 return (struct ath11k_skb_rxcb *)skb->cb; 1301 } 1302 1303 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1304 { 1305 return (struct ath11k_vif *)vif->drv_priv; 1306 } 1307 1308 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta) 1309 { 1310 return (struct ath11k_sta *)sta->drv_priv; 1311 } 1312 1313 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1314 int mac_id) 1315 { 1316 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1317 } 1318 1319 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1320 const char *filename, 1321 void *buf, size_t buf_len) 1322 { 1323 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1324 ab->hw_params.fw.dir, filename); 1325 } 1326 1327 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1328 { 1329 switch (bus) { 1330 case ATH11K_BUS_PCI: 1331 return "pci"; 1332 case ATH11K_BUS_AHB: 1333 return "ahb"; 1334 } 1335 1336 return "unknown"; 1337 } 1338 1339 void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab); 1340 1341 #endif /* _CORE_H_ */ 1342