1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH11K_CORE_H 8 #define ATH11K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/rhashtable.h> 17 #include <linux/average.h> 18 #include <linux/firmware.h> 19 20 #include "qmi.h" 21 #include "htc.h" 22 #include "wmi.h" 23 #include "hal.h" 24 #include "dp.h" 25 #include "ce.h" 26 #include "mac.h" 27 #include "hw.h" 28 #include "hal_rx.h" 29 #include "reg.h" 30 #include "thermal.h" 31 #include "dbring.h" 32 #include "spectral.h" 33 #include "wow.h" 34 #include "fw.h" 35 36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 37 38 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 39 40 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 41 42 /* Pending management packets threshold for dropping probe responses */ 43 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 44 45 #define ATH11K_INVALID_HW_MAC_ID 0xFF 46 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 47 48 /* SMBIOS type containing Board Data File Name Extension */ 49 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8 50 51 /* SMBIOS type structure length (excluding strings-set) */ 52 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9 53 54 /* The magic used by QCA spec */ 55 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_" 56 57 extern unsigned int ath11k_frame_mode; 58 extern bool ath11k_ftm_mode; 59 60 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 61 62 #define ATH11K_MON_TIMER_INTERVAL 10 63 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ) 64 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3 65 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5 66 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 67 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 68 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 69 70 enum ath11k_supported_bw { 71 ATH11K_BW_20 = 0, 72 ATH11K_BW_40 = 1, 73 ATH11K_BW_80 = 2, 74 ATH11K_BW_160 = 3, 75 }; 76 77 enum ath11k_bdf_search { 78 ATH11K_BDF_SEARCH_DEFAULT, 79 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 80 }; 81 82 enum wme_ac { 83 WME_AC_BE, 84 WME_AC_BK, 85 WME_AC_VI, 86 WME_AC_VO, 87 WME_NUM_AC 88 }; 89 90 #define ATH11K_HT_MCS_MAX 7 91 #define ATH11K_VHT_MCS_MAX 9 92 #define ATH11K_HE_MCS_MAX 11 93 94 enum ath11k_crypt_mode { 95 /* Only use hardware crypto engine */ 96 ATH11K_CRYPT_MODE_HW, 97 /* Only use software crypto */ 98 ATH11K_CRYPT_MODE_SW, 99 }; 100 101 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 102 { 103 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 104 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 105 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 106 WME_AC_VO); 107 } 108 109 enum ath11k_skb_flags { 110 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 111 ATH11K_SKB_CIPHER_SET = BIT(1), 112 }; 113 114 struct ath11k_skb_cb { 115 dma_addr_t paddr; 116 u8 eid; 117 u8 flags; 118 u32 cipher; 119 struct ath11k *ar; 120 struct ieee80211_vif *vif; 121 } __packed; 122 123 struct ath11k_skb_rxcb { 124 dma_addr_t paddr; 125 bool is_first_msdu; 126 bool is_last_msdu; 127 bool is_continuation; 128 bool is_mcbc; 129 bool is_eapol; 130 struct hal_rx_desc *rx_desc; 131 u8 err_rel_src; 132 u8 err_code; 133 u8 mac_id; 134 u8 unmapped; 135 u8 is_frag; 136 u8 tid; 137 u16 peer_id; 138 u16 seq_no; 139 }; 140 141 enum ath11k_hw_rev { 142 ATH11K_HW_IPQ8074, 143 ATH11K_HW_QCA6390_HW20, 144 ATH11K_HW_IPQ6018_HW10, 145 ATH11K_HW_QCN9074_HW10, 146 ATH11K_HW_WCN6855_HW20, 147 ATH11K_HW_WCN6855_HW21, 148 ATH11K_HW_WCN6750_HW10, 149 ATH11K_HW_IPQ5018_HW10, 150 ATH11K_HW_QCA2066_HW21, 151 ATH11K_HW_QCA6698AQ_HW21, 152 }; 153 154 enum ath11k_firmware_mode { 155 /* the default mode, standard 802.11 functionality */ 156 ATH11K_FIRMWARE_MODE_NORMAL, 157 158 /* factory tests etc */ 159 ATH11K_FIRMWARE_MODE_FTM, 160 161 /* Cold boot calibration */ 162 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 163 }; 164 165 extern bool ath11k_cold_boot_cal; 166 167 #define ATH11K_IRQ_NUM_MAX 52 168 #define ATH11K_EXT_IRQ_NUM_MAX 16 169 170 struct ath11k_ext_irq_grp { 171 struct ath11k_base *ab; 172 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 173 u32 num_irq; 174 u32 grp_id; 175 u64 timestamp; 176 bool napi_enabled; 177 struct napi_struct napi; 178 struct net_device *napi_ndev; 179 }; 180 181 enum ath11k_smbios_cc_type { 182 /* disable country code setting from SMBIOS */ 183 ATH11K_SMBIOS_CC_DISABLE = 0, 184 185 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 186 ATH11K_SMBIOS_CC_ISO = 1, 187 188 /* worldwide regdomain */ 189 ATH11K_SMBIOS_CC_WW = 2, 190 }; 191 192 struct ath11k_smbios_bdf { 193 struct dmi_header hdr; 194 195 u8 features_disabled; 196 197 /* enum ath11k_smbios_cc_type */ 198 u8 country_code_flag; 199 200 /* To set specific country, you need to set country code 201 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United 202 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 203 * 0x53). To set country to INDONESIA, then country code value = 204 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 205 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory 206 * setting. 207 */ 208 u16 cc_code; 209 210 u8 bdf_enabled; 211 u8 bdf_ext[]; 212 } __packed; 213 214 #define HEHANDLE_CAP_PHYINFO_SIZE 3 215 #define HECAP_PHYINFO_SIZE 9 216 #define HECAP_MACINFO_SIZE 5 217 #define HECAP_TXRX_MCS_NSS_SIZE 2 218 #define HECAP_PPET16_PPET8_MAX_SIZE 25 219 220 #define HE_PPET16_PPET8_SIZE 8 221 222 /* 802.11ax PPE (PPDU packet Extension) threshold */ 223 struct he_ppe_threshold { 224 u32 numss_m1; 225 u32 ru_mask; 226 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 227 }; 228 229 struct ath11k_he { 230 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 231 u32 hecap_rxmcsnssmap; 232 u32 hecap_txmcsnssmap; 233 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 234 struct he_ppe_threshold hecap_ppet; 235 u32 heop_param; 236 }; 237 238 #define MAX_RADIOS 3 239 240 /* ipq5018 hw param macros */ 241 #define MAX_RADIOS_5018 1 242 #define CE_CNT_5018 6 243 #define TARGET_CE_CNT_5018 9 244 #define SVC_CE_MAP_LEN_5018 17 245 #define RXDMA_PER_PDEV_5018 1 246 247 enum { 248 WMI_HOST_TP_SCALE_MAX = 0, 249 WMI_HOST_TP_SCALE_50 = 1, 250 WMI_HOST_TP_SCALE_25 = 2, 251 WMI_HOST_TP_SCALE_12 = 3, 252 WMI_HOST_TP_SCALE_MIN = 4, 253 WMI_HOST_TP_SCALE_SIZE = 5, 254 }; 255 256 enum ath11k_scan_state { 257 ATH11K_SCAN_IDLE, 258 ATH11K_SCAN_STARTING, 259 ATH11K_SCAN_RUNNING, 260 ATH11K_SCAN_ABORTING, 261 }; 262 263 enum ath11k_11d_state { 264 ATH11K_11D_IDLE, 265 ATH11K_11D_PREPARING, 266 ATH11K_11D_RUNNING, 267 }; 268 269 enum ath11k_dev_flags { 270 ATH11K_CAC_RUNNING, 271 ATH11K_FLAG_CORE_REGISTERED, 272 ATH11K_FLAG_CRASH_FLUSH, 273 ATH11K_FLAG_RAW_MODE, 274 ATH11K_FLAG_HW_CRYPTO_DISABLED, 275 ATH11K_FLAG_BTCOEX, 276 ATH11K_FLAG_RECOVERY, 277 ATH11K_FLAG_UNREGISTERING, 278 ATH11K_FLAG_REGISTERED, 279 ATH11K_FLAG_QMI_FAIL, 280 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 281 ATH11K_FLAG_CE_IRQ_ENABLED, 282 ATH11K_FLAG_EXT_IRQ_ENABLED, 283 ATH11K_FLAG_FIXED_MEM_RGN, 284 ATH11K_FLAG_DEVICE_INIT_DONE, 285 ATH11K_FLAG_MULTI_MSI_VECTORS, 286 ATH11K_FLAG_FTM_SEGMENTED, 287 }; 288 289 enum ath11k_monitor_flags { 290 ATH11K_FLAG_MONITOR_CONF_ENABLED, 291 ATH11K_FLAG_MONITOR_STARTED, 292 ATH11K_FLAG_MONITOR_VDEV_CREATED, 293 }; 294 295 #define ATH11K_IPV6_UC_TYPE 0 296 #define ATH11K_IPV6_AC_TYPE 1 297 298 #define ATH11K_IPV6_MAX_COUNT 16 299 #define ATH11K_IPV4_MAX_COUNT 2 300 301 struct ath11k_arp_ns_offload { 302 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4]; 303 u32 ipv4_count; 304 u32 ipv6_count; 305 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 306 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 307 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT]; 308 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT]; 309 u8 mac_addr[ETH_ALEN]; 310 }; 311 312 struct ath11k_rekey_data { 313 u8 kck[NL80211_KCK_LEN]; 314 u8 kek[NL80211_KCK_LEN]; 315 u64 replay_ctr; 316 bool enable_offload; 317 }; 318 319 /** 320 * struct ath11k_chan_power_info - TPE containing power info per channel chunk 321 * @chan_cfreq: channel center freq (MHz) 322 * e.g. 323 * channel 37/20 MHz, it is 6135 324 * channel 37/40 MHz, it is 6125 325 * channel 37/80 MHz, it is 6145 326 * channel 37/160 MHz, it is 6185 327 * @tx_power: transmit power (dBm) 328 */ 329 struct ath11k_chan_power_info { 330 u16 chan_cfreq; 331 s8 tx_power; 332 }; 333 334 /* ath11k only deals with 160 MHz, so 8 subchannels */ 335 #define ATH11K_NUM_PWR_LEVELS 8 336 337 /** 338 * struct ath11k_reg_tpc_power_info - regulatory TPC power info 339 * @is_psd_power: is PSD power or not 340 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD 341 * @ap_power_type: type of power (SP/LPI/VLP) 342 * @num_pwr_levels: number of power levels 343 * @reg_max: Array of maximum TX power (dBm) per PSD value 344 * @tpe: TPE values processed from TPE IE 345 * @chan_power_info: power info to send to firmware 346 */ 347 struct ath11k_reg_tpc_power_info { 348 bool is_psd_power; 349 u8 eirp_power; 350 enum wmi_reg_6ghz_ap_type ap_power_type; 351 u8 num_pwr_levels; 352 u8 reg_max[ATH11K_NUM_PWR_LEVELS]; 353 s8 tpe[ATH11K_NUM_PWR_LEVELS]; 354 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS]; 355 }; 356 357 struct ath11k_vif { 358 u32 vdev_id; 359 enum wmi_vdev_type vdev_type; 360 enum wmi_vdev_subtype vdev_subtype; 361 u32 beacon_interval; 362 u32 dtim_period; 363 u16 ast_hash; 364 u16 ast_idx; 365 u16 tcl_metadata; 366 u8 hal_addr_search_flags; 367 u8 search_type; 368 369 struct ath11k *ar; 370 struct ieee80211_vif *vif; 371 372 struct wmi_wmm_params_all_arg wmm_params; 373 struct list_head list; 374 union { 375 struct { 376 u32 uapsd; 377 } sta; 378 struct { 379 /* 127 stations; wmi limit */ 380 u8 tim_bitmap[16]; 381 u8 tim_len; 382 u32 ssid_len; 383 u8 ssid[IEEE80211_MAX_SSID_LEN]; 384 bool hidden_ssid; 385 /* P2P_IE with NoA attribute for P2P_GO case */ 386 u32 noa_len; 387 u8 *noa_data; 388 } ap; 389 } u; 390 391 bool is_started; 392 bool is_up; 393 bool ftm_responder; 394 bool spectral_enabled; 395 bool ps; 396 u32 aid; 397 u8 bssid[ETH_ALEN]; 398 struct cfg80211_bitrate_mask bitrate_mask; 399 struct delayed_work connection_loss_work; 400 struct work_struct bcn_tx_work; 401 int num_legacy_stations; 402 int rtscts_prot_mode; 403 int txpower; 404 bool rsnie_present; 405 bool wpaie_present; 406 bool bcca_zero_sent; 407 bool do_not_send_tmpl; 408 struct ath11k_arp_ns_offload arp_ns_offload; 409 struct ath11k_rekey_data rekey_data; 410 411 struct ath11k_reg_tpc_power_info reg_tpc_info; 412 413 /* Must be last - ends in a flexible-array member. 414 * 415 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 416 * especially because it has a flexible array. Find a better way. 417 */ 418 struct ieee80211_chanctx_conf chanctx; 419 }; 420 421 struct ath11k_vif_iter { 422 u32 vdev_id; 423 struct ath11k_vif *arvif; 424 }; 425 426 struct ath11k_rx_peer_stats { 427 u64 num_msdu; 428 u64 num_mpdu_fcs_ok; 429 u64 num_mpdu_fcs_err; 430 u64 tcp_msdu_count; 431 u64 udp_msdu_count; 432 u64 other_msdu_count; 433 u64 ampdu_msdu_count; 434 u64 non_ampdu_msdu_count; 435 u64 stbc_count; 436 u64 beamformed_count; 437 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 438 u64 nss_count[HAL_RX_MAX_NSS]; 439 u64 bw_count[HAL_RX_BW_MAX]; 440 u64 gi_count[HAL_RX_GI_MAX]; 441 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 442 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 443 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 444 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 445 u64 rx_duration; 446 u64 dcm_count; 447 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 448 }; 449 450 #define ATH11K_HE_MCS_NUM 12 451 #define ATH11K_VHT_MCS_NUM 10 452 #define ATH11K_BW_NUM 4 453 #define ATH11K_NSS_NUM 4 454 #define ATH11K_LEGACY_NUM 12 455 #define ATH11K_GI_NUM 4 456 #define ATH11K_HT_MCS_NUM 32 457 458 enum ath11k_pkt_rx_err { 459 ATH11K_PKT_RX_ERR_FCS, 460 ATH11K_PKT_RX_ERR_TKIP, 461 ATH11K_PKT_RX_ERR_CRYPT, 462 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 463 ATH11K_PKT_RX_ERR_MAX, 464 }; 465 466 enum ath11k_ampdu_subfrm_num { 467 ATH11K_AMPDU_SUBFRM_NUM_10, 468 ATH11K_AMPDU_SUBFRM_NUM_20, 469 ATH11K_AMPDU_SUBFRM_NUM_30, 470 ATH11K_AMPDU_SUBFRM_NUM_40, 471 ATH11K_AMPDU_SUBFRM_NUM_50, 472 ATH11K_AMPDU_SUBFRM_NUM_60, 473 ATH11K_AMPDU_SUBFRM_NUM_MORE, 474 ATH11K_AMPDU_SUBFRM_NUM_MAX, 475 }; 476 477 enum ath11k_amsdu_subfrm_num { 478 ATH11K_AMSDU_SUBFRM_NUM_1, 479 ATH11K_AMSDU_SUBFRM_NUM_2, 480 ATH11K_AMSDU_SUBFRM_NUM_3, 481 ATH11K_AMSDU_SUBFRM_NUM_4, 482 ATH11K_AMSDU_SUBFRM_NUM_MORE, 483 ATH11K_AMSDU_SUBFRM_NUM_MAX, 484 }; 485 486 enum ath11k_counter_type { 487 ATH11K_COUNTER_TYPE_BYTES, 488 ATH11K_COUNTER_TYPE_PKTS, 489 ATH11K_COUNTER_TYPE_MAX, 490 }; 491 492 enum ath11k_stats_type { 493 ATH11K_STATS_TYPE_SUCC, 494 ATH11K_STATS_TYPE_FAIL, 495 ATH11K_STATS_TYPE_RETRY, 496 ATH11K_STATS_TYPE_AMPDU, 497 ATH11K_STATS_TYPE_MAX, 498 }; 499 500 struct ath11k_htt_data_stats { 501 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 502 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 503 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 504 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 505 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 506 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 507 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 508 }; 509 510 struct ath11k_htt_tx_stats { 511 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 512 u64 tx_duration; 513 u64 ba_fails; 514 u64 ack_fails; 515 }; 516 517 struct ath11k_per_ppdu_tx_stats { 518 u16 succ_pkts; 519 u16 failed_pkts; 520 u16 retry_pkts; 521 u32 succ_bytes; 522 u32 failed_bytes; 523 u32 retry_bytes; 524 }; 525 526 DECLARE_EWMA(avg_rssi, 10, 8) 527 528 struct ath11k_sta { 529 struct ath11k_vif *arvif; 530 531 /* the following are protected by ar->data_lock */ 532 u32 changed; /* IEEE80211_RC_* */ 533 u32 bw; 534 u32 nss; 535 u32 smps; 536 enum hal_pn_type pn_type; 537 538 struct work_struct update_wk; 539 struct work_struct set_4addr_wk; 540 struct rate_info txrate; 541 u32 peer_nss; 542 struct rate_info last_txrate; 543 u64 rx_duration; 544 u64 tx_duration; 545 u8 rssi_comb; 546 struct ewma_avg_rssi avg_rssi; 547 s8 rssi_beacon; 548 s8 chain_signal[IEEE80211_MAX_CHAINS]; 549 struct ath11k_htt_tx_stats *tx_stats; 550 struct ath11k_rx_peer_stats *rx_stats; 551 552 #ifdef CONFIG_MAC80211_DEBUGFS 553 /* protected by conf_mutex */ 554 bool aggr_mode; 555 #endif 556 557 bool use_4addr_set; 558 u16 tcl_metadata; 559 560 /* Protected with ar->data_lock */ 561 enum ath11k_wmi_peer_ps_state peer_ps_state; 562 u64 ps_start_time; 563 u64 ps_start_jiffies; 564 u64 ps_total_duration; 565 bool peer_current_ps_valid; 566 567 u32 bw_prev; 568 }; 569 570 #define ATH11K_MIN_5G_FREQ 4150 571 #define ATH11K_MIN_6G_FREQ 5925 572 #define ATH11K_MAX_6G_FREQ 7115 573 #define ATH11K_NUM_CHANS 102 574 #define ATH11K_MAX_5G_CHAN 177 575 576 enum ath11k_state { 577 ATH11K_STATE_OFF, 578 ATH11K_STATE_ON, 579 ATH11K_STATE_RESTARTING, 580 ATH11K_STATE_RESTARTED, 581 ATH11K_STATE_WEDGED, 582 ATH11K_STATE_FTM, 583 /* Add other states as required */ 584 }; 585 586 /* Antenna noise floor */ 587 #define ATH11K_DEFAULT_NOISE_FLOOR -95 588 589 #define ATH11K_INVALID_RSSI_FULL -1 590 591 #define ATH11K_INVALID_RSSI_EMPTY -128 592 593 struct ath11k_fw_stats { 594 struct dentry *debugfs_fwstats; 595 u32 pdev_id; 596 u32 stats_id; 597 struct list_head pdevs; 598 struct list_head vdevs; 599 struct list_head bcn; 600 }; 601 602 struct ath11k_dbg_htt_stats { 603 u8 type; 604 u8 reset; 605 struct debug_htt_stats_req *stats_req; 606 /* protects shared stats req buffer */ 607 spinlock_t lock; 608 }; 609 610 #define MAX_MODULE_ID_BITMAP_WORDS 16 611 612 struct ath11k_debug { 613 struct dentry *debugfs_pdev; 614 struct ath11k_dbg_htt_stats htt_stats; 615 u32 extd_tx_stats; 616 u32 extd_rx_stats; 617 u32 pktlog_filter; 618 u32 pktlog_mode; 619 u32 pktlog_peer_valid; 620 u8 pktlog_peer_addr[ETH_ALEN]; 621 u32 rx_filter; 622 u32 mem_offset; 623 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 624 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 625 }; 626 627 struct ath11k_per_peer_tx_stats { 628 u32 succ_bytes; 629 u32 retry_bytes; 630 u32 failed_bytes; 631 u16 succ_pkts; 632 u16 retry_pkts; 633 u16 failed_pkts; 634 u32 duration; 635 u8 ba_fails; 636 bool is_ampdu; 637 }; 638 639 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 640 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 641 642 struct ath11k { 643 struct ath11k_base *ab; 644 struct ath11k_pdev *pdev; 645 struct ieee80211_hw *hw; 646 struct ath11k_pdev_wmi *wmi; 647 struct ath11k_pdev_dp dp; 648 u8 mac_addr[ETH_ALEN]; 649 struct ath11k_he ar_he; 650 enum ath11k_state state; 651 bool supports_6ghz; 652 struct { 653 struct completion started; 654 struct completion completed; 655 struct completion on_channel; 656 struct delayed_work timeout; 657 enum ath11k_scan_state state; 658 bool is_roc; 659 int vdev_id; 660 int roc_freq; 661 bool roc_notify; 662 } scan; 663 664 struct { 665 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 666 struct ieee80211_sband_iftype_data 667 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 668 } mac; 669 670 unsigned long dev_flags; 671 unsigned int filter_flags; 672 unsigned long monitor_flags; 673 u32 min_tx_power; 674 u32 max_tx_power; 675 u32 txpower_limit_2g; 676 u32 txpower_limit_5g; 677 u32 txpower_scale; 678 u32 power_scale; 679 u32 chan_tx_pwr; 680 u32 num_stations; 681 u32 max_num_stations; 682 /* To synchronize concurrent synchronous mac80211 callback operations, 683 * concurrent debugfs configuration and concurrent FW statistics events. 684 */ 685 struct mutex conf_mutex; 686 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 687 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 688 * channel context data, survey info, test mode data. 689 */ 690 spinlock_t data_lock; 691 692 struct list_head arvifs; 693 /* should never be NULL; needed for regular htt rx */ 694 struct ieee80211_channel *rx_channel; 695 696 /* valid during scan; needed for mgmt rx during scan */ 697 struct ieee80211_channel *scan_channel; 698 699 u8 cfg_tx_chainmask; 700 u8 cfg_rx_chainmask; 701 u8 num_rx_chains; 702 u8 num_tx_chains; 703 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 704 u8 pdev_idx; 705 u8 lmac_id; 706 707 struct completion peer_assoc_done; 708 struct completion peer_delete_done; 709 710 int install_key_status; 711 struct completion install_key_done; 712 713 int last_wmi_vdev_start_status; 714 struct completion vdev_setup_done; 715 struct completion vdev_delete_done; 716 717 int num_peers; 718 int max_num_peers; 719 u32 num_started_vdevs; 720 u32 num_created_vdevs; 721 unsigned long long allocated_vdev_map; 722 723 struct idr txmgmt_idr; 724 /* protects txmgmt_idr data */ 725 spinlock_t txmgmt_idr_lock; 726 atomic_t num_pending_mgmt_tx; 727 wait_queue_head_t txmgmt_empty_waitq; 728 729 /* cycle count is reported twice for each visited channel during scan. 730 * access protected by data_lock 731 */ 732 u32 survey_last_rx_clear_count; 733 u32 survey_last_cycle_count; 734 735 /* Channel info events are expected to come in pairs without and with 736 * COMPLETE flag set respectively for each channel visit during scan. 737 * 738 * However there are deviations from this rule. This flag is used to 739 * avoid reporting garbage data. 740 */ 741 bool ch_info_can_report_survey; 742 struct survey_info survey[ATH11K_NUM_CHANS]; 743 struct completion bss_survey_done; 744 745 struct work_struct regd_update_work; 746 747 struct work_struct wmi_mgmt_tx_work; 748 struct sk_buff_head wmi_mgmt_tx_queue; 749 750 struct ath11k_wow wow; 751 struct completion target_suspend; 752 bool target_suspend_ack; 753 struct ath11k_per_peer_tx_stats peer_tx_stats; 754 struct list_head ppdu_stats_info; 755 u32 ppdu_stat_list_depth; 756 757 struct ath11k_per_peer_tx_stats cached_stats; 758 u32 last_ppdu_id; 759 u32 cached_ppdu_id; 760 int monitor_vdev_id; 761 struct completion fw_mode_reset; 762 u8 ftm_msgref; 763 #ifdef CONFIG_ATH11K_DEBUGFS 764 struct ath11k_debug debug; 765 #endif 766 #ifdef CONFIG_ATH11K_SPECTRAL 767 struct ath11k_spectral spectral; 768 #endif 769 bool dfs_block_radar_events; 770 struct ath11k_thermal thermal; 771 u32 vdev_id_11d_scan; 772 struct completion completed_11d_scan; 773 enum ath11k_11d_state state_11d; 774 bool regdom_set_by_user; 775 int hw_rate_code; 776 u8 twt_enabled; 777 bool nlo_enabled; 778 u8 alpha2[REG_ALPHA2_LEN + 1]; 779 struct ath11k_fw_stats fw_stats; 780 struct completion fw_stats_complete; 781 bool fw_stats_done; 782 783 /* protected by conf_mutex */ 784 bool ps_state_enable; 785 bool ps_timekeeper_enable; 786 s8 max_allowed_tx_power; 787 }; 788 789 struct ath11k_band_cap { 790 u32 phy_id; 791 u32 max_bw_supported; 792 u32 ht_cap_info; 793 u32 he_cap_info[2]; 794 u32 he_mcs; 795 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 796 struct ath11k_ppe_threshold he_ppet; 797 u16 he_6ghz_capa; 798 }; 799 800 struct ath11k_pdev_cap { 801 u32 supported_bands; 802 u32 ampdu_density; 803 u32 vht_cap; 804 u32 vht_mcs; 805 u32 he_mcs; 806 u32 tx_chain_mask; 807 u32 rx_chain_mask; 808 u32 tx_chain_mask_shift; 809 u32 rx_chain_mask_shift; 810 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 811 bool nss_ratio_enabled; 812 u8 nss_ratio_info; 813 }; 814 815 struct ath11k_pdev { 816 struct ath11k *ar; 817 u32 pdev_id; 818 struct ath11k_pdev_cap cap; 819 u8 mac_addr[ETH_ALEN]; 820 }; 821 822 struct ath11k_board_data { 823 const struct firmware *fw; 824 const void *data; 825 size_t len; 826 }; 827 828 struct ath11k_pci_ops { 829 int (*wakeup)(struct ath11k_base *ab); 830 void (*release)(struct ath11k_base *ab); 831 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector); 832 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value); 833 u32 (*window_read32)(struct ath11k_base *ab, u32 offset); 834 }; 835 836 /* IPQ8074 HW channel counters frequency value in hertz */ 837 #define IPQ8074_CC_FREQ_HERTZ 320000 838 839 struct ath11k_bp_stats { 840 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 841 u16 hp; 842 843 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 844 u16 tp; 845 846 /* Number of Backpressure events received for the ring */ 847 u32 count; 848 849 /* Last recorded event timestamp */ 850 unsigned long jiffies; 851 }; 852 853 struct ath11k_dp_ring_bp_stats { 854 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 855 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 856 }; 857 858 struct ath11k_soc_dp_tx_err_stats { 859 /* TCL Ring Descriptor unavailable */ 860 u32 desc_na[DP_TCL_NUM_RING_MAX]; 861 /* Other failures during dp_tx due to mem allocation failure 862 * idr unavailable etc. 863 */ 864 atomic_t misc_fail; 865 }; 866 867 struct ath11k_soc_dp_stats { 868 u32 err_ring_pkts; 869 u32 invalid_rbm; 870 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 871 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 872 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 873 struct ath11k_soc_dp_tx_err_stats tx_err; 874 struct ath11k_dp_ring_bp_stats bp_stats; 875 }; 876 877 struct ath11k_msi_user { 878 char *name; 879 int num_vectors; 880 u32 base_vector; 881 }; 882 883 struct ath11k_msi_config { 884 int total_vectors; 885 int total_users; 886 struct ath11k_msi_user *users; 887 u16 hw_rev; 888 }; 889 890 /* Master structure to hold the hw data which may be used in core module */ 891 struct ath11k_base { 892 enum ath11k_hw_rev hw_rev; 893 enum ath11k_firmware_mode fw_mode; 894 struct platform_device *pdev; 895 struct device *dev; 896 struct ath11k_qmi qmi; 897 struct ath11k_wmi_base wmi_ab; 898 struct completion fw_ready; 899 int num_radios; 900 /* HW channel counters frequency value in hertz common to all MACs */ 901 u32 cc_freq_hz; 902 903 struct ath11k_htc htc; 904 905 struct ath11k_dp dp; 906 907 void __iomem *mem; 908 void __iomem *mem_ce; 909 unsigned long mem_len; 910 911 struct { 912 enum ath11k_bus bus; 913 const struct ath11k_hif_ops *ops; 914 } hif; 915 916 struct { 917 struct completion wakeup_completed; 918 } wow; 919 920 struct ath11k_ce ce; 921 struct timer_list rx_replenish_retry; 922 struct ath11k_hal hal; 923 /* To synchronize core_start/core_stop */ 924 struct mutex core_lock; 925 /* Protects data like peers */ 926 spinlock_t base_lock; 927 struct ath11k_pdev pdevs[MAX_RADIOS]; 928 struct { 929 enum WMI_HOST_WLAN_BAND supported_bands; 930 u32 pdev_id; 931 } target_pdev_ids[MAX_RADIOS]; 932 u8 target_pdev_count; 933 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 934 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 935 unsigned long long free_vdev_map; 936 937 /* To synchronize rhash tbl write operation */ 938 struct mutex tbl_mtx_lock; 939 940 /* The rhashtable containing struct ath11k_peer keyed by mac addr */ 941 struct rhashtable *rhead_peer_addr; 942 struct rhashtable_params rhash_peer_addr_param; 943 944 /* The rhashtable containing struct ath11k_peer keyed by id */ 945 struct rhashtable *rhead_peer_id; 946 struct rhashtable_params rhash_peer_id_param; 947 948 struct list_head peers; 949 wait_queue_head_t peer_mapping_wq; 950 u8 mac_addr[ETH_ALEN]; 951 int irq_num[ATH11K_IRQ_NUM_MAX]; 952 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 953 struct ath11k_targ_cap target_caps; 954 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 955 bool pdevs_macaddr_valid; 956 957 struct ath11k_hw_params hw_params; 958 959 const struct firmware *cal_file; 960 961 /* Below regd's are protected by ab->data_lock */ 962 /* This is the regd set for every radio 963 * by the firmware during initialization 964 */ 965 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 966 /* This regd is set during dynamic country setting 967 * This may or may not be used during the runtime 968 */ 969 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 970 struct cur_regulatory_info *reg_info_store; 971 972 /* Current DFS Regulatory */ 973 enum ath11k_dfs_region dfs_region; 974 #ifdef CONFIG_ATH11K_DEBUGFS 975 struct dentry *debugfs_soc; 976 #endif 977 struct ath11k_soc_dp_stats soc_stats; 978 979 unsigned long dev_flags; 980 struct completion driver_recovery; 981 struct workqueue_struct *workqueue; 982 struct work_struct restart_work; 983 struct work_struct update_11d_work; 984 u8 new_alpha2[3]; 985 struct workqueue_struct *workqueue_aux; 986 struct work_struct reset_work; 987 atomic_t reset_count; 988 atomic_t recovery_count; 989 atomic_t recovery_start_count; 990 bool is_reset; 991 struct completion reset_complete; 992 struct completion reconfigure_complete; 993 struct completion recovery_start; 994 /* continuous recovery fail count */ 995 atomic_t fail_cont_count; 996 unsigned long reset_fail_timeout; 997 struct { 998 /* protected by data_lock */ 999 u32 fw_crash_counter; 1000 } stats; 1001 u32 pktlog_defs_checksum; 1002 1003 struct ath11k_dbring_cap *db_caps; 1004 u32 num_db_cap; 1005 1006 /* To synchronize 11d scan vdev id */ 1007 struct mutex vdev_id_11d_lock; 1008 struct timer_list mon_reap_timer; 1009 1010 struct completion htc_suspend; 1011 1012 struct { 1013 enum ath11k_bdf_search bdf_search; 1014 u32 vendor; 1015 u32 device; 1016 u32 subsystem_vendor; 1017 u32 subsystem_device; 1018 } id; 1019 1020 struct { 1021 struct { 1022 const struct ath11k_msi_config *config; 1023 u32 ep_base_data; 1024 u32 irqs[32]; 1025 u32 addr_lo; 1026 u32 addr_hi; 1027 } msi; 1028 1029 const struct ath11k_pci_ops *ops; 1030 } pci; 1031 1032 struct { 1033 u32 api_version; 1034 1035 const struct firmware *fw; 1036 const u8 *amss_data; 1037 size_t amss_len; 1038 const u8 *m3_data; 1039 size_t m3_len; 1040 1041 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT); 1042 } fw; 1043 1044 #ifdef CONFIG_NL80211_TESTMODE 1045 struct { 1046 u32 data_pos; 1047 u32 expected_seq; 1048 u8 *eventdata; 1049 } testmode; 1050 #endif 1051 1052 /* must be last */ 1053 u8 drv_priv[] __aligned(sizeof(void *)); 1054 }; 1055 1056 struct ath11k_fw_stats_pdev { 1057 struct list_head list; 1058 1059 /* PDEV stats */ 1060 s32 ch_noise_floor; 1061 /* Cycles spent transmitting frames */ 1062 u32 tx_frame_count; 1063 /* Cycles spent receiving frames */ 1064 u32 rx_frame_count; 1065 /* Total channel busy time, evidently */ 1066 u32 rx_clear_count; 1067 /* Total on-channel time */ 1068 u32 cycle_count; 1069 u32 phy_err_count; 1070 u32 chan_tx_power; 1071 u32 ack_rx_bad; 1072 u32 rts_bad; 1073 u32 rts_good; 1074 u32 fcs_bad; 1075 u32 no_beacons; 1076 u32 mib_int_count; 1077 1078 /* PDEV TX stats */ 1079 /* Num HTT cookies queued to dispatch list */ 1080 s32 comp_queued; 1081 /* Num HTT cookies dispatched */ 1082 s32 comp_delivered; 1083 /* Num MSDU queued to WAL */ 1084 s32 msdu_enqued; 1085 /* Num MPDU queue to WAL */ 1086 s32 mpdu_enqued; 1087 /* Num MSDUs dropped by WMM limit */ 1088 s32 wmm_drop; 1089 /* Num Local frames queued */ 1090 s32 local_enqued; 1091 /* Num Local frames done */ 1092 s32 local_freed; 1093 /* Num queued to HW */ 1094 s32 hw_queued; 1095 /* Num PPDU reaped from HW */ 1096 s32 hw_reaped; 1097 /* Num underruns */ 1098 s32 underrun; 1099 /* Num hw paused */ 1100 u32 hw_paused; 1101 /* Num PPDUs cleaned up in TX abort */ 1102 s32 tx_abort; 1103 /* Num MPDUs requeued by SW */ 1104 s32 mpdus_requeued; 1105 /* excessive retries */ 1106 u32 tx_ko; 1107 u32 tx_xretry; 1108 /* data hw rate code */ 1109 u32 data_rc; 1110 /* Scheduler self triggers */ 1111 u32 self_triggers; 1112 /* frames dropped due to excessive sw retries */ 1113 u32 sw_retry_failure; 1114 /* illegal rate phy errors */ 1115 u32 illgl_rate_phy_err; 1116 /* wal pdev continuous xretry */ 1117 u32 pdev_cont_xretry; 1118 /* wal pdev tx timeouts */ 1119 u32 pdev_tx_timeout; 1120 /* wal pdev resets */ 1121 u32 pdev_resets; 1122 /* frames dropped due to non-availability of stateless TIDs */ 1123 u32 stateless_tid_alloc_failure; 1124 /* PhY/BB underrun */ 1125 u32 phy_underrun; 1126 /* MPDU is more than txop limit */ 1127 u32 txop_ovf; 1128 /* Num sequences posted */ 1129 u32 seq_posted; 1130 /* Num sequences failed in queueing */ 1131 u32 seq_failed_queueing; 1132 /* Num sequences completed */ 1133 u32 seq_completed; 1134 /* Num sequences restarted */ 1135 u32 seq_restarted; 1136 /* Num of MU sequences posted */ 1137 u32 mu_seq_posted; 1138 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 1139 * (Reset,channel change) 1140 */ 1141 s32 mpdus_sw_flush; 1142 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 1143 s32 mpdus_hw_filter; 1144 /* Num MPDUs truncated by PDG (TXOP, TBTT, 1145 * PPDU_duration based on rate, dyn_bw) 1146 */ 1147 s32 mpdus_truncated; 1148 /* Num MPDUs that was tried but didn't receive ACK or BA */ 1149 s32 mpdus_ack_failed; 1150 /* Num MPDUs that was dropped du to expiry. */ 1151 s32 mpdus_expired; 1152 1153 /* PDEV RX stats */ 1154 /* Cnts any change in ring routing mid-ppdu */ 1155 s32 mid_ppdu_route_change; 1156 /* Total number of statuses processed */ 1157 s32 status_rcvd; 1158 /* Extra frags on rings 0-3 */ 1159 s32 r0_frags; 1160 s32 r1_frags; 1161 s32 r2_frags; 1162 s32 r3_frags; 1163 /* MSDUs / MPDUs delivered to HTT */ 1164 s32 htt_msdus; 1165 s32 htt_mpdus; 1166 /* MSDUs / MPDUs delivered to local stack */ 1167 s32 loc_msdus; 1168 s32 loc_mpdus; 1169 /* AMSDUs that have more MSDUs than the status ring size */ 1170 s32 oversize_amsdu; 1171 /* Number of PHY errors */ 1172 s32 phy_errs; 1173 /* Number of PHY errors drops */ 1174 s32 phy_err_drop; 1175 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 1176 s32 mpdu_errs; 1177 /* Num overflow errors */ 1178 s32 rx_ovfl_errs; 1179 }; 1180 1181 struct ath11k_fw_stats_vdev { 1182 struct list_head list; 1183 1184 u32 vdev_id; 1185 u32 beacon_snr; 1186 u32 data_snr; 1187 u32 num_tx_frames[WLAN_MAX_AC]; 1188 u32 num_rx_frames; 1189 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1190 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1191 u32 num_rts_fail; 1192 u32 num_rts_success; 1193 u32 num_rx_err; 1194 u32 num_rx_discard; 1195 u32 num_tx_not_acked; 1196 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1197 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1198 }; 1199 1200 struct ath11k_fw_stats_bcn { 1201 struct list_head list; 1202 1203 u32 vdev_id; 1204 u32 tx_bcn_succ_cnt; 1205 u32 tx_bcn_outage_cnt; 1206 }; 1207 1208 void ath11k_fw_stats_init(struct ath11k *ar); 1209 void ath11k_fw_stats_pdevs_free(struct list_head *head); 1210 void ath11k_fw_stats_vdevs_free(struct list_head *head); 1211 void ath11k_fw_stats_bcn_free(struct list_head *head); 1212 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats); 1213 1214 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 1215 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 1216 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 1217 1218 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 1219 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 1220 1221 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[]; 1222 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[]; 1223 1224 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 1225 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 1226 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 1227 int ath11k_core_pre_init(struct ath11k_base *ab); 1228 int ath11k_core_init(struct ath11k_base *ath11k); 1229 void ath11k_core_deinit(struct ath11k_base *ath11k); 1230 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1231 enum ath11k_bus bus); 1232 void ath11k_core_free(struct ath11k_base *ath11k); 1233 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1234 struct ath11k_board_data *bd); 1235 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1236 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1237 struct ath11k_board_data *bd, 1238 const char *name); 1239 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1240 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1241 int ath11k_core_check_smbios(struct ath11k_base *ab); 1242 void ath11k_core_halt(struct ath11k *ar); 1243 int ath11k_core_resume(struct ath11k_base *ab); 1244 int ath11k_core_suspend(struct ath11k_base *ab); 1245 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1246 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); 1247 1248 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1249 const char *filename); 1250 1251 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1252 { 1253 switch (state) { 1254 case ATH11K_SCAN_IDLE: 1255 return "idle"; 1256 case ATH11K_SCAN_STARTING: 1257 return "starting"; 1258 case ATH11K_SCAN_RUNNING: 1259 return "running"; 1260 case ATH11K_SCAN_ABORTING: 1261 return "aborting"; 1262 } 1263 1264 return "unknown"; 1265 } 1266 1267 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1268 { 1269 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1270 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1271 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1272 } 1273 1274 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1275 { 1276 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1277 return (struct ath11k_skb_rxcb *)skb->cb; 1278 } 1279 1280 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1281 { 1282 return (struct ath11k_vif *)vif->drv_priv; 1283 } 1284 1285 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta) 1286 { 1287 return (struct ath11k_sta *)sta->drv_priv; 1288 } 1289 1290 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1291 int mac_id) 1292 { 1293 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1294 } 1295 1296 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1297 const char *filename, 1298 void *buf, size_t buf_len) 1299 { 1300 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1301 ab->hw_params.fw.dir, filename); 1302 } 1303 1304 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1305 { 1306 switch (bus) { 1307 case ATH11K_BUS_PCI: 1308 return "pci"; 1309 case ATH11K_BUS_AHB: 1310 return "ahb"; 1311 } 1312 1313 return "unknown"; 1314 } 1315 1316 #endif /* _CORE_H_ */ 1317