1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH11K_CORE_H 8 #define ATH11K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/rhashtable.h> 17 #include <linux/average.h> 18 #include <linux/firmware.h> 19 20 #include "qmi.h" 21 #include "htc.h" 22 #include "wmi.h" 23 #include "hal.h" 24 #include "dp.h" 25 #include "ce.h" 26 #include "mac.h" 27 #include "hw.h" 28 #include "hal_rx.h" 29 #include "reg.h" 30 #include "thermal.h" 31 #include "dbring.h" 32 #include "spectral.h" 33 #include "wow.h" 34 #include "fw.h" 35 36 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 37 38 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 39 40 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 41 42 /* Pending management packets threshold for dropping probe responses */ 43 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 44 45 #define ATH11K_INVALID_HW_MAC_ID 0xFF 46 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 47 48 /* SMBIOS type containing Board Data File Name Extension */ 49 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8 50 51 /* SMBIOS type structure length (excluding strings-set) */ 52 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9 53 54 /* The magic used by QCA spec */ 55 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_" 56 57 extern unsigned int ath11k_frame_mode; 58 extern bool ath11k_ftm_mode; 59 60 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 61 62 #define ATH11K_MON_TIMER_INTERVAL 10 63 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ) 64 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3 65 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5 66 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 67 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 68 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 69 70 enum ath11k_supported_bw { 71 ATH11K_BW_20 = 0, 72 ATH11K_BW_40 = 1, 73 ATH11K_BW_80 = 2, 74 ATH11K_BW_160 = 3, 75 }; 76 77 enum ath11k_bdf_search { 78 ATH11K_BDF_SEARCH_DEFAULT, 79 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 80 }; 81 82 enum wme_ac { 83 WME_AC_BE, 84 WME_AC_BK, 85 WME_AC_VI, 86 WME_AC_VO, 87 WME_NUM_AC 88 }; 89 90 #define ATH11K_HT_MCS_MAX 7 91 #define ATH11K_VHT_MCS_MAX 9 92 #define ATH11K_HE_MCS_MAX 11 93 94 enum ath11k_crypt_mode { 95 /* Only use hardware crypto engine */ 96 ATH11K_CRYPT_MODE_HW, 97 /* Only use software crypto */ 98 ATH11K_CRYPT_MODE_SW, 99 }; 100 101 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 102 { 103 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 104 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 105 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 106 WME_AC_VO); 107 } 108 109 enum ath11k_skb_flags { 110 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 111 ATH11K_SKB_CIPHER_SET = BIT(1), 112 }; 113 114 struct ath11k_skb_cb { 115 dma_addr_t paddr; 116 u8 eid; 117 u8 flags; 118 u32 cipher; 119 struct ath11k *ar; 120 struct ieee80211_vif *vif; 121 } __packed; 122 123 struct ath11k_skb_rxcb { 124 dma_addr_t paddr; 125 bool is_first_msdu; 126 bool is_last_msdu; 127 bool is_continuation; 128 bool is_mcbc; 129 bool is_eapol; 130 struct hal_rx_desc *rx_desc; 131 u8 err_rel_src; 132 u8 err_code; 133 u8 mac_id; 134 u8 unmapped; 135 u8 is_frag; 136 u8 tid; 137 u16 peer_id; 138 u16 seq_no; 139 }; 140 141 enum ath11k_hw_rev { 142 ATH11K_HW_IPQ8074, 143 ATH11K_HW_QCA6390_HW20, 144 ATH11K_HW_IPQ6018_HW10, 145 ATH11K_HW_QCN9074_HW10, 146 ATH11K_HW_WCN6855_HW20, 147 ATH11K_HW_WCN6855_HW21, 148 ATH11K_HW_WCN6750_HW10, 149 ATH11K_HW_IPQ5018_HW10, 150 ATH11K_HW_QCA2066_HW21, 151 }; 152 153 enum ath11k_firmware_mode { 154 /* the default mode, standard 802.11 functionality */ 155 ATH11K_FIRMWARE_MODE_NORMAL, 156 157 /* factory tests etc */ 158 ATH11K_FIRMWARE_MODE_FTM, 159 160 /* Cold boot calibration */ 161 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 162 }; 163 164 extern bool ath11k_cold_boot_cal; 165 166 #define ATH11K_IRQ_NUM_MAX 52 167 #define ATH11K_EXT_IRQ_NUM_MAX 16 168 169 struct ath11k_ext_irq_grp { 170 struct ath11k_base *ab; 171 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 172 u32 num_irq; 173 u32 grp_id; 174 u64 timestamp; 175 bool napi_enabled; 176 struct napi_struct napi; 177 struct net_device *napi_ndev; 178 }; 179 180 enum ath11k_smbios_cc_type { 181 /* disable country code setting from SMBIOS */ 182 ATH11K_SMBIOS_CC_DISABLE = 0, 183 184 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 185 ATH11K_SMBIOS_CC_ISO = 1, 186 187 /* worldwide regdomain */ 188 ATH11K_SMBIOS_CC_WW = 2, 189 }; 190 191 struct ath11k_smbios_bdf { 192 struct dmi_header hdr; 193 194 u8 features_disabled; 195 196 /* enum ath11k_smbios_cc_type */ 197 u8 country_code_flag; 198 199 /* To set specific country, you need to set country code 200 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United 201 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 202 * 0x53). To set country to INDONESIA, then country code value = 203 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 204 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory 205 * setting. 206 */ 207 u16 cc_code; 208 209 u8 bdf_enabled; 210 u8 bdf_ext[]; 211 } __packed; 212 213 #define HEHANDLE_CAP_PHYINFO_SIZE 3 214 #define HECAP_PHYINFO_SIZE 9 215 #define HECAP_MACINFO_SIZE 5 216 #define HECAP_TXRX_MCS_NSS_SIZE 2 217 #define HECAP_PPET16_PPET8_MAX_SIZE 25 218 219 #define HE_PPET16_PPET8_SIZE 8 220 221 /* 802.11ax PPE (PPDU packet Extension) threshold */ 222 struct he_ppe_threshold { 223 u32 numss_m1; 224 u32 ru_mask; 225 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 226 }; 227 228 struct ath11k_he { 229 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 230 u32 hecap_rxmcsnssmap; 231 u32 hecap_txmcsnssmap; 232 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 233 struct he_ppe_threshold hecap_ppet; 234 u32 heop_param; 235 }; 236 237 #define MAX_RADIOS 3 238 239 /* ipq5018 hw param macros */ 240 #define MAX_RADIOS_5018 1 241 #define CE_CNT_5018 6 242 #define TARGET_CE_CNT_5018 9 243 #define SVC_CE_MAP_LEN_5018 17 244 #define RXDMA_PER_PDEV_5018 1 245 246 enum { 247 WMI_HOST_TP_SCALE_MAX = 0, 248 WMI_HOST_TP_SCALE_50 = 1, 249 WMI_HOST_TP_SCALE_25 = 2, 250 WMI_HOST_TP_SCALE_12 = 3, 251 WMI_HOST_TP_SCALE_MIN = 4, 252 WMI_HOST_TP_SCALE_SIZE = 5, 253 }; 254 255 enum ath11k_scan_state { 256 ATH11K_SCAN_IDLE, 257 ATH11K_SCAN_STARTING, 258 ATH11K_SCAN_RUNNING, 259 ATH11K_SCAN_ABORTING, 260 }; 261 262 enum ath11k_11d_state { 263 ATH11K_11D_IDLE, 264 ATH11K_11D_PREPARING, 265 ATH11K_11D_RUNNING, 266 }; 267 268 enum ath11k_dev_flags { 269 ATH11K_CAC_RUNNING, 270 ATH11K_FLAG_CORE_REGISTERED, 271 ATH11K_FLAG_CRASH_FLUSH, 272 ATH11K_FLAG_RAW_MODE, 273 ATH11K_FLAG_HW_CRYPTO_DISABLED, 274 ATH11K_FLAG_BTCOEX, 275 ATH11K_FLAG_RECOVERY, 276 ATH11K_FLAG_UNREGISTERING, 277 ATH11K_FLAG_REGISTERED, 278 ATH11K_FLAG_QMI_FAIL, 279 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 280 ATH11K_FLAG_CE_IRQ_ENABLED, 281 ATH11K_FLAG_EXT_IRQ_ENABLED, 282 ATH11K_FLAG_FIXED_MEM_RGN, 283 ATH11K_FLAG_DEVICE_INIT_DONE, 284 ATH11K_FLAG_MULTI_MSI_VECTORS, 285 ATH11K_FLAG_FTM_SEGMENTED, 286 }; 287 288 enum ath11k_monitor_flags { 289 ATH11K_FLAG_MONITOR_CONF_ENABLED, 290 ATH11K_FLAG_MONITOR_STARTED, 291 ATH11K_FLAG_MONITOR_VDEV_CREATED, 292 }; 293 294 #define ATH11K_IPV6_UC_TYPE 0 295 #define ATH11K_IPV6_AC_TYPE 1 296 297 #define ATH11K_IPV6_MAX_COUNT 16 298 #define ATH11K_IPV4_MAX_COUNT 2 299 300 struct ath11k_arp_ns_offload { 301 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4]; 302 u32 ipv4_count; 303 u32 ipv6_count; 304 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 305 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 306 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT]; 307 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT]; 308 u8 mac_addr[ETH_ALEN]; 309 }; 310 311 struct ath11k_rekey_data { 312 u8 kck[NL80211_KCK_LEN]; 313 u8 kek[NL80211_KCK_LEN]; 314 u64 replay_ctr; 315 bool enable_offload; 316 }; 317 318 /** 319 * struct ath11k_chan_power_info - TPE containing power info per channel chunk 320 * @chan_cfreq: channel center freq (MHz) 321 * e.g. 322 * channel 37/20 MHz, it is 6135 323 * channel 37/40 MHz, it is 6125 324 * channel 37/80 MHz, it is 6145 325 * channel 37/160 MHz, it is 6185 326 * @tx_power: transmit power (dBm) 327 */ 328 struct ath11k_chan_power_info { 329 u16 chan_cfreq; 330 s8 tx_power; 331 }; 332 333 /* ath11k only deals with 160 MHz, so 8 subchannels */ 334 #define ATH11K_NUM_PWR_LEVELS 8 335 336 /** 337 * struct ath11k_reg_tpc_power_info - regulatory TPC power info 338 * @is_psd_power: is PSD power or not 339 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD 340 * @ap_power_type: type of power (SP/LPI/VLP) 341 * @num_pwr_levels: number of power levels 342 * @reg_max: Array of maximum TX power (dBm) per PSD value 343 * @ap_constraint_power: AP constraint power (dBm) 344 * @tpe: TPE values processed from TPE IE 345 * @chan_power_info: power info to send to firmware 346 */ 347 struct ath11k_reg_tpc_power_info { 348 bool is_psd_power; 349 u8 eirp_power; 350 enum wmi_reg_6ghz_ap_type ap_power_type; 351 u8 num_pwr_levels; 352 u8 reg_max[ATH11K_NUM_PWR_LEVELS]; 353 u8 ap_constraint_power; 354 s8 tpe[ATH11K_NUM_PWR_LEVELS]; 355 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS]; 356 }; 357 358 struct ath11k_vif { 359 u32 vdev_id; 360 enum wmi_vdev_type vdev_type; 361 enum wmi_vdev_subtype vdev_subtype; 362 u32 beacon_interval; 363 u32 dtim_period; 364 u16 ast_hash; 365 u16 ast_idx; 366 u16 tcl_metadata; 367 u8 hal_addr_search_flags; 368 u8 search_type; 369 370 struct ath11k *ar; 371 struct ieee80211_vif *vif; 372 373 u16 tx_seq_no; 374 struct wmi_wmm_params_all_arg wmm_params; 375 struct list_head list; 376 union { 377 struct { 378 u32 uapsd; 379 } sta; 380 struct { 381 /* 127 stations; wmi limit */ 382 u8 tim_bitmap[16]; 383 u8 tim_len; 384 u32 ssid_len; 385 u8 ssid[IEEE80211_MAX_SSID_LEN]; 386 bool hidden_ssid; 387 /* P2P_IE with NoA attribute for P2P_GO case */ 388 u32 noa_len; 389 u8 *noa_data; 390 } ap; 391 } u; 392 393 bool is_started; 394 bool is_up; 395 bool ftm_responder; 396 bool spectral_enabled; 397 bool ps; 398 u32 aid; 399 u8 bssid[ETH_ALEN]; 400 struct cfg80211_bitrate_mask bitrate_mask; 401 struct delayed_work connection_loss_work; 402 struct work_struct bcn_tx_work; 403 int num_legacy_stations; 404 int rtscts_prot_mode; 405 int txpower; 406 bool rsnie_present; 407 bool wpaie_present; 408 bool bcca_zero_sent; 409 bool do_not_send_tmpl; 410 struct ieee80211_chanctx_conf chanctx; 411 struct ath11k_arp_ns_offload arp_ns_offload; 412 struct ath11k_rekey_data rekey_data; 413 414 struct ath11k_reg_tpc_power_info reg_tpc_info; 415 }; 416 417 struct ath11k_vif_iter { 418 u32 vdev_id; 419 struct ath11k_vif *arvif; 420 }; 421 422 struct ath11k_rx_peer_stats { 423 u64 num_msdu; 424 u64 num_mpdu_fcs_ok; 425 u64 num_mpdu_fcs_err; 426 u64 tcp_msdu_count; 427 u64 udp_msdu_count; 428 u64 other_msdu_count; 429 u64 ampdu_msdu_count; 430 u64 non_ampdu_msdu_count; 431 u64 stbc_count; 432 u64 beamformed_count; 433 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 434 u64 nss_count[HAL_RX_MAX_NSS]; 435 u64 bw_count[HAL_RX_BW_MAX]; 436 u64 gi_count[HAL_RX_GI_MAX]; 437 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 438 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 439 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 440 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 441 u64 rx_duration; 442 u64 dcm_count; 443 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 444 }; 445 446 #define ATH11K_HE_MCS_NUM 12 447 #define ATH11K_VHT_MCS_NUM 10 448 #define ATH11K_BW_NUM 4 449 #define ATH11K_NSS_NUM 4 450 #define ATH11K_LEGACY_NUM 12 451 #define ATH11K_GI_NUM 4 452 #define ATH11K_HT_MCS_NUM 32 453 454 enum ath11k_pkt_rx_err { 455 ATH11K_PKT_RX_ERR_FCS, 456 ATH11K_PKT_RX_ERR_TKIP, 457 ATH11K_PKT_RX_ERR_CRYPT, 458 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 459 ATH11K_PKT_RX_ERR_MAX, 460 }; 461 462 enum ath11k_ampdu_subfrm_num { 463 ATH11K_AMPDU_SUBFRM_NUM_10, 464 ATH11K_AMPDU_SUBFRM_NUM_20, 465 ATH11K_AMPDU_SUBFRM_NUM_30, 466 ATH11K_AMPDU_SUBFRM_NUM_40, 467 ATH11K_AMPDU_SUBFRM_NUM_50, 468 ATH11K_AMPDU_SUBFRM_NUM_60, 469 ATH11K_AMPDU_SUBFRM_NUM_MORE, 470 ATH11K_AMPDU_SUBFRM_NUM_MAX, 471 }; 472 473 enum ath11k_amsdu_subfrm_num { 474 ATH11K_AMSDU_SUBFRM_NUM_1, 475 ATH11K_AMSDU_SUBFRM_NUM_2, 476 ATH11K_AMSDU_SUBFRM_NUM_3, 477 ATH11K_AMSDU_SUBFRM_NUM_4, 478 ATH11K_AMSDU_SUBFRM_NUM_MORE, 479 ATH11K_AMSDU_SUBFRM_NUM_MAX, 480 }; 481 482 enum ath11k_counter_type { 483 ATH11K_COUNTER_TYPE_BYTES, 484 ATH11K_COUNTER_TYPE_PKTS, 485 ATH11K_COUNTER_TYPE_MAX, 486 }; 487 488 enum ath11k_stats_type { 489 ATH11K_STATS_TYPE_SUCC, 490 ATH11K_STATS_TYPE_FAIL, 491 ATH11K_STATS_TYPE_RETRY, 492 ATH11K_STATS_TYPE_AMPDU, 493 ATH11K_STATS_TYPE_MAX, 494 }; 495 496 struct ath11k_htt_data_stats { 497 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 498 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 499 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 500 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 501 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 502 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 503 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 504 }; 505 506 struct ath11k_htt_tx_stats { 507 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 508 u64 tx_duration; 509 u64 ba_fails; 510 u64 ack_fails; 511 }; 512 513 struct ath11k_per_ppdu_tx_stats { 514 u16 succ_pkts; 515 u16 failed_pkts; 516 u16 retry_pkts; 517 u32 succ_bytes; 518 u32 failed_bytes; 519 u32 retry_bytes; 520 }; 521 522 DECLARE_EWMA(avg_rssi, 10, 8) 523 524 struct ath11k_sta { 525 struct ath11k_vif *arvif; 526 527 /* the following are protected by ar->data_lock */ 528 u32 changed; /* IEEE80211_RC_* */ 529 u32 bw; 530 u32 nss; 531 u32 smps; 532 enum hal_pn_type pn_type; 533 534 struct work_struct update_wk; 535 struct work_struct set_4addr_wk; 536 struct rate_info txrate; 537 u32 peer_nss; 538 struct rate_info last_txrate; 539 u64 rx_duration; 540 u64 tx_duration; 541 u8 rssi_comb; 542 struct ewma_avg_rssi avg_rssi; 543 s8 rssi_beacon; 544 s8 chain_signal[IEEE80211_MAX_CHAINS]; 545 struct ath11k_htt_tx_stats *tx_stats; 546 struct ath11k_rx_peer_stats *rx_stats; 547 548 #ifdef CONFIG_MAC80211_DEBUGFS 549 /* protected by conf_mutex */ 550 bool aggr_mode; 551 #endif 552 553 bool use_4addr_set; 554 u16 tcl_metadata; 555 556 /* Protected with ar->data_lock */ 557 enum ath11k_wmi_peer_ps_state peer_ps_state; 558 u64 ps_start_time; 559 u64 ps_start_jiffies; 560 u64 ps_total_duration; 561 bool peer_current_ps_valid; 562 563 u32 bw_prev; 564 }; 565 566 #define ATH11K_MIN_5G_FREQ 4150 567 #define ATH11K_MIN_6G_FREQ 5925 568 #define ATH11K_MAX_6G_FREQ 7115 569 #define ATH11K_NUM_CHANS 102 570 #define ATH11K_MAX_5G_CHAN 177 571 572 enum ath11k_state { 573 ATH11K_STATE_OFF, 574 ATH11K_STATE_ON, 575 ATH11K_STATE_RESTARTING, 576 ATH11K_STATE_RESTARTED, 577 ATH11K_STATE_WEDGED, 578 ATH11K_STATE_FTM, 579 /* Add other states as required */ 580 }; 581 582 /* Antenna noise floor */ 583 #define ATH11K_DEFAULT_NOISE_FLOOR -95 584 585 #define ATH11K_INVALID_RSSI_FULL -1 586 587 #define ATH11K_INVALID_RSSI_EMPTY -128 588 589 struct ath11k_fw_stats { 590 struct dentry *debugfs_fwstats; 591 u32 pdev_id; 592 u32 stats_id; 593 struct list_head pdevs; 594 struct list_head vdevs; 595 struct list_head bcn; 596 }; 597 598 struct ath11k_dbg_htt_stats { 599 u8 type; 600 u8 reset; 601 struct debug_htt_stats_req *stats_req; 602 /* protects shared stats req buffer */ 603 spinlock_t lock; 604 }; 605 606 #define MAX_MODULE_ID_BITMAP_WORDS 16 607 608 struct ath11k_debug { 609 struct dentry *debugfs_pdev; 610 struct ath11k_dbg_htt_stats htt_stats; 611 u32 extd_tx_stats; 612 u32 extd_rx_stats; 613 u32 pktlog_filter; 614 u32 pktlog_mode; 615 u32 pktlog_peer_valid; 616 u8 pktlog_peer_addr[ETH_ALEN]; 617 u32 rx_filter; 618 u32 mem_offset; 619 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 620 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 621 }; 622 623 struct ath11k_per_peer_tx_stats { 624 u32 succ_bytes; 625 u32 retry_bytes; 626 u32 failed_bytes; 627 u16 succ_pkts; 628 u16 retry_pkts; 629 u16 failed_pkts; 630 u32 duration; 631 u8 ba_fails; 632 bool is_ampdu; 633 }; 634 635 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 636 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 637 638 struct ath11k { 639 struct ath11k_base *ab; 640 struct ath11k_pdev *pdev; 641 struct ieee80211_hw *hw; 642 struct ath11k_pdev_wmi *wmi; 643 struct ath11k_pdev_dp dp; 644 u8 mac_addr[ETH_ALEN]; 645 struct ath11k_he ar_he; 646 enum ath11k_state state; 647 bool supports_6ghz; 648 struct { 649 struct completion started; 650 struct completion completed; 651 struct completion on_channel; 652 struct delayed_work timeout; 653 enum ath11k_scan_state state; 654 bool is_roc; 655 int vdev_id; 656 int roc_freq; 657 bool roc_notify; 658 } scan; 659 660 struct { 661 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 662 struct ieee80211_sband_iftype_data 663 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 664 } mac; 665 666 unsigned long dev_flags; 667 unsigned int filter_flags; 668 unsigned long monitor_flags; 669 u32 min_tx_power; 670 u32 max_tx_power; 671 u32 txpower_limit_2g; 672 u32 txpower_limit_5g; 673 u32 txpower_scale; 674 u32 power_scale; 675 u32 chan_tx_pwr; 676 u32 num_stations; 677 u32 max_num_stations; 678 /* To synchronize concurrent synchronous mac80211 callback operations, 679 * concurrent debugfs configuration and concurrent FW statistics events. 680 */ 681 struct mutex conf_mutex; 682 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 683 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 684 * channel context data, survey info, test mode data. 685 */ 686 spinlock_t data_lock; 687 688 struct list_head arvifs; 689 /* should never be NULL; needed for regular htt rx */ 690 struct ieee80211_channel *rx_channel; 691 692 /* valid during scan; needed for mgmt rx during scan */ 693 struct ieee80211_channel *scan_channel; 694 695 u8 cfg_tx_chainmask; 696 u8 cfg_rx_chainmask; 697 u8 num_rx_chains; 698 u8 num_tx_chains; 699 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 700 u8 pdev_idx; 701 u8 lmac_id; 702 703 struct completion peer_assoc_done; 704 struct completion peer_delete_done; 705 706 int install_key_status; 707 struct completion install_key_done; 708 709 int last_wmi_vdev_start_status; 710 struct completion vdev_setup_done; 711 struct completion vdev_delete_done; 712 713 int num_peers; 714 int max_num_peers; 715 u32 num_started_vdevs; 716 u32 num_created_vdevs; 717 unsigned long long allocated_vdev_map; 718 719 struct idr txmgmt_idr; 720 /* protects txmgmt_idr data */ 721 spinlock_t txmgmt_idr_lock; 722 atomic_t num_pending_mgmt_tx; 723 wait_queue_head_t txmgmt_empty_waitq; 724 725 /* cycle count is reported twice for each visited channel during scan. 726 * access protected by data_lock 727 */ 728 u32 survey_last_rx_clear_count; 729 u32 survey_last_cycle_count; 730 731 /* Channel info events are expected to come in pairs without and with 732 * COMPLETE flag set respectively for each channel visit during scan. 733 * 734 * However there are deviations from this rule. This flag is used to 735 * avoid reporting garbage data. 736 */ 737 bool ch_info_can_report_survey; 738 struct survey_info survey[ATH11K_NUM_CHANS]; 739 struct completion bss_survey_done; 740 741 struct work_struct regd_update_work; 742 743 struct work_struct wmi_mgmt_tx_work; 744 struct sk_buff_head wmi_mgmt_tx_queue; 745 746 struct ath11k_wow wow; 747 struct completion target_suspend; 748 bool target_suspend_ack; 749 struct ath11k_per_peer_tx_stats peer_tx_stats; 750 struct list_head ppdu_stats_info; 751 u32 ppdu_stat_list_depth; 752 753 struct ath11k_per_peer_tx_stats cached_stats; 754 u32 last_ppdu_id; 755 u32 cached_ppdu_id; 756 int monitor_vdev_id; 757 struct completion fw_mode_reset; 758 u8 ftm_msgref; 759 #ifdef CONFIG_ATH11K_DEBUGFS 760 struct ath11k_debug debug; 761 #endif 762 #ifdef CONFIG_ATH11K_SPECTRAL 763 struct ath11k_spectral spectral; 764 #endif 765 bool dfs_block_radar_events; 766 struct ath11k_thermal thermal; 767 u32 vdev_id_11d_scan; 768 struct completion completed_11d_scan; 769 enum ath11k_11d_state state_11d; 770 bool regdom_set_by_user; 771 int hw_rate_code; 772 u8 twt_enabled; 773 bool nlo_enabled; 774 u8 alpha2[REG_ALPHA2_LEN + 1]; 775 struct ath11k_fw_stats fw_stats; 776 struct completion fw_stats_complete; 777 bool fw_stats_done; 778 779 /* protected by conf_mutex */ 780 bool ps_state_enable; 781 bool ps_timekeeper_enable; 782 s8 max_allowed_tx_power; 783 }; 784 785 struct ath11k_band_cap { 786 u32 phy_id; 787 u32 max_bw_supported; 788 u32 ht_cap_info; 789 u32 he_cap_info[2]; 790 u32 he_mcs; 791 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 792 struct ath11k_ppe_threshold he_ppet; 793 u16 he_6ghz_capa; 794 }; 795 796 struct ath11k_pdev_cap { 797 u32 supported_bands; 798 u32 ampdu_density; 799 u32 vht_cap; 800 u32 vht_mcs; 801 u32 he_mcs; 802 u32 tx_chain_mask; 803 u32 rx_chain_mask; 804 u32 tx_chain_mask_shift; 805 u32 rx_chain_mask_shift; 806 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 807 bool nss_ratio_enabled; 808 u8 nss_ratio_info; 809 }; 810 811 struct ath11k_pdev { 812 struct ath11k *ar; 813 u32 pdev_id; 814 struct ath11k_pdev_cap cap; 815 u8 mac_addr[ETH_ALEN]; 816 }; 817 818 struct ath11k_board_data { 819 const struct firmware *fw; 820 const void *data; 821 size_t len; 822 }; 823 824 struct ath11k_pci_ops { 825 int (*wakeup)(struct ath11k_base *ab); 826 void (*release)(struct ath11k_base *ab); 827 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector); 828 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value); 829 u32 (*window_read32)(struct ath11k_base *ab, u32 offset); 830 }; 831 832 /* IPQ8074 HW channel counters frequency value in hertz */ 833 #define IPQ8074_CC_FREQ_HERTZ 320000 834 835 struct ath11k_bp_stats { 836 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 837 u16 hp; 838 839 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 840 u16 tp; 841 842 /* Number of Backpressure events received for the ring */ 843 u32 count; 844 845 /* Last recorded event timestamp */ 846 unsigned long jiffies; 847 }; 848 849 struct ath11k_dp_ring_bp_stats { 850 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 851 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 852 }; 853 854 struct ath11k_soc_dp_tx_err_stats { 855 /* TCL Ring Descriptor unavailable */ 856 u32 desc_na[DP_TCL_NUM_RING_MAX]; 857 /* Other failures during dp_tx due to mem allocation failure 858 * idr unavailable etc. 859 */ 860 atomic_t misc_fail; 861 }; 862 863 struct ath11k_soc_dp_stats { 864 u32 err_ring_pkts; 865 u32 invalid_rbm; 866 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 867 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 868 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 869 struct ath11k_soc_dp_tx_err_stats tx_err; 870 struct ath11k_dp_ring_bp_stats bp_stats; 871 }; 872 873 struct ath11k_msi_user { 874 char *name; 875 int num_vectors; 876 u32 base_vector; 877 }; 878 879 struct ath11k_msi_config { 880 int total_vectors; 881 int total_users; 882 struct ath11k_msi_user *users; 883 u16 hw_rev; 884 }; 885 886 /* Master structure to hold the hw data which may be used in core module */ 887 struct ath11k_base { 888 enum ath11k_hw_rev hw_rev; 889 enum ath11k_firmware_mode fw_mode; 890 struct platform_device *pdev; 891 struct device *dev; 892 struct ath11k_qmi qmi; 893 struct ath11k_wmi_base wmi_ab; 894 struct completion fw_ready; 895 int num_radios; 896 /* HW channel counters frequency value in hertz common to all MACs */ 897 u32 cc_freq_hz; 898 899 struct ath11k_htc htc; 900 901 struct ath11k_dp dp; 902 903 void __iomem *mem; 904 void __iomem *mem_ce; 905 unsigned long mem_len; 906 907 struct { 908 enum ath11k_bus bus; 909 const struct ath11k_hif_ops *ops; 910 } hif; 911 912 struct { 913 struct completion wakeup_completed; 914 } wow; 915 916 struct ath11k_ce ce; 917 struct timer_list rx_replenish_retry; 918 struct ath11k_hal hal; 919 /* To synchronize core_start/core_stop */ 920 struct mutex core_lock; 921 /* Protects data like peers */ 922 spinlock_t base_lock; 923 struct ath11k_pdev pdevs[MAX_RADIOS]; 924 struct { 925 enum WMI_HOST_WLAN_BAND supported_bands; 926 u32 pdev_id; 927 } target_pdev_ids[MAX_RADIOS]; 928 u8 target_pdev_count; 929 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 930 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 931 unsigned long long free_vdev_map; 932 933 /* To synchronize rhash tbl write operation */ 934 struct mutex tbl_mtx_lock; 935 936 /* The rhashtable containing struct ath11k_peer keyed by mac addr */ 937 struct rhashtable *rhead_peer_addr; 938 struct rhashtable_params rhash_peer_addr_param; 939 940 /* The rhashtable containing struct ath11k_peer keyed by id */ 941 struct rhashtable *rhead_peer_id; 942 struct rhashtable_params rhash_peer_id_param; 943 944 struct list_head peers; 945 wait_queue_head_t peer_mapping_wq; 946 u8 mac_addr[ETH_ALEN]; 947 int irq_num[ATH11K_IRQ_NUM_MAX]; 948 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 949 struct ath11k_targ_cap target_caps; 950 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 951 bool pdevs_macaddr_valid; 952 953 struct ath11k_hw_params hw_params; 954 955 const struct firmware *cal_file; 956 957 /* Below regd's are protected by ab->data_lock */ 958 /* This is the regd set for every radio 959 * by the firmware during initialization 960 */ 961 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 962 /* This regd is set during dynamic country setting 963 * This may or may not be used during the runtime 964 */ 965 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 966 struct cur_regulatory_info *reg_info_store; 967 968 /* Current DFS Regulatory */ 969 enum ath11k_dfs_region dfs_region; 970 #ifdef CONFIG_ATH11K_DEBUGFS 971 struct dentry *debugfs_soc; 972 #endif 973 struct ath11k_soc_dp_stats soc_stats; 974 975 unsigned long dev_flags; 976 struct completion driver_recovery; 977 struct workqueue_struct *workqueue; 978 struct work_struct restart_work; 979 struct work_struct update_11d_work; 980 u8 new_alpha2[3]; 981 struct workqueue_struct *workqueue_aux; 982 struct work_struct reset_work; 983 atomic_t reset_count; 984 atomic_t recovery_count; 985 atomic_t recovery_start_count; 986 bool is_reset; 987 struct completion reset_complete; 988 struct completion reconfigure_complete; 989 struct completion recovery_start; 990 /* continuous recovery fail count */ 991 atomic_t fail_cont_count; 992 unsigned long reset_fail_timeout; 993 struct { 994 /* protected by data_lock */ 995 u32 fw_crash_counter; 996 } stats; 997 u32 pktlog_defs_checksum; 998 999 struct ath11k_dbring_cap *db_caps; 1000 u32 num_db_cap; 1001 1002 /* To synchronize 11d scan vdev id */ 1003 struct mutex vdev_id_11d_lock; 1004 struct timer_list mon_reap_timer; 1005 1006 struct completion htc_suspend; 1007 1008 struct { 1009 enum ath11k_bdf_search bdf_search; 1010 u32 vendor; 1011 u32 device; 1012 u32 subsystem_vendor; 1013 u32 subsystem_device; 1014 } id; 1015 1016 struct { 1017 struct { 1018 const struct ath11k_msi_config *config; 1019 u32 ep_base_data; 1020 u32 irqs[32]; 1021 u32 addr_lo; 1022 u32 addr_hi; 1023 } msi; 1024 1025 const struct ath11k_pci_ops *ops; 1026 } pci; 1027 1028 struct { 1029 u32 api_version; 1030 1031 const struct firmware *fw; 1032 const u8 *amss_data; 1033 size_t amss_len; 1034 const u8 *m3_data; 1035 size_t m3_len; 1036 1037 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT); 1038 } fw; 1039 1040 #ifdef CONFIG_NL80211_TESTMODE 1041 struct { 1042 u32 data_pos; 1043 u32 expected_seq; 1044 u8 *eventdata; 1045 } testmode; 1046 #endif 1047 1048 /* must be last */ 1049 u8 drv_priv[] __aligned(sizeof(void *)); 1050 }; 1051 1052 struct ath11k_fw_stats_pdev { 1053 struct list_head list; 1054 1055 /* PDEV stats */ 1056 s32 ch_noise_floor; 1057 /* Cycles spent transmitting frames */ 1058 u32 tx_frame_count; 1059 /* Cycles spent receiving frames */ 1060 u32 rx_frame_count; 1061 /* Total channel busy time, evidently */ 1062 u32 rx_clear_count; 1063 /* Total on-channel time */ 1064 u32 cycle_count; 1065 u32 phy_err_count; 1066 u32 chan_tx_power; 1067 u32 ack_rx_bad; 1068 u32 rts_bad; 1069 u32 rts_good; 1070 u32 fcs_bad; 1071 u32 no_beacons; 1072 u32 mib_int_count; 1073 1074 /* PDEV TX stats */ 1075 /* Num HTT cookies queued to dispatch list */ 1076 s32 comp_queued; 1077 /* Num HTT cookies dispatched */ 1078 s32 comp_delivered; 1079 /* Num MSDU queued to WAL */ 1080 s32 msdu_enqued; 1081 /* Num MPDU queue to WAL */ 1082 s32 mpdu_enqued; 1083 /* Num MSDUs dropped by WMM limit */ 1084 s32 wmm_drop; 1085 /* Num Local frames queued */ 1086 s32 local_enqued; 1087 /* Num Local frames done */ 1088 s32 local_freed; 1089 /* Num queued to HW */ 1090 s32 hw_queued; 1091 /* Num PPDU reaped from HW */ 1092 s32 hw_reaped; 1093 /* Num underruns */ 1094 s32 underrun; 1095 /* Num hw paused */ 1096 u32 hw_paused; 1097 /* Num PPDUs cleaned up in TX abort */ 1098 s32 tx_abort; 1099 /* Num MPDUs requeued by SW */ 1100 s32 mpdus_requeued; 1101 /* excessive retries */ 1102 u32 tx_ko; 1103 u32 tx_xretry; 1104 /* data hw rate code */ 1105 u32 data_rc; 1106 /* Scheduler self triggers */ 1107 u32 self_triggers; 1108 /* frames dropped due to excessive sw retries */ 1109 u32 sw_retry_failure; 1110 /* illegal rate phy errors */ 1111 u32 illgl_rate_phy_err; 1112 /* wal pdev continuous xretry */ 1113 u32 pdev_cont_xretry; 1114 /* wal pdev tx timeouts */ 1115 u32 pdev_tx_timeout; 1116 /* wal pdev resets */ 1117 u32 pdev_resets; 1118 /* frames dropped due to non-availability of stateless TIDs */ 1119 u32 stateless_tid_alloc_failure; 1120 /* PhY/BB underrun */ 1121 u32 phy_underrun; 1122 /* MPDU is more than txop limit */ 1123 u32 txop_ovf; 1124 /* Num sequences posted */ 1125 u32 seq_posted; 1126 /* Num sequences failed in queueing */ 1127 u32 seq_failed_queueing; 1128 /* Num sequences completed */ 1129 u32 seq_completed; 1130 /* Num sequences restarted */ 1131 u32 seq_restarted; 1132 /* Num of MU sequences posted */ 1133 u32 mu_seq_posted; 1134 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 1135 * (Reset,channel change) 1136 */ 1137 s32 mpdus_sw_flush; 1138 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 1139 s32 mpdus_hw_filter; 1140 /* Num MPDUs truncated by PDG (TXOP, TBTT, 1141 * PPDU_duration based on rate, dyn_bw) 1142 */ 1143 s32 mpdus_truncated; 1144 /* Num MPDUs that was tried but didn't receive ACK or BA */ 1145 s32 mpdus_ack_failed; 1146 /* Num MPDUs that was dropped du to expiry. */ 1147 s32 mpdus_expired; 1148 1149 /* PDEV RX stats */ 1150 /* Cnts any change in ring routing mid-ppdu */ 1151 s32 mid_ppdu_route_change; 1152 /* Total number of statuses processed */ 1153 s32 status_rcvd; 1154 /* Extra frags on rings 0-3 */ 1155 s32 r0_frags; 1156 s32 r1_frags; 1157 s32 r2_frags; 1158 s32 r3_frags; 1159 /* MSDUs / MPDUs delivered to HTT */ 1160 s32 htt_msdus; 1161 s32 htt_mpdus; 1162 /* MSDUs / MPDUs delivered to local stack */ 1163 s32 loc_msdus; 1164 s32 loc_mpdus; 1165 /* AMSDUs that have more MSDUs than the status ring size */ 1166 s32 oversize_amsdu; 1167 /* Number of PHY errors */ 1168 s32 phy_errs; 1169 /* Number of PHY errors drops */ 1170 s32 phy_err_drop; 1171 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 1172 s32 mpdu_errs; 1173 /* Num overflow errors */ 1174 s32 rx_ovfl_errs; 1175 }; 1176 1177 struct ath11k_fw_stats_vdev { 1178 struct list_head list; 1179 1180 u32 vdev_id; 1181 u32 beacon_snr; 1182 u32 data_snr; 1183 u32 num_tx_frames[WLAN_MAX_AC]; 1184 u32 num_rx_frames; 1185 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1186 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1187 u32 num_rts_fail; 1188 u32 num_rts_success; 1189 u32 num_rx_err; 1190 u32 num_rx_discard; 1191 u32 num_tx_not_acked; 1192 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1193 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1194 }; 1195 1196 struct ath11k_fw_stats_bcn { 1197 struct list_head list; 1198 1199 u32 vdev_id; 1200 u32 tx_bcn_succ_cnt; 1201 u32 tx_bcn_outage_cnt; 1202 }; 1203 1204 void ath11k_fw_stats_init(struct ath11k *ar); 1205 void ath11k_fw_stats_pdevs_free(struct list_head *head); 1206 void ath11k_fw_stats_vdevs_free(struct list_head *head); 1207 void ath11k_fw_stats_bcn_free(struct list_head *head); 1208 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats); 1209 1210 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 1211 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 1212 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 1213 1214 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 1215 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 1216 1217 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[]; 1218 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[]; 1219 1220 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 1221 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 1222 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 1223 int ath11k_core_pre_init(struct ath11k_base *ab); 1224 int ath11k_core_init(struct ath11k_base *ath11k); 1225 void ath11k_core_deinit(struct ath11k_base *ath11k); 1226 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1227 enum ath11k_bus bus); 1228 void ath11k_core_free(struct ath11k_base *ath11k); 1229 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1230 struct ath11k_board_data *bd); 1231 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1232 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1233 struct ath11k_board_data *bd, 1234 const char *name); 1235 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1236 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1237 int ath11k_core_check_smbios(struct ath11k_base *ab); 1238 void ath11k_core_halt(struct ath11k *ar); 1239 int ath11k_core_resume(struct ath11k_base *ab); 1240 int ath11k_core_suspend(struct ath11k_base *ab); 1241 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1242 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); 1243 1244 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1245 const char *filename); 1246 1247 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1248 { 1249 switch (state) { 1250 case ATH11K_SCAN_IDLE: 1251 return "idle"; 1252 case ATH11K_SCAN_STARTING: 1253 return "starting"; 1254 case ATH11K_SCAN_RUNNING: 1255 return "running"; 1256 case ATH11K_SCAN_ABORTING: 1257 return "aborting"; 1258 } 1259 1260 return "unknown"; 1261 } 1262 1263 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1264 { 1265 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1266 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1267 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1268 } 1269 1270 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1271 { 1272 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1273 return (struct ath11k_skb_rxcb *)skb->cb; 1274 } 1275 1276 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1277 { 1278 return (struct ath11k_vif *)vif->drv_priv; 1279 } 1280 1281 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta) 1282 { 1283 return (struct ath11k_sta *)sta->drv_priv; 1284 } 1285 1286 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1287 int mac_id) 1288 { 1289 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1290 } 1291 1292 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1293 const char *filename, 1294 void *buf, size_t buf_len) 1295 { 1296 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1297 ab->hw_params.fw.dir, filename); 1298 } 1299 1300 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1301 { 1302 switch (bus) { 1303 case ATH11K_BUS_PCI: 1304 return "pci"; 1305 case ATH11K_BUS_AHB: 1306 return "ahb"; 1307 } 1308 1309 return "unknown"; 1310 } 1311 1312 #endif /* _CORE_H_ */ 1313