1 /* SPDX-License-Identifier: BSD-3-Clause-Clear */ 2 /* 3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 4 * Copyright (c) 2021-2025 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef ATH11K_CORE_H 8 #define ATH11K_CORE_H 9 10 #include <linux/types.h> 11 #include <linux/interrupt.h> 12 #include <linux/irq.h> 13 #include <linux/bitfield.h> 14 #include <linux/dmi.h> 15 #include <linux/ctype.h> 16 #include <linux/rhashtable.h> 17 #include <linux/average.h> 18 #include <linux/firmware.h> 19 #include <linux/suspend.h> 20 #include <linux/of.h> 21 22 #include "qmi.h" 23 #include "htc.h" 24 #include "wmi.h" 25 #include "hal.h" 26 #include "dp.h" 27 #include "ce.h" 28 #include "mac.h" 29 #include "hw.h" 30 #include "hal_rx.h" 31 #include "reg.h" 32 #include "thermal.h" 33 #include "dbring.h" 34 #include "spectral.h" 35 #include "wow.h" 36 #include "fw.h" 37 #include "coredump.h" 38 39 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 40 41 #define ATH11K_TX_MGMT_NUM_PENDING_MAX 512 42 43 #define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64 44 45 /* Pending management packets threshold for dropping probe responses */ 46 #define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4) 47 48 #define ATH11K_INVALID_HW_MAC_ID 0xFF 49 #define ATH11K_CONNECTION_LOSS_HZ (3 * HZ) 50 51 /* SMBIOS type containing Board Data File Name Extension */ 52 #define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8 53 54 /* SMBIOS type structure length (excluding strings-set) */ 55 #define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9 56 57 /* The magic used by QCA spec */ 58 #define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_" 59 60 extern unsigned int ath11k_frame_mode; 61 extern bool ath11k_ftm_mode; 62 63 #define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ) 64 65 #define ATH11K_MON_TIMER_INTERVAL 10 66 #define ATH11K_RESET_TIMEOUT_HZ (20 * HZ) 67 #define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3 68 #define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5 69 #define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ) 70 #define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ) 71 #define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ) 72 73 enum ath11k_supported_bw { 74 ATH11K_BW_20 = 0, 75 ATH11K_BW_40 = 1, 76 ATH11K_BW_80 = 2, 77 ATH11K_BW_160 = 3, 78 }; 79 80 enum ath11k_bdf_search { 81 ATH11K_BDF_SEARCH_DEFAULT, 82 ATH11K_BDF_SEARCH_BUS_AND_BOARD, 83 }; 84 85 enum wme_ac { 86 WME_AC_BE, 87 WME_AC_BK, 88 WME_AC_VI, 89 WME_AC_VO, 90 WME_NUM_AC 91 }; 92 93 #define ATH11K_HT_MCS_MAX 7 94 #define ATH11K_VHT_MCS_MAX 9 95 #define ATH11K_HE_MCS_MAX 11 96 97 enum ath11k_crypt_mode { 98 /* Only use hardware crypto engine */ 99 ATH11K_CRYPT_MODE_HW, 100 /* Only use software crypto */ 101 ATH11K_CRYPT_MODE_SW, 102 }; 103 104 static inline enum wme_ac ath11k_tid_to_ac(u32 tid) 105 { 106 return (((tid == 0) || (tid == 3)) ? WME_AC_BE : 107 ((tid == 1) || (tid == 2)) ? WME_AC_BK : 108 ((tid == 4) || (tid == 5)) ? WME_AC_VI : 109 WME_AC_VO); 110 } 111 112 enum ath11k_skb_flags { 113 ATH11K_SKB_HW_80211_ENCAP = BIT(0), 114 ATH11K_SKB_CIPHER_SET = BIT(1), 115 }; 116 117 struct ath11k_skb_cb { 118 dma_addr_t paddr; 119 u8 eid; 120 u8 flags; 121 u32 cipher; 122 struct ath11k *ar; 123 struct ieee80211_vif *vif; 124 } __packed; 125 126 struct ath11k_skb_rxcb { 127 dma_addr_t paddr; 128 bool is_first_msdu; 129 bool is_last_msdu; 130 bool is_continuation; 131 bool is_mcbc; 132 bool is_eapol; 133 struct hal_rx_desc *rx_desc; 134 u8 err_rel_src; 135 u8 err_code; 136 u8 mac_id; 137 u8 unmapped; 138 u8 is_frag; 139 u8 tid; 140 u16 peer_id; 141 u16 seq_no; 142 }; 143 144 enum ath11k_hw_rev { 145 ATH11K_HW_IPQ8074, 146 ATH11K_HW_QCA6390_HW20, 147 ATH11K_HW_IPQ6018_HW10, 148 ATH11K_HW_QCN9074_HW10, 149 ATH11K_HW_WCN6855_HW20, 150 ATH11K_HW_WCN6855_HW21, 151 ATH11K_HW_WCN6750_HW10, 152 ATH11K_HW_IPQ5018_HW10, 153 ATH11K_HW_QCA2066_HW21, 154 ATH11K_HW_QCA6698AQ_HW21, 155 }; 156 157 enum ath11k_firmware_mode { 158 /* the default mode, standard 802.11 functionality */ 159 ATH11K_FIRMWARE_MODE_NORMAL, 160 161 /* factory tests etc */ 162 ATH11K_FIRMWARE_MODE_FTM, 163 164 /* Cold boot calibration */ 165 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7, 166 }; 167 168 extern bool ath11k_cold_boot_cal; 169 170 #define ATH11K_IRQ_NUM_MAX 52 171 #define ATH11K_EXT_IRQ_NUM_MAX 16 172 173 struct ath11k_ext_irq_grp { 174 struct ath11k_base *ab; 175 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX]; 176 u32 num_irq; 177 u32 grp_id; 178 u64 timestamp; 179 bool napi_enabled; 180 struct napi_struct napi; 181 struct net_device *napi_ndev; 182 }; 183 184 enum ath11k_smbios_cc_type { 185 /* disable country code setting from SMBIOS */ 186 ATH11K_SMBIOS_CC_DISABLE = 0, 187 188 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */ 189 ATH11K_SMBIOS_CC_ISO = 1, 190 191 /* worldwide regdomain */ 192 ATH11K_SMBIOS_CC_WW = 2, 193 }; 194 195 struct ath11k_smbios_bdf { 196 struct dmi_header hdr; 197 198 u8 features_disabled; 199 200 /* enum ath11k_smbios_cc_type */ 201 u8 country_code_flag; 202 203 /* To set specific country, you need to set country code 204 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United 205 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'= 206 * 0x53). To set country to INDONESIA, then country code value = 207 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag = 208 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory 209 * setting. 210 */ 211 u16 cc_code; 212 213 u8 bdf_enabled; 214 u8 bdf_ext[]; 215 } __packed; 216 217 #define HEHANDLE_CAP_PHYINFO_SIZE 3 218 #define HECAP_PHYINFO_SIZE 9 219 #define HECAP_MACINFO_SIZE 5 220 #define HECAP_TXRX_MCS_NSS_SIZE 2 221 #define HECAP_PPET16_PPET8_MAX_SIZE 25 222 223 #define HE_PPET16_PPET8_SIZE 8 224 225 /* 802.11ax PPE (PPDU packet Extension) threshold */ 226 struct he_ppe_threshold { 227 u32 numss_m1; 228 u32 ru_mask; 229 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE]; 230 }; 231 232 struct ath11k_he { 233 u8 hecap_macinfo[HECAP_MACINFO_SIZE]; 234 u32 hecap_rxmcsnssmap; 235 u32 hecap_txmcsnssmap; 236 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE]; 237 struct he_ppe_threshold hecap_ppet; 238 u32 heop_param; 239 }; 240 241 #define MAX_RADIOS 3 242 243 /* ipq5018 hw param macros */ 244 #define MAX_RADIOS_5018 1 245 #define CE_CNT_5018 6 246 #define TARGET_CE_CNT_5018 9 247 #define SVC_CE_MAP_LEN_5018 17 248 #define RXDMA_PER_PDEV_5018 1 249 250 enum { 251 WMI_HOST_TP_SCALE_MAX = 0, 252 WMI_HOST_TP_SCALE_50 = 1, 253 WMI_HOST_TP_SCALE_25 = 2, 254 WMI_HOST_TP_SCALE_12 = 3, 255 WMI_HOST_TP_SCALE_MIN = 4, 256 WMI_HOST_TP_SCALE_SIZE = 5, 257 }; 258 259 enum ath11k_scan_state { 260 ATH11K_SCAN_IDLE, 261 ATH11K_SCAN_STARTING, 262 ATH11K_SCAN_RUNNING, 263 ATH11K_SCAN_ABORTING, 264 }; 265 266 enum ath11k_11d_state { 267 ATH11K_11D_IDLE, 268 ATH11K_11D_PREPARING, 269 ATH11K_11D_RUNNING, 270 }; 271 272 enum ath11k_dev_flags { 273 ATH11K_CAC_RUNNING, 274 ATH11K_FLAG_CORE_REGISTERED, 275 ATH11K_FLAG_CRASH_FLUSH, 276 ATH11K_FLAG_RAW_MODE, 277 ATH11K_FLAG_HW_CRYPTO_DISABLED, 278 ATH11K_FLAG_BTCOEX, 279 ATH11K_FLAG_RECOVERY, 280 ATH11K_FLAG_UNREGISTERING, 281 ATH11K_FLAG_REGISTERED, 282 ATH11K_FLAG_QMI_FAIL, 283 ATH11K_FLAG_HTC_SUSPEND_COMPLETE, 284 ATH11K_FLAG_CE_IRQ_ENABLED, 285 ATH11K_FLAG_EXT_IRQ_ENABLED, 286 ATH11K_FLAG_FIXED_MEM_RGN, 287 ATH11K_FLAG_DEVICE_INIT_DONE, 288 ATH11K_FLAG_MULTI_MSI_VECTORS, 289 ATH11K_FLAG_FTM_SEGMENTED, 290 }; 291 292 enum ath11k_monitor_flags { 293 ATH11K_FLAG_MONITOR_CONF_ENABLED, 294 ATH11K_FLAG_MONITOR_STARTED, 295 ATH11K_FLAG_MONITOR_VDEV_CREATED, 296 }; 297 298 #define ATH11K_IPV6_UC_TYPE 0 299 #define ATH11K_IPV6_AC_TYPE 1 300 301 #define ATH11K_IPV6_MAX_COUNT 16 302 #define ATH11K_IPV4_MAX_COUNT 2 303 304 struct ath11k_arp_ns_offload { 305 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4]; 306 u32 ipv4_count; 307 u32 ipv6_count; 308 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 309 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16]; 310 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT]; 311 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT]; 312 u8 mac_addr[ETH_ALEN]; 313 }; 314 315 struct ath11k_rekey_data { 316 u8 kck[NL80211_KCK_LEN]; 317 u8 kek[NL80211_KCK_LEN]; 318 u64 replay_ctr; 319 bool enable_offload; 320 }; 321 322 /** 323 * struct ath11k_chan_power_info - TPE containing power info per channel chunk 324 * @chan_cfreq: channel center freq (MHz) 325 * e.g. 326 * channel 37/20 MHz, it is 6135 327 * channel 37/40 MHz, it is 6125 328 * channel 37/80 MHz, it is 6145 329 * channel 37/160 MHz, it is 6185 330 * @tx_power: transmit power (dBm) 331 */ 332 struct ath11k_chan_power_info { 333 u16 chan_cfreq; 334 s8 tx_power; 335 }; 336 337 /* ath11k only deals with 160 MHz, so 8 subchannels */ 338 #define ATH11K_NUM_PWR_LEVELS 8 339 340 /** 341 * struct ath11k_reg_tpc_power_info - regulatory TPC power info 342 * @is_psd_power: is PSD power or not 343 * @eirp_power: Maximum EIRP power (dBm), valid only if power is PSD 344 * @ap_power_type: type of power (SP/LPI/VLP) 345 * @num_pwr_levels: number of power levels 346 * @reg_max: Array of maximum TX power (dBm) per PSD value 347 * @tpe: TPE values processed from TPE IE 348 * @chan_power_info: power info to send to firmware 349 */ 350 struct ath11k_reg_tpc_power_info { 351 bool is_psd_power; 352 u8 eirp_power; 353 enum wmi_reg_6ghz_ap_type ap_power_type; 354 u8 num_pwr_levels; 355 u8 reg_max[ATH11K_NUM_PWR_LEVELS]; 356 s8 tpe[ATH11K_NUM_PWR_LEVELS]; 357 struct ath11k_chan_power_info chan_power_info[ATH11K_NUM_PWR_LEVELS]; 358 }; 359 360 struct ath11k_vif { 361 u32 vdev_id; 362 enum wmi_vdev_type vdev_type; 363 enum wmi_vdev_subtype vdev_subtype; 364 u32 beacon_interval; 365 u32 dtim_period; 366 u16 ast_hash; 367 u16 ast_idx; 368 u16 tcl_metadata; 369 u8 hal_addr_search_flags; 370 u8 search_type; 371 372 struct ath11k *ar; 373 struct ieee80211_vif *vif; 374 375 struct wmi_wmm_params_all_arg wmm_params; 376 struct wmi_wmm_params_all_arg muedca_params; 377 struct list_head list; 378 union { 379 struct { 380 u32 uapsd; 381 } sta; 382 struct { 383 /* 127 stations; wmi limit */ 384 u8 tim_bitmap[16]; 385 u8 tim_len; 386 u32 ssid_len; 387 u8 ssid[IEEE80211_MAX_SSID_LEN]; 388 bool hidden_ssid; 389 /* P2P_IE with NoA attribute for P2P_GO case */ 390 u32 noa_len; 391 u8 *noa_data; 392 } ap; 393 } u; 394 395 bool is_started; 396 bool is_up; 397 bool ftm_responder; 398 bool spectral_enabled; 399 bool ps; 400 u32 aid; 401 u8 bssid[ETH_ALEN]; 402 struct cfg80211_bitrate_mask bitrate_mask; 403 struct delayed_work connection_loss_work; 404 struct work_struct bcn_tx_work; 405 int num_legacy_stations; 406 int rtscts_prot_mode; 407 int txpower; 408 bool rsnie_present; 409 bool wpaie_present; 410 bool bcca_zero_sent; 411 bool do_not_send_tmpl; 412 struct ath11k_arp_ns_offload arp_ns_offload; 413 struct ath11k_rekey_data rekey_data; 414 u32 num_stations; 415 bool reinstall_group_keys; 416 417 struct ath11k_reg_tpc_power_info reg_tpc_info; 418 419 /* Must be last - ends in a flexible-array member. 420 * 421 * FIXME: Driver should not copy struct ieee80211_chanctx_conf, 422 * especially because it has a flexible array. Find a better way. 423 */ 424 struct ieee80211_chanctx_conf chanctx; 425 }; 426 427 struct ath11k_vif_iter { 428 u32 vdev_id; 429 struct ath11k_vif *arvif; 430 }; 431 432 struct ath11k_rx_peer_stats { 433 u64 num_msdu; 434 u64 num_mpdu_fcs_ok; 435 u64 num_mpdu_fcs_err; 436 u64 tcp_msdu_count; 437 u64 udp_msdu_count; 438 u64 other_msdu_count; 439 u64 ampdu_msdu_count; 440 u64 non_ampdu_msdu_count; 441 u64 stbc_count; 442 u64 beamformed_count; 443 u64 mcs_count[HAL_RX_MAX_MCS + 1]; 444 u64 nss_count[HAL_RX_MAX_NSS]; 445 u64 bw_count[HAL_RX_BW_MAX]; 446 u64 gi_count[HAL_RX_GI_MAX]; 447 u64 coding_count[HAL_RX_SU_MU_CODING_MAX]; 448 u64 tid_count[IEEE80211_NUM_TIDS + 1]; 449 u64 pream_cnt[HAL_RX_PREAMBLE_MAX]; 450 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX]; 451 u64 rx_duration; 452 u64 dcm_count; 453 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX]; 454 }; 455 456 #define ATH11K_HE_MCS_NUM 12 457 #define ATH11K_VHT_MCS_NUM 10 458 #define ATH11K_BW_NUM 4 459 #define ATH11K_NSS_NUM 4 460 #define ATH11K_LEGACY_NUM 12 461 #define ATH11K_GI_NUM 4 462 #define ATH11K_HT_MCS_NUM 32 463 464 enum ath11k_pkt_rx_err { 465 ATH11K_PKT_RX_ERR_FCS, 466 ATH11K_PKT_RX_ERR_TKIP, 467 ATH11K_PKT_RX_ERR_CRYPT, 468 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL, 469 ATH11K_PKT_RX_ERR_MAX, 470 }; 471 472 enum ath11k_ampdu_subfrm_num { 473 ATH11K_AMPDU_SUBFRM_NUM_10, 474 ATH11K_AMPDU_SUBFRM_NUM_20, 475 ATH11K_AMPDU_SUBFRM_NUM_30, 476 ATH11K_AMPDU_SUBFRM_NUM_40, 477 ATH11K_AMPDU_SUBFRM_NUM_50, 478 ATH11K_AMPDU_SUBFRM_NUM_60, 479 ATH11K_AMPDU_SUBFRM_NUM_MORE, 480 ATH11K_AMPDU_SUBFRM_NUM_MAX, 481 }; 482 483 enum ath11k_amsdu_subfrm_num { 484 ATH11K_AMSDU_SUBFRM_NUM_1, 485 ATH11K_AMSDU_SUBFRM_NUM_2, 486 ATH11K_AMSDU_SUBFRM_NUM_3, 487 ATH11K_AMSDU_SUBFRM_NUM_4, 488 ATH11K_AMSDU_SUBFRM_NUM_MORE, 489 ATH11K_AMSDU_SUBFRM_NUM_MAX, 490 }; 491 492 enum ath11k_counter_type { 493 ATH11K_COUNTER_TYPE_BYTES, 494 ATH11K_COUNTER_TYPE_PKTS, 495 ATH11K_COUNTER_TYPE_MAX, 496 }; 497 498 enum ath11k_stats_type { 499 ATH11K_STATS_TYPE_SUCC, 500 ATH11K_STATS_TYPE_FAIL, 501 ATH11K_STATS_TYPE_RETRY, 502 ATH11K_STATS_TYPE_AMPDU, 503 ATH11K_STATS_TYPE_MAX, 504 }; 505 506 struct ath11k_htt_data_stats { 507 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM]; 508 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM]; 509 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM]; 510 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM]; 511 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM]; 512 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM]; 513 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM]; 514 }; 515 516 struct ath11k_htt_tx_stats { 517 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX]; 518 u64 tx_duration; 519 u64 ba_fails; 520 u64 ack_fails; 521 }; 522 523 struct ath11k_per_ppdu_tx_stats { 524 u16 succ_pkts; 525 u16 failed_pkts; 526 u16 retry_pkts; 527 u32 succ_bytes; 528 u32 failed_bytes; 529 u32 retry_bytes; 530 }; 531 532 DECLARE_EWMA(avg_rssi, 10, 8) 533 534 struct ath11k_sta { 535 struct ath11k_vif *arvif; 536 537 /* the following are protected by ar->data_lock */ 538 u32 changed; /* IEEE80211_RC_* */ 539 u32 bw; 540 u32 nss; 541 u32 smps; 542 enum hal_pn_type pn_type; 543 544 struct work_struct update_wk; 545 struct work_struct set_4addr_wk; 546 struct rate_info txrate; 547 u32 peer_nss; 548 struct rate_info last_txrate; 549 u64 rx_duration; 550 u64 tx_duration; 551 u8 rssi_comb; 552 struct ewma_avg_rssi avg_rssi; 553 s8 rssi_beacon; 554 s8 chain_signal[IEEE80211_MAX_CHAINS]; 555 struct ath11k_htt_tx_stats *tx_stats; 556 struct ath11k_rx_peer_stats *rx_stats; 557 558 #ifdef CONFIG_MAC80211_DEBUGFS 559 /* protected by conf_mutex */ 560 bool aggr_mode; 561 #endif 562 563 bool use_4addr_set; 564 u16 tcl_metadata; 565 566 /* Protected with ar->data_lock */ 567 enum ath11k_wmi_peer_ps_state peer_ps_state; 568 u64 ps_start_time; 569 u64 ps_start_jiffies; 570 u64 ps_total_duration; 571 bool peer_current_ps_valid; 572 573 u32 bw_prev; 574 }; 575 576 #define ATH11K_MIN_5G_FREQ 4150 577 #define ATH11K_MIN_6G_FREQ 5925 578 #define ATH11K_MAX_6G_FREQ 7115 579 #define ATH11K_NUM_CHANS 102 580 #define ATH11K_MAX_5G_CHAN 177 581 582 enum ath11k_state { 583 ATH11K_STATE_OFF, 584 ATH11K_STATE_ON, 585 ATH11K_STATE_RESTARTING, 586 ATH11K_STATE_RESTARTED, 587 ATH11K_STATE_WEDGED, 588 ATH11K_STATE_FTM, 589 /* Add other states as required */ 590 }; 591 592 /* Antenna noise floor */ 593 #define ATH11K_DEFAULT_NOISE_FLOOR -95 594 595 #define ATH11K_INVALID_RSSI_FULL -1 596 597 #define ATH11K_INVALID_RSSI_EMPTY -128 598 599 struct ath11k_fw_stats { 600 struct dentry *debugfs_fwstats; 601 u32 pdev_id; 602 u32 stats_id; 603 struct list_head pdevs; 604 struct list_head vdevs; 605 struct list_head bcn; 606 u32 num_vdev_recvd; 607 u32 num_bcn_recvd; 608 }; 609 610 struct ath11k_dbg_htt_stats { 611 u8 type; 612 u8 reset; 613 struct debug_htt_stats_req *stats_req; 614 /* protects shared stats req buffer */ 615 spinlock_t lock; 616 }; 617 618 #define MAX_MODULE_ID_BITMAP_WORDS 16 619 620 struct ath11k_debug { 621 struct dentry *debugfs_pdev; 622 struct ath11k_dbg_htt_stats htt_stats; 623 u32 extd_tx_stats; 624 u32 extd_rx_stats; 625 u32 pktlog_filter; 626 u32 pktlog_mode; 627 u32 pktlog_peer_valid; 628 u8 pktlog_peer_addr[ETH_ALEN]; 629 u32 rx_filter; 630 u32 mem_offset; 631 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS]; 632 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX]; 633 }; 634 635 struct ath11k_per_peer_tx_stats { 636 u32 succ_bytes; 637 u32 retry_bytes; 638 u32 failed_bytes; 639 u16 succ_pkts; 640 u16 retry_pkts; 641 u16 failed_pkts; 642 u32 duration; 643 u8 ba_fails; 644 bool is_ampdu; 645 }; 646 647 #define ATH11K_FLUSH_TIMEOUT (5 * HZ) 648 #define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ) 649 650 struct ath11k { 651 struct ath11k_base *ab; 652 struct ath11k_pdev *pdev; 653 struct ieee80211_hw *hw; 654 struct ath11k_pdev_wmi *wmi; 655 struct ath11k_pdev_dp dp; 656 u8 mac_addr[ETH_ALEN]; 657 struct ath11k_he ar_he; 658 enum ath11k_state state; 659 bool supports_6ghz; 660 struct { 661 struct completion started; 662 struct completion completed; 663 struct completion on_channel; 664 struct delayed_work timeout; 665 enum ath11k_scan_state state; 666 bool is_roc; 667 int vdev_id; 668 int roc_freq; 669 bool roc_notify; 670 } scan; 671 672 struct { 673 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 674 struct ieee80211_sband_iftype_data 675 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES]; 676 } mac; 677 678 unsigned long dev_flags; 679 unsigned int filter_flags; 680 unsigned long monitor_flags; 681 u32 min_tx_power; 682 u32 max_tx_power; 683 u32 txpower_limit_2g; 684 u32 txpower_limit_5g; 685 u32 txpower_scale; 686 u32 power_scale; 687 u32 chan_tx_pwr; 688 u32 num_stations; 689 u32 max_num_stations; 690 /* To synchronize concurrent synchronous mac80211 callback operations, 691 * concurrent debugfs configuration and concurrent FW statistics events. 692 */ 693 struct mutex conf_mutex; 694 /* protects the radio specific data like debug stats, ppdu_stats_info stats, 695 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info, 696 * channel context data, survey info, test mode data, channel_update_queue. 697 */ 698 spinlock_t data_lock; 699 700 struct list_head arvifs; 701 /* should never be NULL; needed for regular htt rx */ 702 struct ieee80211_channel *rx_channel; 703 704 /* valid during scan; needed for mgmt rx during scan */ 705 struct ieee80211_channel *scan_channel; 706 707 u8 cfg_tx_chainmask; 708 u8 cfg_rx_chainmask; 709 u8 num_rx_chains; 710 u8 num_tx_chains; 711 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */ 712 u8 pdev_idx; 713 u8 lmac_id; 714 715 struct completion peer_assoc_done; 716 struct completion peer_delete_done; 717 718 int install_key_status; 719 struct completion install_key_done; 720 721 int last_wmi_vdev_start_status; 722 struct completion vdev_setup_done; 723 struct completion vdev_delete_done; 724 725 int num_peers; 726 int max_num_peers; 727 u32 num_started_vdevs; 728 u32 num_created_vdevs; 729 unsigned long long allocated_vdev_map; 730 731 struct idr txmgmt_idr; 732 /* protects txmgmt_idr data */ 733 spinlock_t txmgmt_idr_lock; 734 atomic_t num_pending_mgmt_tx; 735 wait_queue_head_t txmgmt_empty_waitq; 736 737 /* cycle count is reported twice for each visited channel during scan. 738 * access protected by data_lock 739 */ 740 u32 survey_last_rx_clear_count; 741 u32 survey_last_cycle_count; 742 743 /* Channel info events are expected to come in pairs without and with 744 * COMPLETE flag set respectively for each channel visit during scan. 745 * 746 * However there are deviations from this rule. This flag is used to 747 * avoid reporting garbage data. 748 */ 749 bool ch_info_can_report_survey; 750 struct survey_info survey[ATH11K_NUM_CHANS]; 751 struct completion bss_survey_done; 752 753 struct work_struct regd_update_work; 754 struct work_struct channel_update_work; 755 /* protected with data_lock */ 756 struct list_head channel_update_queue; 757 758 struct work_struct wmi_mgmt_tx_work; 759 struct sk_buff_head wmi_mgmt_tx_queue; 760 761 struct ath11k_wow wow; 762 struct completion target_suspend; 763 bool target_suspend_ack; 764 struct ath11k_per_peer_tx_stats peer_tx_stats; 765 struct list_head ppdu_stats_info; 766 u32 ppdu_stat_list_depth; 767 768 struct ath11k_per_peer_tx_stats cached_stats; 769 u32 last_ppdu_id; 770 u32 cached_ppdu_id; 771 int monitor_vdev_id; 772 struct completion fw_mode_reset; 773 u8 ftm_msgref; 774 #ifdef CONFIG_ATH11K_DEBUGFS 775 struct ath11k_debug debug; 776 #endif 777 #ifdef CONFIG_ATH11K_SPECTRAL 778 struct ath11k_spectral spectral; 779 #endif 780 bool dfs_block_radar_events; 781 struct ath11k_thermal thermal; 782 u32 vdev_id_11d_scan; 783 struct completion completed_11d_scan; 784 enum ath11k_11d_state state_11d; 785 bool regdom_set_by_user; 786 int hw_rate_code; 787 u8 twt_enabled; 788 bool nlo_enabled; 789 u8 alpha2[REG_ALPHA2_LEN + 1]; 790 struct ath11k_fw_stats fw_stats; 791 struct completion fw_stats_complete; 792 struct completion fw_stats_done; 793 794 /* protected by conf_mutex */ 795 bool ps_state_enable; 796 bool ps_timekeeper_enable; 797 s8 max_allowed_tx_power; 798 }; 799 800 struct ath11k_band_cap { 801 u32 phy_id; 802 u32 max_bw_supported; 803 u32 ht_cap_info; 804 u32 he_cap_info[2]; 805 u32 he_mcs; 806 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE]; 807 struct ath11k_ppe_threshold he_ppet; 808 u16 he_6ghz_capa; 809 }; 810 811 struct ath11k_pdev_cap { 812 u32 supported_bands; 813 u32 ampdu_density; 814 u32 vht_cap; 815 u32 vht_mcs; 816 u32 he_mcs; 817 u32 tx_chain_mask; 818 u32 rx_chain_mask; 819 u32 tx_chain_mask_shift; 820 u32 rx_chain_mask_shift; 821 struct ath11k_band_cap band[NUM_NL80211_BANDS]; 822 bool nss_ratio_enabled; 823 u8 nss_ratio_info; 824 }; 825 826 struct ath11k_pdev { 827 struct ath11k *ar; 828 u32 pdev_id; 829 struct ath11k_pdev_cap cap; 830 u8 mac_addr[ETH_ALEN]; 831 }; 832 833 struct ath11k_board_data { 834 const struct firmware *fw; 835 const void *data; 836 size_t len; 837 }; 838 839 struct ath11k_pci_ops { 840 int (*wakeup)(struct ath11k_base *ab); 841 void (*release)(struct ath11k_base *ab); 842 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector); 843 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value); 844 u32 (*window_read32)(struct ath11k_base *ab, u32 offset); 845 }; 846 847 /* IPQ8074 HW channel counters frequency value in hertz */ 848 #define IPQ8074_CC_FREQ_HERTZ 320000 849 850 struct ath11k_bp_stats { 851 /* Head Pointer reported by the last HTT Backpressure event for the ring */ 852 u16 hp; 853 854 /* Tail Pointer reported by the last HTT Backpressure event for the ring */ 855 u16 tp; 856 857 /* Number of Backpressure events received for the ring */ 858 u32 count; 859 860 /* Last recorded event timestamp */ 861 unsigned long jiffies; 862 }; 863 864 struct ath11k_dp_ring_bp_stats { 865 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX]; 866 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS]; 867 }; 868 869 struct ath11k_soc_dp_tx_err_stats { 870 /* TCL Ring Descriptor unavailable */ 871 u32 desc_na[DP_TCL_NUM_RING_MAX]; 872 /* Other failures during dp_tx due to mem allocation failure 873 * idr unavailable etc. 874 */ 875 atomic_t misc_fail; 876 }; 877 878 struct ath11k_soc_dp_stats { 879 u32 err_ring_pkts; 880 u32 invalid_rbm; 881 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX]; 882 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX]; 883 u32 hal_reo_error[DP_REO_DST_RING_MAX]; 884 struct ath11k_soc_dp_tx_err_stats tx_err; 885 struct ath11k_dp_ring_bp_stats bp_stats; 886 }; 887 888 struct ath11k_msi_user { 889 char *name; 890 int num_vectors; 891 u32 base_vector; 892 }; 893 894 struct ath11k_msi_config { 895 int total_vectors; 896 int total_users; 897 struct ath11k_msi_user *users; 898 u16 hw_rev; 899 }; 900 901 enum ath11k_pm_policy { 902 ATH11K_PM_DEFAULT, 903 ATH11K_PM_WOW, 904 }; 905 906 /* Master structure to hold the hw data which may be used in core module */ 907 struct ath11k_base { 908 enum ath11k_hw_rev hw_rev; 909 enum ath11k_firmware_mode fw_mode; 910 struct platform_device *pdev; 911 struct device *dev; 912 struct ath11k_qmi qmi; 913 struct ath11k_wmi_base wmi_ab; 914 struct completion fw_ready; 915 int num_radios; 916 /* HW channel counters frequency value in hertz common to all MACs */ 917 u32 cc_freq_hz; 918 919 struct ath11k_dump_file_data *dump_data; 920 size_t ath11k_coredump_len; 921 struct work_struct dump_work; 922 923 struct ath11k_htc htc; 924 925 struct ath11k_dp dp; 926 927 void __iomem *mem; 928 void __iomem *mem_ce; 929 unsigned long mem_len; 930 931 struct { 932 enum ath11k_bus bus; 933 const struct ath11k_hif_ops *ops; 934 } hif; 935 936 struct { 937 struct completion wakeup_completed; 938 } wow; 939 940 struct ath11k_ce ce; 941 struct timer_list rx_replenish_retry; 942 struct ath11k_hal hal; 943 /* To synchronize core_start/core_stop */ 944 struct mutex core_lock; 945 /* Protects data like peers */ 946 spinlock_t base_lock; 947 struct ath11k_pdev pdevs[MAX_RADIOS]; 948 struct { 949 enum WMI_HOST_WLAN_BAND supported_bands; 950 u32 pdev_id; 951 } target_pdev_ids[MAX_RADIOS]; 952 u8 target_pdev_count; 953 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS]; 954 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS]; 955 unsigned long long free_vdev_map; 956 957 /* To synchronize rhash tbl write operation */ 958 struct mutex tbl_mtx_lock; 959 960 /* The rhashtable containing struct ath11k_peer keyed by mac addr */ 961 struct rhashtable *rhead_peer_addr; 962 struct rhashtable_params rhash_peer_addr_param; 963 964 /* The rhashtable containing struct ath11k_peer keyed by id */ 965 struct rhashtable *rhead_peer_id; 966 struct rhashtable_params rhash_peer_id_param; 967 968 struct list_head peers; 969 wait_queue_head_t peer_mapping_wq; 970 u8 mac_addr[ETH_ALEN]; 971 int irq_num[ATH11K_IRQ_NUM_MAX]; 972 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX]; 973 struct ath11k_targ_cap target_caps; 974 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE]; 975 bool pdevs_macaddr_valid; 976 977 struct ath11k_hw_params hw_params; 978 979 const struct firmware *cal_file; 980 981 /* Below regd's are protected by ab->data_lock */ 982 /* This is the regd set for every radio 983 * by the firmware during initialization 984 */ 985 struct ieee80211_regdomain *default_regd[MAX_RADIOS]; 986 /* This regd is set during dynamic country setting 987 * This may or may not be used during the runtime 988 */ 989 struct ieee80211_regdomain *new_regd[MAX_RADIOS]; 990 struct cur_regulatory_info *reg_info_store; 991 992 /* Current DFS Regulatory */ 993 enum ath11k_dfs_region dfs_region; 994 #ifdef CONFIG_ATH11K_DEBUGFS 995 struct dentry *debugfs_soc; 996 #endif 997 struct ath11k_soc_dp_stats soc_stats; 998 999 unsigned long dev_flags; 1000 struct completion driver_recovery; 1001 struct workqueue_struct *workqueue; 1002 struct work_struct restart_work; 1003 struct work_struct update_11d_work; 1004 u8 new_alpha2[3]; 1005 struct workqueue_struct *workqueue_aux; 1006 struct work_struct reset_work; 1007 atomic_t reset_count; 1008 atomic_t recovery_count; 1009 atomic_t recovery_start_count; 1010 bool is_reset; 1011 struct completion reset_complete; 1012 struct completion reconfigure_complete; 1013 struct completion recovery_start; 1014 /* continuous recovery fail count */ 1015 atomic_t fail_cont_count; 1016 unsigned long reset_fail_timeout; 1017 struct { 1018 /* protected by data_lock */ 1019 u32 fw_crash_counter; 1020 } stats; 1021 u32 pktlog_defs_checksum; 1022 1023 struct ath11k_dbring_cap *db_caps; 1024 u32 num_db_cap; 1025 1026 /* To synchronize 11d scan vdev id */ 1027 struct mutex vdev_id_11d_lock; 1028 struct timer_list mon_reap_timer; 1029 1030 struct completion htc_suspend; 1031 1032 struct { 1033 enum ath11k_bdf_search bdf_search; 1034 u32 vendor; 1035 u32 device; 1036 u32 subsystem_vendor; 1037 u32 subsystem_device; 1038 } id; 1039 1040 struct { 1041 struct { 1042 const struct ath11k_msi_config *config; 1043 u32 ep_base_data; 1044 u32 irqs[32]; 1045 u32 addr_lo; 1046 u32 addr_hi; 1047 } msi; 1048 1049 const struct ath11k_pci_ops *ops; 1050 } pci; 1051 1052 struct { 1053 u32 api_version; 1054 1055 const struct firmware *fw; 1056 const u8 *amss_data; 1057 size_t amss_len; 1058 const u8 *m3_data; 1059 size_t m3_len; 1060 1061 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT); 1062 } fw; 1063 1064 struct completion restart_completed; 1065 1066 #ifdef CONFIG_NL80211_TESTMODE 1067 struct { 1068 u32 data_pos; 1069 u32 expected_seq; 1070 u8 *eventdata; 1071 } testmode; 1072 #endif 1073 1074 enum ath11k_pm_policy pm_policy; 1075 enum ath11k_pm_policy actual_pm_policy; 1076 struct notifier_block pm_nb; 1077 1078 /* must be last */ 1079 u8 drv_priv[] __aligned(sizeof(void *)); 1080 }; 1081 1082 struct ath11k_fw_stats_pdev { 1083 struct list_head list; 1084 1085 /* PDEV stats */ 1086 s32 ch_noise_floor; 1087 /* Cycles spent transmitting frames */ 1088 u32 tx_frame_count; 1089 /* Cycles spent receiving frames */ 1090 u32 rx_frame_count; 1091 /* Total channel busy time, evidently */ 1092 u32 rx_clear_count; 1093 /* Total on-channel time */ 1094 u32 cycle_count; 1095 u32 phy_err_count; 1096 u32 chan_tx_power; 1097 u32 ack_rx_bad; 1098 u32 rts_bad; 1099 u32 rts_good; 1100 u32 fcs_bad; 1101 u32 no_beacons; 1102 u32 mib_int_count; 1103 1104 /* PDEV TX stats */ 1105 /* Num HTT cookies queued to dispatch list */ 1106 s32 comp_queued; 1107 /* Num HTT cookies dispatched */ 1108 s32 comp_delivered; 1109 /* Num MSDU queued to WAL */ 1110 s32 msdu_enqued; 1111 /* Num MPDU queue to WAL */ 1112 s32 mpdu_enqued; 1113 /* Num MSDUs dropped by WMM limit */ 1114 s32 wmm_drop; 1115 /* Num Local frames queued */ 1116 s32 local_enqued; 1117 /* Num Local frames done */ 1118 s32 local_freed; 1119 /* Num queued to HW */ 1120 s32 hw_queued; 1121 /* Num PPDU reaped from HW */ 1122 s32 hw_reaped; 1123 /* Num underruns */ 1124 s32 underrun; 1125 /* Num hw paused */ 1126 u32 hw_paused; 1127 /* Num PPDUs cleaned up in TX abort */ 1128 s32 tx_abort; 1129 /* Num MPDUs requeued by SW */ 1130 s32 mpdus_requeued; 1131 /* excessive retries */ 1132 u32 tx_ko; 1133 u32 tx_xretry; 1134 /* data hw rate code */ 1135 u32 data_rc; 1136 /* Scheduler self triggers */ 1137 u32 self_triggers; 1138 /* frames dropped due to excessive sw retries */ 1139 u32 sw_retry_failure; 1140 /* illegal rate phy errors */ 1141 u32 illgl_rate_phy_err; 1142 /* wal pdev continuous xretry */ 1143 u32 pdev_cont_xretry; 1144 /* wal pdev tx timeouts */ 1145 u32 pdev_tx_timeout; 1146 /* wal pdev resets */ 1147 u32 pdev_resets; 1148 /* frames dropped due to non-availability of stateless TIDs */ 1149 u32 stateless_tid_alloc_failure; 1150 /* PhY/BB underrun */ 1151 u32 phy_underrun; 1152 /* MPDU is more than txop limit */ 1153 u32 txop_ovf; 1154 /* Num sequences posted */ 1155 u32 seq_posted; 1156 /* Num sequences failed in queueing */ 1157 u32 seq_failed_queueing; 1158 /* Num sequences completed */ 1159 u32 seq_completed; 1160 /* Num sequences restarted */ 1161 u32 seq_restarted; 1162 /* Num of MU sequences posted */ 1163 u32 mu_seq_posted; 1164 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT 1165 * (Reset,channel change) 1166 */ 1167 s32 mpdus_sw_flush; 1168 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */ 1169 s32 mpdus_hw_filter; 1170 /* Num MPDUs truncated by PDG (TXOP, TBTT, 1171 * PPDU_duration based on rate, dyn_bw) 1172 */ 1173 s32 mpdus_truncated; 1174 /* Num MPDUs that was tried but didn't receive ACK or BA */ 1175 s32 mpdus_ack_failed; 1176 /* Num MPDUs that was dropped du to expiry. */ 1177 s32 mpdus_expired; 1178 1179 /* PDEV RX stats */ 1180 /* Cnts any change in ring routing mid-ppdu */ 1181 s32 mid_ppdu_route_change; 1182 /* Total number of statuses processed */ 1183 s32 status_rcvd; 1184 /* Extra frags on rings 0-3 */ 1185 s32 r0_frags; 1186 s32 r1_frags; 1187 s32 r2_frags; 1188 s32 r3_frags; 1189 /* MSDUs / MPDUs delivered to HTT */ 1190 s32 htt_msdus; 1191 s32 htt_mpdus; 1192 /* MSDUs / MPDUs delivered to local stack */ 1193 s32 loc_msdus; 1194 s32 loc_mpdus; 1195 /* AMSDUs that have more MSDUs than the status ring size */ 1196 s32 oversize_amsdu; 1197 /* Number of PHY errors */ 1198 s32 phy_errs; 1199 /* Number of PHY errors drops */ 1200 s32 phy_err_drop; 1201 /* Number of mpdu errors - FCS, MIC, ENC etc. */ 1202 s32 mpdu_errs; 1203 /* Num overflow errors */ 1204 s32 rx_ovfl_errs; 1205 }; 1206 1207 struct ath11k_fw_stats_vdev { 1208 struct list_head list; 1209 1210 u32 vdev_id; 1211 u32 beacon_snr; 1212 u32 data_snr; 1213 u32 num_tx_frames[WLAN_MAX_AC]; 1214 u32 num_rx_frames; 1215 u32 num_tx_frames_retries[WLAN_MAX_AC]; 1216 u32 num_tx_frames_failures[WLAN_MAX_AC]; 1217 u32 num_rts_fail; 1218 u32 num_rts_success; 1219 u32 num_rx_err; 1220 u32 num_rx_discard; 1221 u32 num_tx_not_acked; 1222 u32 tx_rate_history[MAX_TX_RATE_VALUES]; 1223 u32 beacon_rssi_history[MAX_TX_RATE_VALUES]; 1224 }; 1225 1226 struct ath11k_fw_stats_bcn { 1227 struct list_head list; 1228 1229 u32 vdev_id; 1230 u32 tx_bcn_succ_cnt; 1231 u32 tx_bcn_outage_cnt; 1232 }; 1233 1234 void ath11k_fw_stats_init(struct ath11k *ar); 1235 void ath11k_fw_stats_pdevs_free(struct list_head *head); 1236 void ath11k_fw_stats_vdevs_free(struct list_head *head); 1237 void ath11k_fw_stats_bcn_free(struct list_head *head); 1238 void ath11k_fw_stats_free(struct ath11k_fw_stats *stats); 1239 1240 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[]; 1241 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[]; 1242 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[]; 1243 1244 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[]; 1245 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[]; 1246 1247 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[]; 1248 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[]; 1249 1250 extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[]; 1251 extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[]; 1252 int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab); 1253 int ath11k_core_pre_init(struct ath11k_base *ab); 1254 int ath11k_core_init(struct ath11k_base *ath11k); 1255 void ath11k_core_deinit(struct ath11k_base *ath11k); 1256 struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size, 1257 enum ath11k_bus bus); 1258 void ath11k_core_free(struct ath11k_base *ath11k); 1259 int ath11k_core_fetch_bdf(struct ath11k_base *ath11k, 1260 struct ath11k_board_data *bd); 1261 int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd); 1262 int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab, 1263 struct ath11k_board_data *bd, 1264 const char *name); 1265 void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd); 1266 int ath11k_core_check_dt(struct ath11k_base *ath11k); 1267 int ath11k_core_check_smbios(struct ath11k_base *ab); 1268 void ath11k_core_halt(struct ath11k *ar); 1269 int ath11k_core_resume_early(struct ath11k_base *ab); 1270 int ath11k_core_resume(struct ath11k_base *ab); 1271 int ath11k_core_suspend(struct ath11k_base *ab); 1272 int ath11k_core_suspend_late(struct ath11k_base *ab); 1273 void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab); 1274 bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab); 1275 1276 const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab, 1277 const char *filename); 1278 1279 static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state) 1280 { 1281 switch (state) { 1282 case ATH11K_SCAN_IDLE: 1283 return "idle"; 1284 case ATH11K_SCAN_STARTING: 1285 return "starting"; 1286 case ATH11K_SCAN_RUNNING: 1287 return "running"; 1288 case ATH11K_SCAN_ABORTING: 1289 return "aborting"; 1290 } 1291 1292 return "unknown"; 1293 } 1294 1295 static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb) 1296 { 1297 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) > 1298 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 1299 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 1300 } 1301 1302 static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb) 1303 { 1304 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb)); 1305 return (struct ath11k_skb_rxcb *)skb->cb; 1306 } 1307 1308 static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif) 1309 { 1310 return (struct ath11k_vif *)vif->drv_priv; 1311 } 1312 1313 static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta) 1314 { 1315 return (struct ath11k_sta *)sta->drv_priv; 1316 } 1317 1318 static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab, 1319 int mac_id) 1320 { 1321 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar; 1322 } 1323 1324 static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab, 1325 const char *filename, 1326 void *buf, size_t buf_len) 1327 { 1328 const char *fw_name = NULL; 1329 1330 of_property_read_string(ab->dev->of_node, "firmware-name", &fw_name); 1331 1332 if (fw_name && strncmp(filename, "board", 5)) 1333 snprintf(buf, buf_len, "%s/%s/%s/%s", ATH11K_FW_DIR, 1334 ab->hw_params.fw.dir, fw_name, filename); 1335 else 1336 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR, 1337 ab->hw_params.fw.dir, filename); 1338 } 1339 1340 static inline const char *ath11k_bus_str(enum ath11k_bus bus) 1341 { 1342 switch (bus) { 1343 case ATH11K_BUS_PCI: 1344 return "pci"; 1345 case ATH11K_BUS_AHB: 1346 return "ahb"; 1347 } 1348 1349 return "unknown"; 1350 } 1351 1352 void ath11k_core_pm_notifier_unregister(struct ath11k_base *ab); 1353 1354 #endif /* _CORE_H_ */ 1355