1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/skbuff.h> 19 #include <linux/ctype.h> 20 21 #include "core.h" 22 #include "htc.h" 23 #include "debug.h" 24 #include "wmi.h" 25 #include "wmi-tlv.h" 26 #include "mac.h" 27 #include "testmode.h" 28 #include "wmi-ops.h" 29 30 /* MAIN WMI cmd track */ 31 static struct wmi_cmd_map wmi_cmd_map = { 32 .init_cmdid = WMI_INIT_CMDID, 33 .start_scan_cmdid = WMI_START_SCAN_CMDID, 34 .stop_scan_cmdid = WMI_STOP_SCAN_CMDID, 35 .scan_chan_list_cmdid = WMI_SCAN_CHAN_LIST_CMDID, 36 .scan_sch_prio_tbl_cmdid = WMI_SCAN_SCH_PRIO_TBL_CMDID, 37 .pdev_set_regdomain_cmdid = WMI_PDEV_SET_REGDOMAIN_CMDID, 38 .pdev_set_channel_cmdid = WMI_PDEV_SET_CHANNEL_CMDID, 39 .pdev_set_param_cmdid = WMI_PDEV_SET_PARAM_CMDID, 40 .pdev_pktlog_enable_cmdid = WMI_PDEV_PKTLOG_ENABLE_CMDID, 41 .pdev_pktlog_disable_cmdid = WMI_PDEV_PKTLOG_DISABLE_CMDID, 42 .pdev_set_wmm_params_cmdid = WMI_PDEV_SET_WMM_PARAMS_CMDID, 43 .pdev_set_ht_cap_ie_cmdid = WMI_PDEV_SET_HT_CAP_IE_CMDID, 44 .pdev_set_vht_cap_ie_cmdid = WMI_PDEV_SET_VHT_CAP_IE_CMDID, 45 .pdev_set_dscp_tid_map_cmdid = WMI_PDEV_SET_DSCP_TID_MAP_CMDID, 46 .pdev_set_quiet_mode_cmdid = WMI_PDEV_SET_QUIET_MODE_CMDID, 47 .pdev_green_ap_ps_enable_cmdid = WMI_PDEV_GREEN_AP_PS_ENABLE_CMDID, 48 .pdev_get_tpc_config_cmdid = WMI_PDEV_GET_TPC_CONFIG_CMDID, 49 .pdev_set_base_macaddr_cmdid = WMI_PDEV_SET_BASE_MACADDR_CMDID, 50 .vdev_create_cmdid = WMI_VDEV_CREATE_CMDID, 51 .vdev_delete_cmdid = WMI_VDEV_DELETE_CMDID, 52 .vdev_start_request_cmdid = WMI_VDEV_START_REQUEST_CMDID, 53 .vdev_restart_request_cmdid = WMI_VDEV_RESTART_REQUEST_CMDID, 54 .vdev_up_cmdid = WMI_VDEV_UP_CMDID, 55 .vdev_stop_cmdid = WMI_VDEV_STOP_CMDID, 56 .vdev_down_cmdid = WMI_VDEV_DOWN_CMDID, 57 .vdev_set_param_cmdid = WMI_VDEV_SET_PARAM_CMDID, 58 .vdev_install_key_cmdid = WMI_VDEV_INSTALL_KEY_CMDID, 59 .peer_create_cmdid = WMI_PEER_CREATE_CMDID, 60 .peer_delete_cmdid = WMI_PEER_DELETE_CMDID, 61 .peer_flush_tids_cmdid = WMI_PEER_FLUSH_TIDS_CMDID, 62 .peer_set_param_cmdid = WMI_PEER_SET_PARAM_CMDID, 63 .peer_assoc_cmdid = WMI_PEER_ASSOC_CMDID, 64 .peer_add_wds_entry_cmdid = WMI_PEER_ADD_WDS_ENTRY_CMDID, 65 .peer_remove_wds_entry_cmdid = WMI_PEER_REMOVE_WDS_ENTRY_CMDID, 66 .peer_mcast_group_cmdid = WMI_PEER_MCAST_GROUP_CMDID, 67 .bcn_tx_cmdid = WMI_BCN_TX_CMDID, 68 .pdev_send_bcn_cmdid = WMI_PDEV_SEND_BCN_CMDID, 69 .bcn_tmpl_cmdid = WMI_BCN_TMPL_CMDID, 70 .bcn_filter_rx_cmdid = WMI_BCN_FILTER_RX_CMDID, 71 .prb_req_filter_rx_cmdid = WMI_PRB_REQ_FILTER_RX_CMDID, 72 .mgmt_tx_cmdid = WMI_MGMT_TX_CMDID, 73 .prb_tmpl_cmdid = WMI_PRB_TMPL_CMDID, 74 .addba_clear_resp_cmdid = WMI_ADDBA_CLEAR_RESP_CMDID, 75 .addba_send_cmdid = WMI_ADDBA_SEND_CMDID, 76 .addba_status_cmdid = WMI_ADDBA_STATUS_CMDID, 77 .delba_send_cmdid = WMI_DELBA_SEND_CMDID, 78 .addba_set_resp_cmdid = WMI_ADDBA_SET_RESP_CMDID, 79 .send_singleamsdu_cmdid = WMI_SEND_SINGLEAMSDU_CMDID, 80 .sta_powersave_mode_cmdid = WMI_STA_POWERSAVE_MODE_CMDID, 81 .sta_powersave_param_cmdid = WMI_STA_POWERSAVE_PARAM_CMDID, 82 .sta_mimo_ps_mode_cmdid = WMI_STA_MIMO_PS_MODE_CMDID, 83 .pdev_dfs_enable_cmdid = WMI_PDEV_DFS_ENABLE_CMDID, 84 .pdev_dfs_disable_cmdid = WMI_PDEV_DFS_DISABLE_CMDID, 85 .roam_scan_mode = WMI_ROAM_SCAN_MODE, 86 .roam_scan_rssi_threshold = WMI_ROAM_SCAN_RSSI_THRESHOLD, 87 .roam_scan_period = WMI_ROAM_SCAN_PERIOD, 88 .roam_scan_rssi_change_threshold = WMI_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 89 .roam_ap_profile = WMI_ROAM_AP_PROFILE, 90 .ofl_scan_add_ap_profile = WMI_ROAM_AP_PROFILE, 91 .ofl_scan_remove_ap_profile = WMI_OFL_SCAN_REMOVE_AP_PROFILE, 92 .ofl_scan_period = WMI_OFL_SCAN_PERIOD, 93 .p2p_dev_set_device_info = WMI_P2P_DEV_SET_DEVICE_INFO, 94 .p2p_dev_set_discoverability = WMI_P2P_DEV_SET_DISCOVERABILITY, 95 .p2p_go_set_beacon_ie = WMI_P2P_GO_SET_BEACON_IE, 96 .p2p_go_set_probe_resp_ie = WMI_P2P_GO_SET_PROBE_RESP_IE, 97 .p2p_set_vendor_ie_data_cmdid = WMI_P2P_SET_VENDOR_IE_DATA_CMDID, 98 .ap_ps_peer_param_cmdid = WMI_AP_PS_PEER_PARAM_CMDID, 99 .ap_ps_peer_uapsd_coex_cmdid = WMI_AP_PS_PEER_UAPSD_COEX_CMDID, 100 .peer_rate_retry_sched_cmdid = WMI_PEER_RATE_RETRY_SCHED_CMDID, 101 .wlan_profile_trigger_cmdid = WMI_WLAN_PROFILE_TRIGGER_CMDID, 102 .wlan_profile_set_hist_intvl_cmdid = 103 WMI_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 104 .wlan_profile_get_profile_data_cmdid = 105 WMI_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 106 .wlan_profile_enable_profile_id_cmdid = 107 WMI_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 108 .wlan_profile_list_profile_id_cmdid = 109 WMI_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 110 .pdev_suspend_cmdid = WMI_PDEV_SUSPEND_CMDID, 111 .pdev_resume_cmdid = WMI_PDEV_RESUME_CMDID, 112 .add_bcn_filter_cmdid = WMI_ADD_BCN_FILTER_CMDID, 113 .rmv_bcn_filter_cmdid = WMI_RMV_BCN_FILTER_CMDID, 114 .wow_add_wake_pattern_cmdid = WMI_WOW_ADD_WAKE_PATTERN_CMDID, 115 .wow_del_wake_pattern_cmdid = WMI_WOW_DEL_WAKE_PATTERN_CMDID, 116 .wow_enable_disable_wake_event_cmdid = 117 WMI_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 118 .wow_enable_cmdid = WMI_WOW_ENABLE_CMDID, 119 .wow_hostwakeup_from_sleep_cmdid = WMI_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 120 .rtt_measreq_cmdid = WMI_RTT_MEASREQ_CMDID, 121 .rtt_tsf_cmdid = WMI_RTT_TSF_CMDID, 122 .vdev_spectral_scan_configure_cmdid = 123 WMI_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 124 .vdev_spectral_scan_enable_cmdid = WMI_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 125 .request_stats_cmdid = WMI_REQUEST_STATS_CMDID, 126 .set_arp_ns_offload_cmdid = WMI_SET_ARP_NS_OFFLOAD_CMDID, 127 .network_list_offload_config_cmdid = 128 WMI_NETWORK_LIST_OFFLOAD_CONFIG_CMDID, 129 .gtk_offload_cmdid = WMI_GTK_OFFLOAD_CMDID, 130 .csa_offload_enable_cmdid = WMI_CSA_OFFLOAD_ENABLE_CMDID, 131 .csa_offload_chanswitch_cmdid = WMI_CSA_OFFLOAD_CHANSWITCH_CMDID, 132 .chatter_set_mode_cmdid = WMI_CHATTER_SET_MODE_CMDID, 133 .peer_tid_addba_cmdid = WMI_PEER_TID_ADDBA_CMDID, 134 .peer_tid_delba_cmdid = WMI_PEER_TID_DELBA_CMDID, 135 .sta_dtim_ps_method_cmdid = WMI_STA_DTIM_PS_METHOD_CMDID, 136 .sta_uapsd_auto_trig_cmdid = WMI_STA_UAPSD_AUTO_TRIG_CMDID, 137 .sta_keepalive_cmd = WMI_STA_KEEPALIVE_CMD, 138 .echo_cmdid = WMI_ECHO_CMDID, 139 .pdev_utf_cmdid = WMI_PDEV_UTF_CMDID, 140 .dbglog_cfg_cmdid = WMI_DBGLOG_CFG_CMDID, 141 .pdev_qvit_cmdid = WMI_PDEV_QVIT_CMDID, 142 .pdev_ftm_intg_cmdid = WMI_PDEV_FTM_INTG_CMDID, 143 .vdev_set_keepalive_cmdid = WMI_VDEV_SET_KEEPALIVE_CMDID, 144 .vdev_get_keepalive_cmdid = WMI_VDEV_GET_KEEPALIVE_CMDID, 145 .force_fw_hang_cmdid = WMI_FORCE_FW_HANG_CMDID, 146 .gpio_config_cmdid = WMI_GPIO_CONFIG_CMDID, 147 .gpio_output_cmdid = WMI_GPIO_OUTPUT_CMDID, 148 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 149 }; 150 151 /* 10.X WMI cmd track */ 152 static struct wmi_cmd_map wmi_10x_cmd_map = { 153 .init_cmdid = WMI_10X_INIT_CMDID, 154 .start_scan_cmdid = WMI_10X_START_SCAN_CMDID, 155 .stop_scan_cmdid = WMI_10X_STOP_SCAN_CMDID, 156 .scan_chan_list_cmdid = WMI_10X_SCAN_CHAN_LIST_CMDID, 157 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 158 .pdev_set_regdomain_cmdid = WMI_10X_PDEV_SET_REGDOMAIN_CMDID, 159 .pdev_set_channel_cmdid = WMI_10X_PDEV_SET_CHANNEL_CMDID, 160 .pdev_set_param_cmdid = WMI_10X_PDEV_SET_PARAM_CMDID, 161 .pdev_pktlog_enable_cmdid = WMI_10X_PDEV_PKTLOG_ENABLE_CMDID, 162 .pdev_pktlog_disable_cmdid = WMI_10X_PDEV_PKTLOG_DISABLE_CMDID, 163 .pdev_set_wmm_params_cmdid = WMI_10X_PDEV_SET_WMM_PARAMS_CMDID, 164 .pdev_set_ht_cap_ie_cmdid = WMI_10X_PDEV_SET_HT_CAP_IE_CMDID, 165 .pdev_set_vht_cap_ie_cmdid = WMI_10X_PDEV_SET_VHT_CAP_IE_CMDID, 166 .pdev_set_dscp_tid_map_cmdid = WMI_10X_PDEV_SET_DSCP_TID_MAP_CMDID, 167 .pdev_set_quiet_mode_cmdid = WMI_10X_PDEV_SET_QUIET_MODE_CMDID, 168 .pdev_green_ap_ps_enable_cmdid = WMI_10X_PDEV_GREEN_AP_PS_ENABLE_CMDID, 169 .pdev_get_tpc_config_cmdid = WMI_10X_PDEV_GET_TPC_CONFIG_CMDID, 170 .pdev_set_base_macaddr_cmdid = WMI_10X_PDEV_SET_BASE_MACADDR_CMDID, 171 .vdev_create_cmdid = WMI_10X_VDEV_CREATE_CMDID, 172 .vdev_delete_cmdid = WMI_10X_VDEV_DELETE_CMDID, 173 .vdev_start_request_cmdid = WMI_10X_VDEV_START_REQUEST_CMDID, 174 .vdev_restart_request_cmdid = WMI_10X_VDEV_RESTART_REQUEST_CMDID, 175 .vdev_up_cmdid = WMI_10X_VDEV_UP_CMDID, 176 .vdev_stop_cmdid = WMI_10X_VDEV_STOP_CMDID, 177 .vdev_down_cmdid = WMI_10X_VDEV_DOWN_CMDID, 178 .vdev_set_param_cmdid = WMI_10X_VDEV_SET_PARAM_CMDID, 179 .vdev_install_key_cmdid = WMI_10X_VDEV_INSTALL_KEY_CMDID, 180 .peer_create_cmdid = WMI_10X_PEER_CREATE_CMDID, 181 .peer_delete_cmdid = WMI_10X_PEER_DELETE_CMDID, 182 .peer_flush_tids_cmdid = WMI_10X_PEER_FLUSH_TIDS_CMDID, 183 .peer_set_param_cmdid = WMI_10X_PEER_SET_PARAM_CMDID, 184 .peer_assoc_cmdid = WMI_10X_PEER_ASSOC_CMDID, 185 .peer_add_wds_entry_cmdid = WMI_10X_PEER_ADD_WDS_ENTRY_CMDID, 186 .peer_remove_wds_entry_cmdid = WMI_10X_PEER_REMOVE_WDS_ENTRY_CMDID, 187 .peer_mcast_group_cmdid = WMI_10X_PEER_MCAST_GROUP_CMDID, 188 .bcn_tx_cmdid = WMI_10X_BCN_TX_CMDID, 189 .pdev_send_bcn_cmdid = WMI_10X_PDEV_SEND_BCN_CMDID, 190 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 191 .bcn_filter_rx_cmdid = WMI_10X_BCN_FILTER_RX_CMDID, 192 .prb_req_filter_rx_cmdid = WMI_10X_PRB_REQ_FILTER_RX_CMDID, 193 .mgmt_tx_cmdid = WMI_10X_MGMT_TX_CMDID, 194 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 195 .addba_clear_resp_cmdid = WMI_10X_ADDBA_CLEAR_RESP_CMDID, 196 .addba_send_cmdid = WMI_10X_ADDBA_SEND_CMDID, 197 .addba_status_cmdid = WMI_10X_ADDBA_STATUS_CMDID, 198 .delba_send_cmdid = WMI_10X_DELBA_SEND_CMDID, 199 .addba_set_resp_cmdid = WMI_10X_ADDBA_SET_RESP_CMDID, 200 .send_singleamsdu_cmdid = WMI_10X_SEND_SINGLEAMSDU_CMDID, 201 .sta_powersave_mode_cmdid = WMI_10X_STA_POWERSAVE_MODE_CMDID, 202 .sta_powersave_param_cmdid = WMI_10X_STA_POWERSAVE_PARAM_CMDID, 203 .sta_mimo_ps_mode_cmdid = WMI_10X_STA_MIMO_PS_MODE_CMDID, 204 .pdev_dfs_enable_cmdid = WMI_10X_PDEV_DFS_ENABLE_CMDID, 205 .pdev_dfs_disable_cmdid = WMI_10X_PDEV_DFS_DISABLE_CMDID, 206 .roam_scan_mode = WMI_10X_ROAM_SCAN_MODE, 207 .roam_scan_rssi_threshold = WMI_10X_ROAM_SCAN_RSSI_THRESHOLD, 208 .roam_scan_period = WMI_10X_ROAM_SCAN_PERIOD, 209 .roam_scan_rssi_change_threshold = 210 WMI_10X_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 211 .roam_ap_profile = WMI_10X_ROAM_AP_PROFILE, 212 .ofl_scan_add_ap_profile = WMI_10X_OFL_SCAN_ADD_AP_PROFILE, 213 .ofl_scan_remove_ap_profile = WMI_10X_OFL_SCAN_REMOVE_AP_PROFILE, 214 .ofl_scan_period = WMI_10X_OFL_SCAN_PERIOD, 215 .p2p_dev_set_device_info = WMI_10X_P2P_DEV_SET_DEVICE_INFO, 216 .p2p_dev_set_discoverability = WMI_10X_P2P_DEV_SET_DISCOVERABILITY, 217 .p2p_go_set_beacon_ie = WMI_10X_P2P_GO_SET_BEACON_IE, 218 .p2p_go_set_probe_resp_ie = WMI_10X_P2P_GO_SET_PROBE_RESP_IE, 219 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 220 .ap_ps_peer_param_cmdid = WMI_10X_AP_PS_PEER_PARAM_CMDID, 221 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 222 .peer_rate_retry_sched_cmdid = WMI_10X_PEER_RATE_RETRY_SCHED_CMDID, 223 .wlan_profile_trigger_cmdid = WMI_10X_WLAN_PROFILE_TRIGGER_CMDID, 224 .wlan_profile_set_hist_intvl_cmdid = 225 WMI_10X_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 226 .wlan_profile_get_profile_data_cmdid = 227 WMI_10X_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 228 .wlan_profile_enable_profile_id_cmdid = 229 WMI_10X_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 230 .wlan_profile_list_profile_id_cmdid = 231 WMI_10X_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 232 .pdev_suspend_cmdid = WMI_10X_PDEV_SUSPEND_CMDID, 233 .pdev_resume_cmdid = WMI_10X_PDEV_RESUME_CMDID, 234 .add_bcn_filter_cmdid = WMI_10X_ADD_BCN_FILTER_CMDID, 235 .rmv_bcn_filter_cmdid = WMI_10X_RMV_BCN_FILTER_CMDID, 236 .wow_add_wake_pattern_cmdid = WMI_10X_WOW_ADD_WAKE_PATTERN_CMDID, 237 .wow_del_wake_pattern_cmdid = WMI_10X_WOW_DEL_WAKE_PATTERN_CMDID, 238 .wow_enable_disable_wake_event_cmdid = 239 WMI_10X_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 240 .wow_enable_cmdid = WMI_10X_WOW_ENABLE_CMDID, 241 .wow_hostwakeup_from_sleep_cmdid = 242 WMI_10X_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 243 .rtt_measreq_cmdid = WMI_10X_RTT_MEASREQ_CMDID, 244 .rtt_tsf_cmdid = WMI_10X_RTT_TSF_CMDID, 245 .vdev_spectral_scan_configure_cmdid = 246 WMI_10X_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 247 .vdev_spectral_scan_enable_cmdid = 248 WMI_10X_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 249 .request_stats_cmdid = WMI_10X_REQUEST_STATS_CMDID, 250 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 251 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 252 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 253 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 254 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 255 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 256 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 257 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 258 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 259 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 260 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 261 .echo_cmdid = WMI_10X_ECHO_CMDID, 262 .pdev_utf_cmdid = WMI_10X_PDEV_UTF_CMDID, 263 .dbglog_cfg_cmdid = WMI_10X_DBGLOG_CFG_CMDID, 264 .pdev_qvit_cmdid = WMI_10X_PDEV_QVIT_CMDID, 265 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 266 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 267 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 268 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 269 .gpio_config_cmdid = WMI_10X_GPIO_CONFIG_CMDID, 270 .gpio_output_cmdid = WMI_10X_GPIO_OUTPUT_CMDID, 271 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 272 }; 273 274 /* 10.2.4 WMI cmd track */ 275 static struct wmi_cmd_map wmi_10_2_4_cmd_map = { 276 .init_cmdid = WMI_10_2_INIT_CMDID, 277 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, 278 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, 279 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, 280 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 281 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 282 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, 283 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, 284 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 285 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 286 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 287 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 288 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 289 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 290 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 291 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 292 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 293 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, 294 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, 295 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, 296 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 297 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, 298 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, 299 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, 300 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, 301 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, 302 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, 303 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, 304 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, 305 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, 306 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, 307 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 308 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 309 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, 310 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, 311 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, 312 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 313 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, 314 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 315 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, 316 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 317 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 318 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, 319 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, 320 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, 321 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, 322 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, 323 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, 324 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 325 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, 326 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, 327 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, 328 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, 329 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 330 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, 331 .roam_scan_rssi_change_threshold = 332 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 333 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, 334 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 335 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 336 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, 337 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 338 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 339 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, 340 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 341 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 342 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, 343 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 344 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 345 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 346 .wlan_profile_set_hist_intvl_cmdid = 347 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 348 .wlan_profile_get_profile_data_cmdid = 349 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 350 .wlan_profile_enable_profile_id_cmdid = 351 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 352 .wlan_profile_list_profile_id_cmdid = 353 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 354 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, 355 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, 356 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, 357 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, 358 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 359 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 360 .wow_enable_disable_wake_event_cmdid = 361 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 362 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, 363 .wow_hostwakeup_from_sleep_cmdid = 364 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 365 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, 366 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, 367 .vdev_spectral_scan_configure_cmdid = 368 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 369 .vdev_spectral_scan_enable_cmdid = 370 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 371 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, 372 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 373 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 374 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 375 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 376 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 377 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 378 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 379 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 380 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 381 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 382 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 383 .echo_cmdid = WMI_10_2_ECHO_CMDID, 384 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, 385 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, 386 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, 387 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 388 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 389 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 390 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 391 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 392 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 393 .pdev_get_temperature_cmdid = WMI_10_2_PDEV_GET_TEMPERATURE_CMDID, 394 }; 395 396 /* MAIN WMI VDEV param map */ 397 static struct wmi_vdev_param_map wmi_vdev_param_map = { 398 .rts_threshold = WMI_VDEV_PARAM_RTS_THRESHOLD, 399 .fragmentation_threshold = WMI_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 400 .beacon_interval = WMI_VDEV_PARAM_BEACON_INTERVAL, 401 .listen_interval = WMI_VDEV_PARAM_LISTEN_INTERVAL, 402 .multicast_rate = WMI_VDEV_PARAM_MULTICAST_RATE, 403 .mgmt_tx_rate = WMI_VDEV_PARAM_MGMT_TX_RATE, 404 .slot_time = WMI_VDEV_PARAM_SLOT_TIME, 405 .preamble = WMI_VDEV_PARAM_PREAMBLE, 406 .swba_time = WMI_VDEV_PARAM_SWBA_TIME, 407 .wmi_vdev_stats_update_period = WMI_VDEV_STATS_UPDATE_PERIOD, 408 .wmi_vdev_pwrsave_ageout_time = WMI_VDEV_PWRSAVE_AGEOUT_TIME, 409 .wmi_vdev_host_swba_interval = WMI_VDEV_HOST_SWBA_INTERVAL, 410 .dtim_period = WMI_VDEV_PARAM_DTIM_PERIOD, 411 .wmi_vdev_oc_scheduler_air_time_limit = 412 WMI_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 413 .wds = WMI_VDEV_PARAM_WDS, 414 .atim_window = WMI_VDEV_PARAM_ATIM_WINDOW, 415 .bmiss_count_max = WMI_VDEV_PARAM_BMISS_COUNT_MAX, 416 .bmiss_first_bcnt = WMI_VDEV_PARAM_BMISS_FIRST_BCNT, 417 .bmiss_final_bcnt = WMI_VDEV_PARAM_BMISS_FINAL_BCNT, 418 .feature_wmm = WMI_VDEV_PARAM_FEATURE_WMM, 419 .chwidth = WMI_VDEV_PARAM_CHWIDTH, 420 .chextoffset = WMI_VDEV_PARAM_CHEXTOFFSET, 421 .disable_htprotection = WMI_VDEV_PARAM_DISABLE_HTPROTECTION, 422 .sta_quickkickout = WMI_VDEV_PARAM_STA_QUICKKICKOUT, 423 .mgmt_rate = WMI_VDEV_PARAM_MGMT_RATE, 424 .protection_mode = WMI_VDEV_PARAM_PROTECTION_MODE, 425 .fixed_rate = WMI_VDEV_PARAM_FIXED_RATE, 426 .sgi = WMI_VDEV_PARAM_SGI, 427 .ldpc = WMI_VDEV_PARAM_LDPC, 428 .tx_stbc = WMI_VDEV_PARAM_TX_STBC, 429 .rx_stbc = WMI_VDEV_PARAM_RX_STBC, 430 .intra_bss_fwd = WMI_VDEV_PARAM_INTRA_BSS_FWD, 431 .def_keyid = WMI_VDEV_PARAM_DEF_KEYID, 432 .nss = WMI_VDEV_PARAM_NSS, 433 .bcast_data_rate = WMI_VDEV_PARAM_BCAST_DATA_RATE, 434 .mcast_data_rate = WMI_VDEV_PARAM_MCAST_DATA_RATE, 435 .mcast_indicate = WMI_VDEV_PARAM_MCAST_INDICATE, 436 .dhcp_indicate = WMI_VDEV_PARAM_DHCP_INDICATE, 437 .unknown_dest_indicate = WMI_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 438 .ap_keepalive_min_idle_inactive_time_secs = 439 WMI_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 440 .ap_keepalive_max_idle_inactive_time_secs = 441 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 442 .ap_keepalive_max_unresponsive_time_secs = 443 WMI_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 444 .ap_enable_nawds = WMI_VDEV_PARAM_AP_ENABLE_NAWDS, 445 .mcast2ucast_set = WMI_VDEV_PARAM_UNSUPPORTED, 446 .enable_rtscts = WMI_VDEV_PARAM_ENABLE_RTSCTS, 447 .txbf = WMI_VDEV_PARAM_TXBF, 448 .packet_powersave = WMI_VDEV_PARAM_PACKET_POWERSAVE, 449 .drop_unencry = WMI_VDEV_PARAM_DROP_UNENCRY, 450 .tx_encap_type = WMI_VDEV_PARAM_TX_ENCAP_TYPE, 451 .ap_detect_out_of_sync_sleeping_sta_time_secs = 452 WMI_VDEV_PARAM_UNSUPPORTED, 453 }; 454 455 /* 10.X WMI VDEV param map */ 456 static struct wmi_vdev_param_map wmi_10x_vdev_param_map = { 457 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, 458 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 459 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 460 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 461 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, 462 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 463 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, 464 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, 465 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, 466 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, 467 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 468 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, 469 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, 470 .wmi_vdev_oc_scheduler_air_time_limit = 471 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 472 .wds = WMI_10X_VDEV_PARAM_WDS, 473 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, 474 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 475 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 476 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 477 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, 478 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, 479 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, 480 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 481 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 482 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, 483 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, 484 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, 485 .sgi = WMI_10X_VDEV_PARAM_SGI, 486 .ldpc = WMI_10X_VDEV_PARAM_LDPC, 487 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, 488 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, 489 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 490 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, 491 .nss = WMI_10X_VDEV_PARAM_NSS, 492 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 493 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 494 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, 495 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, 496 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 497 .ap_keepalive_min_idle_inactive_time_secs = 498 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 499 .ap_keepalive_max_idle_inactive_time_secs = 500 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 501 .ap_keepalive_max_unresponsive_time_secs = 502 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 503 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 504 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 505 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 506 .txbf = WMI_VDEV_PARAM_UNSUPPORTED, 507 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, 508 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, 509 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, 510 .ap_detect_out_of_sync_sleeping_sta_time_secs = 511 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 512 }; 513 514 static struct wmi_vdev_param_map wmi_10_2_4_vdev_param_map = { 515 .rts_threshold = WMI_10X_VDEV_PARAM_RTS_THRESHOLD, 516 .fragmentation_threshold = WMI_10X_VDEV_PARAM_FRAGMENTATION_THRESHOLD, 517 .beacon_interval = WMI_10X_VDEV_PARAM_BEACON_INTERVAL, 518 .listen_interval = WMI_10X_VDEV_PARAM_LISTEN_INTERVAL, 519 .multicast_rate = WMI_10X_VDEV_PARAM_MULTICAST_RATE, 520 .mgmt_tx_rate = WMI_10X_VDEV_PARAM_MGMT_TX_RATE, 521 .slot_time = WMI_10X_VDEV_PARAM_SLOT_TIME, 522 .preamble = WMI_10X_VDEV_PARAM_PREAMBLE, 523 .swba_time = WMI_10X_VDEV_PARAM_SWBA_TIME, 524 .wmi_vdev_stats_update_period = WMI_10X_VDEV_STATS_UPDATE_PERIOD, 525 .wmi_vdev_pwrsave_ageout_time = WMI_10X_VDEV_PWRSAVE_AGEOUT_TIME, 526 .wmi_vdev_host_swba_interval = WMI_10X_VDEV_HOST_SWBA_INTERVAL, 527 .dtim_period = WMI_10X_VDEV_PARAM_DTIM_PERIOD, 528 .wmi_vdev_oc_scheduler_air_time_limit = 529 WMI_10X_VDEV_OC_SCHEDULER_AIR_TIME_LIMIT, 530 .wds = WMI_10X_VDEV_PARAM_WDS, 531 .atim_window = WMI_10X_VDEV_PARAM_ATIM_WINDOW, 532 .bmiss_count_max = WMI_10X_VDEV_PARAM_BMISS_COUNT_MAX, 533 .bmiss_first_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 534 .bmiss_final_bcnt = WMI_VDEV_PARAM_UNSUPPORTED, 535 .feature_wmm = WMI_10X_VDEV_PARAM_FEATURE_WMM, 536 .chwidth = WMI_10X_VDEV_PARAM_CHWIDTH, 537 .chextoffset = WMI_10X_VDEV_PARAM_CHEXTOFFSET, 538 .disable_htprotection = WMI_10X_VDEV_PARAM_DISABLE_HTPROTECTION, 539 .sta_quickkickout = WMI_10X_VDEV_PARAM_STA_QUICKKICKOUT, 540 .mgmt_rate = WMI_10X_VDEV_PARAM_MGMT_RATE, 541 .protection_mode = WMI_10X_VDEV_PARAM_PROTECTION_MODE, 542 .fixed_rate = WMI_10X_VDEV_PARAM_FIXED_RATE, 543 .sgi = WMI_10X_VDEV_PARAM_SGI, 544 .ldpc = WMI_10X_VDEV_PARAM_LDPC, 545 .tx_stbc = WMI_10X_VDEV_PARAM_TX_STBC, 546 .rx_stbc = WMI_10X_VDEV_PARAM_RX_STBC, 547 .intra_bss_fwd = WMI_10X_VDEV_PARAM_INTRA_BSS_FWD, 548 .def_keyid = WMI_10X_VDEV_PARAM_DEF_KEYID, 549 .nss = WMI_10X_VDEV_PARAM_NSS, 550 .bcast_data_rate = WMI_10X_VDEV_PARAM_BCAST_DATA_RATE, 551 .mcast_data_rate = WMI_10X_VDEV_PARAM_MCAST_DATA_RATE, 552 .mcast_indicate = WMI_10X_VDEV_PARAM_MCAST_INDICATE, 553 .dhcp_indicate = WMI_10X_VDEV_PARAM_DHCP_INDICATE, 554 .unknown_dest_indicate = WMI_10X_VDEV_PARAM_UNKNOWN_DEST_INDICATE, 555 .ap_keepalive_min_idle_inactive_time_secs = 556 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MIN_IDLE_INACTIVE_TIME_SECS, 557 .ap_keepalive_max_idle_inactive_time_secs = 558 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_IDLE_INACTIVE_TIME_SECS, 559 .ap_keepalive_max_unresponsive_time_secs = 560 WMI_10X_VDEV_PARAM_AP_KEEPALIVE_MAX_UNRESPONSIVE_TIME_SECS, 561 .ap_enable_nawds = WMI_10X_VDEV_PARAM_AP_ENABLE_NAWDS, 562 .mcast2ucast_set = WMI_10X_VDEV_PARAM_MCAST2UCAST_SET, 563 .enable_rtscts = WMI_10X_VDEV_PARAM_ENABLE_RTSCTS, 564 .txbf = WMI_VDEV_PARAM_UNSUPPORTED, 565 .packet_powersave = WMI_VDEV_PARAM_UNSUPPORTED, 566 .drop_unencry = WMI_VDEV_PARAM_UNSUPPORTED, 567 .tx_encap_type = WMI_VDEV_PARAM_UNSUPPORTED, 568 .ap_detect_out_of_sync_sleeping_sta_time_secs = 569 WMI_10X_VDEV_PARAM_AP_DETECT_OUT_OF_SYNC_SLEEPING_STA_TIME_SECS, 570 }; 571 572 static struct wmi_pdev_param_map wmi_pdev_param_map = { 573 .tx_chain_mask = WMI_PDEV_PARAM_TX_CHAIN_MASK, 574 .rx_chain_mask = WMI_PDEV_PARAM_RX_CHAIN_MASK, 575 .txpower_limit2g = WMI_PDEV_PARAM_TXPOWER_LIMIT2G, 576 .txpower_limit5g = WMI_PDEV_PARAM_TXPOWER_LIMIT5G, 577 .txpower_scale = WMI_PDEV_PARAM_TXPOWER_SCALE, 578 .beacon_gen_mode = WMI_PDEV_PARAM_BEACON_GEN_MODE, 579 .beacon_tx_mode = WMI_PDEV_PARAM_BEACON_TX_MODE, 580 .resmgr_offchan_mode = WMI_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 581 .protection_mode = WMI_PDEV_PARAM_PROTECTION_MODE, 582 .dynamic_bw = WMI_PDEV_PARAM_DYNAMIC_BW, 583 .non_agg_sw_retry_th = WMI_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 584 .agg_sw_retry_th = WMI_PDEV_PARAM_AGG_SW_RETRY_TH, 585 .sta_kickout_th = WMI_PDEV_PARAM_STA_KICKOUT_TH, 586 .ac_aggrsize_scaling = WMI_PDEV_PARAM_AC_AGGRSIZE_SCALING, 587 .ltr_enable = WMI_PDEV_PARAM_LTR_ENABLE, 588 .ltr_ac_latency_be = WMI_PDEV_PARAM_LTR_AC_LATENCY_BE, 589 .ltr_ac_latency_bk = WMI_PDEV_PARAM_LTR_AC_LATENCY_BK, 590 .ltr_ac_latency_vi = WMI_PDEV_PARAM_LTR_AC_LATENCY_VI, 591 .ltr_ac_latency_vo = WMI_PDEV_PARAM_LTR_AC_LATENCY_VO, 592 .ltr_ac_latency_timeout = WMI_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 593 .ltr_sleep_override = WMI_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 594 .ltr_rx_override = WMI_PDEV_PARAM_LTR_RX_OVERRIDE, 595 .ltr_tx_activity_timeout = WMI_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 596 .l1ss_enable = WMI_PDEV_PARAM_L1SS_ENABLE, 597 .dsleep_enable = WMI_PDEV_PARAM_DSLEEP_ENABLE, 598 .pcielp_txbuf_flush = WMI_PDEV_PARAM_PCIELP_TXBUF_FLUSH, 599 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 600 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_EN, 601 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_PCIELP_TXBUF_TMO_VALUE, 602 .pdev_stats_update_period = WMI_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 603 .vdev_stats_update_period = WMI_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 604 .peer_stats_update_period = WMI_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 605 .bcnflt_stats_update_period = WMI_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 606 .pmf_qos = WMI_PDEV_PARAM_PMF_QOS, 607 .arp_ac_override = WMI_PDEV_PARAM_ARP_AC_OVERRIDE, 608 .dcs = WMI_PDEV_PARAM_DCS, 609 .ani_enable = WMI_PDEV_PARAM_ANI_ENABLE, 610 .ani_poll_period = WMI_PDEV_PARAM_ANI_POLL_PERIOD, 611 .ani_listen_period = WMI_PDEV_PARAM_ANI_LISTEN_PERIOD, 612 .ani_ofdm_level = WMI_PDEV_PARAM_ANI_OFDM_LEVEL, 613 .ani_cck_level = WMI_PDEV_PARAM_ANI_CCK_LEVEL, 614 .dyntxchain = WMI_PDEV_PARAM_DYNTXCHAIN, 615 .proxy_sta = WMI_PDEV_PARAM_PROXY_STA, 616 .idle_ps_config = WMI_PDEV_PARAM_IDLE_PS_CONFIG, 617 .power_gating_sleep = WMI_PDEV_PARAM_POWER_GATING_SLEEP, 618 .fast_channel_reset = WMI_PDEV_PARAM_UNSUPPORTED, 619 .burst_dur = WMI_PDEV_PARAM_UNSUPPORTED, 620 .burst_enable = WMI_PDEV_PARAM_UNSUPPORTED, 621 .cal_period = WMI_PDEV_PARAM_UNSUPPORTED, 622 }; 623 624 static struct wmi_pdev_param_map wmi_10x_pdev_param_map = { 625 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, 626 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 627 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 628 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 629 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 630 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 631 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 632 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 633 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, 634 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, 635 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 636 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 637 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 638 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 639 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, 640 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 641 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 642 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 643 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 644 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 645 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 646 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 647 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 648 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, 649 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 650 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, 651 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, 652 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, 653 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, 654 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 655 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 656 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 657 .bcnflt_stats_update_period = 658 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 659 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, 660 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 661 .dcs = WMI_10X_PDEV_PARAM_DCS, 662 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, 663 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 664 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 665 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 666 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 667 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, 668 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, 669 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, 670 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, 671 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 672 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, 673 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, 674 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, 675 }; 676 677 static struct wmi_pdev_param_map wmi_10_2_4_pdev_param_map = { 678 .tx_chain_mask = WMI_10X_PDEV_PARAM_TX_CHAIN_MASK, 679 .rx_chain_mask = WMI_10X_PDEV_PARAM_RX_CHAIN_MASK, 680 .txpower_limit2g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT2G, 681 .txpower_limit5g = WMI_10X_PDEV_PARAM_TXPOWER_LIMIT5G, 682 .txpower_scale = WMI_10X_PDEV_PARAM_TXPOWER_SCALE, 683 .beacon_gen_mode = WMI_10X_PDEV_PARAM_BEACON_GEN_MODE, 684 .beacon_tx_mode = WMI_10X_PDEV_PARAM_BEACON_TX_MODE, 685 .resmgr_offchan_mode = WMI_10X_PDEV_PARAM_RESMGR_OFFCHAN_MODE, 686 .protection_mode = WMI_10X_PDEV_PARAM_PROTECTION_MODE, 687 .dynamic_bw = WMI_10X_PDEV_PARAM_DYNAMIC_BW, 688 .non_agg_sw_retry_th = WMI_10X_PDEV_PARAM_NON_AGG_SW_RETRY_TH, 689 .agg_sw_retry_th = WMI_10X_PDEV_PARAM_AGG_SW_RETRY_TH, 690 .sta_kickout_th = WMI_10X_PDEV_PARAM_STA_KICKOUT_TH, 691 .ac_aggrsize_scaling = WMI_10X_PDEV_PARAM_AC_AGGRSIZE_SCALING, 692 .ltr_enable = WMI_10X_PDEV_PARAM_LTR_ENABLE, 693 .ltr_ac_latency_be = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BE, 694 .ltr_ac_latency_bk = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_BK, 695 .ltr_ac_latency_vi = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VI, 696 .ltr_ac_latency_vo = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_VO, 697 .ltr_ac_latency_timeout = WMI_10X_PDEV_PARAM_LTR_AC_LATENCY_TIMEOUT, 698 .ltr_sleep_override = WMI_10X_PDEV_PARAM_LTR_SLEEP_OVERRIDE, 699 .ltr_rx_override = WMI_10X_PDEV_PARAM_LTR_RX_OVERRIDE, 700 .ltr_tx_activity_timeout = WMI_10X_PDEV_PARAM_LTR_TX_ACTIVITY_TIMEOUT, 701 .l1ss_enable = WMI_10X_PDEV_PARAM_L1SS_ENABLE, 702 .dsleep_enable = WMI_10X_PDEV_PARAM_DSLEEP_ENABLE, 703 .pcielp_txbuf_flush = WMI_PDEV_PARAM_UNSUPPORTED, 704 .pcielp_txbuf_watermark = WMI_PDEV_PARAM_UNSUPPORTED, 705 .pcielp_txbuf_tmo_en = WMI_PDEV_PARAM_UNSUPPORTED, 706 .pcielp_txbuf_tmo_value = WMI_PDEV_PARAM_UNSUPPORTED, 707 .pdev_stats_update_period = WMI_10X_PDEV_PARAM_PDEV_STATS_UPDATE_PERIOD, 708 .vdev_stats_update_period = WMI_10X_PDEV_PARAM_VDEV_STATS_UPDATE_PERIOD, 709 .peer_stats_update_period = WMI_10X_PDEV_PARAM_PEER_STATS_UPDATE_PERIOD, 710 .bcnflt_stats_update_period = 711 WMI_10X_PDEV_PARAM_BCNFLT_STATS_UPDATE_PERIOD, 712 .pmf_qos = WMI_10X_PDEV_PARAM_PMF_QOS, 713 .arp_ac_override = WMI_10X_PDEV_PARAM_ARPDHCP_AC_OVERRIDE, 714 .dcs = WMI_10X_PDEV_PARAM_DCS, 715 .ani_enable = WMI_10X_PDEV_PARAM_ANI_ENABLE, 716 .ani_poll_period = WMI_10X_PDEV_PARAM_ANI_POLL_PERIOD, 717 .ani_listen_period = WMI_10X_PDEV_PARAM_ANI_LISTEN_PERIOD, 718 .ani_ofdm_level = WMI_10X_PDEV_PARAM_ANI_OFDM_LEVEL, 719 .ani_cck_level = WMI_10X_PDEV_PARAM_ANI_CCK_LEVEL, 720 .dyntxchain = WMI_10X_PDEV_PARAM_DYNTXCHAIN, 721 .proxy_sta = WMI_PDEV_PARAM_UNSUPPORTED, 722 .idle_ps_config = WMI_PDEV_PARAM_UNSUPPORTED, 723 .power_gating_sleep = WMI_PDEV_PARAM_UNSUPPORTED, 724 .fast_channel_reset = WMI_10X_PDEV_PARAM_FAST_CHANNEL_RESET, 725 .burst_dur = WMI_10X_PDEV_PARAM_BURST_DUR, 726 .burst_enable = WMI_10X_PDEV_PARAM_BURST_ENABLE, 727 .cal_period = WMI_10X_PDEV_PARAM_CAL_PERIOD, 728 }; 729 730 /* firmware 10.2 specific mappings */ 731 static struct wmi_cmd_map wmi_10_2_cmd_map = { 732 .init_cmdid = WMI_10_2_INIT_CMDID, 733 .start_scan_cmdid = WMI_10_2_START_SCAN_CMDID, 734 .stop_scan_cmdid = WMI_10_2_STOP_SCAN_CMDID, 735 .scan_chan_list_cmdid = WMI_10_2_SCAN_CHAN_LIST_CMDID, 736 .scan_sch_prio_tbl_cmdid = WMI_CMD_UNSUPPORTED, 737 .pdev_set_regdomain_cmdid = WMI_10_2_PDEV_SET_REGDOMAIN_CMDID, 738 .pdev_set_channel_cmdid = WMI_10_2_PDEV_SET_CHANNEL_CMDID, 739 .pdev_set_param_cmdid = WMI_10_2_PDEV_SET_PARAM_CMDID, 740 .pdev_pktlog_enable_cmdid = WMI_10_2_PDEV_PKTLOG_ENABLE_CMDID, 741 .pdev_pktlog_disable_cmdid = WMI_10_2_PDEV_PKTLOG_DISABLE_CMDID, 742 .pdev_set_wmm_params_cmdid = WMI_10_2_PDEV_SET_WMM_PARAMS_CMDID, 743 .pdev_set_ht_cap_ie_cmdid = WMI_10_2_PDEV_SET_HT_CAP_IE_CMDID, 744 .pdev_set_vht_cap_ie_cmdid = WMI_10_2_PDEV_SET_VHT_CAP_IE_CMDID, 745 .pdev_set_quiet_mode_cmdid = WMI_10_2_PDEV_SET_QUIET_MODE_CMDID, 746 .pdev_green_ap_ps_enable_cmdid = WMI_10_2_PDEV_GREEN_AP_PS_ENABLE_CMDID, 747 .pdev_get_tpc_config_cmdid = WMI_10_2_PDEV_GET_TPC_CONFIG_CMDID, 748 .pdev_set_base_macaddr_cmdid = WMI_10_2_PDEV_SET_BASE_MACADDR_CMDID, 749 .vdev_create_cmdid = WMI_10_2_VDEV_CREATE_CMDID, 750 .vdev_delete_cmdid = WMI_10_2_VDEV_DELETE_CMDID, 751 .vdev_start_request_cmdid = WMI_10_2_VDEV_START_REQUEST_CMDID, 752 .vdev_restart_request_cmdid = WMI_10_2_VDEV_RESTART_REQUEST_CMDID, 753 .vdev_up_cmdid = WMI_10_2_VDEV_UP_CMDID, 754 .vdev_stop_cmdid = WMI_10_2_VDEV_STOP_CMDID, 755 .vdev_down_cmdid = WMI_10_2_VDEV_DOWN_CMDID, 756 .vdev_set_param_cmdid = WMI_10_2_VDEV_SET_PARAM_CMDID, 757 .vdev_install_key_cmdid = WMI_10_2_VDEV_INSTALL_KEY_CMDID, 758 .peer_create_cmdid = WMI_10_2_PEER_CREATE_CMDID, 759 .peer_delete_cmdid = WMI_10_2_PEER_DELETE_CMDID, 760 .peer_flush_tids_cmdid = WMI_10_2_PEER_FLUSH_TIDS_CMDID, 761 .peer_set_param_cmdid = WMI_10_2_PEER_SET_PARAM_CMDID, 762 .peer_assoc_cmdid = WMI_10_2_PEER_ASSOC_CMDID, 763 .peer_add_wds_entry_cmdid = WMI_10_2_PEER_ADD_WDS_ENTRY_CMDID, 764 .peer_remove_wds_entry_cmdid = WMI_10_2_PEER_REMOVE_WDS_ENTRY_CMDID, 765 .peer_mcast_group_cmdid = WMI_10_2_PEER_MCAST_GROUP_CMDID, 766 .bcn_tx_cmdid = WMI_10_2_BCN_TX_CMDID, 767 .pdev_send_bcn_cmdid = WMI_10_2_PDEV_SEND_BCN_CMDID, 768 .bcn_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 769 .bcn_filter_rx_cmdid = WMI_10_2_BCN_FILTER_RX_CMDID, 770 .prb_req_filter_rx_cmdid = WMI_10_2_PRB_REQ_FILTER_RX_CMDID, 771 .mgmt_tx_cmdid = WMI_10_2_MGMT_TX_CMDID, 772 .prb_tmpl_cmdid = WMI_CMD_UNSUPPORTED, 773 .addba_clear_resp_cmdid = WMI_10_2_ADDBA_CLEAR_RESP_CMDID, 774 .addba_send_cmdid = WMI_10_2_ADDBA_SEND_CMDID, 775 .addba_status_cmdid = WMI_10_2_ADDBA_STATUS_CMDID, 776 .delba_send_cmdid = WMI_10_2_DELBA_SEND_CMDID, 777 .addba_set_resp_cmdid = WMI_10_2_ADDBA_SET_RESP_CMDID, 778 .send_singleamsdu_cmdid = WMI_10_2_SEND_SINGLEAMSDU_CMDID, 779 .sta_powersave_mode_cmdid = WMI_10_2_STA_POWERSAVE_MODE_CMDID, 780 .sta_powersave_param_cmdid = WMI_10_2_STA_POWERSAVE_PARAM_CMDID, 781 .sta_mimo_ps_mode_cmdid = WMI_10_2_STA_MIMO_PS_MODE_CMDID, 782 .pdev_dfs_enable_cmdid = WMI_10_2_PDEV_DFS_ENABLE_CMDID, 783 .pdev_dfs_disable_cmdid = WMI_10_2_PDEV_DFS_DISABLE_CMDID, 784 .roam_scan_mode = WMI_10_2_ROAM_SCAN_MODE, 785 .roam_scan_rssi_threshold = WMI_10_2_ROAM_SCAN_RSSI_THRESHOLD, 786 .roam_scan_period = WMI_10_2_ROAM_SCAN_PERIOD, 787 .roam_scan_rssi_change_threshold = 788 WMI_10_2_ROAM_SCAN_RSSI_CHANGE_THRESHOLD, 789 .roam_ap_profile = WMI_10_2_ROAM_AP_PROFILE, 790 .ofl_scan_add_ap_profile = WMI_10_2_OFL_SCAN_ADD_AP_PROFILE, 791 .ofl_scan_remove_ap_profile = WMI_10_2_OFL_SCAN_REMOVE_AP_PROFILE, 792 .ofl_scan_period = WMI_10_2_OFL_SCAN_PERIOD, 793 .p2p_dev_set_device_info = WMI_10_2_P2P_DEV_SET_DEVICE_INFO, 794 .p2p_dev_set_discoverability = WMI_10_2_P2P_DEV_SET_DISCOVERABILITY, 795 .p2p_go_set_beacon_ie = WMI_10_2_P2P_GO_SET_BEACON_IE, 796 .p2p_go_set_probe_resp_ie = WMI_10_2_P2P_GO_SET_PROBE_RESP_IE, 797 .p2p_set_vendor_ie_data_cmdid = WMI_CMD_UNSUPPORTED, 798 .ap_ps_peer_param_cmdid = WMI_10_2_AP_PS_PEER_PARAM_CMDID, 799 .ap_ps_peer_uapsd_coex_cmdid = WMI_CMD_UNSUPPORTED, 800 .peer_rate_retry_sched_cmdid = WMI_10_2_PEER_RATE_RETRY_SCHED_CMDID, 801 .wlan_profile_trigger_cmdid = WMI_10_2_WLAN_PROFILE_TRIGGER_CMDID, 802 .wlan_profile_set_hist_intvl_cmdid = 803 WMI_10_2_WLAN_PROFILE_SET_HIST_INTVL_CMDID, 804 .wlan_profile_get_profile_data_cmdid = 805 WMI_10_2_WLAN_PROFILE_GET_PROFILE_DATA_CMDID, 806 .wlan_profile_enable_profile_id_cmdid = 807 WMI_10_2_WLAN_PROFILE_ENABLE_PROFILE_ID_CMDID, 808 .wlan_profile_list_profile_id_cmdid = 809 WMI_10_2_WLAN_PROFILE_LIST_PROFILE_ID_CMDID, 810 .pdev_suspend_cmdid = WMI_10_2_PDEV_SUSPEND_CMDID, 811 .pdev_resume_cmdid = WMI_10_2_PDEV_RESUME_CMDID, 812 .add_bcn_filter_cmdid = WMI_10_2_ADD_BCN_FILTER_CMDID, 813 .rmv_bcn_filter_cmdid = WMI_10_2_RMV_BCN_FILTER_CMDID, 814 .wow_add_wake_pattern_cmdid = WMI_10_2_WOW_ADD_WAKE_PATTERN_CMDID, 815 .wow_del_wake_pattern_cmdid = WMI_10_2_WOW_DEL_WAKE_PATTERN_CMDID, 816 .wow_enable_disable_wake_event_cmdid = 817 WMI_10_2_WOW_ENABLE_DISABLE_WAKE_EVENT_CMDID, 818 .wow_enable_cmdid = WMI_10_2_WOW_ENABLE_CMDID, 819 .wow_hostwakeup_from_sleep_cmdid = 820 WMI_10_2_WOW_HOSTWAKEUP_FROM_SLEEP_CMDID, 821 .rtt_measreq_cmdid = WMI_10_2_RTT_MEASREQ_CMDID, 822 .rtt_tsf_cmdid = WMI_10_2_RTT_TSF_CMDID, 823 .vdev_spectral_scan_configure_cmdid = 824 WMI_10_2_VDEV_SPECTRAL_SCAN_CONFIGURE_CMDID, 825 .vdev_spectral_scan_enable_cmdid = 826 WMI_10_2_VDEV_SPECTRAL_SCAN_ENABLE_CMDID, 827 .request_stats_cmdid = WMI_10_2_REQUEST_STATS_CMDID, 828 .set_arp_ns_offload_cmdid = WMI_CMD_UNSUPPORTED, 829 .network_list_offload_config_cmdid = WMI_CMD_UNSUPPORTED, 830 .gtk_offload_cmdid = WMI_CMD_UNSUPPORTED, 831 .csa_offload_enable_cmdid = WMI_CMD_UNSUPPORTED, 832 .csa_offload_chanswitch_cmdid = WMI_CMD_UNSUPPORTED, 833 .chatter_set_mode_cmdid = WMI_CMD_UNSUPPORTED, 834 .peer_tid_addba_cmdid = WMI_CMD_UNSUPPORTED, 835 .peer_tid_delba_cmdid = WMI_CMD_UNSUPPORTED, 836 .sta_dtim_ps_method_cmdid = WMI_CMD_UNSUPPORTED, 837 .sta_uapsd_auto_trig_cmdid = WMI_CMD_UNSUPPORTED, 838 .sta_keepalive_cmd = WMI_CMD_UNSUPPORTED, 839 .echo_cmdid = WMI_10_2_ECHO_CMDID, 840 .pdev_utf_cmdid = WMI_10_2_PDEV_UTF_CMDID, 841 .dbglog_cfg_cmdid = WMI_10_2_DBGLOG_CFG_CMDID, 842 .pdev_qvit_cmdid = WMI_10_2_PDEV_QVIT_CMDID, 843 .pdev_ftm_intg_cmdid = WMI_CMD_UNSUPPORTED, 844 .vdev_set_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 845 .vdev_get_keepalive_cmdid = WMI_CMD_UNSUPPORTED, 846 .force_fw_hang_cmdid = WMI_CMD_UNSUPPORTED, 847 .gpio_config_cmdid = WMI_10_2_GPIO_CONFIG_CMDID, 848 .gpio_output_cmdid = WMI_10_2_GPIO_OUTPUT_CMDID, 849 .pdev_get_temperature_cmdid = WMI_CMD_UNSUPPORTED, 850 }; 851 852 void ath10k_wmi_put_wmi_channel(struct wmi_channel *ch, 853 const struct wmi_channel_arg *arg) 854 { 855 u32 flags = 0; 856 857 memset(ch, 0, sizeof(*ch)); 858 859 if (arg->passive) 860 flags |= WMI_CHAN_FLAG_PASSIVE; 861 if (arg->allow_ibss) 862 flags |= WMI_CHAN_FLAG_ADHOC_ALLOWED; 863 if (arg->allow_ht) 864 flags |= WMI_CHAN_FLAG_ALLOW_HT; 865 if (arg->allow_vht) 866 flags |= WMI_CHAN_FLAG_ALLOW_VHT; 867 if (arg->ht40plus) 868 flags |= WMI_CHAN_FLAG_HT40_PLUS; 869 if (arg->chan_radar) 870 flags |= WMI_CHAN_FLAG_DFS; 871 872 ch->mhz = __cpu_to_le32(arg->freq); 873 ch->band_center_freq1 = __cpu_to_le32(arg->band_center_freq1); 874 ch->band_center_freq2 = 0; 875 ch->min_power = arg->min_power; 876 ch->max_power = arg->max_power; 877 ch->reg_power = arg->max_reg_power; 878 ch->antenna_max = arg->max_antenna_gain; 879 880 /* mode & flags share storage */ 881 ch->mode = arg->mode; 882 ch->flags |= __cpu_to_le32(flags); 883 } 884 885 int ath10k_wmi_wait_for_service_ready(struct ath10k *ar) 886 { 887 int ret; 888 889 ret = wait_for_completion_timeout(&ar->wmi.service_ready, 890 WMI_SERVICE_READY_TIMEOUT_HZ); 891 return ret; 892 } 893 894 int ath10k_wmi_wait_for_unified_ready(struct ath10k *ar) 895 { 896 int ret; 897 898 ret = wait_for_completion_timeout(&ar->wmi.unified_ready, 899 WMI_UNIFIED_READY_TIMEOUT_HZ); 900 return ret; 901 } 902 903 struct sk_buff *ath10k_wmi_alloc_skb(struct ath10k *ar, u32 len) 904 { 905 struct sk_buff *skb; 906 u32 round_len = roundup(len, 4); 907 908 skb = ath10k_htc_alloc_skb(ar, WMI_SKB_HEADROOM + round_len); 909 if (!skb) 910 return NULL; 911 912 skb_reserve(skb, WMI_SKB_HEADROOM); 913 if (!IS_ALIGNED((unsigned long)skb->data, 4)) 914 ath10k_warn(ar, "Unaligned WMI skb\n"); 915 916 skb_put(skb, round_len); 917 memset(skb->data, 0, round_len); 918 919 return skb; 920 } 921 922 static void ath10k_wmi_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb) 923 { 924 dev_kfree_skb(skb); 925 } 926 927 int ath10k_wmi_cmd_send_nowait(struct ath10k *ar, struct sk_buff *skb, 928 u32 cmd_id) 929 { 930 struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb); 931 struct wmi_cmd_hdr *cmd_hdr; 932 int ret; 933 u32 cmd = 0; 934 935 if (skb_push(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 936 return -ENOMEM; 937 938 cmd |= SM(cmd_id, WMI_CMD_HDR_CMD_ID); 939 940 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 941 cmd_hdr->cmd_id = __cpu_to_le32(cmd); 942 943 memset(skb_cb, 0, sizeof(*skb_cb)); 944 ret = ath10k_htc_send(&ar->htc, ar->wmi.eid, skb); 945 trace_ath10k_wmi_cmd(ar, cmd_id, skb->data, skb->len, ret); 946 947 if (ret) 948 goto err_pull; 949 950 return 0; 951 952 err_pull: 953 skb_pull(skb, sizeof(struct wmi_cmd_hdr)); 954 return ret; 955 } 956 957 static void ath10k_wmi_tx_beacon_nowait(struct ath10k_vif *arvif) 958 { 959 struct ath10k *ar = arvif->ar; 960 struct ath10k_skb_cb *cb; 961 struct sk_buff *bcn; 962 int ret; 963 964 spin_lock_bh(&ar->data_lock); 965 966 bcn = arvif->beacon; 967 968 if (!bcn) 969 goto unlock; 970 971 cb = ATH10K_SKB_CB(bcn); 972 973 switch (arvif->beacon_state) { 974 case ATH10K_BEACON_SENDING: 975 case ATH10K_BEACON_SENT: 976 break; 977 case ATH10K_BEACON_SCHEDULED: 978 arvif->beacon_state = ATH10K_BEACON_SENDING; 979 spin_unlock_bh(&ar->data_lock); 980 981 ret = ath10k_wmi_beacon_send_ref_nowait(arvif->ar, 982 arvif->vdev_id, 983 bcn->data, bcn->len, 984 cb->paddr, 985 cb->bcn.dtim_zero, 986 cb->bcn.deliver_cab); 987 988 spin_lock_bh(&ar->data_lock); 989 990 if (ret == 0) 991 arvif->beacon_state = ATH10K_BEACON_SENT; 992 else 993 arvif->beacon_state = ATH10K_BEACON_SCHEDULED; 994 } 995 996 unlock: 997 spin_unlock_bh(&ar->data_lock); 998 } 999 1000 static void ath10k_wmi_tx_beacons_iter(void *data, u8 *mac, 1001 struct ieee80211_vif *vif) 1002 { 1003 struct ath10k_vif *arvif = ath10k_vif_to_arvif(vif); 1004 1005 ath10k_wmi_tx_beacon_nowait(arvif); 1006 } 1007 1008 static void ath10k_wmi_tx_beacons_nowait(struct ath10k *ar) 1009 { 1010 ieee80211_iterate_active_interfaces_atomic(ar->hw, 1011 IEEE80211_IFACE_ITER_NORMAL, 1012 ath10k_wmi_tx_beacons_iter, 1013 NULL); 1014 } 1015 1016 static void ath10k_wmi_op_ep_tx_credits(struct ath10k *ar) 1017 { 1018 /* try to send pending beacons first. they take priority */ 1019 ath10k_wmi_tx_beacons_nowait(ar); 1020 1021 wake_up(&ar->wmi.tx_credits_wq); 1022 } 1023 1024 int ath10k_wmi_cmd_send(struct ath10k *ar, struct sk_buff *skb, u32 cmd_id) 1025 { 1026 int ret = -EOPNOTSUPP; 1027 1028 might_sleep(); 1029 1030 if (cmd_id == WMI_CMD_UNSUPPORTED) { 1031 ath10k_warn(ar, "wmi command %d is not supported by firmware\n", 1032 cmd_id); 1033 return ret; 1034 } 1035 1036 wait_event_timeout(ar->wmi.tx_credits_wq, ({ 1037 /* try to send pending beacons first. they take priority */ 1038 ath10k_wmi_tx_beacons_nowait(ar); 1039 1040 ret = ath10k_wmi_cmd_send_nowait(ar, skb, cmd_id); 1041 1042 if (ret && test_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags)) 1043 ret = -ESHUTDOWN; 1044 1045 (ret != -EAGAIN); 1046 }), 3*HZ); 1047 1048 if (ret) 1049 dev_kfree_skb_any(skb); 1050 1051 return ret; 1052 } 1053 1054 static struct sk_buff * 1055 ath10k_wmi_op_gen_mgmt_tx(struct ath10k *ar, struct sk_buff *msdu) 1056 { 1057 struct wmi_mgmt_tx_cmd *cmd; 1058 struct ieee80211_hdr *hdr; 1059 struct sk_buff *skb; 1060 int len; 1061 u32 buf_len = msdu->len; 1062 u16 fc; 1063 1064 hdr = (struct ieee80211_hdr *)msdu->data; 1065 fc = le16_to_cpu(hdr->frame_control); 1066 1067 if (WARN_ON_ONCE(!ieee80211_is_mgmt(hdr->frame_control))) 1068 return ERR_PTR(-EINVAL); 1069 1070 len = sizeof(cmd->hdr) + msdu->len; 1071 1072 if ((ieee80211_is_action(hdr->frame_control) || 1073 ieee80211_is_deauth(hdr->frame_control) || 1074 ieee80211_is_disassoc(hdr->frame_control)) && 1075 ieee80211_has_protected(hdr->frame_control)) { 1076 len += IEEE80211_CCMP_MIC_LEN; 1077 buf_len += IEEE80211_CCMP_MIC_LEN; 1078 } 1079 1080 len = round_up(len, 4); 1081 1082 skb = ath10k_wmi_alloc_skb(ar, len); 1083 if (!skb) 1084 return ERR_PTR(-ENOMEM); 1085 1086 cmd = (struct wmi_mgmt_tx_cmd *)skb->data; 1087 1088 cmd->hdr.vdev_id = __cpu_to_le32(ATH10K_SKB_CB(msdu)->vdev_id); 1089 cmd->hdr.tx_rate = 0; 1090 cmd->hdr.tx_power = 0; 1091 cmd->hdr.buf_len = __cpu_to_le32(buf_len); 1092 1093 ether_addr_copy(cmd->hdr.peer_macaddr.addr, ieee80211_get_DA(hdr)); 1094 memcpy(cmd->buf, msdu->data, msdu->len); 1095 1096 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi mgmt tx skb %p len %d ftype %02x stype %02x\n", 1097 msdu, skb->len, fc & IEEE80211_FCTL_FTYPE, 1098 fc & IEEE80211_FCTL_STYPE); 1099 trace_ath10k_tx_hdr(ar, skb->data, skb->len); 1100 trace_ath10k_tx_payload(ar, skb->data, skb->len); 1101 1102 return skb; 1103 } 1104 1105 static void ath10k_wmi_event_scan_started(struct ath10k *ar) 1106 { 1107 lockdep_assert_held(&ar->data_lock); 1108 1109 switch (ar->scan.state) { 1110 case ATH10K_SCAN_IDLE: 1111 case ATH10K_SCAN_RUNNING: 1112 case ATH10K_SCAN_ABORTING: 1113 ath10k_warn(ar, "received scan started event in an invalid scan state: %s (%d)\n", 1114 ath10k_scan_state_str(ar->scan.state), 1115 ar->scan.state); 1116 break; 1117 case ATH10K_SCAN_STARTING: 1118 ar->scan.state = ATH10K_SCAN_RUNNING; 1119 1120 if (ar->scan.is_roc) 1121 ieee80211_ready_on_channel(ar->hw); 1122 1123 complete(&ar->scan.started); 1124 break; 1125 } 1126 } 1127 1128 static void ath10k_wmi_event_scan_completed(struct ath10k *ar) 1129 { 1130 lockdep_assert_held(&ar->data_lock); 1131 1132 switch (ar->scan.state) { 1133 case ATH10K_SCAN_IDLE: 1134 case ATH10K_SCAN_STARTING: 1135 /* One suspected reason scan can be completed while starting is 1136 * if firmware fails to deliver all scan events to the host, 1137 * e.g. when transport pipe is full. This has been observed 1138 * with spectral scan phyerr events starving wmi transport 1139 * pipe. In such case the "scan completed" event should be (and 1140 * is) ignored by the host as it may be just firmware's scan 1141 * state machine recovering. 1142 */ 1143 ath10k_warn(ar, "received scan completed event in an invalid scan state: %s (%d)\n", 1144 ath10k_scan_state_str(ar->scan.state), 1145 ar->scan.state); 1146 break; 1147 case ATH10K_SCAN_RUNNING: 1148 case ATH10K_SCAN_ABORTING: 1149 __ath10k_scan_finish(ar); 1150 break; 1151 } 1152 } 1153 1154 static void ath10k_wmi_event_scan_bss_chan(struct ath10k *ar) 1155 { 1156 lockdep_assert_held(&ar->data_lock); 1157 1158 switch (ar->scan.state) { 1159 case ATH10K_SCAN_IDLE: 1160 case ATH10K_SCAN_STARTING: 1161 ath10k_warn(ar, "received scan bss chan event in an invalid scan state: %s (%d)\n", 1162 ath10k_scan_state_str(ar->scan.state), 1163 ar->scan.state); 1164 break; 1165 case ATH10K_SCAN_RUNNING: 1166 case ATH10K_SCAN_ABORTING: 1167 ar->scan_channel = NULL; 1168 break; 1169 } 1170 } 1171 1172 static void ath10k_wmi_event_scan_foreign_chan(struct ath10k *ar, u32 freq) 1173 { 1174 lockdep_assert_held(&ar->data_lock); 1175 1176 switch (ar->scan.state) { 1177 case ATH10K_SCAN_IDLE: 1178 case ATH10K_SCAN_STARTING: 1179 ath10k_warn(ar, "received scan foreign chan event in an invalid scan state: %s (%d)\n", 1180 ath10k_scan_state_str(ar->scan.state), 1181 ar->scan.state); 1182 break; 1183 case ATH10K_SCAN_RUNNING: 1184 case ATH10K_SCAN_ABORTING: 1185 ar->scan_channel = ieee80211_get_channel(ar->hw->wiphy, freq); 1186 1187 if (ar->scan.is_roc && ar->scan.roc_freq == freq) 1188 complete(&ar->scan.on_channel); 1189 break; 1190 } 1191 } 1192 1193 static const char * 1194 ath10k_wmi_event_scan_type_str(enum wmi_scan_event_type type, 1195 enum wmi_scan_completion_reason reason) 1196 { 1197 switch (type) { 1198 case WMI_SCAN_EVENT_STARTED: 1199 return "started"; 1200 case WMI_SCAN_EVENT_COMPLETED: 1201 switch (reason) { 1202 case WMI_SCAN_REASON_COMPLETED: 1203 return "completed"; 1204 case WMI_SCAN_REASON_CANCELLED: 1205 return "completed [cancelled]"; 1206 case WMI_SCAN_REASON_PREEMPTED: 1207 return "completed [preempted]"; 1208 case WMI_SCAN_REASON_TIMEDOUT: 1209 return "completed [timedout]"; 1210 case WMI_SCAN_REASON_MAX: 1211 break; 1212 } 1213 return "completed [unknown]"; 1214 case WMI_SCAN_EVENT_BSS_CHANNEL: 1215 return "bss channel"; 1216 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 1217 return "foreign channel"; 1218 case WMI_SCAN_EVENT_DEQUEUED: 1219 return "dequeued"; 1220 case WMI_SCAN_EVENT_PREEMPTED: 1221 return "preempted"; 1222 case WMI_SCAN_EVENT_START_FAILED: 1223 return "start failed"; 1224 default: 1225 return "unknown"; 1226 } 1227 } 1228 1229 static int ath10k_wmi_op_pull_scan_ev(struct ath10k *ar, struct sk_buff *skb, 1230 struct wmi_scan_ev_arg *arg) 1231 { 1232 struct wmi_scan_event *ev = (void *)skb->data; 1233 1234 if (skb->len < sizeof(*ev)) 1235 return -EPROTO; 1236 1237 skb_pull(skb, sizeof(*ev)); 1238 arg->event_type = ev->event_type; 1239 arg->reason = ev->reason; 1240 arg->channel_freq = ev->channel_freq; 1241 arg->scan_req_id = ev->scan_req_id; 1242 arg->scan_id = ev->scan_id; 1243 arg->vdev_id = ev->vdev_id; 1244 1245 return 0; 1246 } 1247 1248 int ath10k_wmi_event_scan(struct ath10k *ar, struct sk_buff *skb) 1249 { 1250 struct wmi_scan_ev_arg arg = {}; 1251 enum wmi_scan_event_type event_type; 1252 enum wmi_scan_completion_reason reason; 1253 u32 freq; 1254 u32 req_id; 1255 u32 scan_id; 1256 u32 vdev_id; 1257 int ret; 1258 1259 ret = ath10k_wmi_pull_scan(ar, skb, &arg); 1260 if (ret) { 1261 ath10k_warn(ar, "failed to parse scan event: %d\n", ret); 1262 return ret; 1263 } 1264 1265 event_type = __le32_to_cpu(arg.event_type); 1266 reason = __le32_to_cpu(arg.reason); 1267 freq = __le32_to_cpu(arg.channel_freq); 1268 req_id = __le32_to_cpu(arg.scan_req_id); 1269 scan_id = __le32_to_cpu(arg.scan_id); 1270 vdev_id = __le32_to_cpu(arg.vdev_id); 1271 1272 spin_lock_bh(&ar->data_lock); 1273 1274 ath10k_dbg(ar, ATH10K_DBG_WMI, 1275 "scan event %s type %d reason %d freq %d req_id %d scan_id %d vdev_id %d state %s (%d)\n", 1276 ath10k_wmi_event_scan_type_str(event_type, reason), 1277 event_type, reason, freq, req_id, scan_id, vdev_id, 1278 ath10k_scan_state_str(ar->scan.state), ar->scan.state); 1279 1280 switch (event_type) { 1281 case WMI_SCAN_EVENT_STARTED: 1282 ath10k_wmi_event_scan_started(ar); 1283 break; 1284 case WMI_SCAN_EVENT_COMPLETED: 1285 ath10k_wmi_event_scan_completed(ar); 1286 break; 1287 case WMI_SCAN_EVENT_BSS_CHANNEL: 1288 ath10k_wmi_event_scan_bss_chan(ar); 1289 break; 1290 case WMI_SCAN_EVENT_FOREIGN_CHANNEL: 1291 ath10k_wmi_event_scan_foreign_chan(ar, freq); 1292 break; 1293 case WMI_SCAN_EVENT_START_FAILED: 1294 ath10k_warn(ar, "received scan start failure event\n"); 1295 break; 1296 case WMI_SCAN_EVENT_DEQUEUED: 1297 case WMI_SCAN_EVENT_PREEMPTED: 1298 default: 1299 break; 1300 } 1301 1302 spin_unlock_bh(&ar->data_lock); 1303 return 0; 1304 } 1305 1306 static inline enum ieee80211_band phy_mode_to_band(u32 phy_mode) 1307 { 1308 enum ieee80211_band band; 1309 1310 switch (phy_mode) { 1311 case MODE_11A: 1312 case MODE_11NA_HT20: 1313 case MODE_11NA_HT40: 1314 case MODE_11AC_VHT20: 1315 case MODE_11AC_VHT40: 1316 case MODE_11AC_VHT80: 1317 band = IEEE80211_BAND_5GHZ; 1318 break; 1319 case MODE_11G: 1320 case MODE_11B: 1321 case MODE_11GONLY: 1322 case MODE_11NG_HT20: 1323 case MODE_11NG_HT40: 1324 case MODE_11AC_VHT20_2G: 1325 case MODE_11AC_VHT40_2G: 1326 case MODE_11AC_VHT80_2G: 1327 default: 1328 band = IEEE80211_BAND_2GHZ; 1329 } 1330 1331 return band; 1332 } 1333 1334 static inline u8 get_rate_idx(u32 rate, enum ieee80211_band band) 1335 { 1336 u8 rate_idx = 0; 1337 1338 /* rate in Kbps */ 1339 switch (rate) { 1340 case 1000: 1341 rate_idx = 0; 1342 break; 1343 case 2000: 1344 rate_idx = 1; 1345 break; 1346 case 5500: 1347 rate_idx = 2; 1348 break; 1349 case 11000: 1350 rate_idx = 3; 1351 break; 1352 case 6000: 1353 rate_idx = 4; 1354 break; 1355 case 9000: 1356 rate_idx = 5; 1357 break; 1358 case 12000: 1359 rate_idx = 6; 1360 break; 1361 case 18000: 1362 rate_idx = 7; 1363 break; 1364 case 24000: 1365 rate_idx = 8; 1366 break; 1367 case 36000: 1368 rate_idx = 9; 1369 break; 1370 case 48000: 1371 rate_idx = 10; 1372 break; 1373 case 54000: 1374 rate_idx = 11; 1375 break; 1376 default: 1377 break; 1378 } 1379 1380 if (band == IEEE80211_BAND_5GHZ) { 1381 if (rate_idx > 3) 1382 /* Omit CCK rates */ 1383 rate_idx -= 4; 1384 else 1385 rate_idx = 0; 1386 } 1387 1388 return rate_idx; 1389 } 1390 1391 /* If keys are configured, HW decrypts all frames 1392 * with protected bit set. Mark such frames as decrypted. 1393 */ 1394 static void ath10k_wmi_handle_wep_reauth(struct ath10k *ar, 1395 struct sk_buff *skb, 1396 struct ieee80211_rx_status *status) 1397 { 1398 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1399 unsigned int hdrlen; 1400 bool peer_key; 1401 u8 *addr, keyidx; 1402 1403 if (!ieee80211_is_auth(hdr->frame_control) || 1404 !ieee80211_has_protected(hdr->frame_control)) 1405 return; 1406 1407 hdrlen = ieee80211_hdrlen(hdr->frame_control); 1408 if (skb->len < (hdrlen + IEEE80211_WEP_IV_LEN)) 1409 return; 1410 1411 keyidx = skb->data[hdrlen + (IEEE80211_WEP_IV_LEN - 1)] >> WEP_KEYID_SHIFT; 1412 addr = ieee80211_get_SA(hdr); 1413 1414 spin_lock_bh(&ar->data_lock); 1415 peer_key = ath10k_mac_is_peer_wep_key_set(ar, addr, keyidx); 1416 spin_unlock_bh(&ar->data_lock); 1417 1418 if (peer_key) { 1419 ath10k_dbg(ar, ATH10K_DBG_MAC, 1420 "mac wep key present for peer %pM\n", addr); 1421 status->flag |= RX_FLAG_DECRYPTED; 1422 } 1423 } 1424 1425 static int ath10k_wmi_op_pull_mgmt_rx_ev(struct ath10k *ar, struct sk_buff *skb, 1426 struct wmi_mgmt_rx_ev_arg *arg) 1427 { 1428 struct wmi_mgmt_rx_event_v1 *ev_v1; 1429 struct wmi_mgmt_rx_event_v2 *ev_v2; 1430 struct wmi_mgmt_rx_hdr_v1 *ev_hdr; 1431 size_t pull_len; 1432 u32 msdu_len; 1433 1434 if (test_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features)) { 1435 ev_v2 = (struct wmi_mgmt_rx_event_v2 *)skb->data; 1436 ev_hdr = &ev_v2->hdr.v1; 1437 pull_len = sizeof(*ev_v2); 1438 } else { 1439 ev_v1 = (struct wmi_mgmt_rx_event_v1 *)skb->data; 1440 ev_hdr = &ev_v1->hdr; 1441 pull_len = sizeof(*ev_v1); 1442 } 1443 1444 if (skb->len < pull_len) 1445 return -EPROTO; 1446 1447 skb_pull(skb, pull_len); 1448 arg->channel = ev_hdr->channel; 1449 arg->buf_len = ev_hdr->buf_len; 1450 arg->status = ev_hdr->status; 1451 arg->snr = ev_hdr->snr; 1452 arg->phy_mode = ev_hdr->phy_mode; 1453 arg->rate = ev_hdr->rate; 1454 1455 msdu_len = __le32_to_cpu(arg->buf_len); 1456 if (skb->len < msdu_len) 1457 return -EPROTO; 1458 1459 /* the WMI buffer might've ended up being padded to 4 bytes due to HTC 1460 * trailer with credit update. Trim the excess garbage. 1461 */ 1462 skb_trim(skb, msdu_len); 1463 1464 return 0; 1465 } 1466 1467 int ath10k_wmi_event_mgmt_rx(struct ath10k *ar, struct sk_buff *skb) 1468 { 1469 struct wmi_mgmt_rx_ev_arg arg = {}; 1470 struct ieee80211_rx_status *status = IEEE80211_SKB_RXCB(skb); 1471 struct ieee80211_hdr *hdr; 1472 u32 rx_status; 1473 u32 channel; 1474 u32 phy_mode; 1475 u32 snr; 1476 u32 rate; 1477 u32 buf_len; 1478 u16 fc; 1479 int ret; 1480 1481 ret = ath10k_wmi_pull_mgmt_rx(ar, skb, &arg); 1482 if (ret) { 1483 ath10k_warn(ar, "failed to parse mgmt rx event: %d\n", ret); 1484 return ret; 1485 } 1486 1487 channel = __le32_to_cpu(arg.channel); 1488 buf_len = __le32_to_cpu(arg.buf_len); 1489 rx_status = __le32_to_cpu(arg.status); 1490 snr = __le32_to_cpu(arg.snr); 1491 phy_mode = __le32_to_cpu(arg.phy_mode); 1492 rate = __le32_to_cpu(arg.rate); 1493 1494 memset(status, 0, sizeof(*status)); 1495 1496 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1497 "event mgmt rx status %08x\n", rx_status); 1498 1499 if (test_bit(ATH10K_CAC_RUNNING, &ar->dev_flags)) { 1500 dev_kfree_skb(skb); 1501 return 0; 1502 } 1503 1504 if (rx_status & WMI_RX_STATUS_ERR_DECRYPT) { 1505 dev_kfree_skb(skb); 1506 return 0; 1507 } 1508 1509 if (rx_status & WMI_RX_STATUS_ERR_KEY_CACHE_MISS) { 1510 dev_kfree_skb(skb); 1511 return 0; 1512 } 1513 1514 if (rx_status & WMI_RX_STATUS_ERR_CRC) { 1515 dev_kfree_skb(skb); 1516 return 0; 1517 } 1518 1519 if (rx_status & WMI_RX_STATUS_ERR_MIC) 1520 status->flag |= RX_FLAG_MMIC_ERROR; 1521 1522 /* Hardware can Rx CCK rates on 5GHz. In that case phy_mode is set to 1523 * MODE_11B. This means phy_mode is not a reliable source for the band 1524 * of mgmt rx. 1525 */ 1526 if (channel >= 1 && channel <= 14) { 1527 status->band = IEEE80211_BAND_2GHZ; 1528 } else if (channel >= 36 && channel <= 165) { 1529 status->band = IEEE80211_BAND_5GHZ; 1530 } else { 1531 /* Shouldn't happen unless list of advertised channels to 1532 * mac80211 has been changed. 1533 */ 1534 WARN_ON_ONCE(1); 1535 dev_kfree_skb(skb); 1536 return 0; 1537 } 1538 1539 if (phy_mode == MODE_11B && status->band == IEEE80211_BAND_5GHZ) 1540 ath10k_dbg(ar, ATH10K_DBG_MGMT, "wmi mgmt rx 11b (CCK) on 5GHz\n"); 1541 1542 status->freq = ieee80211_channel_to_frequency(channel, status->band); 1543 status->signal = snr + ATH10K_DEFAULT_NOISE_FLOOR; 1544 status->rate_idx = get_rate_idx(rate, status->band); 1545 1546 hdr = (struct ieee80211_hdr *)skb->data; 1547 fc = le16_to_cpu(hdr->frame_control); 1548 1549 ath10k_wmi_handle_wep_reauth(ar, skb, status); 1550 1551 /* FW delivers WEP Shared Auth frame with Protected Bit set and 1552 * encrypted payload. However in case of PMF it delivers decrypted 1553 * frames with Protected Bit set. */ 1554 if (ieee80211_has_protected(hdr->frame_control) && 1555 !ieee80211_is_auth(hdr->frame_control)) { 1556 status->flag |= RX_FLAG_DECRYPTED; 1557 1558 if (!ieee80211_is_action(hdr->frame_control) && 1559 !ieee80211_is_deauth(hdr->frame_control) && 1560 !ieee80211_is_disassoc(hdr->frame_control)) { 1561 status->flag |= RX_FLAG_IV_STRIPPED | 1562 RX_FLAG_MMIC_STRIPPED; 1563 hdr->frame_control = __cpu_to_le16(fc & 1564 ~IEEE80211_FCTL_PROTECTED); 1565 } 1566 } 1567 1568 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1569 "event mgmt rx skb %p len %d ftype %02x stype %02x\n", 1570 skb, skb->len, 1571 fc & IEEE80211_FCTL_FTYPE, fc & IEEE80211_FCTL_STYPE); 1572 1573 ath10k_dbg(ar, ATH10K_DBG_MGMT, 1574 "event mgmt rx freq %d band %d snr %d, rate_idx %d\n", 1575 status->freq, status->band, status->signal, 1576 status->rate_idx); 1577 1578 ieee80211_rx(ar->hw, skb); 1579 return 0; 1580 } 1581 1582 static int freq_to_idx(struct ath10k *ar, int freq) 1583 { 1584 struct ieee80211_supported_band *sband; 1585 int band, ch, idx = 0; 1586 1587 for (band = IEEE80211_BAND_2GHZ; band < IEEE80211_NUM_BANDS; band++) { 1588 sband = ar->hw->wiphy->bands[band]; 1589 if (!sband) 1590 continue; 1591 1592 for (ch = 0; ch < sband->n_channels; ch++, idx++) 1593 if (sband->channels[ch].center_freq == freq) 1594 goto exit; 1595 } 1596 1597 exit: 1598 return idx; 1599 } 1600 1601 static int ath10k_wmi_op_pull_ch_info_ev(struct ath10k *ar, struct sk_buff *skb, 1602 struct wmi_ch_info_ev_arg *arg) 1603 { 1604 struct wmi_chan_info_event *ev = (void *)skb->data; 1605 1606 if (skb->len < sizeof(*ev)) 1607 return -EPROTO; 1608 1609 skb_pull(skb, sizeof(*ev)); 1610 arg->err_code = ev->err_code; 1611 arg->freq = ev->freq; 1612 arg->cmd_flags = ev->cmd_flags; 1613 arg->noise_floor = ev->noise_floor; 1614 arg->rx_clear_count = ev->rx_clear_count; 1615 arg->cycle_count = ev->cycle_count; 1616 1617 return 0; 1618 } 1619 1620 void ath10k_wmi_event_chan_info(struct ath10k *ar, struct sk_buff *skb) 1621 { 1622 struct wmi_ch_info_ev_arg arg = {}; 1623 struct survey_info *survey; 1624 u32 err_code, freq, cmd_flags, noise_floor, rx_clear_count, cycle_count; 1625 int idx, ret; 1626 1627 ret = ath10k_wmi_pull_ch_info(ar, skb, &arg); 1628 if (ret) { 1629 ath10k_warn(ar, "failed to parse chan info event: %d\n", ret); 1630 return; 1631 } 1632 1633 err_code = __le32_to_cpu(arg.err_code); 1634 freq = __le32_to_cpu(arg.freq); 1635 cmd_flags = __le32_to_cpu(arg.cmd_flags); 1636 noise_floor = __le32_to_cpu(arg.noise_floor); 1637 rx_clear_count = __le32_to_cpu(arg.rx_clear_count); 1638 cycle_count = __le32_to_cpu(arg.cycle_count); 1639 1640 ath10k_dbg(ar, ATH10K_DBG_WMI, 1641 "chan info err_code %d freq %d cmd_flags %d noise_floor %d rx_clear_count %d cycle_count %d\n", 1642 err_code, freq, cmd_flags, noise_floor, rx_clear_count, 1643 cycle_count); 1644 1645 spin_lock_bh(&ar->data_lock); 1646 1647 switch (ar->scan.state) { 1648 case ATH10K_SCAN_IDLE: 1649 case ATH10K_SCAN_STARTING: 1650 ath10k_warn(ar, "received chan info event without a scan request, ignoring\n"); 1651 goto exit; 1652 case ATH10K_SCAN_RUNNING: 1653 case ATH10K_SCAN_ABORTING: 1654 break; 1655 } 1656 1657 idx = freq_to_idx(ar, freq); 1658 if (idx >= ARRAY_SIZE(ar->survey)) { 1659 ath10k_warn(ar, "chan info: invalid frequency %d (idx %d out of bounds)\n", 1660 freq, idx); 1661 goto exit; 1662 } 1663 1664 if (cmd_flags & WMI_CHAN_INFO_FLAG_COMPLETE) { 1665 /* During scanning chan info is reported twice for each 1666 * visited channel. The reported cycle count is global 1667 * and per-channel cycle count must be calculated */ 1668 1669 cycle_count -= ar->survey_last_cycle_count; 1670 rx_clear_count -= ar->survey_last_rx_clear_count; 1671 1672 survey = &ar->survey[idx]; 1673 survey->time = WMI_CHAN_INFO_MSEC(cycle_count); 1674 survey->time_rx = WMI_CHAN_INFO_MSEC(rx_clear_count); 1675 survey->noise = noise_floor; 1676 survey->filled = SURVEY_INFO_TIME | 1677 SURVEY_INFO_TIME_RX | 1678 SURVEY_INFO_NOISE_DBM; 1679 } 1680 1681 ar->survey_last_rx_clear_count = rx_clear_count; 1682 ar->survey_last_cycle_count = cycle_count; 1683 1684 exit: 1685 spin_unlock_bh(&ar->data_lock); 1686 } 1687 1688 void ath10k_wmi_event_echo(struct ath10k *ar, struct sk_buff *skb) 1689 { 1690 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ECHO_EVENTID\n"); 1691 } 1692 1693 int ath10k_wmi_event_debug_mesg(struct ath10k *ar, struct sk_buff *skb) 1694 { 1695 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event debug mesg len %d\n", 1696 skb->len); 1697 1698 trace_ath10k_wmi_dbglog(ar, skb->data, skb->len); 1699 1700 return 0; 1701 } 1702 1703 void ath10k_wmi_pull_pdev_stats_base(const struct wmi_pdev_stats_base *src, 1704 struct ath10k_fw_stats_pdev *dst) 1705 { 1706 dst->ch_noise_floor = __le32_to_cpu(src->chan_nf); 1707 dst->tx_frame_count = __le32_to_cpu(src->tx_frame_count); 1708 dst->rx_frame_count = __le32_to_cpu(src->rx_frame_count); 1709 dst->rx_clear_count = __le32_to_cpu(src->rx_clear_count); 1710 dst->cycle_count = __le32_to_cpu(src->cycle_count); 1711 dst->phy_err_count = __le32_to_cpu(src->phy_err_count); 1712 dst->chan_tx_power = __le32_to_cpu(src->chan_tx_pwr); 1713 } 1714 1715 void ath10k_wmi_pull_pdev_stats_tx(const struct wmi_pdev_stats_tx *src, 1716 struct ath10k_fw_stats_pdev *dst) 1717 { 1718 dst->comp_queued = __le32_to_cpu(src->comp_queued); 1719 dst->comp_delivered = __le32_to_cpu(src->comp_delivered); 1720 dst->msdu_enqued = __le32_to_cpu(src->msdu_enqued); 1721 dst->mpdu_enqued = __le32_to_cpu(src->mpdu_enqued); 1722 dst->wmm_drop = __le32_to_cpu(src->wmm_drop); 1723 dst->local_enqued = __le32_to_cpu(src->local_enqued); 1724 dst->local_freed = __le32_to_cpu(src->local_freed); 1725 dst->hw_queued = __le32_to_cpu(src->hw_queued); 1726 dst->hw_reaped = __le32_to_cpu(src->hw_reaped); 1727 dst->underrun = __le32_to_cpu(src->underrun); 1728 dst->tx_abort = __le32_to_cpu(src->tx_abort); 1729 dst->mpdus_requed = __le32_to_cpu(src->mpdus_requed); 1730 dst->tx_ko = __le32_to_cpu(src->tx_ko); 1731 dst->data_rc = __le32_to_cpu(src->data_rc); 1732 dst->self_triggers = __le32_to_cpu(src->self_triggers); 1733 dst->sw_retry_failure = __le32_to_cpu(src->sw_retry_failure); 1734 dst->illgl_rate_phy_err = __le32_to_cpu(src->illgl_rate_phy_err); 1735 dst->pdev_cont_xretry = __le32_to_cpu(src->pdev_cont_xretry); 1736 dst->pdev_tx_timeout = __le32_to_cpu(src->pdev_tx_timeout); 1737 dst->pdev_resets = __le32_to_cpu(src->pdev_resets); 1738 dst->phy_underrun = __le32_to_cpu(src->phy_underrun); 1739 dst->txop_ovf = __le32_to_cpu(src->txop_ovf); 1740 } 1741 1742 void ath10k_wmi_pull_pdev_stats_rx(const struct wmi_pdev_stats_rx *src, 1743 struct ath10k_fw_stats_pdev *dst) 1744 { 1745 dst->mid_ppdu_route_change = __le32_to_cpu(src->mid_ppdu_route_change); 1746 dst->status_rcvd = __le32_to_cpu(src->status_rcvd); 1747 dst->r0_frags = __le32_to_cpu(src->r0_frags); 1748 dst->r1_frags = __le32_to_cpu(src->r1_frags); 1749 dst->r2_frags = __le32_to_cpu(src->r2_frags); 1750 dst->r3_frags = __le32_to_cpu(src->r3_frags); 1751 dst->htt_msdus = __le32_to_cpu(src->htt_msdus); 1752 dst->htt_mpdus = __le32_to_cpu(src->htt_mpdus); 1753 dst->loc_msdus = __le32_to_cpu(src->loc_msdus); 1754 dst->loc_mpdus = __le32_to_cpu(src->loc_mpdus); 1755 dst->oversize_amsdu = __le32_to_cpu(src->oversize_amsdu); 1756 dst->phy_errs = __le32_to_cpu(src->phy_errs); 1757 dst->phy_err_drop = __le32_to_cpu(src->phy_err_drop); 1758 dst->mpdu_errs = __le32_to_cpu(src->mpdu_errs); 1759 } 1760 1761 void ath10k_wmi_pull_pdev_stats_extra(const struct wmi_pdev_stats_extra *src, 1762 struct ath10k_fw_stats_pdev *dst) 1763 { 1764 dst->ack_rx_bad = __le32_to_cpu(src->ack_rx_bad); 1765 dst->rts_bad = __le32_to_cpu(src->rts_bad); 1766 dst->rts_good = __le32_to_cpu(src->rts_good); 1767 dst->fcs_bad = __le32_to_cpu(src->fcs_bad); 1768 dst->no_beacons = __le32_to_cpu(src->no_beacons); 1769 dst->mib_int_count = __le32_to_cpu(src->mib_int_count); 1770 } 1771 1772 void ath10k_wmi_pull_peer_stats(const struct wmi_peer_stats *src, 1773 struct ath10k_fw_stats_peer *dst) 1774 { 1775 ether_addr_copy(dst->peer_macaddr, src->peer_macaddr.addr); 1776 dst->peer_rssi = __le32_to_cpu(src->peer_rssi); 1777 dst->peer_tx_rate = __le32_to_cpu(src->peer_tx_rate); 1778 } 1779 1780 static int ath10k_wmi_main_op_pull_fw_stats(struct ath10k *ar, 1781 struct sk_buff *skb, 1782 struct ath10k_fw_stats *stats) 1783 { 1784 const struct wmi_stats_event *ev = (void *)skb->data; 1785 u32 num_pdev_stats, num_vdev_stats, num_peer_stats; 1786 int i; 1787 1788 if (!skb_pull(skb, sizeof(*ev))) 1789 return -EPROTO; 1790 1791 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 1792 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 1793 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 1794 1795 for (i = 0; i < num_pdev_stats; i++) { 1796 const struct wmi_pdev_stats *src; 1797 struct ath10k_fw_stats_pdev *dst; 1798 1799 src = (void *)skb->data; 1800 if (!skb_pull(skb, sizeof(*src))) 1801 return -EPROTO; 1802 1803 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1804 if (!dst) 1805 continue; 1806 1807 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 1808 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 1809 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 1810 1811 list_add_tail(&dst->list, &stats->pdevs); 1812 } 1813 1814 /* fw doesn't implement vdev stats */ 1815 1816 for (i = 0; i < num_peer_stats; i++) { 1817 const struct wmi_peer_stats *src; 1818 struct ath10k_fw_stats_peer *dst; 1819 1820 src = (void *)skb->data; 1821 if (!skb_pull(skb, sizeof(*src))) 1822 return -EPROTO; 1823 1824 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1825 if (!dst) 1826 continue; 1827 1828 ath10k_wmi_pull_peer_stats(src, dst); 1829 list_add_tail(&dst->list, &stats->peers); 1830 } 1831 1832 return 0; 1833 } 1834 1835 static int ath10k_wmi_10x_op_pull_fw_stats(struct ath10k *ar, 1836 struct sk_buff *skb, 1837 struct ath10k_fw_stats *stats) 1838 { 1839 const struct wmi_stats_event *ev = (void *)skb->data; 1840 u32 num_pdev_stats, num_vdev_stats, num_peer_stats; 1841 int i; 1842 1843 if (!skb_pull(skb, sizeof(*ev))) 1844 return -EPROTO; 1845 1846 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 1847 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 1848 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 1849 1850 for (i = 0; i < num_pdev_stats; i++) { 1851 const struct wmi_10x_pdev_stats *src; 1852 struct ath10k_fw_stats_pdev *dst; 1853 1854 src = (void *)skb->data; 1855 if (!skb_pull(skb, sizeof(*src))) 1856 return -EPROTO; 1857 1858 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1859 if (!dst) 1860 continue; 1861 1862 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 1863 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 1864 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 1865 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 1866 1867 list_add_tail(&dst->list, &stats->pdevs); 1868 } 1869 1870 /* fw doesn't implement vdev stats */ 1871 1872 for (i = 0; i < num_peer_stats; i++) { 1873 const struct wmi_10x_peer_stats *src; 1874 struct ath10k_fw_stats_peer *dst; 1875 1876 src = (void *)skb->data; 1877 if (!skb_pull(skb, sizeof(*src))) 1878 return -EPROTO; 1879 1880 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1881 if (!dst) 1882 continue; 1883 1884 ath10k_wmi_pull_peer_stats(&src->old, dst); 1885 1886 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 1887 1888 list_add_tail(&dst->list, &stats->peers); 1889 } 1890 1891 return 0; 1892 } 1893 1894 static int ath10k_wmi_10_2_op_pull_fw_stats(struct ath10k *ar, 1895 struct sk_buff *skb, 1896 struct ath10k_fw_stats *stats) 1897 { 1898 const struct wmi_10_2_stats_event *ev = (void *)skb->data; 1899 u32 num_pdev_stats; 1900 u32 num_pdev_ext_stats; 1901 u32 num_vdev_stats; 1902 u32 num_peer_stats; 1903 int i; 1904 1905 if (!skb_pull(skb, sizeof(*ev))) 1906 return -EPROTO; 1907 1908 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 1909 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 1910 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 1911 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 1912 1913 for (i = 0; i < num_pdev_stats; i++) { 1914 const struct wmi_10_2_pdev_stats *src; 1915 struct ath10k_fw_stats_pdev *dst; 1916 1917 src = (void *)skb->data; 1918 if (!skb_pull(skb, sizeof(*src))) 1919 return -EPROTO; 1920 1921 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1922 if (!dst) 1923 continue; 1924 1925 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 1926 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 1927 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 1928 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 1929 /* FIXME: expose 10.2 specific values */ 1930 1931 list_add_tail(&dst->list, &stats->pdevs); 1932 } 1933 1934 for (i = 0; i < num_pdev_ext_stats; i++) { 1935 const struct wmi_10_2_pdev_ext_stats *src; 1936 1937 src = (void *)skb->data; 1938 if (!skb_pull(skb, sizeof(*src))) 1939 return -EPROTO; 1940 1941 /* FIXME: expose values to userspace 1942 * 1943 * Note: Even though this loop seems to do nothing it is 1944 * required to parse following sub-structures properly. 1945 */ 1946 } 1947 1948 /* fw doesn't implement vdev stats */ 1949 1950 for (i = 0; i < num_peer_stats; i++) { 1951 const struct wmi_10_2_peer_stats *src; 1952 struct ath10k_fw_stats_peer *dst; 1953 1954 src = (void *)skb->data; 1955 if (!skb_pull(skb, sizeof(*src))) 1956 return -EPROTO; 1957 1958 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 1959 if (!dst) 1960 continue; 1961 1962 ath10k_wmi_pull_peer_stats(&src->old, dst); 1963 1964 dst->peer_rx_rate = __le32_to_cpu(src->peer_rx_rate); 1965 /* FIXME: expose 10.2 specific values */ 1966 1967 list_add_tail(&dst->list, &stats->peers); 1968 } 1969 1970 return 0; 1971 } 1972 1973 static int ath10k_wmi_10_2_4_op_pull_fw_stats(struct ath10k *ar, 1974 struct sk_buff *skb, 1975 struct ath10k_fw_stats *stats) 1976 { 1977 const struct wmi_10_2_stats_event *ev = (void *)skb->data; 1978 u32 num_pdev_stats; 1979 u32 num_pdev_ext_stats; 1980 u32 num_vdev_stats; 1981 u32 num_peer_stats; 1982 int i; 1983 1984 if (!skb_pull(skb, sizeof(*ev))) 1985 return -EPROTO; 1986 1987 num_pdev_stats = __le32_to_cpu(ev->num_pdev_stats); 1988 num_pdev_ext_stats = __le32_to_cpu(ev->num_pdev_ext_stats); 1989 num_vdev_stats = __le32_to_cpu(ev->num_vdev_stats); 1990 num_peer_stats = __le32_to_cpu(ev->num_peer_stats); 1991 1992 for (i = 0; i < num_pdev_stats; i++) { 1993 const struct wmi_10_2_pdev_stats *src; 1994 struct ath10k_fw_stats_pdev *dst; 1995 1996 src = (void *)skb->data; 1997 if (!skb_pull(skb, sizeof(*src))) 1998 return -EPROTO; 1999 2000 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2001 if (!dst) 2002 continue; 2003 2004 ath10k_wmi_pull_pdev_stats_base(&src->base, dst); 2005 ath10k_wmi_pull_pdev_stats_tx(&src->tx, dst); 2006 ath10k_wmi_pull_pdev_stats_rx(&src->rx, dst); 2007 ath10k_wmi_pull_pdev_stats_extra(&src->extra, dst); 2008 /* FIXME: expose 10.2 specific values */ 2009 2010 list_add_tail(&dst->list, &stats->pdevs); 2011 } 2012 2013 for (i = 0; i < num_pdev_ext_stats; i++) { 2014 const struct wmi_10_2_pdev_ext_stats *src; 2015 2016 src = (void *)skb->data; 2017 if (!skb_pull(skb, sizeof(*src))) 2018 return -EPROTO; 2019 2020 /* FIXME: expose values to userspace 2021 * 2022 * Note: Even though this loop seems to do nothing it is 2023 * required to parse following sub-structures properly. 2024 */ 2025 } 2026 2027 /* fw doesn't implement vdev stats */ 2028 2029 for (i = 0; i < num_peer_stats; i++) { 2030 const struct wmi_10_2_4_peer_stats *src; 2031 struct ath10k_fw_stats_peer *dst; 2032 2033 src = (void *)skb->data; 2034 if (!skb_pull(skb, sizeof(*src))) 2035 return -EPROTO; 2036 2037 dst = kzalloc(sizeof(*dst), GFP_ATOMIC); 2038 if (!dst) 2039 continue; 2040 2041 ath10k_wmi_pull_peer_stats(&src->common.old, dst); 2042 2043 dst->peer_rx_rate = __le32_to_cpu(src->common.peer_rx_rate); 2044 /* FIXME: expose 10.2 specific values */ 2045 2046 list_add_tail(&dst->list, &stats->peers); 2047 } 2048 2049 return 0; 2050 } 2051 2052 void ath10k_wmi_event_update_stats(struct ath10k *ar, struct sk_buff *skb) 2053 { 2054 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_UPDATE_STATS_EVENTID\n"); 2055 ath10k_debug_fw_stats_process(ar, skb); 2056 } 2057 2058 static int 2059 ath10k_wmi_op_pull_vdev_start_ev(struct ath10k *ar, struct sk_buff *skb, 2060 struct wmi_vdev_start_ev_arg *arg) 2061 { 2062 struct wmi_vdev_start_response_event *ev = (void *)skb->data; 2063 2064 if (skb->len < sizeof(*ev)) 2065 return -EPROTO; 2066 2067 skb_pull(skb, sizeof(*ev)); 2068 arg->vdev_id = ev->vdev_id; 2069 arg->req_id = ev->req_id; 2070 arg->resp_type = ev->resp_type; 2071 arg->status = ev->status; 2072 2073 return 0; 2074 } 2075 2076 void ath10k_wmi_event_vdev_start_resp(struct ath10k *ar, struct sk_buff *skb) 2077 { 2078 struct wmi_vdev_start_ev_arg arg = {}; 2079 int ret; 2080 2081 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_START_RESP_EVENTID\n"); 2082 2083 ret = ath10k_wmi_pull_vdev_start(ar, skb, &arg); 2084 if (ret) { 2085 ath10k_warn(ar, "failed to parse vdev start event: %d\n", ret); 2086 return; 2087 } 2088 2089 if (WARN_ON(__le32_to_cpu(arg.status))) 2090 return; 2091 2092 complete(&ar->vdev_setup_done); 2093 } 2094 2095 void ath10k_wmi_event_vdev_stopped(struct ath10k *ar, struct sk_buff *skb) 2096 { 2097 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STOPPED_EVENTID\n"); 2098 complete(&ar->vdev_setup_done); 2099 } 2100 2101 static int 2102 ath10k_wmi_op_pull_peer_kick_ev(struct ath10k *ar, struct sk_buff *skb, 2103 struct wmi_peer_kick_ev_arg *arg) 2104 { 2105 struct wmi_peer_sta_kickout_event *ev = (void *)skb->data; 2106 2107 if (skb->len < sizeof(*ev)) 2108 return -EPROTO; 2109 2110 skb_pull(skb, sizeof(*ev)); 2111 arg->mac_addr = ev->peer_macaddr.addr; 2112 2113 return 0; 2114 } 2115 2116 void ath10k_wmi_event_peer_sta_kickout(struct ath10k *ar, struct sk_buff *skb) 2117 { 2118 struct wmi_peer_kick_ev_arg arg = {}; 2119 struct ieee80211_sta *sta; 2120 int ret; 2121 2122 ret = ath10k_wmi_pull_peer_kick(ar, skb, &arg); 2123 if (ret) { 2124 ath10k_warn(ar, "failed to parse peer kickout event: %d\n", 2125 ret); 2126 return; 2127 } 2128 2129 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi event peer sta kickout %pM\n", 2130 arg.mac_addr); 2131 2132 rcu_read_lock(); 2133 2134 sta = ieee80211_find_sta_by_ifaddr(ar->hw, arg.mac_addr, NULL); 2135 if (!sta) { 2136 ath10k_warn(ar, "Spurious quick kickout for STA %pM\n", 2137 arg.mac_addr); 2138 goto exit; 2139 } 2140 2141 ieee80211_report_low_ack(sta, 10); 2142 2143 exit: 2144 rcu_read_unlock(); 2145 } 2146 2147 /* 2148 * FIXME 2149 * 2150 * We don't report to mac80211 sleep state of connected 2151 * stations. Due to this mac80211 can't fill in TIM IE 2152 * correctly. 2153 * 2154 * I know of no way of getting nullfunc frames that contain 2155 * sleep transition from connected stations - these do not 2156 * seem to be sent from the target to the host. There also 2157 * doesn't seem to be a dedicated event for that. So the 2158 * only way left to do this would be to read tim_bitmap 2159 * during SWBA. 2160 * 2161 * We could probably try using tim_bitmap from SWBA to tell 2162 * mac80211 which stations are asleep and which are not. The 2163 * problem here is calling mac80211 functions so many times 2164 * could take too long and make us miss the time to submit 2165 * the beacon to the target. 2166 * 2167 * So as a workaround we try to extend the TIM IE if there 2168 * is unicast buffered for stations with aid > 7 and fill it 2169 * in ourselves. 2170 */ 2171 static void ath10k_wmi_update_tim(struct ath10k *ar, 2172 struct ath10k_vif *arvif, 2173 struct sk_buff *bcn, 2174 const struct wmi_tim_info *tim_info) 2175 { 2176 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)bcn->data; 2177 struct ieee80211_tim_ie *tim; 2178 u8 *ies, *ie; 2179 u8 ie_len, pvm_len; 2180 __le32 t; 2181 u32 v; 2182 2183 /* if next SWBA has no tim_changed the tim_bitmap is garbage. 2184 * we must copy the bitmap upon change and reuse it later */ 2185 if (__le32_to_cpu(tim_info->tim_changed)) { 2186 int i; 2187 2188 BUILD_BUG_ON(sizeof(arvif->u.ap.tim_bitmap) != 2189 sizeof(tim_info->tim_bitmap)); 2190 2191 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) { 2192 t = tim_info->tim_bitmap[i / 4]; 2193 v = __le32_to_cpu(t); 2194 arvif->u.ap.tim_bitmap[i] = (v >> ((i % 4) * 8)) & 0xFF; 2195 } 2196 2197 /* FW reports either length 0 or 16 2198 * so we calculate this on our own */ 2199 arvif->u.ap.tim_len = 0; 2200 for (i = 0; i < sizeof(arvif->u.ap.tim_bitmap); i++) 2201 if (arvif->u.ap.tim_bitmap[i]) 2202 arvif->u.ap.tim_len = i; 2203 2204 arvif->u.ap.tim_len++; 2205 } 2206 2207 ies = bcn->data; 2208 ies += ieee80211_hdrlen(hdr->frame_control); 2209 ies += 12; /* fixed parameters */ 2210 2211 ie = (u8 *)cfg80211_find_ie(WLAN_EID_TIM, ies, 2212 (u8 *)skb_tail_pointer(bcn) - ies); 2213 if (!ie) { 2214 if (arvif->vdev_type != WMI_VDEV_TYPE_IBSS) 2215 ath10k_warn(ar, "no tim ie found;\n"); 2216 return; 2217 } 2218 2219 tim = (void *)ie + 2; 2220 ie_len = ie[1]; 2221 pvm_len = ie_len - 3; /* exclude dtim count, dtim period, bmap ctl */ 2222 2223 if (pvm_len < arvif->u.ap.tim_len) { 2224 int expand_size = sizeof(arvif->u.ap.tim_bitmap) - pvm_len; 2225 int move_size = skb_tail_pointer(bcn) - (ie + 2 + ie_len); 2226 void *next_ie = ie + 2 + ie_len; 2227 2228 if (skb_put(bcn, expand_size)) { 2229 memmove(next_ie + expand_size, next_ie, move_size); 2230 2231 ie[1] += expand_size; 2232 ie_len += expand_size; 2233 pvm_len += expand_size; 2234 } else { 2235 ath10k_warn(ar, "tim expansion failed\n"); 2236 } 2237 } 2238 2239 if (pvm_len > sizeof(arvif->u.ap.tim_bitmap)) { 2240 ath10k_warn(ar, "tim pvm length is too great (%d)\n", pvm_len); 2241 return; 2242 } 2243 2244 tim->bitmap_ctrl = !!__le32_to_cpu(tim_info->tim_mcast); 2245 memcpy(tim->virtual_map, arvif->u.ap.tim_bitmap, pvm_len); 2246 2247 if (tim->dtim_count == 0) { 2248 ATH10K_SKB_CB(bcn)->bcn.dtim_zero = true; 2249 2250 if (__le32_to_cpu(tim_info->tim_mcast) == 1) 2251 ATH10K_SKB_CB(bcn)->bcn.deliver_cab = true; 2252 } 2253 2254 ath10k_dbg(ar, ATH10K_DBG_MGMT, "dtim %d/%d mcast %d pvmlen %d\n", 2255 tim->dtim_count, tim->dtim_period, 2256 tim->bitmap_ctrl, pvm_len); 2257 } 2258 2259 static void ath10k_p2p_fill_noa_ie(u8 *data, u32 len, 2260 const struct wmi_p2p_noa_info *noa) 2261 { 2262 struct ieee80211_p2p_noa_attr *noa_attr; 2263 u8 ctwindow_oppps = noa->ctwindow_oppps; 2264 u8 ctwindow = ctwindow_oppps >> WMI_P2P_OPPPS_CTWINDOW_OFFSET; 2265 bool oppps = !!(ctwindow_oppps & WMI_P2P_OPPPS_ENABLE_BIT); 2266 __le16 *noa_attr_len; 2267 u16 attr_len; 2268 u8 noa_descriptors = noa->num_descriptors; 2269 int i; 2270 2271 /* P2P IE */ 2272 data[0] = WLAN_EID_VENDOR_SPECIFIC; 2273 data[1] = len - 2; 2274 data[2] = (WLAN_OUI_WFA >> 16) & 0xff; 2275 data[3] = (WLAN_OUI_WFA >> 8) & 0xff; 2276 data[4] = (WLAN_OUI_WFA >> 0) & 0xff; 2277 data[5] = WLAN_OUI_TYPE_WFA_P2P; 2278 2279 /* NOA ATTR */ 2280 data[6] = IEEE80211_P2P_ATTR_ABSENCE_NOTICE; 2281 noa_attr_len = (__le16 *)&data[7]; /* 2 bytes */ 2282 noa_attr = (struct ieee80211_p2p_noa_attr *)&data[9]; 2283 2284 noa_attr->index = noa->index; 2285 noa_attr->oppps_ctwindow = ctwindow; 2286 if (oppps) 2287 noa_attr->oppps_ctwindow |= IEEE80211_P2P_OPPPS_ENABLE_BIT; 2288 2289 for (i = 0; i < noa_descriptors; i++) { 2290 noa_attr->desc[i].count = 2291 __le32_to_cpu(noa->descriptors[i].type_count); 2292 noa_attr->desc[i].duration = noa->descriptors[i].duration; 2293 noa_attr->desc[i].interval = noa->descriptors[i].interval; 2294 noa_attr->desc[i].start_time = noa->descriptors[i].start_time; 2295 } 2296 2297 attr_len = 2; /* index + oppps_ctwindow */ 2298 attr_len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); 2299 *noa_attr_len = __cpu_to_le16(attr_len); 2300 } 2301 2302 static u32 ath10k_p2p_calc_noa_ie_len(const struct wmi_p2p_noa_info *noa) 2303 { 2304 u32 len = 0; 2305 u8 noa_descriptors = noa->num_descriptors; 2306 u8 opp_ps_info = noa->ctwindow_oppps; 2307 bool opps_enabled = !!(opp_ps_info & WMI_P2P_OPPPS_ENABLE_BIT); 2308 2309 if (!noa_descriptors && !opps_enabled) 2310 return len; 2311 2312 len += 1 + 1 + 4; /* EID + len + OUI */ 2313 len += 1 + 2; /* noa attr + attr len */ 2314 len += 1 + 1; /* index + oppps_ctwindow */ 2315 len += noa_descriptors * sizeof(struct ieee80211_p2p_noa_desc); 2316 2317 return len; 2318 } 2319 2320 static void ath10k_wmi_update_noa(struct ath10k *ar, struct ath10k_vif *arvif, 2321 struct sk_buff *bcn, 2322 const struct wmi_p2p_noa_info *noa) 2323 { 2324 u8 *new_data, *old_data = arvif->u.ap.noa_data; 2325 u32 new_len; 2326 2327 if (arvif->vdev_subtype != WMI_VDEV_SUBTYPE_P2P_GO) 2328 return; 2329 2330 ath10k_dbg(ar, ATH10K_DBG_MGMT, "noa changed: %d\n", noa->changed); 2331 if (noa->changed & WMI_P2P_NOA_CHANGED_BIT) { 2332 new_len = ath10k_p2p_calc_noa_ie_len(noa); 2333 if (!new_len) 2334 goto cleanup; 2335 2336 new_data = kmalloc(new_len, GFP_ATOMIC); 2337 if (!new_data) 2338 goto cleanup; 2339 2340 ath10k_p2p_fill_noa_ie(new_data, new_len, noa); 2341 2342 spin_lock_bh(&ar->data_lock); 2343 arvif->u.ap.noa_data = new_data; 2344 arvif->u.ap.noa_len = new_len; 2345 spin_unlock_bh(&ar->data_lock); 2346 kfree(old_data); 2347 } 2348 2349 if (arvif->u.ap.noa_data) 2350 if (!pskb_expand_head(bcn, 0, arvif->u.ap.noa_len, GFP_ATOMIC)) 2351 memcpy(skb_put(bcn, arvif->u.ap.noa_len), 2352 arvif->u.ap.noa_data, 2353 arvif->u.ap.noa_len); 2354 return; 2355 2356 cleanup: 2357 spin_lock_bh(&ar->data_lock); 2358 arvif->u.ap.noa_data = NULL; 2359 arvif->u.ap.noa_len = 0; 2360 spin_unlock_bh(&ar->data_lock); 2361 kfree(old_data); 2362 } 2363 2364 static int ath10k_wmi_op_pull_swba_ev(struct ath10k *ar, struct sk_buff *skb, 2365 struct wmi_swba_ev_arg *arg) 2366 { 2367 struct wmi_host_swba_event *ev = (void *)skb->data; 2368 u32 map; 2369 size_t i; 2370 2371 if (skb->len < sizeof(*ev)) 2372 return -EPROTO; 2373 2374 skb_pull(skb, sizeof(*ev)); 2375 arg->vdev_map = ev->vdev_map; 2376 2377 for (i = 0, map = __le32_to_cpu(ev->vdev_map); map; map >>= 1) { 2378 if (!(map & BIT(0))) 2379 continue; 2380 2381 /* If this happens there were some changes in firmware and 2382 * ath10k should update the max size of tim_info array. 2383 */ 2384 if (WARN_ON_ONCE(i == ARRAY_SIZE(arg->tim_info))) 2385 break; 2386 2387 arg->tim_info[i] = &ev->bcn_info[i].tim_info; 2388 arg->noa_info[i] = &ev->bcn_info[i].p2p_noa_info; 2389 i++; 2390 } 2391 2392 return 0; 2393 } 2394 2395 void ath10k_wmi_event_host_swba(struct ath10k *ar, struct sk_buff *skb) 2396 { 2397 struct wmi_swba_ev_arg arg = {}; 2398 u32 map; 2399 int i = -1; 2400 const struct wmi_tim_info *tim_info; 2401 const struct wmi_p2p_noa_info *noa_info; 2402 struct ath10k_vif *arvif; 2403 struct sk_buff *bcn; 2404 dma_addr_t paddr; 2405 int ret, vdev_id = 0; 2406 2407 ret = ath10k_wmi_pull_swba(ar, skb, &arg); 2408 if (ret) { 2409 ath10k_warn(ar, "failed to parse swba event: %d\n", ret); 2410 return; 2411 } 2412 2413 map = __le32_to_cpu(arg.vdev_map); 2414 2415 ath10k_dbg(ar, ATH10K_DBG_MGMT, "mgmt swba vdev_map 0x%x\n", 2416 map); 2417 2418 for (; map; map >>= 1, vdev_id++) { 2419 if (!(map & 0x1)) 2420 continue; 2421 2422 i++; 2423 2424 if (i >= WMI_MAX_AP_VDEV) { 2425 ath10k_warn(ar, "swba has corrupted vdev map\n"); 2426 break; 2427 } 2428 2429 tim_info = arg.tim_info[i]; 2430 noa_info = arg.noa_info[i]; 2431 2432 ath10k_dbg(ar, ATH10K_DBG_MGMT, 2433 "mgmt event bcn_info %d tim_len %d mcast %d changed %d num_ps_pending %d bitmap 0x%08x%08x%08x%08x\n", 2434 i, 2435 __le32_to_cpu(tim_info->tim_len), 2436 __le32_to_cpu(tim_info->tim_mcast), 2437 __le32_to_cpu(tim_info->tim_changed), 2438 __le32_to_cpu(tim_info->tim_num_ps_pending), 2439 __le32_to_cpu(tim_info->tim_bitmap[3]), 2440 __le32_to_cpu(tim_info->tim_bitmap[2]), 2441 __le32_to_cpu(tim_info->tim_bitmap[1]), 2442 __le32_to_cpu(tim_info->tim_bitmap[0])); 2443 2444 arvif = ath10k_get_arvif(ar, vdev_id); 2445 if (arvif == NULL) { 2446 ath10k_warn(ar, "no vif for vdev_id %d found\n", 2447 vdev_id); 2448 continue; 2449 } 2450 2451 /* There are no completions for beacons so wait for next SWBA 2452 * before telling mac80211 to decrement CSA counter 2453 * 2454 * Once CSA counter is completed stop sending beacons until 2455 * actual channel switch is done */ 2456 if (arvif->vif->csa_active && 2457 ieee80211_csa_is_complete(arvif->vif)) { 2458 ieee80211_csa_finish(arvif->vif); 2459 continue; 2460 } 2461 2462 bcn = ieee80211_beacon_get(ar->hw, arvif->vif); 2463 if (!bcn) { 2464 ath10k_warn(ar, "could not get mac80211 beacon\n"); 2465 continue; 2466 } 2467 2468 ath10k_tx_h_seq_no(arvif->vif, bcn); 2469 ath10k_wmi_update_tim(ar, arvif, bcn, tim_info); 2470 ath10k_wmi_update_noa(ar, arvif, bcn, noa_info); 2471 2472 spin_lock_bh(&ar->data_lock); 2473 2474 if (arvif->beacon) { 2475 switch (arvif->beacon_state) { 2476 case ATH10K_BEACON_SENT: 2477 break; 2478 case ATH10K_BEACON_SCHEDULED: 2479 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped old beacon\n", 2480 arvif->vdev_id); 2481 break; 2482 case ATH10K_BEACON_SENDING: 2483 ath10k_warn(ar, "SWBA overrun on vdev %d, skipped new beacon\n", 2484 arvif->vdev_id); 2485 dev_kfree_skb(bcn); 2486 goto skip; 2487 } 2488 2489 ath10k_mac_vif_beacon_free(arvif); 2490 } 2491 2492 if (!arvif->beacon_buf) { 2493 paddr = dma_map_single(arvif->ar->dev, bcn->data, 2494 bcn->len, DMA_TO_DEVICE); 2495 ret = dma_mapping_error(arvif->ar->dev, paddr); 2496 if (ret) { 2497 ath10k_warn(ar, "failed to map beacon: %d\n", 2498 ret); 2499 dev_kfree_skb_any(bcn); 2500 goto skip; 2501 } 2502 2503 ATH10K_SKB_CB(bcn)->paddr = paddr; 2504 } else { 2505 if (bcn->len > IEEE80211_MAX_FRAME_LEN) { 2506 ath10k_warn(ar, "trimming beacon %d -> %d bytes!\n", 2507 bcn->len, IEEE80211_MAX_FRAME_LEN); 2508 skb_trim(bcn, IEEE80211_MAX_FRAME_LEN); 2509 } 2510 memcpy(arvif->beacon_buf, bcn->data, bcn->len); 2511 ATH10K_SKB_CB(bcn)->paddr = arvif->beacon_paddr; 2512 } 2513 2514 arvif->beacon = bcn; 2515 arvif->beacon_state = ATH10K_BEACON_SCHEDULED; 2516 2517 trace_ath10k_tx_hdr(ar, bcn->data, bcn->len); 2518 trace_ath10k_tx_payload(ar, bcn->data, bcn->len); 2519 2520 skip: 2521 spin_unlock_bh(&ar->data_lock); 2522 } 2523 2524 ath10k_wmi_tx_beacons_nowait(ar); 2525 } 2526 2527 void ath10k_wmi_event_tbttoffset_update(struct ath10k *ar, struct sk_buff *skb) 2528 { 2529 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TBTTOFFSET_UPDATE_EVENTID\n"); 2530 } 2531 2532 static void ath10k_dfs_radar_report(struct ath10k *ar, 2533 const struct wmi_phyerr *phyerr, 2534 const struct phyerr_radar_report *rr, 2535 u64 tsf) 2536 { 2537 u32 reg0, reg1, tsf32l; 2538 struct pulse_event pe; 2539 u64 tsf64; 2540 u8 rssi, width; 2541 2542 reg0 = __le32_to_cpu(rr->reg0); 2543 reg1 = __le32_to_cpu(rr->reg1); 2544 2545 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2546 "wmi phyerr radar report chirp %d max_width %d agc_total_gain %d pulse_delta_diff %d\n", 2547 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_CHIRP), 2548 MS(reg0, RADAR_REPORT_REG0_PULSE_IS_MAX_WIDTH), 2549 MS(reg0, RADAR_REPORT_REG0_AGC_TOTAL_GAIN), 2550 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_DIFF)); 2551 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2552 "wmi phyerr radar report pulse_delta_pean %d pulse_sidx %d fft_valid %d agc_mb_gain %d subchan_mask %d\n", 2553 MS(reg0, RADAR_REPORT_REG0_PULSE_DELTA_PEAK), 2554 MS(reg0, RADAR_REPORT_REG0_PULSE_SIDX), 2555 MS(reg1, RADAR_REPORT_REG1_PULSE_SRCH_FFT_VALID), 2556 MS(reg1, RADAR_REPORT_REG1_PULSE_AGC_MB_GAIN), 2557 MS(reg1, RADAR_REPORT_REG1_PULSE_SUBCHAN_MASK)); 2558 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2559 "wmi phyerr radar report pulse_tsf_offset 0x%X pulse_dur: %d\n", 2560 MS(reg1, RADAR_REPORT_REG1_PULSE_TSF_OFFSET), 2561 MS(reg1, RADAR_REPORT_REG1_PULSE_DUR)); 2562 2563 if (!ar->dfs_detector) 2564 return; 2565 2566 /* report event to DFS pattern detector */ 2567 tsf32l = __le32_to_cpu(phyerr->tsf_timestamp); 2568 tsf64 = tsf & (~0xFFFFFFFFULL); 2569 tsf64 |= tsf32l; 2570 2571 width = MS(reg1, RADAR_REPORT_REG1_PULSE_DUR); 2572 rssi = phyerr->rssi_combined; 2573 2574 /* hardware store this as 8 bit signed value, 2575 * set to zero if negative number 2576 */ 2577 if (rssi & 0x80) 2578 rssi = 0; 2579 2580 pe.ts = tsf64; 2581 pe.freq = ar->hw->conf.chandef.chan->center_freq; 2582 pe.width = width; 2583 pe.rssi = rssi; 2584 2585 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2586 "dfs add pulse freq: %d, width: %d, rssi %d, tsf: %llX\n", 2587 pe.freq, pe.width, pe.rssi, pe.ts); 2588 2589 ATH10K_DFS_STAT_INC(ar, pulses_detected); 2590 2591 if (!ar->dfs_detector->add_pulse(ar->dfs_detector, &pe)) { 2592 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2593 "dfs no pulse pattern detected, yet\n"); 2594 return; 2595 } 2596 2597 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs radar detected\n"); 2598 ATH10K_DFS_STAT_INC(ar, radar_detected); 2599 2600 /* Control radar events reporting in debugfs file 2601 dfs_block_radar_events */ 2602 if (ar->dfs_block_radar_events) { 2603 ath10k_info(ar, "DFS Radar detected, but ignored as requested\n"); 2604 return; 2605 } 2606 2607 ieee80211_radar_detected(ar->hw); 2608 } 2609 2610 static int ath10k_dfs_fft_report(struct ath10k *ar, 2611 const struct wmi_phyerr *phyerr, 2612 const struct phyerr_fft_report *fftr, 2613 u64 tsf) 2614 { 2615 u32 reg0, reg1; 2616 u8 rssi, peak_mag; 2617 2618 reg0 = __le32_to_cpu(fftr->reg0); 2619 reg1 = __le32_to_cpu(fftr->reg1); 2620 rssi = phyerr->rssi_combined; 2621 2622 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2623 "wmi phyerr fft report total_gain_db %d base_pwr_db %d fft_chn_idx %d peak_sidx %d\n", 2624 MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB), 2625 MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB), 2626 MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX), 2627 MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX)); 2628 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2629 "wmi phyerr fft report rel_pwr_db %d avgpwr_db %d peak_mag %d num_store_bin %d\n", 2630 MS(reg1, SEARCH_FFT_REPORT_REG1_RELPWR_DB), 2631 MS(reg1, SEARCH_FFT_REPORT_REG1_AVGPWR_DB), 2632 MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG), 2633 MS(reg1, SEARCH_FFT_REPORT_REG1_NUM_STR_BINS_IB)); 2634 2635 peak_mag = MS(reg1, SEARCH_FFT_REPORT_REG1_PEAK_MAG); 2636 2637 /* false event detection */ 2638 if (rssi == DFS_RSSI_POSSIBLY_FALSE && 2639 peak_mag < 2 * DFS_PEAK_MAG_THOLD_POSSIBLY_FALSE) { 2640 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, "dfs false pulse detected\n"); 2641 ATH10K_DFS_STAT_INC(ar, pulses_discarded); 2642 return -EINVAL; 2643 } 2644 2645 return 0; 2646 } 2647 2648 void ath10k_wmi_event_dfs(struct ath10k *ar, 2649 const struct wmi_phyerr *phyerr, 2650 u64 tsf) 2651 { 2652 int buf_len, tlv_len, res, i = 0; 2653 const struct phyerr_tlv *tlv; 2654 const struct phyerr_radar_report *rr; 2655 const struct phyerr_fft_report *fftr; 2656 const u8 *tlv_buf; 2657 2658 buf_len = __le32_to_cpu(phyerr->buf_len); 2659 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2660 "wmi event dfs err_code %d rssi %d tsfl 0x%X tsf64 0x%llX len %d\n", 2661 phyerr->phy_err_code, phyerr->rssi_combined, 2662 __le32_to_cpu(phyerr->tsf_timestamp), tsf, buf_len); 2663 2664 /* Skip event if DFS disabled */ 2665 if (!config_enabled(CONFIG_ATH10K_DFS_CERTIFIED)) 2666 return; 2667 2668 ATH10K_DFS_STAT_INC(ar, pulses_total); 2669 2670 while (i < buf_len) { 2671 if (i + sizeof(*tlv) > buf_len) { 2672 ath10k_warn(ar, "too short buf for tlv header (%d)\n", 2673 i); 2674 return; 2675 } 2676 2677 tlv = (struct phyerr_tlv *)&phyerr->buf[i]; 2678 tlv_len = __le16_to_cpu(tlv->len); 2679 tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; 2680 ath10k_dbg(ar, ATH10K_DBG_REGULATORY, 2681 "wmi event dfs tlv_len %d tlv_tag 0x%02X tlv_sig 0x%02X\n", 2682 tlv_len, tlv->tag, tlv->sig); 2683 2684 switch (tlv->tag) { 2685 case PHYERR_TLV_TAG_RADAR_PULSE_SUMMARY: 2686 if (i + sizeof(*tlv) + sizeof(*rr) > buf_len) { 2687 ath10k_warn(ar, "too short radar pulse summary (%d)\n", 2688 i); 2689 return; 2690 } 2691 2692 rr = (struct phyerr_radar_report *)tlv_buf; 2693 ath10k_dfs_radar_report(ar, phyerr, rr, tsf); 2694 break; 2695 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 2696 if (i + sizeof(*tlv) + sizeof(*fftr) > buf_len) { 2697 ath10k_warn(ar, "too short fft report (%d)\n", 2698 i); 2699 return; 2700 } 2701 2702 fftr = (struct phyerr_fft_report *)tlv_buf; 2703 res = ath10k_dfs_fft_report(ar, phyerr, fftr, tsf); 2704 if (res) 2705 return; 2706 break; 2707 } 2708 2709 i += sizeof(*tlv) + tlv_len; 2710 } 2711 } 2712 2713 void ath10k_wmi_event_spectral_scan(struct ath10k *ar, 2714 const struct wmi_phyerr *phyerr, 2715 u64 tsf) 2716 { 2717 int buf_len, tlv_len, res, i = 0; 2718 struct phyerr_tlv *tlv; 2719 const void *tlv_buf; 2720 const struct phyerr_fft_report *fftr; 2721 size_t fftr_len; 2722 2723 buf_len = __le32_to_cpu(phyerr->buf_len); 2724 2725 while (i < buf_len) { 2726 if (i + sizeof(*tlv) > buf_len) { 2727 ath10k_warn(ar, "failed to parse phyerr tlv header at byte %d\n", 2728 i); 2729 return; 2730 } 2731 2732 tlv = (struct phyerr_tlv *)&phyerr->buf[i]; 2733 tlv_len = __le16_to_cpu(tlv->len); 2734 tlv_buf = &phyerr->buf[i + sizeof(*tlv)]; 2735 2736 if (i + sizeof(*tlv) + tlv_len > buf_len) { 2737 ath10k_warn(ar, "failed to parse phyerr tlv payload at byte %d\n", 2738 i); 2739 return; 2740 } 2741 2742 switch (tlv->tag) { 2743 case PHYERR_TLV_TAG_SEARCH_FFT_REPORT: 2744 if (sizeof(*fftr) > tlv_len) { 2745 ath10k_warn(ar, "failed to parse fft report at byte %d\n", 2746 i); 2747 return; 2748 } 2749 2750 fftr_len = tlv_len - sizeof(*fftr); 2751 fftr = tlv_buf; 2752 res = ath10k_spectral_process_fft(ar, phyerr, 2753 fftr, fftr_len, 2754 tsf); 2755 if (res < 0) { 2756 ath10k_warn(ar, "failed to process fft report: %d\n", 2757 res); 2758 return; 2759 } 2760 break; 2761 } 2762 2763 i += sizeof(*tlv) + tlv_len; 2764 } 2765 } 2766 2767 static int ath10k_wmi_op_pull_phyerr_ev(struct ath10k *ar, struct sk_buff *skb, 2768 struct wmi_phyerr_ev_arg *arg) 2769 { 2770 struct wmi_phyerr_event *ev = (void *)skb->data; 2771 2772 if (skb->len < sizeof(*ev)) 2773 return -EPROTO; 2774 2775 arg->num_phyerrs = ev->num_phyerrs; 2776 arg->tsf_l32 = ev->tsf_l32; 2777 arg->tsf_u32 = ev->tsf_u32; 2778 arg->buf_len = __cpu_to_le32(skb->len - sizeof(*ev)); 2779 arg->phyerrs = ev->phyerrs; 2780 2781 return 0; 2782 } 2783 2784 void ath10k_wmi_event_phyerr(struct ath10k *ar, struct sk_buff *skb) 2785 { 2786 struct wmi_phyerr_ev_arg arg = {}; 2787 const struct wmi_phyerr *phyerr; 2788 u32 count, i, buf_len, phy_err_code; 2789 u64 tsf; 2790 int left_len, ret; 2791 2792 ATH10K_DFS_STAT_INC(ar, phy_errors); 2793 2794 ret = ath10k_wmi_pull_phyerr(ar, skb, &arg); 2795 if (ret) { 2796 ath10k_warn(ar, "failed to parse phyerr event: %d\n", ret); 2797 return; 2798 } 2799 2800 left_len = __le32_to_cpu(arg.buf_len); 2801 2802 /* Check number of included events */ 2803 count = __le32_to_cpu(arg.num_phyerrs); 2804 2805 tsf = __le32_to_cpu(arg.tsf_u32); 2806 tsf <<= 32; 2807 tsf |= __le32_to_cpu(arg.tsf_l32); 2808 2809 ath10k_dbg(ar, ATH10K_DBG_WMI, 2810 "wmi event phyerr count %d tsf64 0x%llX\n", 2811 count, tsf); 2812 2813 phyerr = arg.phyerrs; 2814 for (i = 0; i < count; i++) { 2815 /* Check if we can read event header */ 2816 if (left_len < sizeof(*phyerr)) { 2817 ath10k_warn(ar, "single event (%d) wrong head len\n", 2818 i); 2819 return; 2820 } 2821 2822 left_len -= sizeof(*phyerr); 2823 2824 buf_len = __le32_to_cpu(phyerr->buf_len); 2825 phy_err_code = phyerr->phy_err_code; 2826 2827 if (left_len < buf_len) { 2828 ath10k_warn(ar, "single event (%d) wrong buf len\n", i); 2829 return; 2830 } 2831 2832 left_len -= buf_len; 2833 2834 switch (phy_err_code) { 2835 case PHY_ERROR_RADAR: 2836 ath10k_wmi_event_dfs(ar, phyerr, tsf); 2837 break; 2838 case PHY_ERROR_SPECTRAL_SCAN: 2839 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf); 2840 break; 2841 case PHY_ERROR_FALSE_RADAR_EXT: 2842 ath10k_wmi_event_dfs(ar, phyerr, tsf); 2843 ath10k_wmi_event_spectral_scan(ar, phyerr, tsf); 2844 break; 2845 default: 2846 break; 2847 } 2848 2849 phyerr = (void *)phyerr + sizeof(*phyerr) + buf_len; 2850 } 2851 } 2852 2853 void ath10k_wmi_event_roam(struct ath10k *ar, struct sk_buff *skb) 2854 { 2855 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_ROAM_EVENTID\n"); 2856 } 2857 2858 void ath10k_wmi_event_profile_match(struct ath10k *ar, struct sk_buff *skb) 2859 { 2860 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PROFILE_MATCH\n"); 2861 } 2862 2863 void ath10k_wmi_event_debug_print(struct ath10k *ar, struct sk_buff *skb) 2864 { 2865 char buf[101], c; 2866 int i; 2867 2868 for (i = 0; i < sizeof(buf) - 1; i++) { 2869 if (i >= skb->len) 2870 break; 2871 2872 c = skb->data[i]; 2873 2874 if (c == '\0') 2875 break; 2876 2877 if (isascii(c) && isprint(c)) 2878 buf[i] = c; 2879 else 2880 buf[i] = '.'; 2881 } 2882 2883 if (i == sizeof(buf) - 1) 2884 ath10k_warn(ar, "wmi debug print truncated: %d\n", skb->len); 2885 2886 /* for some reason the debug prints end with \n, remove that */ 2887 if (skb->data[i - 1] == '\n') 2888 i--; 2889 2890 /* the last byte is always reserved for the null character */ 2891 buf[i] = '\0'; 2892 2893 ath10k_dbg(ar, ATH10K_DBG_WMI_PRINT, "wmi print '%s'\n", buf); 2894 } 2895 2896 void ath10k_wmi_event_pdev_qvit(struct ath10k *ar, struct sk_buff *skb) 2897 { 2898 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_QVIT_EVENTID\n"); 2899 } 2900 2901 void ath10k_wmi_event_wlan_profile_data(struct ath10k *ar, struct sk_buff *skb) 2902 { 2903 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WLAN_PROFILE_DATA_EVENTID\n"); 2904 } 2905 2906 void ath10k_wmi_event_rtt_measurement_report(struct ath10k *ar, 2907 struct sk_buff *skb) 2908 { 2909 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_MEASUREMENT_REPORT_EVENTID\n"); 2910 } 2911 2912 void ath10k_wmi_event_tsf_measurement_report(struct ath10k *ar, 2913 struct sk_buff *skb) 2914 { 2915 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TSF_MEASUREMENT_REPORT_EVENTID\n"); 2916 } 2917 2918 void ath10k_wmi_event_rtt_error_report(struct ath10k *ar, struct sk_buff *skb) 2919 { 2920 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_RTT_ERROR_REPORT_EVENTID\n"); 2921 } 2922 2923 void ath10k_wmi_event_wow_wakeup_host(struct ath10k *ar, struct sk_buff *skb) 2924 { 2925 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_WOW_WAKEUP_HOST_EVENTID\n"); 2926 } 2927 2928 void ath10k_wmi_event_dcs_interference(struct ath10k *ar, struct sk_buff *skb) 2929 { 2930 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_DCS_INTERFERENCE_EVENTID\n"); 2931 } 2932 2933 void ath10k_wmi_event_pdev_tpc_config(struct ath10k *ar, struct sk_buff *skb) 2934 { 2935 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_TPC_CONFIG_EVENTID\n"); 2936 } 2937 2938 void ath10k_wmi_event_pdev_ftm_intg(struct ath10k *ar, struct sk_buff *skb) 2939 { 2940 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_PDEV_FTM_INTG_EVENTID\n"); 2941 } 2942 2943 void ath10k_wmi_event_gtk_offload_status(struct ath10k *ar, struct sk_buff *skb) 2944 { 2945 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_OFFLOAD_STATUS_EVENTID\n"); 2946 } 2947 2948 void ath10k_wmi_event_gtk_rekey_fail(struct ath10k *ar, struct sk_buff *skb) 2949 { 2950 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_GTK_REKEY_FAIL_EVENTID\n"); 2951 } 2952 2953 void ath10k_wmi_event_delba_complete(struct ath10k *ar, struct sk_buff *skb) 2954 { 2955 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_DELBA_COMPLETE_EVENTID\n"); 2956 } 2957 2958 void ath10k_wmi_event_addba_complete(struct ath10k *ar, struct sk_buff *skb) 2959 { 2960 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_TX_ADDBA_COMPLETE_EVENTID\n"); 2961 } 2962 2963 void ath10k_wmi_event_vdev_install_key_complete(struct ath10k *ar, 2964 struct sk_buff *skb) 2965 { 2966 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID\n"); 2967 } 2968 2969 void ath10k_wmi_event_inst_rssi_stats(struct ath10k *ar, struct sk_buff *skb) 2970 { 2971 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_INST_RSSI_STATS_EVENTID\n"); 2972 } 2973 2974 void ath10k_wmi_event_vdev_standby_req(struct ath10k *ar, struct sk_buff *skb) 2975 { 2976 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_STANDBY_REQ_EVENTID\n"); 2977 } 2978 2979 void ath10k_wmi_event_vdev_resume_req(struct ath10k *ar, struct sk_buff *skb) 2980 { 2981 ath10k_dbg(ar, ATH10K_DBG_WMI, "WMI_VDEV_RESUME_REQ_EVENTID\n"); 2982 } 2983 2984 static int ath10k_wmi_alloc_host_mem(struct ath10k *ar, u32 req_id, 2985 u32 num_units, u32 unit_len) 2986 { 2987 dma_addr_t paddr; 2988 u32 pool_size; 2989 int idx = ar->wmi.num_mem_chunks; 2990 2991 pool_size = num_units * round_up(unit_len, 4); 2992 2993 if (!pool_size) 2994 return -EINVAL; 2995 2996 ar->wmi.mem_chunks[idx].vaddr = dma_alloc_coherent(ar->dev, 2997 pool_size, 2998 &paddr, 2999 GFP_ATOMIC); 3000 if (!ar->wmi.mem_chunks[idx].vaddr) { 3001 ath10k_warn(ar, "failed to allocate memory chunk\n"); 3002 return -ENOMEM; 3003 } 3004 3005 memset(ar->wmi.mem_chunks[idx].vaddr, 0, pool_size); 3006 3007 ar->wmi.mem_chunks[idx].paddr = paddr; 3008 ar->wmi.mem_chunks[idx].len = pool_size; 3009 ar->wmi.mem_chunks[idx].req_id = req_id; 3010 ar->wmi.num_mem_chunks++; 3011 3012 return 0; 3013 } 3014 3015 static int 3016 ath10k_wmi_main_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 3017 struct wmi_svc_rdy_ev_arg *arg) 3018 { 3019 struct wmi_service_ready_event *ev; 3020 size_t i, n; 3021 3022 if (skb->len < sizeof(*ev)) 3023 return -EPROTO; 3024 3025 ev = (void *)skb->data; 3026 skb_pull(skb, sizeof(*ev)); 3027 arg->min_tx_power = ev->hw_min_tx_power; 3028 arg->max_tx_power = ev->hw_max_tx_power; 3029 arg->ht_cap = ev->ht_cap_info; 3030 arg->vht_cap = ev->vht_cap_info; 3031 arg->sw_ver0 = ev->sw_version; 3032 arg->sw_ver1 = ev->sw_version_1; 3033 arg->phy_capab = ev->phy_capability; 3034 arg->num_rf_chains = ev->num_rf_chains; 3035 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; 3036 arg->num_mem_reqs = ev->num_mem_reqs; 3037 arg->service_map = ev->wmi_service_bitmap; 3038 arg->service_map_len = sizeof(ev->wmi_service_bitmap); 3039 3040 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), 3041 ARRAY_SIZE(arg->mem_reqs)); 3042 for (i = 0; i < n; i++) 3043 arg->mem_reqs[i] = &ev->mem_reqs[i]; 3044 3045 if (skb->len < 3046 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) 3047 return -EPROTO; 3048 3049 return 0; 3050 } 3051 3052 static int 3053 ath10k_wmi_10x_op_pull_svc_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 3054 struct wmi_svc_rdy_ev_arg *arg) 3055 { 3056 struct wmi_10x_service_ready_event *ev; 3057 int i, n; 3058 3059 if (skb->len < sizeof(*ev)) 3060 return -EPROTO; 3061 3062 ev = (void *)skb->data; 3063 skb_pull(skb, sizeof(*ev)); 3064 arg->min_tx_power = ev->hw_min_tx_power; 3065 arg->max_tx_power = ev->hw_max_tx_power; 3066 arg->ht_cap = ev->ht_cap_info; 3067 arg->vht_cap = ev->vht_cap_info; 3068 arg->sw_ver0 = ev->sw_version; 3069 arg->phy_capab = ev->phy_capability; 3070 arg->num_rf_chains = ev->num_rf_chains; 3071 arg->eeprom_rd = ev->hal_reg_capabilities.eeprom_rd; 3072 arg->num_mem_reqs = ev->num_mem_reqs; 3073 arg->service_map = ev->wmi_service_bitmap; 3074 arg->service_map_len = sizeof(ev->wmi_service_bitmap); 3075 3076 n = min_t(size_t, __le32_to_cpu(arg->num_mem_reqs), 3077 ARRAY_SIZE(arg->mem_reqs)); 3078 for (i = 0; i < n; i++) 3079 arg->mem_reqs[i] = &ev->mem_reqs[i]; 3080 3081 if (skb->len < 3082 __le32_to_cpu(arg->num_mem_reqs) * sizeof(arg->mem_reqs[0])) 3083 return -EPROTO; 3084 3085 return 0; 3086 } 3087 3088 void ath10k_wmi_event_service_ready(struct ath10k *ar, struct sk_buff *skb) 3089 { 3090 struct wmi_svc_rdy_ev_arg arg = {}; 3091 u32 num_units, req_id, unit_size, num_mem_reqs, num_unit_info, i; 3092 int ret; 3093 3094 ret = ath10k_wmi_pull_svc_rdy(ar, skb, &arg); 3095 if (ret) { 3096 ath10k_warn(ar, "failed to parse service ready: %d\n", ret); 3097 return; 3098 } 3099 3100 memset(&ar->wmi.svc_map, 0, sizeof(ar->wmi.svc_map)); 3101 ath10k_wmi_map_svc(ar, arg.service_map, ar->wmi.svc_map, 3102 arg.service_map_len); 3103 3104 ar->hw_min_tx_power = __le32_to_cpu(arg.min_tx_power); 3105 ar->hw_max_tx_power = __le32_to_cpu(arg.max_tx_power); 3106 ar->ht_cap_info = __le32_to_cpu(arg.ht_cap); 3107 ar->vht_cap_info = __le32_to_cpu(arg.vht_cap); 3108 ar->fw_version_major = 3109 (__le32_to_cpu(arg.sw_ver0) & 0xff000000) >> 24; 3110 ar->fw_version_minor = (__le32_to_cpu(arg.sw_ver0) & 0x00ffffff); 3111 ar->fw_version_release = 3112 (__le32_to_cpu(arg.sw_ver1) & 0xffff0000) >> 16; 3113 ar->fw_version_build = (__le32_to_cpu(arg.sw_ver1) & 0x0000ffff); 3114 ar->phy_capability = __le32_to_cpu(arg.phy_capab); 3115 ar->num_rf_chains = __le32_to_cpu(arg.num_rf_chains); 3116 ar->ath_common.regulatory.current_rd = __le32_to_cpu(arg.eeprom_rd); 3117 3118 ath10k_dbg_dump(ar, ATH10K_DBG_WMI, NULL, "wmi svc: ", 3119 arg.service_map, arg.service_map_len); 3120 3121 /* only manually set fw features when not using FW IE format */ 3122 if (ar->fw_api == 1 && ar->fw_version_build > 636) 3123 set_bit(ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX, ar->fw_features); 3124 3125 if (ar->num_rf_chains > WMI_MAX_SPATIAL_STREAM) { 3126 ath10k_warn(ar, "hardware advertises support for more spatial streams than it should (%d > %d)\n", 3127 ar->num_rf_chains, WMI_MAX_SPATIAL_STREAM); 3128 ar->num_rf_chains = WMI_MAX_SPATIAL_STREAM; 3129 } 3130 3131 ar->supp_tx_chainmask = (1 << ar->num_rf_chains) - 1; 3132 ar->supp_rx_chainmask = (1 << ar->num_rf_chains) - 1; 3133 3134 if (strlen(ar->hw->wiphy->fw_version) == 0) { 3135 snprintf(ar->hw->wiphy->fw_version, 3136 sizeof(ar->hw->wiphy->fw_version), 3137 "%u.%u.%u.%u", 3138 ar->fw_version_major, 3139 ar->fw_version_minor, 3140 ar->fw_version_release, 3141 ar->fw_version_build); 3142 } 3143 3144 num_mem_reqs = __le32_to_cpu(arg.num_mem_reqs); 3145 if (num_mem_reqs > WMI_MAX_MEM_REQS) { 3146 ath10k_warn(ar, "requested memory chunks number (%d) exceeds the limit\n", 3147 num_mem_reqs); 3148 return; 3149 } 3150 3151 for (i = 0; i < num_mem_reqs; ++i) { 3152 req_id = __le32_to_cpu(arg.mem_reqs[i]->req_id); 3153 num_units = __le32_to_cpu(arg.mem_reqs[i]->num_units); 3154 unit_size = __le32_to_cpu(arg.mem_reqs[i]->unit_size); 3155 num_unit_info = __le32_to_cpu(arg.mem_reqs[i]->num_unit_info); 3156 3157 if (num_unit_info & NUM_UNITS_IS_NUM_PEERS) 3158 /* number of units to allocate is number of 3159 * peers, 1 extra for self peer on target */ 3160 /* this needs to be tied, host and target 3161 * can get out of sync */ 3162 num_units = TARGET_10X_NUM_PEERS + 1; 3163 else if (num_unit_info & NUM_UNITS_IS_NUM_VDEVS) 3164 num_units = TARGET_10X_NUM_VDEVS + 1; 3165 3166 ath10k_dbg(ar, ATH10K_DBG_WMI, 3167 "wmi mem_req_id %d num_units %d num_unit_info %d unit size %d actual units %d\n", 3168 req_id, 3169 __le32_to_cpu(arg.mem_reqs[i]->num_units), 3170 num_unit_info, 3171 unit_size, 3172 num_units); 3173 3174 ret = ath10k_wmi_alloc_host_mem(ar, req_id, num_units, 3175 unit_size); 3176 if (ret) 3177 return; 3178 } 3179 3180 ath10k_dbg(ar, ATH10K_DBG_WMI, 3181 "wmi event service ready min_tx_power 0x%08x max_tx_power 0x%08x ht_cap 0x%08x vht_cap 0x%08x sw_ver0 0x%08x sw_ver1 0x%08x fw_build 0x%08x phy_capab 0x%08x num_rf_chains 0x%08x eeprom_rd 0x%08x num_mem_reqs 0x%08x\n", 3182 __le32_to_cpu(arg.min_tx_power), 3183 __le32_to_cpu(arg.max_tx_power), 3184 __le32_to_cpu(arg.ht_cap), 3185 __le32_to_cpu(arg.vht_cap), 3186 __le32_to_cpu(arg.sw_ver0), 3187 __le32_to_cpu(arg.sw_ver1), 3188 __le32_to_cpu(arg.fw_build), 3189 __le32_to_cpu(arg.phy_capab), 3190 __le32_to_cpu(arg.num_rf_chains), 3191 __le32_to_cpu(arg.eeprom_rd), 3192 __le32_to_cpu(arg.num_mem_reqs)); 3193 3194 complete(&ar->wmi.service_ready); 3195 } 3196 3197 static int ath10k_wmi_op_pull_rdy_ev(struct ath10k *ar, struct sk_buff *skb, 3198 struct wmi_rdy_ev_arg *arg) 3199 { 3200 struct wmi_ready_event *ev = (void *)skb->data; 3201 3202 if (skb->len < sizeof(*ev)) 3203 return -EPROTO; 3204 3205 skb_pull(skb, sizeof(*ev)); 3206 arg->sw_version = ev->sw_version; 3207 arg->abi_version = ev->abi_version; 3208 arg->status = ev->status; 3209 arg->mac_addr = ev->mac_addr.addr; 3210 3211 return 0; 3212 } 3213 3214 int ath10k_wmi_event_ready(struct ath10k *ar, struct sk_buff *skb) 3215 { 3216 struct wmi_rdy_ev_arg arg = {}; 3217 int ret; 3218 3219 ret = ath10k_wmi_pull_rdy(ar, skb, &arg); 3220 if (ret) { 3221 ath10k_warn(ar, "failed to parse ready event: %d\n", ret); 3222 return ret; 3223 } 3224 3225 ath10k_dbg(ar, ATH10K_DBG_WMI, 3226 "wmi event ready sw_version %u abi_version %u mac_addr %pM status %d\n", 3227 __le32_to_cpu(arg.sw_version), 3228 __le32_to_cpu(arg.abi_version), 3229 arg.mac_addr, 3230 __le32_to_cpu(arg.status)); 3231 3232 ether_addr_copy(ar->mac_addr, arg.mac_addr); 3233 complete(&ar->wmi.unified_ready); 3234 return 0; 3235 } 3236 3237 static int ath10k_wmi_event_temperature(struct ath10k *ar, struct sk_buff *skb) 3238 { 3239 const struct wmi_pdev_temperature_event *ev; 3240 3241 ev = (struct wmi_pdev_temperature_event *)skb->data; 3242 if (WARN_ON(skb->len < sizeof(*ev))) 3243 return -EPROTO; 3244 3245 ath10k_thermal_event_temperature(ar, __le32_to_cpu(ev->temperature)); 3246 return 0; 3247 } 3248 3249 static void ath10k_wmi_op_rx(struct ath10k *ar, struct sk_buff *skb) 3250 { 3251 struct wmi_cmd_hdr *cmd_hdr; 3252 enum wmi_event_id id; 3253 3254 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 3255 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 3256 3257 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 3258 return; 3259 3260 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 3261 3262 switch (id) { 3263 case WMI_MGMT_RX_EVENTID: 3264 ath10k_wmi_event_mgmt_rx(ar, skb); 3265 /* mgmt_rx() owns the skb now! */ 3266 return; 3267 case WMI_SCAN_EVENTID: 3268 ath10k_wmi_event_scan(ar, skb); 3269 break; 3270 case WMI_CHAN_INFO_EVENTID: 3271 ath10k_wmi_event_chan_info(ar, skb); 3272 break; 3273 case WMI_ECHO_EVENTID: 3274 ath10k_wmi_event_echo(ar, skb); 3275 break; 3276 case WMI_DEBUG_MESG_EVENTID: 3277 ath10k_wmi_event_debug_mesg(ar, skb); 3278 break; 3279 case WMI_UPDATE_STATS_EVENTID: 3280 ath10k_wmi_event_update_stats(ar, skb); 3281 break; 3282 case WMI_VDEV_START_RESP_EVENTID: 3283 ath10k_wmi_event_vdev_start_resp(ar, skb); 3284 break; 3285 case WMI_VDEV_STOPPED_EVENTID: 3286 ath10k_wmi_event_vdev_stopped(ar, skb); 3287 break; 3288 case WMI_PEER_STA_KICKOUT_EVENTID: 3289 ath10k_wmi_event_peer_sta_kickout(ar, skb); 3290 break; 3291 case WMI_HOST_SWBA_EVENTID: 3292 ath10k_wmi_event_host_swba(ar, skb); 3293 break; 3294 case WMI_TBTTOFFSET_UPDATE_EVENTID: 3295 ath10k_wmi_event_tbttoffset_update(ar, skb); 3296 break; 3297 case WMI_PHYERR_EVENTID: 3298 ath10k_wmi_event_phyerr(ar, skb); 3299 break; 3300 case WMI_ROAM_EVENTID: 3301 ath10k_wmi_event_roam(ar, skb); 3302 break; 3303 case WMI_PROFILE_MATCH: 3304 ath10k_wmi_event_profile_match(ar, skb); 3305 break; 3306 case WMI_DEBUG_PRINT_EVENTID: 3307 ath10k_wmi_event_debug_print(ar, skb); 3308 break; 3309 case WMI_PDEV_QVIT_EVENTID: 3310 ath10k_wmi_event_pdev_qvit(ar, skb); 3311 break; 3312 case WMI_WLAN_PROFILE_DATA_EVENTID: 3313 ath10k_wmi_event_wlan_profile_data(ar, skb); 3314 break; 3315 case WMI_RTT_MEASUREMENT_REPORT_EVENTID: 3316 ath10k_wmi_event_rtt_measurement_report(ar, skb); 3317 break; 3318 case WMI_TSF_MEASUREMENT_REPORT_EVENTID: 3319 ath10k_wmi_event_tsf_measurement_report(ar, skb); 3320 break; 3321 case WMI_RTT_ERROR_REPORT_EVENTID: 3322 ath10k_wmi_event_rtt_error_report(ar, skb); 3323 break; 3324 case WMI_WOW_WAKEUP_HOST_EVENTID: 3325 ath10k_wmi_event_wow_wakeup_host(ar, skb); 3326 break; 3327 case WMI_DCS_INTERFERENCE_EVENTID: 3328 ath10k_wmi_event_dcs_interference(ar, skb); 3329 break; 3330 case WMI_PDEV_TPC_CONFIG_EVENTID: 3331 ath10k_wmi_event_pdev_tpc_config(ar, skb); 3332 break; 3333 case WMI_PDEV_FTM_INTG_EVENTID: 3334 ath10k_wmi_event_pdev_ftm_intg(ar, skb); 3335 break; 3336 case WMI_GTK_OFFLOAD_STATUS_EVENTID: 3337 ath10k_wmi_event_gtk_offload_status(ar, skb); 3338 break; 3339 case WMI_GTK_REKEY_FAIL_EVENTID: 3340 ath10k_wmi_event_gtk_rekey_fail(ar, skb); 3341 break; 3342 case WMI_TX_DELBA_COMPLETE_EVENTID: 3343 ath10k_wmi_event_delba_complete(ar, skb); 3344 break; 3345 case WMI_TX_ADDBA_COMPLETE_EVENTID: 3346 ath10k_wmi_event_addba_complete(ar, skb); 3347 break; 3348 case WMI_VDEV_INSTALL_KEY_COMPLETE_EVENTID: 3349 ath10k_wmi_event_vdev_install_key_complete(ar, skb); 3350 break; 3351 case WMI_SERVICE_READY_EVENTID: 3352 ath10k_wmi_event_service_ready(ar, skb); 3353 break; 3354 case WMI_READY_EVENTID: 3355 ath10k_wmi_event_ready(ar, skb); 3356 break; 3357 default: 3358 ath10k_warn(ar, "Unknown eventid: %d\n", id); 3359 break; 3360 } 3361 3362 dev_kfree_skb(skb); 3363 } 3364 3365 static void ath10k_wmi_10_1_op_rx(struct ath10k *ar, struct sk_buff *skb) 3366 { 3367 struct wmi_cmd_hdr *cmd_hdr; 3368 enum wmi_10x_event_id id; 3369 bool consumed; 3370 3371 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 3372 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 3373 3374 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 3375 return; 3376 3377 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 3378 3379 consumed = ath10k_tm_event_wmi(ar, id, skb); 3380 3381 /* Ready event must be handled normally also in UTF mode so that we 3382 * know the UTF firmware has booted, others we are just bypass WMI 3383 * events to testmode. 3384 */ 3385 if (consumed && id != WMI_10X_READY_EVENTID) { 3386 ath10k_dbg(ar, ATH10K_DBG_WMI, 3387 "wmi testmode consumed 0x%x\n", id); 3388 goto out; 3389 } 3390 3391 switch (id) { 3392 case WMI_10X_MGMT_RX_EVENTID: 3393 ath10k_wmi_event_mgmt_rx(ar, skb); 3394 /* mgmt_rx() owns the skb now! */ 3395 return; 3396 case WMI_10X_SCAN_EVENTID: 3397 ath10k_wmi_event_scan(ar, skb); 3398 break; 3399 case WMI_10X_CHAN_INFO_EVENTID: 3400 ath10k_wmi_event_chan_info(ar, skb); 3401 break; 3402 case WMI_10X_ECHO_EVENTID: 3403 ath10k_wmi_event_echo(ar, skb); 3404 break; 3405 case WMI_10X_DEBUG_MESG_EVENTID: 3406 ath10k_wmi_event_debug_mesg(ar, skb); 3407 break; 3408 case WMI_10X_UPDATE_STATS_EVENTID: 3409 ath10k_wmi_event_update_stats(ar, skb); 3410 break; 3411 case WMI_10X_VDEV_START_RESP_EVENTID: 3412 ath10k_wmi_event_vdev_start_resp(ar, skb); 3413 break; 3414 case WMI_10X_VDEV_STOPPED_EVENTID: 3415 ath10k_wmi_event_vdev_stopped(ar, skb); 3416 break; 3417 case WMI_10X_PEER_STA_KICKOUT_EVENTID: 3418 ath10k_wmi_event_peer_sta_kickout(ar, skb); 3419 break; 3420 case WMI_10X_HOST_SWBA_EVENTID: 3421 ath10k_wmi_event_host_swba(ar, skb); 3422 break; 3423 case WMI_10X_TBTTOFFSET_UPDATE_EVENTID: 3424 ath10k_wmi_event_tbttoffset_update(ar, skb); 3425 break; 3426 case WMI_10X_PHYERR_EVENTID: 3427 ath10k_wmi_event_phyerr(ar, skb); 3428 break; 3429 case WMI_10X_ROAM_EVENTID: 3430 ath10k_wmi_event_roam(ar, skb); 3431 break; 3432 case WMI_10X_PROFILE_MATCH: 3433 ath10k_wmi_event_profile_match(ar, skb); 3434 break; 3435 case WMI_10X_DEBUG_PRINT_EVENTID: 3436 ath10k_wmi_event_debug_print(ar, skb); 3437 break; 3438 case WMI_10X_PDEV_QVIT_EVENTID: 3439 ath10k_wmi_event_pdev_qvit(ar, skb); 3440 break; 3441 case WMI_10X_WLAN_PROFILE_DATA_EVENTID: 3442 ath10k_wmi_event_wlan_profile_data(ar, skb); 3443 break; 3444 case WMI_10X_RTT_MEASUREMENT_REPORT_EVENTID: 3445 ath10k_wmi_event_rtt_measurement_report(ar, skb); 3446 break; 3447 case WMI_10X_TSF_MEASUREMENT_REPORT_EVENTID: 3448 ath10k_wmi_event_tsf_measurement_report(ar, skb); 3449 break; 3450 case WMI_10X_RTT_ERROR_REPORT_EVENTID: 3451 ath10k_wmi_event_rtt_error_report(ar, skb); 3452 break; 3453 case WMI_10X_WOW_WAKEUP_HOST_EVENTID: 3454 ath10k_wmi_event_wow_wakeup_host(ar, skb); 3455 break; 3456 case WMI_10X_DCS_INTERFERENCE_EVENTID: 3457 ath10k_wmi_event_dcs_interference(ar, skb); 3458 break; 3459 case WMI_10X_PDEV_TPC_CONFIG_EVENTID: 3460 ath10k_wmi_event_pdev_tpc_config(ar, skb); 3461 break; 3462 case WMI_10X_INST_RSSI_STATS_EVENTID: 3463 ath10k_wmi_event_inst_rssi_stats(ar, skb); 3464 break; 3465 case WMI_10X_VDEV_STANDBY_REQ_EVENTID: 3466 ath10k_wmi_event_vdev_standby_req(ar, skb); 3467 break; 3468 case WMI_10X_VDEV_RESUME_REQ_EVENTID: 3469 ath10k_wmi_event_vdev_resume_req(ar, skb); 3470 break; 3471 case WMI_10X_SERVICE_READY_EVENTID: 3472 ath10k_wmi_event_service_ready(ar, skb); 3473 break; 3474 case WMI_10X_READY_EVENTID: 3475 ath10k_wmi_event_ready(ar, skb); 3476 break; 3477 case WMI_10X_PDEV_UTF_EVENTID: 3478 /* ignore utf events */ 3479 break; 3480 default: 3481 ath10k_warn(ar, "Unknown eventid: %d\n", id); 3482 break; 3483 } 3484 3485 out: 3486 dev_kfree_skb(skb); 3487 } 3488 3489 static void ath10k_wmi_10_2_op_rx(struct ath10k *ar, struct sk_buff *skb) 3490 { 3491 struct wmi_cmd_hdr *cmd_hdr; 3492 enum wmi_10_2_event_id id; 3493 3494 cmd_hdr = (struct wmi_cmd_hdr *)skb->data; 3495 id = MS(__le32_to_cpu(cmd_hdr->cmd_id), WMI_CMD_HDR_CMD_ID); 3496 3497 if (skb_pull(skb, sizeof(struct wmi_cmd_hdr)) == NULL) 3498 return; 3499 3500 trace_ath10k_wmi_event(ar, id, skb->data, skb->len); 3501 3502 switch (id) { 3503 case WMI_10_2_MGMT_RX_EVENTID: 3504 ath10k_wmi_event_mgmt_rx(ar, skb); 3505 /* mgmt_rx() owns the skb now! */ 3506 return; 3507 case WMI_10_2_SCAN_EVENTID: 3508 ath10k_wmi_event_scan(ar, skb); 3509 break; 3510 case WMI_10_2_CHAN_INFO_EVENTID: 3511 ath10k_wmi_event_chan_info(ar, skb); 3512 break; 3513 case WMI_10_2_ECHO_EVENTID: 3514 ath10k_wmi_event_echo(ar, skb); 3515 break; 3516 case WMI_10_2_DEBUG_MESG_EVENTID: 3517 ath10k_wmi_event_debug_mesg(ar, skb); 3518 break; 3519 case WMI_10_2_UPDATE_STATS_EVENTID: 3520 ath10k_wmi_event_update_stats(ar, skb); 3521 break; 3522 case WMI_10_2_VDEV_START_RESP_EVENTID: 3523 ath10k_wmi_event_vdev_start_resp(ar, skb); 3524 break; 3525 case WMI_10_2_VDEV_STOPPED_EVENTID: 3526 ath10k_wmi_event_vdev_stopped(ar, skb); 3527 break; 3528 case WMI_10_2_PEER_STA_KICKOUT_EVENTID: 3529 ath10k_wmi_event_peer_sta_kickout(ar, skb); 3530 break; 3531 case WMI_10_2_HOST_SWBA_EVENTID: 3532 ath10k_wmi_event_host_swba(ar, skb); 3533 break; 3534 case WMI_10_2_TBTTOFFSET_UPDATE_EVENTID: 3535 ath10k_wmi_event_tbttoffset_update(ar, skb); 3536 break; 3537 case WMI_10_2_PHYERR_EVENTID: 3538 ath10k_wmi_event_phyerr(ar, skb); 3539 break; 3540 case WMI_10_2_ROAM_EVENTID: 3541 ath10k_wmi_event_roam(ar, skb); 3542 break; 3543 case WMI_10_2_PROFILE_MATCH: 3544 ath10k_wmi_event_profile_match(ar, skb); 3545 break; 3546 case WMI_10_2_DEBUG_PRINT_EVENTID: 3547 ath10k_wmi_event_debug_print(ar, skb); 3548 break; 3549 case WMI_10_2_PDEV_QVIT_EVENTID: 3550 ath10k_wmi_event_pdev_qvit(ar, skb); 3551 break; 3552 case WMI_10_2_WLAN_PROFILE_DATA_EVENTID: 3553 ath10k_wmi_event_wlan_profile_data(ar, skb); 3554 break; 3555 case WMI_10_2_RTT_MEASUREMENT_REPORT_EVENTID: 3556 ath10k_wmi_event_rtt_measurement_report(ar, skb); 3557 break; 3558 case WMI_10_2_TSF_MEASUREMENT_REPORT_EVENTID: 3559 ath10k_wmi_event_tsf_measurement_report(ar, skb); 3560 break; 3561 case WMI_10_2_RTT_ERROR_REPORT_EVENTID: 3562 ath10k_wmi_event_rtt_error_report(ar, skb); 3563 break; 3564 case WMI_10_2_WOW_WAKEUP_HOST_EVENTID: 3565 ath10k_wmi_event_wow_wakeup_host(ar, skb); 3566 break; 3567 case WMI_10_2_DCS_INTERFERENCE_EVENTID: 3568 ath10k_wmi_event_dcs_interference(ar, skb); 3569 break; 3570 case WMI_10_2_PDEV_TPC_CONFIG_EVENTID: 3571 ath10k_wmi_event_pdev_tpc_config(ar, skb); 3572 break; 3573 case WMI_10_2_INST_RSSI_STATS_EVENTID: 3574 ath10k_wmi_event_inst_rssi_stats(ar, skb); 3575 break; 3576 case WMI_10_2_VDEV_STANDBY_REQ_EVENTID: 3577 ath10k_wmi_event_vdev_standby_req(ar, skb); 3578 break; 3579 case WMI_10_2_VDEV_RESUME_REQ_EVENTID: 3580 ath10k_wmi_event_vdev_resume_req(ar, skb); 3581 break; 3582 case WMI_10_2_SERVICE_READY_EVENTID: 3583 ath10k_wmi_event_service_ready(ar, skb); 3584 break; 3585 case WMI_10_2_READY_EVENTID: 3586 ath10k_wmi_event_ready(ar, skb); 3587 break; 3588 case WMI_10_2_PDEV_TEMPERATURE_EVENTID: 3589 ath10k_wmi_event_temperature(ar, skb); 3590 break; 3591 case WMI_10_2_RTT_KEEPALIVE_EVENTID: 3592 case WMI_10_2_GPIO_INPUT_EVENTID: 3593 case WMI_10_2_PEER_RATECODE_LIST_EVENTID: 3594 case WMI_10_2_GENERIC_BUFFER_EVENTID: 3595 case WMI_10_2_MCAST_BUF_RELEASE_EVENTID: 3596 case WMI_10_2_MCAST_LIST_AGEOUT_EVENTID: 3597 case WMI_10_2_WDS_PEER_EVENTID: 3598 ath10k_dbg(ar, ATH10K_DBG_WMI, 3599 "received event id %d not implemented\n", id); 3600 break; 3601 default: 3602 ath10k_warn(ar, "Unknown eventid: %d\n", id); 3603 break; 3604 } 3605 3606 dev_kfree_skb(skb); 3607 } 3608 3609 static void ath10k_wmi_process_rx(struct ath10k *ar, struct sk_buff *skb) 3610 { 3611 int ret; 3612 3613 ret = ath10k_wmi_rx(ar, skb); 3614 if (ret) 3615 ath10k_warn(ar, "failed to process wmi rx: %d\n", ret); 3616 } 3617 3618 int ath10k_wmi_connect(struct ath10k *ar) 3619 { 3620 int status; 3621 struct ath10k_htc_svc_conn_req conn_req; 3622 struct ath10k_htc_svc_conn_resp conn_resp; 3623 3624 memset(&conn_req, 0, sizeof(conn_req)); 3625 memset(&conn_resp, 0, sizeof(conn_resp)); 3626 3627 /* these fields are the same for all service endpoints */ 3628 conn_req.ep_ops.ep_tx_complete = ath10k_wmi_htc_tx_complete; 3629 conn_req.ep_ops.ep_rx_complete = ath10k_wmi_process_rx; 3630 conn_req.ep_ops.ep_tx_credits = ath10k_wmi_op_ep_tx_credits; 3631 3632 /* connect to control service */ 3633 conn_req.service_id = ATH10K_HTC_SVC_ID_WMI_CONTROL; 3634 3635 status = ath10k_htc_connect_service(&ar->htc, &conn_req, &conn_resp); 3636 if (status) { 3637 ath10k_warn(ar, "failed to connect to WMI CONTROL service status: %d\n", 3638 status); 3639 return status; 3640 } 3641 3642 ar->wmi.eid = conn_resp.eid; 3643 return 0; 3644 } 3645 3646 static struct sk_buff * 3647 ath10k_wmi_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 rd5g, 3648 u16 ctl2g, u16 ctl5g, 3649 enum wmi_dfs_region dfs_reg) 3650 { 3651 struct wmi_pdev_set_regdomain_cmd *cmd; 3652 struct sk_buff *skb; 3653 3654 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3655 if (!skb) 3656 return ERR_PTR(-ENOMEM); 3657 3658 cmd = (struct wmi_pdev_set_regdomain_cmd *)skb->data; 3659 cmd->reg_domain = __cpu_to_le32(rd); 3660 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 3661 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 3662 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 3663 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 3664 3665 ath10k_dbg(ar, ATH10K_DBG_WMI, 3666 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x\n", 3667 rd, rd2g, rd5g, ctl2g, ctl5g); 3668 return skb; 3669 } 3670 3671 static struct sk_buff * 3672 ath10k_wmi_10x_op_gen_pdev_set_rd(struct ath10k *ar, u16 rd, u16 rd2g, u16 3673 rd5g, u16 ctl2g, u16 ctl5g, 3674 enum wmi_dfs_region dfs_reg) 3675 { 3676 struct wmi_pdev_set_regdomain_cmd_10x *cmd; 3677 struct sk_buff *skb; 3678 3679 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3680 if (!skb) 3681 return ERR_PTR(-ENOMEM); 3682 3683 cmd = (struct wmi_pdev_set_regdomain_cmd_10x *)skb->data; 3684 cmd->reg_domain = __cpu_to_le32(rd); 3685 cmd->reg_domain_2G = __cpu_to_le32(rd2g); 3686 cmd->reg_domain_5G = __cpu_to_le32(rd5g); 3687 cmd->conformance_test_limit_2G = __cpu_to_le32(ctl2g); 3688 cmd->conformance_test_limit_5G = __cpu_to_le32(ctl5g); 3689 cmd->dfs_domain = __cpu_to_le32(dfs_reg); 3690 3691 ath10k_dbg(ar, ATH10K_DBG_WMI, 3692 "wmi pdev regdomain rd %x rd2g %x rd5g %x ctl2g %x ctl5g %x dfs_region %x\n", 3693 rd, rd2g, rd5g, ctl2g, ctl5g, dfs_reg); 3694 return skb; 3695 } 3696 3697 static struct sk_buff * 3698 ath10k_wmi_op_gen_pdev_suspend(struct ath10k *ar, u32 suspend_opt) 3699 { 3700 struct wmi_pdev_suspend_cmd *cmd; 3701 struct sk_buff *skb; 3702 3703 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3704 if (!skb) 3705 return ERR_PTR(-ENOMEM); 3706 3707 cmd = (struct wmi_pdev_suspend_cmd *)skb->data; 3708 cmd->suspend_opt = __cpu_to_le32(suspend_opt); 3709 3710 return skb; 3711 } 3712 3713 static struct sk_buff * 3714 ath10k_wmi_op_gen_pdev_resume(struct ath10k *ar) 3715 { 3716 struct sk_buff *skb; 3717 3718 skb = ath10k_wmi_alloc_skb(ar, 0); 3719 if (!skb) 3720 return ERR_PTR(-ENOMEM); 3721 3722 return skb; 3723 } 3724 3725 static struct sk_buff * 3726 ath10k_wmi_op_gen_pdev_set_param(struct ath10k *ar, u32 id, u32 value) 3727 { 3728 struct wmi_pdev_set_param_cmd *cmd; 3729 struct sk_buff *skb; 3730 3731 if (id == WMI_PDEV_PARAM_UNSUPPORTED) { 3732 ath10k_warn(ar, "pdev param %d not supported by firmware\n", 3733 id); 3734 return ERR_PTR(-EOPNOTSUPP); 3735 } 3736 3737 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 3738 if (!skb) 3739 return ERR_PTR(-ENOMEM); 3740 3741 cmd = (struct wmi_pdev_set_param_cmd *)skb->data; 3742 cmd->param_id = __cpu_to_le32(id); 3743 cmd->param_value = __cpu_to_le32(value); 3744 3745 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set param %d value %d\n", 3746 id, value); 3747 return skb; 3748 } 3749 3750 void ath10k_wmi_put_host_mem_chunks(struct ath10k *ar, 3751 struct wmi_host_mem_chunks *chunks) 3752 { 3753 struct host_memory_chunk *chunk; 3754 int i; 3755 3756 chunks->count = __cpu_to_le32(ar->wmi.num_mem_chunks); 3757 3758 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 3759 chunk = &chunks->items[i]; 3760 chunk->ptr = __cpu_to_le32(ar->wmi.mem_chunks[i].paddr); 3761 chunk->size = __cpu_to_le32(ar->wmi.mem_chunks[i].len); 3762 chunk->req_id = __cpu_to_le32(ar->wmi.mem_chunks[i].req_id); 3763 3764 ath10k_dbg(ar, ATH10K_DBG_WMI, 3765 "wmi chunk %d len %d requested, addr 0x%llx\n", 3766 i, 3767 ar->wmi.mem_chunks[i].len, 3768 (unsigned long long)ar->wmi.mem_chunks[i].paddr); 3769 } 3770 } 3771 3772 static struct sk_buff *ath10k_wmi_op_gen_init(struct ath10k *ar) 3773 { 3774 struct wmi_init_cmd *cmd; 3775 struct sk_buff *buf; 3776 struct wmi_resource_config config = {}; 3777 u32 len, val; 3778 3779 config.num_vdevs = __cpu_to_le32(TARGET_NUM_VDEVS); 3780 config.num_peers = __cpu_to_le32(TARGET_NUM_PEERS); 3781 config.num_offload_peers = __cpu_to_le32(TARGET_NUM_OFFLOAD_PEERS); 3782 3783 config.num_offload_reorder_bufs = 3784 __cpu_to_le32(TARGET_NUM_OFFLOAD_REORDER_BUFS); 3785 3786 config.num_peer_keys = __cpu_to_le32(TARGET_NUM_PEER_KEYS); 3787 config.num_tids = __cpu_to_le32(TARGET_NUM_TIDS); 3788 config.ast_skid_limit = __cpu_to_le32(TARGET_AST_SKID_LIMIT); 3789 config.tx_chain_mask = __cpu_to_le32(TARGET_TX_CHAIN_MASK); 3790 config.rx_chain_mask = __cpu_to_le32(TARGET_RX_CHAIN_MASK); 3791 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 3792 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 3793 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_RX_TIMEOUT_LO_PRI); 3794 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_RX_TIMEOUT_HI_PRI); 3795 config.rx_decap_mode = __cpu_to_le32(TARGET_RX_DECAP_MODE); 3796 3797 config.scan_max_pending_reqs = 3798 __cpu_to_le32(TARGET_SCAN_MAX_PENDING_REQS); 3799 3800 config.bmiss_offload_max_vdev = 3801 __cpu_to_le32(TARGET_BMISS_OFFLOAD_MAX_VDEV); 3802 3803 config.roam_offload_max_vdev = 3804 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_VDEV); 3805 3806 config.roam_offload_max_ap_profiles = 3807 __cpu_to_le32(TARGET_ROAM_OFFLOAD_MAX_AP_PROFILES); 3808 3809 config.num_mcast_groups = __cpu_to_le32(TARGET_NUM_MCAST_GROUPS); 3810 config.num_mcast_table_elems = 3811 __cpu_to_le32(TARGET_NUM_MCAST_TABLE_ELEMS); 3812 3813 config.mcast2ucast_mode = __cpu_to_le32(TARGET_MCAST2UCAST_MODE); 3814 config.tx_dbg_log_size = __cpu_to_le32(TARGET_TX_DBG_LOG_SIZE); 3815 config.num_wds_entries = __cpu_to_le32(TARGET_NUM_WDS_ENTRIES); 3816 config.dma_burst_size = __cpu_to_le32(TARGET_DMA_BURST_SIZE); 3817 config.mac_aggr_delim = __cpu_to_le32(TARGET_MAC_AGGR_DELIM); 3818 3819 val = TARGET_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3820 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3821 3822 config.vow_config = __cpu_to_le32(TARGET_VOW_CONFIG); 3823 3824 config.gtk_offload_max_vdev = 3825 __cpu_to_le32(TARGET_GTK_OFFLOAD_MAX_VDEV); 3826 3827 config.num_msdu_desc = __cpu_to_le32(TARGET_NUM_MSDU_DESC); 3828 config.max_frag_entries = __cpu_to_le32(TARGET_MAX_FRAG_ENTRIES); 3829 3830 len = sizeof(*cmd) + 3831 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3832 3833 buf = ath10k_wmi_alloc_skb(ar, len); 3834 if (!buf) 3835 return ERR_PTR(-ENOMEM); 3836 3837 cmd = (struct wmi_init_cmd *)buf->data; 3838 3839 memcpy(&cmd->resource_config, &config, sizeof(config)); 3840 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 3841 3842 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init\n"); 3843 return buf; 3844 } 3845 3846 static struct sk_buff *ath10k_wmi_10_1_op_gen_init(struct ath10k *ar) 3847 { 3848 struct wmi_init_cmd_10x *cmd; 3849 struct sk_buff *buf; 3850 struct wmi_resource_config_10x config = {}; 3851 u32 len, val; 3852 3853 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 3854 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 3855 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 3856 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 3857 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 3858 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 3859 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 3860 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3861 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3862 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3863 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 3864 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE); 3865 3866 config.scan_max_pending_reqs = 3867 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 3868 3869 config.bmiss_offload_max_vdev = 3870 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 3871 3872 config.roam_offload_max_vdev = 3873 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 3874 3875 config.roam_offload_max_ap_profiles = 3876 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 3877 3878 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 3879 config.num_mcast_table_elems = 3880 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 3881 3882 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 3883 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 3884 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 3885 config.dma_burst_size = __cpu_to_le32(TARGET_10X_DMA_BURST_SIZE); 3886 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 3887 3888 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3889 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3890 3891 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 3892 3893 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 3894 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 3895 3896 len = sizeof(*cmd) + 3897 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3898 3899 buf = ath10k_wmi_alloc_skb(ar, len); 3900 if (!buf) 3901 return ERR_PTR(-ENOMEM); 3902 3903 cmd = (struct wmi_init_cmd_10x *)buf->data; 3904 3905 memcpy(&cmd->resource_config, &config, sizeof(config)); 3906 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 3907 3908 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10x\n"); 3909 return buf; 3910 } 3911 3912 static struct sk_buff *ath10k_wmi_10_2_op_gen_init(struct ath10k *ar) 3913 { 3914 struct wmi_init_cmd_10_2 *cmd; 3915 struct sk_buff *buf; 3916 struct wmi_resource_config_10x config = {}; 3917 u32 len, val, features; 3918 3919 config.num_vdevs = __cpu_to_le32(TARGET_10X_NUM_VDEVS); 3920 config.num_peers = __cpu_to_le32(TARGET_10X_NUM_PEERS); 3921 config.num_peer_keys = __cpu_to_le32(TARGET_10X_NUM_PEER_KEYS); 3922 config.num_tids = __cpu_to_le32(TARGET_10X_NUM_TIDS); 3923 config.ast_skid_limit = __cpu_to_le32(TARGET_10X_AST_SKID_LIMIT); 3924 config.tx_chain_mask = __cpu_to_le32(TARGET_10X_TX_CHAIN_MASK); 3925 config.rx_chain_mask = __cpu_to_le32(TARGET_10X_RX_CHAIN_MASK); 3926 config.rx_timeout_pri_vo = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3927 config.rx_timeout_pri_vi = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3928 config.rx_timeout_pri_be = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_LO_PRI); 3929 config.rx_timeout_pri_bk = __cpu_to_le32(TARGET_10X_RX_TIMEOUT_HI_PRI); 3930 config.rx_decap_mode = __cpu_to_le32(TARGET_10X_RX_DECAP_MODE); 3931 3932 config.scan_max_pending_reqs = 3933 __cpu_to_le32(TARGET_10X_SCAN_MAX_PENDING_REQS); 3934 3935 config.bmiss_offload_max_vdev = 3936 __cpu_to_le32(TARGET_10X_BMISS_OFFLOAD_MAX_VDEV); 3937 3938 config.roam_offload_max_vdev = 3939 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_VDEV); 3940 3941 config.roam_offload_max_ap_profiles = 3942 __cpu_to_le32(TARGET_10X_ROAM_OFFLOAD_MAX_AP_PROFILES); 3943 3944 config.num_mcast_groups = __cpu_to_le32(TARGET_10X_NUM_MCAST_GROUPS); 3945 config.num_mcast_table_elems = 3946 __cpu_to_le32(TARGET_10X_NUM_MCAST_TABLE_ELEMS); 3947 3948 config.mcast2ucast_mode = __cpu_to_le32(TARGET_10X_MCAST2UCAST_MODE); 3949 config.tx_dbg_log_size = __cpu_to_le32(TARGET_10X_TX_DBG_LOG_SIZE); 3950 config.num_wds_entries = __cpu_to_le32(TARGET_10X_NUM_WDS_ENTRIES); 3951 config.dma_burst_size = __cpu_to_le32(TARGET_10_2_DMA_BURST_SIZE); 3952 config.mac_aggr_delim = __cpu_to_le32(TARGET_10X_MAC_AGGR_DELIM); 3953 3954 val = TARGET_10X_RX_SKIP_DEFRAG_TIMEOUT_DUP_DETECTION_CHECK; 3955 config.rx_skip_defrag_timeout_dup_detection_check = __cpu_to_le32(val); 3956 3957 config.vow_config = __cpu_to_le32(TARGET_10X_VOW_CONFIG); 3958 3959 config.num_msdu_desc = __cpu_to_le32(TARGET_10X_NUM_MSDU_DESC); 3960 config.max_frag_entries = __cpu_to_le32(TARGET_10X_MAX_FRAG_ENTRIES); 3961 3962 len = sizeof(*cmd) + 3963 (sizeof(struct host_memory_chunk) * ar->wmi.num_mem_chunks); 3964 3965 buf = ath10k_wmi_alloc_skb(ar, len); 3966 if (!buf) 3967 return ERR_PTR(-ENOMEM); 3968 3969 cmd = (struct wmi_init_cmd_10_2 *)buf->data; 3970 3971 features = WMI_10_2_RX_BATCH_MODE; 3972 cmd->resource_config.feature_mask = __cpu_to_le32(features); 3973 3974 memcpy(&cmd->resource_config.common, &config, sizeof(config)); 3975 ath10k_wmi_put_host_mem_chunks(ar, &cmd->mem_chunks); 3976 3977 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi init 10.2\n"); 3978 return buf; 3979 } 3980 3981 int ath10k_wmi_start_scan_verify(const struct wmi_start_scan_arg *arg) 3982 { 3983 if (arg->ie_len && !arg->ie) 3984 return -EINVAL; 3985 if (arg->n_channels && !arg->channels) 3986 return -EINVAL; 3987 if (arg->n_ssids && !arg->ssids) 3988 return -EINVAL; 3989 if (arg->n_bssids && !arg->bssids) 3990 return -EINVAL; 3991 3992 if (arg->ie_len > WLAN_SCAN_PARAMS_MAX_IE_LEN) 3993 return -EINVAL; 3994 if (arg->n_channels > ARRAY_SIZE(arg->channels)) 3995 return -EINVAL; 3996 if (arg->n_ssids > WLAN_SCAN_PARAMS_MAX_SSID) 3997 return -EINVAL; 3998 if (arg->n_bssids > WLAN_SCAN_PARAMS_MAX_BSSID) 3999 return -EINVAL; 4000 4001 return 0; 4002 } 4003 4004 static size_t 4005 ath10k_wmi_start_scan_tlvs_len(const struct wmi_start_scan_arg *arg) 4006 { 4007 int len = 0; 4008 4009 if (arg->ie_len) { 4010 len += sizeof(struct wmi_ie_data); 4011 len += roundup(arg->ie_len, 4); 4012 } 4013 4014 if (arg->n_channels) { 4015 len += sizeof(struct wmi_chan_list); 4016 len += sizeof(__le32) * arg->n_channels; 4017 } 4018 4019 if (arg->n_ssids) { 4020 len += sizeof(struct wmi_ssid_list); 4021 len += sizeof(struct wmi_ssid) * arg->n_ssids; 4022 } 4023 4024 if (arg->n_bssids) { 4025 len += sizeof(struct wmi_bssid_list); 4026 len += sizeof(struct wmi_mac_addr) * arg->n_bssids; 4027 } 4028 4029 return len; 4030 } 4031 4032 void ath10k_wmi_put_start_scan_common(struct wmi_start_scan_common *cmn, 4033 const struct wmi_start_scan_arg *arg) 4034 { 4035 u32 scan_id; 4036 u32 scan_req_id; 4037 4038 scan_id = WMI_HOST_SCAN_REQ_ID_PREFIX; 4039 scan_id |= arg->scan_id; 4040 4041 scan_req_id = WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 4042 scan_req_id |= arg->scan_req_id; 4043 4044 cmn->scan_id = __cpu_to_le32(scan_id); 4045 cmn->scan_req_id = __cpu_to_le32(scan_req_id); 4046 cmn->vdev_id = __cpu_to_le32(arg->vdev_id); 4047 cmn->scan_priority = __cpu_to_le32(arg->scan_priority); 4048 cmn->notify_scan_events = __cpu_to_le32(arg->notify_scan_events); 4049 cmn->dwell_time_active = __cpu_to_le32(arg->dwell_time_active); 4050 cmn->dwell_time_passive = __cpu_to_le32(arg->dwell_time_passive); 4051 cmn->min_rest_time = __cpu_to_le32(arg->min_rest_time); 4052 cmn->max_rest_time = __cpu_to_le32(arg->max_rest_time); 4053 cmn->repeat_probe_time = __cpu_to_le32(arg->repeat_probe_time); 4054 cmn->probe_spacing_time = __cpu_to_le32(arg->probe_spacing_time); 4055 cmn->idle_time = __cpu_to_le32(arg->idle_time); 4056 cmn->max_scan_time = __cpu_to_le32(arg->max_scan_time); 4057 cmn->probe_delay = __cpu_to_le32(arg->probe_delay); 4058 cmn->scan_ctrl_flags = __cpu_to_le32(arg->scan_ctrl_flags); 4059 } 4060 4061 static void 4062 ath10k_wmi_put_start_scan_tlvs(struct wmi_start_scan_tlvs *tlvs, 4063 const struct wmi_start_scan_arg *arg) 4064 { 4065 struct wmi_ie_data *ie; 4066 struct wmi_chan_list *channels; 4067 struct wmi_ssid_list *ssids; 4068 struct wmi_bssid_list *bssids; 4069 void *ptr = tlvs->tlvs; 4070 int i; 4071 4072 if (arg->n_channels) { 4073 channels = ptr; 4074 channels->tag = __cpu_to_le32(WMI_CHAN_LIST_TAG); 4075 channels->num_chan = __cpu_to_le32(arg->n_channels); 4076 4077 for (i = 0; i < arg->n_channels; i++) 4078 channels->channel_list[i].freq = 4079 __cpu_to_le16(arg->channels[i]); 4080 4081 ptr += sizeof(*channels); 4082 ptr += sizeof(__le32) * arg->n_channels; 4083 } 4084 4085 if (arg->n_ssids) { 4086 ssids = ptr; 4087 ssids->tag = __cpu_to_le32(WMI_SSID_LIST_TAG); 4088 ssids->num_ssids = __cpu_to_le32(arg->n_ssids); 4089 4090 for (i = 0; i < arg->n_ssids; i++) { 4091 ssids->ssids[i].ssid_len = 4092 __cpu_to_le32(arg->ssids[i].len); 4093 memcpy(&ssids->ssids[i].ssid, 4094 arg->ssids[i].ssid, 4095 arg->ssids[i].len); 4096 } 4097 4098 ptr += sizeof(*ssids); 4099 ptr += sizeof(struct wmi_ssid) * arg->n_ssids; 4100 } 4101 4102 if (arg->n_bssids) { 4103 bssids = ptr; 4104 bssids->tag = __cpu_to_le32(WMI_BSSID_LIST_TAG); 4105 bssids->num_bssid = __cpu_to_le32(arg->n_bssids); 4106 4107 for (i = 0; i < arg->n_bssids; i++) 4108 memcpy(&bssids->bssid_list[i], 4109 arg->bssids[i].bssid, 4110 ETH_ALEN); 4111 4112 ptr += sizeof(*bssids); 4113 ptr += sizeof(struct wmi_mac_addr) * arg->n_bssids; 4114 } 4115 4116 if (arg->ie_len) { 4117 ie = ptr; 4118 ie->tag = __cpu_to_le32(WMI_IE_TAG); 4119 ie->ie_len = __cpu_to_le32(arg->ie_len); 4120 memcpy(ie->ie_data, arg->ie, arg->ie_len); 4121 4122 ptr += sizeof(*ie); 4123 ptr += roundup(arg->ie_len, 4); 4124 } 4125 } 4126 4127 static struct sk_buff * 4128 ath10k_wmi_op_gen_start_scan(struct ath10k *ar, 4129 const struct wmi_start_scan_arg *arg) 4130 { 4131 struct wmi_start_scan_cmd *cmd; 4132 struct sk_buff *skb; 4133 size_t len; 4134 int ret; 4135 4136 ret = ath10k_wmi_start_scan_verify(arg); 4137 if (ret) 4138 return ERR_PTR(ret); 4139 4140 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); 4141 skb = ath10k_wmi_alloc_skb(ar, len); 4142 if (!skb) 4143 return ERR_PTR(-ENOMEM); 4144 4145 cmd = (struct wmi_start_scan_cmd *)skb->data; 4146 4147 ath10k_wmi_put_start_scan_common(&cmd->common, arg); 4148 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); 4149 4150 cmd->burst_duration_ms = __cpu_to_le32(0); 4151 4152 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi start scan\n"); 4153 return skb; 4154 } 4155 4156 static struct sk_buff * 4157 ath10k_wmi_10x_op_gen_start_scan(struct ath10k *ar, 4158 const struct wmi_start_scan_arg *arg) 4159 { 4160 struct wmi_10x_start_scan_cmd *cmd; 4161 struct sk_buff *skb; 4162 size_t len; 4163 int ret; 4164 4165 ret = ath10k_wmi_start_scan_verify(arg); 4166 if (ret) 4167 return ERR_PTR(ret); 4168 4169 len = sizeof(*cmd) + ath10k_wmi_start_scan_tlvs_len(arg); 4170 skb = ath10k_wmi_alloc_skb(ar, len); 4171 if (!skb) 4172 return ERR_PTR(-ENOMEM); 4173 4174 cmd = (struct wmi_10x_start_scan_cmd *)skb->data; 4175 4176 ath10k_wmi_put_start_scan_common(&cmd->common, arg); 4177 ath10k_wmi_put_start_scan_tlvs(&cmd->tlvs, arg); 4178 4179 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi 10x start scan\n"); 4180 return skb; 4181 } 4182 4183 void ath10k_wmi_start_scan_init(struct ath10k *ar, 4184 struct wmi_start_scan_arg *arg) 4185 { 4186 /* setup commonly used values */ 4187 arg->scan_req_id = 1; 4188 arg->scan_priority = WMI_SCAN_PRIORITY_LOW; 4189 arg->dwell_time_active = 50; 4190 arg->dwell_time_passive = 150; 4191 arg->min_rest_time = 50; 4192 arg->max_rest_time = 500; 4193 arg->repeat_probe_time = 0; 4194 arg->probe_spacing_time = 0; 4195 arg->idle_time = 0; 4196 arg->max_scan_time = 20000; 4197 arg->probe_delay = 5; 4198 arg->notify_scan_events = WMI_SCAN_EVENT_STARTED 4199 | WMI_SCAN_EVENT_COMPLETED 4200 | WMI_SCAN_EVENT_BSS_CHANNEL 4201 | WMI_SCAN_EVENT_FOREIGN_CHANNEL 4202 | WMI_SCAN_EVENT_DEQUEUED; 4203 arg->scan_ctrl_flags |= WMI_SCAN_ADD_OFDM_RATES; 4204 arg->scan_ctrl_flags |= WMI_SCAN_CHAN_STAT_EVENT; 4205 arg->n_bssids = 1; 4206 arg->bssids[0].bssid = "\xFF\xFF\xFF\xFF\xFF\xFF"; 4207 } 4208 4209 static struct sk_buff * 4210 ath10k_wmi_op_gen_stop_scan(struct ath10k *ar, 4211 const struct wmi_stop_scan_arg *arg) 4212 { 4213 struct wmi_stop_scan_cmd *cmd; 4214 struct sk_buff *skb; 4215 u32 scan_id; 4216 u32 req_id; 4217 4218 if (arg->req_id > 0xFFF) 4219 return ERR_PTR(-EINVAL); 4220 if (arg->req_type == WMI_SCAN_STOP_ONE && arg->u.scan_id > 0xFFF) 4221 return ERR_PTR(-EINVAL); 4222 4223 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4224 if (!skb) 4225 return ERR_PTR(-ENOMEM); 4226 4227 scan_id = arg->u.scan_id; 4228 scan_id |= WMI_HOST_SCAN_REQ_ID_PREFIX; 4229 4230 req_id = arg->req_id; 4231 req_id |= WMI_HOST_SCAN_REQUESTOR_ID_PREFIX; 4232 4233 cmd = (struct wmi_stop_scan_cmd *)skb->data; 4234 cmd->req_type = __cpu_to_le32(arg->req_type); 4235 cmd->vdev_id = __cpu_to_le32(arg->u.vdev_id); 4236 cmd->scan_id = __cpu_to_le32(scan_id); 4237 cmd->scan_req_id = __cpu_to_le32(req_id); 4238 4239 ath10k_dbg(ar, ATH10K_DBG_WMI, 4240 "wmi stop scan reqid %d req_type %d vdev/scan_id %d\n", 4241 arg->req_id, arg->req_type, arg->u.scan_id); 4242 return skb; 4243 } 4244 4245 static struct sk_buff * 4246 ath10k_wmi_op_gen_vdev_create(struct ath10k *ar, u32 vdev_id, 4247 enum wmi_vdev_type type, 4248 enum wmi_vdev_subtype subtype, 4249 const u8 macaddr[ETH_ALEN]) 4250 { 4251 struct wmi_vdev_create_cmd *cmd; 4252 struct sk_buff *skb; 4253 4254 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4255 if (!skb) 4256 return ERR_PTR(-ENOMEM); 4257 4258 cmd = (struct wmi_vdev_create_cmd *)skb->data; 4259 cmd->vdev_id = __cpu_to_le32(vdev_id); 4260 cmd->vdev_type = __cpu_to_le32(type); 4261 cmd->vdev_subtype = __cpu_to_le32(subtype); 4262 ether_addr_copy(cmd->vdev_macaddr.addr, macaddr); 4263 4264 ath10k_dbg(ar, ATH10K_DBG_WMI, 4265 "WMI vdev create: id %d type %d subtype %d macaddr %pM\n", 4266 vdev_id, type, subtype, macaddr); 4267 return skb; 4268 } 4269 4270 static struct sk_buff * 4271 ath10k_wmi_op_gen_vdev_delete(struct ath10k *ar, u32 vdev_id) 4272 { 4273 struct wmi_vdev_delete_cmd *cmd; 4274 struct sk_buff *skb; 4275 4276 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4277 if (!skb) 4278 return ERR_PTR(-ENOMEM); 4279 4280 cmd = (struct wmi_vdev_delete_cmd *)skb->data; 4281 cmd->vdev_id = __cpu_to_le32(vdev_id); 4282 4283 ath10k_dbg(ar, ATH10K_DBG_WMI, 4284 "WMI vdev delete id %d\n", vdev_id); 4285 return skb; 4286 } 4287 4288 static struct sk_buff * 4289 ath10k_wmi_op_gen_vdev_start(struct ath10k *ar, 4290 const struct wmi_vdev_start_request_arg *arg, 4291 bool restart) 4292 { 4293 struct wmi_vdev_start_request_cmd *cmd; 4294 struct sk_buff *skb; 4295 const char *cmdname; 4296 u32 flags = 0; 4297 4298 if (WARN_ON(arg->ssid && arg->ssid_len == 0)) 4299 return ERR_PTR(-EINVAL); 4300 if (WARN_ON(arg->hidden_ssid && !arg->ssid)) 4301 return ERR_PTR(-EINVAL); 4302 if (WARN_ON(arg->ssid_len > sizeof(cmd->ssid.ssid))) 4303 return ERR_PTR(-EINVAL); 4304 4305 if (restart) 4306 cmdname = "restart"; 4307 else 4308 cmdname = "start"; 4309 4310 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4311 if (!skb) 4312 return ERR_PTR(-ENOMEM); 4313 4314 if (arg->hidden_ssid) 4315 flags |= WMI_VDEV_START_HIDDEN_SSID; 4316 if (arg->pmf_enabled) 4317 flags |= WMI_VDEV_START_PMF_ENABLED; 4318 4319 cmd = (struct wmi_vdev_start_request_cmd *)skb->data; 4320 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 4321 cmd->disable_hw_ack = __cpu_to_le32(arg->disable_hw_ack); 4322 cmd->beacon_interval = __cpu_to_le32(arg->bcn_intval); 4323 cmd->dtim_period = __cpu_to_le32(arg->dtim_period); 4324 cmd->flags = __cpu_to_le32(flags); 4325 cmd->bcn_tx_rate = __cpu_to_le32(arg->bcn_tx_rate); 4326 cmd->bcn_tx_power = __cpu_to_le32(arg->bcn_tx_power); 4327 4328 if (arg->ssid) { 4329 cmd->ssid.ssid_len = __cpu_to_le32(arg->ssid_len); 4330 memcpy(cmd->ssid.ssid, arg->ssid, arg->ssid_len); 4331 } 4332 4333 ath10k_wmi_put_wmi_channel(&cmd->chan, &arg->channel); 4334 4335 ath10k_dbg(ar, ATH10K_DBG_WMI, 4336 "wmi vdev %s id 0x%x flags: 0x%0X, freq %d, mode %d, ch_flags: 0x%0X, max_power: %d\n", 4337 cmdname, arg->vdev_id, 4338 flags, arg->channel.freq, arg->channel.mode, 4339 cmd->chan.flags, arg->channel.max_power); 4340 4341 return skb; 4342 } 4343 4344 static struct sk_buff * 4345 ath10k_wmi_op_gen_vdev_stop(struct ath10k *ar, u32 vdev_id) 4346 { 4347 struct wmi_vdev_stop_cmd *cmd; 4348 struct sk_buff *skb; 4349 4350 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4351 if (!skb) 4352 return ERR_PTR(-ENOMEM); 4353 4354 cmd = (struct wmi_vdev_stop_cmd *)skb->data; 4355 cmd->vdev_id = __cpu_to_le32(vdev_id); 4356 4357 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi vdev stop id 0x%x\n", vdev_id); 4358 return skb; 4359 } 4360 4361 static struct sk_buff * 4362 ath10k_wmi_op_gen_vdev_up(struct ath10k *ar, u32 vdev_id, u32 aid, 4363 const u8 *bssid) 4364 { 4365 struct wmi_vdev_up_cmd *cmd; 4366 struct sk_buff *skb; 4367 4368 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4369 if (!skb) 4370 return ERR_PTR(-ENOMEM); 4371 4372 cmd = (struct wmi_vdev_up_cmd *)skb->data; 4373 cmd->vdev_id = __cpu_to_le32(vdev_id); 4374 cmd->vdev_assoc_id = __cpu_to_le32(aid); 4375 ether_addr_copy(cmd->vdev_bssid.addr, bssid); 4376 4377 ath10k_dbg(ar, ATH10K_DBG_WMI, 4378 "wmi mgmt vdev up id 0x%x assoc id %d bssid %pM\n", 4379 vdev_id, aid, bssid); 4380 return skb; 4381 } 4382 4383 static struct sk_buff * 4384 ath10k_wmi_op_gen_vdev_down(struct ath10k *ar, u32 vdev_id) 4385 { 4386 struct wmi_vdev_down_cmd *cmd; 4387 struct sk_buff *skb; 4388 4389 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4390 if (!skb) 4391 return ERR_PTR(-ENOMEM); 4392 4393 cmd = (struct wmi_vdev_down_cmd *)skb->data; 4394 cmd->vdev_id = __cpu_to_le32(vdev_id); 4395 4396 ath10k_dbg(ar, ATH10K_DBG_WMI, 4397 "wmi mgmt vdev down id 0x%x\n", vdev_id); 4398 return skb; 4399 } 4400 4401 static struct sk_buff * 4402 ath10k_wmi_op_gen_vdev_set_param(struct ath10k *ar, u32 vdev_id, 4403 u32 param_id, u32 param_value) 4404 { 4405 struct wmi_vdev_set_param_cmd *cmd; 4406 struct sk_buff *skb; 4407 4408 if (param_id == WMI_VDEV_PARAM_UNSUPPORTED) { 4409 ath10k_dbg(ar, ATH10K_DBG_WMI, 4410 "vdev param %d not supported by firmware\n", 4411 param_id); 4412 return ERR_PTR(-EOPNOTSUPP); 4413 } 4414 4415 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4416 if (!skb) 4417 return ERR_PTR(-ENOMEM); 4418 4419 cmd = (struct wmi_vdev_set_param_cmd *)skb->data; 4420 cmd->vdev_id = __cpu_to_le32(vdev_id); 4421 cmd->param_id = __cpu_to_le32(param_id); 4422 cmd->param_value = __cpu_to_le32(param_value); 4423 4424 ath10k_dbg(ar, ATH10K_DBG_WMI, 4425 "wmi vdev id 0x%x set param %d value %d\n", 4426 vdev_id, param_id, param_value); 4427 return skb; 4428 } 4429 4430 static struct sk_buff * 4431 ath10k_wmi_op_gen_vdev_install_key(struct ath10k *ar, 4432 const struct wmi_vdev_install_key_arg *arg) 4433 { 4434 struct wmi_vdev_install_key_cmd *cmd; 4435 struct sk_buff *skb; 4436 4437 if (arg->key_cipher == WMI_CIPHER_NONE && arg->key_data != NULL) 4438 return ERR_PTR(-EINVAL); 4439 if (arg->key_cipher != WMI_CIPHER_NONE && arg->key_data == NULL) 4440 return ERR_PTR(-EINVAL); 4441 4442 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd) + arg->key_len); 4443 if (!skb) 4444 return ERR_PTR(-ENOMEM); 4445 4446 cmd = (struct wmi_vdev_install_key_cmd *)skb->data; 4447 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 4448 cmd->key_idx = __cpu_to_le32(arg->key_idx); 4449 cmd->key_flags = __cpu_to_le32(arg->key_flags); 4450 cmd->key_cipher = __cpu_to_le32(arg->key_cipher); 4451 cmd->key_len = __cpu_to_le32(arg->key_len); 4452 cmd->key_txmic_len = __cpu_to_le32(arg->key_txmic_len); 4453 cmd->key_rxmic_len = __cpu_to_le32(arg->key_rxmic_len); 4454 4455 if (arg->macaddr) 4456 ether_addr_copy(cmd->peer_macaddr.addr, arg->macaddr); 4457 if (arg->key_data) 4458 memcpy(cmd->key_data, arg->key_data, arg->key_len); 4459 4460 ath10k_dbg(ar, ATH10K_DBG_WMI, 4461 "wmi vdev install key idx %d cipher %d len %d\n", 4462 arg->key_idx, arg->key_cipher, arg->key_len); 4463 return skb; 4464 } 4465 4466 static struct sk_buff * 4467 ath10k_wmi_op_gen_vdev_spectral_conf(struct ath10k *ar, 4468 const struct wmi_vdev_spectral_conf_arg *arg) 4469 { 4470 struct wmi_vdev_spectral_conf_cmd *cmd; 4471 struct sk_buff *skb; 4472 4473 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4474 if (!skb) 4475 return ERR_PTR(-ENOMEM); 4476 4477 cmd = (struct wmi_vdev_spectral_conf_cmd *)skb->data; 4478 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 4479 cmd->scan_count = __cpu_to_le32(arg->scan_count); 4480 cmd->scan_period = __cpu_to_le32(arg->scan_period); 4481 cmd->scan_priority = __cpu_to_le32(arg->scan_priority); 4482 cmd->scan_fft_size = __cpu_to_le32(arg->scan_fft_size); 4483 cmd->scan_gc_ena = __cpu_to_le32(arg->scan_gc_ena); 4484 cmd->scan_restart_ena = __cpu_to_le32(arg->scan_restart_ena); 4485 cmd->scan_noise_floor_ref = __cpu_to_le32(arg->scan_noise_floor_ref); 4486 cmd->scan_init_delay = __cpu_to_le32(arg->scan_init_delay); 4487 cmd->scan_nb_tone_thr = __cpu_to_le32(arg->scan_nb_tone_thr); 4488 cmd->scan_str_bin_thr = __cpu_to_le32(arg->scan_str_bin_thr); 4489 cmd->scan_wb_rpt_mode = __cpu_to_le32(arg->scan_wb_rpt_mode); 4490 cmd->scan_rssi_rpt_mode = __cpu_to_le32(arg->scan_rssi_rpt_mode); 4491 cmd->scan_rssi_thr = __cpu_to_le32(arg->scan_rssi_thr); 4492 cmd->scan_pwr_format = __cpu_to_le32(arg->scan_pwr_format); 4493 cmd->scan_rpt_mode = __cpu_to_le32(arg->scan_rpt_mode); 4494 cmd->scan_bin_scale = __cpu_to_le32(arg->scan_bin_scale); 4495 cmd->scan_dbm_adj = __cpu_to_le32(arg->scan_dbm_adj); 4496 cmd->scan_chn_mask = __cpu_to_le32(arg->scan_chn_mask); 4497 4498 return skb; 4499 } 4500 4501 static struct sk_buff * 4502 ath10k_wmi_op_gen_vdev_spectral_enable(struct ath10k *ar, u32 vdev_id, 4503 u32 trigger, u32 enable) 4504 { 4505 struct wmi_vdev_spectral_enable_cmd *cmd; 4506 struct sk_buff *skb; 4507 4508 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4509 if (!skb) 4510 return ERR_PTR(-ENOMEM); 4511 4512 cmd = (struct wmi_vdev_spectral_enable_cmd *)skb->data; 4513 cmd->vdev_id = __cpu_to_le32(vdev_id); 4514 cmd->trigger_cmd = __cpu_to_le32(trigger); 4515 cmd->enable_cmd = __cpu_to_le32(enable); 4516 4517 return skb; 4518 } 4519 4520 static struct sk_buff * 4521 ath10k_wmi_op_gen_peer_create(struct ath10k *ar, u32 vdev_id, 4522 const u8 peer_addr[ETH_ALEN]) 4523 { 4524 struct wmi_peer_create_cmd *cmd; 4525 struct sk_buff *skb; 4526 4527 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4528 if (!skb) 4529 return ERR_PTR(-ENOMEM); 4530 4531 cmd = (struct wmi_peer_create_cmd *)skb->data; 4532 cmd->vdev_id = __cpu_to_le32(vdev_id); 4533 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 4534 4535 ath10k_dbg(ar, ATH10K_DBG_WMI, 4536 "wmi peer create vdev_id %d peer_addr %pM\n", 4537 vdev_id, peer_addr); 4538 return skb; 4539 } 4540 4541 static struct sk_buff * 4542 ath10k_wmi_op_gen_peer_delete(struct ath10k *ar, u32 vdev_id, 4543 const u8 peer_addr[ETH_ALEN]) 4544 { 4545 struct wmi_peer_delete_cmd *cmd; 4546 struct sk_buff *skb; 4547 4548 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4549 if (!skb) 4550 return ERR_PTR(-ENOMEM); 4551 4552 cmd = (struct wmi_peer_delete_cmd *)skb->data; 4553 cmd->vdev_id = __cpu_to_le32(vdev_id); 4554 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 4555 4556 ath10k_dbg(ar, ATH10K_DBG_WMI, 4557 "wmi peer delete vdev_id %d peer_addr %pM\n", 4558 vdev_id, peer_addr); 4559 return skb; 4560 } 4561 4562 static struct sk_buff * 4563 ath10k_wmi_op_gen_peer_flush(struct ath10k *ar, u32 vdev_id, 4564 const u8 peer_addr[ETH_ALEN], u32 tid_bitmap) 4565 { 4566 struct wmi_peer_flush_tids_cmd *cmd; 4567 struct sk_buff *skb; 4568 4569 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4570 if (!skb) 4571 return ERR_PTR(-ENOMEM); 4572 4573 cmd = (struct wmi_peer_flush_tids_cmd *)skb->data; 4574 cmd->vdev_id = __cpu_to_le32(vdev_id); 4575 cmd->peer_tid_bitmap = __cpu_to_le32(tid_bitmap); 4576 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 4577 4578 ath10k_dbg(ar, ATH10K_DBG_WMI, 4579 "wmi peer flush vdev_id %d peer_addr %pM tids %08x\n", 4580 vdev_id, peer_addr, tid_bitmap); 4581 return skb; 4582 } 4583 4584 static struct sk_buff * 4585 ath10k_wmi_op_gen_peer_set_param(struct ath10k *ar, u32 vdev_id, 4586 const u8 *peer_addr, 4587 enum wmi_peer_param param_id, 4588 u32 param_value) 4589 { 4590 struct wmi_peer_set_param_cmd *cmd; 4591 struct sk_buff *skb; 4592 4593 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4594 if (!skb) 4595 return ERR_PTR(-ENOMEM); 4596 4597 cmd = (struct wmi_peer_set_param_cmd *)skb->data; 4598 cmd->vdev_id = __cpu_to_le32(vdev_id); 4599 cmd->param_id = __cpu_to_le32(param_id); 4600 cmd->param_value = __cpu_to_le32(param_value); 4601 ether_addr_copy(cmd->peer_macaddr.addr, peer_addr); 4602 4603 ath10k_dbg(ar, ATH10K_DBG_WMI, 4604 "wmi vdev %d peer 0x%pM set param %d value %d\n", 4605 vdev_id, peer_addr, param_id, param_value); 4606 return skb; 4607 } 4608 4609 static struct sk_buff * 4610 ath10k_wmi_op_gen_set_psmode(struct ath10k *ar, u32 vdev_id, 4611 enum wmi_sta_ps_mode psmode) 4612 { 4613 struct wmi_sta_powersave_mode_cmd *cmd; 4614 struct sk_buff *skb; 4615 4616 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4617 if (!skb) 4618 return ERR_PTR(-ENOMEM); 4619 4620 cmd = (struct wmi_sta_powersave_mode_cmd *)skb->data; 4621 cmd->vdev_id = __cpu_to_le32(vdev_id); 4622 cmd->sta_ps_mode = __cpu_to_le32(psmode); 4623 4624 ath10k_dbg(ar, ATH10K_DBG_WMI, 4625 "wmi set powersave id 0x%x mode %d\n", 4626 vdev_id, psmode); 4627 return skb; 4628 } 4629 4630 static struct sk_buff * 4631 ath10k_wmi_op_gen_set_sta_ps(struct ath10k *ar, u32 vdev_id, 4632 enum wmi_sta_powersave_param param_id, 4633 u32 value) 4634 { 4635 struct wmi_sta_powersave_param_cmd *cmd; 4636 struct sk_buff *skb; 4637 4638 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4639 if (!skb) 4640 return ERR_PTR(-ENOMEM); 4641 4642 cmd = (struct wmi_sta_powersave_param_cmd *)skb->data; 4643 cmd->vdev_id = __cpu_to_le32(vdev_id); 4644 cmd->param_id = __cpu_to_le32(param_id); 4645 cmd->param_value = __cpu_to_le32(value); 4646 4647 ath10k_dbg(ar, ATH10K_DBG_WMI, 4648 "wmi sta ps param vdev_id 0x%x param %d value %d\n", 4649 vdev_id, param_id, value); 4650 return skb; 4651 } 4652 4653 static struct sk_buff * 4654 ath10k_wmi_op_gen_set_ap_ps(struct ath10k *ar, u32 vdev_id, const u8 *mac, 4655 enum wmi_ap_ps_peer_param param_id, u32 value) 4656 { 4657 struct wmi_ap_ps_peer_cmd *cmd; 4658 struct sk_buff *skb; 4659 4660 if (!mac) 4661 return ERR_PTR(-EINVAL); 4662 4663 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4664 if (!skb) 4665 return ERR_PTR(-ENOMEM); 4666 4667 cmd = (struct wmi_ap_ps_peer_cmd *)skb->data; 4668 cmd->vdev_id = __cpu_to_le32(vdev_id); 4669 cmd->param_id = __cpu_to_le32(param_id); 4670 cmd->param_value = __cpu_to_le32(value); 4671 ether_addr_copy(cmd->peer_macaddr.addr, mac); 4672 4673 ath10k_dbg(ar, ATH10K_DBG_WMI, 4674 "wmi ap ps param vdev_id 0x%X param %d value %d mac_addr %pM\n", 4675 vdev_id, param_id, value, mac); 4676 return skb; 4677 } 4678 4679 static struct sk_buff * 4680 ath10k_wmi_op_gen_scan_chan_list(struct ath10k *ar, 4681 const struct wmi_scan_chan_list_arg *arg) 4682 { 4683 struct wmi_scan_chan_list_cmd *cmd; 4684 struct sk_buff *skb; 4685 struct wmi_channel_arg *ch; 4686 struct wmi_channel *ci; 4687 int len; 4688 int i; 4689 4690 len = sizeof(*cmd) + arg->n_channels * sizeof(struct wmi_channel); 4691 4692 skb = ath10k_wmi_alloc_skb(ar, len); 4693 if (!skb) 4694 return ERR_PTR(-EINVAL); 4695 4696 cmd = (struct wmi_scan_chan_list_cmd *)skb->data; 4697 cmd->num_scan_chans = __cpu_to_le32(arg->n_channels); 4698 4699 for (i = 0; i < arg->n_channels; i++) { 4700 ch = &arg->channels[i]; 4701 ci = &cmd->chan_info[i]; 4702 4703 ath10k_wmi_put_wmi_channel(ci, ch); 4704 } 4705 4706 return skb; 4707 } 4708 4709 static void 4710 ath10k_wmi_peer_assoc_fill(struct ath10k *ar, void *buf, 4711 const struct wmi_peer_assoc_complete_arg *arg) 4712 { 4713 struct wmi_common_peer_assoc_complete_cmd *cmd = buf; 4714 4715 cmd->vdev_id = __cpu_to_le32(arg->vdev_id); 4716 cmd->peer_new_assoc = __cpu_to_le32(arg->peer_reassoc ? 0 : 1); 4717 cmd->peer_associd = __cpu_to_le32(arg->peer_aid); 4718 cmd->peer_flags = __cpu_to_le32(arg->peer_flags); 4719 cmd->peer_caps = __cpu_to_le32(arg->peer_caps); 4720 cmd->peer_listen_intval = __cpu_to_le32(arg->peer_listen_intval); 4721 cmd->peer_ht_caps = __cpu_to_le32(arg->peer_ht_caps); 4722 cmd->peer_max_mpdu = __cpu_to_le32(arg->peer_max_mpdu); 4723 cmd->peer_mpdu_density = __cpu_to_le32(arg->peer_mpdu_density); 4724 cmd->peer_rate_caps = __cpu_to_le32(arg->peer_rate_caps); 4725 cmd->peer_nss = __cpu_to_le32(arg->peer_num_spatial_streams); 4726 cmd->peer_vht_caps = __cpu_to_le32(arg->peer_vht_caps); 4727 cmd->peer_phymode = __cpu_to_le32(arg->peer_phymode); 4728 4729 ether_addr_copy(cmd->peer_macaddr.addr, arg->addr); 4730 4731 cmd->peer_legacy_rates.num_rates = 4732 __cpu_to_le32(arg->peer_legacy_rates.num_rates); 4733 memcpy(cmd->peer_legacy_rates.rates, arg->peer_legacy_rates.rates, 4734 arg->peer_legacy_rates.num_rates); 4735 4736 cmd->peer_ht_rates.num_rates = 4737 __cpu_to_le32(arg->peer_ht_rates.num_rates); 4738 memcpy(cmd->peer_ht_rates.rates, arg->peer_ht_rates.rates, 4739 arg->peer_ht_rates.num_rates); 4740 4741 cmd->peer_vht_rates.rx_max_rate = 4742 __cpu_to_le32(arg->peer_vht_rates.rx_max_rate); 4743 cmd->peer_vht_rates.rx_mcs_set = 4744 __cpu_to_le32(arg->peer_vht_rates.rx_mcs_set); 4745 cmd->peer_vht_rates.tx_max_rate = 4746 __cpu_to_le32(arg->peer_vht_rates.tx_max_rate); 4747 cmd->peer_vht_rates.tx_mcs_set = 4748 __cpu_to_le32(arg->peer_vht_rates.tx_mcs_set); 4749 } 4750 4751 static void 4752 ath10k_wmi_peer_assoc_fill_main(struct ath10k *ar, void *buf, 4753 const struct wmi_peer_assoc_complete_arg *arg) 4754 { 4755 struct wmi_main_peer_assoc_complete_cmd *cmd = buf; 4756 4757 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4758 memset(cmd->peer_ht_info, 0, sizeof(cmd->peer_ht_info)); 4759 } 4760 4761 static void 4762 ath10k_wmi_peer_assoc_fill_10_1(struct ath10k *ar, void *buf, 4763 const struct wmi_peer_assoc_complete_arg *arg) 4764 { 4765 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4766 } 4767 4768 static void 4769 ath10k_wmi_peer_assoc_fill_10_2(struct ath10k *ar, void *buf, 4770 const struct wmi_peer_assoc_complete_arg *arg) 4771 { 4772 struct wmi_10_2_peer_assoc_complete_cmd *cmd = buf; 4773 int max_mcs, max_nss; 4774 u32 info0; 4775 4776 /* TODO: Is using max values okay with firmware? */ 4777 max_mcs = 0xf; 4778 max_nss = 0xf; 4779 4780 info0 = SM(max_mcs, WMI_PEER_ASSOC_INFO0_MAX_MCS_IDX) | 4781 SM(max_nss, WMI_PEER_ASSOC_INFO0_MAX_NSS); 4782 4783 ath10k_wmi_peer_assoc_fill(ar, buf, arg); 4784 cmd->info0 = __cpu_to_le32(info0); 4785 } 4786 4787 static int 4788 ath10k_wmi_peer_assoc_check_arg(const struct wmi_peer_assoc_complete_arg *arg) 4789 { 4790 if (arg->peer_mpdu_density > 16) 4791 return -EINVAL; 4792 if (arg->peer_legacy_rates.num_rates > MAX_SUPPORTED_RATES) 4793 return -EINVAL; 4794 if (arg->peer_ht_rates.num_rates > MAX_SUPPORTED_RATES) 4795 return -EINVAL; 4796 4797 return 0; 4798 } 4799 4800 static struct sk_buff * 4801 ath10k_wmi_op_gen_peer_assoc(struct ath10k *ar, 4802 const struct wmi_peer_assoc_complete_arg *arg) 4803 { 4804 size_t len = sizeof(struct wmi_main_peer_assoc_complete_cmd); 4805 struct sk_buff *skb; 4806 int ret; 4807 4808 ret = ath10k_wmi_peer_assoc_check_arg(arg); 4809 if (ret) 4810 return ERR_PTR(ret); 4811 4812 skb = ath10k_wmi_alloc_skb(ar, len); 4813 if (!skb) 4814 return ERR_PTR(-ENOMEM); 4815 4816 ath10k_wmi_peer_assoc_fill_main(ar, skb->data, arg); 4817 4818 ath10k_dbg(ar, ATH10K_DBG_WMI, 4819 "wmi peer assoc vdev %d addr %pM (%s)\n", 4820 arg->vdev_id, arg->addr, 4821 arg->peer_reassoc ? "reassociate" : "new"); 4822 return skb; 4823 } 4824 4825 static struct sk_buff * 4826 ath10k_wmi_10_1_op_gen_peer_assoc(struct ath10k *ar, 4827 const struct wmi_peer_assoc_complete_arg *arg) 4828 { 4829 size_t len = sizeof(struct wmi_10_1_peer_assoc_complete_cmd); 4830 struct sk_buff *skb; 4831 int ret; 4832 4833 ret = ath10k_wmi_peer_assoc_check_arg(arg); 4834 if (ret) 4835 return ERR_PTR(ret); 4836 4837 skb = ath10k_wmi_alloc_skb(ar, len); 4838 if (!skb) 4839 return ERR_PTR(-ENOMEM); 4840 4841 ath10k_wmi_peer_assoc_fill_10_1(ar, skb->data, arg); 4842 4843 ath10k_dbg(ar, ATH10K_DBG_WMI, 4844 "wmi peer assoc vdev %d addr %pM (%s)\n", 4845 arg->vdev_id, arg->addr, 4846 arg->peer_reassoc ? "reassociate" : "new"); 4847 return skb; 4848 } 4849 4850 static struct sk_buff * 4851 ath10k_wmi_10_2_op_gen_peer_assoc(struct ath10k *ar, 4852 const struct wmi_peer_assoc_complete_arg *arg) 4853 { 4854 size_t len = sizeof(struct wmi_10_2_peer_assoc_complete_cmd); 4855 struct sk_buff *skb; 4856 int ret; 4857 4858 ret = ath10k_wmi_peer_assoc_check_arg(arg); 4859 if (ret) 4860 return ERR_PTR(ret); 4861 4862 skb = ath10k_wmi_alloc_skb(ar, len); 4863 if (!skb) 4864 return ERR_PTR(-ENOMEM); 4865 4866 ath10k_wmi_peer_assoc_fill_10_2(ar, skb->data, arg); 4867 4868 ath10k_dbg(ar, ATH10K_DBG_WMI, 4869 "wmi peer assoc vdev %d addr %pM (%s)\n", 4870 arg->vdev_id, arg->addr, 4871 arg->peer_reassoc ? "reassociate" : "new"); 4872 return skb; 4873 } 4874 4875 static struct sk_buff * 4876 ath10k_wmi_10_2_op_gen_pdev_get_temperature(struct ath10k *ar) 4877 { 4878 struct sk_buff *skb; 4879 4880 skb = ath10k_wmi_alloc_skb(ar, 0); 4881 if (!skb) 4882 return ERR_PTR(-ENOMEM); 4883 4884 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev get temperature\n"); 4885 return skb; 4886 } 4887 4888 /* This function assumes the beacon is already DMA mapped */ 4889 static struct sk_buff * 4890 ath10k_wmi_op_gen_beacon_dma(struct ath10k *ar, u32 vdev_id, const void *bcn, 4891 size_t bcn_len, u32 bcn_paddr, bool dtim_zero, 4892 bool deliver_cab) 4893 { 4894 struct wmi_bcn_tx_ref_cmd *cmd; 4895 struct sk_buff *skb; 4896 struct ieee80211_hdr *hdr; 4897 u16 fc; 4898 4899 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4900 if (!skb) 4901 return ERR_PTR(-ENOMEM); 4902 4903 hdr = (struct ieee80211_hdr *)bcn; 4904 fc = le16_to_cpu(hdr->frame_control); 4905 4906 cmd = (struct wmi_bcn_tx_ref_cmd *)skb->data; 4907 cmd->vdev_id = __cpu_to_le32(vdev_id); 4908 cmd->data_len = __cpu_to_le32(bcn_len); 4909 cmd->data_ptr = __cpu_to_le32(bcn_paddr); 4910 cmd->msdu_id = 0; 4911 cmd->frame_control = __cpu_to_le32(fc); 4912 cmd->flags = 0; 4913 cmd->antenna_mask = __cpu_to_le32(WMI_BCN_TX_REF_DEF_ANTENNA); 4914 4915 if (dtim_zero) 4916 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DTIM_ZERO); 4917 4918 if (deliver_cab) 4919 cmd->flags |= __cpu_to_le32(WMI_BCN_TX_REF_FLAG_DELIVER_CAB); 4920 4921 return skb; 4922 } 4923 4924 void ath10k_wmi_set_wmm_param(struct wmi_wmm_params *params, 4925 const struct wmi_wmm_params_arg *arg) 4926 { 4927 params->cwmin = __cpu_to_le32(arg->cwmin); 4928 params->cwmax = __cpu_to_le32(arg->cwmax); 4929 params->aifs = __cpu_to_le32(arg->aifs); 4930 params->txop = __cpu_to_le32(arg->txop); 4931 params->acm = __cpu_to_le32(arg->acm); 4932 params->no_ack = __cpu_to_le32(arg->no_ack); 4933 } 4934 4935 static struct sk_buff * 4936 ath10k_wmi_op_gen_pdev_set_wmm(struct ath10k *ar, 4937 const struct wmi_wmm_params_all_arg *arg) 4938 { 4939 struct wmi_pdev_set_wmm_params *cmd; 4940 struct sk_buff *skb; 4941 4942 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4943 if (!skb) 4944 return ERR_PTR(-ENOMEM); 4945 4946 cmd = (struct wmi_pdev_set_wmm_params *)skb->data; 4947 ath10k_wmi_set_wmm_param(&cmd->ac_be, &arg->ac_be); 4948 ath10k_wmi_set_wmm_param(&cmd->ac_bk, &arg->ac_bk); 4949 ath10k_wmi_set_wmm_param(&cmd->ac_vi, &arg->ac_vi); 4950 ath10k_wmi_set_wmm_param(&cmd->ac_vo, &arg->ac_vo); 4951 4952 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi pdev set wmm params\n"); 4953 return skb; 4954 } 4955 4956 static struct sk_buff * 4957 ath10k_wmi_op_gen_request_stats(struct ath10k *ar, enum wmi_stats_id stats_id) 4958 { 4959 struct wmi_request_stats_cmd *cmd; 4960 struct sk_buff *skb; 4961 4962 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4963 if (!skb) 4964 return ERR_PTR(-ENOMEM); 4965 4966 cmd = (struct wmi_request_stats_cmd *)skb->data; 4967 cmd->stats_id = __cpu_to_le32(stats_id); 4968 4969 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi request stats %d\n", (int)stats_id); 4970 return skb; 4971 } 4972 4973 static struct sk_buff * 4974 ath10k_wmi_op_gen_force_fw_hang(struct ath10k *ar, 4975 enum wmi_force_fw_hang_type type, u32 delay_ms) 4976 { 4977 struct wmi_force_fw_hang_cmd *cmd; 4978 struct sk_buff *skb; 4979 4980 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 4981 if (!skb) 4982 return ERR_PTR(-ENOMEM); 4983 4984 cmd = (struct wmi_force_fw_hang_cmd *)skb->data; 4985 cmd->type = __cpu_to_le32(type); 4986 cmd->delay_ms = __cpu_to_le32(delay_ms); 4987 4988 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi force fw hang %d delay %d\n", 4989 type, delay_ms); 4990 return skb; 4991 } 4992 4993 static struct sk_buff * 4994 ath10k_wmi_op_gen_dbglog_cfg(struct ath10k *ar, u32 module_enable, 4995 u32 log_level) 4996 { 4997 struct wmi_dbglog_cfg_cmd *cmd; 4998 struct sk_buff *skb; 4999 u32 cfg; 5000 5001 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5002 if (!skb) 5003 return ERR_PTR(-ENOMEM); 5004 5005 cmd = (struct wmi_dbglog_cfg_cmd *)skb->data; 5006 5007 if (module_enable) { 5008 cfg = SM(log_level, 5009 ATH10K_DBGLOG_CFG_LOG_LVL); 5010 } else { 5011 /* set back defaults, all modules with WARN level */ 5012 cfg = SM(ATH10K_DBGLOG_LEVEL_WARN, 5013 ATH10K_DBGLOG_CFG_LOG_LVL); 5014 module_enable = ~0; 5015 } 5016 5017 cmd->module_enable = __cpu_to_le32(module_enable); 5018 cmd->module_valid = __cpu_to_le32(~0); 5019 cmd->config_enable = __cpu_to_le32(cfg); 5020 cmd->config_valid = __cpu_to_le32(ATH10K_DBGLOG_CFG_LOG_LVL_MASK); 5021 5022 ath10k_dbg(ar, ATH10K_DBG_WMI, 5023 "wmi dbglog cfg modules %08x %08x config %08x %08x\n", 5024 __le32_to_cpu(cmd->module_enable), 5025 __le32_to_cpu(cmd->module_valid), 5026 __le32_to_cpu(cmd->config_enable), 5027 __le32_to_cpu(cmd->config_valid)); 5028 return skb; 5029 } 5030 5031 static struct sk_buff * 5032 ath10k_wmi_op_gen_pktlog_enable(struct ath10k *ar, u32 ev_bitmap) 5033 { 5034 struct wmi_pdev_pktlog_enable_cmd *cmd; 5035 struct sk_buff *skb; 5036 5037 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5038 if (!skb) 5039 return ERR_PTR(-ENOMEM); 5040 5041 ev_bitmap &= ATH10K_PKTLOG_ANY; 5042 5043 cmd = (struct wmi_pdev_pktlog_enable_cmd *)skb->data; 5044 cmd->ev_bitmap = __cpu_to_le32(ev_bitmap); 5045 5046 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi enable pktlog filter 0x%08x\n", 5047 ev_bitmap); 5048 return skb; 5049 } 5050 5051 static struct sk_buff * 5052 ath10k_wmi_op_gen_pktlog_disable(struct ath10k *ar) 5053 { 5054 struct sk_buff *skb; 5055 5056 skb = ath10k_wmi_alloc_skb(ar, 0); 5057 if (!skb) 5058 return ERR_PTR(-ENOMEM); 5059 5060 ath10k_dbg(ar, ATH10K_DBG_WMI, "wmi disable pktlog\n"); 5061 return skb; 5062 } 5063 5064 static struct sk_buff * 5065 ath10k_wmi_op_gen_pdev_set_quiet_mode(struct ath10k *ar, u32 period, 5066 u32 duration, u32 next_offset, 5067 u32 enabled) 5068 { 5069 struct wmi_pdev_set_quiet_cmd *cmd; 5070 struct sk_buff *skb; 5071 5072 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5073 if (!skb) 5074 return ERR_PTR(-ENOMEM); 5075 5076 cmd = (struct wmi_pdev_set_quiet_cmd *)skb->data; 5077 cmd->period = __cpu_to_le32(period); 5078 cmd->duration = __cpu_to_le32(duration); 5079 cmd->next_start = __cpu_to_le32(next_offset); 5080 cmd->enabled = __cpu_to_le32(enabled); 5081 5082 ath10k_dbg(ar, ATH10K_DBG_WMI, 5083 "wmi quiet param: period %u duration %u enabled %d\n", 5084 period, duration, enabled); 5085 return skb; 5086 } 5087 5088 static struct sk_buff * 5089 ath10k_wmi_op_gen_addba_clear_resp(struct ath10k *ar, u32 vdev_id, 5090 const u8 *mac) 5091 { 5092 struct wmi_addba_clear_resp_cmd *cmd; 5093 struct sk_buff *skb; 5094 5095 if (!mac) 5096 return ERR_PTR(-EINVAL); 5097 5098 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5099 if (!skb) 5100 return ERR_PTR(-ENOMEM); 5101 5102 cmd = (struct wmi_addba_clear_resp_cmd *)skb->data; 5103 cmd->vdev_id = __cpu_to_le32(vdev_id); 5104 ether_addr_copy(cmd->peer_macaddr.addr, mac); 5105 5106 ath10k_dbg(ar, ATH10K_DBG_WMI, 5107 "wmi addba clear resp vdev_id 0x%X mac_addr %pM\n", 5108 vdev_id, mac); 5109 return skb; 5110 } 5111 5112 static struct sk_buff * 5113 ath10k_wmi_op_gen_addba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, 5114 u32 tid, u32 buf_size) 5115 { 5116 struct wmi_addba_send_cmd *cmd; 5117 struct sk_buff *skb; 5118 5119 if (!mac) 5120 return ERR_PTR(-EINVAL); 5121 5122 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5123 if (!skb) 5124 return ERR_PTR(-ENOMEM); 5125 5126 cmd = (struct wmi_addba_send_cmd *)skb->data; 5127 cmd->vdev_id = __cpu_to_le32(vdev_id); 5128 ether_addr_copy(cmd->peer_macaddr.addr, mac); 5129 cmd->tid = __cpu_to_le32(tid); 5130 cmd->buffersize = __cpu_to_le32(buf_size); 5131 5132 ath10k_dbg(ar, ATH10K_DBG_WMI, 5133 "wmi addba send vdev_id 0x%X mac_addr %pM tid %u bufsize %u\n", 5134 vdev_id, mac, tid, buf_size); 5135 return skb; 5136 } 5137 5138 static struct sk_buff * 5139 ath10k_wmi_op_gen_addba_set_resp(struct ath10k *ar, u32 vdev_id, const u8 *mac, 5140 u32 tid, u32 status) 5141 { 5142 struct wmi_addba_setresponse_cmd *cmd; 5143 struct sk_buff *skb; 5144 5145 if (!mac) 5146 return ERR_PTR(-EINVAL); 5147 5148 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5149 if (!skb) 5150 return ERR_PTR(-ENOMEM); 5151 5152 cmd = (struct wmi_addba_setresponse_cmd *)skb->data; 5153 cmd->vdev_id = __cpu_to_le32(vdev_id); 5154 ether_addr_copy(cmd->peer_macaddr.addr, mac); 5155 cmd->tid = __cpu_to_le32(tid); 5156 cmd->statuscode = __cpu_to_le32(status); 5157 5158 ath10k_dbg(ar, ATH10K_DBG_WMI, 5159 "wmi addba set resp vdev_id 0x%X mac_addr %pM tid %u status %u\n", 5160 vdev_id, mac, tid, status); 5161 return skb; 5162 } 5163 5164 static struct sk_buff * 5165 ath10k_wmi_op_gen_delba_send(struct ath10k *ar, u32 vdev_id, const u8 *mac, 5166 u32 tid, u32 initiator, u32 reason) 5167 { 5168 struct wmi_delba_send_cmd *cmd; 5169 struct sk_buff *skb; 5170 5171 if (!mac) 5172 return ERR_PTR(-EINVAL); 5173 5174 skb = ath10k_wmi_alloc_skb(ar, sizeof(*cmd)); 5175 if (!skb) 5176 return ERR_PTR(-ENOMEM); 5177 5178 cmd = (struct wmi_delba_send_cmd *)skb->data; 5179 cmd->vdev_id = __cpu_to_le32(vdev_id); 5180 ether_addr_copy(cmd->peer_macaddr.addr, mac); 5181 cmd->tid = __cpu_to_le32(tid); 5182 cmd->initiator = __cpu_to_le32(initiator); 5183 cmd->reasoncode = __cpu_to_le32(reason); 5184 5185 ath10k_dbg(ar, ATH10K_DBG_WMI, 5186 "wmi delba send vdev_id 0x%X mac_addr %pM tid %u initiator %u reason %u\n", 5187 vdev_id, mac, tid, initiator, reason); 5188 return skb; 5189 } 5190 5191 static const struct wmi_ops wmi_ops = { 5192 .rx = ath10k_wmi_op_rx, 5193 .map_svc = wmi_main_svc_map, 5194 5195 .pull_scan = ath10k_wmi_op_pull_scan_ev, 5196 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 5197 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 5198 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 5199 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 5200 .pull_swba = ath10k_wmi_op_pull_swba_ev, 5201 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 5202 .pull_svc_rdy = ath10k_wmi_main_op_pull_svc_rdy_ev, 5203 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 5204 .pull_fw_stats = ath10k_wmi_main_op_pull_fw_stats, 5205 5206 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 5207 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 5208 .gen_pdev_set_rd = ath10k_wmi_op_gen_pdev_set_rd, 5209 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 5210 .gen_init = ath10k_wmi_op_gen_init, 5211 .gen_start_scan = ath10k_wmi_op_gen_start_scan, 5212 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 5213 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 5214 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 5215 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 5216 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 5217 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 5218 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 5219 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 5220 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 5221 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 5222 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 5223 /* .gen_vdev_wmm_conf not implemented */ 5224 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 5225 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 5226 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 5227 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 5228 .gen_peer_assoc = ath10k_wmi_op_gen_peer_assoc, 5229 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 5230 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 5231 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 5232 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 5233 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 5234 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 5235 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 5236 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 5237 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 5238 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 5239 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 5240 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 5241 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 5242 /* .gen_pdev_get_temperature not implemented */ 5243 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 5244 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 5245 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 5246 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 5247 /* .gen_bcn_tmpl not implemented */ 5248 /* .gen_prb_tmpl not implemented */ 5249 /* .gen_p2p_go_bcn_ie not implemented */ 5250 }; 5251 5252 static const struct wmi_ops wmi_10_1_ops = { 5253 .rx = ath10k_wmi_10_1_op_rx, 5254 .map_svc = wmi_10x_svc_map, 5255 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 5256 .pull_fw_stats = ath10k_wmi_10x_op_pull_fw_stats, 5257 .gen_init = ath10k_wmi_10_1_op_gen_init, 5258 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 5259 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 5260 .gen_peer_assoc = ath10k_wmi_10_1_op_gen_peer_assoc, 5261 /* .gen_pdev_get_temperature not implemented */ 5262 5263 /* shared with main branch */ 5264 .pull_scan = ath10k_wmi_op_pull_scan_ev, 5265 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 5266 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 5267 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 5268 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 5269 .pull_swba = ath10k_wmi_op_pull_swba_ev, 5270 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 5271 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 5272 5273 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 5274 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 5275 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 5276 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 5277 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 5278 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 5279 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 5280 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 5281 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 5282 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 5283 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 5284 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 5285 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 5286 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 5287 /* .gen_vdev_wmm_conf not implemented */ 5288 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 5289 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 5290 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 5291 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 5292 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 5293 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 5294 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 5295 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 5296 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 5297 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 5298 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 5299 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 5300 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 5301 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 5302 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 5303 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 5304 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 5305 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 5306 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 5307 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 5308 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 5309 /* .gen_bcn_tmpl not implemented */ 5310 /* .gen_prb_tmpl not implemented */ 5311 /* .gen_p2p_go_bcn_ie not implemented */ 5312 }; 5313 5314 static const struct wmi_ops wmi_10_2_ops = { 5315 .rx = ath10k_wmi_10_2_op_rx, 5316 .pull_fw_stats = ath10k_wmi_10_2_op_pull_fw_stats, 5317 .gen_init = ath10k_wmi_10_2_op_gen_init, 5318 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, 5319 /* .gen_pdev_get_temperature not implemented */ 5320 5321 /* shared with 10.1 */ 5322 .map_svc = wmi_10x_svc_map, 5323 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 5324 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 5325 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 5326 5327 .pull_scan = ath10k_wmi_op_pull_scan_ev, 5328 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 5329 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 5330 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 5331 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 5332 .pull_swba = ath10k_wmi_op_pull_swba_ev, 5333 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 5334 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 5335 5336 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 5337 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 5338 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 5339 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 5340 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 5341 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 5342 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 5343 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 5344 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 5345 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 5346 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 5347 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 5348 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 5349 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 5350 /* .gen_vdev_wmm_conf not implemented */ 5351 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 5352 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 5353 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 5354 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 5355 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 5356 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 5357 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 5358 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 5359 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 5360 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 5361 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 5362 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 5363 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 5364 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 5365 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 5366 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 5367 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 5368 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 5369 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 5370 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 5371 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 5372 }; 5373 5374 static const struct wmi_ops wmi_10_2_4_ops = { 5375 .rx = ath10k_wmi_10_2_op_rx, 5376 .pull_fw_stats = ath10k_wmi_10_2_4_op_pull_fw_stats, 5377 .gen_init = ath10k_wmi_10_2_op_gen_init, 5378 .gen_peer_assoc = ath10k_wmi_10_2_op_gen_peer_assoc, 5379 .gen_pdev_get_temperature = ath10k_wmi_10_2_op_gen_pdev_get_temperature, 5380 5381 /* shared with 10.1 */ 5382 .map_svc = wmi_10x_svc_map, 5383 .pull_svc_rdy = ath10k_wmi_10x_op_pull_svc_rdy_ev, 5384 .gen_pdev_set_rd = ath10k_wmi_10x_op_gen_pdev_set_rd, 5385 .gen_start_scan = ath10k_wmi_10x_op_gen_start_scan, 5386 5387 .pull_scan = ath10k_wmi_op_pull_scan_ev, 5388 .pull_mgmt_rx = ath10k_wmi_op_pull_mgmt_rx_ev, 5389 .pull_ch_info = ath10k_wmi_op_pull_ch_info_ev, 5390 .pull_vdev_start = ath10k_wmi_op_pull_vdev_start_ev, 5391 .pull_peer_kick = ath10k_wmi_op_pull_peer_kick_ev, 5392 .pull_swba = ath10k_wmi_op_pull_swba_ev, 5393 .pull_phyerr = ath10k_wmi_op_pull_phyerr_ev, 5394 .pull_rdy = ath10k_wmi_op_pull_rdy_ev, 5395 5396 .gen_pdev_suspend = ath10k_wmi_op_gen_pdev_suspend, 5397 .gen_pdev_resume = ath10k_wmi_op_gen_pdev_resume, 5398 .gen_pdev_set_param = ath10k_wmi_op_gen_pdev_set_param, 5399 .gen_stop_scan = ath10k_wmi_op_gen_stop_scan, 5400 .gen_vdev_create = ath10k_wmi_op_gen_vdev_create, 5401 .gen_vdev_delete = ath10k_wmi_op_gen_vdev_delete, 5402 .gen_vdev_start = ath10k_wmi_op_gen_vdev_start, 5403 .gen_vdev_stop = ath10k_wmi_op_gen_vdev_stop, 5404 .gen_vdev_up = ath10k_wmi_op_gen_vdev_up, 5405 .gen_vdev_down = ath10k_wmi_op_gen_vdev_down, 5406 .gen_vdev_set_param = ath10k_wmi_op_gen_vdev_set_param, 5407 .gen_vdev_install_key = ath10k_wmi_op_gen_vdev_install_key, 5408 .gen_vdev_spectral_conf = ath10k_wmi_op_gen_vdev_spectral_conf, 5409 .gen_vdev_spectral_enable = ath10k_wmi_op_gen_vdev_spectral_enable, 5410 .gen_peer_create = ath10k_wmi_op_gen_peer_create, 5411 .gen_peer_delete = ath10k_wmi_op_gen_peer_delete, 5412 .gen_peer_flush = ath10k_wmi_op_gen_peer_flush, 5413 .gen_peer_set_param = ath10k_wmi_op_gen_peer_set_param, 5414 .gen_set_psmode = ath10k_wmi_op_gen_set_psmode, 5415 .gen_set_sta_ps = ath10k_wmi_op_gen_set_sta_ps, 5416 .gen_set_ap_ps = ath10k_wmi_op_gen_set_ap_ps, 5417 .gen_scan_chan_list = ath10k_wmi_op_gen_scan_chan_list, 5418 .gen_beacon_dma = ath10k_wmi_op_gen_beacon_dma, 5419 .gen_pdev_set_wmm = ath10k_wmi_op_gen_pdev_set_wmm, 5420 .gen_request_stats = ath10k_wmi_op_gen_request_stats, 5421 .gen_force_fw_hang = ath10k_wmi_op_gen_force_fw_hang, 5422 .gen_mgmt_tx = ath10k_wmi_op_gen_mgmt_tx, 5423 .gen_dbglog_cfg = ath10k_wmi_op_gen_dbglog_cfg, 5424 .gen_pktlog_enable = ath10k_wmi_op_gen_pktlog_enable, 5425 .gen_pktlog_disable = ath10k_wmi_op_gen_pktlog_disable, 5426 .gen_pdev_set_quiet_mode = ath10k_wmi_op_gen_pdev_set_quiet_mode, 5427 .gen_addba_clear_resp = ath10k_wmi_op_gen_addba_clear_resp, 5428 .gen_addba_send = ath10k_wmi_op_gen_addba_send, 5429 .gen_addba_set_resp = ath10k_wmi_op_gen_addba_set_resp, 5430 .gen_delba_send = ath10k_wmi_op_gen_delba_send, 5431 /* .gen_bcn_tmpl not implemented */ 5432 /* .gen_prb_tmpl not implemented */ 5433 /* .gen_p2p_go_bcn_ie not implemented */ 5434 }; 5435 5436 int ath10k_wmi_attach(struct ath10k *ar) 5437 { 5438 switch (ar->wmi.op_version) { 5439 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 5440 ar->wmi.cmd = &wmi_10_2_4_cmd_map; 5441 ar->wmi.ops = &wmi_10_2_4_ops; 5442 ar->wmi.vdev_param = &wmi_10_2_4_vdev_param_map; 5443 ar->wmi.pdev_param = &wmi_10_2_4_pdev_param_map; 5444 break; 5445 case ATH10K_FW_WMI_OP_VERSION_10_2: 5446 ar->wmi.cmd = &wmi_10_2_cmd_map; 5447 ar->wmi.ops = &wmi_10_2_ops; 5448 ar->wmi.vdev_param = &wmi_10x_vdev_param_map; 5449 ar->wmi.pdev_param = &wmi_10x_pdev_param_map; 5450 break; 5451 case ATH10K_FW_WMI_OP_VERSION_10_1: 5452 ar->wmi.cmd = &wmi_10x_cmd_map; 5453 ar->wmi.ops = &wmi_10_1_ops; 5454 ar->wmi.vdev_param = &wmi_10x_vdev_param_map; 5455 ar->wmi.pdev_param = &wmi_10x_pdev_param_map; 5456 break; 5457 case ATH10K_FW_WMI_OP_VERSION_MAIN: 5458 ar->wmi.cmd = &wmi_cmd_map; 5459 ar->wmi.ops = &wmi_ops; 5460 ar->wmi.vdev_param = &wmi_vdev_param_map; 5461 ar->wmi.pdev_param = &wmi_pdev_param_map; 5462 break; 5463 case ATH10K_FW_WMI_OP_VERSION_TLV: 5464 ath10k_wmi_tlv_attach(ar); 5465 break; 5466 case ATH10K_FW_WMI_OP_VERSION_UNSET: 5467 case ATH10K_FW_WMI_OP_VERSION_MAX: 5468 ath10k_err(ar, "unsupported WMI op version: %d\n", 5469 ar->wmi.op_version); 5470 return -EINVAL; 5471 } 5472 5473 init_completion(&ar->wmi.service_ready); 5474 init_completion(&ar->wmi.unified_ready); 5475 5476 return 0; 5477 } 5478 5479 void ath10k_wmi_detach(struct ath10k *ar) 5480 { 5481 int i; 5482 5483 /* free the host memory chunks requested by firmware */ 5484 for (i = 0; i < ar->wmi.num_mem_chunks; i++) { 5485 dma_free_coherent(ar->dev, 5486 ar->wmi.mem_chunks[i].len, 5487 ar->wmi.mem_chunks[i].vaddr, 5488 ar->wmi.mem_chunks[i].paddr); 5489 } 5490 5491 ar->wmi.num_mem_chunks = 0; 5492 } 5493