1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 5 */ 6 7 #ifndef _COREDUMP_H_ 8 #define _COREDUMP_H_ 9 10 #include "core.h" 11 12 #define ATH10K_FW_CRASH_DUMP_VERSION 1 13 14 /** 15 * enum ath10k_fw_crash_dump_type - types of data in the dump file 16 * @ATH10K_FW_CRASH_DUMP_REGDUMP: Register crash dump in binary format 17 */ 18 enum ath10k_fw_crash_dump_type { 19 ATH10K_FW_CRASH_DUMP_REGISTERS = 0, 20 ATH10K_FW_CRASH_DUMP_CE_DATA = 1, 21 22 /* contains multiple struct ath10k_dump_ram_data_hdr */ 23 ATH10K_FW_CRASH_DUMP_RAM_DATA = 2, 24 25 ATH10K_FW_CRASH_DUMP_MAX, 26 }; 27 28 struct ath10k_tlv_dump_data { 29 /* see ath10k_fw_crash_dump_type above */ 30 __le32 type; 31 32 /* in bytes */ 33 __le32 tlv_len; 34 35 /* pad to 32-bit boundaries as needed */ 36 u8 tlv_data[]; 37 } __packed; 38 39 struct ath10k_dump_file_data { 40 /* dump file information */ 41 42 /* "ATH10K-FW-DUMP" */ 43 char df_magic[16]; 44 45 __le32 len; 46 47 /* file dump version */ 48 __le32 version; 49 50 /* some info we can get from ath10k struct that might help */ 51 52 guid_t guid; 53 54 __le32 chip_id; 55 56 /* 0 for now, in place for later hardware */ 57 __le32 bus_type; 58 59 __le32 target_version; 60 __le32 fw_version_major; 61 __le32 fw_version_minor; 62 __le32 fw_version_release; 63 __le32 fw_version_build; 64 __le32 phy_capability; 65 __le32 hw_min_tx_power; 66 __le32 hw_max_tx_power; 67 __le32 ht_cap_info; 68 __le32 vht_cap_info; 69 __le32 num_rf_chains; 70 71 /* firmware version string */ 72 char fw_ver[ETHTOOL_FWVERS_LEN]; 73 74 /* Kernel related information */ 75 76 /* time-of-day stamp */ 77 __le64 tv_sec; 78 79 /* time-of-day stamp, nano-seconds */ 80 __le64 tv_nsec; 81 82 /* LINUX_VERSION_CODE */ 83 __le32 kernel_ver_code; 84 85 /* VERMAGIC_STRING */ 86 char kernel_ver[64]; 87 88 /* room for growth w/out changing binary format */ 89 u8 unused[128]; 90 91 /* struct ath10k_tlv_dump_data + more */ 92 u8 data[]; 93 } __packed; 94 95 struct ath10k_dump_ram_data_hdr { 96 /* enum ath10k_mem_region_type */ 97 __le32 region_type; 98 99 __le32 start; 100 101 /* length of payload data, not including this header */ 102 __le32 length; 103 104 u8 data[]; 105 }; 106 107 /* magic number to fill the holes not copied due to sections in regions */ 108 #define ATH10K_MAGIC_NOT_COPIED 0xAA 109 110 /* part of user space ABI */ 111 enum ath10k_mem_region_type { 112 ATH10K_MEM_REGION_TYPE_REG = 1, 113 ATH10K_MEM_REGION_TYPE_DRAM = 2, 114 ATH10K_MEM_REGION_TYPE_AXI = 3, 115 ATH10K_MEM_REGION_TYPE_IRAM1 = 4, 116 ATH10K_MEM_REGION_TYPE_IRAM2 = 5, 117 ATH10K_MEM_REGION_TYPE_IOSRAM = 6, 118 ATH10K_MEM_REGION_TYPE_IOREG = 7, 119 ATH10K_MEM_REGION_TYPE_MSA = 8, 120 }; 121 122 /* Define a section of the region which should be copied. As not all parts 123 * of the memory is possible to copy, for example some of the registers can 124 * be like that, sections can be used to define what is safe to copy. 125 * 126 * To minimize the size of the array, the list must obey the format: 127 * '{start0,stop0},{start1,stop1},{start2,stop2}....' The values below must 128 * also obey to 'start0 < stop0 < start1 < stop1 < start2 < ...', otherwise 129 * we may encounter error in the dump processing. 130 */ 131 struct ath10k_mem_section { 132 u32 start; 133 u32 end; 134 }; 135 136 /* One region of a memory layout. If the sections field is null entire 137 * region is copied. If sections is non-null only the areas specified in 138 * sections are copied and rest of the areas are filled with 139 * ATH10K_MAGIC_NOT_COPIED. 140 */ 141 struct ath10k_mem_region { 142 enum ath10k_mem_region_type type; 143 u32 start; 144 u32 len; 145 146 const char *name; 147 148 struct { 149 const struct ath10k_mem_section *sections; 150 u32 size; 151 } section_table; 152 }; 153 154 /* Contains the memory layout of a hardware version identified with the 155 * hardware id, split into regions. 156 */ 157 struct ath10k_hw_mem_layout { 158 u32 hw_id; 159 u32 hw_rev; 160 enum ath10k_bus bus; 161 162 struct { 163 const struct ath10k_mem_region *regions; 164 int size; 165 } region_table; 166 }; 167 168 /* FIXME: where to put this? */ 169 extern unsigned long ath10k_coredump_mask; 170 171 #ifdef CONFIG_DEV_COREDUMP 172 173 int ath10k_coredump_submit(struct ath10k *ar); 174 struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar); 175 int ath10k_coredump_create(struct ath10k *ar); 176 int ath10k_coredump_register(struct ath10k *ar); 177 void ath10k_coredump_unregister(struct ath10k *ar); 178 void ath10k_coredump_destroy(struct ath10k *ar); 179 180 const struct ath10k_hw_mem_layout *_ath10k_coredump_get_mem_layout(struct ath10k *ar); 181 const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k *ar); 182 183 #else /* CONFIG_DEV_COREDUMP */ 184 185 static inline int ath10k_coredump_submit(struct ath10k *ar) 186 { 187 return 0; 188 } 189 190 static inline struct ath10k_fw_crash_data *ath10k_coredump_new(struct ath10k *ar) 191 { 192 return NULL; 193 } 194 195 static inline int ath10k_coredump_create(struct ath10k *ar) 196 { 197 return 0; 198 } 199 200 static inline int ath10k_coredump_register(struct ath10k *ar) 201 { 202 return 0; 203 } 204 205 static inline void ath10k_coredump_unregister(struct ath10k *ar) 206 { 207 } 208 209 static inline void ath10k_coredump_destroy(struct ath10k *ar) 210 { 211 } 212 213 static inline const struct ath10k_hw_mem_layout * 214 ath10k_coredump_get_mem_layout(struct ath10k *ar) 215 { 216 return NULL; 217 } 218 219 static inline const struct ath10k_hw_mem_layout * 220 _ath10k_coredump_get_mem_layout(struct ath10k *ar) 221 { 222 return NULL; 223 } 224 225 #endif /* CONFIG_DEV_COREDUMP */ 226 227 #endif /* _COREDUMP_H_ */ 228