1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 #include "wow.h" 39 #include "swap.h" 40 41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 43 #define WO(_f) ((_f##_OFFSET) >> 2) 44 45 #define ATH10K_SCAN_ID 0 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5*HZ) 48 #define ATH10K_CONNECTION_LOSS_HZ (3*HZ) 49 #define ATH10K_NUM_CHANS 39 50 51 /* Antenna noise floor */ 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95 53 54 #define ATH10K_MAX_NUM_MGMT_PENDING 128 55 56 /* number of failed packets (20 packets with 16 sw reties each) */ 57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 58 59 /* 60 * Use insanely high numbers to make sure that the firmware implementation 61 * won't start, we have the same functionality already in hostapd. Unit 62 * is seconds. 63 */ 64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 67 68 struct ath10k; 69 70 enum ath10k_bus { 71 ATH10K_BUS_PCI, 72 }; 73 74 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 75 { 76 switch (bus) { 77 case ATH10K_BUS_PCI: 78 return "pci"; 79 } 80 81 return "unknown"; 82 } 83 84 struct ath10k_skb_cb { 85 dma_addr_t paddr; 86 u8 eid; 87 u8 vdev_id; 88 enum ath10k_hw_txrx_mode txmode; 89 bool is_protected; 90 91 struct { 92 u8 tid; 93 u16 freq; 94 bool is_offchan; 95 bool nohwcrypt; 96 struct ath10k_htt_txbuf *txbuf; 97 u32 txbuf_paddr; 98 } __packed htt; 99 100 struct { 101 bool dtim_zero; 102 bool deliver_cab; 103 } bcn; 104 } __packed; 105 106 struct ath10k_skb_rxcb { 107 dma_addr_t paddr; 108 struct hlist_node hlist; 109 }; 110 111 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 112 { 113 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 114 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 115 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 116 } 117 118 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 119 { 120 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 121 return (struct ath10k_skb_rxcb *)skb->cb; 122 } 123 124 #define ATH10K_RXCB_SKB(rxcb) \ 125 container_of((void *)rxcb, struct sk_buff, cb) 126 127 static inline u32 host_interest_item_address(u32 item_offset) 128 { 129 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 130 } 131 132 struct ath10k_bmi { 133 bool done_sent; 134 }; 135 136 struct ath10k_mem_chunk { 137 void *vaddr; 138 dma_addr_t paddr; 139 u32 len; 140 u32 req_id; 141 }; 142 143 struct ath10k_wmi { 144 enum ath10k_fw_wmi_op_version op_version; 145 enum ath10k_htc_ep_id eid; 146 struct completion service_ready; 147 struct completion unified_ready; 148 wait_queue_head_t tx_credits_wq; 149 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 150 struct wmi_cmd_map *cmd; 151 struct wmi_vdev_param_map *vdev_param; 152 struct wmi_pdev_param_map *pdev_param; 153 const struct wmi_ops *ops; 154 155 u32 num_mem_chunks; 156 u32 rx_decap_mode; 157 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 158 }; 159 160 struct ath10k_fw_stats_peer { 161 struct list_head list; 162 163 u8 peer_macaddr[ETH_ALEN]; 164 u32 peer_rssi; 165 u32 peer_tx_rate; 166 u32 peer_rx_rate; /* 10x only */ 167 }; 168 169 struct ath10k_fw_stats_vdev { 170 struct list_head list; 171 172 u32 vdev_id; 173 u32 beacon_snr; 174 u32 data_snr; 175 u32 num_tx_frames[4]; 176 u32 num_rx_frames; 177 u32 num_tx_frames_retries[4]; 178 u32 num_tx_frames_failures[4]; 179 u32 num_rts_fail; 180 u32 num_rts_success; 181 u32 num_rx_err; 182 u32 num_rx_discard; 183 u32 num_tx_not_acked; 184 u32 tx_rate_history[10]; 185 u32 beacon_rssi_history[10]; 186 }; 187 188 struct ath10k_fw_stats_pdev { 189 struct list_head list; 190 191 /* PDEV stats */ 192 s32 ch_noise_floor; 193 u32 tx_frame_count; 194 u32 rx_frame_count; 195 u32 rx_clear_count; 196 u32 cycle_count; 197 u32 phy_err_count; 198 u32 chan_tx_power; 199 u32 ack_rx_bad; 200 u32 rts_bad; 201 u32 rts_good; 202 u32 fcs_bad; 203 u32 no_beacons; 204 u32 mib_int_count; 205 206 /* PDEV TX stats */ 207 s32 comp_queued; 208 s32 comp_delivered; 209 s32 msdu_enqued; 210 s32 mpdu_enqued; 211 s32 wmm_drop; 212 s32 local_enqued; 213 s32 local_freed; 214 s32 hw_queued; 215 s32 hw_reaped; 216 s32 underrun; 217 s32 tx_abort; 218 s32 mpdus_requed; 219 u32 tx_ko; 220 u32 data_rc; 221 u32 self_triggers; 222 u32 sw_retry_failure; 223 u32 illgl_rate_phy_err; 224 u32 pdev_cont_xretry; 225 u32 pdev_tx_timeout; 226 u32 pdev_resets; 227 u32 phy_underrun; 228 u32 txop_ovf; 229 230 /* PDEV RX stats */ 231 s32 mid_ppdu_route_change; 232 s32 status_rcvd; 233 s32 r0_frags; 234 s32 r1_frags; 235 s32 r2_frags; 236 s32 r3_frags; 237 s32 htt_msdus; 238 s32 htt_mpdus; 239 s32 loc_msdus; 240 s32 loc_mpdus; 241 s32 oversize_amsdu; 242 s32 phy_errs; 243 s32 phy_err_drop; 244 s32 mpdu_errs; 245 }; 246 247 struct ath10k_fw_stats { 248 struct list_head pdevs; 249 struct list_head vdevs; 250 struct list_head peers; 251 }; 252 253 struct ath10k_dfs_stats { 254 u32 phy_errors; 255 u32 pulses_total; 256 u32 pulses_detected; 257 u32 pulses_discarded; 258 u32 radar_detected; 259 }; 260 261 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 262 263 struct ath10k_peer { 264 struct list_head list; 265 int vdev_id; 266 u8 addr[ETH_ALEN]; 267 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 268 269 /* protected by ar->data_lock */ 270 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 271 }; 272 273 struct ath10k_sta { 274 struct ath10k_vif *arvif; 275 276 /* the following are protected by ar->data_lock */ 277 u32 changed; /* IEEE80211_RC_* */ 278 u32 bw; 279 u32 nss; 280 u32 smps; 281 282 struct work_struct update_wk; 283 284 #ifdef CONFIG_MAC80211_DEBUGFS 285 /* protected by conf_mutex */ 286 bool aggr_mode; 287 #endif 288 }; 289 290 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5*HZ) 291 292 enum ath10k_beacon_state { 293 ATH10K_BEACON_SCHEDULED = 0, 294 ATH10K_BEACON_SENDING, 295 ATH10K_BEACON_SENT, 296 }; 297 298 struct ath10k_vif { 299 struct list_head list; 300 301 u32 vdev_id; 302 enum wmi_vdev_type vdev_type; 303 enum wmi_vdev_subtype vdev_subtype; 304 u32 beacon_interval; 305 u32 dtim_period; 306 struct sk_buff *beacon; 307 /* protected by data_lock */ 308 enum ath10k_beacon_state beacon_state; 309 void *beacon_buf; 310 dma_addr_t beacon_paddr; 311 unsigned long tx_paused; /* arbitrary values defined by target */ 312 313 struct ath10k *ar; 314 struct ieee80211_vif *vif; 315 316 bool is_started; 317 bool is_up; 318 bool spectral_enabled; 319 bool ps; 320 u32 aid; 321 u8 bssid[ETH_ALEN]; 322 323 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 324 s8 def_wep_key_idx; 325 326 u16 tx_seq_no; 327 328 union { 329 struct { 330 u32 uapsd; 331 } sta; 332 struct { 333 /* 512 stations */ 334 u8 tim_bitmap[64]; 335 u8 tim_len; 336 u32 ssid_len; 337 u8 ssid[IEEE80211_MAX_SSID_LEN]; 338 bool hidden_ssid; 339 /* P2P_IE with NoA attribute for P2P_GO case */ 340 u32 noa_len; 341 u8 *noa_data; 342 } ap; 343 } u; 344 345 bool use_cts_prot; 346 bool nohwcrypt; 347 int num_legacy_stations; 348 int txpower; 349 struct wmi_wmm_params_all_arg wmm_params; 350 struct work_struct ap_csa_work; 351 struct delayed_work connection_loss_work; 352 struct cfg80211_bitrate_mask bitrate_mask; 353 }; 354 355 struct ath10k_vif_iter { 356 u32 vdev_id; 357 struct ath10k_vif *arvif; 358 }; 359 360 /* used for crash-dump storage, protected by data-lock */ 361 struct ath10k_fw_crash_data { 362 bool crashed_since_read; 363 364 uuid_le uuid; 365 struct timespec timestamp; 366 __le32 registers[REG_DUMP_COUNT_QCA988X]; 367 }; 368 369 struct ath10k_debug { 370 struct dentry *debugfs_phy; 371 372 struct ath10k_fw_stats fw_stats; 373 struct completion fw_stats_complete; 374 bool fw_stats_done; 375 376 unsigned long htt_stats_mask; 377 struct delayed_work htt_stats_dwork; 378 struct ath10k_dfs_stats dfs_stats; 379 struct ath_dfs_pool_stats dfs_pool_stats; 380 381 /* protected by conf_mutex */ 382 u32 fw_dbglog_mask; 383 u32 fw_dbglog_level; 384 u32 pktlog_filter; 385 u32 reg_addr; 386 u32 nf_cal_period; 387 388 struct ath10k_fw_crash_data *fw_crash_data; 389 }; 390 391 enum ath10k_state { 392 ATH10K_STATE_OFF = 0, 393 ATH10K_STATE_ON, 394 395 /* When doing firmware recovery the device is first powered down. 396 * mac80211 is supposed to call in to start() hook later on. It is 397 * however possible that driver unloading and firmware crash overlap. 398 * mac80211 can wait on conf_mutex in stop() while the device is 399 * stopped in ath10k_core_restart() work holding conf_mutex. The state 400 * RESTARTED means that the device is up and mac80211 has started hw 401 * reconfiguration. Once mac80211 is done with the reconfiguration we 402 * set the state to STATE_ON in reconfig_complete(). */ 403 ATH10K_STATE_RESTARTING, 404 ATH10K_STATE_RESTARTED, 405 406 /* The device has crashed while restarting hw. This state is like ON 407 * but commands are blocked in HTC and -ECOMM response is given. This 408 * prevents completion timeouts and makes the driver more responsive to 409 * userspace commands. This is also prevents recursive recovery. */ 410 ATH10K_STATE_WEDGED, 411 412 /* factory tests */ 413 ATH10K_STATE_UTF, 414 }; 415 416 enum ath10k_firmware_mode { 417 /* the default mode, standard 802.11 functionality */ 418 ATH10K_FIRMWARE_MODE_NORMAL, 419 420 /* factory tests etc */ 421 ATH10K_FIRMWARE_MODE_UTF, 422 }; 423 424 enum ath10k_fw_features { 425 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 426 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 427 428 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 429 ATH10K_FW_FEATURE_WMI_10X = 1, 430 431 /* firmware support tx frame management over WMI, otherwise it's HTT */ 432 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 433 434 /* Firmware does not support P2P */ 435 ATH10K_FW_FEATURE_NO_P2P = 3, 436 437 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 438 * bit is required to be set as well. Deprecated, don't use in new 439 * code. 440 */ 441 ATH10K_FW_FEATURE_WMI_10_2 = 4, 442 443 /* Some firmware revisions lack proper multi-interface client powersave 444 * implementation. Enabling PS could result in connection drops, 445 * traffic stalls, etc. 446 */ 447 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 448 449 /* Some firmware revisions have an incomplete WoWLAN implementation 450 * despite WMI service bit being advertised. This feature flag is used 451 * to distinguish whether WoWLAN is really supported or not. 452 */ 453 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 454 455 /* Don't trust error code from otp.bin */ 456 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 457 458 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 459 * it 8 bytes long in Native Wifi Rx decap. 460 */ 461 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 462 463 /* Firmware supports bypassing PLL setting on init. */ 464 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 465 466 /* Raw mode support. If supported, FW supports receiving and trasmitting 467 * frames in raw mode. 468 */ 469 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 470 471 /* keep last */ 472 ATH10K_FW_FEATURE_COUNT, 473 }; 474 475 enum ath10k_dev_flags { 476 /* Indicates that ath10k device is during CAC phase of DFS */ 477 ATH10K_CAC_RUNNING, 478 ATH10K_FLAG_CORE_REGISTERED, 479 480 /* Device has crashed and needs to restart. This indicates any pending 481 * waiters should immediately cancel instead of waiting for a time out. 482 */ 483 ATH10K_FLAG_CRASH_FLUSH, 484 485 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 486 * Raw mode supports both hardware and software crypto. Native WiFi only 487 * supports hardware crypto. 488 */ 489 ATH10K_FLAG_RAW_MODE, 490 491 /* Disable HW crypto engine */ 492 ATH10K_FLAG_HW_CRYPTO_DISABLED, 493 }; 494 495 enum ath10k_cal_mode { 496 ATH10K_CAL_MODE_FILE, 497 ATH10K_CAL_MODE_OTP, 498 ATH10K_CAL_MODE_DT, 499 }; 500 501 enum ath10k_crypt_mode { 502 /* Only use hardware crypto engine */ 503 ATH10K_CRYPT_MODE_HW, 504 /* Only use software crypto engine */ 505 ATH10K_CRYPT_MODE_SW, 506 }; 507 508 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 509 { 510 switch (mode) { 511 case ATH10K_CAL_MODE_FILE: 512 return "file"; 513 case ATH10K_CAL_MODE_OTP: 514 return "otp"; 515 case ATH10K_CAL_MODE_DT: 516 return "dt"; 517 } 518 519 return "unknown"; 520 } 521 522 enum ath10k_scan_state { 523 ATH10K_SCAN_IDLE, 524 ATH10K_SCAN_STARTING, 525 ATH10K_SCAN_RUNNING, 526 ATH10K_SCAN_ABORTING, 527 }; 528 529 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 530 { 531 switch (state) { 532 case ATH10K_SCAN_IDLE: 533 return "idle"; 534 case ATH10K_SCAN_STARTING: 535 return "starting"; 536 case ATH10K_SCAN_RUNNING: 537 return "running"; 538 case ATH10K_SCAN_ABORTING: 539 return "aborting"; 540 } 541 542 return "unknown"; 543 } 544 545 enum ath10k_tx_pause_reason { 546 ATH10K_TX_PAUSE_Q_FULL, 547 ATH10K_TX_PAUSE_MAX, 548 }; 549 550 struct ath10k { 551 struct ath_common ath_common; 552 struct ieee80211_hw *hw; 553 struct device *dev; 554 u8 mac_addr[ETH_ALEN]; 555 556 enum ath10k_hw_rev hw_rev; 557 u16 dev_id; 558 u32 chip_id; 559 u32 target_version; 560 u8 fw_version_major; 561 u32 fw_version_minor; 562 u16 fw_version_release; 563 u16 fw_version_build; 564 u32 fw_stats_req_mask; 565 u32 phy_capability; 566 u32 hw_min_tx_power; 567 u32 hw_max_tx_power; 568 u32 ht_cap_info; 569 u32 vht_cap_info; 570 u32 num_rf_chains; 571 u32 max_spatial_stream; 572 /* protected by conf_mutex */ 573 bool ani_enabled; 574 575 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 576 577 bool p2p; 578 579 struct { 580 enum ath10k_bus bus; 581 const struct ath10k_hif_ops *ops; 582 } hif; 583 584 struct completion target_suspend; 585 586 const struct ath10k_hw_regs *regs; 587 const struct ath10k_hw_values *hw_values; 588 struct ath10k_bmi bmi; 589 struct ath10k_wmi wmi; 590 struct ath10k_htc htc; 591 struct ath10k_htt htt; 592 593 struct ath10k_hw_params { 594 u32 id; 595 const char *name; 596 u32 patch_load_addr; 597 int uart_pin; 598 u32 otp_exe_param; 599 600 /* This is true if given HW chip has a quirky Cycle Counter 601 * wraparound which resets to 0x7fffffff instead of 0. All 602 * other CC related counters (e.g. Rx Clear Count) are divided 603 * by 2 so they never wraparound themselves. 604 */ 605 bool has_shifted_cc_wraparound; 606 607 /* Some of chip expects fragment descriptor to be continuous 608 * memory for any TX operation. Set continuous_frag_desc flag 609 * for the hardware which have such requirement. 610 */ 611 bool continuous_frag_desc; 612 613 u32 channel_counters_freq_hz; 614 615 struct ath10k_hw_params_fw { 616 const char *dir; 617 const char *fw; 618 const char *otp; 619 const char *board; 620 size_t board_size; 621 size_t board_ext_size; 622 } fw; 623 } hw_params; 624 625 const struct firmware *board; 626 const void *board_data; 627 size_t board_len; 628 629 const struct firmware *otp; 630 const void *otp_data; 631 size_t otp_len; 632 633 const struct firmware *firmware; 634 const void *firmware_data; 635 size_t firmware_len; 636 637 const struct firmware *cal_file; 638 639 struct { 640 const void *firmware_codeswap_data; 641 size_t firmware_codeswap_len; 642 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 643 } swap; 644 645 char spec_board_id[100]; 646 bool spec_board_loaded; 647 648 int fw_api; 649 enum ath10k_cal_mode cal_mode; 650 651 struct { 652 struct completion started; 653 struct completion completed; 654 struct completion on_channel; 655 struct delayed_work timeout; 656 enum ath10k_scan_state state; 657 bool is_roc; 658 int vdev_id; 659 int roc_freq; 660 bool roc_notify; 661 } scan; 662 663 struct { 664 struct ieee80211_supported_band sbands[IEEE80211_NUM_BANDS]; 665 } mac; 666 667 /* should never be NULL; needed for regular htt rx */ 668 struct ieee80211_channel *rx_channel; 669 670 /* valid during scan; needed for mgmt rx during scan */ 671 struct ieee80211_channel *scan_channel; 672 673 /* current operating channel definition */ 674 struct cfg80211_chan_def chandef; 675 676 unsigned long long free_vdev_map; 677 struct ath10k_vif *monitor_arvif; 678 bool monitor; 679 int monitor_vdev_id; 680 bool monitor_started; 681 unsigned int filter_flags; 682 unsigned long dev_flags; 683 u32 dfs_block_radar_events; 684 685 /* protected by conf_mutex */ 686 bool radar_enabled; 687 int num_started_vdevs; 688 689 /* Protected by conf-mutex */ 690 u8 supp_tx_chainmask; 691 u8 supp_rx_chainmask; 692 u8 cfg_tx_chainmask; 693 u8 cfg_rx_chainmask; 694 695 struct completion install_key_done; 696 697 struct completion vdev_setup_done; 698 699 struct workqueue_struct *workqueue; 700 /* Auxiliary workqueue */ 701 struct workqueue_struct *workqueue_aux; 702 703 /* prevents concurrent FW reconfiguration */ 704 struct mutex conf_mutex; 705 706 /* protects shared structure data */ 707 spinlock_t data_lock; 708 709 struct list_head arvifs; 710 struct list_head peers; 711 wait_queue_head_t peer_mapping_wq; 712 713 /* protected by conf_mutex */ 714 int num_peers; 715 int num_stations; 716 717 int max_num_peers; 718 int max_num_stations; 719 int max_num_vdevs; 720 int max_num_tdls_vdevs; 721 int num_active_peers; 722 int num_tids; 723 724 struct work_struct svc_rdy_work; 725 struct sk_buff *svc_rdy_skb; 726 727 struct work_struct offchan_tx_work; 728 struct sk_buff_head offchan_tx_queue; 729 struct completion offchan_tx_completed; 730 struct sk_buff *offchan_tx_skb; 731 732 struct work_struct wmi_mgmt_tx_work; 733 struct sk_buff_head wmi_mgmt_tx_queue; 734 735 enum ath10k_state state; 736 737 struct work_struct register_work; 738 struct work_struct restart_work; 739 740 /* cycle count is reported twice for each visited channel during scan. 741 * access protected by data_lock */ 742 u32 survey_last_rx_clear_count; 743 u32 survey_last_cycle_count; 744 struct survey_info survey[ATH10K_NUM_CHANS]; 745 746 /* Channel info events are expected to come in pairs without and with 747 * COMPLETE flag set respectively for each channel visit during scan. 748 * 749 * However there are deviations from this rule. This flag is used to 750 * avoid reporting garbage data. 751 */ 752 bool ch_info_can_report_survey; 753 754 struct dfs_pattern_detector *dfs_detector; 755 756 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 757 758 #ifdef CONFIG_ATH10K_DEBUGFS 759 struct ath10k_debug debug; 760 #endif 761 762 struct { 763 /* relay(fs) channel for spectral scan */ 764 struct rchan *rfs_chan_spec_scan; 765 766 /* spectral_mode and spec_config are protected by conf_mutex */ 767 enum ath10k_spectral_mode mode; 768 struct ath10k_spec_scan config; 769 } spectral; 770 771 struct { 772 /* protected by conf_mutex */ 773 const struct firmware *utf; 774 DECLARE_BITMAP(orig_fw_features, ATH10K_FW_FEATURE_COUNT); 775 enum ath10k_fw_wmi_op_version orig_wmi_op_version; 776 777 /* protected by data_lock */ 778 bool utf_monitor; 779 } testmode; 780 781 struct { 782 /* protected by data_lock */ 783 u32 fw_crash_counter; 784 u32 fw_warm_reset_counter; 785 u32 fw_cold_reset_counter; 786 } stats; 787 788 struct ath10k_thermal thermal; 789 struct ath10k_wow wow; 790 791 /* must be last */ 792 u8 drv_priv[0] __aligned(sizeof(void *)); 793 }; 794 795 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 796 enum ath10k_bus bus, 797 enum ath10k_hw_rev hw_rev, 798 const struct ath10k_hif_ops *hif_ops); 799 void ath10k_core_destroy(struct ath10k *ar); 800 void ath10k_core_get_fw_features_str(struct ath10k *ar, 801 char *buf, 802 size_t max_len); 803 804 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode); 805 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 806 void ath10k_core_stop(struct ath10k *ar); 807 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 808 void ath10k_core_unregister(struct ath10k *ar); 809 810 #endif /* _CORE_H_ */ 811