1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #ifndef _CORE_H_ 19 #define _CORE_H_ 20 21 #include <linux/completion.h> 22 #include <linux/if_ether.h> 23 #include <linux/types.h> 24 #include <linux/pci.h> 25 #include <linux/uuid.h> 26 #include <linux/time.h> 27 28 #include "htt.h" 29 #include "htc.h" 30 #include "hw.h" 31 #include "targaddrs.h" 32 #include "wmi.h" 33 #include "../ath.h" 34 #include "../regd.h" 35 #include "../dfs_pattern_detector.h" 36 #include "spectral.h" 37 #include "thermal.h" 38 #include "wow.h" 39 #include "swap.h" 40 41 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB) 42 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK) 43 #define WO(_f) ((_f##_OFFSET) >> 2) 44 45 #define ATH10K_SCAN_ID 0 46 #define WMI_READY_TIMEOUT (5 * HZ) 47 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ) 48 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ) 49 #define ATH10K_NUM_CHANS 39 50 51 /* Antenna noise floor */ 52 #define ATH10K_DEFAULT_NOISE_FLOOR -95 53 54 #define ATH10K_MAX_NUM_MGMT_PENDING 128 55 56 /* number of failed packets (20 packets with 16 sw reties each) */ 57 #define ATH10K_KICKOUT_THRESHOLD (20 * 16) 58 59 /* 60 * Use insanely high numbers to make sure that the firmware implementation 61 * won't start, we have the same functionality already in hostapd. Unit 62 * is seconds. 63 */ 64 #define ATH10K_KEEPALIVE_MIN_IDLE 3747 65 #define ATH10K_KEEPALIVE_MAX_IDLE 3895 66 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900 67 68 struct ath10k; 69 70 enum ath10k_bus { 71 ATH10K_BUS_PCI, 72 ATH10K_BUS_AHB, 73 }; 74 75 static inline const char *ath10k_bus_str(enum ath10k_bus bus) 76 { 77 switch (bus) { 78 case ATH10K_BUS_PCI: 79 return "pci"; 80 case ATH10K_BUS_AHB: 81 return "ahb"; 82 } 83 84 return "unknown"; 85 } 86 87 enum ath10k_skb_flags { 88 ATH10K_SKB_F_NO_HWCRYPT = BIT(0), 89 ATH10K_SKB_F_DTIM_ZERO = BIT(1), 90 ATH10K_SKB_F_DELIVER_CAB = BIT(2), 91 ATH10K_SKB_F_MGMT = BIT(3), 92 ATH10K_SKB_F_QOS = BIT(4), 93 }; 94 95 struct ath10k_skb_cb { 96 dma_addr_t paddr; 97 u8 flags; 98 u8 eid; 99 u16 msdu_id; 100 struct ieee80211_vif *vif; 101 struct ieee80211_txq *txq; 102 } __packed; 103 104 struct ath10k_skb_rxcb { 105 dma_addr_t paddr; 106 struct hlist_node hlist; 107 }; 108 109 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb) 110 { 111 BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) > 112 IEEE80211_TX_INFO_DRIVER_DATA_SIZE); 113 return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data; 114 } 115 116 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb) 117 { 118 BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb)); 119 return (struct ath10k_skb_rxcb *)skb->cb; 120 } 121 122 #define ATH10K_RXCB_SKB(rxcb) \ 123 container_of((void *)rxcb, struct sk_buff, cb) 124 125 static inline u32 host_interest_item_address(u32 item_offset) 126 { 127 return QCA988X_HOST_INTEREST_ADDRESS + item_offset; 128 } 129 130 struct ath10k_bmi { 131 bool done_sent; 132 }; 133 134 struct ath10k_mem_chunk { 135 void *vaddr; 136 dma_addr_t paddr; 137 u32 len; 138 u32 req_id; 139 }; 140 141 struct ath10k_wmi { 142 enum ath10k_htc_ep_id eid; 143 struct completion service_ready; 144 struct completion unified_ready; 145 wait_queue_head_t tx_credits_wq; 146 DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX); 147 struct wmi_cmd_map *cmd; 148 struct wmi_vdev_param_map *vdev_param; 149 struct wmi_pdev_param_map *pdev_param; 150 const struct wmi_ops *ops; 151 const struct wmi_peer_flags_map *peer_flags; 152 153 u32 num_mem_chunks; 154 u32 rx_decap_mode; 155 struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS]; 156 }; 157 158 struct ath10k_fw_stats_peer { 159 struct list_head list; 160 161 u8 peer_macaddr[ETH_ALEN]; 162 u32 peer_rssi; 163 u32 peer_tx_rate; 164 u32 peer_rx_rate; /* 10x only */ 165 u32 rx_duration; 166 }; 167 168 struct ath10k_fw_extd_stats_peer { 169 struct list_head list; 170 171 u8 peer_macaddr[ETH_ALEN]; 172 u32 rx_duration; 173 }; 174 175 struct ath10k_fw_stats_vdev { 176 struct list_head list; 177 178 u32 vdev_id; 179 u32 beacon_snr; 180 u32 data_snr; 181 u32 num_tx_frames[4]; 182 u32 num_rx_frames; 183 u32 num_tx_frames_retries[4]; 184 u32 num_tx_frames_failures[4]; 185 u32 num_rts_fail; 186 u32 num_rts_success; 187 u32 num_rx_err; 188 u32 num_rx_discard; 189 u32 num_tx_not_acked; 190 u32 tx_rate_history[10]; 191 u32 beacon_rssi_history[10]; 192 }; 193 194 struct ath10k_fw_stats_pdev { 195 struct list_head list; 196 197 /* PDEV stats */ 198 s32 ch_noise_floor; 199 u32 tx_frame_count; 200 u32 rx_frame_count; 201 u32 rx_clear_count; 202 u32 cycle_count; 203 u32 phy_err_count; 204 u32 chan_tx_power; 205 u32 ack_rx_bad; 206 u32 rts_bad; 207 u32 rts_good; 208 u32 fcs_bad; 209 u32 no_beacons; 210 u32 mib_int_count; 211 212 /* PDEV TX stats */ 213 s32 comp_queued; 214 s32 comp_delivered; 215 s32 msdu_enqued; 216 s32 mpdu_enqued; 217 s32 wmm_drop; 218 s32 local_enqued; 219 s32 local_freed; 220 s32 hw_queued; 221 s32 hw_reaped; 222 s32 underrun; 223 u32 hw_paused; 224 s32 tx_abort; 225 s32 mpdus_requed; 226 u32 tx_ko; 227 u32 data_rc; 228 u32 self_triggers; 229 u32 sw_retry_failure; 230 u32 illgl_rate_phy_err; 231 u32 pdev_cont_xretry; 232 u32 pdev_tx_timeout; 233 u32 pdev_resets; 234 u32 phy_underrun; 235 u32 txop_ovf; 236 u32 seq_posted; 237 u32 seq_failed_queueing; 238 u32 seq_completed; 239 u32 seq_restarted; 240 u32 mu_seq_posted; 241 u32 mpdus_sw_flush; 242 u32 mpdus_hw_filter; 243 u32 mpdus_truncated; 244 u32 mpdus_ack_failed; 245 u32 mpdus_expired; 246 247 /* PDEV RX stats */ 248 s32 mid_ppdu_route_change; 249 s32 status_rcvd; 250 s32 r0_frags; 251 s32 r1_frags; 252 s32 r2_frags; 253 s32 r3_frags; 254 s32 htt_msdus; 255 s32 htt_mpdus; 256 s32 loc_msdus; 257 s32 loc_mpdus; 258 s32 oversize_amsdu; 259 s32 phy_errs; 260 s32 phy_err_drop; 261 s32 mpdu_errs; 262 s32 rx_ovfl_errs; 263 }; 264 265 struct ath10k_fw_stats { 266 bool extended; 267 struct list_head pdevs; 268 struct list_head vdevs; 269 struct list_head peers; 270 struct list_head peers_extd; 271 }; 272 273 #define ATH10K_TPC_TABLE_TYPE_FLAG 1 274 #define ATH10K_TPC_PREAM_TABLE_END 0xFFFF 275 276 struct ath10k_tpc_table { 277 u32 pream_idx[WMI_TPC_RATE_MAX]; 278 u8 rate_code[WMI_TPC_RATE_MAX]; 279 char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE]; 280 }; 281 282 struct ath10k_tpc_stats { 283 u32 reg_domain; 284 u32 chan_freq; 285 u32 phy_mode; 286 u32 twice_antenna_reduction; 287 u32 twice_max_rd_power; 288 s32 twice_antenna_gain; 289 u32 power_limit; 290 u32 num_tx_chain; 291 u32 ctl; 292 u32 rate_max; 293 u8 flag[WMI_TPC_FLAG]; 294 struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG]; 295 }; 296 297 struct ath10k_dfs_stats { 298 u32 phy_errors; 299 u32 pulses_total; 300 u32 pulses_detected; 301 u32 pulses_discarded; 302 u32 radar_detected; 303 }; 304 305 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */ 306 307 struct ath10k_peer { 308 struct list_head list; 309 struct ieee80211_vif *vif; 310 struct ieee80211_sta *sta; 311 312 int vdev_id; 313 u8 addr[ETH_ALEN]; 314 DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS); 315 316 /* protected by ar->data_lock */ 317 struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1]; 318 }; 319 320 struct ath10k_txq { 321 struct list_head list; 322 unsigned long num_fw_queued; 323 unsigned long num_push_allowed; 324 }; 325 326 struct ath10k_sta { 327 struct ath10k_vif *arvif; 328 329 /* the following are protected by ar->data_lock */ 330 u32 changed; /* IEEE80211_RC_* */ 331 u32 bw; 332 u32 nss; 333 u32 smps; 334 u16 peer_id; 335 336 struct work_struct update_wk; 337 338 #ifdef CONFIG_MAC80211_DEBUGFS 339 /* protected by conf_mutex */ 340 bool aggr_mode; 341 u64 rx_duration; 342 #endif 343 }; 344 345 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ (5 * HZ) 346 347 enum ath10k_beacon_state { 348 ATH10K_BEACON_SCHEDULED = 0, 349 ATH10K_BEACON_SENDING, 350 ATH10K_BEACON_SENT, 351 }; 352 353 struct ath10k_vif { 354 struct list_head list; 355 356 u32 vdev_id; 357 u16 peer_id; 358 enum wmi_vdev_type vdev_type; 359 enum wmi_vdev_subtype vdev_subtype; 360 u32 beacon_interval; 361 u32 dtim_period; 362 struct sk_buff *beacon; 363 /* protected by data_lock */ 364 enum ath10k_beacon_state beacon_state; 365 void *beacon_buf; 366 dma_addr_t beacon_paddr; 367 unsigned long tx_paused; /* arbitrary values defined by target */ 368 369 struct ath10k *ar; 370 struct ieee80211_vif *vif; 371 372 bool is_started; 373 bool is_up; 374 bool spectral_enabled; 375 bool ps; 376 u32 aid; 377 u8 bssid[ETH_ALEN]; 378 379 struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1]; 380 s8 def_wep_key_idx; 381 382 u16 tx_seq_no; 383 384 union { 385 struct { 386 u32 uapsd; 387 } sta; 388 struct { 389 /* 512 stations */ 390 u8 tim_bitmap[64]; 391 u8 tim_len; 392 u32 ssid_len; 393 u8 ssid[IEEE80211_MAX_SSID_LEN]; 394 bool hidden_ssid; 395 /* P2P_IE with NoA attribute for P2P_GO case */ 396 u32 noa_len; 397 u8 *noa_data; 398 } ap; 399 } u; 400 401 bool use_cts_prot; 402 bool nohwcrypt; 403 int num_legacy_stations; 404 int txpower; 405 struct wmi_wmm_params_all_arg wmm_params; 406 struct work_struct ap_csa_work; 407 struct delayed_work connection_loss_work; 408 struct cfg80211_bitrate_mask bitrate_mask; 409 }; 410 411 struct ath10k_vif_iter { 412 u32 vdev_id; 413 struct ath10k_vif *arvif; 414 }; 415 416 /* used for crash-dump storage, protected by data-lock */ 417 struct ath10k_fw_crash_data { 418 bool crashed_since_read; 419 420 uuid_le uuid; 421 struct timespec timestamp; 422 __le32 registers[REG_DUMP_COUNT_QCA988X]; 423 }; 424 425 struct ath10k_debug { 426 struct dentry *debugfs_phy; 427 428 struct ath10k_fw_stats fw_stats; 429 struct completion fw_stats_complete; 430 bool fw_stats_done; 431 432 unsigned long htt_stats_mask; 433 struct delayed_work htt_stats_dwork; 434 struct ath10k_dfs_stats dfs_stats; 435 struct ath_dfs_pool_stats dfs_pool_stats; 436 437 /* used for tpc-dump storage, protected by data-lock */ 438 struct ath10k_tpc_stats *tpc_stats; 439 440 struct completion tpc_complete; 441 442 /* protected by conf_mutex */ 443 u32 fw_dbglog_mask; 444 u32 fw_dbglog_level; 445 u32 pktlog_filter; 446 u32 reg_addr; 447 u32 nf_cal_period; 448 449 struct ath10k_fw_crash_data *fw_crash_data; 450 }; 451 452 enum ath10k_state { 453 ATH10K_STATE_OFF = 0, 454 ATH10K_STATE_ON, 455 456 /* When doing firmware recovery the device is first powered down. 457 * mac80211 is supposed to call in to start() hook later on. It is 458 * however possible that driver unloading and firmware crash overlap. 459 * mac80211 can wait on conf_mutex in stop() while the device is 460 * stopped in ath10k_core_restart() work holding conf_mutex. The state 461 * RESTARTED means that the device is up and mac80211 has started hw 462 * reconfiguration. Once mac80211 is done with the reconfiguration we 463 * set the state to STATE_ON in reconfig_complete(). */ 464 ATH10K_STATE_RESTARTING, 465 ATH10K_STATE_RESTARTED, 466 467 /* The device has crashed while restarting hw. This state is like ON 468 * but commands are blocked in HTC and -ECOMM response is given. This 469 * prevents completion timeouts and makes the driver more responsive to 470 * userspace commands. This is also prevents recursive recovery. */ 471 ATH10K_STATE_WEDGED, 472 473 /* factory tests */ 474 ATH10K_STATE_UTF, 475 }; 476 477 enum ath10k_firmware_mode { 478 /* the default mode, standard 802.11 functionality */ 479 ATH10K_FIRMWARE_MODE_NORMAL, 480 481 /* factory tests etc */ 482 ATH10K_FIRMWARE_MODE_UTF, 483 }; 484 485 enum ath10k_fw_features { 486 /* wmi_mgmt_rx_hdr contains extra RSSI information */ 487 ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0, 488 489 /* Firmware from 10X branch. Deprecated, don't use in new code. */ 490 ATH10K_FW_FEATURE_WMI_10X = 1, 491 492 /* firmware support tx frame management over WMI, otherwise it's HTT */ 493 ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2, 494 495 /* Firmware does not support P2P */ 496 ATH10K_FW_FEATURE_NO_P2P = 3, 497 498 /* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature 499 * bit is required to be set as well. Deprecated, don't use in new 500 * code. 501 */ 502 ATH10K_FW_FEATURE_WMI_10_2 = 4, 503 504 /* Some firmware revisions lack proper multi-interface client powersave 505 * implementation. Enabling PS could result in connection drops, 506 * traffic stalls, etc. 507 */ 508 ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5, 509 510 /* Some firmware revisions have an incomplete WoWLAN implementation 511 * despite WMI service bit being advertised. This feature flag is used 512 * to distinguish whether WoWLAN is really supported or not. 513 */ 514 ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6, 515 516 /* Don't trust error code from otp.bin */ 517 ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7, 518 519 /* Some firmware revisions pad 4th hw address to 4 byte boundary making 520 * it 8 bytes long in Native Wifi Rx decap. 521 */ 522 ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8, 523 524 /* Firmware supports bypassing PLL setting on init. */ 525 ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9, 526 527 /* Raw mode support. If supported, FW supports receiving and trasmitting 528 * frames in raw mode. 529 */ 530 ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10, 531 532 /* Firmware Supports Adaptive CCA*/ 533 ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11, 534 535 /* Firmware supports management frame protection */ 536 ATH10K_FW_FEATURE_MFP_SUPPORT = 12, 537 538 /* Firmware supports pull-push model where host shares it's software 539 * queue state with firmware and firmware generates fetch requests 540 * telling host which queues to dequeue tx from. 541 * 542 * Primary function of this is improved MU-MIMO performance with 543 * multiple clients. 544 */ 545 ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13, 546 547 /* Firmware supports BT-Coex without reloading firmware via pdev param. 548 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of 549 * extended resource config should be enabled always. This firmware IE 550 * is used to configure WMI_COEX_GPIO_SUPPORT. 551 */ 552 ATH10K_FW_FEATURE_BTCOEX_PARAM = 14, 553 554 /* keep last */ 555 ATH10K_FW_FEATURE_COUNT, 556 }; 557 558 enum ath10k_dev_flags { 559 /* Indicates that ath10k device is during CAC phase of DFS */ 560 ATH10K_CAC_RUNNING, 561 ATH10K_FLAG_CORE_REGISTERED, 562 563 /* Device has crashed and needs to restart. This indicates any pending 564 * waiters should immediately cancel instead of waiting for a time out. 565 */ 566 ATH10K_FLAG_CRASH_FLUSH, 567 568 /* Use Raw mode instead of native WiFi Tx/Rx encap mode. 569 * Raw mode supports both hardware and software crypto. Native WiFi only 570 * supports hardware crypto. 571 */ 572 ATH10K_FLAG_RAW_MODE, 573 574 /* Disable HW crypto engine */ 575 ATH10K_FLAG_HW_CRYPTO_DISABLED, 576 577 /* Bluetooth coexistance enabled */ 578 ATH10K_FLAG_BTCOEX, 579 580 /* Per Station statistics service */ 581 ATH10K_FLAG_PEER_STATS, 582 }; 583 584 enum ath10k_cal_mode { 585 ATH10K_CAL_MODE_FILE, 586 ATH10K_CAL_MODE_OTP, 587 ATH10K_CAL_MODE_DT, 588 ATH10K_PRE_CAL_MODE_FILE, 589 ATH10K_PRE_CAL_MODE_DT, 590 ATH10K_CAL_MODE_EEPROM, 591 }; 592 593 enum ath10k_crypt_mode { 594 /* Only use hardware crypto engine */ 595 ATH10K_CRYPT_MODE_HW, 596 /* Only use software crypto engine */ 597 ATH10K_CRYPT_MODE_SW, 598 }; 599 600 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode) 601 { 602 switch (mode) { 603 case ATH10K_CAL_MODE_FILE: 604 return "file"; 605 case ATH10K_CAL_MODE_OTP: 606 return "otp"; 607 case ATH10K_CAL_MODE_DT: 608 return "dt"; 609 case ATH10K_PRE_CAL_MODE_FILE: 610 return "pre-cal-file"; 611 case ATH10K_PRE_CAL_MODE_DT: 612 return "pre-cal-dt"; 613 case ATH10K_CAL_MODE_EEPROM: 614 return "eeprom"; 615 } 616 617 return "unknown"; 618 } 619 620 enum ath10k_scan_state { 621 ATH10K_SCAN_IDLE, 622 ATH10K_SCAN_STARTING, 623 ATH10K_SCAN_RUNNING, 624 ATH10K_SCAN_ABORTING, 625 }; 626 627 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state) 628 { 629 switch (state) { 630 case ATH10K_SCAN_IDLE: 631 return "idle"; 632 case ATH10K_SCAN_STARTING: 633 return "starting"; 634 case ATH10K_SCAN_RUNNING: 635 return "running"; 636 case ATH10K_SCAN_ABORTING: 637 return "aborting"; 638 } 639 640 return "unknown"; 641 } 642 643 enum ath10k_tx_pause_reason { 644 ATH10K_TX_PAUSE_Q_FULL, 645 ATH10K_TX_PAUSE_MAX, 646 }; 647 648 struct ath10k_fw_file { 649 const struct firmware *firmware; 650 651 char fw_version[ETHTOOL_FWVERS_LEN]; 652 653 DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT); 654 655 enum ath10k_fw_wmi_op_version wmi_op_version; 656 enum ath10k_fw_htt_op_version htt_op_version; 657 658 const void *firmware_data; 659 size_t firmware_len; 660 661 const void *otp_data; 662 size_t otp_len; 663 664 const void *codeswap_data; 665 size_t codeswap_len; 666 }; 667 668 struct ath10k_fw_components { 669 const struct firmware *board; 670 const void *board_data; 671 size_t board_len; 672 673 struct ath10k_fw_file fw_file; 674 }; 675 676 struct ath10k { 677 struct ath_common ath_common; 678 struct ieee80211_hw *hw; 679 struct ieee80211_ops *ops; 680 struct device *dev; 681 u8 mac_addr[ETH_ALEN]; 682 683 enum ath10k_hw_rev hw_rev; 684 u16 dev_id; 685 u32 chip_id; 686 u32 target_version; 687 u8 fw_version_major; 688 u32 fw_version_minor; 689 u16 fw_version_release; 690 u16 fw_version_build; 691 u32 fw_stats_req_mask; 692 u32 phy_capability; 693 u32 hw_min_tx_power; 694 u32 hw_max_tx_power; 695 u32 ht_cap_info; 696 u32 vht_cap_info; 697 u32 num_rf_chains; 698 u32 max_spatial_stream; 699 /* protected by conf_mutex */ 700 bool ani_enabled; 701 702 bool p2p; 703 704 struct { 705 enum ath10k_bus bus; 706 const struct ath10k_hif_ops *ops; 707 } hif; 708 709 struct completion target_suspend; 710 711 const struct ath10k_hw_regs *regs; 712 const struct ath10k_hw_values *hw_values; 713 struct ath10k_bmi bmi; 714 struct ath10k_wmi wmi; 715 struct ath10k_htc htc; 716 struct ath10k_htt htt; 717 718 struct ath10k_hw_params { 719 u32 id; 720 u16 dev_id; 721 const char *name; 722 u32 patch_load_addr; 723 int uart_pin; 724 u32 otp_exe_param; 725 726 /* Type of hw cycle counter wraparound logic, for more info 727 * refer enum ath10k_hw_cc_wraparound_type. 728 */ 729 enum ath10k_hw_cc_wraparound_type cc_wraparound_type; 730 731 /* Some of chip expects fragment descriptor to be continuous 732 * memory for any TX operation. Set continuous_frag_desc flag 733 * for the hardware which have such requirement. 734 */ 735 bool continuous_frag_desc; 736 737 /* CCK hardware rate table mapping for the newer chipsets 738 * like QCA99X0, QCA4019 got revised. The CCK h/w rate values 739 * are in a proper order with respect to the rate/preamble 740 */ 741 bool cck_rate_map_rev2; 742 743 u32 channel_counters_freq_hz; 744 745 /* Mgmt tx descriptors threshold for limiting probe response 746 * frames. 747 */ 748 u32 max_probe_resp_desc_thres; 749 750 /* The padding bytes's location is different on various chips */ 751 enum ath10k_hw_4addr_pad hw_4addr_pad; 752 753 u32 tx_chain_mask; 754 u32 rx_chain_mask; 755 u32 max_spatial_stream; 756 u32 cal_data_len; 757 758 struct ath10k_hw_params_fw { 759 const char *dir; 760 const char *board; 761 size_t board_size; 762 size_t board_ext_size; 763 } fw; 764 } hw_params; 765 766 /* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */ 767 struct ath10k_fw_components normal_mode_fw; 768 769 /* READ-ONLY images of the running firmware, which can be either 770 * normal or UTF. Do not modify, release etc! 771 */ 772 const struct ath10k_fw_components *running_fw; 773 774 const struct firmware *pre_cal_file; 775 const struct firmware *cal_file; 776 777 struct { 778 struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info; 779 } swap; 780 781 struct { 782 u32 vendor; 783 u32 device; 784 u32 subsystem_vendor; 785 u32 subsystem_device; 786 787 bool bmi_ids_valid; 788 u8 bmi_board_id; 789 u8 bmi_chip_id; 790 } id; 791 792 int fw_api; 793 int bd_api; 794 enum ath10k_cal_mode cal_mode; 795 796 struct { 797 struct completion started; 798 struct completion completed; 799 struct completion on_channel; 800 struct delayed_work timeout; 801 enum ath10k_scan_state state; 802 bool is_roc; 803 int vdev_id; 804 int roc_freq; 805 bool roc_notify; 806 } scan; 807 808 struct { 809 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS]; 810 } mac; 811 812 /* should never be NULL; needed for regular htt rx */ 813 struct ieee80211_channel *rx_channel; 814 815 /* valid during scan; needed for mgmt rx during scan */ 816 struct ieee80211_channel *scan_channel; 817 818 /* current operating channel definition */ 819 struct cfg80211_chan_def chandef; 820 821 /* currently configured operating channel in firmware */ 822 struct ieee80211_channel *tgt_oper_chan; 823 824 unsigned long long free_vdev_map; 825 struct ath10k_vif *monitor_arvif; 826 bool monitor; 827 int monitor_vdev_id; 828 bool monitor_started; 829 unsigned int filter_flags; 830 unsigned long dev_flags; 831 bool dfs_block_radar_events; 832 833 /* protected by conf_mutex */ 834 bool radar_enabled; 835 int num_started_vdevs; 836 837 /* Protected by conf-mutex */ 838 u8 cfg_tx_chainmask; 839 u8 cfg_rx_chainmask; 840 841 struct completion install_key_done; 842 843 struct completion vdev_setup_done; 844 845 struct workqueue_struct *workqueue; 846 /* Auxiliary workqueue */ 847 struct workqueue_struct *workqueue_aux; 848 849 /* prevents concurrent FW reconfiguration */ 850 struct mutex conf_mutex; 851 852 /* protects shared structure data */ 853 spinlock_t data_lock; 854 /* protects: ar->txqs, artxq->list */ 855 spinlock_t txqs_lock; 856 857 struct list_head txqs; 858 struct list_head arvifs; 859 struct list_head peers; 860 struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS]; 861 wait_queue_head_t peer_mapping_wq; 862 863 /* protected by conf_mutex */ 864 int num_peers; 865 int num_stations; 866 867 int max_num_peers; 868 int max_num_stations; 869 int max_num_vdevs; 870 int max_num_tdls_vdevs; 871 int num_active_peers; 872 int num_tids; 873 874 struct work_struct svc_rdy_work; 875 struct sk_buff *svc_rdy_skb; 876 877 struct work_struct offchan_tx_work; 878 struct sk_buff_head offchan_tx_queue; 879 struct completion offchan_tx_completed; 880 struct sk_buff *offchan_tx_skb; 881 882 struct work_struct wmi_mgmt_tx_work; 883 struct sk_buff_head wmi_mgmt_tx_queue; 884 885 enum ath10k_state state; 886 887 struct work_struct register_work; 888 struct work_struct restart_work; 889 890 /* cycle count is reported twice for each visited channel during scan. 891 * access protected by data_lock */ 892 u32 survey_last_rx_clear_count; 893 u32 survey_last_cycle_count; 894 struct survey_info survey[ATH10K_NUM_CHANS]; 895 896 /* Channel info events are expected to come in pairs without and with 897 * COMPLETE flag set respectively for each channel visit during scan. 898 * 899 * However there are deviations from this rule. This flag is used to 900 * avoid reporting garbage data. 901 */ 902 bool ch_info_can_report_survey; 903 struct completion bss_survey_done; 904 905 struct dfs_pattern_detector *dfs_detector; 906 907 unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */ 908 909 #ifdef CONFIG_ATH10K_DEBUGFS 910 struct ath10k_debug debug; 911 struct { 912 /* relay(fs) channel for spectral scan */ 913 struct rchan *rfs_chan_spec_scan; 914 915 /* spectral_mode and spec_config are protected by conf_mutex */ 916 enum ath10k_spectral_mode mode; 917 struct ath10k_spec_scan config; 918 } spectral; 919 #endif 920 921 struct { 922 /* protected by conf_mutex */ 923 struct ath10k_fw_components utf_mode_fw; 924 925 /* protected by data_lock */ 926 bool utf_monitor; 927 } testmode; 928 929 struct { 930 /* protected by data_lock */ 931 u32 fw_crash_counter; 932 u32 fw_warm_reset_counter; 933 u32 fw_cold_reset_counter; 934 } stats; 935 936 struct ath10k_thermal thermal; 937 struct ath10k_wow wow; 938 939 /* must be last */ 940 u8 drv_priv[0] __aligned(sizeof(void *)); 941 }; 942 943 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar) 944 { 945 if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) && 946 test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map)) 947 return true; 948 949 return false; 950 } 951 952 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 953 enum ath10k_bus bus, 954 enum ath10k_hw_rev hw_rev, 955 const struct ath10k_hif_ops *hif_ops); 956 void ath10k_core_destroy(struct ath10k *ar); 957 void ath10k_core_get_fw_features_str(struct ath10k *ar, 958 char *buf, 959 size_t max_len); 960 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 961 struct ath10k_fw_file *fw_file); 962 963 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 964 const struct ath10k_fw_components *fw_components); 965 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt); 966 void ath10k_core_stop(struct ath10k *ar); 967 int ath10k_core_register(struct ath10k *ar, u32 chip_id); 968 void ath10k_core_unregister(struct ath10k *ar); 969 970 #endif /* _CORE_H_ */ 971