xref: /linux/drivers/net/wireless/ath/ath10k/core.h (revision 95298d63c67673c654c08952672d016212b26054)
1 /* SPDX-License-Identifier: ISC */
2 /*
3  * Copyright (c) 2005-2011 Atheros Communications Inc.
4  * Copyright (c) 2011-2017 Qualcomm Atheros, Inc.
5  * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
6  */
7 
8 #ifndef _CORE_H_
9 #define _CORE_H_
10 
11 #include <linux/completion.h>
12 #include <linux/if_ether.h>
13 #include <linux/types.h>
14 #include <linux/pci.h>
15 #include <linux/uuid.h>
16 #include <linux/time.h>
17 
18 #include "htt.h"
19 #include "htc.h"
20 #include "hw.h"
21 #include "targaddrs.h"
22 #include "wmi.h"
23 #include "../ath.h"
24 #include "../regd.h"
25 #include "../dfs_pattern_detector.h"
26 #include "spectral.h"
27 #include "thermal.h"
28 #include "wow.h"
29 #include "swap.h"
30 
31 #define MS(_v, _f) (((_v) & _f##_MASK) >> _f##_LSB)
32 #define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
33 #define WO(_f)      ((_f##_OFFSET) >> 2)
34 
35 #define ATH10K_SCAN_ID 0
36 #define ATH10K_SCAN_CHANNEL_SWITCH_WMI_EVT_OVERHEAD 10 /* msec */
37 #define WMI_READY_TIMEOUT (5 * HZ)
38 #define ATH10K_FLUSH_TIMEOUT_HZ (5 * HZ)
39 #define ATH10K_CONNECTION_LOSS_HZ (3 * HZ)
40 #define ATH10K_NUM_CHANS 41
41 #define ATH10K_MAX_5G_CHAN 173
42 
43 /* Antenna noise floor */
44 #define ATH10K_DEFAULT_NOISE_FLOOR -95
45 
46 #define ATH10K_INVALID_RSSI 128
47 
48 #define ATH10K_MAX_NUM_MGMT_PENDING 128
49 
50 /* number of failed packets (20 packets with 16 sw reties each) */
51 #define ATH10K_KICKOUT_THRESHOLD (20 * 16)
52 
53 /*
54  * Use insanely high numbers to make sure that the firmware implementation
55  * won't start, we have the same functionality already in hostapd. Unit
56  * is seconds.
57  */
58 #define ATH10K_KEEPALIVE_MIN_IDLE 3747
59 #define ATH10K_KEEPALIVE_MAX_IDLE 3895
60 #define ATH10K_KEEPALIVE_MAX_UNRESPONSIVE 3900
61 
62 /* NAPI poll budget */
63 #define ATH10K_NAPI_BUDGET      64
64 
65 /* SMBIOS type containing Board Data File Name Extension */
66 #define ATH10K_SMBIOS_BDF_EXT_TYPE 0xF8
67 
68 /* SMBIOS type structure length (excluding strings-set) */
69 #define ATH10K_SMBIOS_BDF_EXT_LENGTH 0x9
70 
71 /* Offset pointing to Board Data File Name Extension */
72 #define ATH10K_SMBIOS_BDF_EXT_OFFSET 0x8
73 
74 /* Board Data File Name Extension string length.
75  * String format: BDF_<Customer ID>_<Extension>\0
76  */
77 #define ATH10K_SMBIOS_BDF_EXT_STR_LENGTH 0x20
78 
79 /* The magic used by QCA spec */
80 #define ATH10K_SMBIOS_BDF_EXT_MAGIC "BDF_"
81 
82 /* Default Airtime weight multipler (Tuned for multiclient performance) */
83 #define ATH10K_AIRTIME_WEIGHT_MULTIPLIER  4
84 
85 struct ath10k;
86 
87 static inline const char *ath10k_bus_str(enum ath10k_bus bus)
88 {
89 	switch (bus) {
90 	case ATH10K_BUS_PCI:
91 		return "pci";
92 	case ATH10K_BUS_AHB:
93 		return "ahb";
94 	case ATH10K_BUS_SDIO:
95 		return "sdio";
96 	case ATH10K_BUS_USB:
97 		return "usb";
98 	case ATH10K_BUS_SNOC:
99 		return "snoc";
100 	}
101 
102 	return "unknown";
103 }
104 
105 enum ath10k_skb_flags {
106 	ATH10K_SKB_F_NO_HWCRYPT = BIT(0),
107 	ATH10K_SKB_F_DTIM_ZERO = BIT(1),
108 	ATH10K_SKB_F_DELIVER_CAB = BIT(2),
109 	ATH10K_SKB_F_MGMT = BIT(3),
110 	ATH10K_SKB_F_QOS = BIT(4),
111 	ATH10K_SKB_F_RAW_TX = BIT(5),
112 };
113 
114 struct ath10k_skb_cb {
115 	dma_addr_t paddr;
116 	u8 flags;
117 	u8 eid;
118 	u16 msdu_id;
119 	u16 airtime_est;
120 	struct ieee80211_vif *vif;
121 	struct ieee80211_txq *txq;
122 	u32 ucast_cipher;
123 } __packed;
124 
125 struct ath10k_skb_rxcb {
126 	dma_addr_t paddr;
127 	struct hlist_node hlist;
128 	u8 eid;
129 };
130 
131 static inline struct ath10k_skb_cb *ATH10K_SKB_CB(struct sk_buff *skb)
132 {
133 	BUILD_BUG_ON(sizeof(struct ath10k_skb_cb) >
134 		     IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
135 	return (struct ath10k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
136 }
137 
138 static inline struct ath10k_skb_rxcb *ATH10K_SKB_RXCB(struct sk_buff *skb)
139 {
140 	BUILD_BUG_ON(sizeof(struct ath10k_skb_rxcb) > sizeof(skb->cb));
141 	return (struct ath10k_skb_rxcb *)skb->cb;
142 }
143 
144 #define ATH10K_RXCB_SKB(rxcb) \
145 		container_of((void *)rxcb, struct sk_buff, cb)
146 
147 static inline u32 host_interest_item_address(u32 item_offset)
148 {
149 	return QCA988X_HOST_INTEREST_ADDRESS + item_offset;
150 }
151 
152 enum ath10k_phy_mode {
153 	ATH10K_PHY_MODE_LEGACY = 0,
154 	ATH10K_PHY_MODE_HT = 1,
155 	ATH10K_PHY_MODE_VHT = 2,
156 };
157 
158 /* Data rate 100KBPS based on IE Index */
159 struct ath10k_index_ht_data_rate_type {
160 	u8   beacon_rate_index;
161 	u16  supported_rate[4];
162 };
163 
164 /* Data rate 100KBPS based on IE Index */
165 struct ath10k_index_vht_data_rate_type {
166 	u8   beacon_rate_index;
167 	u16  supported_VHT80_rate[2];
168 	u16  supported_VHT40_rate[2];
169 	u16  supported_VHT20_rate[2];
170 };
171 
172 struct ath10k_bmi {
173 	bool done_sent;
174 };
175 
176 struct ath10k_mem_chunk {
177 	void *vaddr;
178 	dma_addr_t paddr;
179 	u32 len;
180 	u32 req_id;
181 };
182 
183 struct ath10k_wmi {
184 	enum ath10k_htc_ep_id eid;
185 	struct completion service_ready;
186 	struct completion unified_ready;
187 	struct completion barrier;
188 	struct completion radar_confirm;
189 	wait_queue_head_t tx_credits_wq;
190 	DECLARE_BITMAP(svc_map, WMI_SERVICE_MAX);
191 	struct wmi_cmd_map *cmd;
192 	struct wmi_vdev_param_map *vdev_param;
193 	struct wmi_pdev_param_map *pdev_param;
194 	struct wmi_peer_param_map *peer_param;
195 	const struct wmi_ops *ops;
196 	const struct wmi_peer_flags_map *peer_flags;
197 
198 	u32 mgmt_max_num_pending_tx;
199 
200 	/* Protected by data_lock */
201 	struct idr mgmt_pending_tx;
202 
203 	u32 num_mem_chunks;
204 	u32 rx_decap_mode;
205 	struct ath10k_mem_chunk mem_chunks[WMI_MAX_MEM_REQS];
206 };
207 
208 struct ath10k_fw_stats_peer {
209 	struct list_head list;
210 
211 	u8 peer_macaddr[ETH_ALEN];
212 	u32 peer_rssi;
213 	u32 peer_tx_rate;
214 	u32 peer_rx_rate; /* 10x only */
215 	u64 rx_duration;
216 };
217 
218 struct ath10k_fw_extd_stats_peer {
219 	struct list_head list;
220 
221 	u8 peer_macaddr[ETH_ALEN];
222 	u64 rx_duration;
223 };
224 
225 struct ath10k_fw_stats_vdev {
226 	struct list_head list;
227 
228 	u32 vdev_id;
229 	u32 beacon_snr;
230 	u32 data_snr;
231 	u32 num_tx_frames[4];
232 	u32 num_rx_frames;
233 	u32 num_tx_frames_retries[4];
234 	u32 num_tx_frames_failures[4];
235 	u32 num_rts_fail;
236 	u32 num_rts_success;
237 	u32 num_rx_err;
238 	u32 num_rx_discard;
239 	u32 num_tx_not_acked;
240 	u32 tx_rate_history[10];
241 	u32 beacon_rssi_history[10];
242 };
243 
244 struct ath10k_fw_stats_vdev_extd {
245 	struct list_head list;
246 
247 	u32 vdev_id;
248 	u32 ppdu_aggr_cnt;
249 	u32 ppdu_noack;
250 	u32 mpdu_queued;
251 	u32 ppdu_nonaggr_cnt;
252 	u32 mpdu_sw_requeued;
253 	u32 mpdu_suc_retry;
254 	u32 mpdu_suc_multitry;
255 	u32 mpdu_fail_retry;
256 	u32 tx_ftm_suc;
257 	u32 tx_ftm_suc_retry;
258 	u32 tx_ftm_fail;
259 	u32 rx_ftmr_cnt;
260 	u32 rx_ftmr_dup_cnt;
261 	u32 rx_iftmr_cnt;
262 	u32 rx_iftmr_dup_cnt;
263 };
264 
265 struct ath10k_fw_stats_pdev {
266 	struct list_head list;
267 
268 	/* PDEV stats */
269 	s32 ch_noise_floor;
270 	u32 tx_frame_count; /* Cycles spent transmitting frames */
271 	u32 rx_frame_count; /* Cycles spent receiving frames */
272 	u32 rx_clear_count; /* Total channel busy time, evidently */
273 	u32 cycle_count; /* Total on-channel time */
274 	u32 phy_err_count;
275 	u32 chan_tx_power;
276 	u32 ack_rx_bad;
277 	u32 rts_bad;
278 	u32 rts_good;
279 	u32 fcs_bad;
280 	u32 no_beacons;
281 	u32 mib_int_count;
282 
283 	/* PDEV TX stats */
284 	s32 comp_queued;
285 	s32 comp_delivered;
286 	s32 msdu_enqued;
287 	s32 mpdu_enqued;
288 	s32 wmm_drop;
289 	s32 local_enqued;
290 	s32 local_freed;
291 	s32 hw_queued;
292 	s32 hw_reaped;
293 	s32 underrun;
294 	u32 hw_paused;
295 	s32 tx_abort;
296 	s32 mpdus_requed;
297 	u32 tx_ko;
298 	u32 data_rc;
299 	u32 self_triggers;
300 	u32 sw_retry_failure;
301 	u32 illgl_rate_phy_err;
302 	u32 pdev_cont_xretry;
303 	u32 pdev_tx_timeout;
304 	u32 pdev_resets;
305 	u32 phy_underrun;
306 	u32 txop_ovf;
307 	u32 seq_posted;
308 	u32 seq_failed_queueing;
309 	u32 seq_completed;
310 	u32 seq_restarted;
311 	u32 mu_seq_posted;
312 	u32 mpdus_sw_flush;
313 	u32 mpdus_hw_filter;
314 	u32 mpdus_truncated;
315 	u32 mpdus_ack_failed;
316 	u32 mpdus_expired;
317 
318 	/* PDEV RX stats */
319 	s32 mid_ppdu_route_change;
320 	s32 status_rcvd;
321 	s32 r0_frags;
322 	s32 r1_frags;
323 	s32 r2_frags;
324 	s32 r3_frags;
325 	s32 htt_msdus;
326 	s32 htt_mpdus;
327 	s32 loc_msdus;
328 	s32 loc_mpdus;
329 	s32 oversize_amsdu;
330 	s32 phy_errs;
331 	s32 phy_err_drop;
332 	s32 mpdu_errs;
333 	s32 rx_ovfl_errs;
334 };
335 
336 struct ath10k_fw_stats {
337 	bool extended;
338 	struct list_head pdevs;
339 	struct list_head vdevs;
340 	struct list_head peers;
341 	struct list_head peers_extd;
342 };
343 
344 #define ATH10K_TPC_TABLE_TYPE_FLAG	1
345 #define ATH10K_TPC_PREAM_TABLE_END	0xFFFF
346 
347 struct ath10k_tpc_table {
348 	u32 pream_idx[WMI_TPC_RATE_MAX];
349 	u8 rate_code[WMI_TPC_RATE_MAX];
350 	char tpc_value[WMI_TPC_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
351 };
352 
353 struct ath10k_tpc_stats {
354 	u32 reg_domain;
355 	u32 chan_freq;
356 	u32 phy_mode;
357 	u32 twice_antenna_reduction;
358 	u32 twice_max_rd_power;
359 	s32 twice_antenna_gain;
360 	u32 power_limit;
361 	u32 num_tx_chain;
362 	u32 ctl;
363 	u32 rate_max;
364 	u8 flag[WMI_TPC_FLAG];
365 	struct ath10k_tpc_table tpc_table[WMI_TPC_FLAG];
366 };
367 
368 struct ath10k_tpc_table_final {
369 	u32 pream_idx[WMI_TPC_FINAL_RATE_MAX];
370 	u8 rate_code[WMI_TPC_FINAL_RATE_MAX];
371 	char tpc_value[WMI_TPC_FINAL_RATE_MAX][WMI_TPC_TX_N_CHAIN * WMI_TPC_BUF_SIZE];
372 };
373 
374 struct ath10k_tpc_stats_final {
375 	u32 reg_domain;
376 	u32 chan_freq;
377 	u32 phy_mode;
378 	u32 twice_antenna_reduction;
379 	u32 twice_max_rd_power;
380 	s32 twice_antenna_gain;
381 	u32 power_limit;
382 	u32 num_tx_chain;
383 	u32 ctl;
384 	u32 rate_max;
385 	u8 flag[WMI_TPC_FLAG];
386 	struct ath10k_tpc_table_final tpc_table_final[WMI_TPC_FLAG];
387 };
388 
389 struct ath10k_dfs_stats {
390 	u32 phy_errors;
391 	u32 pulses_total;
392 	u32 pulses_detected;
393 	u32 pulses_discarded;
394 	u32 radar_detected;
395 };
396 
397 enum ath10k_radar_confirmation_state {
398 	ATH10K_RADAR_CONFIRMATION_IDLE = 0,
399 	ATH10K_RADAR_CONFIRMATION_INPROGRESS,
400 	ATH10K_RADAR_CONFIRMATION_STOPPED,
401 };
402 
403 struct ath10k_radar_found_info {
404 	u32 pri_min;
405 	u32 pri_max;
406 	u32 width_min;
407 	u32 width_max;
408 	u32 sidx_min;
409 	u32 sidx_max;
410 };
411 
412 #define ATH10K_MAX_NUM_PEER_IDS (1 << 11) /* htt rx_desc limit */
413 
414 struct ath10k_peer {
415 	struct list_head list;
416 	struct ieee80211_vif *vif;
417 	struct ieee80211_sta *sta;
418 
419 	bool removed;
420 	int vdev_id;
421 	u8 addr[ETH_ALEN];
422 	DECLARE_BITMAP(peer_ids, ATH10K_MAX_NUM_PEER_IDS);
423 
424 	/* protected by ar->data_lock */
425 	struct ieee80211_key_conf *keys[WMI_MAX_KEY_INDEX + 1];
426 	union htt_rx_pn_t tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
427 	bool tids_last_pn_valid[ATH10K_TXRX_NUM_EXT_TIDS];
428 	union htt_rx_pn_t frag_tids_last_pn[ATH10K_TXRX_NUM_EXT_TIDS];
429 	u32 frag_tids_seq[ATH10K_TXRX_NUM_EXT_TIDS];
430 	struct {
431 		enum htt_security_types sec_type;
432 		int pn_len;
433 	} rx_pn[ATH10K_HTT_TXRX_PEER_SECURITY_MAX];
434 };
435 
436 struct ath10k_txq {
437 	struct list_head list;
438 	unsigned long num_fw_queued;
439 	unsigned long num_push_allowed;
440 };
441 
442 enum ath10k_pkt_rx_err {
443 	ATH10K_PKT_RX_ERR_FCS,
444 	ATH10K_PKT_RX_ERR_TKIP,
445 	ATH10K_PKT_RX_ERR_CRYPT,
446 	ATH10K_PKT_RX_ERR_PEER_IDX_INVAL,
447 	ATH10K_PKT_RX_ERR_MAX,
448 };
449 
450 enum ath10k_ampdu_subfrm_num {
451 	ATH10K_AMPDU_SUBFRM_NUM_10,
452 	ATH10K_AMPDU_SUBFRM_NUM_20,
453 	ATH10K_AMPDU_SUBFRM_NUM_30,
454 	ATH10K_AMPDU_SUBFRM_NUM_40,
455 	ATH10K_AMPDU_SUBFRM_NUM_50,
456 	ATH10K_AMPDU_SUBFRM_NUM_60,
457 	ATH10K_AMPDU_SUBFRM_NUM_MORE,
458 	ATH10K_AMPDU_SUBFRM_NUM_MAX,
459 };
460 
461 enum ath10k_amsdu_subfrm_num {
462 	ATH10K_AMSDU_SUBFRM_NUM_1,
463 	ATH10K_AMSDU_SUBFRM_NUM_2,
464 	ATH10K_AMSDU_SUBFRM_NUM_3,
465 	ATH10K_AMSDU_SUBFRM_NUM_4,
466 	ATH10K_AMSDU_SUBFRM_NUM_MORE,
467 	ATH10K_AMSDU_SUBFRM_NUM_MAX,
468 };
469 
470 struct ath10k_sta_tid_stats {
471 	unsigned long rx_pkt_from_fw;
472 	unsigned long rx_pkt_unchained;
473 	unsigned long rx_pkt_drop_chained;
474 	unsigned long rx_pkt_drop_filter;
475 	unsigned long rx_pkt_err[ATH10K_PKT_RX_ERR_MAX];
476 	unsigned long rx_pkt_queued_for_mac;
477 	unsigned long rx_pkt_ampdu[ATH10K_AMPDU_SUBFRM_NUM_MAX];
478 	unsigned long rx_pkt_amsdu[ATH10K_AMSDU_SUBFRM_NUM_MAX];
479 };
480 
481 enum ath10k_counter_type {
482 	ATH10K_COUNTER_TYPE_BYTES,
483 	ATH10K_COUNTER_TYPE_PKTS,
484 	ATH10K_COUNTER_TYPE_MAX,
485 };
486 
487 enum ath10k_stats_type {
488 	ATH10K_STATS_TYPE_SUCC,
489 	ATH10K_STATS_TYPE_FAIL,
490 	ATH10K_STATS_TYPE_RETRY,
491 	ATH10K_STATS_TYPE_AMPDU,
492 	ATH10K_STATS_TYPE_MAX,
493 };
494 
495 struct ath10k_htt_data_stats {
496 	u64 legacy[ATH10K_COUNTER_TYPE_MAX][ATH10K_LEGACY_NUM];
497 	u64 ht[ATH10K_COUNTER_TYPE_MAX][ATH10K_HT_MCS_NUM];
498 	u64 vht[ATH10K_COUNTER_TYPE_MAX][ATH10K_VHT_MCS_NUM];
499 	u64 bw[ATH10K_COUNTER_TYPE_MAX][ATH10K_BW_NUM];
500 	u64 nss[ATH10K_COUNTER_TYPE_MAX][ATH10K_NSS_NUM];
501 	u64 gi[ATH10K_COUNTER_TYPE_MAX][ATH10K_GI_NUM];
502 	u64 rate_table[ATH10K_COUNTER_TYPE_MAX][ATH10K_RATE_TABLE_NUM];
503 };
504 
505 struct ath10k_htt_tx_stats {
506 	struct ath10k_htt_data_stats stats[ATH10K_STATS_TYPE_MAX];
507 	u64 tx_duration;
508 	u64 ba_fails;
509 	u64 ack_fails;
510 };
511 
512 struct ath10k_sta {
513 	struct ath10k_vif *arvif;
514 
515 	/* the following are protected by ar->data_lock */
516 	u32 changed; /* IEEE80211_RC_* */
517 	u32 bw;
518 	u32 nss;
519 	u32 smps;
520 	u16 peer_id;
521 	struct rate_info txrate;
522 	struct ieee80211_tx_info tx_info;
523 	u32 tx_retries;
524 	u32 tx_failed;
525 	u32 last_tx_bitrate;
526 
527 	u32 rx_rate_code;
528 	u32 rx_bitrate_kbps;
529 	u32 tx_rate_code;
530 	u32 tx_bitrate_kbps;
531 	struct work_struct update_wk;
532 	u64 rx_duration;
533 	struct ath10k_htt_tx_stats *tx_stats;
534 	u32 ucast_cipher;
535 
536 #ifdef CONFIG_MAC80211_DEBUGFS
537 	/* protected by conf_mutex */
538 	bool aggr_mode;
539 
540 	/* Protected with ar->data_lock */
541 	struct ath10k_sta_tid_stats tid_stats[IEEE80211_NUM_TIDS + 1];
542 #endif
543 	/* Protected with ar->data_lock */
544 	u32 peer_ps_state;
545 };
546 
547 #define ATH10K_VDEV_SETUP_TIMEOUT_HZ	(5 * HZ)
548 #define ATH10K_VDEV_DELETE_TIMEOUT_HZ	(5 * HZ)
549 
550 enum ath10k_beacon_state {
551 	ATH10K_BEACON_SCHEDULED = 0,
552 	ATH10K_BEACON_SENDING,
553 	ATH10K_BEACON_SENT,
554 };
555 
556 struct ath10k_vif {
557 	struct list_head list;
558 
559 	u32 vdev_id;
560 	u16 peer_id;
561 	enum wmi_vdev_type vdev_type;
562 	enum wmi_vdev_subtype vdev_subtype;
563 	u32 beacon_interval;
564 	u32 dtim_period;
565 	struct sk_buff *beacon;
566 	/* protected by data_lock */
567 	enum ath10k_beacon_state beacon_state;
568 	void *beacon_buf;
569 	dma_addr_t beacon_paddr;
570 	unsigned long tx_paused; /* arbitrary values defined by target */
571 
572 	struct ath10k *ar;
573 	struct ieee80211_vif *vif;
574 
575 	bool is_started;
576 	bool is_up;
577 	bool spectral_enabled;
578 	bool ps;
579 	u32 aid;
580 	u8 bssid[ETH_ALEN];
581 
582 	struct ieee80211_key_conf *wep_keys[WMI_MAX_KEY_INDEX + 1];
583 	s8 def_wep_key_idx;
584 
585 	u16 tx_seq_no;
586 
587 	union {
588 		struct {
589 			u32 uapsd;
590 		} sta;
591 		struct {
592 			/* 512 stations */
593 			u8 tim_bitmap[64];
594 			u8 tim_len;
595 			u32 ssid_len;
596 			u8 ssid[IEEE80211_MAX_SSID_LEN];
597 			bool hidden_ssid;
598 			/* P2P_IE with NoA attribute for P2P_GO case */
599 			u32 noa_len;
600 			u8 *noa_data;
601 		} ap;
602 	} u;
603 
604 	bool use_cts_prot;
605 	bool nohwcrypt;
606 	int num_legacy_stations;
607 	int txpower;
608 	bool ftm_responder;
609 	struct wmi_wmm_params_all_arg wmm_params;
610 	struct work_struct ap_csa_work;
611 	struct delayed_work connection_loss_work;
612 	struct cfg80211_bitrate_mask bitrate_mask;
613 
614 	/* For setting VHT peer fixed rate, protected by conf_mutex */
615 	int vht_num_rates;
616 	u8 vht_pfr;
617 };
618 
619 struct ath10k_vif_iter {
620 	u32 vdev_id;
621 	struct ath10k_vif *arvif;
622 };
623 
624 /* Copy Engine register dump, protected by ce-lock */
625 struct ath10k_ce_crash_data {
626 	__le32 base_addr;
627 	__le32 src_wr_idx;
628 	__le32 src_r_idx;
629 	__le32 dst_wr_idx;
630 	__le32 dst_r_idx;
631 };
632 
633 struct ath10k_ce_crash_hdr {
634 	__le32 ce_count;
635 	__le32 reserved[3]; /* for future use */
636 	struct ath10k_ce_crash_data entries[];
637 };
638 
639 #define MAX_MEM_DUMP_TYPE	5
640 
641 /* used for crash-dump storage, protected by data-lock */
642 struct ath10k_fw_crash_data {
643 	guid_t guid;
644 	struct timespec64 timestamp;
645 	__le32 registers[REG_DUMP_COUNT_QCA988X];
646 	struct ath10k_ce_crash_data ce_crash_data[CE_COUNT_MAX];
647 
648 	u8 *ramdump_buf;
649 	size_t ramdump_buf_len;
650 };
651 
652 struct ath10k_debug {
653 	struct dentry *debugfs_phy;
654 
655 	struct ath10k_fw_stats fw_stats;
656 	struct completion fw_stats_complete;
657 	bool fw_stats_done;
658 
659 	unsigned long htt_stats_mask;
660 	unsigned long reset_htt_stats;
661 	struct delayed_work htt_stats_dwork;
662 	struct ath10k_dfs_stats dfs_stats;
663 	struct ath_dfs_pool_stats dfs_pool_stats;
664 
665 	/* used for tpc-dump storage, protected by data-lock */
666 	struct ath10k_tpc_stats *tpc_stats;
667 	struct ath10k_tpc_stats_final *tpc_stats_final;
668 
669 	struct completion tpc_complete;
670 
671 	/* protected by conf_mutex */
672 	u64 fw_dbglog_mask;
673 	u32 fw_dbglog_level;
674 	u32 reg_addr;
675 	u32 nf_cal_period;
676 	void *cal_data;
677 	u32 enable_extd_tx_stats;
678 	u8 fw_dbglog_mode;
679 };
680 
681 enum ath10k_state {
682 	ATH10K_STATE_OFF = 0,
683 	ATH10K_STATE_ON,
684 
685 	/* When doing firmware recovery the device is first powered down.
686 	 * mac80211 is supposed to call in to start() hook later on. It is
687 	 * however possible that driver unloading and firmware crash overlap.
688 	 * mac80211 can wait on conf_mutex in stop() while the device is
689 	 * stopped in ath10k_core_restart() work holding conf_mutex. The state
690 	 * RESTARTED means that the device is up and mac80211 has started hw
691 	 * reconfiguration. Once mac80211 is done with the reconfiguration we
692 	 * set the state to STATE_ON in reconfig_complete().
693 	 */
694 	ATH10K_STATE_RESTARTING,
695 	ATH10K_STATE_RESTARTED,
696 
697 	/* The device has crashed while restarting hw. This state is like ON
698 	 * but commands are blocked in HTC and -ECOMM response is given. This
699 	 * prevents completion timeouts and makes the driver more responsive to
700 	 * userspace commands. This is also prevents recursive recovery.
701 	 */
702 	ATH10K_STATE_WEDGED,
703 
704 	/* factory tests */
705 	ATH10K_STATE_UTF,
706 };
707 
708 enum ath10k_firmware_mode {
709 	/* the default mode, standard 802.11 functionality */
710 	ATH10K_FIRMWARE_MODE_NORMAL,
711 
712 	/* factory tests etc */
713 	ATH10K_FIRMWARE_MODE_UTF,
714 };
715 
716 enum ath10k_fw_features {
717 	/* wmi_mgmt_rx_hdr contains extra RSSI information */
718 	ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX = 0,
719 
720 	/* Firmware from 10X branch. Deprecated, don't use in new code. */
721 	ATH10K_FW_FEATURE_WMI_10X = 1,
722 
723 	/* firmware support tx frame management over WMI, otherwise it's HTT */
724 	ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX = 2,
725 
726 	/* Firmware does not support P2P */
727 	ATH10K_FW_FEATURE_NO_P2P = 3,
728 
729 	/* Firmware 10.2 feature bit. The ATH10K_FW_FEATURE_WMI_10X feature
730 	 * bit is required to be set as well. Deprecated, don't use in new
731 	 * code.
732 	 */
733 	ATH10K_FW_FEATURE_WMI_10_2 = 4,
734 
735 	/* Some firmware revisions lack proper multi-interface client powersave
736 	 * implementation. Enabling PS could result in connection drops,
737 	 * traffic stalls, etc.
738 	 */
739 	ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT = 5,
740 
741 	/* Some firmware revisions have an incomplete WoWLAN implementation
742 	 * despite WMI service bit being advertised. This feature flag is used
743 	 * to distinguish whether WoWLAN is really supported or not.
744 	 */
745 	ATH10K_FW_FEATURE_WOWLAN_SUPPORT = 6,
746 
747 	/* Don't trust error code from otp.bin */
748 	ATH10K_FW_FEATURE_IGNORE_OTP_RESULT = 7,
749 
750 	/* Some firmware revisions pad 4th hw address to 4 byte boundary making
751 	 * it 8 bytes long in Native Wifi Rx decap.
752 	 */
753 	ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING = 8,
754 
755 	/* Firmware supports bypassing PLL setting on init. */
756 	ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT = 9,
757 
758 	/* Raw mode support. If supported, FW supports receiving and trasmitting
759 	 * frames in raw mode.
760 	 */
761 	ATH10K_FW_FEATURE_RAW_MODE_SUPPORT = 10,
762 
763 	/* Firmware Supports Adaptive CCA*/
764 	ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA = 11,
765 
766 	/* Firmware supports management frame protection */
767 	ATH10K_FW_FEATURE_MFP_SUPPORT = 12,
768 
769 	/* Firmware supports pull-push model where host shares it's software
770 	 * queue state with firmware and firmware generates fetch requests
771 	 * telling host which queues to dequeue tx from.
772 	 *
773 	 * Primary function of this is improved MU-MIMO performance with
774 	 * multiple clients.
775 	 */
776 	ATH10K_FW_FEATURE_PEER_FLOW_CONTROL = 13,
777 
778 	/* Firmware supports BT-Coex without reloading firmware via pdev param.
779 	 * To support Bluetooth coexistence pdev param, WMI_COEX_GPIO_SUPPORT of
780 	 * extended resource config should be enabled always. This firmware IE
781 	 * is used to configure WMI_COEX_GPIO_SUPPORT.
782 	 */
783 	ATH10K_FW_FEATURE_BTCOEX_PARAM = 14,
784 
785 	/* Unused flag and proven to be not working, enable this if you want
786 	 * to experiment sending NULL func data frames in HTT TX
787 	 */
788 	ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR = 15,
789 
790 	/* Firmware allow other BSS mesh broadcast/multicast frames without
791 	 * creating monitor interface. Appropriate rxfilters are programmed for
792 	 * mesh vdev by firmware itself. This feature flags will be used for
793 	 * not creating monitor vdev while configuring mesh node.
794 	 */
795 	ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST = 16,
796 
797 	/* Firmware does not support power save in station mode. */
798 	ATH10K_FW_FEATURE_NO_PS = 17,
799 
800 	/* Firmware allows management tx by reference instead of by value. */
801 	ATH10K_FW_FEATURE_MGMT_TX_BY_REF = 18,
802 
803 	/* Firmware load is done externally, not by bmi */
804 	ATH10K_FW_FEATURE_NON_BMI = 19,
805 
806 	/* Firmware sends only one chan_info event per channel */
807 	ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL = 20,
808 
809 	/* Firmware allows setting peer fixed rate */
810 	ATH10K_FW_FEATURE_PEER_FIXED_RATE = 21,
811 
812 	/* keep last */
813 	ATH10K_FW_FEATURE_COUNT,
814 };
815 
816 enum ath10k_dev_flags {
817 	/* Indicates that ath10k device is during CAC phase of DFS */
818 	ATH10K_CAC_RUNNING,
819 	ATH10K_FLAG_CORE_REGISTERED,
820 
821 	/* Device has crashed and needs to restart. This indicates any pending
822 	 * waiters should immediately cancel instead of waiting for a time out.
823 	 */
824 	ATH10K_FLAG_CRASH_FLUSH,
825 
826 	/* Use Raw mode instead of native WiFi Tx/Rx encap mode.
827 	 * Raw mode supports both hardware and software crypto. Native WiFi only
828 	 * supports hardware crypto.
829 	 */
830 	ATH10K_FLAG_RAW_MODE,
831 
832 	/* Disable HW crypto engine */
833 	ATH10K_FLAG_HW_CRYPTO_DISABLED,
834 
835 	/* Bluetooth coexistance enabled */
836 	ATH10K_FLAG_BTCOEX,
837 
838 	/* Per Station statistics service */
839 	ATH10K_FLAG_PEER_STATS,
840 };
841 
842 enum ath10k_cal_mode {
843 	ATH10K_CAL_MODE_FILE,
844 	ATH10K_CAL_MODE_OTP,
845 	ATH10K_CAL_MODE_DT,
846 	ATH10K_PRE_CAL_MODE_FILE,
847 	ATH10K_PRE_CAL_MODE_DT,
848 	ATH10K_CAL_MODE_EEPROM,
849 };
850 
851 enum ath10k_crypt_mode {
852 	/* Only use hardware crypto engine */
853 	ATH10K_CRYPT_MODE_HW,
854 	/* Only use software crypto engine */
855 	ATH10K_CRYPT_MODE_SW,
856 };
857 
858 static inline const char *ath10k_cal_mode_str(enum ath10k_cal_mode mode)
859 {
860 	switch (mode) {
861 	case ATH10K_CAL_MODE_FILE:
862 		return "file";
863 	case ATH10K_CAL_MODE_OTP:
864 		return "otp";
865 	case ATH10K_CAL_MODE_DT:
866 		return "dt";
867 	case ATH10K_PRE_CAL_MODE_FILE:
868 		return "pre-cal-file";
869 	case ATH10K_PRE_CAL_MODE_DT:
870 		return "pre-cal-dt";
871 	case ATH10K_CAL_MODE_EEPROM:
872 		return "eeprom";
873 	}
874 
875 	return "unknown";
876 }
877 
878 enum ath10k_scan_state {
879 	ATH10K_SCAN_IDLE,
880 	ATH10K_SCAN_STARTING,
881 	ATH10K_SCAN_RUNNING,
882 	ATH10K_SCAN_ABORTING,
883 };
884 
885 static inline const char *ath10k_scan_state_str(enum ath10k_scan_state state)
886 {
887 	switch (state) {
888 	case ATH10K_SCAN_IDLE:
889 		return "idle";
890 	case ATH10K_SCAN_STARTING:
891 		return "starting";
892 	case ATH10K_SCAN_RUNNING:
893 		return "running";
894 	case ATH10K_SCAN_ABORTING:
895 		return "aborting";
896 	}
897 
898 	return "unknown";
899 }
900 
901 enum ath10k_tx_pause_reason {
902 	ATH10K_TX_PAUSE_Q_FULL,
903 	ATH10K_TX_PAUSE_MAX,
904 };
905 
906 struct ath10k_fw_file {
907 	const struct firmware *firmware;
908 
909 	char fw_version[ETHTOOL_FWVERS_LEN];
910 
911 	DECLARE_BITMAP(fw_features, ATH10K_FW_FEATURE_COUNT);
912 
913 	enum ath10k_fw_wmi_op_version wmi_op_version;
914 	enum ath10k_fw_htt_op_version htt_op_version;
915 
916 	const void *firmware_data;
917 	size_t firmware_len;
918 
919 	const void *otp_data;
920 	size_t otp_len;
921 
922 	const void *codeswap_data;
923 	size_t codeswap_len;
924 
925 	/* The original idea of struct ath10k_fw_file was that it only
926 	 * contains struct firmware and pointers to various parts (actual
927 	 * firmware binary, otp, metadata etc) of the file. This seg_info
928 	 * is actually created separate but as this is used similarly as
929 	 * the other firmware components it's more convenient to have it
930 	 * here.
931 	 */
932 	struct ath10k_swap_code_seg_info *firmware_swap_code_seg_info;
933 };
934 
935 struct ath10k_fw_components {
936 	const struct firmware *board;
937 	const void *board_data;
938 	size_t board_len;
939 	const struct firmware *ext_board;
940 	const void *ext_board_data;
941 	size_t ext_board_len;
942 
943 	struct ath10k_fw_file fw_file;
944 };
945 
946 struct ath10k_per_peer_tx_stats {
947 	u32	succ_bytes;
948 	u32	retry_bytes;
949 	u32	failed_bytes;
950 	u8	ratecode;
951 	u8	flags;
952 	u16	peer_id;
953 	u16	succ_pkts;
954 	u16	retry_pkts;
955 	u16	failed_pkts;
956 	u16	duration;
957 	u32	reserved1;
958 	u32	reserved2;
959 };
960 
961 enum ath10k_dev_type {
962 	ATH10K_DEV_TYPE_LL,
963 	ATH10K_DEV_TYPE_HL,
964 };
965 
966 struct ath10k_bus_params {
967 	u32 chip_id;
968 	enum ath10k_dev_type dev_type;
969 	bool link_can_suspend;
970 	bool hl_msdu_ids;
971 };
972 
973 struct ath10k {
974 	struct ath_common ath_common;
975 	struct ieee80211_hw *hw;
976 	struct ieee80211_ops *ops;
977 	struct device *dev;
978 	struct msa_region {
979 		dma_addr_t paddr;
980 		u32 mem_size;
981 		void *vaddr;
982 	} msa;
983 	u8 mac_addr[ETH_ALEN];
984 
985 	enum ath10k_hw_rev hw_rev;
986 	u16 dev_id;
987 	u32 chip_id;
988 	enum ath10k_dev_type dev_type;
989 	u32 target_version;
990 	u8 fw_version_major;
991 	u32 fw_version_minor;
992 	u16 fw_version_release;
993 	u16 fw_version_build;
994 	u32 fw_stats_req_mask;
995 	u32 phy_capability;
996 	u32 hw_min_tx_power;
997 	u32 hw_max_tx_power;
998 	u32 hw_eeprom_rd;
999 	u32 ht_cap_info;
1000 	u32 vht_cap_info;
1001 	u32 vht_supp_mcs;
1002 	u32 num_rf_chains;
1003 	u32 max_spatial_stream;
1004 	/* protected by conf_mutex */
1005 	u32 low_2ghz_chan;
1006 	u32 high_2ghz_chan;
1007 	u32 low_5ghz_chan;
1008 	u32 high_5ghz_chan;
1009 	bool ani_enabled;
1010 	u32 sys_cap_info;
1011 
1012 	/* protected by data_lock */
1013 	bool hw_rfkill_on;
1014 
1015 	/* protected by conf_mutex */
1016 	u8 ps_state_enable;
1017 
1018 	bool nlo_enabled;
1019 	bool p2p;
1020 
1021 	struct {
1022 		enum ath10k_bus bus;
1023 		const struct ath10k_hif_ops *ops;
1024 	} hif;
1025 
1026 	struct completion target_suspend;
1027 	struct completion driver_recovery;
1028 
1029 	const struct ath10k_hw_regs *regs;
1030 	const struct ath10k_hw_ce_regs *hw_ce_regs;
1031 	const struct ath10k_hw_values *hw_values;
1032 	struct ath10k_bmi bmi;
1033 	struct ath10k_wmi wmi;
1034 	struct ath10k_htc htc;
1035 	struct ath10k_htt htt;
1036 
1037 	struct ath10k_hw_params hw_params;
1038 
1039 	/* contains the firmware images used with ATH10K_FIRMWARE_MODE_NORMAL */
1040 	struct ath10k_fw_components normal_mode_fw;
1041 
1042 	/* READ-ONLY images of the running firmware, which can be either
1043 	 * normal or UTF. Do not modify, release etc!
1044 	 */
1045 	const struct ath10k_fw_components *running_fw;
1046 
1047 	const struct firmware *pre_cal_file;
1048 	const struct firmware *cal_file;
1049 
1050 	struct {
1051 		u32 vendor;
1052 		u32 device;
1053 		u32 subsystem_vendor;
1054 		u32 subsystem_device;
1055 
1056 		bool bmi_ids_valid;
1057 		bool qmi_ids_valid;
1058 		u32 qmi_board_id;
1059 		u8 bmi_board_id;
1060 		u8 bmi_eboard_id;
1061 		u8 bmi_chip_id;
1062 		bool ext_bid_supported;
1063 
1064 		char bdf_ext[ATH10K_SMBIOS_BDF_EXT_STR_LENGTH];
1065 	} id;
1066 
1067 	int fw_api;
1068 	int bd_api;
1069 	enum ath10k_cal_mode cal_mode;
1070 
1071 	struct {
1072 		struct completion started;
1073 		struct completion completed;
1074 		struct completion on_channel;
1075 		struct delayed_work timeout;
1076 		enum ath10k_scan_state state;
1077 		bool is_roc;
1078 		int vdev_id;
1079 		int roc_freq;
1080 		bool roc_notify;
1081 	} scan;
1082 
1083 	struct {
1084 		struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
1085 	} mac;
1086 
1087 	/* should never be NULL; needed for regular htt rx */
1088 	struct ieee80211_channel *rx_channel;
1089 
1090 	/* valid during scan; needed for mgmt rx during scan */
1091 	struct ieee80211_channel *scan_channel;
1092 
1093 	/* current operating channel definition */
1094 	struct cfg80211_chan_def chandef;
1095 
1096 	/* currently configured operating channel in firmware */
1097 	struct ieee80211_channel *tgt_oper_chan;
1098 
1099 	unsigned long long free_vdev_map;
1100 	struct ath10k_vif *monitor_arvif;
1101 	bool monitor;
1102 	int monitor_vdev_id;
1103 	bool monitor_started;
1104 	unsigned int filter_flags;
1105 	unsigned long dev_flags;
1106 	bool dfs_block_radar_events;
1107 
1108 	/* protected by conf_mutex */
1109 	bool radar_enabled;
1110 	int num_started_vdevs;
1111 
1112 	/* Protected by conf-mutex */
1113 	u8 cfg_tx_chainmask;
1114 	u8 cfg_rx_chainmask;
1115 
1116 	struct completion install_key_done;
1117 
1118 	int last_wmi_vdev_start_status;
1119 	struct completion vdev_setup_done;
1120 	struct completion vdev_delete_done;
1121 	struct completion peer_stats_info_complete;
1122 
1123 	struct workqueue_struct *workqueue;
1124 	/* Auxiliary workqueue */
1125 	struct workqueue_struct *workqueue_aux;
1126 	struct workqueue_struct *workqueue_tx_complete;
1127 	/* prevents concurrent FW reconfiguration */
1128 	struct mutex conf_mutex;
1129 
1130 	/* protects coredump data */
1131 	struct mutex dump_mutex;
1132 
1133 	/* protects shared structure data */
1134 	spinlock_t data_lock;
1135 
1136 	struct list_head arvifs;
1137 	struct list_head peers;
1138 	struct ath10k_peer *peer_map[ATH10K_MAX_NUM_PEER_IDS];
1139 	wait_queue_head_t peer_mapping_wq;
1140 
1141 	/* protected by conf_mutex */
1142 	int num_peers;
1143 	int num_stations;
1144 
1145 	int max_num_peers;
1146 	int max_num_stations;
1147 	int max_num_vdevs;
1148 	int max_num_tdls_vdevs;
1149 	int num_active_peers;
1150 	int num_tids;
1151 
1152 	struct work_struct svc_rdy_work;
1153 	struct sk_buff *svc_rdy_skb;
1154 
1155 	struct work_struct offchan_tx_work;
1156 	struct sk_buff_head offchan_tx_queue;
1157 	struct completion offchan_tx_completed;
1158 	struct sk_buff *offchan_tx_skb;
1159 
1160 	struct work_struct wmi_mgmt_tx_work;
1161 	struct sk_buff_head wmi_mgmt_tx_queue;
1162 
1163 	enum ath10k_state state;
1164 
1165 	struct work_struct register_work;
1166 	struct work_struct restart_work;
1167 	struct work_struct bundle_tx_work;
1168 	struct work_struct tx_complete_work;
1169 
1170 	/* cycle count is reported twice for each visited channel during scan.
1171 	 * access protected by data_lock
1172 	 */
1173 	u32 survey_last_rx_clear_count;
1174 	u32 survey_last_cycle_count;
1175 	struct survey_info survey[ATH10K_NUM_CHANS];
1176 
1177 	/* Channel info events are expected to come in pairs without and with
1178 	 * COMPLETE flag set respectively for each channel visit during scan.
1179 	 *
1180 	 * However there are deviations from this rule. This flag is used to
1181 	 * avoid reporting garbage data.
1182 	 */
1183 	bool ch_info_can_report_survey;
1184 	struct completion bss_survey_done;
1185 
1186 	struct dfs_pattern_detector *dfs_detector;
1187 
1188 	unsigned long tx_paused; /* see ATH10K_TX_PAUSE_ */
1189 
1190 #ifdef CONFIG_ATH10K_DEBUGFS
1191 	struct ath10k_debug debug;
1192 	struct {
1193 		/* relay(fs) channel for spectral scan */
1194 		struct rchan *rfs_chan_spec_scan;
1195 
1196 		/* spectral_mode and spec_config are protected by conf_mutex */
1197 		enum ath10k_spectral_mode mode;
1198 		struct ath10k_spec_scan config;
1199 	} spectral;
1200 #endif
1201 
1202 	u32 pktlog_filter;
1203 
1204 #ifdef CONFIG_DEV_COREDUMP
1205 	struct {
1206 		struct ath10k_fw_crash_data *fw_crash_data;
1207 	} coredump;
1208 #endif
1209 
1210 	struct {
1211 		/* protected by conf_mutex */
1212 		struct ath10k_fw_components utf_mode_fw;
1213 
1214 		/* protected by data_lock */
1215 		bool utf_monitor;
1216 	} testmode;
1217 
1218 	struct {
1219 		/* protected by data_lock */
1220 		u32 rx_crc_err_drop;
1221 		u32 fw_crash_counter;
1222 		u32 fw_warm_reset_counter;
1223 		u32 fw_cold_reset_counter;
1224 	} stats;
1225 
1226 	struct ath10k_thermal thermal;
1227 	struct ath10k_wow wow;
1228 	struct ath10k_per_peer_tx_stats peer_tx_stats;
1229 
1230 	/* NAPI */
1231 	struct net_device napi_dev;
1232 	struct napi_struct napi;
1233 
1234 	struct work_struct set_coverage_class_work;
1235 	/* protected by conf_mutex */
1236 	struct {
1237 		/* writing also protected by data_lock */
1238 		s16 coverage_class;
1239 
1240 		u32 reg_phyclk;
1241 		u32 reg_slottime_conf;
1242 		u32 reg_slottime_orig;
1243 		u32 reg_ack_cts_timeout_conf;
1244 		u32 reg_ack_cts_timeout_orig;
1245 	} fw_coverage;
1246 
1247 	u32 ampdu_reference;
1248 
1249 	const u8 *wmi_key_cipher;
1250 	void *ce_priv;
1251 
1252 	u32 sta_tid_stats_mask;
1253 
1254 	/* protected by data_lock */
1255 	enum ath10k_radar_confirmation_state radar_conf_state;
1256 	struct ath10k_radar_found_info last_radar_info;
1257 	struct work_struct radar_confirmation_work;
1258 	struct ath10k_bus_params bus_param;
1259 	struct completion peer_delete_done;
1260 
1261 	bool coex_support;
1262 	int coex_gpio_pin;
1263 
1264 	/* must be last */
1265 	u8 drv_priv[] __aligned(sizeof(void *));
1266 };
1267 
1268 static inline bool ath10k_peer_stats_enabled(struct ath10k *ar)
1269 {
1270 	if (test_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags) &&
1271 	    test_bit(WMI_SERVICE_PEER_STATS, ar->wmi.svc_map))
1272 		return true;
1273 
1274 	return false;
1275 }
1276 
1277 extern unsigned long ath10k_coredump_mask;
1278 
1279 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
1280 				  enum ath10k_bus bus,
1281 				  enum ath10k_hw_rev hw_rev,
1282 				  const struct ath10k_hif_ops *hif_ops);
1283 void ath10k_core_destroy(struct ath10k *ar);
1284 void ath10k_core_get_fw_features_str(struct ath10k *ar,
1285 				     char *buf,
1286 				     size_t max_len);
1287 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name,
1288 				     struct ath10k_fw_file *fw_file);
1289 
1290 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode,
1291 		      const struct ath10k_fw_components *fw_components);
1292 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt);
1293 void ath10k_core_stop(struct ath10k *ar);
1294 int ath10k_core_register(struct ath10k *ar,
1295 			 const struct ath10k_bus_params *bus_params);
1296 void ath10k_core_unregister(struct ath10k *ar);
1297 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type);
1298 void ath10k_core_free_board_files(struct ath10k *ar);
1299 
1300 #endif /* _CORE_H_ */
1301