1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 22 #include "core.h" 23 #include "mac.h" 24 #include "htc.h" 25 #include "hif.h" 26 #include "wmi.h" 27 #include "bmi.h" 28 #include "debug.h" 29 #include "htt.h" 30 #include "testmode.h" 31 #include "wmi-ops.h" 32 33 unsigned int ath10k_debug_mask; 34 static unsigned int ath10k_cryptmode_param; 35 static bool uart_print; 36 static bool skip_otp; 37 38 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 39 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 40 module_param(uart_print, bool, 0644); 41 module_param(skip_otp, bool, 0644); 42 43 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 44 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 45 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 46 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 47 48 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 49 { 50 .id = QCA988X_HW_2_0_VERSION, 51 .name = "qca988x hw2.0", 52 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 53 .uart_pin = 7, 54 .has_shifted_cc_wraparound = true, 55 .otp_exe_param = 0, 56 .channel_counters_freq_hz = 88000, 57 .fw = { 58 .dir = QCA988X_HW_2_0_FW_DIR, 59 .fw = QCA988X_HW_2_0_FW_FILE, 60 .otp = QCA988X_HW_2_0_OTP_FILE, 61 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 62 .board_size = QCA988X_BOARD_DATA_SZ, 63 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 64 }, 65 }, 66 { 67 .id = QCA6174_HW_2_1_VERSION, 68 .name = "qca6174 hw2.1", 69 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 70 .uart_pin = 6, 71 .otp_exe_param = 0, 72 .channel_counters_freq_hz = 88000, 73 .fw = { 74 .dir = QCA6174_HW_2_1_FW_DIR, 75 .fw = QCA6174_HW_2_1_FW_FILE, 76 .otp = QCA6174_HW_2_1_OTP_FILE, 77 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 78 .board_size = QCA6174_BOARD_DATA_SZ, 79 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 80 }, 81 }, 82 { 83 .id = QCA6174_HW_3_0_VERSION, 84 .name = "qca6174 hw3.0", 85 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 86 .uart_pin = 6, 87 .otp_exe_param = 0, 88 .channel_counters_freq_hz = 88000, 89 .fw = { 90 .dir = QCA6174_HW_3_0_FW_DIR, 91 .fw = QCA6174_HW_3_0_FW_FILE, 92 .otp = QCA6174_HW_3_0_OTP_FILE, 93 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 94 .board_size = QCA6174_BOARD_DATA_SZ, 95 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 96 }, 97 }, 98 { 99 .id = QCA6174_HW_3_2_VERSION, 100 .name = "qca6174 hw3.2", 101 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 102 .uart_pin = 6, 103 .otp_exe_param = 0, 104 .channel_counters_freq_hz = 88000, 105 .fw = { 106 /* uses same binaries as hw3.0 */ 107 .dir = QCA6174_HW_3_0_FW_DIR, 108 .fw = QCA6174_HW_3_0_FW_FILE, 109 .otp = QCA6174_HW_3_0_OTP_FILE, 110 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 111 .board_size = QCA6174_BOARD_DATA_SZ, 112 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 113 }, 114 }, 115 { 116 .id = QCA99X0_HW_2_0_DEV_VERSION, 117 .name = "qca99x0 hw2.0", 118 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 119 .uart_pin = 7, 120 .otp_exe_param = 0x00000700, 121 .continuous_frag_desc = true, 122 .channel_counters_freq_hz = 150000, 123 .fw = { 124 .dir = QCA99X0_HW_2_0_FW_DIR, 125 .fw = QCA99X0_HW_2_0_FW_FILE, 126 .otp = QCA99X0_HW_2_0_OTP_FILE, 127 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 128 .board_size = QCA99X0_BOARD_DATA_SZ, 129 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 130 }, 131 }, 132 }; 133 134 static const char *const ath10k_core_fw_feature_str[] = { 135 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 136 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 137 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 138 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 139 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 140 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 141 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 142 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 143 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 144 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 145 }; 146 147 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 148 size_t buf_len, 149 enum ath10k_fw_features feat) 150 { 151 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 152 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 153 return scnprintf(buf, buf_len, "bit%d", feat); 154 } 155 156 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 157 } 158 159 void ath10k_core_get_fw_features_str(struct ath10k *ar, 160 char *buf, 161 size_t buf_len) 162 { 163 unsigned int len = 0; 164 int i; 165 166 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 167 if (test_bit(i, ar->fw_features)) { 168 if (len > 0) 169 len += scnprintf(buf + len, buf_len - len, ","); 170 171 len += ath10k_core_get_fw_feature_str(buf + len, 172 buf_len - len, 173 i); 174 } 175 } 176 } 177 178 static void ath10k_send_suspend_complete(struct ath10k *ar) 179 { 180 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 181 182 complete(&ar->target_suspend); 183 } 184 185 static int ath10k_init_configure_target(struct ath10k *ar) 186 { 187 u32 param_host; 188 int ret; 189 190 /* tell target which HTC version it is used*/ 191 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 192 HTC_PROTOCOL_VERSION); 193 if (ret) { 194 ath10k_err(ar, "settings HTC version failed\n"); 195 return ret; 196 } 197 198 /* set the firmware mode to STA/IBSS/AP */ 199 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 200 if (ret) { 201 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 202 return ret; 203 } 204 205 /* TODO following parameters need to be re-visited. */ 206 /* num_device */ 207 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 208 /* Firmware mode */ 209 /* FIXME: Why FW_MODE_AP ??.*/ 210 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 211 /* mac_addr_method */ 212 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 213 /* firmware_bridge */ 214 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 215 /* fwsubmode */ 216 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 217 218 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 219 if (ret) { 220 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 221 return ret; 222 } 223 224 /* We do all byte-swapping on the host */ 225 ret = ath10k_bmi_write32(ar, hi_be, 0); 226 if (ret) { 227 ath10k_err(ar, "setting host CPU BE mode failed\n"); 228 return ret; 229 } 230 231 /* FW descriptor/Data swap flags */ 232 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 233 234 if (ret) { 235 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 236 return ret; 237 } 238 239 /* Some devices have a special sanity check that verifies the PCI 240 * Device ID is written to this host interest var. It is known to be 241 * required to boot QCA6164. 242 */ 243 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 244 ar->dev_id); 245 if (ret) { 246 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 247 return ret; 248 } 249 250 return 0; 251 } 252 253 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 254 const char *dir, 255 const char *file) 256 { 257 char filename[100]; 258 const struct firmware *fw; 259 int ret; 260 261 if (file == NULL) 262 return ERR_PTR(-ENOENT); 263 264 if (dir == NULL) 265 dir = "."; 266 267 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 268 ret = request_firmware(&fw, filename, ar->dev); 269 if (ret) 270 return ERR_PTR(ret); 271 272 return fw; 273 } 274 275 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 276 size_t data_len) 277 { 278 u32 board_data_size = ar->hw_params.fw.board_size; 279 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 280 u32 board_ext_data_addr; 281 int ret; 282 283 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 284 if (ret) { 285 ath10k_err(ar, "could not read board ext data addr (%d)\n", 286 ret); 287 return ret; 288 } 289 290 ath10k_dbg(ar, ATH10K_DBG_BOOT, 291 "boot push board extended data addr 0x%x\n", 292 board_ext_data_addr); 293 294 if (board_ext_data_addr == 0) 295 return 0; 296 297 if (data_len != (board_data_size + board_ext_data_size)) { 298 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 299 data_len, board_data_size, board_ext_data_size); 300 return -EINVAL; 301 } 302 303 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 304 data + board_data_size, 305 board_ext_data_size); 306 if (ret) { 307 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 308 return ret; 309 } 310 311 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 312 (board_ext_data_size << 16) | 1); 313 if (ret) { 314 ath10k_err(ar, "could not write board ext data bit (%d)\n", 315 ret); 316 return ret; 317 } 318 319 return 0; 320 } 321 322 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 323 size_t data_len) 324 { 325 u32 board_data_size = ar->hw_params.fw.board_size; 326 u32 address; 327 int ret; 328 329 ret = ath10k_push_board_ext_data(ar, data, data_len); 330 if (ret) { 331 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 332 goto exit; 333 } 334 335 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 336 if (ret) { 337 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 338 goto exit; 339 } 340 341 ret = ath10k_bmi_write_memory(ar, address, data, 342 min_t(u32, board_data_size, 343 data_len)); 344 if (ret) { 345 ath10k_err(ar, "could not write board data (%d)\n", ret); 346 goto exit; 347 } 348 349 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 350 if (ret) { 351 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 352 goto exit; 353 } 354 355 exit: 356 return ret; 357 } 358 359 static int ath10k_download_cal_file(struct ath10k *ar) 360 { 361 int ret; 362 363 if (!ar->cal_file) 364 return -ENOENT; 365 366 if (IS_ERR(ar->cal_file)) 367 return PTR_ERR(ar->cal_file); 368 369 ret = ath10k_download_board_data(ar, ar->cal_file->data, 370 ar->cal_file->size); 371 if (ret) { 372 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 373 return ret; 374 } 375 376 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 377 378 return 0; 379 } 380 381 static int ath10k_download_cal_dt(struct ath10k *ar) 382 { 383 struct device_node *node; 384 int data_len; 385 void *data; 386 int ret; 387 388 node = ar->dev->of_node; 389 if (!node) 390 /* Device Tree is optional, don't print any warnings if 391 * there's no node for ath10k. 392 */ 393 return -ENOENT; 394 395 if (!of_get_property(node, "qcom,ath10k-calibration-data", 396 &data_len)) { 397 /* The calibration data node is optional */ 398 return -ENOENT; 399 } 400 401 if (data_len != QCA988X_CAL_DATA_LEN) { 402 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 403 data_len); 404 ret = -EMSGSIZE; 405 goto out; 406 } 407 408 data = kmalloc(data_len, GFP_KERNEL); 409 if (!data) { 410 ret = -ENOMEM; 411 goto out; 412 } 413 414 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", 415 data, data_len); 416 if (ret) { 417 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 418 ret); 419 goto out_free; 420 } 421 422 ret = ath10k_download_board_data(ar, data, data_len); 423 if (ret) { 424 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 425 ret); 426 goto out_free; 427 } 428 429 ret = 0; 430 431 out_free: 432 kfree(data); 433 434 out: 435 return ret; 436 } 437 438 static int ath10k_download_and_run_otp(struct ath10k *ar) 439 { 440 u32 result, address = ar->hw_params.patch_load_addr; 441 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 442 int ret; 443 444 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); 445 if (ret) { 446 ath10k_err(ar, "failed to download board data: %d\n", ret); 447 return ret; 448 } 449 450 /* OTP is optional */ 451 452 if (!ar->otp_data || !ar->otp_len) { 453 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 454 ar->otp_data, ar->otp_len); 455 return 0; 456 } 457 458 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 459 address, ar->otp_len); 460 461 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 462 if (ret) { 463 ath10k_err(ar, "could not write otp (%d)\n", ret); 464 return ret; 465 } 466 467 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 468 if (ret) { 469 ath10k_err(ar, "could not execute otp (%d)\n", ret); 470 return ret; 471 } 472 473 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 474 475 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 476 ar->fw_features)) 477 && result != 0) { 478 ath10k_err(ar, "otp calibration failed: %d", result); 479 return -EINVAL; 480 } 481 482 return 0; 483 } 484 485 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) 486 { 487 u32 address, data_len; 488 const char *mode_name; 489 const void *data; 490 int ret; 491 492 address = ar->hw_params.patch_load_addr; 493 494 switch (mode) { 495 case ATH10K_FIRMWARE_MODE_NORMAL: 496 data = ar->firmware_data; 497 data_len = ar->firmware_len; 498 mode_name = "normal"; 499 ret = ath10k_swap_code_seg_configure(ar, 500 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW); 501 if (ret) { 502 ath10k_err(ar, "failed to configure fw code swap: %d\n", 503 ret); 504 return ret; 505 } 506 break; 507 case ATH10K_FIRMWARE_MODE_UTF: 508 data = ar->testmode.utf->data; 509 data_len = ar->testmode.utf->size; 510 mode_name = "utf"; 511 break; 512 default: 513 ath10k_err(ar, "unknown firmware mode: %d\n", mode); 514 return -EINVAL; 515 } 516 517 ath10k_dbg(ar, ATH10K_DBG_BOOT, 518 "boot uploading firmware image %p len %d mode %s\n", 519 data, data_len, mode_name); 520 521 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 522 if (ret) { 523 ath10k_err(ar, "failed to download %s firmware: %d\n", 524 mode_name, ret); 525 return ret; 526 } 527 528 return ret; 529 } 530 531 static void ath10k_core_free_firmware_files(struct ath10k *ar) 532 { 533 if (!IS_ERR(ar->board)) 534 release_firmware(ar->board); 535 536 if (!IS_ERR(ar->otp)) 537 release_firmware(ar->otp); 538 539 if (!IS_ERR(ar->firmware)) 540 release_firmware(ar->firmware); 541 542 if (!IS_ERR(ar->cal_file)) 543 release_firmware(ar->cal_file); 544 545 ath10k_swap_code_seg_release(ar); 546 547 ar->board = NULL; 548 ar->board_data = NULL; 549 ar->board_len = 0; 550 551 ar->otp = NULL; 552 ar->otp_data = NULL; 553 ar->otp_len = 0; 554 555 ar->firmware = NULL; 556 ar->firmware_data = NULL; 557 ar->firmware_len = 0; 558 559 ar->cal_file = NULL; 560 561 } 562 563 static int ath10k_fetch_cal_file(struct ath10k *ar) 564 { 565 char filename[100]; 566 567 /* cal-<bus>-<id>.bin */ 568 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 569 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 570 571 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 572 if (IS_ERR(ar->cal_file)) 573 /* calibration file is optional, don't print any warnings */ 574 return PTR_ERR(ar->cal_file); 575 576 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 577 ATH10K_FW_DIR, filename); 578 579 return 0; 580 } 581 582 static int ath10k_core_fetch_spec_board_file(struct ath10k *ar) 583 { 584 char filename[100]; 585 586 scnprintf(filename, sizeof(filename), "board-%s-%s.bin", 587 ath10k_bus_str(ar->hif.bus), ar->spec_board_id); 588 589 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename); 590 if (IS_ERR(ar->board)) 591 return PTR_ERR(ar->board); 592 593 ar->board_data = ar->board->data; 594 ar->board_len = ar->board->size; 595 ar->spec_board_loaded = true; 596 597 return 0; 598 } 599 600 static int ath10k_core_fetch_generic_board_file(struct ath10k *ar) 601 { 602 if (!ar->hw_params.fw.board) { 603 ath10k_err(ar, "failed to find board file fw entry\n"); 604 return -EINVAL; 605 } 606 607 ar->board = ath10k_fetch_fw_file(ar, 608 ar->hw_params.fw.dir, 609 ar->hw_params.fw.board); 610 if (IS_ERR(ar->board)) 611 return PTR_ERR(ar->board); 612 613 ar->board_data = ar->board->data; 614 ar->board_len = ar->board->size; 615 ar->spec_board_loaded = false; 616 617 return 0; 618 } 619 620 static int ath10k_core_fetch_board_file(struct ath10k *ar) 621 { 622 int ret; 623 624 if (strlen(ar->spec_board_id) > 0) { 625 ret = ath10k_core_fetch_spec_board_file(ar); 626 if (ret) { 627 ath10k_info(ar, "failed to load spec board file, falling back to generic: %d\n", 628 ret); 629 goto generic; 630 } 631 632 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found specific board file for %s\n", 633 ar->spec_board_id); 634 return 0; 635 } 636 637 generic: 638 ret = ath10k_core_fetch_generic_board_file(ar); 639 if (ret) { 640 ath10k_err(ar, "failed to fetch generic board data: %d\n", ret); 641 return ret; 642 } 643 644 return 0; 645 } 646 647 static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) 648 { 649 int ret = 0; 650 651 if (ar->hw_params.fw.fw == NULL) { 652 ath10k_err(ar, "firmware file not defined\n"); 653 return -EINVAL; 654 } 655 656 ar->firmware = ath10k_fetch_fw_file(ar, 657 ar->hw_params.fw.dir, 658 ar->hw_params.fw.fw); 659 if (IS_ERR(ar->firmware)) { 660 ret = PTR_ERR(ar->firmware); 661 ath10k_err(ar, "could not fetch firmware (%d)\n", ret); 662 goto err; 663 } 664 665 ar->firmware_data = ar->firmware->data; 666 ar->firmware_len = ar->firmware->size; 667 668 /* OTP may be undefined. If so, don't fetch it at all */ 669 if (ar->hw_params.fw.otp == NULL) 670 return 0; 671 672 ar->otp = ath10k_fetch_fw_file(ar, 673 ar->hw_params.fw.dir, 674 ar->hw_params.fw.otp); 675 if (IS_ERR(ar->otp)) { 676 ret = PTR_ERR(ar->otp); 677 ath10k_err(ar, "could not fetch otp (%d)\n", ret); 678 goto err; 679 } 680 681 ar->otp_data = ar->otp->data; 682 ar->otp_len = ar->otp->size; 683 684 return 0; 685 686 err: 687 ath10k_core_free_firmware_files(ar); 688 return ret; 689 } 690 691 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) 692 { 693 size_t magic_len, len, ie_len; 694 int ie_id, i, index, bit, ret; 695 struct ath10k_fw_ie *hdr; 696 const u8 *data; 697 __le32 *timestamp, *version; 698 699 /* first fetch the firmware file (firmware-*.bin) */ 700 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); 701 if (IS_ERR(ar->firmware)) { 702 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 703 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); 704 return PTR_ERR(ar->firmware); 705 } 706 707 data = ar->firmware->data; 708 len = ar->firmware->size; 709 710 /* magic also includes the null byte, check that as well */ 711 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 712 713 if (len < magic_len) { 714 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 715 ar->hw_params.fw.dir, name, len); 716 ret = -EINVAL; 717 goto err; 718 } 719 720 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 721 ath10k_err(ar, "invalid firmware magic\n"); 722 ret = -EINVAL; 723 goto err; 724 } 725 726 /* jump over the padding */ 727 magic_len = ALIGN(magic_len, 4); 728 729 len -= magic_len; 730 data += magic_len; 731 732 /* loop elements */ 733 while (len > sizeof(struct ath10k_fw_ie)) { 734 hdr = (struct ath10k_fw_ie *)data; 735 736 ie_id = le32_to_cpu(hdr->id); 737 ie_len = le32_to_cpu(hdr->len); 738 739 len -= sizeof(*hdr); 740 data += sizeof(*hdr); 741 742 if (len < ie_len) { 743 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 744 ie_id, len, ie_len); 745 ret = -EINVAL; 746 goto err; 747 } 748 749 switch (ie_id) { 750 case ATH10K_FW_IE_FW_VERSION: 751 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) 752 break; 753 754 memcpy(ar->hw->wiphy->fw_version, data, ie_len); 755 ar->hw->wiphy->fw_version[ie_len] = '\0'; 756 757 ath10k_dbg(ar, ATH10K_DBG_BOOT, 758 "found fw version %s\n", 759 ar->hw->wiphy->fw_version); 760 break; 761 case ATH10K_FW_IE_TIMESTAMP: 762 if (ie_len != sizeof(u32)) 763 break; 764 765 timestamp = (__le32 *)data; 766 767 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 768 le32_to_cpup(timestamp)); 769 break; 770 case ATH10K_FW_IE_FEATURES: 771 ath10k_dbg(ar, ATH10K_DBG_BOOT, 772 "found firmware features ie (%zd B)\n", 773 ie_len); 774 775 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 776 index = i / 8; 777 bit = i % 8; 778 779 if (index == ie_len) 780 break; 781 782 if (data[index] & (1 << bit)) { 783 ath10k_dbg(ar, ATH10K_DBG_BOOT, 784 "Enabling feature bit: %i\n", 785 i); 786 __set_bit(i, ar->fw_features); 787 } 788 } 789 790 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 791 ar->fw_features, 792 sizeof(ar->fw_features)); 793 break; 794 case ATH10K_FW_IE_FW_IMAGE: 795 ath10k_dbg(ar, ATH10K_DBG_BOOT, 796 "found fw image ie (%zd B)\n", 797 ie_len); 798 799 ar->firmware_data = data; 800 ar->firmware_len = ie_len; 801 802 break; 803 case ATH10K_FW_IE_OTP_IMAGE: 804 ath10k_dbg(ar, ATH10K_DBG_BOOT, 805 "found otp image ie (%zd B)\n", 806 ie_len); 807 808 ar->otp_data = data; 809 ar->otp_len = ie_len; 810 811 break; 812 case ATH10K_FW_IE_WMI_OP_VERSION: 813 if (ie_len != sizeof(u32)) 814 break; 815 816 version = (__le32 *)data; 817 818 ar->wmi.op_version = le32_to_cpup(version); 819 820 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 821 ar->wmi.op_version); 822 break; 823 case ATH10K_FW_IE_HTT_OP_VERSION: 824 if (ie_len != sizeof(u32)) 825 break; 826 827 version = (__le32 *)data; 828 829 ar->htt.op_version = le32_to_cpup(version); 830 831 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 832 ar->htt.op_version); 833 break; 834 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 835 ath10k_dbg(ar, ATH10K_DBG_BOOT, 836 "found fw code swap image ie (%zd B)\n", 837 ie_len); 838 ar->swap.firmware_codeswap_data = data; 839 ar->swap.firmware_codeswap_len = ie_len; 840 break; 841 default: 842 ath10k_warn(ar, "Unknown FW IE: %u\n", 843 le32_to_cpu(hdr->id)); 844 break; 845 } 846 847 /* jump over the padding */ 848 ie_len = ALIGN(ie_len, 4); 849 850 len -= ie_len; 851 data += ie_len; 852 } 853 854 if (!ar->firmware_data || !ar->firmware_len) { 855 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 856 ar->hw_params.fw.dir, name); 857 ret = -ENOMEDIUM; 858 goto err; 859 } 860 861 return 0; 862 863 err: 864 ath10k_core_free_firmware_files(ar); 865 return ret; 866 } 867 868 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 869 { 870 int ret; 871 872 /* calibration file is optional, don't check for any errors */ 873 ath10k_fetch_cal_file(ar); 874 875 ret = ath10k_core_fetch_board_file(ar); 876 if (ret) { 877 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 878 return ret; 879 } 880 881 ar->fw_api = 5; 882 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 883 884 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE); 885 if (ret == 0) 886 goto success; 887 888 ar->fw_api = 4; 889 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 890 891 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); 892 if (ret == 0) 893 goto success; 894 895 ar->fw_api = 3; 896 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 897 898 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); 899 if (ret == 0) 900 goto success; 901 902 ar->fw_api = 2; 903 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 904 905 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); 906 if (ret == 0) 907 goto success; 908 909 ar->fw_api = 1; 910 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 911 912 ret = ath10k_core_fetch_firmware_api_1(ar); 913 if (ret) 914 return ret; 915 916 success: 917 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 918 919 return 0; 920 } 921 922 static int ath10k_download_cal_data(struct ath10k *ar) 923 { 924 int ret; 925 926 ret = ath10k_download_cal_file(ar); 927 if (ret == 0) { 928 ar->cal_mode = ATH10K_CAL_MODE_FILE; 929 goto done; 930 } 931 932 ath10k_dbg(ar, ATH10K_DBG_BOOT, 933 "boot did not find a calibration file, try DT next: %d\n", 934 ret); 935 936 ret = ath10k_download_cal_dt(ar); 937 if (ret == 0) { 938 ar->cal_mode = ATH10K_CAL_MODE_DT; 939 goto done; 940 } 941 942 ath10k_dbg(ar, ATH10K_DBG_BOOT, 943 "boot did not find DT entry, try OTP next: %d\n", 944 ret); 945 946 ret = ath10k_download_and_run_otp(ar); 947 if (ret) { 948 ath10k_err(ar, "failed to run otp: %d\n", ret); 949 return ret; 950 } 951 952 ar->cal_mode = ATH10K_CAL_MODE_OTP; 953 954 done: 955 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 956 ath10k_cal_mode_str(ar->cal_mode)); 957 return 0; 958 } 959 960 static int ath10k_init_uart(struct ath10k *ar) 961 { 962 int ret; 963 964 /* 965 * Explicitly setting UART prints to zero as target turns it on 966 * based on scratch registers. 967 */ 968 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 969 if (ret) { 970 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 971 return ret; 972 } 973 974 if (!uart_print) 975 return 0; 976 977 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 978 if (ret) { 979 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 980 return ret; 981 } 982 983 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 984 if (ret) { 985 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 986 return ret; 987 } 988 989 /* Set the UART baud rate to 19200. */ 990 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 991 if (ret) { 992 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 993 return ret; 994 } 995 996 ath10k_info(ar, "UART prints enabled\n"); 997 return 0; 998 } 999 1000 static int ath10k_init_hw_params(struct ath10k *ar) 1001 { 1002 const struct ath10k_hw_params *uninitialized_var(hw_params); 1003 int i; 1004 1005 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1006 hw_params = &ath10k_hw_params_list[i]; 1007 1008 if (hw_params->id == ar->target_version) 1009 break; 1010 } 1011 1012 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1013 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1014 ar->target_version); 1015 return -EINVAL; 1016 } 1017 1018 ar->hw_params = *hw_params; 1019 1020 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1021 ar->hw_params.name, ar->target_version); 1022 1023 return 0; 1024 } 1025 1026 static void ath10k_core_restart(struct work_struct *work) 1027 { 1028 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1029 1030 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1031 1032 /* Place a barrier to make sure the compiler doesn't reorder 1033 * CRASH_FLUSH and calling other functions. 1034 */ 1035 barrier(); 1036 1037 ieee80211_stop_queues(ar->hw); 1038 ath10k_drain_tx(ar); 1039 complete_all(&ar->scan.started); 1040 complete_all(&ar->scan.completed); 1041 complete_all(&ar->scan.on_channel); 1042 complete_all(&ar->offchan_tx_completed); 1043 complete_all(&ar->install_key_done); 1044 complete_all(&ar->vdev_setup_done); 1045 complete_all(&ar->thermal.wmi_sync); 1046 wake_up(&ar->htt.empty_tx_wq); 1047 wake_up(&ar->wmi.tx_credits_wq); 1048 wake_up(&ar->peer_mapping_wq); 1049 1050 mutex_lock(&ar->conf_mutex); 1051 1052 switch (ar->state) { 1053 case ATH10K_STATE_ON: 1054 ar->state = ATH10K_STATE_RESTARTING; 1055 ath10k_hif_stop(ar); 1056 ath10k_scan_finish(ar); 1057 ieee80211_restart_hw(ar->hw); 1058 break; 1059 case ATH10K_STATE_OFF: 1060 /* this can happen if driver is being unloaded 1061 * or if the crash happens during FW probing */ 1062 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1063 break; 1064 case ATH10K_STATE_RESTARTING: 1065 /* hw restart might be requested from multiple places */ 1066 break; 1067 case ATH10K_STATE_RESTARTED: 1068 ar->state = ATH10K_STATE_WEDGED; 1069 /* fall through */ 1070 case ATH10K_STATE_WEDGED: 1071 ath10k_warn(ar, "device is wedged, will not restart\n"); 1072 break; 1073 case ATH10K_STATE_UTF: 1074 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1075 break; 1076 } 1077 1078 mutex_unlock(&ar->conf_mutex); 1079 } 1080 1081 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1082 { 1083 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && 1084 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1085 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1086 return -EINVAL; 1087 } 1088 1089 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1090 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1091 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); 1092 return -EINVAL; 1093 } 1094 1095 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1096 switch (ath10k_cryptmode_param) { 1097 case ATH10K_CRYPT_MODE_HW: 1098 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1099 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1100 break; 1101 case ATH10K_CRYPT_MODE_SW: 1102 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1103 ar->fw_features)) { 1104 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1105 return -EINVAL; 1106 } 1107 1108 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1109 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1110 break; 1111 default: 1112 ath10k_info(ar, "invalid cryptmode: %d\n", 1113 ath10k_cryptmode_param); 1114 return -EINVAL; 1115 } 1116 1117 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1118 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1119 1120 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1121 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1122 1123 /* Workaround: 1124 * 1125 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1126 * and causes enormous performance issues (malformed frames, 1127 * etc). 1128 * 1129 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1130 * albeit a bit slower compared to regular operation. 1131 */ 1132 ar->htt.max_num_amsdu = 1; 1133 } 1134 1135 /* Backwards compatibility for firmwares without 1136 * ATH10K_FW_IE_WMI_OP_VERSION. 1137 */ 1138 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1139 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1140 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1141 ar->fw_features)) 1142 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1143 else 1144 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1145 } else { 1146 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1147 } 1148 } 1149 1150 switch (ar->wmi.op_version) { 1151 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1152 ar->max_num_peers = TARGET_NUM_PEERS; 1153 ar->max_num_stations = TARGET_NUM_STATIONS; 1154 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1155 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1156 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1157 WMI_STAT_PEER; 1158 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1159 break; 1160 case ATH10K_FW_WMI_OP_VERSION_10_1: 1161 case ATH10K_FW_WMI_OP_VERSION_10_2: 1162 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1163 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1164 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1165 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1166 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1167 ar->fw_stats_req_mask = WMI_STAT_PEER; 1168 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1169 break; 1170 case ATH10K_FW_WMI_OP_VERSION_TLV: 1171 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1172 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1173 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1174 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1175 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1176 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1177 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1178 WMI_STAT_PEER; 1179 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1180 break; 1181 case ATH10K_FW_WMI_OP_VERSION_10_4: 1182 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1183 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1184 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1185 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1186 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1187 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1188 ar->fw_stats_req_mask = WMI_STAT_PEER; 1189 ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM; 1190 break; 1191 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1192 case ATH10K_FW_WMI_OP_VERSION_MAX: 1193 WARN_ON(1); 1194 return -EINVAL; 1195 } 1196 1197 /* Backwards compatibility for firmwares without 1198 * ATH10K_FW_IE_HTT_OP_VERSION. 1199 */ 1200 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1201 switch (ar->wmi.op_version) { 1202 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1203 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1204 break; 1205 case ATH10K_FW_WMI_OP_VERSION_10_1: 1206 case ATH10K_FW_WMI_OP_VERSION_10_2: 1207 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1208 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1209 break; 1210 case ATH10K_FW_WMI_OP_VERSION_TLV: 1211 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1212 break; 1213 case ATH10K_FW_WMI_OP_VERSION_10_4: 1214 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1215 case ATH10K_FW_WMI_OP_VERSION_MAX: 1216 WARN_ON(1); 1217 return -EINVAL; 1218 } 1219 } 1220 1221 return 0; 1222 } 1223 1224 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) 1225 { 1226 int status; 1227 1228 lockdep_assert_held(&ar->conf_mutex); 1229 1230 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1231 1232 ath10k_bmi_start(ar); 1233 1234 if (ath10k_init_configure_target(ar)) { 1235 status = -EINVAL; 1236 goto err; 1237 } 1238 1239 status = ath10k_download_cal_data(ar); 1240 if (status) 1241 goto err; 1242 1243 /* Some of of qca988x solutions are having global reset issue 1244 * during target initialization. Bypassing PLL setting before 1245 * downloading firmware and letting the SoC run on REF_CLK is 1246 * fixing the problem. Corresponding firmware change is also needed 1247 * to set the clock source once the target is initialized. 1248 */ 1249 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1250 ar->fw_features)) { 1251 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1252 if (status) { 1253 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1254 status); 1255 goto err; 1256 } 1257 } 1258 1259 status = ath10k_download_fw(ar, mode); 1260 if (status) 1261 goto err; 1262 1263 status = ath10k_init_uart(ar); 1264 if (status) 1265 goto err; 1266 1267 ar->htc.htc_ops.target_send_suspend_complete = 1268 ath10k_send_suspend_complete; 1269 1270 status = ath10k_htc_init(ar); 1271 if (status) { 1272 ath10k_err(ar, "could not init HTC (%d)\n", status); 1273 goto err; 1274 } 1275 1276 status = ath10k_bmi_done(ar); 1277 if (status) 1278 goto err; 1279 1280 status = ath10k_wmi_attach(ar); 1281 if (status) { 1282 ath10k_err(ar, "WMI attach failed: %d\n", status); 1283 goto err; 1284 } 1285 1286 status = ath10k_htt_init(ar); 1287 if (status) { 1288 ath10k_err(ar, "failed to init htt: %d\n", status); 1289 goto err_wmi_detach; 1290 } 1291 1292 status = ath10k_htt_tx_alloc(&ar->htt); 1293 if (status) { 1294 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1295 goto err_wmi_detach; 1296 } 1297 1298 status = ath10k_htt_rx_alloc(&ar->htt); 1299 if (status) { 1300 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1301 goto err_htt_tx_detach; 1302 } 1303 1304 status = ath10k_hif_start(ar); 1305 if (status) { 1306 ath10k_err(ar, "could not start HIF: %d\n", status); 1307 goto err_htt_rx_detach; 1308 } 1309 1310 status = ath10k_htc_wait_target(&ar->htc); 1311 if (status) { 1312 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1313 goto err_hif_stop; 1314 } 1315 1316 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1317 status = ath10k_htt_connect(&ar->htt); 1318 if (status) { 1319 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1320 goto err_hif_stop; 1321 } 1322 } 1323 1324 status = ath10k_wmi_connect(ar); 1325 if (status) { 1326 ath10k_err(ar, "could not connect wmi: %d\n", status); 1327 goto err_hif_stop; 1328 } 1329 1330 status = ath10k_htc_start(&ar->htc); 1331 if (status) { 1332 ath10k_err(ar, "failed to start htc: %d\n", status); 1333 goto err_hif_stop; 1334 } 1335 1336 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1337 status = ath10k_wmi_wait_for_service_ready(ar); 1338 if (status) { 1339 ath10k_warn(ar, "wmi service ready event not received"); 1340 goto err_hif_stop; 1341 } 1342 } 1343 1344 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1345 ar->hw->wiphy->fw_version); 1346 1347 status = ath10k_wmi_cmd_init(ar); 1348 if (status) { 1349 ath10k_err(ar, "could not send WMI init command (%d)\n", 1350 status); 1351 goto err_hif_stop; 1352 } 1353 1354 status = ath10k_wmi_wait_for_unified_ready(ar); 1355 if (status) { 1356 ath10k_err(ar, "wmi unified ready event not received\n"); 1357 goto err_hif_stop; 1358 } 1359 1360 /* If firmware indicates Full Rx Reorder support it must be used in a 1361 * slightly different manner. Let HTT code know. 1362 */ 1363 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1364 ar->wmi.svc_map)); 1365 1366 status = ath10k_htt_rx_ring_refill(ar); 1367 if (status) { 1368 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1369 goto err_hif_stop; 1370 } 1371 1372 /* we don't care about HTT in UTF mode */ 1373 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1374 status = ath10k_htt_setup(&ar->htt); 1375 if (status) { 1376 ath10k_err(ar, "failed to setup htt: %d\n", status); 1377 goto err_hif_stop; 1378 } 1379 } 1380 1381 status = ath10k_debug_start(ar); 1382 if (status) 1383 goto err_hif_stop; 1384 1385 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 1386 1387 INIT_LIST_HEAD(&ar->arvifs); 1388 1389 return 0; 1390 1391 err_hif_stop: 1392 ath10k_hif_stop(ar); 1393 err_htt_rx_detach: 1394 ath10k_htt_rx_free(&ar->htt); 1395 err_htt_tx_detach: 1396 ath10k_htt_tx_free(&ar->htt); 1397 err_wmi_detach: 1398 ath10k_wmi_detach(ar); 1399 err: 1400 return status; 1401 } 1402 EXPORT_SYMBOL(ath10k_core_start); 1403 1404 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 1405 { 1406 int ret; 1407 unsigned long time_left; 1408 1409 reinit_completion(&ar->target_suspend); 1410 1411 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 1412 if (ret) { 1413 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 1414 return ret; 1415 } 1416 1417 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 1418 1419 if (!time_left) { 1420 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 1421 return -ETIMEDOUT; 1422 } 1423 1424 return 0; 1425 } 1426 1427 void ath10k_core_stop(struct ath10k *ar) 1428 { 1429 lockdep_assert_held(&ar->conf_mutex); 1430 ath10k_debug_stop(ar); 1431 1432 /* try to suspend target */ 1433 if (ar->state != ATH10K_STATE_RESTARTING && 1434 ar->state != ATH10K_STATE_UTF) 1435 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 1436 1437 ath10k_hif_stop(ar); 1438 ath10k_htt_tx_free(&ar->htt); 1439 ath10k_htt_rx_free(&ar->htt); 1440 ath10k_wmi_detach(ar); 1441 } 1442 EXPORT_SYMBOL(ath10k_core_stop); 1443 1444 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 1445 * order to know what hw capabilities should be advertised to mac80211 it is 1446 * necessary to load the firmware (and tear it down immediately since start 1447 * hook will try to init it again) before registering */ 1448 static int ath10k_core_probe_fw(struct ath10k *ar) 1449 { 1450 struct bmi_target_info target_info; 1451 int ret = 0; 1452 1453 ret = ath10k_hif_power_up(ar); 1454 if (ret) { 1455 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 1456 return ret; 1457 } 1458 1459 memset(&target_info, 0, sizeof(target_info)); 1460 ret = ath10k_bmi_get_target_info(ar, &target_info); 1461 if (ret) { 1462 ath10k_err(ar, "could not get target info (%d)\n", ret); 1463 goto err_power_down; 1464 } 1465 1466 ar->target_version = target_info.version; 1467 ar->hw->wiphy->hw_version = target_info.version; 1468 1469 ret = ath10k_init_hw_params(ar); 1470 if (ret) { 1471 ath10k_err(ar, "could not get hw params (%d)\n", ret); 1472 goto err_power_down; 1473 } 1474 1475 ret = ath10k_core_fetch_firmware_files(ar); 1476 if (ret) { 1477 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 1478 goto err_power_down; 1479 } 1480 1481 ret = ath10k_core_init_firmware_features(ar); 1482 if (ret) { 1483 ath10k_err(ar, "fatal problem with firmware features: %d\n", 1484 ret); 1485 goto err_free_firmware_files; 1486 } 1487 1488 ret = ath10k_swap_code_seg_init(ar); 1489 if (ret) { 1490 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 1491 ret); 1492 goto err_free_firmware_files; 1493 } 1494 1495 mutex_lock(&ar->conf_mutex); 1496 1497 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); 1498 if (ret) { 1499 ath10k_err(ar, "could not init core (%d)\n", ret); 1500 goto err_unlock; 1501 } 1502 1503 ath10k_print_driver_info(ar); 1504 ath10k_core_stop(ar); 1505 1506 mutex_unlock(&ar->conf_mutex); 1507 1508 ath10k_hif_power_down(ar); 1509 return 0; 1510 1511 err_unlock: 1512 mutex_unlock(&ar->conf_mutex); 1513 1514 err_free_firmware_files: 1515 ath10k_core_free_firmware_files(ar); 1516 1517 err_power_down: 1518 ath10k_hif_power_down(ar); 1519 1520 return ret; 1521 } 1522 1523 static void ath10k_core_register_work(struct work_struct *work) 1524 { 1525 struct ath10k *ar = container_of(work, struct ath10k, register_work); 1526 int status; 1527 1528 status = ath10k_core_probe_fw(ar); 1529 if (status) { 1530 ath10k_err(ar, "could not probe fw (%d)\n", status); 1531 goto err; 1532 } 1533 1534 status = ath10k_mac_register(ar); 1535 if (status) { 1536 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 1537 goto err_release_fw; 1538 } 1539 1540 status = ath10k_debug_register(ar); 1541 if (status) { 1542 ath10k_err(ar, "unable to initialize debugfs\n"); 1543 goto err_unregister_mac; 1544 } 1545 1546 status = ath10k_spectral_create(ar); 1547 if (status) { 1548 ath10k_err(ar, "failed to initialize spectral\n"); 1549 goto err_debug_destroy; 1550 } 1551 1552 status = ath10k_thermal_register(ar); 1553 if (status) { 1554 ath10k_err(ar, "could not register thermal device: %d\n", 1555 status); 1556 goto err_spectral_destroy; 1557 } 1558 1559 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 1560 return; 1561 1562 err_spectral_destroy: 1563 ath10k_spectral_destroy(ar); 1564 err_debug_destroy: 1565 ath10k_debug_destroy(ar); 1566 err_unregister_mac: 1567 ath10k_mac_unregister(ar); 1568 err_release_fw: 1569 ath10k_core_free_firmware_files(ar); 1570 err: 1571 /* TODO: It's probably a good idea to release device from the driver 1572 * but calling device_release_driver() here will cause a deadlock. 1573 */ 1574 return; 1575 } 1576 1577 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 1578 { 1579 ar->chip_id = chip_id; 1580 queue_work(ar->workqueue, &ar->register_work); 1581 1582 return 0; 1583 } 1584 EXPORT_SYMBOL(ath10k_core_register); 1585 1586 void ath10k_core_unregister(struct ath10k *ar) 1587 { 1588 cancel_work_sync(&ar->register_work); 1589 1590 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 1591 return; 1592 1593 ath10k_thermal_unregister(ar); 1594 /* Stop spectral before unregistering from mac80211 to remove the 1595 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 1596 * would be already be free'd recursively, leading to a double free. 1597 */ 1598 ath10k_spectral_destroy(ar); 1599 1600 /* We must unregister from mac80211 before we stop HTC and HIF. 1601 * Otherwise we will fail to submit commands to FW and mac80211 will be 1602 * unhappy about callback failures. */ 1603 ath10k_mac_unregister(ar); 1604 1605 ath10k_testmode_destroy(ar); 1606 1607 ath10k_core_free_firmware_files(ar); 1608 1609 ath10k_debug_unregister(ar); 1610 } 1611 EXPORT_SYMBOL(ath10k_core_unregister); 1612 1613 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1614 enum ath10k_bus bus, 1615 enum ath10k_hw_rev hw_rev, 1616 const struct ath10k_hif_ops *hif_ops) 1617 { 1618 struct ath10k *ar; 1619 int ret; 1620 1621 ar = ath10k_mac_create(priv_size); 1622 if (!ar) 1623 return NULL; 1624 1625 ar->ath_common.priv = ar; 1626 ar->ath_common.hw = ar->hw; 1627 ar->dev = dev; 1628 ar->hw_rev = hw_rev; 1629 ar->hif.ops = hif_ops; 1630 ar->hif.bus = bus; 1631 1632 switch (hw_rev) { 1633 case ATH10K_HW_QCA988X: 1634 ar->regs = &qca988x_regs; 1635 ar->hw_values = &qca988x_values; 1636 break; 1637 case ATH10K_HW_QCA6174: 1638 ar->regs = &qca6174_regs; 1639 ar->hw_values = &qca6174_values; 1640 break; 1641 case ATH10K_HW_QCA99X0: 1642 ar->regs = &qca99x0_regs; 1643 ar->hw_values = &qca99x0_values; 1644 break; 1645 default: 1646 ath10k_err(ar, "unsupported core hardware revision %d\n", 1647 hw_rev); 1648 ret = -ENOTSUPP; 1649 goto err_free_mac; 1650 } 1651 1652 init_completion(&ar->scan.started); 1653 init_completion(&ar->scan.completed); 1654 init_completion(&ar->scan.on_channel); 1655 init_completion(&ar->target_suspend); 1656 init_completion(&ar->wow.wakeup_completed); 1657 1658 init_completion(&ar->install_key_done); 1659 init_completion(&ar->vdev_setup_done); 1660 init_completion(&ar->thermal.wmi_sync); 1661 1662 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 1663 1664 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 1665 if (!ar->workqueue) 1666 goto err_free_mac; 1667 1668 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 1669 if (!ar->workqueue_aux) 1670 goto err_free_wq; 1671 1672 mutex_init(&ar->conf_mutex); 1673 spin_lock_init(&ar->data_lock); 1674 1675 INIT_LIST_HEAD(&ar->peers); 1676 init_waitqueue_head(&ar->peer_mapping_wq); 1677 init_waitqueue_head(&ar->htt.empty_tx_wq); 1678 init_waitqueue_head(&ar->wmi.tx_credits_wq); 1679 1680 init_completion(&ar->offchan_tx_completed); 1681 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 1682 skb_queue_head_init(&ar->offchan_tx_queue); 1683 1684 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 1685 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 1686 1687 INIT_WORK(&ar->register_work, ath10k_core_register_work); 1688 INIT_WORK(&ar->restart_work, ath10k_core_restart); 1689 1690 ret = ath10k_debug_create(ar); 1691 if (ret) 1692 goto err_free_aux_wq; 1693 1694 return ar; 1695 1696 err_free_aux_wq: 1697 destroy_workqueue(ar->workqueue_aux); 1698 err_free_wq: 1699 destroy_workqueue(ar->workqueue); 1700 1701 err_free_mac: 1702 ath10k_mac_destroy(ar); 1703 1704 return NULL; 1705 } 1706 EXPORT_SYMBOL(ath10k_core_create); 1707 1708 void ath10k_core_destroy(struct ath10k *ar) 1709 { 1710 flush_workqueue(ar->workqueue); 1711 destroy_workqueue(ar->workqueue); 1712 1713 flush_workqueue(ar->workqueue_aux); 1714 destroy_workqueue(ar->workqueue_aux); 1715 1716 ath10k_debug_destroy(ar); 1717 ath10k_mac_destroy(ar); 1718 } 1719 EXPORT_SYMBOL(ath10k_core_destroy); 1720 1721 MODULE_AUTHOR("Qualcomm Atheros"); 1722 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); 1723 MODULE_LICENSE("Dual BSD/GPL"); 1724