1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/firmware.h> 21 #include <linux/of.h> 22 #include <linux/dmi.h> 23 #include <linux/ctype.h> 24 #include <asm/byteorder.h> 25 26 #include "core.h" 27 #include "mac.h" 28 #include "htc.h" 29 #include "hif.h" 30 #include "wmi.h" 31 #include "bmi.h" 32 #include "debug.h" 33 #include "htt.h" 34 #include "testmode.h" 35 #include "wmi-ops.h" 36 #include "coredump.h" 37 38 unsigned int ath10k_debug_mask; 39 static unsigned int ath10k_cryptmode_param; 40 static bool uart_print; 41 static bool skip_otp; 42 static bool rawmode; 43 44 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 45 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 46 47 /* FIXME: most of these should be readonly */ 48 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 49 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 50 module_param(uart_print, bool, 0644); 51 module_param(skip_otp, bool, 0644); 52 module_param(rawmode, bool, 0644); 53 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 54 55 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 56 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 57 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 58 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 59 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 60 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 61 62 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 63 { 64 .id = QCA988X_HW_2_0_VERSION, 65 .dev_id = QCA988X_2_0_DEVICE_ID, 66 .name = "qca988x hw2.0", 67 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 68 .uart_pin = 7, 69 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 70 .otp_exe_param = 0, 71 .channel_counters_freq_hz = 88000, 72 .max_probe_resp_desc_thres = 0, 73 .cal_data_len = 2116, 74 .fw = { 75 .dir = QCA988X_HW_2_0_FW_DIR, 76 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 77 .board_size = QCA988X_BOARD_DATA_SZ, 78 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 79 }, 80 .hw_ops = &qca988x_ops, 81 .decap_align_bytes = 4, 82 .spectral_bin_discard = 0, 83 .spectral_bin_offset = 0, 84 .vht160_mcs_rx_highest = 0, 85 .vht160_mcs_tx_highest = 0, 86 .n_cipher_suites = 8, 87 .num_peers = TARGET_TLV_NUM_PEERS, 88 .ast_skid_limit = 0x10, 89 .num_wds_entries = 0x20, 90 .target_64bit = false, 91 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 92 .shadow_reg_support = false, 93 .rri_on_ddr = false, 94 .hw_filter_reset_required = true, 95 }, 96 { 97 .id = QCA988X_HW_2_0_VERSION, 98 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 99 .name = "qca988x hw2.0 ubiquiti", 100 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 101 .uart_pin = 7, 102 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 103 .otp_exe_param = 0, 104 .channel_counters_freq_hz = 88000, 105 .max_probe_resp_desc_thres = 0, 106 .cal_data_len = 2116, 107 .fw = { 108 .dir = QCA988X_HW_2_0_FW_DIR, 109 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 110 .board_size = QCA988X_BOARD_DATA_SZ, 111 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 112 }, 113 .hw_ops = &qca988x_ops, 114 .decap_align_bytes = 4, 115 .spectral_bin_discard = 0, 116 .spectral_bin_offset = 0, 117 .vht160_mcs_rx_highest = 0, 118 .vht160_mcs_tx_highest = 0, 119 .n_cipher_suites = 8, 120 .num_peers = TARGET_TLV_NUM_PEERS, 121 .ast_skid_limit = 0x10, 122 .num_wds_entries = 0x20, 123 .target_64bit = false, 124 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 125 .per_ce_irq = false, 126 .shadow_reg_support = false, 127 .rri_on_ddr = false, 128 .hw_filter_reset_required = true, 129 }, 130 { 131 .id = QCA9887_HW_1_0_VERSION, 132 .dev_id = QCA9887_1_0_DEVICE_ID, 133 .name = "qca9887 hw1.0", 134 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 135 .uart_pin = 7, 136 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 2116, 141 .fw = { 142 .dir = QCA9887_HW_1_0_FW_DIR, 143 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 144 .board_size = QCA9887_BOARD_DATA_SZ, 145 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 .spectral_bin_discard = 0, 150 .spectral_bin_offset = 0, 151 .vht160_mcs_rx_highest = 0, 152 .vht160_mcs_tx_highest = 0, 153 .n_cipher_suites = 8, 154 .num_peers = TARGET_TLV_NUM_PEERS, 155 .ast_skid_limit = 0x10, 156 .num_wds_entries = 0x20, 157 .target_64bit = false, 158 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 159 .per_ce_irq = false, 160 .shadow_reg_support = false, 161 .rri_on_ddr = false, 162 .hw_filter_reset_required = true, 163 }, 164 { 165 .id = QCA6174_HW_2_1_VERSION, 166 .dev_id = QCA6164_2_1_DEVICE_ID, 167 .name = "qca6164 hw2.1", 168 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 169 .uart_pin = 6, 170 .otp_exe_param = 0, 171 .channel_counters_freq_hz = 88000, 172 .max_probe_resp_desc_thres = 0, 173 .cal_data_len = 8124, 174 .fw = { 175 .dir = QCA6174_HW_2_1_FW_DIR, 176 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 177 .board_size = QCA6174_BOARD_DATA_SZ, 178 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 179 }, 180 .hw_ops = &qca988x_ops, 181 .decap_align_bytes = 4, 182 .spectral_bin_discard = 0, 183 .spectral_bin_offset = 0, 184 .vht160_mcs_rx_highest = 0, 185 .vht160_mcs_tx_highest = 0, 186 .n_cipher_suites = 8, 187 .num_peers = TARGET_TLV_NUM_PEERS, 188 .ast_skid_limit = 0x10, 189 .num_wds_entries = 0x20, 190 .target_64bit = false, 191 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 192 .per_ce_irq = false, 193 .shadow_reg_support = false, 194 .rri_on_ddr = false, 195 .hw_filter_reset_required = true, 196 }, 197 { 198 .id = QCA6174_HW_2_1_VERSION, 199 .dev_id = QCA6174_2_1_DEVICE_ID, 200 .name = "qca6174 hw2.1", 201 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 202 .uart_pin = 6, 203 .otp_exe_param = 0, 204 .channel_counters_freq_hz = 88000, 205 .max_probe_resp_desc_thres = 0, 206 .cal_data_len = 8124, 207 .fw = { 208 .dir = QCA6174_HW_2_1_FW_DIR, 209 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 210 .board_size = QCA6174_BOARD_DATA_SZ, 211 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 212 }, 213 .hw_ops = &qca988x_ops, 214 .decap_align_bytes = 4, 215 .spectral_bin_discard = 0, 216 .spectral_bin_offset = 0, 217 .vht160_mcs_rx_highest = 0, 218 .vht160_mcs_tx_highest = 0, 219 .n_cipher_suites = 8, 220 .num_peers = TARGET_TLV_NUM_PEERS, 221 .ast_skid_limit = 0x10, 222 .num_wds_entries = 0x20, 223 .target_64bit = false, 224 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 225 .per_ce_irq = false, 226 .shadow_reg_support = false, 227 .rri_on_ddr = false, 228 .hw_filter_reset_required = true, 229 }, 230 { 231 .id = QCA6174_HW_3_0_VERSION, 232 .dev_id = QCA6174_2_1_DEVICE_ID, 233 .name = "qca6174 hw3.0", 234 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 235 .uart_pin = 6, 236 .otp_exe_param = 0, 237 .channel_counters_freq_hz = 88000, 238 .max_probe_resp_desc_thres = 0, 239 .cal_data_len = 8124, 240 .fw = { 241 .dir = QCA6174_HW_3_0_FW_DIR, 242 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 243 .board_size = QCA6174_BOARD_DATA_SZ, 244 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 245 }, 246 .hw_ops = &qca988x_ops, 247 .decap_align_bytes = 4, 248 .spectral_bin_discard = 0, 249 .spectral_bin_offset = 0, 250 .vht160_mcs_rx_highest = 0, 251 .vht160_mcs_tx_highest = 0, 252 .n_cipher_suites = 8, 253 .num_peers = TARGET_TLV_NUM_PEERS, 254 .ast_skid_limit = 0x10, 255 .num_wds_entries = 0x20, 256 .target_64bit = false, 257 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 258 .per_ce_irq = false, 259 .shadow_reg_support = false, 260 .rri_on_ddr = false, 261 .hw_filter_reset_required = true, 262 }, 263 { 264 .id = QCA6174_HW_3_2_VERSION, 265 .dev_id = QCA6174_2_1_DEVICE_ID, 266 .name = "qca6174 hw3.2", 267 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 268 .uart_pin = 6, 269 .otp_exe_param = 0, 270 .channel_counters_freq_hz = 88000, 271 .max_probe_resp_desc_thres = 0, 272 .cal_data_len = 8124, 273 .fw = { 274 /* uses same binaries as hw3.0 */ 275 .dir = QCA6174_HW_3_0_FW_DIR, 276 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 277 .board_size = QCA6174_BOARD_DATA_SZ, 278 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 279 }, 280 .hw_ops = &qca6174_ops, 281 .hw_clk = qca6174_clk, 282 .target_cpu_freq = 176000000, 283 .decap_align_bytes = 4, 284 .spectral_bin_discard = 0, 285 .spectral_bin_offset = 0, 286 .vht160_mcs_rx_highest = 0, 287 .vht160_mcs_tx_highest = 0, 288 .n_cipher_suites = 8, 289 .num_peers = TARGET_TLV_NUM_PEERS, 290 .ast_skid_limit = 0x10, 291 .num_wds_entries = 0x20, 292 .target_64bit = false, 293 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 294 .per_ce_irq = false, 295 .shadow_reg_support = false, 296 .rri_on_ddr = false, 297 .hw_filter_reset_required = true, 298 }, 299 { 300 .id = QCA99X0_HW_2_0_DEV_VERSION, 301 .dev_id = QCA99X0_2_0_DEVICE_ID, 302 .name = "qca99x0 hw2.0", 303 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 304 .uart_pin = 7, 305 .otp_exe_param = 0x00000700, 306 .continuous_frag_desc = true, 307 .cck_rate_map_rev2 = true, 308 .channel_counters_freq_hz = 150000, 309 .max_probe_resp_desc_thres = 24, 310 .tx_chain_mask = 0xf, 311 .rx_chain_mask = 0xf, 312 .max_spatial_stream = 4, 313 .cal_data_len = 12064, 314 .fw = { 315 .dir = QCA99X0_HW_2_0_FW_DIR, 316 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 317 .board_size = QCA99X0_BOARD_DATA_SZ, 318 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 319 }, 320 .sw_decrypt_mcast_mgmt = true, 321 .hw_ops = &qca99x0_ops, 322 .decap_align_bytes = 1, 323 .spectral_bin_discard = 4, 324 .spectral_bin_offset = 0, 325 .vht160_mcs_rx_highest = 0, 326 .vht160_mcs_tx_highest = 0, 327 .n_cipher_suites = 11, 328 .num_peers = TARGET_TLV_NUM_PEERS, 329 .ast_skid_limit = 0x10, 330 .num_wds_entries = 0x20, 331 .target_64bit = false, 332 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 333 .per_ce_irq = false, 334 .shadow_reg_support = false, 335 .rri_on_ddr = false, 336 .hw_filter_reset_required = true, 337 }, 338 { 339 .id = QCA9984_HW_1_0_DEV_VERSION, 340 .dev_id = QCA9984_1_0_DEVICE_ID, 341 .name = "qca9984/qca9994 hw1.0", 342 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 343 .uart_pin = 7, 344 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 345 .otp_exe_param = 0x00000700, 346 .continuous_frag_desc = true, 347 .cck_rate_map_rev2 = true, 348 .channel_counters_freq_hz = 150000, 349 .max_probe_resp_desc_thres = 24, 350 .tx_chain_mask = 0xf, 351 .rx_chain_mask = 0xf, 352 .max_spatial_stream = 4, 353 .cal_data_len = 12064, 354 .fw = { 355 .dir = QCA9984_HW_1_0_FW_DIR, 356 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 357 .board_size = QCA99X0_BOARD_DATA_SZ, 358 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 359 }, 360 .sw_decrypt_mcast_mgmt = true, 361 .hw_ops = &qca99x0_ops, 362 .decap_align_bytes = 1, 363 .spectral_bin_discard = 12, 364 .spectral_bin_offset = 8, 365 366 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 367 * or 2x2 160Mhz, long-guard-interval. 368 */ 369 .vht160_mcs_rx_highest = 1560, 370 .vht160_mcs_tx_highest = 1560, 371 .n_cipher_suites = 11, 372 .num_peers = TARGET_TLV_NUM_PEERS, 373 .ast_skid_limit = 0x10, 374 .num_wds_entries = 0x20, 375 .target_64bit = false, 376 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 377 .per_ce_irq = false, 378 .shadow_reg_support = false, 379 .rri_on_ddr = false, 380 .hw_filter_reset_required = true, 381 }, 382 { 383 .id = QCA9888_HW_2_0_DEV_VERSION, 384 .dev_id = QCA9888_2_0_DEVICE_ID, 385 .name = "qca9888 hw2.0", 386 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 387 .uart_pin = 7, 388 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 389 .otp_exe_param = 0x00000700, 390 .continuous_frag_desc = true, 391 .channel_counters_freq_hz = 150000, 392 .max_probe_resp_desc_thres = 24, 393 .tx_chain_mask = 3, 394 .rx_chain_mask = 3, 395 .max_spatial_stream = 2, 396 .cal_data_len = 12064, 397 .fw = { 398 .dir = QCA9888_HW_2_0_FW_DIR, 399 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 400 .board_size = QCA99X0_BOARD_DATA_SZ, 401 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 402 }, 403 .sw_decrypt_mcast_mgmt = true, 404 .hw_ops = &qca99x0_ops, 405 .decap_align_bytes = 1, 406 .spectral_bin_discard = 12, 407 .spectral_bin_offset = 8, 408 409 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 410 * 1x1 160Mhz, long-guard-interval. 411 */ 412 .vht160_mcs_rx_highest = 780, 413 .vht160_mcs_tx_highest = 780, 414 .n_cipher_suites = 11, 415 .num_peers = TARGET_TLV_NUM_PEERS, 416 .ast_skid_limit = 0x10, 417 .num_wds_entries = 0x20, 418 .target_64bit = false, 419 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 420 .per_ce_irq = false, 421 .shadow_reg_support = false, 422 .rri_on_ddr = false, 423 .hw_filter_reset_required = true, 424 }, 425 { 426 .id = QCA9377_HW_1_0_DEV_VERSION, 427 .dev_id = QCA9377_1_0_DEVICE_ID, 428 .name = "qca9377 hw1.0", 429 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 430 .uart_pin = 6, 431 .otp_exe_param = 0, 432 .channel_counters_freq_hz = 88000, 433 .max_probe_resp_desc_thres = 0, 434 .cal_data_len = 8124, 435 .fw = { 436 .dir = QCA9377_HW_1_0_FW_DIR, 437 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 438 .board_size = QCA9377_BOARD_DATA_SZ, 439 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 440 }, 441 .hw_ops = &qca988x_ops, 442 .decap_align_bytes = 4, 443 .spectral_bin_discard = 0, 444 .spectral_bin_offset = 0, 445 .vht160_mcs_rx_highest = 0, 446 .vht160_mcs_tx_highest = 0, 447 .n_cipher_suites = 8, 448 .num_peers = TARGET_TLV_NUM_PEERS, 449 .ast_skid_limit = 0x10, 450 .num_wds_entries = 0x20, 451 .target_64bit = false, 452 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 453 .per_ce_irq = false, 454 .shadow_reg_support = false, 455 .rri_on_ddr = false, 456 .hw_filter_reset_required = true, 457 }, 458 { 459 .id = QCA9377_HW_1_1_DEV_VERSION, 460 .dev_id = QCA9377_1_0_DEVICE_ID, 461 .name = "qca9377 hw1.1", 462 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 463 .uart_pin = 6, 464 .otp_exe_param = 0, 465 .channel_counters_freq_hz = 88000, 466 .max_probe_resp_desc_thres = 0, 467 .cal_data_len = 8124, 468 .fw = { 469 .dir = QCA9377_HW_1_0_FW_DIR, 470 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 471 .board_size = QCA9377_BOARD_DATA_SZ, 472 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 473 }, 474 .hw_ops = &qca6174_ops, 475 .hw_clk = qca6174_clk, 476 .target_cpu_freq = 176000000, 477 .decap_align_bytes = 4, 478 .spectral_bin_discard = 0, 479 .spectral_bin_offset = 0, 480 .vht160_mcs_rx_highest = 0, 481 .vht160_mcs_tx_highest = 0, 482 .n_cipher_suites = 8, 483 .num_peers = TARGET_TLV_NUM_PEERS, 484 .ast_skid_limit = 0x10, 485 .num_wds_entries = 0x20, 486 .target_64bit = false, 487 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 488 .per_ce_irq = false, 489 .shadow_reg_support = false, 490 .rri_on_ddr = false, 491 .hw_filter_reset_required = true, 492 }, 493 { 494 .id = QCA4019_HW_1_0_DEV_VERSION, 495 .dev_id = 0, 496 .name = "qca4019 hw1.0", 497 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 498 .uart_pin = 7, 499 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 500 .otp_exe_param = 0x0010000, 501 .continuous_frag_desc = true, 502 .cck_rate_map_rev2 = true, 503 .channel_counters_freq_hz = 125000, 504 .max_probe_resp_desc_thres = 24, 505 .tx_chain_mask = 0x3, 506 .rx_chain_mask = 0x3, 507 .max_spatial_stream = 2, 508 .cal_data_len = 12064, 509 .fw = { 510 .dir = QCA4019_HW_1_0_FW_DIR, 511 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 512 .board_size = QCA4019_BOARD_DATA_SZ, 513 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 514 }, 515 .sw_decrypt_mcast_mgmt = true, 516 .hw_ops = &qca99x0_ops, 517 .decap_align_bytes = 1, 518 .spectral_bin_discard = 4, 519 .spectral_bin_offset = 0, 520 .vht160_mcs_rx_highest = 0, 521 .vht160_mcs_tx_highest = 0, 522 .n_cipher_suites = 11, 523 .num_peers = TARGET_TLV_NUM_PEERS, 524 .ast_skid_limit = 0x10, 525 .num_wds_entries = 0x20, 526 .target_64bit = false, 527 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 528 .per_ce_irq = false, 529 .shadow_reg_support = false, 530 .rri_on_ddr = false, 531 .hw_filter_reset_required = true, 532 }, 533 { 534 .id = WCN3990_HW_1_0_DEV_VERSION, 535 .dev_id = 0, 536 .name = "wcn3990 hw1.0", 537 .continuous_frag_desc = true, 538 .tx_chain_mask = 0x7, 539 .rx_chain_mask = 0x7, 540 .max_spatial_stream = 4, 541 .fw = { 542 .dir = WCN3990_HW_1_0_FW_DIR, 543 }, 544 .sw_decrypt_mcast_mgmt = true, 545 .hw_ops = &wcn3990_ops, 546 .decap_align_bytes = 1, 547 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 548 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 549 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 550 .target_64bit = true, 551 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 552 .per_ce_irq = true, 553 .shadow_reg_support = true, 554 .rri_on_ddr = true, 555 .hw_filter_reset_required = false, 556 }, 557 }; 558 559 static const char *const ath10k_core_fw_feature_str[] = { 560 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 561 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 562 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 563 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 564 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 565 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 566 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 567 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 568 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 569 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 570 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 571 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 572 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 573 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 574 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 575 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 576 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 577 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 578 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 579 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 580 }; 581 582 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 583 size_t buf_len, 584 enum ath10k_fw_features feat) 585 { 586 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 587 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 588 ATH10K_FW_FEATURE_COUNT); 589 590 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 591 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 592 return scnprintf(buf, buf_len, "bit%d", feat); 593 } 594 595 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 596 } 597 598 void ath10k_core_get_fw_features_str(struct ath10k *ar, 599 char *buf, 600 size_t buf_len) 601 { 602 size_t len = 0; 603 int i; 604 605 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 606 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 607 if (len > 0) 608 len += scnprintf(buf + len, buf_len - len, ","); 609 610 len += ath10k_core_get_fw_feature_str(buf + len, 611 buf_len - len, 612 i); 613 } 614 } 615 } 616 617 static void ath10k_send_suspend_complete(struct ath10k *ar) 618 { 619 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 620 621 complete(&ar->target_suspend); 622 } 623 624 static void ath10k_init_sdio(struct ath10k *ar) 625 { 626 u32 param = 0; 627 628 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 629 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 630 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 631 632 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 633 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 634 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 635 636 ath10k_bmi_write32(ar, hi_acs_flags, param); 637 } 638 639 static int ath10k_init_configure_target(struct ath10k *ar) 640 { 641 u32 param_host; 642 int ret; 643 644 /* tell target which HTC version it is used*/ 645 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 646 HTC_PROTOCOL_VERSION); 647 if (ret) { 648 ath10k_err(ar, "settings HTC version failed\n"); 649 return ret; 650 } 651 652 /* set the firmware mode to STA/IBSS/AP */ 653 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 654 if (ret) { 655 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 656 return ret; 657 } 658 659 /* TODO following parameters need to be re-visited. */ 660 /* num_device */ 661 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 662 /* Firmware mode */ 663 /* FIXME: Why FW_MODE_AP ??.*/ 664 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 665 /* mac_addr_method */ 666 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 667 /* firmware_bridge */ 668 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 669 /* fwsubmode */ 670 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 671 672 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 673 if (ret) { 674 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 675 return ret; 676 } 677 678 /* We do all byte-swapping on the host */ 679 ret = ath10k_bmi_write32(ar, hi_be, 0); 680 if (ret) { 681 ath10k_err(ar, "setting host CPU BE mode failed\n"); 682 return ret; 683 } 684 685 /* FW descriptor/Data swap flags */ 686 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 687 688 if (ret) { 689 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 690 return ret; 691 } 692 693 /* Some devices have a special sanity check that verifies the PCI 694 * Device ID is written to this host interest var. It is known to be 695 * required to boot QCA6164. 696 */ 697 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 698 ar->dev_id); 699 if (ret) { 700 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 701 return ret; 702 } 703 704 return 0; 705 } 706 707 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 708 const char *dir, 709 const char *file) 710 { 711 char filename[100]; 712 const struct firmware *fw; 713 int ret; 714 715 if (file == NULL) 716 return ERR_PTR(-ENOENT); 717 718 if (dir == NULL) 719 dir = "."; 720 721 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 722 ret = firmware_request_nowarn(&fw, filename, ar->dev); 723 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 724 filename, ret); 725 726 if (ret) 727 return ERR_PTR(ret); 728 729 return fw; 730 } 731 732 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 733 size_t data_len) 734 { 735 u32 board_data_size = ar->hw_params.fw.board_size; 736 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 737 u32 board_ext_data_addr; 738 int ret; 739 740 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 741 if (ret) { 742 ath10k_err(ar, "could not read board ext data addr (%d)\n", 743 ret); 744 return ret; 745 } 746 747 ath10k_dbg(ar, ATH10K_DBG_BOOT, 748 "boot push board extended data addr 0x%x\n", 749 board_ext_data_addr); 750 751 if (board_ext_data_addr == 0) 752 return 0; 753 754 if (data_len != (board_data_size + board_ext_data_size)) { 755 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 756 data_len, board_data_size, board_ext_data_size); 757 return -EINVAL; 758 } 759 760 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 761 data + board_data_size, 762 board_ext_data_size); 763 if (ret) { 764 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 765 return ret; 766 } 767 768 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 769 (board_ext_data_size << 16) | 1); 770 if (ret) { 771 ath10k_err(ar, "could not write board ext data bit (%d)\n", 772 ret); 773 return ret; 774 } 775 776 return 0; 777 } 778 779 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 780 size_t data_len) 781 { 782 u32 board_data_size = ar->hw_params.fw.board_size; 783 u32 address; 784 int ret; 785 786 ret = ath10k_push_board_ext_data(ar, data, data_len); 787 if (ret) { 788 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 789 goto exit; 790 } 791 792 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 793 if (ret) { 794 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 795 goto exit; 796 } 797 798 ret = ath10k_bmi_write_memory(ar, address, data, 799 min_t(u32, board_data_size, 800 data_len)); 801 if (ret) { 802 ath10k_err(ar, "could not write board data (%d)\n", ret); 803 goto exit; 804 } 805 806 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 807 if (ret) { 808 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 809 goto exit; 810 } 811 812 exit: 813 return ret; 814 } 815 816 static int ath10k_download_cal_file(struct ath10k *ar, 817 const struct firmware *file) 818 { 819 int ret; 820 821 if (!file) 822 return -ENOENT; 823 824 if (IS_ERR(file)) 825 return PTR_ERR(file); 826 827 ret = ath10k_download_board_data(ar, file->data, file->size); 828 if (ret) { 829 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 830 return ret; 831 } 832 833 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 834 835 return 0; 836 } 837 838 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 839 { 840 struct device_node *node; 841 int data_len; 842 void *data; 843 int ret; 844 845 node = ar->dev->of_node; 846 if (!node) 847 /* Device Tree is optional, don't print any warnings if 848 * there's no node for ath10k. 849 */ 850 return -ENOENT; 851 852 if (!of_get_property(node, dt_name, &data_len)) { 853 /* The calibration data node is optional */ 854 return -ENOENT; 855 } 856 857 if (data_len != ar->hw_params.cal_data_len) { 858 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 859 data_len); 860 ret = -EMSGSIZE; 861 goto out; 862 } 863 864 data = kmalloc(data_len, GFP_KERNEL); 865 if (!data) { 866 ret = -ENOMEM; 867 goto out; 868 } 869 870 ret = of_property_read_u8_array(node, dt_name, data, data_len); 871 if (ret) { 872 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 873 ret); 874 goto out_free; 875 } 876 877 ret = ath10k_download_board_data(ar, data, data_len); 878 if (ret) { 879 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 880 ret); 881 goto out_free; 882 } 883 884 ret = 0; 885 886 out_free: 887 kfree(data); 888 889 out: 890 return ret; 891 } 892 893 static int ath10k_download_cal_eeprom(struct ath10k *ar) 894 { 895 size_t data_len; 896 void *data = NULL; 897 int ret; 898 899 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 900 if (ret) { 901 if (ret != -EOPNOTSUPP) 902 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 903 ret); 904 goto out_free; 905 } 906 907 ret = ath10k_download_board_data(ar, data, data_len); 908 if (ret) { 909 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 910 ret); 911 goto out_free; 912 } 913 914 ret = 0; 915 916 out_free: 917 kfree(data); 918 919 return ret; 920 } 921 922 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 923 { 924 u32 result, address; 925 u8 board_id, chip_id; 926 int ret, bmi_board_id_param; 927 928 address = ar->hw_params.patch_load_addr; 929 930 if (!ar->normal_mode_fw.fw_file.otp_data || 931 !ar->normal_mode_fw.fw_file.otp_len) { 932 ath10k_warn(ar, 933 "failed to retrieve board id because of invalid otp\n"); 934 return -ENODATA; 935 } 936 937 ath10k_dbg(ar, ATH10K_DBG_BOOT, 938 "boot upload otp to 0x%x len %zd for board id\n", 939 address, ar->normal_mode_fw.fw_file.otp_len); 940 941 ret = ath10k_bmi_fast_download(ar, address, 942 ar->normal_mode_fw.fw_file.otp_data, 943 ar->normal_mode_fw.fw_file.otp_len); 944 if (ret) { 945 ath10k_err(ar, "could not write otp for board id check: %d\n", 946 ret); 947 return ret; 948 } 949 950 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 951 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 952 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 953 else 954 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 955 956 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 957 if (ret) { 958 ath10k_err(ar, "could not execute otp for board id check: %d\n", 959 ret); 960 return ret; 961 } 962 963 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 964 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 965 966 ath10k_dbg(ar, ATH10K_DBG_BOOT, 967 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 968 result, board_id, chip_id); 969 970 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 971 (board_id == 0)) { 972 ath10k_dbg(ar, ATH10K_DBG_BOOT, 973 "board id does not exist in otp, ignore it\n"); 974 return -EOPNOTSUPP; 975 } 976 977 ar->id.bmi_ids_valid = true; 978 ar->id.bmi_board_id = board_id; 979 ar->id.bmi_chip_id = chip_id; 980 981 return 0; 982 } 983 984 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 985 { 986 struct ath10k *ar = data; 987 const char *bdf_ext; 988 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 989 u8 bdf_enabled; 990 int i; 991 992 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 993 return; 994 995 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 996 ath10k_dbg(ar, ATH10K_DBG_BOOT, 997 "wrong smbios bdf ext type length (%d).\n", 998 hdr->length); 999 return; 1000 } 1001 1002 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 1003 if (!bdf_enabled) { 1004 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 1005 return; 1006 } 1007 1008 /* Only one string exists (per spec) */ 1009 bdf_ext = (char *)hdr + hdr->length; 1010 1011 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 1012 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1013 "bdf variant magic does not match.\n"); 1014 return; 1015 } 1016 1017 for (i = 0; i < strlen(bdf_ext); i++) { 1018 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 1019 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1020 "bdf variant name contains non ascii chars.\n"); 1021 return; 1022 } 1023 } 1024 1025 /* Copy extension name without magic suffix */ 1026 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 1027 sizeof(ar->id.bdf_ext)) < 0) { 1028 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1029 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1030 bdf_ext); 1031 return; 1032 } 1033 1034 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1035 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 1036 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 1037 } 1038 1039 static int ath10k_core_check_smbios(struct ath10k *ar) 1040 { 1041 ar->id.bdf_ext[0] = '\0'; 1042 dmi_walk(ath10k_core_check_bdfext, ar); 1043 1044 if (ar->id.bdf_ext[0] == '\0') 1045 return -ENODATA; 1046 1047 return 0; 1048 } 1049 1050 static int ath10k_core_check_dt(struct ath10k *ar) 1051 { 1052 struct device_node *node; 1053 const char *variant = NULL; 1054 1055 node = ar->dev->of_node; 1056 if (!node) 1057 return -ENOENT; 1058 1059 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1060 &variant); 1061 if (!variant) 1062 return -ENODATA; 1063 1064 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1065 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1066 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1067 variant); 1068 1069 return 0; 1070 } 1071 1072 static int ath10k_download_and_run_otp(struct ath10k *ar) 1073 { 1074 u32 result, address = ar->hw_params.patch_load_addr; 1075 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1076 int ret; 1077 1078 ret = ath10k_download_board_data(ar, 1079 ar->running_fw->board_data, 1080 ar->running_fw->board_len); 1081 if (ret) { 1082 ath10k_err(ar, "failed to download board data: %d\n", ret); 1083 return ret; 1084 } 1085 1086 /* OTP is optional */ 1087 1088 if (!ar->running_fw->fw_file.otp_data || 1089 !ar->running_fw->fw_file.otp_len) { 1090 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1091 ar->running_fw->fw_file.otp_data, 1092 ar->running_fw->fw_file.otp_len); 1093 return 0; 1094 } 1095 1096 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1097 address, ar->running_fw->fw_file.otp_len); 1098 1099 ret = ath10k_bmi_fast_download(ar, address, 1100 ar->running_fw->fw_file.otp_data, 1101 ar->running_fw->fw_file.otp_len); 1102 if (ret) { 1103 ath10k_err(ar, "could not write otp (%d)\n", ret); 1104 return ret; 1105 } 1106 1107 /* As of now pre-cal is valid for 10_4 variants */ 1108 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1109 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1110 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1111 1112 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1113 if (ret) { 1114 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1115 return ret; 1116 } 1117 1118 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1119 1120 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1121 ar->running_fw->fw_file.fw_features)) && 1122 result != 0) { 1123 ath10k_err(ar, "otp calibration failed: %d", result); 1124 return -EINVAL; 1125 } 1126 1127 return 0; 1128 } 1129 1130 static int ath10k_download_fw(struct ath10k *ar) 1131 { 1132 u32 address, data_len; 1133 const void *data; 1134 int ret; 1135 1136 address = ar->hw_params.patch_load_addr; 1137 1138 data = ar->running_fw->fw_file.firmware_data; 1139 data_len = ar->running_fw->fw_file.firmware_len; 1140 1141 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1142 if (ret) { 1143 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1144 ret); 1145 return ret; 1146 } 1147 1148 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1149 "boot uploading firmware image %pK len %d\n", 1150 data, data_len); 1151 1152 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1153 if (ret) { 1154 ath10k_err(ar, "failed to download firmware: %d\n", 1155 ret); 1156 return ret; 1157 } 1158 1159 return ret; 1160 } 1161 1162 static void ath10k_core_free_board_files(struct ath10k *ar) 1163 { 1164 if (!IS_ERR(ar->normal_mode_fw.board)) 1165 release_firmware(ar->normal_mode_fw.board); 1166 1167 ar->normal_mode_fw.board = NULL; 1168 ar->normal_mode_fw.board_data = NULL; 1169 ar->normal_mode_fw.board_len = 0; 1170 } 1171 1172 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1173 { 1174 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1175 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1176 1177 if (!IS_ERR(ar->cal_file)) 1178 release_firmware(ar->cal_file); 1179 1180 if (!IS_ERR(ar->pre_cal_file)) 1181 release_firmware(ar->pre_cal_file); 1182 1183 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1184 1185 ar->normal_mode_fw.fw_file.otp_data = NULL; 1186 ar->normal_mode_fw.fw_file.otp_len = 0; 1187 1188 ar->normal_mode_fw.fw_file.firmware = NULL; 1189 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1190 ar->normal_mode_fw.fw_file.firmware_len = 0; 1191 1192 ar->cal_file = NULL; 1193 ar->pre_cal_file = NULL; 1194 } 1195 1196 static int ath10k_fetch_cal_file(struct ath10k *ar) 1197 { 1198 char filename[100]; 1199 1200 /* pre-cal-<bus>-<id>.bin */ 1201 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1202 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1203 1204 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1205 if (!IS_ERR(ar->pre_cal_file)) 1206 goto success; 1207 1208 /* cal-<bus>-<id>.bin */ 1209 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1210 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1211 1212 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1213 if (IS_ERR(ar->cal_file)) 1214 /* calibration file is optional, don't print any warnings */ 1215 return PTR_ERR(ar->cal_file); 1216 success: 1217 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1218 ATH10K_FW_DIR, filename); 1219 1220 return 0; 1221 } 1222 1223 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 1224 { 1225 if (!ar->hw_params.fw.board) { 1226 ath10k_err(ar, "failed to find board file fw entry\n"); 1227 return -EINVAL; 1228 } 1229 1230 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1231 ar->hw_params.fw.dir, 1232 ar->hw_params.fw.board); 1233 if (IS_ERR(ar->normal_mode_fw.board)) 1234 return PTR_ERR(ar->normal_mode_fw.board); 1235 1236 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1237 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1238 1239 return 0; 1240 } 1241 1242 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1243 const void *buf, size_t buf_len, 1244 const char *boardname) 1245 { 1246 const struct ath10k_fw_ie *hdr; 1247 bool name_match_found; 1248 int ret, board_ie_id; 1249 size_t board_ie_len; 1250 const void *board_ie_data; 1251 1252 name_match_found = false; 1253 1254 /* go through ATH10K_BD_IE_BOARD_ elements */ 1255 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1256 hdr = buf; 1257 board_ie_id = le32_to_cpu(hdr->id); 1258 board_ie_len = le32_to_cpu(hdr->len); 1259 board_ie_data = hdr->data; 1260 1261 buf_len -= sizeof(*hdr); 1262 buf += sizeof(*hdr); 1263 1264 if (buf_len < ALIGN(board_ie_len, 4)) { 1265 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1266 buf_len, ALIGN(board_ie_len, 4)); 1267 ret = -EINVAL; 1268 goto out; 1269 } 1270 1271 switch (board_ie_id) { 1272 case ATH10K_BD_IE_BOARD_NAME: 1273 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1274 board_ie_data, board_ie_len); 1275 1276 if (board_ie_len != strlen(boardname)) 1277 break; 1278 1279 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1280 if (ret) 1281 break; 1282 1283 name_match_found = true; 1284 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1285 "boot found match for name '%s'", 1286 boardname); 1287 break; 1288 case ATH10K_BD_IE_BOARD_DATA: 1289 if (!name_match_found) 1290 /* no match found */ 1291 break; 1292 1293 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1294 "boot found board data for '%s'", 1295 boardname); 1296 1297 ar->normal_mode_fw.board_data = board_ie_data; 1298 ar->normal_mode_fw.board_len = board_ie_len; 1299 1300 ret = 0; 1301 goto out; 1302 default: 1303 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1304 board_ie_id); 1305 break; 1306 } 1307 1308 /* jump over the padding */ 1309 board_ie_len = ALIGN(board_ie_len, 4); 1310 1311 buf_len -= board_ie_len; 1312 buf += board_ie_len; 1313 } 1314 1315 /* no match found */ 1316 ret = -ENOENT; 1317 1318 out: 1319 return ret; 1320 } 1321 1322 static int ath10k_core_search_bd(struct ath10k *ar, 1323 const char *boardname, 1324 const u8 *data, 1325 size_t len) 1326 { 1327 size_t ie_len; 1328 struct ath10k_fw_ie *hdr; 1329 int ret = -ENOENT, ie_id; 1330 1331 while (len > sizeof(struct ath10k_fw_ie)) { 1332 hdr = (struct ath10k_fw_ie *)data; 1333 ie_id = le32_to_cpu(hdr->id); 1334 ie_len = le32_to_cpu(hdr->len); 1335 1336 len -= sizeof(*hdr); 1337 data = hdr->data; 1338 1339 if (len < ALIGN(ie_len, 4)) { 1340 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1341 ie_id, ie_len, len); 1342 return -EINVAL; 1343 } 1344 1345 switch (ie_id) { 1346 case ATH10K_BD_IE_BOARD: 1347 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1348 boardname); 1349 if (ret == -ENOENT) 1350 /* no match found, continue */ 1351 break; 1352 1353 /* either found or error, so stop searching */ 1354 goto out; 1355 } 1356 1357 /* jump over the padding */ 1358 ie_len = ALIGN(ie_len, 4); 1359 1360 len -= ie_len; 1361 data += ie_len; 1362 } 1363 1364 out: 1365 /* return result of parse_bd_ie_board() or -ENOENT */ 1366 return ret; 1367 } 1368 1369 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1370 const char *boardname, 1371 const char *fallback_boardname, 1372 const char *filename) 1373 { 1374 size_t len, magic_len; 1375 const u8 *data; 1376 int ret; 1377 1378 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1379 ar->hw_params.fw.dir, 1380 filename); 1381 if (IS_ERR(ar->normal_mode_fw.board)) 1382 return PTR_ERR(ar->normal_mode_fw.board); 1383 1384 data = ar->normal_mode_fw.board->data; 1385 len = ar->normal_mode_fw.board->size; 1386 1387 /* magic has extra null byte padded */ 1388 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1389 if (len < magic_len) { 1390 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1391 ar->hw_params.fw.dir, filename, len); 1392 ret = -EINVAL; 1393 goto err; 1394 } 1395 1396 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1397 ath10k_err(ar, "found invalid board magic\n"); 1398 ret = -EINVAL; 1399 goto err; 1400 } 1401 1402 /* magic is padded to 4 bytes */ 1403 magic_len = ALIGN(magic_len, 4); 1404 if (len < magic_len) { 1405 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1406 ar->hw_params.fw.dir, filename, len); 1407 ret = -EINVAL; 1408 goto err; 1409 } 1410 1411 data += magic_len; 1412 len -= magic_len; 1413 1414 /* attempt to find boardname in the IE list */ 1415 ret = ath10k_core_search_bd(ar, boardname, data, len); 1416 1417 /* if we didn't find it and have a fallback name, try that */ 1418 if (ret == -ENOENT && fallback_boardname) 1419 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1420 1421 if (ret == -ENOENT) { 1422 ath10k_err(ar, 1423 "failed to fetch board data for %s from %s/%s\n", 1424 boardname, ar->hw_params.fw.dir, filename); 1425 ret = -ENODATA; 1426 } 1427 1428 if (ret) 1429 goto err; 1430 1431 return 0; 1432 1433 err: 1434 ath10k_core_free_board_files(ar); 1435 return ret; 1436 } 1437 1438 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1439 size_t name_len, bool with_variant) 1440 { 1441 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1442 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1443 1444 if (with_variant && ar->id.bdf_ext[0] != '\0') 1445 scnprintf(variant, sizeof(variant), ",variant=%s", 1446 ar->id.bdf_ext); 1447 1448 if (ar->id.bmi_ids_valid) { 1449 scnprintf(name, name_len, 1450 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1451 ath10k_bus_str(ar->hif.bus), 1452 ar->id.bmi_chip_id, 1453 ar->id.bmi_board_id, variant); 1454 goto out; 1455 } 1456 1457 scnprintf(name, name_len, 1458 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1459 ath10k_bus_str(ar->hif.bus), 1460 ar->id.vendor, ar->id.device, 1461 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1462 out: 1463 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1464 1465 return 0; 1466 } 1467 1468 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1469 { 1470 char boardname[100], fallback_boardname[100]; 1471 int ret; 1472 1473 ret = ath10k_core_create_board_name(ar, boardname, 1474 sizeof(boardname), true); 1475 if (ret) { 1476 ath10k_err(ar, "failed to create board name: %d", ret); 1477 return ret; 1478 } 1479 1480 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1481 sizeof(boardname), false); 1482 if (ret) { 1483 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1484 return ret; 1485 } 1486 1487 ar->bd_api = 2; 1488 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1489 fallback_boardname, 1490 ATH10K_BOARD_API2_FILE); 1491 if (!ret) 1492 goto success; 1493 1494 ar->bd_api = 1; 1495 ret = ath10k_core_fetch_board_data_api_1(ar); 1496 if (ret) { 1497 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1498 ar->hw_params.fw.dir); 1499 return ret; 1500 } 1501 1502 success: 1503 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1504 return 0; 1505 } 1506 1507 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1508 struct ath10k_fw_file *fw_file) 1509 { 1510 size_t magic_len, len, ie_len; 1511 int ie_id, i, index, bit, ret; 1512 struct ath10k_fw_ie *hdr; 1513 const u8 *data; 1514 __le32 *timestamp, *version; 1515 1516 /* first fetch the firmware file (firmware-*.bin) */ 1517 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1518 name); 1519 if (IS_ERR(fw_file->firmware)) 1520 return PTR_ERR(fw_file->firmware); 1521 1522 data = fw_file->firmware->data; 1523 len = fw_file->firmware->size; 1524 1525 /* magic also includes the null byte, check that as well */ 1526 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1527 1528 if (len < magic_len) { 1529 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1530 ar->hw_params.fw.dir, name, len); 1531 ret = -EINVAL; 1532 goto err; 1533 } 1534 1535 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1536 ath10k_err(ar, "invalid firmware magic\n"); 1537 ret = -EINVAL; 1538 goto err; 1539 } 1540 1541 /* jump over the padding */ 1542 magic_len = ALIGN(magic_len, 4); 1543 1544 len -= magic_len; 1545 data += magic_len; 1546 1547 /* loop elements */ 1548 while (len > sizeof(struct ath10k_fw_ie)) { 1549 hdr = (struct ath10k_fw_ie *)data; 1550 1551 ie_id = le32_to_cpu(hdr->id); 1552 ie_len = le32_to_cpu(hdr->len); 1553 1554 len -= sizeof(*hdr); 1555 data += sizeof(*hdr); 1556 1557 if (len < ie_len) { 1558 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1559 ie_id, len, ie_len); 1560 ret = -EINVAL; 1561 goto err; 1562 } 1563 1564 switch (ie_id) { 1565 case ATH10K_FW_IE_FW_VERSION: 1566 if (ie_len > sizeof(fw_file->fw_version) - 1) 1567 break; 1568 1569 memcpy(fw_file->fw_version, data, ie_len); 1570 fw_file->fw_version[ie_len] = '\0'; 1571 1572 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1573 "found fw version %s\n", 1574 fw_file->fw_version); 1575 break; 1576 case ATH10K_FW_IE_TIMESTAMP: 1577 if (ie_len != sizeof(u32)) 1578 break; 1579 1580 timestamp = (__le32 *)data; 1581 1582 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1583 le32_to_cpup(timestamp)); 1584 break; 1585 case ATH10K_FW_IE_FEATURES: 1586 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1587 "found firmware features ie (%zd B)\n", 1588 ie_len); 1589 1590 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1591 index = i / 8; 1592 bit = i % 8; 1593 1594 if (index == ie_len) 1595 break; 1596 1597 if (data[index] & (1 << bit)) { 1598 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1599 "Enabling feature bit: %i\n", 1600 i); 1601 __set_bit(i, fw_file->fw_features); 1602 } 1603 } 1604 1605 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1606 fw_file->fw_features, 1607 sizeof(fw_file->fw_features)); 1608 break; 1609 case ATH10K_FW_IE_FW_IMAGE: 1610 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1611 "found fw image ie (%zd B)\n", 1612 ie_len); 1613 1614 fw_file->firmware_data = data; 1615 fw_file->firmware_len = ie_len; 1616 1617 break; 1618 case ATH10K_FW_IE_OTP_IMAGE: 1619 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1620 "found otp image ie (%zd B)\n", 1621 ie_len); 1622 1623 fw_file->otp_data = data; 1624 fw_file->otp_len = ie_len; 1625 1626 break; 1627 case ATH10K_FW_IE_WMI_OP_VERSION: 1628 if (ie_len != sizeof(u32)) 1629 break; 1630 1631 version = (__le32 *)data; 1632 1633 fw_file->wmi_op_version = le32_to_cpup(version); 1634 1635 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1636 fw_file->wmi_op_version); 1637 break; 1638 case ATH10K_FW_IE_HTT_OP_VERSION: 1639 if (ie_len != sizeof(u32)) 1640 break; 1641 1642 version = (__le32 *)data; 1643 1644 fw_file->htt_op_version = le32_to_cpup(version); 1645 1646 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1647 fw_file->htt_op_version); 1648 break; 1649 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1650 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1651 "found fw code swap image ie (%zd B)\n", 1652 ie_len); 1653 fw_file->codeswap_data = data; 1654 fw_file->codeswap_len = ie_len; 1655 break; 1656 default: 1657 ath10k_warn(ar, "Unknown FW IE: %u\n", 1658 le32_to_cpu(hdr->id)); 1659 break; 1660 } 1661 1662 /* jump over the padding */ 1663 ie_len = ALIGN(ie_len, 4); 1664 1665 len -= ie_len; 1666 data += ie_len; 1667 } 1668 1669 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1670 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1671 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1672 ar->hw_params.fw.dir, name); 1673 ret = -ENOMEDIUM; 1674 goto err; 1675 } 1676 1677 return 0; 1678 1679 err: 1680 ath10k_core_free_firmware_files(ar); 1681 return ret; 1682 } 1683 1684 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1685 size_t fw_name_len, int fw_api) 1686 { 1687 switch (ar->hif.bus) { 1688 case ATH10K_BUS_SDIO: 1689 case ATH10K_BUS_USB: 1690 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1691 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1692 fw_api); 1693 break; 1694 case ATH10K_BUS_PCI: 1695 case ATH10K_BUS_AHB: 1696 case ATH10K_BUS_SNOC: 1697 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1698 ATH10K_FW_FILE_BASE, fw_api); 1699 break; 1700 } 1701 } 1702 1703 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1704 { 1705 int ret, i; 1706 char fw_name[100]; 1707 1708 /* calibration file is optional, don't check for any errors */ 1709 ath10k_fetch_cal_file(ar); 1710 1711 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1712 ar->fw_api = i; 1713 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1714 ar->fw_api); 1715 1716 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1717 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1718 &ar->normal_mode_fw.fw_file); 1719 if (!ret) 1720 goto success; 1721 } 1722 1723 /* we end up here if we couldn't fetch any firmware */ 1724 1725 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1726 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1727 ret); 1728 1729 return ret; 1730 1731 success: 1732 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1733 1734 return 0; 1735 } 1736 1737 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1738 { 1739 int ret; 1740 1741 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1742 if (ret == 0) { 1743 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1744 goto success; 1745 } 1746 1747 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1748 "boot did not find a pre calibration file, try DT next: %d\n", 1749 ret); 1750 1751 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1752 if (ret) { 1753 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1754 "unable to load pre cal data from DT: %d\n", ret); 1755 return ret; 1756 } 1757 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1758 1759 success: 1760 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1761 ath10k_cal_mode_str(ar->cal_mode)); 1762 1763 return 0; 1764 } 1765 1766 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1767 { 1768 int ret; 1769 1770 ret = ath10k_core_pre_cal_download(ar); 1771 if (ret) { 1772 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1773 "failed to load pre cal data: %d\n", ret); 1774 return ret; 1775 } 1776 1777 ret = ath10k_core_get_board_id_from_otp(ar); 1778 if (ret) { 1779 ath10k_err(ar, "failed to get board id: %d\n", ret); 1780 return ret; 1781 } 1782 1783 ret = ath10k_download_and_run_otp(ar); 1784 if (ret) { 1785 ath10k_err(ar, "failed to run otp: %d\n", ret); 1786 return ret; 1787 } 1788 1789 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1790 "pre cal configuration done successfully\n"); 1791 1792 return 0; 1793 } 1794 1795 static int ath10k_download_cal_data(struct ath10k *ar) 1796 { 1797 int ret; 1798 1799 ret = ath10k_core_pre_cal_config(ar); 1800 if (ret == 0) 1801 return 0; 1802 1803 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1804 "pre cal download procedure failed, try cal file: %d\n", 1805 ret); 1806 1807 ret = ath10k_download_cal_file(ar, ar->cal_file); 1808 if (ret == 0) { 1809 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1810 goto done; 1811 } 1812 1813 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1814 "boot did not find a calibration file, try DT next: %d\n", 1815 ret); 1816 1817 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1818 if (ret == 0) { 1819 ar->cal_mode = ATH10K_CAL_MODE_DT; 1820 goto done; 1821 } 1822 1823 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1824 "boot did not find DT entry, try target EEPROM next: %d\n", 1825 ret); 1826 1827 ret = ath10k_download_cal_eeprom(ar); 1828 if (ret == 0) { 1829 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1830 goto done; 1831 } 1832 1833 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1834 "boot did not find target EEPROM entry, try OTP next: %d\n", 1835 ret); 1836 1837 ret = ath10k_download_and_run_otp(ar); 1838 if (ret) { 1839 ath10k_err(ar, "failed to run otp: %d\n", ret); 1840 return ret; 1841 } 1842 1843 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1844 1845 done: 1846 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1847 ath10k_cal_mode_str(ar->cal_mode)); 1848 return 0; 1849 } 1850 1851 static int ath10k_init_uart(struct ath10k *ar) 1852 { 1853 int ret; 1854 1855 /* 1856 * Explicitly setting UART prints to zero as target turns it on 1857 * based on scratch registers. 1858 */ 1859 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1860 if (ret) { 1861 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1862 return ret; 1863 } 1864 1865 if (!uart_print) 1866 return 0; 1867 1868 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1869 if (ret) { 1870 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1871 return ret; 1872 } 1873 1874 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1875 if (ret) { 1876 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1877 return ret; 1878 } 1879 1880 /* Set the UART baud rate to 19200. */ 1881 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1882 if (ret) { 1883 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1884 return ret; 1885 } 1886 1887 ath10k_info(ar, "UART prints enabled\n"); 1888 return 0; 1889 } 1890 1891 static int ath10k_init_hw_params(struct ath10k *ar) 1892 { 1893 const struct ath10k_hw_params *uninitialized_var(hw_params); 1894 int i; 1895 1896 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1897 hw_params = &ath10k_hw_params_list[i]; 1898 1899 if (hw_params->id == ar->target_version && 1900 hw_params->dev_id == ar->dev_id) 1901 break; 1902 } 1903 1904 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1905 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1906 ar->target_version); 1907 return -EINVAL; 1908 } 1909 1910 ar->hw_params = *hw_params; 1911 1912 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1913 ar->hw_params.name, ar->target_version); 1914 1915 return 0; 1916 } 1917 1918 static void ath10k_core_restart(struct work_struct *work) 1919 { 1920 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1921 int ret; 1922 1923 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1924 1925 /* Place a barrier to make sure the compiler doesn't reorder 1926 * CRASH_FLUSH and calling other functions. 1927 */ 1928 barrier(); 1929 1930 ieee80211_stop_queues(ar->hw); 1931 ath10k_drain_tx(ar); 1932 complete(&ar->scan.started); 1933 complete(&ar->scan.completed); 1934 complete(&ar->scan.on_channel); 1935 complete(&ar->offchan_tx_completed); 1936 complete(&ar->install_key_done); 1937 complete(&ar->vdev_setup_done); 1938 complete(&ar->thermal.wmi_sync); 1939 complete(&ar->bss_survey_done); 1940 wake_up(&ar->htt.empty_tx_wq); 1941 wake_up(&ar->wmi.tx_credits_wq); 1942 wake_up(&ar->peer_mapping_wq); 1943 1944 /* TODO: We can have one instance of cancelling coverage_class_work by 1945 * moving it to ath10k_halt(), so that both stop() and restart() would 1946 * call that but it takes conf_mutex() and if we call cancel_work_sync() 1947 * with conf_mutex it will deadlock. 1948 */ 1949 cancel_work_sync(&ar->set_coverage_class_work); 1950 1951 mutex_lock(&ar->conf_mutex); 1952 1953 switch (ar->state) { 1954 case ATH10K_STATE_ON: 1955 ar->state = ATH10K_STATE_RESTARTING; 1956 ath10k_halt(ar); 1957 ath10k_scan_finish(ar); 1958 ieee80211_restart_hw(ar->hw); 1959 break; 1960 case ATH10K_STATE_OFF: 1961 /* this can happen if driver is being unloaded 1962 * or if the crash happens during FW probing 1963 */ 1964 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1965 break; 1966 case ATH10K_STATE_RESTARTING: 1967 /* hw restart might be requested from multiple places */ 1968 break; 1969 case ATH10K_STATE_RESTARTED: 1970 ar->state = ATH10K_STATE_WEDGED; 1971 /* fall through */ 1972 case ATH10K_STATE_WEDGED: 1973 ath10k_warn(ar, "device is wedged, will not restart\n"); 1974 break; 1975 case ATH10K_STATE_UTF: 1976 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1977 break; 1978 } 1979 1980 mutex_unlock(&ar->conf_mutex); 1981 1982 ret = ath10k_coredump_submit(ar); 1983 if (ret) 1984 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 1985 ret); 1986 } 1987 1988 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1989 { 1990 struct ath10k *ar = container_of(work, struct ath10k, 1991 set_coverage_class_work); 1992 1993 if (ar->hw_params.hw_ops->set_coverage_class) 1994 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1995 } 1996 1997 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1998 { 1999 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2000 2001 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2002 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2003 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2004 return -EINVAL; 2005 } 2006 2007 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2008 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2009 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2010 return -EINVAL; 2011 } 2012 2013 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2014 switch (ath10k_cryptmode_param) { 2015 case ATH10K_CRYPT_MODE_HW: 2016 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2017 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2018 break; 2019 case ATH10K_CRYPT_MODE_SW: 2020 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2021 fw_file->fw_features)) { 2022 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2023 return -EINVAL; 2024 } 2025 2026 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2027 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2028 break; 2029 default: 2030 ath10k_info(ar, "invalid cryptmode: %d\n", 2031 ath10k_cryptmode_param); 2032 return -EINVAL; 2033 } 2034 2035 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2036 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2037 2038 if (rawmode) { 2039 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2040 fw_file->fw_features)) { 2041 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2042 return -EINVAL; 2043 } 2044 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2045 } 2046 2047 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2048 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2049 2050 /* Workaround: 2051 * 2052 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2053 * and causes enormous performance issues (malformed frames, 2054 * etc). 2055 * 2056 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2057 * albeit a bit slower compared to regular operation. 2058 */ 2059 ar->htt.max_num_amsdu = 1; 2060 } 2061 2062 /* Backwards compatibility for firmwares without 2063 * ATH10K_FW_IE_WMI_OP_VERSION. 2064 */ 2065 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2066 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2067 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2068 fw_file->fw_features)) 2069 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2070 else 2071 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2072 } else { 2073 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2074 } 2075 } 2076 2077 switch (fw_file->wmi_op_version) { 2078 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2079 ar->max_num_peers = TARGET_NUM_PEERS; 2080 ar->max_num_stations = TARGET_NUM_STATIONS; 2081 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2082 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2083 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2084 WMI_STAT_PEER; 2085 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2086 break; 2087 case ATH10K_FW_WMI_OP_VERSION_10_1: 2088 case ATH10K_FW_WMI_OP_VERSION_10_2: 2089 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2090 if (ath10k_peer_stats_enabled(ar)) { 2091 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2092 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2093 } else { 2094 ar->max_num_peers = TARGET_10X_NUM_PEERS; 2095 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2096 } 2097 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2098 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2099 ar->fw_stats_req_mask = WMI_STAT_PEER; 2100 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2101 break; 2102 case ATH10K_FW_WMI_OP_VERSION_TLV: 2103 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 2104 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2105 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2106 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2107 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2108 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2109 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2110 WMI_STAT_PEER; 2111 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2112 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2113 break; 2114 case ATH10K_FW_WMI_OP_VERSION_10_4: 2115 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 2116 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2117 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2118 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2119 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2120 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2121 WMI_10_4_STAT_PEER_EXTD | 2122 WMI_10_4_STAT_VDEV_EXTD; 2123 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2124 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2125 2126 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2127 fw_file->fw_features)) 2128 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2129 else 2130 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2131 break; 2132 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2133 case ATH10K_FW_WMI_OP_VERSION_MAX: 2134 WARN_ON(1); 2135 return -EINVAL; 2136 } 2137 2138 /* Backwards compatibility for firmwares without 2139 * ATH10K_FW_IE_HTT_OP_VERSION. 2140 */ 2141 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2142 switch (fw_file->wmi_op_version) { 2143 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2144 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2145 break; 2146 case ATH10K_FW_WMI_OP_VERSION_10_1: 2147 case ATH10K_FW_WMI_OP_VERSION_10_2: 2148 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2149 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2150 break; 2151 case ATH10K_FW_WMI_OP_VERSION_TLV: 2152 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2153 break; 2154 case ATH10K_FW_WMI_OP_VERSION_10_4: 2155 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2156 case ATH10K_FW_WMI_OP_VERSION_MAX: 2157 ath10k_err(ar, "htt op version not found from fw meta data"); 2158 return -EINVAL; 2159 } 2160 } 2161 2162 return 0; 2163 } 2164 2165 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2166 { 2167 int ret; 2168 int vdev_id; 2169 int vdev_type; 2170 int vdev_subtype; 2171 const u8 *vdev_addr; 2172 2173 vdev_id = 0; 2174 vdev_type = WMI_VDEV_TYPE_STA; 2175 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2176 vdev_addr = ar->mac_addr; 2177 2178 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2179 vdev_addr); 2180 if (ret) { 2181 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2182 return ret; 2183 } 2184 2185 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2186 if (ret) { 2187 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2188 return ret; 2189 } 2190 2191 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2192 * serialized properly implicitly. 2193 * 2194 * Moreover (most) WMI commands have no explicit acknowledges. It is 2195 * possible to infer it implicitly by poking firmware with echo 2196 * command - getting a reply means all preceding comments have been 2197 * (mostly) processed. 2198 * 2199 * In case of vdev create/delete this is sufficient. 2200 * 2201 * Without this it's possible to end up with a race when HTT Rx ring is 2202 * started before vdev create/delete hack is complete allowing a short 2203 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2204 */ 2205 ret = ath10k_wmi_barrier(ar); 2206 if (ret) { 2207 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2208 return ret; 2209 } 2210 2211 return 0; 2212 } 2213 2214 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2215 const struct ath10k_fw_components *fw) 2216 { 2217 int status; 2218 u32 val; 2219 2220 lockdep_assert_held(&ar->conf_mutex); 2221 2222 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2223 2224 ar->running_fw = fw; 2225 2226 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2227 ar->running_fw->fw_file.fw_features)) { 2228 ath10k_bmi_start(ar); 2229 2230 if (ath10k_init_configure_target(ar)) { 2231 status = -EINVAL; 2232 goto err; 2233 } 2234 2235 status = ath10k_download_cal_data(ar); 2236 if (status) 2237 goto err; 2238 2239 /* Some of of qca988x solutions are having global reset issue 2240 * during target initialization. Bypassing PLL setting before 2241 * downloading firmware and letting the SoC run on REF_CLK is 2242 * fixing the problem. Corresponding firmware change is also 2243 * needed to set the clock source once the target is 2244 * initialized. 2245 */ 2246 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2247 ar->running_fw->fw_file.fw_features)) { 2248 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2249 if (status) { 2250 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2251 status); 2252 goto err; 2253 } 2254 } 2255 2256 status = ath10k_download_fw(ar); 2257 if (status) 2258 goto err; 2259 2260 status = ath10k_init_uart(ar); 2261 if (status) 2262 goto err; 2263 2264 if (ar->hif.bus == ATH10K_BUS_SDIO) 2265 ath10k_init_sdio(ar); 2266 } 2267 2268 ar->htc.htc_ops.target_send_suspend_complete = 2269 ath10k_send_suspend_complete; 2270 2271 status = ath10k_htc_init(ar); 2272 if (status) { 2273 ath10k_err(ar, "could not init HTC (%d)\n", status); 2274 goto err; 2275 } 2276 2277 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2278 ar->running_fw->fw_file.fw_features)) { 2279 status = ath10k_bmi_done(ar); 2280 if (status) 2281 goto err; 2282 } 2283 2284 status = ath10k_wmi_attach(ar); 2285 if (status) { 2286 ath10k_err(ar, "WMI attach failed: %d\n", status); 2287 goto err; 2288 } 2289 2290 status = ath10k_htt_init(ar); 2291 if (status) { 2292 ath10k_err(ar, "failed to init htt: %d\n", status); 2293 goto err_wmi_detach; 2294 } 2295 2296 status = ath10k_htt_tx_start(&ar->htt); 2297 if (status) { 2298 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2299 goto err_wmi_detach; 2300 } 2301 2302 /* If firmware indicates Full Rx Reorder support it must be used in a 2303 * slightly different manner. Let HTT code know. 2304 */ 2305 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2306 ar->wmi.svc_map)); 2307 2308 status = ath10k_htt_rx_alloc(&ar->htt); 2309 if (status) { 2310 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2311 goto err_htt_tx_detach; 2312 } 2313 2314 status = ath10k_hif_start(ar); 2315 if (status) { 2316 ath10k_err(ar, "could not start HIF: %d\n", status); 2317 goto err_htt_rx_detach; 2318 } 2319 2320 status = ath10k_htc_wait_target(&ar->htc); 2321 if (status) { 2322 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2323 goto err_hif_stop; 2324 } 2325 2326 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2327 status = ath10k_htt_connect(&ar->htt); 2328 if (status) { 2329 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2330 goto err_hif_stop; 2331 } 2332 } 2333 2334 status = ath10k_wmi_connect(ar); 2335 if (status) { 2336 ath10k_err(ar, "could not connect wmi: %d\n", status); 2337 goto err_hif_stop; 2338 } 2339 2340 status = ath10k_htc_start(&ar->htc); 2341 if (status) { 2342 ath10k_err(ar, "failed to start htc: %d\n", status); 2343 goto err_hif_stop; 2344 } 2345 2346 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2347 status = ath10k_wmi_wait_for_service_ready(ar); 2348 if (status) { 2349 ath10k_warn(ar, "wmi service ready event not received"); 2350 goto err_hif_stop; 2351 } 2352 } 2353 2354 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2355 ar->hw->wiphy->fw_version); 2356 2357 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2358 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2359 val = 0; 2360 if (ath10k_peer_stats_enabled(ar)) 2361 val = WMI_10_4_PEER_STATS; 2362 2363 /* Enable vdev stats by default */ 2364 val |= WMI_10_4_VDEV_STATS; 2365 2366 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2367 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2368 2369 /* 10.4 firmware supports BT-Coex without reloading firmware 2370 * via pdev param. To support Bluetooth coexistence pdev param, 2371 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2372 * enabled always. 2373 */ 2374 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2375 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2376 ar->running_fw->fw_file.fw_features)) 2377 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2378 2379 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2380 ar->wmi.svc_map)) 2381 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2382 2383 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2384 ar->wmi.svc_map)) 2385 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2386 2387 status = ath10k_mac_ext_resource_config(ar, val); 2388 if (status) { 2389 ath10k_err(ar, 2390 "failed to send ext resource cfg command : %d\n", 2391 status); 2392 goto err_hif_stop; 2393 } 2394 } 2395 2396 status = ath10k_wmi_cmd_init(ar); 2397 if (status) { 2398 ath10k_err(ar, "could not send WMI init command (%d)\n", 2399 status); 2400 goto err_hif_stop; 2401 } 2402 2403 status = ath10k_wmi_wait_for_unified_ready(ar); 2404 if (status) { 2405 ath10k_err(ar, "wmi unified ready event not received\n"); 2406 goto err_hif_stop; 2407 } 2408 2409 /* Some firmware revisions do not properly set up hardware rx filter 2410 * registers. 2411 * 2412 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2413 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2414 * any frames that matches MAC_PCU_RX_FILTER which is also 2415 * misconfigured to accept anything. 2416 * 2417 * The ADDR1 is programmed using internal firmware structure field and 2418 * can't be (easily/sanely) reached from the driver explicitly. It is 2419 * possible to implicitly make it correct by creating a dummy vdev and 2420 * then deleting it. 2421 */ 2422 if (ar->hw_params.hw_filter_reset_required && 2423 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2424 status = ath10k_core_reset_rx_filter(ar); 2425 if (status) { 2426 ath10k_err(ar, 2427 "failed to reset rx filter: %d\n", status); 2428 goto err_hif_stop; 2429 } 2430 } 2431 2432 status = ath10k_htt_rx_ring_refill(ar); 2433 if (status) { 2434 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2435 goto err_hif_stop; 2436 } 2437 2438 if (ar->max_num_vdevs >= 64) 2439 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2440 else 2441 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2442 2443 INIT_LIST_HEAD(&ar->arvifs); 2444 2445 /* we don't care about HTT in UTF mode */ 2446 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2447 status = ath10k_htt_setup(&ar->htt); 2448 if (status) { 2449 ath10k_err(ar, "failed to setup htt: %d\n", status); 2450 goto err_hif_stop; 2451 } 2452 } 2453 2454 status = ath10k_debug_start(ar); 2455 if (status) 2456 goto err_hif_stop; 2457 2458 return 0; 2459 2460 err_hif_stop: 2461 ath10k_hif_stop(ar); 2462 err_htt_rx_detach: 2463 ath10k_htt_rx_free(&ar->htt); 2464 err_htt_tx_detach: 2465 ath10k_htt_tx_free(&ar->htt); 2466 err_wmi_detach: 2467 ath10k_wmi_detach(ar); 2468 err: 2469 return status; 2470 } 2471 EXPORT_SYMBOL(ath10k_core_start); 2472 2473 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2474 { 2475 int ret; 2476 unsigned long time_left; 2477 2478 reinit_completion(&ar->target_suspend); 2479 2480 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2481 if (ret) { 2482 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2483 return ret; 2484 } 2485 2486 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2487 2488 if (!time_left) { 2489 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2490 return -ETIMEDOUT; 2491 } 2492 2493 return 0; 2494 } 2495 2496 void ath10k_core_stop(struct ath10k *ar) 2497 { 2498 lockdep_assert_held(&ar->conf_mutex); 2499 ath10k_debug_stop(ar); 2500 2501 /* try to suspend target */ 2502 if (ar->state != ATH10K_STATE_RESTARTING && 2503 ar->state != ATH10K_STATE_UTF) 2504 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2505 2506 ath10k_hif_stop(ar); 2507 ath10k_htt_tx_stop(&ar->htt); 2508 ath10k_htt_rx_free(&ar->htt); 2509 ath10k_wmi_detach(ar); 2510 } 2511 EXPORT_SYMBOL(ath10k_core_stop); 2512 2513 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2514 * order to know what hw capabilities should be advertised to mac80211 it is 2515 * necessary to load the firmware (and tear it down immediately since start 2516 * hook will try to init it again) before registering 2517 */ 2518 static int ath10k_core_probe_fw(struct ath10k *ar) 2519 { 2520 struct bmi_target_info target_info; 2521 int ret = 0; 2522 2523 ret = ath10k_hif_power_up(ar); 2524 if (ret) { 2525 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2526 return ret; 2527 } 2528 2529 switch (ar->hif.bus) { 2530 case ATH10K_BUS_SDIO: 2531 memset(&target_info, 0, sizeof(target_info)); 2532 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2533 if (ret) { 2534 ath10k_err(ar, "could not get target info (%d)\n", ret); 2535 goto err_power_down; 2536 } 2537 ar->target_version = target_info.version; 2538 ar->hw->wiphy->hw_version = target_info.version; 2539 break; 2540 case ATH10K_BUS_PCI: 2541 case ATH10K_BUS_AHB: 2542 case ATH10K_BUS_USB: 2543 memset(&target_info, 0, sizeof(target_info)); 2544 ret = ath10k_bmi_get_target_info(ar, &target_info); 2545 if (ret) { 2546 ath10k_err(ar, "could not get target info (%d)\n", ret); 2547 goto err_power_down; 2548 } 2549 ar->target_version = target_info.version; 2550 ar->hw->wiphy->hw_version = target_info.version; 2551 break; 2552 case ATH10K_BUS_SNOC: 2553 memset(&target_info, 0, sizeof(target_info)); 2554 ret = ath10k_hif_get_target_info(ar, &target_info); 2555 if (ret) { 2556 ath10k_err(ar, "could not get target info (%d)\n", ret); 2557 goto err_power_down; 2558 } 2559 ar->target_version = target_info.version; 2560 ar->hw->wiphy->hw_version = target_info.version; 2561 break; 2562 default: 2563 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2564 } 2565 2566 ret = ath10k_init_hw_params(ar); 2567 if (ret) { 2568 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2569 goto err_power_down; 2570 } 2571 2572 ret = ath10k_core_fetch_firmware_files(ar); 2573 if (ret) { 2574 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2575 goto err_power_down; 2576 } 2577 2578 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2579 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2580 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2581 sizeof(ar->hw->wiphy->fw_version)); 2582 2583 ath10k_debug_print_hwfw_info(ar); 2584 2585 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2586 ar->normal_mode_fw.fw_file.fw_features)) { 2587 ret = ath10k_core_pre_cal_download(ar); 2588 if (ret) { 2589 /* pre calibration data download is not necessary 2590 * for all the chipsets. Ignore failures and continue. 2591 */ 2592 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2593 "could not load pre cal data: %d\n", ret); 2594 } 2595 2596 ret = ath10k_core_get_board_id_from_otp(ar); 2597 if (ret && ret != -EOPNOTSUPP) { 2598 ath10k_err(ar, "failed to get board id from otp: %d\n", 2599 ret); 2600 goto err_free_firmware_files; 2601 } 2602 2603 ret = ath10k_core_check_smbios(ar); 2604 if (ret) 2605 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2606 2607 ret = ath10k_core_check_dt(ar); 2608 if (ret) 2609 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2610 2611 ret = ath10k_core_fetch_board_file(ar); 2612 if (ret) { 2613 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2614 goto err_free_firmware_files; 2615 } 2616 2617 ath10k_debug_print_board_info(ar); 2618 } 2619 2620 ret = ath10k_core_init_firmware_features(ar); 2621 if (ret) { 2622 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2623 ret); 2624 goto err_free_firmware_files; 2625 } 2626 2627 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2628 ar->normal_mode_fw.fw_file.fw_features)) { 2629 ret = ath10k_swap_code_seg_init(ar, 2630 &ar->normal_mode_fw.fw_file); 2631 if (ret) { 2632 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2633 ret); 2634 goto err_free_firmware_files; 2635 } 2636 } 2637 2638 mutex_lock(&ar->conf_mutex); 2639 2640 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2641 &ar->normal_mode_fw); 2642 if (ret) { 2643 ath10k_err(ar, "could not init core (%d)\n", ret); 2644 goto err_unlock; 2645 } 2646 2647 ath10k_debug_print_boot_info(ar); 2648 ath10k_core_stop(ar); 2649 2650 mutex_unlock(&ar->conf_mutex); 2651 2652 ath10k_hif_power_down(ar); 2653 return 0; 2654 2655 err_unlock: 2656 mutex_unlock(&ar->conf_mutex); 2657 2658 err_free_firmware_files: 2659 ath10k_core_free_firmware_files(ar); 2660 2661 err_power_down: 2662 ath10k_hif_power_down(ar); 2663 2664 return ret; 2665 } 2666 2667 static void ath10k_core_register_work(struct work_struct *work) 2668 { 2669 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2670 int status; 2671 2672 /* peer stats are enabled by default */ 2673 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2674 2675 status = ath10k_core_probe_fw(ar); 2676 if (status) { 2677 ath10k_err(ar, "could not probe fw (%d)\n", status); 2678 goto err; 2679 } 2680 2681 status = ath10k_mac_register(ar); 2682 if (status) { 2683 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2684 goto err_release_fw; 2685 } 2686 2687 status = ath10k_coredump_register(ar); 2688 if (status) { 2689 ath10k_err(ar, "unable to register coredump\n"); 2690 goto err_unregister_mac; 2691 } 2692 2693 status = ath10k_debug_register(ar); 2694 if (status) { 2695 ath10k_err(ar, "unable to initialize debugfs\n"); 2696 goto err_unregister_coredump; 2697 } 2698 2699 status = ath10k_spectral_create(ar); 2700 if (status) { 2701 ath10k_err(ar, "failed to initialize spectral\n"); 2702 goto err_debug_destroy; 2703 } 2704 2705 status = ath10k_thermal_register(ar); 2706 if (status) { 2707 ath10k_err(ar, "could not register thermal device: %d\n", 2708 status); 2709 goto err_spectral_destroy; 2710 } 2711 2712 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2713 return; 2714 2715 err_spectral_destroy: 2716 ath10k_spectral_destroy(ar); 2717 err_debug_destroy: 2718 ath10k_debug_destroy(ar); 2719 err_unregister_coredump: 2720 ath10k_coredump_unregister(ar); 2721 err_unregister_mac: 2722 ath10k_mac_unregister(ar); 2723 err_release_fw: 2724 ath10k_core_free_firmware_files(ar); 2725 err: 2726 /* TODO: It's probably a good idea to release device from the driver 2727 * but calling device_release_driver() here will cause a deadlock. 2728 */ 2729 return; 2730 } 2731 2732 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2733 { 2734 ar->chip_id = chip_id; 2735 queue_work(ar->workqueue, &ar->register_work); 2736 2737 return 0; 2738 } 2739 EXPORT_SYMBOL(ath10k_core_register); 2740 2741 void ath10k_core_unregister(struct ath10k *ar) 2742 { 2743 cancel_work_sync(&ar->register_work); 2744 2745 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2746 return; 2747 2748 ath10k_thermal_unregister(ar); 2749 /* Stop spectral before unregistering from mac80211 to remove the 2750 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2751 * would be already be free'd recursively, leading to a double free. 2752 */ 2753 ath10k_spectral_destroy(ar); 2754 2755 /* We must unregister from mac80211 before we stop HTC and HIF. 2756 * Otherwise we will fail to submit commands to FW and mac80211 will be 2757 * unhappy about callback failures. 2758 */ 2759 ath10k_mac_unregister(ar); 2760 2761 ath10k_testmode_destroy(ar); 2762 2763 ath10k_core_free_firmware_files(ar); 2764 ath10k_core_free_board_files(ar); 2765 2766 ath10k_debug_unregister(ar); 2767 } 2768 EXPORT_SYMBOL(ath10k_core_unregister); 2769 2770 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2771 enum ath10k_bus bus, 2772 enum ath10k_hw_rev hw_rev, 2773 const struct ath10k_hif_ops *hif_ops) 2774 { 2775 struct ath10k *ar; 2776 int ret; 2777 2778 ar = ath10k_mac_create(priv_size); 2779 if (!ar) 2780 return NULL; 2781 2782 ar->ath_common.priv = ar; 2783 ar->ath_common.hw = ar->hw; 2784 ar->dev = dev; 2785 ar->hw_rev = hw_rev; 2786 ar->hif.ops = hif_ops; 2787 ar->hif.bus = bus; 2788 2789 switch (hw_rev) { 2790 case ATH10K_HW_QCA988X: 2791 case ATH10K_HW_QCA9887: 2792 ar->regs = &qca988x_regs; 2793 ar->hw_ce_regs = &qcax_ce_regs; 2794 ar->hw_values = &qca988x_values; 2795 break; 2796 case ATH10K_HW_QCA6174: 2797 case ATH10K_HW_QCA9377: 2798 ar->regs = &qca6174_regs; 2799 ar->hw_ce_regs = &qcax_ce_regs; 2800 ar->hw_values = &qca6174_values; 2801 break; 2802 case ATH10K_HW_QCA99X0: 2803 case ATH10K_HW_QCA9984: 2804 ar->regs = &qca99x0_regs; 2805 ar->hw_ce_regs = &qcax_ce_regs; 2806 ar->hw_values = &qca99x0_values; 2807 break; 2808 case ATH10K_HW_QCA9888: 2809 ar->regs = &qca99x0_regs; 2810 ar->hw_ce_regs = &qcax_ce_regs; 2811 ar->hw_values = &qca9888_values; 2812 break; 2813 case ATH10K_HW_QCA4019: 2814 ar->regs = &qca4019_regs; 2815 ar->hw_ce_regs = &qcax_ce_regs; 2816 ar->hw_values = &qca4019_values; 2817 break; 2818 case ATH10K_HW_WCN3990: 2819 ar->regs = &wcn3990_regs; 2820 ar->hw_ce_regs = &wcn3990_ce_regs; 2821 ar->hw_values = &wcn3990_values; 2822 break; 2823 default: 2824 ath10k_err(ar, "unsupported core hardware revision %d\n", 2825 hw_rev); 2826 ret = -ENOTSUPP; 2827 goto err_free_mac; 2828 } 2829 2830 init_completion(&ar->scan.started); 2831 init_completion(&ar->scan.completed); 2832 init_completion(&ar->scan.on_channel); 2833 init_completion(&ar->target_suspend); 2834 init_completion(&ar->wow.wakeup_completed); 2835 2836 init_completion(&ar->install_key_done); 2837 init_completion(&ar->vdev_setup_done); 2838 init_completion(&ar->thermal.wmi_sync); 2839 init_completion(&ar->bss_survey_done); 2840 2841 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2842 2843 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2844 if (!ar->workqueue) 2845 goto err_free_mac; 2846 2847 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2848 if (!ar->workqueue_aux) 2849 goto err_free_wq; 2850 2851 mutex_init(&ar->conf_mutex); 2852 spin_lock_init(&ar->data_lock); 2853 spin_lock_init(&ar->txqs_lock); 2854 2855 INIT_LIST_HEAD(&ar->txqs); 2856 INIT_LIST_HEAD(&ar->peers); 2857 init_waitqueue_head(&ar->peer_mapping_wq); 2858 init_waitqueue_head(&ar->htt.empty_tx_wq); 2859 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2860 2861 init_completion(&ar->offchan_tx_completed); 2862 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2863 skb_queue_head_init(&ar->offchan_tx_queue); 2864 2865 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2866 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2867 2868 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2869 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2870 INIT_WORK(&ar->set_coverage_class_work, 2871 ath10k_core_set_coverage_class_work); 2872 2873 init_dummy_netdev(&ar->napi_dev); 2874 2875 ret = ath10k_coredump_create(ar); 2876 if (ret) 2877 goto err_free_aux_wq; 2878 2879 ret = ath10k_debug_create(ar); 2880 if (ret) 2881 goto err_free_coredump; 2882 2883 return ar; 2884 2885 err_free_coredump: 2886 ath10k_coredump_destroy(ar); 2887 2888 err_free_aux_wq: 2889 destroy_workqueue(ar->workqueue_aux); 2890 err_free_wq: 2891 destroy_workqueue(ar->workqueue); 2892 2893 err_free_mac: 2894 ath10k_mac_destroy(ar); 2895 2896 return NULL; 2897 } 2898 EXPORT_SYMBOL(ath10k_core_create); 2899 2900 void ath10k_core_destroy(struct ath10k *ar) 2901 { 2902 flush_workqueue(ar->workqueue); 2903 destroy_workqueue(ar->workqueue); 2904 2905 flush_workqueue(ar->workqueue_aux); 2906 destroy_workqueue(ar->workqueue_aux); 2907 2908 ath10k_debug_destroy(ar); 2909 ath10k_coredump_destroy(ar); 2910 ath10k_htt_tx_destroy(&ar->htt); 2911 ath10k_wmi_free_host_mem(ar); 2912 ath10k_mac_destroy(ar); 2913 } 2914 EXPORT_SYMBOL(ath10k_core_destroy); 2915 2916 MODULE_AUTHOR("Qualcomm Atheros"); 2917 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2918 MODULE_LICENSE("Dual BSD/GPL"); 2919