1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/firmware.h> 21 #include <linux/of.h> 22 #include <linux/property.h> 23 #include <linux/dmi.h> 24 #include <linux/ctype.h> 25 #include <asm/byteorder.h> 26 27 #include "core.h" 28 #include "mac.h" 29 #include "htc.h" 30 #include "hif.h" 31 #include "wmi.h" 32 #include "bmi.h" 33 #include "debug.h" 34 #include "htt.h" 35 #include "testmode.h" 36 #include "wmi-ops.h" 37 #include "coredump.h" 38 39 unsigned int ath10k_debug_mask; 40 static unsigned int ath10k_cryptmode_param; 41 static bool uart_print; 42 static bool skip_otp; 43 static bool rawmode; 44 45 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 46 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 47 48 /* FIXME: most of these should be readonly */ 49 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 50 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 51 module_param(uart_print, bool, 0644); 52 module_param(skip_otp, bool, 0644); 53 module_param(rawmode, bool, 0644); 54 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 55 56 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 57 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 58 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 59 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 60 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 61 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 62 63 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 64 { 65 .id = QCA988X_HW_2_0_VERSION, 66 .dev_id = QCA988X_2_0_DEVICE_ID, 67 .bus = ATH10K_BUS_PCI, 68 .name = "qca988x hw2.0", 69 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 70 .uart_pin = 7, 71 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 72 .otp_exe_param = 0, 73 .channel_counters_freq_hz = 88000, 74 .max_probe_resp_desc_thres = 0, 75 .cal_data_len = 2116, 76 .fw = { 77 .dir = QCA988X_HW_2_0_FW_DIR, 78 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 79 .board_size = QCA988X_BOARD_DATA_SZ, 80 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 81 }, 82 .hw_ops = &qca988x_ops, 83 .decap_align_bytes = 4, 84 .spectral_bin_discard = 0, 85 .spectral_bin_offset = 0, 86 .vht160_mcs_rx_highest = 0, 87 .vht160_mcs_tx_highest = 0, 88 .n_cipher_suites = 8, 89 .ast_skid_limit = 0x10, 90 .num_wds_entries = 0x20, 91 .target_64bit = false, 92 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 93 .shadow_reg_support = false, 94 .rri_on_ddr = false, 95 .hw_filter_reset_required = true, 96 .fw_diag_ce_download = false, 97 }, 98 { 99 .id = QCA988X_HW_2_0_VERSION, 100 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 101 .name = "qca988x hw2.0 ubiquiti", 102 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 103 .uart_pin = 7, 104 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 105 .otp_exe_param = 0, 106 .channel_counters_freq_hz = 88000, 107 .max_probe_resp_desc_thres = 0, 108 .cal_data_len = 2116, 109 .fw = { 110 .dir = QCA988X_HW_2_0_FW_DIR, 111 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 112 .board_size = QCA988X_BOARD_DATA_SZ, 113 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 114 }, 115 .hw_ops = &qca988x_ops, 116 .decap_align_bytes = 4, 117 .spectral_bin_discard = 0, 118 .spectral_bin_offset = 0, 119 .vht160_mcs_rx_highest = 0, 120 .vht160_mcs_tx_highest = 0, 121 .n_cipher_suites = 8, 122 .ast_skid_limit = 0x10, 123 .num_wds_entries = 0x20, 124 .target_64bit = false, 125 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 126 .per_ce_irq = false, 127 .shadow_reg_support = false, 128 .rri_on_ddr = false, 129 .hw_filter_reset_required = true, 130 .fw_diag_ce_download = false, 131 }, 132 { 133 .id = QCA9887_HW_1_0_VERSION, 134 .dev_id = QCA9887_1_0_DEVICE_ID, 135 .bus = ATH10K_BUS_PCI, 136 .name = "qca9887 hw1.0", 137 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 138 .uart_pin = 7, 139 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 140 .otp_exe_param = 0, 141 .channel_counters_freq_hz = 88000, 142 .max_probe_resp_desc_thres = 0, 143 .cal_data_len = 2116, 144 .fw = { 145 .dir = QCA9887_HW_1_0_FW_DIR, 146 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 147 .board_size = QCA9887_BOARD_DATA_SZ, 148 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 149 }, 150 .hw_ops = &qca988x_ops, 151 .decap_align_bytes = 4, 152 .spectral_bin_discard = 0, 153 .spectral_bin_offset = 0, 154 .vht160_mcs_rx_highest = 0, 155 .vht160_mcs_tx_highest = 0, 156 .n_cipher_suites = 8, 157 .ast_skid_limit = 0x10, 158 .num_wds_entries = 0x20, 159 .target_64bit = false, 160 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 161 .per_ce_irq = false, 162 .shadow_reg_support = false, 163 .rri_on_ddr = false, 164 .hw_filter_reset_required = true, 165 .fw_diag_ce_download = false, 166 }, 167 { 168 .id = QCA6174_HW_2_1_VERSION, 169 .dev_id = QCA6164_2_1_DEVICE_ID, 170 .bus = ATH10K_BUS_PCI, 171 .name = "qca6164 hw2.1", 172 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 173 .uart_pin = 6, 174 .otp_exe_param = 0, 175 .channel_counters_freq_hz = 88000, 176 .max_probe_resp_desc_thres = 0, 177 .cal_data_len = 8124, 178 .fw = { 179 .dir = QCA6174_HW_2_1_FW_DIR, 180 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 181 .board_size = QCA6174_BOARD_DATA_SZ, 182 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 183 }, 184 .hw_ops = &qca988x_ops, 185 .decap_align_bytes = 4, 186 .spectral_bin_discard = 0, 187 .spectral_bin_offset = 0, 188 .vht160_mcs_rx_highest = 0, 189 .vht160_mcs_tx_highest = 0, 190 .n_cipher_suites = 8, 191 .ast_skid_limit = 0x10, 192 .num_wds_entries = 0x20, 193 .target_64bit = false, 194 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 195 .per_ce_irq = false, 196 .shadow_reg_support = false, 197 .rri_on_ddr = false, 198 .hw_filter_reset_required = true, 199 .fw_diag_ce_download = false, 200 }, 201 { 202 .id = QCA6174_HW_2_1_VERSION, 203 .dev_id = QCA6174_2_1_DEVICE_ID, 204 .bus = ATH10K_BUS_PCI, 205 .name = "qca6174 hw2.1", 206 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 207 .uart_pin = 6, 208 .otp_exe_param = 0, 209 .channel_counters_freq_hz = 88000, 210 .max_probe_resp_desc_thres = 0, 211 .cal_data_len = 8124, 212 .fw = { 213 .dir = QCA6174_HW_2_1_FW_DIR, 214 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 215 .board_size = QCA6174_BOARD_DATA_SZ, 216 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 217 }, 218 .hw_ops = &qca988x_ops, 219 .decap_align_bytes = 4, 220 .spectral_bin_discard = 0, 221 .spectral_bin_offset = 0, 222 .vht160_mcs_rx_highest = 0, 223 .vht160_mcs_tx_highest = 0, 224 .n_cipher_suites = 8, 225 .ast_skid_limit = 0x10, 226 .num_wds_entries = 0x20, 227 .target_64bit = false, 228 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 229 .per_ce_irq = false, 230 .shadow_reg_support = false, 231 .rri_on_ddr = false, 232 .hw_filter_reset_required = true, 233 .fw_diag_ce_download = false, 234 }, 235 { 236 .id = QCA6174_HW_3_0_VERSION, 237 .dev_id = QCA6174_2_1_DEVICE_ID, 238 .bus = ATH10K_BUS_PCI, 239 .name = "qca6174 hw3.0", 240 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 241 .uart_pin = 6, 242 .otp_exe_param = 0, 243 .channel_counters_freq_hz = 88000, 244 .max_probe_resp_desc_thres = 0, 245 .cal_data_len = 8124, 246 .fw = { 247 .dir = QCA6174_HW_3_0_FW_DIR, 248 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 249 .board_size = QCA6174_BOARD_DATA_SZ, 250 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 251 }, 252 .hw_ops = &qca988x_ops, 253 .decap_align_bytes = 4, 254 .spectral_bin_discard = 0, 255 .spectral_bin_offset = 0, 256 .vht160_mcs_rx_highest = 0, 257 .vht160_mcs_tx_highest = 0, 258 .n_cipher_suites = 8, 259 .ast_skid_limit = 0x10, 260 .num_wds_entries = 0x20, 261 .target_64bit = false, 262 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 263 .per_ce_irq = false, 264 .shadow_reg_support = false, 265 .rri_on_ddr = false, 266 .hw_filter_reset_required = true, 267 .fw_diag_ce_download = false, 268 }, 269 { 270 .id = QCA6174_HW_3_2_VERSION, 271 .dev_id = QCA6174_2_1_DEVICE_ID, 272 .bus = ATH10K_BUS_PCI, 273 .name = "qca6174 hw3.2", 274 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 275 .uart_pin = 6, 276 .otp_exe_param = 0, 277 .channel_counters_freq_hz = 88000, 278 .max_probe_resp_desc_thres = 0, 279 .cal_data_len = 8124, 280 .fw = { 281 /* uses same binaries as hw3.0 */ 282 .dir = QCA6174_HW_3_0_FW_DIR, 283 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 284 .board_size = QCA6174_BOARD_DATA_SZ, 285 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 286 }, 287 .hw_ops = &qca6174_ops, 288 .hw_clk = qca6174_clk, 289 .target_cpu_freq = 176000000, 290 .decap_align_bytes = 4, 291 .spectral_bin_discard = 0, 292 .spectral_bin_offset = 0, 293 .vht160_mcs_rx_highest = 0, 294 .vht160_mcs_tx_highest = 0, 295 .n_cipher_suites = 8, 296 .ast_skid_limit = 0x10, 297 .num_wds_entries = 0x20, 298 .target_64bit = false, 299 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 300 .per_ce_irq = false, 301 .shadow_reg_support = false, 302 .rri_on_ddr = false, 303 .hw_filter_reset_required = true, 304 .fw_diag_ce_download = true, 305 }, 306 { 307 .id = QCA99X0_HW_2_0_DEV_VERSION, 308 .dev_id = QCA99X0_2_0_DEVICE_ID, 309 .bus = ATH10K_BUS_PCI, 310 .name = "qca99x0 hw2.0", 311 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 312 .uart_pin = 7, 313 .otp_exe_param = 0x00000700, 314 .continuous_frag_desc = true, 315 .cck_rate_map_rev2 = true, 316 .channel_counters_freq_hz = 150000, 317 .max_probe_resp_desc_thres = 24, 318 .tx_chain_mask = 0xf, 319 .rx_chain_mask = 0xf, 320 .max_spatial_stream = 4, 321 .cal_data_len = 12064, 322 .fw = { 323 .dir = QCA99X0_HW_2_0_FW_DIR, 324 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 325 .board_size = QCA99X0_BOARD_DATA_SZ, 326 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 327 }, 328 .sw_decrypt_mcast_mgmt = true, 329 .hw_ops = &qca99x0_ops, 330 .decap_align_bytes = 1, 331 .spectral_bin_discard = 4, 332 .spectral_bin_offset = 0, 333 .vht160_mcs_rx_highest = 0, 334 .vht160_mcs_tx_highest = 0, 335 .n_cipher_suites = 11, 336 .ast_skid_limit = 0x10, 337 .num_wds_entries = 0x20, 338 .target_64bit = false, 339 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 340 .per_ce_irq = false, 341 .shadow_reg_support = false, 342 .rri_on_ddr = false, 343 .hw_filter_reset_required = true, 344 .fw_diag_ce_download = false, 345 }, 346 { 347 .id = QCA9984_HW_1_0_DEV_VERSION, 348 .dev_id = QCA9984_1_0_DEVICE_ID, 349 .bus = ATH10K_BUS_PCI, 350 .name = "qca9984/qca9994 hw1.0", 351 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 352 .uart_pin = 7, 353 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 354 .otp_exe_param = 0x00000700, 355 .continuous_frag_desc = true, 356 .cck_rate_map_rev2 = true, 357 .channel_counters_freq_hz = 150000, 358 .max_probe_resp_desc_thres = 24, 359 .tx_chain_mask = 0xf, 360 .rx_chain_mask = 0xf, 361 .max_spatial_stream = 4, 362 .cal_data_len = 12064, 363 .fw = { 364 .dir = QCA9984_HW_1_0_FW_DIR, 365 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 366 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 367 .board_size = QCA99X0_BOARD_DATA_SZ, 368 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 369 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 370 }, 371 .sw_decrypt_mcast_mgmt = true, 372 .hw_ops = &qca99x0_ops, 373 .decap_align_bytes = 1, 374 .spectral_bin_discard = 12, 375 .spectral_bin_offset = 8, 376 377 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 378 * or 2x2 160Mhz, long-guard-interval. 379 */ 380 .vht160_mcs_rx_highest = 1560, 381 .vht160_mcs_tx_highest = 1560, 382 .n_cipher_suites = 11, 383 .ast_skid_limit = 0x10, 384 .num_wds_entries = 0x20, 385 .target_64bit = false, 386 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 387 .per_ce_irq = false, 388 .shadow_reg_support = false, 389 .rri_on_ddr = false, 390 .hw_filter_reset_required = true, 391 .fw_diag_ce_download = false, 392 }, 393 { 394 .id = QCA9888_HW_2_0_DEV_VERSION, 395 .dev_id = QCA9888_2_0_DEVICE_ID, 396 .bus = ATH10K_BUS_PCI, 397 .name = "qca9888 hw2.0", 398 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 399 .uart_pin = 7, 400 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 401 .otp_exe_param = 0x00000700, 402 .continuous_frag_desc = true, 403 .channel_counters_freq_hz = 150000, 404 .max_probe_resp_desc_thres = 24, 405 .tx_chain_mask = 3, 406 .rx_chain_mask = 3, 407 .max_spatial_stream = 2, 408 .cal_data_len = 12064, 409 .fw = { 410 .dir = QCA9888_HW_2_0_FW_DIR, 411 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 412 .board_size = QCA99X0_BOARD_DATA_SZ, 413 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 414 }, 415 .sw_decrypt_mcast_mgmt = true, 416 .hw_ops = &qca99x0_ops, 417 .decap_align_bytes = 1, 418 .spectral_bin_discard = 12, 419 .spectral_bin_offset = 8, 420 421 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 422 * 1x1 160Mhz, long-guard-interval. 423 */ 424 .vht160_mcs_rx_highest = 780, 425 .vht160_mcs_tx_highest = 780, 426 .n_cipher_suites = 11, 427 .ast_skid_limit = 0x10, 428 .num_wds_entries = 0x20, 429 .target_64bit = false, 430 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 431 .per_ce_irq = false, 432 .shadow_reg_support = false, 433 .rri_on_ddr = false, 434 .hw_filter_reset_required = true, 435 .fw_diag_ce_download = false, 436 }, 437 { 438 .id = QCA9377_HW_1_0_DEV_VERSION, 439 .dev_id = QCA9377_1_0_DEVICE_ID, 440 .bus = ATH10K_BUS_PCI, 441 .name = "qca9377 hw1.0", 442 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 443 .uart_pin = 6, 444 .otp_exe_param = 0, 445 .channel_counters_freq_hz = 88000, 446 .max_probe_resp_desc_thres = 0, 447 .cal_data_len = 8124, 448 .fw = { 449 .dir = QCA9377_HW_1_0_FW_DIR, 450 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 451 .board_size = QCA9377_BOARD_DATA_SZ, 452 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 453 }, 454 .hw_ops = &qca988x_ops, 455 .decap_align_bytes = 4, 456 .spectral_bin_discard = 0, 457 .spectral_bin_offset = 0, 458 .vht160_mcs_rx_highest = 0, 459 .vht160_mcs_tx_highest = 0, 460 .n_cipher_suites = 8, 461 .ast_skid_limit = 0x10, 462 .num_wds_entries = 0x20, 463 .target_64bit = false, 464 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 465 .per_ce_irq = false, 466 .shadow_reg_support = false, 467 .rri_on_ddr = false, 468 .hw_filter_reset_required = true, 469 .fw_diag_ce_download = false, 470 }, 471 { 472 .id = QCA9377_HW_1_1_DEV_VERSION, 473 .dev_id = QCA9377_1_0_DEVICE_ID, 474 .bus = ATH10K_BUS_PCI, 475 .name = "qca9377 hw1.1", 476 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 477 .uart_pin = 6, 478 .otp_exe_param = 0, 479 .channel_counters_freq_hz = 88000, 480 .max_probe_resp_desc_thres = 0, 481 .cal_data_len = 8124, 482 .fw = { 483 .dir = QCA9377_HW_1_0_FW_DIR, 484 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 485 .board_size = QCA9377_BOARD_DATA_SZ, 486 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 487 }, 488 .hw_ops = &qca6174_ops, 489 .hw_clk = qca6174_clk, 490 .target_cpu_freq = 176000000, 491 .decap_align_bytes = 4, 492 .spectral_bin_discard = 0, 493 .spectral_bin_offset = 0, 494 .vht160_mcs_rx_highest = 0, 495 .vht160_mcs_tx_highest = 0, 496 .n_cipher_suites = 8, 497 .ast_skid_limit = 0x10, 498 .num_wds_entries = 0x20, 499 .target_64bit = false, 500 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 501 .per_ce_irq = false, 502 .shadow_reg_support = false, 503 .rri_on_ddr = false, 504 .hw_filter_reset_required = true, 505 .fw_diag_ce_download = true, 506 }, 507 { 508 .id = QCA4019_HW_1_0_DEV_VERSION, 509 .dev_id = 0, 510 .bus = ATH10K_BUS_AHB, 511 .name = "qca4019 hw1.0", 512 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 513 .uart_pin = 7, 514 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 515 .otp_exe_param = 0x0010000, 516 .continuous_frag_desc = true, 517 .cck_rate_map_rev2 = true, 518 .channel_counters_freq_hz = 125000, 519 .max_probe_resp_desc_thres = 24, 520 .tx_chain_mask = 0x3, 521 .rx_chain_mask = 0x3, 522 .max_spatial_stream = 2, 523 .cal_data_len = 12064, 524 .fw = { 525 .dir = QCA4019_HW_1_0_FW_DIR, 526 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 527 .board_size = QCA4019_BOARD_DATA_SZ, 528 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 529 }, 530 .sw_decrypt_mcast_mgmt = true, 531 .hw_ops = &qca99x0_ops, 532 .decap_align_bytes = 1, 533 .spectral_bin_discard = 4, 534 .spectral_bin_offset = 0, 535 .vht160_mcs_rx_highest = 0, 536 .vht160_mcs_tx_highest = 0, 537 .n_cipher_suites = 11, 538 .ast_skid_limit = 0x10, 539 .num_wds_entries = 0x20, 540 .target_64bit = false, 541 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 542 .per_ce_irq = false, 543 .shadow_reg_support = false, 544 .rri_on_ddr = false, 545 .hw_filter_reset_required = true, 546 .fw_diag_ce_download = false, 547 }, 548 { 549 .id = WCN3990_HW_1_0_DEV_VERSION, 550 .dev_id = 0, 551 .bus = ATH10K_BUS_PCI, 552 .name = "wcn3990 hw1.0", 553 .continuous_frag_desc = true, 554 .tx_chain_mask = 0x7, 555 .rx_chain_mask = 0x7, 556 .max_spatial_stream = 4, 557 .fw = { 558 .dir = WCN3990_HW_1_0_FW_DIR, 559 }, 560 .sw_decrypt_mcast_mgmt = true, 561 .hw_ops = &wcn3990_ops, 562 .decap_align_bytes = 1, 563 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 564 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 565 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 566 .target_64bit = true, 567 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 568 .per_ce_irq = true, 569 .shadow_reg_support = true, 570 .rri_on_ddr = true, 571 .hw_filter_reset_required = false, 572 .fw_diag_ce_download = false, 573 }, 574 }; 575 576 static const char *const ath10k_core_fw_feature_str[] = { 577 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 578 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 579 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 580 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 581 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 582 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 583 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 584 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 585 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 586 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 587 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 588 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 589 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 590 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 591 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 592 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 593 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 594 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 595 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 596 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 597 }; 598 599 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 600 size_t buf_len, 601 enum ath10k_fw_features feat) 602 { 603 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 604 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 605 ATH10K_FW_FEATURE_COUNT); 606 607 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 608 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 609 return scnprintf(buf, buf_len, "bit%d", feat); 610 } 611 612 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 613 } 614 615 void ath10k_core_get_fw_features_str(struct ath10k *ar, 616 char *buf, 617 size_t buf_len) 618 { 619 size_t len = 0; 620 int i; 621 622 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 623 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 624 if (len > 0) 625 len += scnprintf(buf + len, buf_len - len, ","); 626 627 len += ath10k_core_get_fw_feature_str(buf + len, 628 buf_len - len, 629 i); 630 } 631 } 632 } 633 634 static void ath10k_send_suspend_complete(struct ath10k *ar) 635 { 636 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 637 638 complete(&ar->target_suspend); 639 } 640 641 static void ath10k_init_sdio(struct ath10k *ar) 642 { 643 u32 param = 0; 644 645 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 646 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 647 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 648 649 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 650 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 651 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 652 653 ath10k_bmi_write32(ar, hi_acs_flags, param); 654 } 655 656 static int ath10k_init_configure_target(struct ath10k *ar) 657 { 658 u32 param_host; 659 int ret; 660 661 /* tell target which HTC version it is used*/ 662 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 663 HTC_PROTOCOL_VERSION); 664 if (ret) { 665 ath10k_err(ar, "settings HTC version failed\n"); 666 return ret; 667 } 668 669 /* set the firmware mode to STA/IBSS/AP */ 670 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 671 if (ret) { 672 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 673 return ret; 674 } 675 676 /* TODO following parameters need to be re-visited. */ 677 /* num_device */ 678 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 679 /* Firmware mode */ 680 /* FIXME: Why FW_MODE_AP ??.*/ 681 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 682 /* mac_addr_method */ 683 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 684 /* firmware_bridge */ 685 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 686 /* fwsubmode */ 687 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 688 689 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 690 if (ret) { 691 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 692 return ret; 693 } 694 695 /* We do all byte-swapping on the host */ 696 ret = ath10k_bmi_write32(ar, hi_be, 0); 697 if (ret) { 698 ath10k_err(ar, "setting host CPU BE mode failed\n"); 699 return ret; 700 } 701 702 /* FW descriptor/Data swap flags */ 703 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 704 705 if (ret) { 706 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 707 return ret; 708 } 709 710 /* Some devices have a special sanity check that verifies the PCI 711 * Device ID is written to this host interest var. It is known to be 712 * required to boot QCA6164. 713 */ 714 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 715 ar->dev_id); 716 if (ret) { 717 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 718 return ret; 719 } 720 721 return 0; 722 } 723 724 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 725 const char *dir, 726 const char *file) 727 { 728 char filename[100]; 729 const struct firmware *fw; 730 int ret; 731 732 if (file == NULL) 733 return ERR_PTR(-ENOENT); 734 735 if (dir == NULL) 736 dir = "."; 737 738 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 739 ret = firmware_request_nowarn(&fw, filename, ar->dev); 740 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 741 filename, ret); 742 743 if (ret) 744 return ERR_PTR(ret); 745 746 return fw; 747 } 748 749 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 750 size_t data_len) 751 { 752 u32 board_data_size = ar->hw_params.fw.board_size; 753 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 754 u32 board_ext_data_addr; 755 int ret; 756 757 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 758 if (ret) { 759 ath10k_err(ar, "could not read board ext data addr (%d)\n", 760 ret); 761 return ret; 762 } 763 764 ath10k_dbg(ar, ATH10K_DBG_BOOT, 765 "boot push board extended data addr 0x%x\n", 766 board_ext_data_addr); 767 768 if (board_ext_data_addr == 0) 769 return 0; 770 771 if (data_len != (board_data_size + board_ext_data_size)) { 772 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 773 data_len, board_data_size, board_ext_data_size); 774 return -EINVAL; 775 } 776 777 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 778 data + board_data_size, 779 board_ext_data_size); 780 if (ret) { 781 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 782 return ret; 783 } 784 785 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 786 (board_ext_data_size << 16) | 1); 787 if (ret) { 788 ath10k_err(ar, "could not write board ext data bit (%d)\n", 789 ret); 790 return ret; 791 } 792 793 return 0; 794 } 795 796 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 797 { 798 u32 result, address; 799 u8 board_id, chip_id; 800 bool ext_bid_support; 801 int ret, bmi_board_id_param; 802 803 address = ar->hw_params.patch_load_addr; 804 805 if (!ar->normal_mode_fw.fw_file.otp_data || 806 !ar->normal_mode_fw.fw_file.otp_len) { 807 ath10k_warn(ar, 808 "failed to retrieve board id because of invalid otp\n"); 809 return -ENODATA; 810 } 811 812 ath10k_dbg(ar, ATH10K_DBG_BOOT, 813 "boot upload otp to 0x%x len %zd for board id\n", 814 address, ar->normal_mode_fw.fw_file.otp_len); 815 816 ret = ath10k_bmi_fast_download(ar, address, 817 ar->normal_mode_fw.fw_file.otp_data, 818 ar->normal_mode_fw.fw_file.otp_len); 819 if (ret) { 820 ath10k_err(ar, "could not write otp for board id check: %d\n", 821 ret); 822 return ret; 823 } 824 825 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 826 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 827 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 828 else 829 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 830 831 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 832 if (ret) { 833 ath10k_err(ar, "could not execute otp for board id check: %d\n", 834 ret); 835 return ret; 836 } 837 838 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 839 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 840 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 841 842 ath10k_dbg(ar, ATH10K_DBG_BOOT, 843 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 844 result, board_id, chip_id, ext_bid_support); 845 846 ar->id.ext_bid_supported = ext_bid_support; 847 848 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 849 (board_id == 0)) { 850 ath10k_dbg(ar, ATH10K_DBG_BOOT, 851 "board id does not exist in otp, ignore it\n"); 852 return -EOPNOTSUPP; 853 } 854 855 ar->id.bmi_ids_valid = true; 856 ar->id.bmi_board_id = board_id; 857 ar->id.bmi_chip_id = chip_id; 858 859 return 0; 860 } 861 862 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 863 { 864 struct ath10k *ar = data; 865 const char *bdf_ext; 866 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 867 u8 bdf_enabled; 868 int i; 869 870 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 871 return; 872 873 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 874 ath10k_dbg(ar, ATH10K_DBG_BOOT, 875 "wrong smbios bdf ext type length (%d).\n", 876 hdr->length); 877 return; 878 } 879 880 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 881 if (!bdf_enabled) { 882 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 883 return; 884 } 885 886 /* Only one string exists (per spec) */ 887 bdf_ext = (char *)hdr + hdr->length; 888 889 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 890 ath10k_dbg(ar, ATH10K_DBG_BOOT, 891 "bdf variant magic does not match.\n"); 892 return; 893 } 894 895 for (i = 0; i < strlen(bdf_ext); i++) { 896 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 897 ath10k_dbg(ar, ATH10K_DBG_BOOT, 898 "bdf variant name contains non ascii chars.\n"); 899 return; 900 } 901 } 902 903 /* Copy extension name without magic suffix */ 904 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 905 sizeof(ar->id.bdf_ext)) < 0) { 906 ath10k_dbg(ar, ATH10K_DBG_BOOT, 907 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 908 bdf_ext); 909 return; 910 } 911 912 ath10k_dbg(ar, ATH10K_DBG_BOOT, 913 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 914 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 915 } 916 917 static int ath10k_core_check_smbios(struct ath10k *ar) 918 { 919 ar->id.bdf_ext[0] = '\0'; 920 dmi_walk(ath10k_core_check_bdfext, ar); 921 922 if (ar->id.bdf_ext[0] == '\0') 923 return -ENODATA; 924 925 return 0; 926 } 927 928 static int ath10k_core_check_dt(struct ath10k *ar) 929 { 930 struct device_node *node; 931 const char *variant = NULL; 932 933 node = ar->dev->of_node; 934 if (!node) 935 return -ENOENT; 936 937 of_property_read_string(node, "qcom,ath10k-calibration-variant", 938 &variant); 939 if (!variant) 940 return -ENODATA; 941 942 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 943 ath10k_dbg(ar, ATH10K_DBG_BOOT, 944 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 945 variant); 946 947 return 0; 948 } 949 950 static int ath10k_download_fw(struct ath10k *ar) 951 { 952 u32 address, data_len; 953 const void *data; 954 int ret; 955 956 address = ar->hw_params.patch_load_addr; 957 958 data = ar->running_fw->fw_file.firmware_data; 959 data_len = ar->running_fw->fw_file.firmware_len; 960 961 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 962 if (ret) { 963 ath10k_err(ar, "failed to configure fw code swap: %d\n", 964 ret); 965 return ret; 966 } 967 968 ath10k_dbg(ar, ATH10K_DBG_BOOT, 969 "boot uploading firmware image %pK len %d\n", 970 data, data_len); 971 972 /* Check if device supports to download firmware via 973 * diag copy engine. Downloading firmware via diag CE 974 * greatly reduces the time to download firmware. 975 */ 976 if (ar->hw_params.fw_diag_ce_download) { 977 ret = ath10k_hw_diag_fast_download(ar, address, 978 data, data_len); 979 if (ret == 0) 980 /* firmware upload via diag ce was successful */ 981 return 0; 982 983 ath10k_warn(ar, 984 "failed to upload firmware via diag ce, trying BMI: %d", 985 ret); 986 } 987 988 return ath10k_bmi_fast_download(ar, address, 989 data, data_len); 990 } 991 992 static void ath10k_core_free_board_files(struct ath10k *ar) 993 { 994 if (!IS_ERR(ar->normal_mode_fw.board)) 995 release_firmware(ar->normal_mode_fw.board); 996 997 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 998 release_firmware(ar->normal_mode_fw.ext_board); 999 1000 ar->normal_mode_fw.board = NULL; 1001 ar->normal_mode_fw.board_data = NULL; 1002 ar->normal_mode_fw.board_len = 0; 1003 ar->normal_mode_fw.ext_board = NULL; 1004 ar->normal_mode_fw.ext_board_data = NULL; 1005 ar->normal_mode_fw.ext_board_len = 0; 1006 } 1007 1008 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1009 { 1010 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1011 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1012 1013 if (!IS_ERR(ar->cal_file)) 1014 release_firmware(ar->cal_file); 1015 1016 if (!IS_ERR(ar->pre_cal_file)) 1017 release_firmware(ar->pre_cal_file); 1018 1019 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1020 1021 ar->normal_mode_fw.fw_file.otp_data = NULL; 1022 ar->normal_mode_fw.fw_file.otp_len = 0; 1023 1024 ar->normal_mode_fw.fw_file.firmware = NULL; 1025 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1026 ar->normal_mode_fw.fw_file.firmware_len = 0; 1027 1028 ar->cal_file = NULL; 1029 ar->pre_cal_file = NULL; 1030 } 1031 1032 static int ath10k_fetch_cal_file(struct ath10k *ar) 1033 { 1034 char filename[100]; 1035 1036 /* pre-cal-<bus>-<id>.bin */ 1037 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1038 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1039 1040 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1041 if (!IS_ERR(ar->pre_cal_file)) 1042 goto success; 1043 1044 /* cal-<bus>-<id>.bin */ 1045 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1046 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1047 1048 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1049 if (IS_ERR(ar->cal_file)) 1050 /* calibration file is optional, don't print any warnings */ 1051 return PTR_ERR(ar->cal_file); 1052 success: 1053 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1054 ATH10K_FW_DIR, filename); 1055 1056 return 0; 1057 } 1058 1059 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1060 { 1061 const struct firmware *fw; 1062 1063 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1064 if (!ar->hw_params.fw.board) { 1065 ath10k_err(ar, "failed to find board file fw entry\n"); 1066 return -EINVAL; 1067 } 1068 1069 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1070 ar->hw_params.fw.dir, 1071 ar->hw_params.fw.board); 1072 if (IS_ERR(ar->normal_mode_fw.board)) 1073 return PTR_ERR(ar->normal_mode_fw.board); 1074 1075 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1076 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1077 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1078 if (!ar->hw_params.fw.eboard) { 1079 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1080 return -EINVAL; 1081 } 1082 1083 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1084 ar->hw_params.fw.eboard); 1085 ar->normal_mode_fw.ext_board = fw; 1086 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1087 return PTR_ERR(ar->normal_mode_fw.ext_board); 1088 1089 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1090 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1091 } 1092 1093 return 0; 1094 } 1095 1096 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1097 const void *buf, size_t buf_len, 1098 const char *boardname, 1099 int bd_ie_type) 1100 { 1101 const struct ath10k_fw_ie *hdr; 1102 bool name_match_found; 1103 int ret, board_ie_id; 1104 size_t board_ie_len; 1105 const void *board_ie_data; 1106 1107 name_match_found = false; 1108 1109 /* go through ATH10K_BD_IE_BOARD_ elements */ 1110 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1111 hdr = buf; 1112 board_ie_id = le32_to_cpu(hdr->id); 1113 board_ie_len = le32_to_cpu(hdr->len); 1114 board_ie_data = hdr->data; 1115 1116 buf_len -= sizeof(*hdr); 1117 buf += sizeof(*hdr); 1118 1119 if (buf_len < ALIGN(board_ie_len, 4)) { 1120 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1121 buf_len, ALIGN(board_ie_len, 4)); 1122 ret = -EINVAL; 1123 goto out; 1124 } 1125 1126 switch (board_ie_id) { 1127 case ATH10K_BD_IE_BOARD_NAME: 1128 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1129 board_ie_data, board_ie_len); 1130 1131 if (board_ie_len != strlen(boardname)) 1132 break; 1133 1134 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1135 if (ret) 1136 break; 1137 1138 name_match_found = true; 1139 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1140 "boot found match for name '%s'", 1141 boardname); 1142 break; 1143 case ATH10K_BD_IE_BOARD_DATA: 1144 if (!name_match_found) 1145 /* no match found */ 1146 break; 1147 1148 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1149 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1150 "boot found board data for '%s'", 1151 boardname); 1152 1153 ar->normal_mode_fw.board_data = board_ie_data; 1154 ar->normal_mode_fw.board_len = board_ie_len; 1155 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1156 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1157 "boot found eboard data for '%s'", 1158 boardname); 1159 1160 ar->normal_mode_fw.ext_board_data = board_ie_data; 1161 ar->normal_mode_fw.ext_board_len = board_ie_len; 1162 } 1163 1164 ret = 0; 1165 goto out; 1166 default: 1167 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1168 board_ie_id); 1169 break; 1170 } 1171 1172 /* jump over the padding */ 1173 board_ie_len = ALIGN(board_ie_len, 4); 1174 1175 buf_len -= board_ie_len; 1176 buf += board_ie_len; 1177 } 1178 1179 /* no match found */ 1180 ret = -ENOENT; 1181 1182 out: 1183 return ret; 1184 } 1185 1186 static int ath10k_core_search_bd(struct ath10k *ar, 1187 const char *boardname, 1188 const u8 *data, 1189 size_t len) 1190 { 1191 size_t ie_len; 1192 struct ath10k_fw_ie *hdr; 1193 int ret = -ENOENT, ie_id; 1194 1195 while (len > sizeof(struct ath10k_fw_ie)) { 1196 hdr = (struct ath10k_fw_ie *)data; 1197 ie_id = le32_to_cpu(hdr->id); 1198 ie_len = le32_to_cpu(hdr->len); 1199 1200 len -= sizeof(*hdr); 1201 data = hdr->data; 1202 1203 if (len < ALIGN(ie_len, 4)) { 1204 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1205 ie_id, ie_len, len); 1206 return -EINVAL; 1207 } 1208 1209 switch (ie_id) { 1210 case ATH10K_BD_IE_BOARD: 1211 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1212 boardname, 1213 ATH10K_BD_IE_BOARD); 1214 if (ret == -ENOENT) 1215 /* no match found, continue */ 1216 break; 1217 1218 /* either found or error, so stop searching */ 1219 goto out; 1220 case ATH10K_BD_IE_BOARD_EXT: 1221 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1222 boardname, 1223 ATH10K_BD_IE_BOARD_EXT); 1224 if (ret == -ENOENT) 1225 /* no match found, continue */ 1226 break; 1227 1228 /* either found or error, so stop searching */ 1229 goto out; 1230 } 1231 1232 /* jump over the padding */ 1233 ie_len = ALIGN(ie_len, 4); 1234 1235 len -= ie_len; 1236 data += ie_len; 1237 } 1238 1239 out: 1240 /* return result of parse_bd_ie_board() or -ENOENT */ 1241 return ret; 1242 } 1243 1244 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1245 const char *boardname, 1246 const char *fallback_boardname, 1247 const char *filename) 1248 { 1249 size_t len, magic_len; 1250 const u8 *data; 1251 int ret; 1252 1253 /* Skip if already fetched during board data download */ 1254 if (!ar->normal_mode_fw.board) 1255 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1256 ar->hw_params.fw.dir, 1257 filename); 1258 if (IS_ERR(ar->normal_mode_fw.board)) 1259 return PTR_ERR(ar->normal_mode_fw.board); 1260 1261 data = ar->normal_mode_fw.board->data; 1262 len = ar->normal_mode_fw.board->size; 1263 1264 /* magic has extra null byte padded */ 1265 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1266 if (len < magic_len) { 1267 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1268 ar->hw_params.fw.dir, filename, len); 1269 ret = -EINVAL; 1270 goto err; 1271 } 1272 1273 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1274 ath10k_err(ar, "found invalid board magic\n"); 1275 ret = -EINVAL; 1276 goto err; 1277 } 1278 1279 /* magic is padded to 4 bytes */ 1280 magic_len = ALIGN(magic_len, 4); 1281 if (len < magic_len) { 1282 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1283 ar->hw_params.fw.dir, filename, len); 1284 ret = -EINVAL; 1285 goto err; 1286 } 1287 1288 data += magic_len; 1289 len -= magic_len; 1290 1291 /* attempt to find boardname in the IE list */ 1292 ret = ath10k_core_search_bd(ar, boardname, data, len); 1293 1294 /* if we didn't find it and have a fallback name, try that */ 1295 if (ret == -ENOENT && fallback_boardname) 1296 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1297 1298 if (ret == -ENOENT) { 1299 ath10k_err(ar, 1300 "failed to fetch board data for %s from %s/%s\n", 1301 boardname, ar->hw_params.fw.dir, filename); 1302 ret = -ENODATA; 1303 } 1304 1305 if (ret) 1306 goto err; 1307 1308 return 0; 1309 1310 err: 1311 ath10k_core_free_board_files(ar); 1312 return ret; 1313 } 1314 1315 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1316 size_t name_len, bool with_variant) 1317 { 1318 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1319 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1320 1321 if (with_variant && ar->id.bdf_ext[0] != '\0') 1322 scnprintf(variant, sizeof(variant), ",variant=%s", 1323 ar->id.bdf_ext); 1324 1325 if (ar->id.bmi_ids_valid) { 1326 scnprintf(name, name_len, 1327 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1328 ath10k_bus_str(ar->hif.bus), 1329 ar->id.bmi_chip_id, 1330 ar->id.bmi_board_id, variant); 1331 goto out; 1332 } 1333 1334 scnprintf(name, name_len, 1335 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1336 ath10k_bus_str(ar->hif.bus), 1337 ar->id.vendor, ar->id.device, 1338 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1339 out: 1340 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1341 1342 return 0; 1343 } 1344 1345 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1346 size_t name_len) 1347 { 1348 if (ar->id.bmi_ids_valid) { 1349 scnprintf(name, name_len, 1350 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1351 ath10k_bus_str(ar->hif.bus), 1352 ar->id.bmi_chip_id, 1353 ar->id.bmi_eboard_id); 1354 1355 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1356 return 0; 1357 } 1358 /* Fallback if returned board id is zero */ 1359 return -1; 1360 } 1361 1362 static int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1363 { 1364 char boardname[100], fallback_boardname[100]; 1365 int ret; 1366 1367 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1368 ret = ath10k_core_create_board_name(ar, boardname, 1369 sizeof(boardname), true); 1370 if (ret) { 1371 ath10k_err(ar, "failed to create board name: %d", ret); 1372 return ret; 1373 } 1374 1375 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1376 sizeof(boardname), false); 1377 if (ret) { 1378 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1379 return ret; 1380 } 1381 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1382 ret = ath10k_core_create_eboard_name(ar, boardname, 1383 sizeof(boardname)); 1384 if (ret) { 1385 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1386 goto fallback; 1387 } 1388 } 1389 1390 ar->bd_api = 2; 1391 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1392 fallback_boardname, 1393 ATH10K_BOARD_API2_FILE); 1394 if (!ret) 1395 goto success; 1396 1397 fallback: 1398 ar->bd_api = 1; 1399 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1400 if (ret) { 1401 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1402 ar->hw_params.fw.dir); 1403 return ret; 1404 } 1405 1406 success: 1407 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1408 return 0; 1409 } 1410 1411 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1412 { 1413 u32 result, address; 1414 u8 ext_board_id; 1415 int ret; 1416 1417 address = ar->hw_params.patch_load_addr; 1418 1419 if (!ar->normal_mode_fw.fw_file.otp_data || 1420 !ar->normal_mode_fw.fw_file.otp_len) { 1421 ath10k_warn(ar, 1422 "failed to retrieve extended board id due to otp binary missing\n"); 1423 return -ENODATA; 1424 } 1425 1426 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1427 "boot upload otp to 0x%x len %zd for ext board id\n", 1428 address, ar->normal_mode_fw.fw_file.otp_len); 1429 1430 ret = ath10k_bmi_fast_download(ar, address, 1431 ar->normal_mode_fw.fw_file.otp_data, 1432 ar->normal_mode_fw.fw_file.otp_len); 1433 if (ret) { 1434 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1435 ret); 1436 return ret; 1437 } 1438 1439 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1440 if (ret) { 1441 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1442 ret); 1443 return ret; 1444 } 1445 1446 if (!result) { 1447 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1448 "ext board id does not exist in otp, ignore it\n"); 1449 return -EOPNOTSUPP; 1450 } 1451 1452 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1453 1454 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1455 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1456 result, ext_board_id); 1457 1458 ar->id.bmi_eboard_id = ext_board_id; 1459 1460 return 0; 1461 } 1462 1463 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1464 size_t data_len) 1465 { 1466 u32 board_data_size = ar->hw_params.fw.board_size; 1467 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1468 u32 board_address; 1469 u32 ext_board_address; 1470 int ret; 1471 1472 ret = ath10k_push_board_ext_data(ar, data, data_len); 1473 if (ret) { 1474 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1475 goto exit; 1476 } 1477 1478 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1479 if (ret) { 1480 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1481 goto exit; 1482 } 1483 1484 ret = ath10k_bmi_write_memory(ar, board_address, data, 1485 min_t(u32, board_data_size, 1486 data_len)); 1487 if (ret) { 1488 ath10k_err(ar, "could not write board data (%d)\n", ret); 1489 goto exit; 1490 } 1491 1492 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1493 if (ret) { 1494 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1495 goto exit; 1496 } 1497 1498 if (!ar->id.ext_bid_supported) 1499 goto exit; 1500 1501 /* Extended board data download */ 1502 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1503 if (ret == -EOPNOTSUPP) { 1504 /* Not fetching ext_board_data if ext board id is 0 */ 1505 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1506 return 0; 1507 } else if (ret) { 1508 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1509 goto exit; 1510 } 1511 1512 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1513 if (ret) 1514 goto exit; 1515 1516 if (ar->normal_mode_fw.ext_board_data) { 1517 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1518 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1519 "boot writing ext board data to addr 0x%x", 1520 ext_board_address); 1521 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1522 ar->normal_mode_fw.ext_board_data, 1523 min_t(u32, eboard_data_size, data_len)); 1524 if (ret) 1525 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1526 } 1527 1528 exit: 1529 return ret; 1530 } 1531 1532 static int ath10k_download_and_run_otp(struct ath10k *ar) 1533 { 1534 u32 result, address = ar->hw_params.patch_load_addr; 1535 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1536 int ret; 1537 1538 ret = ath10k_download_board_data(ar, 1539 ar->running_fw->board_data, 1540 ar->running_fw->board_len); 1541 if (ret) { 1542 ath10k_err(ar, "failed to download board data: %d\n", ret); 1543 return ret; 1544 } 1545 1546 /* OTP is optional */ 1547 1548 if (!ar->running_fw->fw_file.otp_data || 1549 !ar->running_fw->fw_file.otp_len) { 1550 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1551 ar->running_fw->fw_file.otp_data, 1552 ar->running_fw->fw_file.otp_len); 1553 return 0; 1554 } 1555 1556 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1557 address, ar->running_fw->fw_file.otp_len); 1558 1559 ret = ath10k_bmi_fast_download(ar, address, 1560 ar->running_fw->fw_file.otp_data, 1561 ar->running_fw->fw_file.otp_len); 1562 if (ret) { 1563 ath10k_err(ar, "could not write otp (%d)\n", ret); 1564 return ret; 1565 } 1566 1567 /* As of now pre-cal is valid for 10_4 variants */ 1568 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1569 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1570 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1571 1572 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1573 if (ret) { 1574 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1575 return ret; 1576 } 1577 1578 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1579 1580 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1581 ar->running_fw->fw_file.fw_features)) && 1582 result != 0) { 1583 ath10k_err(ar, "otp calibration failed: %d", result); 1584 return -EINVAL; 1585 } 1586 1587 return 0; 1588 } 1589 1590 static int ath10k_download_cal_file(struct ath10k *ar, 1591 const struct firmware *file) 1592 { 1593 int ret; 1594 1595 if (!file) 1596 return -ENOENT; 1597 1598 if (IS_ERR(file)) 1599 return PTR_ERR(file); 1600 1601 ret = ath10k_download_board_data(ar, file->data, file->size); 1602 if (ret) { 1603 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1604 return ret; 1605 } 1606 1607 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1608 1609 return 0; 1610 } 1611 1612 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1613 { 1614 struct device_node *node; 1615 int data_len; 1616 void *data; 1617 int ret; 1618 1619 node = ar->dev->of_node; 1620 if (!node) 1621 /* Device Tree is optional, don't print any warnings if 1622 * there's no node for ath10k. 1623 */ 1624 return -ENOENT; 1625 1626 if (!of_get_property(node, dt_name, &data_len)) { 1627 /* The calibration data node is optional */ 1628 return -ENOENT; 1629 } 1630 1631 if (data_len != ar->hw_params.cal_data_len) { 1632 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1633 data_len); 1634 ret = -EMSGSIZE; 1635 goto out; 1636 } 1637 1638 data = kmalloc(data_len, GFP_KERNEL); 1639 if (!data) { 1640 ret = -ENOMEM; 1641 goto out; 1642 } 1643 1644 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1645 if (ret) { 1646 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1647 ret); 1648 goto out_free; 1649 } 1650 1651 ret = ath10k_download_board_data(ar, data, data_len); 1652 if (ret) { 1653 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1654 ret); 1655 goto out_free; 1656 } 1657 1658 ret = 0; 1659 1660 out_free: 1661 kfree(data); 1662 1663 out: 1664 return ret; 1665 } 1666 1667 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1668 { 1669 size_t data_len; 1670 void *data = NULL; 1671 int ret; 1672 1673 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1674 if (ret) { 1675 if (ret != -EOPNOTSUPP) 1676 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1677 ret); 1678 goto out_free; 1679 } 1680 1681 ret = ath10k_download_board_data(ar, data, data_len); 1682 if (ret) { 1683 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1684 ret); 1685 goto out_free; 1686 } 1687 1688 ret = 0; 1689 1690 out_free: 1691 kfree(data); 1692 1693 return ret; 1694 } 1695 1696 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1697 struct ath10k_fw_file *fw_file) 1698 { 1699 size_t magic_len, len, ie_len; 1700 int ie_id, i, index, bit, ret; 1701 struct ath10k_fw_ie *hdr; 1702 const u8 *data; 1703 __le32 *timestamp, *version; 1704 1705 /* first fetch the firmware file (firmware-*.bin) */ 1706 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1707 name); 1708 if (IS_ERR(fw_file->firmware)) 1709 return PTR_ERR(fw_file->firmware); 1710 1711 data = fw_file->firmware->data; 1712 len = fw_file->firmware->size; 1713 1714 /* magic also includes the null byte, check that as well */ 1715 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1716 1717 if (len < magic_len) { 1718 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1719 ar->hw_params.fw.dir, name, len); 1720 ret = -EINVAL; 1721 goto err; 1722 } 1723 1724 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1725 ath10k_err(ar, "invalid firmware magic\n"); 1726 ret = -EINVAL; 1727 goto err; 1728 } 1729 1730 /* jump over the padding */ 1731 magic_len = ALIGN(magic_len, 4); 1732 1733 len -= magic_len; 1734 data += magic_len; 1735 1736 /* loop elements */ 1737 while (len > sizeof(struct ath10k_fw_ie)) { 1738 hdr = (struct ath10k_fw_ie *)data; 1739 1740 ie_id = le32_to_cpu(hdr->id); 1741 ie_len = le32_to_cpu(hdr->len); 1742 1743 len -= sizeof(*hdr); 1744 data += sizeof(*hdr); 1745 1746 if (len < ie_len) { 1747 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1748 ie_id, len, ie_len); 1749 ret = -EINVAL; 1750 goto err; 1751 } 1752 1753 switch (ie_id) { 1754 case ATH10K_FW_IE_FW_VERSION: 1755 if (ie_len > sizeof(fw_file->fw_version) - 1) 1756 break; 1757 1758 memcpy(fw_file->fw_version, data, ie_len); 1759 fw_file->fw_version[ie_len] = '\0'; 1760 1761 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1762 "found fw version %s\n", 1763 fw_file->fw_version); 1764 break; 1765 case ATH10K_FW_IE_TIMESTAMP: 1766 if (ie_len != sizeof(u32)) 1767 break; 1768 1769 timestamp = (__le32 *)data; 1770 1771 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1772 le32_to_cpup(timestamp)); 1773 break; 1774 case ATH10K_FW_IE_FEATURES: 1775 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1776 "found firmware features ie (%zd B)\n", 1777 ie_len); 1778 1779 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1780 index = i / 8; 1781 bit = i % 8; 1782 1783 if (index == ie_len) 1784 break; 1785 1786 if (data[index] & (1 << bit)) { 1787 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1788 "Enabling feature bit: %i\n", 1789 i); 1790 __set_bit(i, fw_file->fw_features); 1791 } 1792 } 1793 1794 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1795 fw_file->fw_features, 1796 sizeof(fw_file->fw_features)); 1797 break; 1798 case ATH10K_FW_IE_FW_IMAGE: 1799 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1800 "found fw image ie (%zd B)\n", 1801 ie_len); 1802 1803 fw_file->firmware_data = data; 1804 fw_file->firmware_len = ie_len; 1805 1806 break; 1807 case ATH10K_FW_IE_OTP_IMAGE: 1808 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1809 "found otp image ie (%zd B)\n", 1810 ie_len); 1811 1812 fw_file->otp_data = data; 1813 fw_file->otp_len = ie_len; 1814 1815 break; 1816 case ATH10K_FW_IE_WMI_OP_VERSION: 1817 if (ie_len != sizeof(u32)) 1818 break; 1819 1820 version = (__le32 *)data; 1821 1822 fw_file->wmi_op_version = le32_to_cpup(version); 1823 1824 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1825 fw_file->wmi_op_version); 1826 break; 1827 case ATH10K_FW_IE_HTT_OP_VERSION: 1828 if (ie_len != sizeof(u32)) 1829 break; 1830 1831 version = (__le32 *)data; 1832 1833 fw_file->htt_op_version = le32_to_cpup(version); 1834 1835 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1836 fw_file->htt_op_version); 1837 break; 1838 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1839 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1840 "found fw code swap image ie (%zd B)\n", 1841 ie_len); 1842 fw_file->codeswap_data = data; 1843 fw_file->codeswap_len = ie_len; 1844 break; 1845 default: 1846 ath10k_warn(ar, "Unknown FW IE: %u\n", 1847 le32_to_cpu(hdr->id)); 1848 break; 1849 } 1850 1851 /* jump over the padding */ 1852 ie_len = ALIGN(ie_len, 4); 1853 1854 len -= ie_len; 1855 data += ie_len; 1856 } 1857 1858 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1859 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1860 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1861 ar->hw_params.fw.dir, name); 1862 ret = -ENOMEDIUM; 1863 goto err; 1864 } 1865 1866 return 0; 1867 1868 err: 1869 ath10k_core_free_firmware_files(ar); 1870 return ret; 1871 } 1872 1873 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1874 size_t fw_name_len, int fw_api) 1875 { 1876 switch (ar->hif.bus) { 1877 case ATH10K_BUS_SDIO: 1878 case ATH10K_BUS_USB: 1879 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1880 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1881 fw_api); 1882 break; 1883 case ATH10K_BUS_PCI: 1884 case ATH10K_BUS_AHB: 1885 case ATH10K_BUS_SNOC: 1886 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1887 ATH10K_FW_FILE_BASE, fw_api); 1888 break; 1889 } 1890 } 1891 1892 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1893 { 1894 int ret, i; 1895 char fw_name[100]; 1896 1897 /* calibration file is optional, don't check for any errors */ 1898 ath10k_fetch_cal_file(ar); 1899 1900 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1901 ar->fw_api = i; 1902 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1903 ar->fw_api); 1904 1905 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1906 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1907 &ar->normal_mode_fw.fw_file); 1908 if (!ret) 1909 goto success; 1910 } 1911 1912 /* we end up here if we couldn't fetch any firmware */ 1913 1914 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1915 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1916 ret); 1917 1918 return ret; 1919 1920 success: 1921 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1922 1923 return 0; 1924 } 1925 1926 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1927 { 1928 int ret; 1929 1930 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1931 if (ret == 0) { 1932 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1933 goto success; 1934 } 1935 1936 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1937 "boot did not find a pre calibration file, try DT next: %d\n", 1938 ret); 1939 1940 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1941 if (ret) { 1942 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1943 "unable to load pre cal data from DT: %d\n", ret); 1944 return ret; 1945 } 1946 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1947 1948 success: 1949 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1950 ath10k_cal_mode_str(ar->cal_mode)); 1951 1952 return 0; 1953 } 1954 1955 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1956 { 1957 int ret; 1958 1959 ret = ath10k_core_pre_cal_download(ar); 1960 if (ret) { 1961 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1962 "failed to load pre cal data: %d\n", ret); 1963 return ret; 1964 } 1965 1966 ret = ath10k_core_get_board_id_from_otp(ar); 1967 if (ret) { 1968 ath10k_err(ar, "failed to get board id: %d\n", ret); 1969 return ret; 1970 } 1971 1972 ret = ath10k_download_and_run_otp(ar); 1973 if (ret) { 1974 ath10k_err(ar, "failed to run otp: %d\n", ret); 1975 return ret; 1976 } 1977 1978 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1979 "pre cal configuration done successfully\n"); 1980 1981 return 0; 1982 } 1983 1984 static int ath10k_download_cal_data(struct ath10k *ar) 1985 { 1986 int ret; 1987 1988 ret = ath10k_core_pre_cal_config(ar); 1989 if (ret == 0) 1990 return 0; 1991 1992 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1993 "pre cal download procedure failed, try cal file: %d\n", 1994 ret); 1995 1996 ret = ath10k_download_cal_file(ar, ar->cal_file); 1997 if (ret == 0) { 1998 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1999 goto done; 2000 } 2001 2002 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2003 "boot did not find a calibration file, try DT next: %d\n", 2004 ret); 2005 2006 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2007 if (ret == 0) { 2008 ar->cal_mode = ATH10K_CAL_MODE_DT; 2009 goto done; 2010 } 2011 2012 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2013 "boot did not find DT entry, try target EEPROM next: %d\n", 2014 ret); 2015 2016 ret = ath10k_download_cal_eeprom(ar); 2017 if (ret == 0) { 2018 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2019 goto done; 2020 } 2021 2022 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2023 "boot did not find target EEPROM entry, try OTP next: %d\n", 2024 ret); 2025 2026 ret = ath10k_download_and_run_otp(ar); 2027 if (ret) { 2028 ath10k_err(ar, "failed to run otp: %d\n", ret); 2029 return ret; 2030 } 2031 2032 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2033 2034 done: 2035 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2036 ath10k_cal_mode_str(ar->cal_mode)); 2037 return 0; 2038 } 2039 2040 static int ath10k_init_uart(struct ath10k *ar) 2041 { 2042 int ret; 2043 2044 /* 2045 * Explicitly setting UART prints to zero as target turns it on 2046 * based on scratch registers. 2047 */ 2048 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2049 if (ret) { 2050 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2051 return ret; 2052 } 2053 2054 if (!uart_print) 2055 return 0; 2056 2057 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2058 if (ret) { 2059 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2060 return ret; 2061 } 2062 2063 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2064 if (ret) { 2065 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2066 return ret; 2067 } 2068 2069 /* Set the UART baud rate to 19200. */ 2070 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2071 if (ret) { 2072 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2073 return ret; 2074 } 2075 2076 ath10k_info(ar, "UART prints enabled\n"); 2077 return 0; 2078 } 2079 2080 static int ath10k_init_hw_params(struct ath10k *ar) 2081 { 2082 const struct ath10k_hw_params *uninitialized_var(hw_params); 2083 int i; 2084 2085 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2086 hw_params = &ath10k_hw_params_list[i]; 2087 2088 if (hw_params->bus == ar->hif.bus && 2089 hw_params->id == ar->target_version && 2090 hw_params->dev_id == ar->dev_id) 2091 break; 2092 } 2093 2094 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2095 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2096 ar->target_version); 2097 return -EINVAL; 2098 } 2099 2100 ar->hw_params = *hw_params; 2101 2102 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2103 ar->hw_params.name, ar->target_version); 2104 2105 return 0; 2106 } 2107 2108 static void ath10k_core_restart(struct work_struct *work) 2109 { 2110 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2111 int ret; 2112 2113 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2114 2115 /* Place a barrier to make sure the compiler doesn't reorder 2116 * CRASH_FLUSH and calling other functions. 2117 */ 2118 barrier(); 2119 2120 ieee80211_stop_queues(ar->hw); 2121 ath10k_drain_tx(ar); 2122 complete(&ar->scan.started); 2123 complete(&ar->scan.completed); 2124 complete(&ar->scan.on_channel); 2125 complete(&ar->offchan_tx_completed); 2126 complete(&ar->install_key_done); 2127 complete(&ar->vdev_setup_done); 2128 complete(&ar->thermal.wmi_sync); 2129 complete(&ar->bss_survey_done); 2130 wake_up(&ar->htt.empty_tx_wq); 2131 wake_up(&ar->wmi.tx_credits_wq); 2132 wake_up(&ar->peer_mapping_wq); 2133 2134 /* TODO: We can have one instance of cancelling coverage_class_work by 2135 * moving it to ath10k_halt(), so that both stop() and restart() would 2136 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2137 * with conf_mutex it will deadlock. 2138 */ 2139 cancel_work_sync(&ar->set_coverage_class_work); 2140 2141 mutex_lock(&ar->conf_mutex); 2142 2143 switch (ar->state) { 2144 case ATH10K_STATE_ON: 2145 ar->state = ATH10K_STATE_RESTARTING; 2146 ath10k_halt(ar); 2147 ath10k_scan_finish(ar); 2148 ieee80211_restart_hw(ar->hw); 2149 break; 2150 case ATH10K_STATE_OFF: 2151 /* this can happen if driver is being unloaded 2152 * or if the crash happens during FW probing 2153 */ 2154 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2155 break; 2156 case ATH10K_STATE_RESTARTING: 2157 /* hw restart might be requested from multiple places */ 2158 break; 2159 case ATH10K_STATE_RESTARTED: 2160 ar->state = ATH10K_STATE_WEDGED; 2161 /* fall through */ 2162 case ATH10K_STATE_WEDGED: 2163 ath10k_warn(ar, "device is wedged, will not restart\n"); 2164 break; 2165 case ATH10K_STATE_UTF: 2166 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2167 break; 2168 } 2169 2170 mutex_unlock(&ar->conf_mutex); 2171 2172 ret = ath10k_coredump_submit(ar); 2173 if (ret) 2174 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2175 ret); 2176 } 2177 2178 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2179 { 2180 struct ath10k *ar = container_of(work, struct ath10k, 2181 set_coverage_class_work); 2182 2183 if (ar->hw_params.hw_ops->set_coverage_class) 2184 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2185 } 2186 2187 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2188 { 2189 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2190 int max_num_peers; 2191 2192 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2193 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2194 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2195 return -EINVAL; 2196 } 2197 2198 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2199 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2200 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2201 return -EINVAL; 2202 } 2203 2204 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2205 switch (ath10k_cryptmode_param) { 2206 case ATH10K_CRYPT_MODE_HW: 2207 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2208 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2209 break; 2210 case ATH10K_CRYPT_MODE_SW: 2211 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2212 fw_file->fw_features)) { 2213 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2214 return -EINVAL; 2215 } 2216 2217 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2218 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2219 break; 2220 default: 2221 ath10k_info(ar, "invalid cryptmode: %d\n", 2222 ath10k_cryptmode_param); 2223 return -EINVAL; 2224 } 2225 2226 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2227 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2228 2229 if (rawmode) { 2230 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2231 fw_file->fw_features)) { 2232 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2233 return -EINVAL; 2234 } 2235 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2236 } 2237 2238 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2239 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2240 2241 /* Workaround: 2242 * 2243 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2244 * and causes enormous performance issues (malformed frames, 2245 * etc). 2246 * 2247 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2248 * albeit a bit slower compared to regular operation. 2249 */ 2250 ar->htt.max_num_amsdu = 1; 2251 } 2252 2253 /* Backwards compatibility for firmwares without 2254 * ATH10K_FW_IE_WMI_OP_VERSION. 2255 */ 2256 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2257 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2258 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2259 fw_file->fw_features)) 2260 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2261 else 2262 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2263 } else { 2264 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2265 } 2266 } 2267 2268 switch (fw_file->wmi_op_version) { 2269 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2270 max_num_peers = TARGET_NUM_PEERS; 2271 ar->max_num_stations = TARGET_NUM_STATIONS; 2272 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2273 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2274 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2275 WMI_STAT_PEER; 2276 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2277 break; 2278 case ATH10K_FW_WMI_OP_VERSION_10_1: 2279 case ATH10K_FW_WMI_OP_VERSION_10_2: 2280 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2281 if (ath10k_peer_stats_enabled(ar)) { 2282 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2283 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2284 } else { 2285 max_num_peers = TARGET_10X_NUM_PEERS; 2286 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2287 } 2288 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2289 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2290 ar->fw_stats_req_mask = WMI_STAT_PEER; 2291 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2292 break; 2293 case ATH10K_FW_WMI_OP_VERSION_TLV: 2294 max_num_peers = TARGET_TLV_NUM_PEERS; 2295 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2296 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2297 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2298 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2299 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2300 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2301 WMI_STAT_PEER; 2302 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2303 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2304 break; 2305 case ATH10K_FW_WMI_OP_VERSION_10_4: 2306 max_num_peers = TARGET_10_4_NUM_PEERS; 2307 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2308 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2309 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2310 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2311 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2312 WMI_10_4_STAT_PEER_EXTD | 2313 WMI_10_4_STAT_VDEV_EXTD; 2314 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2315 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2316 2317 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2318 fw_file->fw_features)) 2319 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2320 else 2321 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2322 break; 2323 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2324 case ATH10K_FW_WMI_OP_VERSION_MAX: 2325 default: 2326 WARN_ON(1); 2327 return -EINVAL; 2328 } 2329 2330 if (ar->hw_params.num_peers) 2331 ar->max_num_peers = ar->hw_params.num_peers; 2332 else 2333 ar->max_num_peers = max_num_peers; 2334 2335 /* Backwards compatibility for firmwares without 2336 * ATH10K_FW_IE_HTT_OP_VERSION. 2337 */ 2338 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2339 switch (fw_file->wmi_op_version) { 2340 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2341 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2342 break; 2343 case ATH10K_FW_WMI_OP_VERSION_10_1: 2344 case ATH10K_FW_WMI_OP_VERSION_10_2: 2345 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2346 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2347 break; 2348 case ATH10K_FW_WMI_OP_VERSION_TLV: 2349 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2350 break; 2351 case ATH10K_FW_WMI_OP_VERSION_10_4: 2352 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2353 case ATH10K_FW_WMI_OP_VERSION_MAX: 2354 ath10k_err(ar, "htt op version not found from fw meta data"); 2355 return -EINVAL; 2356 } 2357 } 2358 2359 return 0; 2360 } 2361 2362 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2363 { 2364 int ret; 2365 int vdev_id; 2366 int vdev_type; 2367 int vdev_subtype; 2368 const u8 *vdev_addr; 2369 2370 vdev_id = 0; 2371 vdev_type = WMI_VDEV_TYPE_STA; 2372 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2373 vdev_addr = ar->mac_addr; 2374 2375 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2376 vdev_addr); 2377 if (ret) { 2378 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2379 return ret; 2380 } 2381 2382 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2383 if (ret) { 2384 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2385 return ret; 2386 } 2387 2388 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2389 * serialized properly implicitly. 2390 * 2391 * Moreover (most) WMI commands have no explicit acknowledges. It is 2392 * possible to infer it implicitly by poking firmware with echo 2393 * command - getting a reply means all preceding comments have been 2394 * (mostly) processed. 2395 * 2396 * In case of vdev create/delete this is sufficient. 2397 * 2398 * Without this it's possible to end up with a race when HTT Rx ring is 2399 * started before vdev create/delete hack is complete allowing a short 2400 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2401 */ 2402 ret = ath10k_wmi_barrier(ar); 2403 if (ret) { 2404 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2405 return ret; 2406 } 2407 2408 return 0; 2409 } 2410 2411 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2412 const struct ath10k_fw_components *fw) 2413 { 2414 int status; 2415 u32 val; 2416 2417 lockdep_assert_held(&ar->conf_mutex); 2418 2419 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2420 2421 ar->running_fw = fw; 2422 2423 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2424 ar->running_fw->fw_file.fw_features)) { 2425 ath10k_bmi_start(ar); 2426 2427 if (ath10k_init_configure_target(ar)) { 2428 status = -EINVAL; 2429 goto err; 2430 } 2431 2432 status = ath10k_download_cal_data(ar); 2433 if (status) 2434 goto err; 2435 2436 /* Some of of qca988x solutions are having global reset issue 2437 * during target initialization. Bypassing PLL setting before 2438 * downloading firmware and letting the SoC run on REF_CLK is 2439 * fixing the problem. Corresponding firmware change is also 2440 * needed to set the clock source once the target is 2441 * initialized. 2442 */ 2443 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2444 ar->running_fw->fw_file.fw_features)) { 2445 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2446 if (status) { 2447 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2448 status); 2449 goto err; 2450 } 2451 } 2452 2453 status = ath10k_download_fw(ar); 2454 if (status) 2455 goto err; 2456 2457 status = ath10k_init_uart(ar); 2458 if (status) 2459 goto err; 2460 2461 if (ar->hif.bus == ATH10K_BUS_SDIO) 2462 ath10k_init_sdio(ar); 2463 } 2464 2465 ar->htc.htc_ops.target_send_suspend_complete = 2466 ath10k_send_suspend_complete; 2467 2468 status = ath10k_htc_init(ar); 2469 if (status) { 2470 ath10k_err(ar, "could not init HTC (%d)\n", status); 2471 goto err; 2472 } 2473 2474 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2475 ar->running_fw->fw_file.fw_features)) { 2476 status = ath10k_bmi_done(ar); 2477 if (status) 2478 goto err; 2479 } 2480 2481 status = ath10k_wmi_attach(ar); 2482 if (status) { 2483 ath10k_err(ar, "WMI attach failed: %d\n", status); 2484 goto err; 2485 } 2486 2487 status = ath10k_htt_init(ar); 2488 if (status) { 2489 ath10k_err(ar, "failed to init htt: %d\n", status); 2490 goto err_wmi_detach; 2491 } 2492 2493 status = ath10k_htt_tx_start(&ar->htt); 2494 if (status) { 2495 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2496 goto err_wmi_detach; 2497 } 2498 2499 /* If firmware indicates Full Rx Reorder support it must be used in a 2500 * slightly different manner. Let HTT code know. 2501 */ 2502 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2503 ar->wmi.svc_map)); 2504 2505 status = ath10k_htt_rx_alloc(&ar->htt); 2506 if (status) { 2507 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2508 goto err_htt_tx_detach; 2509 } 2510 2511 status = ath10k_hif_start(ar); 2512 if (status) { 2513 ath10k_err(ar, "could not start HIF: %d\n", status); 2514 goto err_htt_rx_detach; 2515 } 2516 2517 status = ath10k_htc_wait_target(&ar->htc); 2518 if (status) { 2519 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2520 goto err_hif_stop; 2521 } 2522 2523 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2524 status = ath10k_htt_connect(&ar->htt); 2525 if (status) { 2526 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2527 goto err_hif_stop; 2528 } 2529 } 2530 2531 status = ath10k_wmi_connect(ar); 2532 if (status) { 2533 ath10k_err(ar, "could not connect wmi: %d\n", status); 2534 goto err_hif_stop; 2535 } 2536 2537 status = ath10k_htc_start(&ar->htc); 2538 if (status) { 2539 ath10k_err(ar, "failed to start htc: %d\n", status); 2540 goto err_hif_stop; 2541 } 2542 2543 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2544 status = ath10k_wmi_wait_for_service_ready(ar); 2545 if (status) { 2546 ath10k_warn(ar, "wmi service ready event not received"); 2547 goto err_hif_stop; 2548 } 2549 } 2550 2551 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2552 ar->hw->wiphy->fw_version); 2553 2554 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2555 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2556 val = 0; 2557 if (ath10k_peer_stats_enabled(ar)) 2558 val = WMI_10_4_PEER_STATS; 2559 2560 /* Enable vdev stats by default */ 2561 val |= WMI_10_4_VDEV_STATS; 2562 2563 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2564 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2565 2566 /* 10.4 firmware supports BT-Coex without reloading firmware 2567 * via pdev param. To support Bluetooth coexistence pdev param, 2568 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2569 * enabled always. 2570 */ 2571 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2572 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2573 ar->running_fw->fw_file.fw_features)) 2574 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2575 2576 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2577 ar->wmi.svc_map)) 2578 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2579 2580 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2581 ar->wmi.svc_map)) 2582 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2583 2584 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2585 ar->wmi.svc_map)) 2586 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2587 2588 status = ath10k_mac_ext_resource_config(ar, val); 2589 if (status) { 2590 ath10k_err(ar, 2591 "failed to send ext resource cfg command : %d\n", 2592 status); 2593 goto err_hif_stop; 2594 } 2595 } 2596 2597 status = ath10k_wmi_cmd_init(ar); 2598 if (status) { 2599 ath10k_err(ar, "could not send WMI init command (%d)\n", 2600 status); 2601 goto err_hif_stop; 2602 } 2603 2604 status = ath10k_wmi_wait_for_unified_ready(ar); 2605 if (status) { 2606 ath10k_err(ar, "wmi unified ready event not received\n"); 2607 goto err_hif_stop; 2608 } 2609 2610 /* Some firmware revisions do not properly set up hardware rx filter 2611 * registers. 2612 * 2613 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2614 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2615 * any frames that matches MAC_PCU_RX_FILTER which is also 2616 * misconfigured to accept anything. 2617 * 2618 * The ADDR1 is programmed using internal firmware structure field and 2619 * can't be (easily/sanely) reached from the driver explicitly. It is 2620 * possible to implicitly make it correct by creating a dummy vdev and 2621 * then deleting it. 2622 */ 2623 if (ar->hw_params.hw_filter_reset_required && 2624 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2625 status = ath10k_core_reset_rx_filter(ar); 2626 if (status) { 2627 ath10k_err(ar, 2628 "failed to reset rx filter: %d\n", status); 2629 goto err_hif_stop; 2630 } 2631 } 2632 2633 status = ath10k_htt_rx_ring_refill(ar); 2634 if (status) { 2635 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2636 goto err_hif_stop; 2637 } 2638 2639 if (ar->max_num_vdevs >= 64) 2640 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2641 else 2642 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2643 2644 INIT_LIST_HEAD(&ar->arvifs); 2645 2646 /* we don't care about HTT in UTF mode */ 2647 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2648 status = ath10k_htt_setup(&ar->htt); 2649 if (status) { 2650 ath10k_err(ar, "failed to setup htt: %d\n", status); 2651 goto err_hif_stop; 2652 } 2653 } 2654 2655 status = ath10k_debug_start(ar); 2656 if (status) 2657 goto err_hif_stop; 2658 2659 return 0; 2660 2661 err_hif_stop: 2662 ath10k_hif_stop(ar); 2663 err_htt_rx_detach: 2664 ath10k_htt_rx_free(&ar->htt); 2665 err_htt_tx_detach: 2666 ath10k_htt_tx_free(&ar->htt); 2667 err_wmi_detach: 2668 ath10k_wmi_detach(ar); 2669 err: 2670 return status; 2671 } 2672 EXPORT_SYMBOL(ath10k_core_start); 2673 2674 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2675 { 2676 int ret; 2677 unsigned long time_left; 2678 2679 reinit_completion(&ar->target_suspend); 2680 2681 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2682 if (ret) { 2683 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2684 return ret; 2685 } 2686 2687 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2688 2689 if (!time_left) { 2690 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2691 return -ETIMEDOUT; 2692 } 2693 2694 return 0; 2695 } 2696 2697 void ath10k_core_stop(struct ath10k *ar) 2698 { 2699 lockdep_assert_held(&ar->conf_mutex); 2700 ath10k_debug_stop(ar); 2701 2702 /* try to suspend target */ 2703 if (ar->state != ATH10K_STATE_RESTARTING && 2704 ar->state != ATH10K_STATE_UTF) 2705 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2706 2707 ath10k_hif_stop(ar); 2708 ath10k_htt_tx_stop(&ar->htt); 2709 ath10k_htt_rx_free(&ar->htt); 2710 ath10k_wmi_detach(ar); 2711 } 2712 EXPORT_SYMBOL(ath10k_core_stop); 2713 2714 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2715 * order to know what hw capabilities should be advertised to mac80211 it is 2716 * necessary to load the firmware (and tear it down immediately since start 2717 * hook will try to init it again) before registering 2718 */ 2719 static int ath10k_core_probe_fw(struct ath10k *ar) 2720 { 2721 struct bmi_target_info target_info; 2722 int ret = 0; 2723 2724 ret = ath10k_hif_power_up(ar); 2725 if (ret) { 2726 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2727 return ret; 2728 } 2729 2730 switch (ar->hif.bus) { 2731 case ATH10K_BUS_SDIO: 2732 memset(&target_info, 0, sizeof(target_info)); 2733 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2734 if (ret) { 2735 ath10k_err(ar, "could not get target info (%d)\n", ret); 2736 goto err_power_down; 2737 } 2738 ar->target_version = target_info.version; 2739 ar->hw->wiphy->hw_version = target_info.version; 2740 break; 2741 case ATH10K_BUS_PCI: 2742 case ATH10K_BUS_AHB: 2743 case ATH10K_BUS_USB: 2744 memset(&target_info, 0, sizeof(target_info)); 2745 ret = ath10k_bmi_get_target_info(ar, &target_info); 2746 if (ret) { 2747 ath10k_err(ar, "could not get target info (%d)\n", ret); 2748 goto err_power_down; 2749 } 2750 ar->target_version = target_info.version; 2751 ar->hw->wiphy->hw_version = target_info.version; 2752 break; 2753 case ATH10K_BUS_SNOC: 2754 memset(&target_info, 0, sizeof(target_info)); 2755 ret = ath10k_hif_get_target_info(ar, &target_info); 2756 if (ret) { 2757 ath10k_err(ar, "could not get target info (%d)\n", ret); 2758 goto err_power_down; 2759 } 2760 ar->target_version = target_info.version; 2761 ar->hw->wiphy->hw_version = target_info.version; 2762 break; 2763 default: 2764 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2765 } 2766 2767 ret = ath10k_init_hw_params(ar); 2768 if (ret) { 2769 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2770 goto err_power_down; 2771 } 2772 2773 ret = ath10k_core_fetch_firmware_files(ar); 2774 if (ret) { 2775 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2776 goto err_power_down; 2777 } 2778 2779 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2780 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2781 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2782 sizeof(ar->hw->wiphy->fw_version)); 2783 2784 ath10k_debug_print_hwfw_info(ar); 2785 2786 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2787 ar->normal_mode_fw.fw_file.fw_features)) { 2788 ret = ath10k_core_pre_cal_download(ar); 2789 if (ret) { 2790 /* pre calibration data download is not necessary 2791 * for all the chipsets. Ignore failures and continue. 2792 */ 2793 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2794 "could not load pre cal data: %d\n", ret); 2795 } 2796 2797 ret = ath10k_core_get_board_id_from_otp(ar); 2798 if (ret && ret != -EOPNOTSUPP) { 2799 ath10k_err(ar, "failed to get board id from otp: %d\n", 2800 ret); 2801 goto err_free_firmware_files; 2802 } 2803 2804 ret = ath10k_core_check_smbios(ar); 2805 if (ret) 2806 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2807 2808 ret = ath10k_core_check_dt(ar); 2809 if (ret) 2810 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2811 2812 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2813 if (ret) { 2814 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2815 goto err_free_firmware_files; 2816 } 2817 2818 ath10k_debug_print_board_info(ar); 2819 } 2820 2821 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2822 2823 ret = ath10k_core_init_firmware_features(ar); 2824 if (ret) { 2825 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2826 ret); 2827 goto err_free_firmware_files; 2828 } 2829 2830 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2831 ar->normal_mode_fw.fw_file.fw_features)) { 2832 ret = ath10k_swap_code_seg_init(ar, 2833 &ar->normal_mode_fw.fw_file); 2834 if (ret) { 2835 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2836 ret); 2837 goto err_free_firmware_files; 2838 } 2839 } 2840 2841 mutex_lock(&ar->conf_mutex); 2842 2843 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2844 &ar->normal_mode_fw); 2845 if (ret) { 2846 ath10k_err(ar, "could not init core (%d)\n", ret); 2847 goto err_unlock; 2848 } 2849 2850 ath10k_debug_print_boot_info(ar); 2851 ath10k_core_stop(ar); 2852 2853 mutex_unlock(&ar->conf_mutex); 2854 2855 ath10k_hif_power_down(ar); 2856 return 0; 2857 2858 err_unlock: 2859 mutex_unlock(&ar->conf_mutex); 2860 2861 err_free_firmware_files: 2862 ath10k_core_free_firmware_files(ar); 2863 2864 err_power_down: 2865 ath10k_hif_power_down(ar); 2866 2867 return ret; 2868 } 2869 2870 static void ath10k_core_register_work(struct work_struct *work) 2871 { 2872 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2873 int status; 2874 2875 /* peer stats are enabled by default */ 2876 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2877 2878 status = ath10k_core_probe_fw(ar); 2879 if (status) { 2880 ath10k_err(ar, "could not probe fw (%d)\n", status); 2881 goto err; 2882 } 2883 2884 status = ath10k_mac_register(ar); 2885 if (status) { 2886 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2887 goto err_release_fw; 2888 } 2889 2890 status = ath10k_coredump_register(ar); 2891 if (status) { 2892 ath10k_err(ar, "unable to register coredump\n"); 2893 goto err_unregister_mac; 2894 } 2895 2896 status = ath10k_debug_register(ar); 2897 if (status) { 2898 ath10k_err(ar, "unable to initialize debugfs\n"); 2899 goto err_unregister_coredump; 2900 } 2901 2902 status = ath10k_spectral_create(ar); 2903 if (status) { 2904 ath10k_err(ar, "failed to initialize spectral\n"); 2905 goto err_debug_destroy; 2906 } 2907 2908 status = ath10k_thermal_register(ar); 2909 if (status) { 2910 ath10k_err(ar, "could not register thermal device: %d\n", 2911 status); 2912 goto err_spectral_destroy; 2913 } 2914 2915 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2916 return; 2917 2918 err_spectral_destroy: 2919 ath10k_spectral_destroy(ar); 2920 err_debug_destroy: 2921 ath10k_debug_destroy(ar); 2922 err_unregister_coredump: 2923 ath10k_coredump_unregister(ar); 2924 err_unregister_mac: 2925 ath10k_mac_unregister(ar); 2926 err_release_fw: 2927 ath10k_core_free_firmware_files(ar); 2928 err: 2929 /* TODO: It's probably a good idea to release device from the driver 2930 * but calling device_release_driver() here will cause a deadlock. 2931 */ 2932 return; 2933 } 2934 2935 int ath10k_core_register(struct ath10k *ar, 2936 const struct ath10k_bus_params *bus_params) 2937 { 2938 ar->chip_id = bus_params->chip_id; 2939 ar->dev_type = bus_params->dev_type; 2940 queue_work(ar->workqueue, &ar->register_work); 2941 2942 return 0; 2943 } 2944 EXPORT_SYMBOL(ath10k_core_register); 2945 2946 void ath10k_core_unregister(struct ath10k *ar) 2947 { 2948 cancel_work_sync(&ar->register_work); 2949 2950 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2951 return; 2952 2953 ath10k_thermal_unregister(ar); 2954 /* Stop spectral before unregistering from mac80211 to remove the 2955 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2956 * would be already be free'd recursively, leading to a double free. 2957 */ 2958 ath10k_spectral_destroy(ar); 2959 2960 /* We must unregister from mac80211 before we stop HTC and HIF. 2961 * Otherwise we will fail to submit commands to FW and mac80211 will be 2962 * unhappy about callback failures. 2963 */ 2964 ath10k_mac_unregister(ar); 2965 2966 ath10k_testmode_destroy(ar); 2967 2968 ath10k_core_free_firmware_files(ar); 2969 ath10k_core_free_board_files(ar); 2970 2971 ath10k_debug_unregister(ar); 2972 } 2973 EXPORT_SYMBOL(ath10k_core_unregister); 2974 2975 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2976 enum ath10k_bus bus, 2977 enum ath10k_hw_rev hw_rev, 2978 const struct ath10k_hif_ops *hif_ops) 2979 { 2980 struct ath10k *ar; 2981 int ret; 2982 2983 ar = ath10k_mac_create(priv_size); 2984 if (!ar) 2985 return NULL; 2986 2987 ar->ath_common.priv = ar; 2988 ar->ath_common.hw = ar->hw; 2989 ar->dev = dev; 2990 ar->hw_rev = hw_rev; 2991 ar->hif.ops = hif_ops; 2992 ar->hif.bus = bus; 2993 2994 switch (hw_rev) { 2995 case ATH10K_HW_QCA988X: 2996 case ATH10K_HW_QCA9887: 2997 ar->regs = &qca988x_regs; 2998 ar->hw_ce_regs = &qcax_ce_regs; 2999 ar->hw_values = &qca988x_values; 3000 break; 3001 case ATH10K_HW_QCA6174: 3002 case ATH10K_HW_QCA9377: 3003 ar->regs = &qca6174_regs; 3004 ar->hw_ce_regs = &qcax_ce_regs; 3005 ar->hw_values = &qca6174_values; 3006 break; 3007 case ATH10K_HW_QCA99X0: 3008 case ATH10K_HW_QCA9984: 3009 ar->regs = &qca99x0_regs; 3010 ar->hw_ce_regs = &qcax_ce_regs; 3011 ar->hw_values = &qca99x0_values; 3012 break; 3013 case ATH10K_HW_QCA9888: 3014 ar->regs = &qca99x0_regs; 3015 ar->hw_ce_regs = &qcax_ce_regs; 3016 ar->hw_values = &qca9888_values; 3017 break; 3018 case ATH10K_HW_QCA4019: 3019 ar->regs = &qca4019_regs; 3020 ar->hw_ce_regs = &qcax_ce_regs; 3021 ar->hw_values = &qca4019_values; 3022 break; 3023 case ATH10K_HW_WCN3990: 3024 ar->regs = &wcn3990_regs; 3025 ar->hw_ce_regs = &wcn3990_ce_regs; 3026 ar->hw_values = &wcn3990_values; 3027 break; 3028 default: 3029 ath10k_err(ar, "unsupported core hardware revision %d\n", 3030 hw_rev); 3031 ret = -ENOTSUPP; 3032 goto err_free_mac; 3033 } 3034 3035 init_completion(&ar->scan.started); 3036 init_completion(&ar->scan.completed); 3037 init_completion(&ar->scan.on_channel); 3038 init_completion(&ar->target_suspend); 3039 init_completion(&ar->wow.wakeup_completed); 3040 3041 init_completion(&ar->install_key_done); 3042 init_completion(&ar->vdev_setup_done); 3043 init_completion(&ar->thermal.wmi_sync); 3044 init_completion(&ar->bss_survey_done); 3045 3046 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3047 3048 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3049 if (!ar->workqueue) 3050 goto err_free_mac; 3051 3052 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3053 if (!ar->workqueue_aux) 3054 goto err_free_wq; 3055 3056 mutex_init(&ar->conf_mutex); 3057 spin_lock_init(&ar->data_lock); 3058 spin_lock_init(&ar->txqs_lock); 3059 3060 INIT_LIST_HEAD(&ar->txqs); 3061 INIT_LIST_HEAD(&ar->peers); 3062 init_waitqueue_head(&ar->peer_mapping_wq); 3063 init_waitqueue_head(&ar->htt.empty_tx_wq); 3064 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3065 3066 init_completion(&ar->offchan_tx_completed); 3067 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3068 skb_queue_head_init(&ar->offchan_tx_queue); 3069 3070 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3071 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3072 3073 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3074 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3075 INIT_WORK(&ar->set_coverage_class_work, 3076 ath10k_core_set_coverage_class_work); 3077 3078 init_dummy_netdev(&ar->napi_dev); 3079 3080 ret = ath10k_coredump_create(ar); 3081 if (ret) 3082 goto err_free_aux_wq; 3083 3084 ret = ath10k_debug_create(ar); 3085 if (ret) 3086 goto err_free_coredump; 3087 3088 return ar; 3089 3090 err_free_coredump: 3091 ath10k_coredump_destroy(ar); 3092 3093 err_free_aux_wq: 3094 destroy_workqueue(ar->workqueue_aux); 3095 err_free_wq: 3096 destroy_workqueue(ar->workqueue); 3097 3098 err_free_mac: 3099 ath10k_mac_destroy(ar); 3100 3101 return NULL; 3102 } 3103 EXPORT_SYMBOL(ath10k_core_create); 3104 3105 void ath10k_core_destroy(struct ath10k *ar) 3106 { 3107 flush_workqueue(ar->workqueue); 3108 destroy_workqueue(ar->workqueue); 3109 3110 flush_workqueue(ar->workqueue_aux); 3111 destroy_workqueue(ar->workqueue_aux); 3112 3113 ath10k_debug_destroy(ar); 3114 ath10k_coredump_destroy(ar); 3115 ath10k_htt_tx_destroy(&ar->htt); 3116 ath10k_wmi_free_host_mem(ar); 3117 ath10k_mac_destroy(ar); 3118 } 3119 EXPORT_SYMBOL(ath10k_core_destroy); 3120 3121 MODULE_AUTHOR("Qualcomm Atheros"); 3122 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3123 MODULE_LICENSE("Dual BSD/GPL"); 3124