1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/firmware.h> 21 #include <linux/of.h> 22 #include <linux/property.h> 23 #include <linux/dmi.h> 24 #include <linux/ctype.h> 25 #include <asm/byteorder.h> 26 27 #include "core.h" 28 #include "mac.h" 29 #include "htc.h" 30 #include "hif.h" 31 #include "wmi.h" 32 #include "bmi.h" 33 #include "debug.h" 34 #include "htt.h" 35 #include "testmode.h" 36 #include "wmi-ops.h" 37 #include "coredump.h" 38 39 unsigned int ath10k_debug_mask; 40 static unsigned int ath10k_cryptmode_param; 41 static bool uart_print; 42 static bool skip_otp; 43 static bool rawmode; 44 45 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 46 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 47 48 /* FIXME: most of these should be readonly */ 49 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 50 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 51 module_param(uart_print, bool, 0644); 52 module_param(skip_otp, bool, 0644); 53 module_param(rawmode, bool, 0644); 54 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 55 56 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 57 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 58 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 59 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 60 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 61 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 62 63 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 64 { 65 .id = QCA988X_HW_2_0_VERSION, 66 .dev_id = QCA988X_2_0_DEVICE_ID, 67 .bus = ATH10K_BUS_PCI, 68 .name = "qca988x hw2.0", 69 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 70 .uart_pin = 7, 71 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 72 .otp_exe_param = 0, 73 .channel_counters_freq_hz = 88000, 74 .max_probe_resp_desc_thres = 0, 75 .cal_data_len = 2116, 76 .fw = { 77 .dir = QCA988X_HW_2_0_FW_DIR, 78 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 79 .board_size = QCA988X_BOARD_DATA_SZ, 80 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 81 }, 82 .hw_ops = &qca988x_ops, 83 .decap_align_bytes = 4, 84 .spectral_bin_discard = 0, 85 .spectral_bin_offset = 0, 86 .vht160_mcs_rx_highest = 0, 87 .vht160_mcs_tx_highest = 0, 88 .n_cipher_suites = 8, 89 .ast_skid_limit = 0x10, 90 .num_wds_entries = 0x20, 91 .target_64bit = false, 92 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 93 .shadow_reg_support = false, 94 .rri_on_ddr = false, 95 .hw_filter_reset_required = true, 96 .fw_diag_ce_download = false, 97 }, 98 { 99 .id = QCA988X_HW_2_0_VERSION, 100 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 101 .name = "qca988x hw2.0 ubiquiti", 102 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 103 .uart_pin = 7, 104 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 105 .otp_exe_param = 0, 106 .channel_counters_freq_hz = 88000, 107 .max_probe_resp_desc_thres = 0, 108 .cal_data_len = 2116, 109 .fw = { 110 .dir = QCA988X_HW_2_0_FW_DIR, 111 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 112 .board_size = QCA988X_BOARD_DATA_SZ, 113 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 114 }, 115 .hw_ops = &qca988x_ops, 116 .decap_align_bytes = 4, 117 .spectral_bin_discard = 0, 118 .spectral_bin_offset = 0, 119 .vht160_mcs_rx_highest = 0, 120 .vht160_mcs_tx_highest = 0, 121 .n_cipher_suites = 8, 122 .ast_skid_limit = 0x10, 123 .num_wds_entries = 0x20, 124 .target_64bit = false, 125 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 126 .per_ce_irq = false, 127 .shadow_reg_support = false, 128 .rri_on_ddr = false, 129 .hw_filter_reset_required = true, 130 .fw_diag_ce_download = false, 131 }, 132 { 133 .id = QCA9887_HW_1_0_VERSION, 134 .dev_id = QCA9887_1_0_DEVICE_ID, 135 .bus = ATH10K_BUS_PCI, 136 .name = "qca9887 hw1.0", 137 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 138 .uart_pin = 7, 139 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 140 .otp_exe_param = 0, 141 .channel_counters_freq_hz = 88000, 142 .max_probe_resp_desc_thres = 0, 143 .cal_data_len = 2116, 144 .fw = { 145 .dir = QCA9887_HW_1_0_FW_DIR, 146 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 147 .board_size = QCA9887_BOARD_DATA_SZ, 148 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 149 }, 150 .hw_ops = &qca988x_ops, 151 .decap_align_bytes = 4, 152 .spectral_bin_discard = 0, 153 .spectral_bin_offset = 0, 154 .vht160_mcs_rx_highest = 0, 155 .vht160_mcs_tx_highest = 0, 156 .n_cipher_suites = 8, 157 .ast_skid_limit = 0x10, 158 .num_wds_entries = 0x20, 159 .target_64bit = false, 160 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 161 .per_ce_irq = false, 162 .shadow_reg_support = false, 163 .rri_on_ddr = false, 164 .hw_filter_reset_required = true, 165 .fw_diag_ce_download = false, 166 }, 167 { 168 .id = QCA6174_HW_2_1_VERSION, 169 .dev_id = QCA6164_2_1_DEVICE_ID, 170 .bus = ATH10K_BUS_PCI, 171 .name = "qca6164 hw2.1", 172 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 173 .uart_pin = 6, 174 .otp_exe_param = 0, 175 .channel_counters_freq_hz = 88000, 176 .max_probe_resp_desc_thres = 0, 177 .cal_data_len = 8124, 178 .fw = { 179 .dir = QCA6174_HW_2_1_FW_DIR, 180 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 181 .board_size = QCA6174_BOARD_DATA_SZ, 182 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 183 }, 184 .hw_ops = &qca988x_ops, 185 .decap_align_bytes = 4, 186 .spectral_bin_discard = 0, 187 .spectral_bin_offset = 0, 188 .vht160_mcs_rx_highest = 0, 189 .vht160_mcs_tx_highest = 0, 190 .n_cipher_suites = 8, 191 .ast_skid_limit = 0x10, 192 .num_wds_entries = 0x20, 193 .target_64bit = false, 194 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 195 .per_ce_irq = false, 196 .shadow_reg_support = false, 197 .rri_on_ddr = false, 198 .hw_filter_reset_required = true, 199 .fw_diag_ce_download = false, 200 }, 201 { 202 .id = QCA6174_HW_2_1_VERSION, 203 .dev_id = QCA6174_2_1_DEVICE_ID, 204 .bus = ATH10K_BUS_PCI, 205 .name = "qca6174 hw2.1", 206 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 207 .uart_pin = 6, 208 .otp_exe_param = 0, 209 .channel_counters_freq_hz = 88000, 210 .max_probe_resp_desc_thres = 0, 211 .cal_data_len = 8124, 212 .fw = { 213 .dir = QCA6174_HW_2_1_FW_DIR, 214 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 215 .board_size = QCA6174_BOARD_DATA_SZ, 216 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 217 }, 218 .hw_ops = &qca988x_ops, 219 .decap_align_bytes = 4, 220 .spectral_bin_discard = 0, 221 .spectral_bin_offset = 0, 222 .vht160_mcs_rx_highest = 0, 223 .vht160_mcs_tx_highest = 0, 224 .n_cipher_suites = 8, 225 .ast_skid_limit = 0x10, 226 .num_wds_entries = 0x20, 227 .target_64bit = false, 228 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 229 .per_ce_irq = false, 230 .shadow_reg_support = false, 231 .rri_on_ddr = false, 232 .hw_filter_reset_required = true, 233 .fw_diag_ce_download = false, 234 }, 235 { 236 .id = QCA6174_HW_3_0_VERSION, 237 .dev_id = QCA6174_2_1_DEVICE_ID, 238 .bus = ATH10K_BUS_PCI, 239 .name = "qca6174 hw3.0", 240 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 241 .uart_pin = 6, 242 .otp_exe_param = 0, 243 .channel_counters_freq_hz = 88000, 244 .max_probe_resp_desc_thres = 0, 245 .cal_data_len = 8124, 246 .fw = { 247 .dir = QCA6174_HW_3_0_FW_DIR, 248 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 249 .board_size = QCA6174_BOARD_DATA_SZ, 250 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 251 }, 252 .hw_ops = &qca988x_ops, 253 .decap_align_bytes = 4, 254 .spectral_bin_discard = 0, 255 .spectral_bin_offset = 0, 256 .vht160_mcs_rx_highest = 0, 257 .vht160_mcs_tx_highest = 0, 258 .n_cipher_suites = 8, 259 .ast_skid_limit = 0x10, 260 .num_wds_entries = 0x20, 261 .target_64bit = false, 262 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 263 .per_ce_irq = false, 264 .shadow_reg_support = false, 265 .rri_on_ddr = false, 266 .hw_filter_reset_required = true, 267 .fw_diag_ce_download = false, 268 }, 269 { 270 .id = QCA6174_HW_3_2_VERSION, 271 .dev_id = QCA6174_2_1_DEVICE_ID, 272 .bus = ATH10K_BUS_PCI, 273 .name = "qca6174 hw3.2", 274 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 275 .uart_pin = 6, 276 .otp_exe_param = 0, 277 .channel_counters_freq_hz = 88000, 278 .max_probe_resp_desc_thres = 0, 279 .cal_data_len = 8124, 280 .fw = { 281 /* uses same binaries as hw3.0 */ 282 .dir = QCA6174_HW_3_0_FW_DIR, 283 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 284 .board_size = QCA6174_BOARD_DATA_SZ, 285 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 286 }, 287 .hw_ops = &qca6174_ops, 288 .hw_clk = qca6174_clk, 289 .target_cpu_freq = 176000000, 290 .decap_align_bytes = 4, 291 .spectral_bin_discard = 0, 292 .spectral_bin_offset = 0, 293 .vht160_mcs_rx_highest = 0, 294 .vht160_mcs_tx_highest = 0, 295 .n_cipher_suites = 8, 296 .ast_skid_limit = 0x10, 297 .num_wds_entries = 0x20, 298 .target_64bit = false, 299 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 300 .per_ce_irq = false, 301 .shadow_reg_support = false, 302 .rri_on_ddr = false, 303 .hw_filter_reset_required = true, 304 .fw_diag_ce_download = true, 305 }, 306 { 307 .id = QCA99X0_HW_2_0_DEV_VERSION, 308 .dev_id = QCA99X0_2_0_DEVICE_ID, 309 .bus = ATH10K_BUS_PCI, 310 .name = "qca99x0 hw2.0", 311 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 312 .uart_pin = 7, 313 .otp_exe_param = 0x00000700, 314 .continuous_frag_desc = true, 315 .cck_rate_map_rev2 = true, 316 .channel_counters_freq_hz = 150000, 317 .max_probe_resp_desc_thres = 24, 318 .tx_chain_mask = 0xf, 319 .rx_chain_mask = 0xf, 320 .max_spatial_stream = 4, 321 .cal_data_len = 12064, 322 .fw = { 323 .dir = QCA99X0_HW_2_0_FW_DIR, 324 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 325 .board_size = QCA99X0_BOARD_DATA_SZ, 326 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 327 }, 328 .sw_decrypt_mcast_mgmt = true, 329 .hw_ops = &qca99x0_ops, 330 .decap_align_bytes = 1, 331 .spectral_bin_discard = 4, 332 .spectral_bin_offset = 0, 333 .vht160_mcs_rx_highest = 0, 334 .vht160_mcs_tx_highest = 0, 335 .n_cipher_suites = 11, 336 .ast_skid_limit = 0x10, 337 .num_wds_entries = 0x20, 338 .target_64bit = false, 339 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 340 .per_ce_irq = false, 341 .shadow_reg_support = false, 342 .rri_on_ddr = false, 343 .hw_filter_reset_required = true, 344 .fw_diag_ce_download = false, 345 }, 346 { 347 .id = QCA9984_HW_1_0_DEV_VERSION, 348 .dev_id = QCA9984_1_0_DEVICE_ID, 349 .bus = ATH10K_BUS_PCI, 350 .name = "qca9984/qca9994 hw1.0", 351 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 352 .uart_pin = 7, 353 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 354 .otp_exe_param = 0x00000700, 355 .continuous_frag_desc = true, 356 .cck_rate_map_rev2 = true, 357 .channel_counters_freq_hz = 150000, 358 .max_probe_resp_desc_thres = 24, 359 .tx_chain_mask = 0xf, 360 .rx_chain_mask = 0xf, 361 .max_spatial_stream = 4, 362 .cal_data_len = 12064, 363 .fw = { 364 .dir = QCA9984_HW_1_0_FW_DIR, 365 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 366 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 367 .board_size = QCA99X0_BOARD_DATA_SZ, 368 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 369 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 370 }, 371 .sw_decrypt_mcast_mgmt = true, 372 .hw_ops = &qca99x0_ops, 373 .decap_align_bytes = 1, 374 .spectral_bin_discard = 12, 375 .spectral_bin_offset = 8, 376 377 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 378 * or 2x2 160Mhz, long-guard-interval. 379 */ 380 .vht160_mcs_rx_highest = 1560, 381 .vht160_mcs_tx_highest = 1560, 382 .n_cipher_suites = 11, 383 .ast_skid_limit = 0x10, 384 .num_wds_entries = 0x20, 385 .target_64bit = false, 386 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 387 .per_ce_irq = false, 388 .shadow_reg_support = false, 389 .rri_on_ddr = false, 390 .hw_filter_reset_required = true, 391 .fw_diag_ce_download = false, 392 }, 393 { 394 .id = QCA9888_HW_2_0_DEV_VERSION, 395 .dev_id = QCA9888_2_0_DEVICE_ID, 396 .bus = ATH10K_BUS_PCI, 397 .name = "qca9888 hw2.0", 398 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 399 .uart_pin = 7, 400 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 401 .otp_exe_param = 0x00000700, 402 .continuous_frag_desc = true, 403 .channel_counters_freq_hz = 150000, 404 .max_probe_resp_desc_thres = 24, 405 .tx_chain_mask = 3, 406 .rx_chain_mask = 3, 407 .max_spatial_stream = 2, 408 .cal_data_len = 12064, 409 .fw = { 410 .dir = QCA9888_HW_2_0_FW_DIR, 411 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 412 .board_size = QCA99X0_BOARD_DATA_SZ, 413 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 414 }, 415 .sw_decrypt_mcast_mgmt = true, 416 .hw_ops = &qca99x0_ops, 417 .decap_align_bytes = 1, 418 .spectral_bin_discard = 12, 419 .spectral_bin_offset = 8, 420 421 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 422 * 1x1 160Mhz, long-guard-interval. 423 */ 424 .vht160_mcs_rx_highest = 780, 425 .vht160_mcs_tx_highest = 780, 426 .n_cipher_suites = 11, 427 .ast_skid_limit = 0x10, 428 .num_wds_entries = 0x20, 429 .target_64bit = false, 430 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 431 .per_ce_irq = false, 432 .shadow_reg_support = false, 433 .rri_on_ddr = false, 434 .hw_filter_reset_required = true, 435 .fw_diag_ce_download = false, 436 }, 437 { 438 .id = QCA9377_HW_1_0_DEV_VERSION, 439 .dev_id = QCA9377_1_0_DEVICE_ID, 440 .bus = ATH10K_BUS_PCI, 441 .name = "qca9377 hw1.0", 442 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 443 .uart_pin = 6, 444 .otp_exe_param = 0, 445 .channel_counters_freq_hz = 88000, 446 .max_probe_resp_desc_thres = 0, 447 .cal_data_len = 8124, 448 .fw = { 449 .dir = QCA9377_HW_1_0_FW_DIR, 450 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 451 .board_size = QCA9377_BOARD_DATA_SZ, 452 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 453 }, 454 .hw_ops = &qca988x_ops, 455 .decap_align_bytes = 4, 456 .spectral_bin_discard = 0, 457 .spectral_bin_offset = 0, 458 .vht160_mcs_rx_highest = 0, 459 .vht160_mcs_tx_highest = 0, 460 .n_cipher_suites = 8, 461 .ast_skid_limit = 0x10, 462 .num_wds_entries = 0x20, 463 .target_64bit = false, 464 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 465 .per_ce_irq = false, 466 .shadow_reg_support = false, 467 .rri_on_ddr = false, 468 .hw_filter_reset_required = true, 469 .fw_diag_ce_download = false, 470 }, 471 { 472 .id = QCA9377_HW_1_1_DEV_VERSION, 473 .dev_id = QCA9377_1_0_DEVICE_ID, 474 .bus = ATH10K_BUS_PCI, 475 .name = "qca9377 hw1.1", 476 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 477 .uart_pin = 6, 478 .otp_exe_param = 0, 479 .channel_counters_freq_hz = 88000, 480 .max_probe_resp_desc_thres = 0, 481 .cal_data_len = 8124, 482 .fw = { 483 .dir = QCA9377_HW_1_0_FW_DIR, 484 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 485 .board_size = QCA9377_BOARD_DATA_SZ, 486 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 487 }, 488 .hw_ops = &qca6174_ops, 489 .hw_clk = qca6174_clk, 490 .target_cpu_freq = 176000000, 491 .decap_align_bytes = 4, 492 .spectral_bin_discard = 0, 493 .spectral_bin_offset = 0, 494 .vht160_mcs_rx_highest = 0, 495 .vht160_mcs_tx_highest = 0, 496 .n_cipher_suites = 8, 497 .ast_skid_limit = 0x10, 498 .num_wds_entries = 0x20, 499 .target_64bit = false, 500 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 501 .per_ce_irq = false, 502 .shadow_reg_support = false, 503 .rri_on_ddr = false, 504 .hw_filter_reset_required = true, 505 .fw_diag_ce_download = true, 506 }, 507 { 508 .id = QCA4019_HW_1_0_DEV_VERSION, 509 .dev_id = 0, 510 .bus = ATH10K_BUS_AHB, 511 .name = "qca4019 hw1.0", 512 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 513 .uart_pin = 7, 514 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 515 .otp_exe_param = 0x0010000, 516 .continuous_frag_desc = true, 517 .cck_rate_map_rev2 = true, 518 .channel_counters_freq_hz = 125000, 519 .max_probe_resp_desc_thres = 24, 520 .tx_chain_mask = 0x3, 521 .rx_chain_mask = 0x3, 522 .max_spatial_stream = 2, 523 .cal_data_len = 12064, 524 .fw = { 525 .dir = QCA4019_HW_1_0_FW_DIR, 526 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 527 .board_size = QCA4019_BOARD_DATA_SZ, 528 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 529 }, 530 .sw_decrypt_mcast_mgmt = true, 531 .hw_ops = &qca99x0_ops, 532 .decap_align_bytes = 1, 533 .spectral_bin_discard = 4, 534 .spectral_bin_offset = 0, 535 .vht160_mcs_rx_highest = 0, 536 .vht160_mcs_tx_highest = 0, 537 .n_cipher_suites = 11, 538 .ast_skid_limit = 0x10, 539 .num_wds_entries = 0x20, 540 .target_64bit = false, 541 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 542 .per_ce_irq = false, 543 .shadow_reg_support = false, 544 .rri_on_ddr = false, 545 .hw_filter_reset_required = true, 546 .fw_diag_ce_download = false, 547 }, 548 { 549 .id = WCN3990_HW_1_0_DEV_VERSION, 550 .dev_id = 0, 551 .bus = ATH10K_BUS_PCI, 552 .name = "wcn3990 hw1.0", 553 .continuous_frag_desc = true, 554 .tx_chain_mask = 0x7, 555 .rx_chain_mask = 0x7, 556 .max_spatial_stream = 4, 557 .fw = { 558 .dir = WCN3990_HW_1_0_FW_DIR, 559 }, 560 .sw_decrypt_mcast_mgmt = true, 561 .hw_ops = &wcn3990_ops, 562 .decap_align_bytes = 1, 563 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 564 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 565 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 566 .target_64bit = true, 567 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 568 .per_ce_irq = true, 569 .shadow_reg_support = true, 570 .rri_on_ddr = true, 571 .hw_filter_reset_required = false, 572 .fw_diag_ce_download = false, 573 }, 574 }; 575 576 static const char *const ath10k_core_fw_feature_str[] = { 577 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 578 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 579 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 580 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 581 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 582 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 583 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 584 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 585 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 586 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 587 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 588 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 589 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 590 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 591 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 592 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 593 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 594 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 595 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 596 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 597 }; 598 599 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 600 size_t buf_len, 601 enum ath10k_fw_features feat) 602 { 603 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 604 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 605 ATH10K_FW_FEATURE_COUNT); 606 607 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 608 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 609 return scnprintf(buf, buf_len, "bit%d", feat); 610 } 611 612 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 613 } 614 615 void ath10k_core_get_fw_features_str(struct ath10k *ar, 616 char *buf, 617 size_t buf_len) 618 { 619 size_t len = 0; 620 int i; 621 622 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 623 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 624 if (len > 0) 625 len += scnprintf(buf + len, buf_len - len, ","); 626 627 len += ath10k_core_get_fw_feature_str(buf + len, 628 buf_len - len, 629 i); 630 } 631 } 632 } 633 634 static void ath10k_send_suspend_complete(struct ath10k *ar) 635 { 636 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 637 638 complete(&ar->target_suspend); 639 } 640 641 static void ath10k_init_sdio(struct ath10k *ar) 642 { 643 u32 param = 0; 644 645 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 646 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 647 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 648 649 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 650 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 651 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 652 653 ath10k_bmi_write32(ar, hi_acs_flags, param); 654 } 655 656 static int ath10k_init_configure_target(struct ath10k *ar) 657 { 658 u32 param_host; 659 int ret; 660 661 /* tell target which HTC version it is used*/ 662 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 663 HTC_PROTOCOL_VERSION); 664 if (ret) { 665 ath10k_err(ar, "settings HTC version failed\n"); 666 return ret; 667 } 668 669 /* set the firmware mode to STA/IBSS/AP */ 670 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 671 if (ret) { 672 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 673 return ret; 674 } 675 676 /* TODO following parameters need to be re-visited. */ 677 /* num_device */ 678 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 679 /* Firmware mode */ 680 /* FIXME: Why FW_MODE_AP ??.*/ 681 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 682 /* mac_addr_method */ 683 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 684 /* firmware_bridge */ 685 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 686 /* fwsubmode */ 687 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 688 689 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 690 if (ret) { 691 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 692 return ret; 693 } 694 695 /* We do all byte-swapping on the host */ 696 ret = ath10k_bmi_write32(ar, hi_be, 0); 697 if (ret) { 698 ath10k_err(ar, "setting host CPU BE mode failed\n"); 699 return ret; 700 } 701 702 /* FW descriptor/Data swap flags */ 703 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 704 705 if (ret) { 706 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 707 return ret; 708 } 709 710 /* Some devices have a special sanity check that verifies the PCI 711 * Device ID is written to this host interest var. It is known to be 712 * required to boot QCA6164. 713 */ 714 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 715 ar->dev_id); 716 if (ret) { 717 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 718 return ret; 719 } 720 721 return 0; 722 } 723 724 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 725 const char *dir, 726 const char *file) 727 { 728 char filename[100]; 729 const struct firmware *fw; 730 int ret; 731 732 if (file == NULL) 733 return ERR_PTR(-ENOENT); 734 735 if (dir == NULL) 736 dir = "."; 737 738 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 739 ret = firmware_request_nowarn(&fw, filename, ar->dev); 740 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 741 filename, ret); 742 743 if (ret) 744 return ERR_PTR(ret); 745 746 return fw; 747 } 748 749 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 750 size_t data_len) 751 { 752 u32 board_data_size = ar->hw_params.fw.board_size; 753 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 754 u32 board_ext_data_addr; 755 int ret; 756 757 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 758 if (ret) { 759 ath10k_err(ar, "could not read board ext data addr (%d)\n", 760 ret); 761 return ret; 762 } 763 764 ath10k_dbg(ar, ATH10K_DBG_BOOT, 765 "boot push board extended data addr 0x%x\n", 766 board_ext_data_addr); 767 768 if (board_ext_data_addr == 0) 769 return 0; 770 771 if (data_len != (board_data_size + board_ext_data_size)) { 772 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 773 data_len, board_data_size, board_ext_data_size); 774 return -EINVAL; 775 } 776 777 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 778 data + board_data_size, 779 board_ext_data_size); 780 if (ret) { 781 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 782 return ret; 783 } 784 785 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 786 (board_ext_data_size << 16) | 1); 787 if (ret) { 788 ath10k_err(ar, "could not write board ext data bit (%d)\n", 789 ret); 790 return ret; 791 } 792 793 return 0; 794 } 795 796 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 797 { 798 u32 result, address; 799 u8 board_id, chip_id; 800 bool ext_bid_support; 801 int ret, bmi_board_id_param; 802 803 address = ar->hw_params.patch_load_addr; 804 805 if (!ar->normal_mode_fw.fw_file.otp_data || 806 !ar->normal_mode_fw.fw_file.otp_len) { 807 ath10k_warn(ar, 808 "failed to retrieve board id because of invalid otp\n"); 809 return -ENODATA; 810 } 811 812 ath10k_dbg(ar, ATH10K_DBG_BOOT, 813 "boot upload otp to 0x%x len %zd for board id\n", 814 address, ar->normal_mode_fw.fw_file.otp_len); 815 816 ret = ath10k_bmi_fast_download(ar, address, 817 ar->normal_mode_fw.fw_file.otp_data, 818 ar->normal_mode_fw.fw_file.otp_len); 819 if (ret) { 820 ath10k_err(ar, "could not write otp for board id check: %d\n", 821 ret); 822 return ret; 823 } 824 825 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 826 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 827 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 828 else 829 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 830 831 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 832 if (ret) { 833 ath10k_err(ar, "could not execute otp for board id check: %d\n", 834 ret); 835 return ret; 836 } 837 838 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 839 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 840 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 841 842 ath10k_dbg(ar, ATH10K_DBG_BOOT, 843 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 844 result, board_id, chip_id, ext_bid_support); 845 846 ar->id.ext_bid_supported = ext_bid_support; 847 848 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 849 (board_id == 0)) { 850 ath10k_dbg(ar, ATH10K_DBG_BOOT, 851 "board id does not exist in otp, ignore it\n"); 852 return -EOPNOTSUPP; 853 } 854 855 ar->id.bmi_ids_valid = true; 856 ar->id.bmi_board_id = board_id; 857 ar->id.bmi_chip_id = chip_id; 858 859 return 0; 860 } 861 862 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 863 { 864 struct ath10k *ar = data; 865 const char *bdf_ext; 866 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 867 u8 bdf_enabled; 868 int i; 869 870 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 871 return; 872 873 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 874 ath10k_dbg(ar, ATH10K_DBG_BOOT, 875 "wrong smbios bdf ext type length (%d).\n", 876 hdr->length); 877 return; 878 } 879 880 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 881 if (!bdf_enabled) { 882 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 883 return; 884 } 885 886 /* Only one string exists (per spec) */ 887 bdf_ext = (char *)hdr + hdr->length; 888 889 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 890 ath10k_dbg(ar, ATH10K_DBG_BOOT, 891 "bdf variant magic does not match.\n"); 892 return; 893 } 894 895 for (i = 0; i < strlen(bdf_ext); i++) { 896 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 897 ath10k_dbg(ar, ATH10K_DBG_BOOT, 898 "bdf variant name contains non ascii chars.\n"); 899 return; 900 } 901 } 902 903 /* Copy extension name without magic suffix */ 904 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 905 sizeof(ar->id.bdf_ext)) < 0) { 906 ath10k_dbg(ar, ATH10K_DBG_BOOT, 907 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 908 bdf_ext); 909 return; 910 } 911 912 ath10k_dbg(ar, ATH10K_DBG_BOOT, 913 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 914 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 915 } 916 917 static int ath10k_core_check_smbios(struct ath10k *ar) 918 { 919 ar->id.bdf_ext[0] = '\0'; 920 dmi_walk(ath10k_core_check_bdfext, ar); 921 922 if (ar->id.bdf_ext[0] == '\0') 923 return -ENODATA; 924 925 return 0; 926 } 927 928 static int ath10k_core_check_dt(struct ath10k *ar) 929 { 930 struct device_node *node; 931 const char *variant = NULL; 932 933 node = ar->dev->of_node; 934 if (!node) 935 return -ENOENT; 936 937 of_property_read_string(node, "qcom,ath10k-calibration-variant", 938 &variant); 939 if (!variant) 940 return -ENODATA; 941 942 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 943 ath10k_dbg(ar, ATH10K_DBG_BOOT, 944 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 945 variant); 946 947 return 0; 948 } 949 950 static int ath10k_download_fw(struct ath10k *ar) 951 { 952 u32 address, data_len; 953 const void *data; 954 int ret; 955 956 address = ar->hw_params.patch_load_addr; 957 958 data = ar->running_fw->fw_file.firmware_data; 959 data_len = ar->running_fw->fw_file.firmware_len; 960 961 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 962 if (ret) { 963 ath10k_err(ar, "failed to configure fw code swap: %d\n", 964 ret); 965 return ret; 966 } 967 968 ath10k_dbg(ar, ATH10K_DBG_BOOT, 969 "boot uploading firmware image %pK len %d\n", 970 data, data_len); 971 972 /* Check if device supports to download firmware via 973 * diag copy engine. Downloading firmware via diag CE 974 * greatly reduces the time to download firmware. 975 */ 976 if (ar->hw_params.fw_diag_ce_download) { 977 ret = ath10k_hw_diag_fast_download(ar, address, 978 data, data_len); 979 if (ret == 0) 980 /* firmware upload via diag ce was successful */ 981 return 0; 982 983 ath10k_warn(ar, 984 "failed to upload firmware via diag ce, trying BMI: %d", 985 ret); 986 } 987 988 return ath10k_bmi_fast_download(ar, address, 989 data, data_len); 990 } 991 992 void ath10k_core_free_board_files(struct ath10k *ar) 993 { 994 if (!IS_ERR(ar->normal_mode_fw.board)) 995 release_firmware(ar->normal_mode_fw.board); 996 997 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 998 release_firmware(ar->normal_mode_fw.ext_board); 999 1000 ar->normal_mode_fw.board = NULL; 1001 ar->normal_mode_fw.board_data = NULL; 1002 ar->normal_mode_fw.board_len = 0; 1003 ar->normal_mode_fw.ext_board = NULL; 1004 ar->normal_mode_fw.ext_board_data = NULL; 1005 ar->normal_mode_fw.ext_board_len = 0; 1006 } 1007 EXPORT_SYMBOL(ath10k_core_free_board_files); 1008 1009 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1010 { 1011 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1012 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1013 1014 if (!IS_ERR(ar->cal_file)) 1015 release_firmware(ar->cal_file); 1016 1017 if (!IS_ERR(ar->pre_cal_file)) 1018 release_firmware(ar->pre_cal_file); 1019 1020 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1021 1022 ar->normal_mode_fw.fw_file.otp_data = NULL; 1023 ar->normal_mode_fw.fw_file.otp_len = 0; 1024 1025 ar->normal_mode_fw.fw_file.firmware = NULL; 1026 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1027 ar->normal_mode_fw.fw_file.firmware_len = 0; 1028 1029 ar->cal_file = NULL; 1030 ar->pre_cal_file = NULL; 1031 } 1032 1033 static int ath10k_fetch_cal_file(struct ath10k *ar) 1034 { 1035 char filename[100]; 1036 1037 /* pre-cal-<bus>-<id>.bin */ 1038 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1039 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1040 1041 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1042 if (!IS_ERR(ar->pre_cal_file)) 1043 goto success; 1044 1045 /* cal-<bus>-<id>.bin */ 1046 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1047 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1048 1049 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1050 if (IS_ERR(ar->cal_file)) 1051 /* calibration file is optional, don't print any warnings */ 1052 return PTR_ERR(ar->cal_file); 1053 success: 1054 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1055 ATH10K_FW_DIR, filename); 1056 1057 return 0; 1058 } 1059 1060 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1061 { 1062 const struct firmware *fw; 1063 1064 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1065 if (!ar->hw_params.fw.board) { 1066 ath10k_err(ar, "failed to find board file fw entry\n"); 1067 return -EINVAL; 1068 } 1069 1070 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1071 ar->hw_params.fw.dir, 1072 ar->hw_params.fw.board); 1073 if (IS_ERR(ar->normal_mode_fw.board)) 1074 return PTR_ERR(ar->normal_mode_fw.board); 1075 1076 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1077 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1078 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1079 if (!ar->hw_params.fw.eboard) { 1080 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1081 return -EINVAL; 1082 } 1083 1084 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1085 ar->hw_params.fw.eboard); 1086 ar->normal_mode_fw.ext_board = fw; 1087 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1088 return PTR_ERR(ar->normal_mode_fw.ext_board); 1089 1090 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1091 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1092 } 1093 1094 return 0; 1095 } 1096 1097 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1098 const void *buf, size_t buf_len, 1099 const char *boardname, 1100 int bd_ie_type) 1101 { 1102 const struct ath10k_fw_ie *hdr; 1103 bool name_match_found; 1104 int ret, board_ie_id; 1105 size_t board_ie_len; 1106 const void *board_ie_data; 1107 1108 name_match_found = false; 1109 1110 /* go through ATH10K_BD_IE_BOARD_ elements */ 1111 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1112 hdr = buf; 1113 board_ie_id = le32_to_cpu(hdr->id); 1114 board_ie_len = le32_to_cpu(hdr->len); 1115 board_ie_data = hdr->data; 1116 1117 buf_len -= sizeof(*hdr); 1118 buf += sizeof(*hdr); 1119 1120 if (buf_len < ALIGN(board_ie_len, 4)) { 1121 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1122 buf_len, ALIGN(board_ie_len, 4)); 1123 ret = -EINVAL; 1124 goto out; 1125 } 1126 1127 switch (board_ie_id) { 1128 case ATH10K_BD_IE_BOARD_NAME: 1129 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1130 board_ie_data, board_ie_len); 1131 1132 if (board_ie_len != strlen(boardname)) 1133 break; 1134 1135 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1136 if (ret) 1137 break; 1138 1139 name_match_found = true; 1140 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1141 "boot found match for name '%s'", 1142 boardname); 1143 break; 1144 case ATH10K_BD_IE_BOARD_DATA: 1145 if (!name_match_found) 1146 /* no match found */ 1147 break; 1148 1149 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1150 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1151 "boot found board data for '%s'", 1152 boardname); 1153 1154 ar->normal_mode_fw.board_data = board_ie_data; 1155 ar->normal_mode_fw.board_len = board_ie_len; 1156 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1157 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1158 "boot found eboard data for '%s'", 1159 boardname); 1160 1161 ar->normal_mode_fw.ext_board_data = board_ie_data; 1162 ar->normal_mode_fw.ext_board_len = board_ie_len; 1163 } 1164 1165 ret = 0; 1166 goto out; 1167 default: 1168 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1169 board_ie_id); 1170 break; 1171 } 1172 1173 /* jump over the padding */ 1174 board_ie_len = ALIGN(board_ie_len, 4); 1175 1176 buf_len -= board_ie_len; 1177 buf += board_ie_len; 1178 } 1179 1180 /* no match found */ 1181 ret = -ENOENT; 1182 1183 out: 1184 return ret; 1185 } 1186 1187 static int ath10k_core_search_bd(struct ath10k *ar, 1188 const char *boardname, 1189 const u8 *data, 1190 size_t len) 1191 { 1192 size_t ie_len; 1193 struct ath10k_fw_ie *hdr; 1194 int ret = -ENOENT, ie_id; 1195 1196 while (len > sizeof(struct ath10k_fw_ie)) { 1197 hdr = (struct ath10k_fw_ie *)data; 1198 ie_id = le32_to_cpu(hdr->id); 1199 ie_len = le32_to_cpu(hdr->len); 1200 1201 len -= sizeof(*hdr); 1202 data = hdr->data; 1203 1204 if (len < ALIGN(ie_len, 4)) { 1205 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1206 ie_id, ie_len, len); 1207 return -EINVAL; 1208 } 1209 1210 switch (ie_id) { 1211 case ATH10K_BD_IE_BOARD: 1212 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1213 boardname, 1214 ATH10K_BD_IE_BOARD); 1215 if (ret == -ENOENT) 1216 /* no match found, continue */ 1217 break; 1218 1219 /* either found or error, so stop searching */ 1220 goto out; 1221 case ATH10K_BD_IE_BOARD_EXT: 1222 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1223 boardname, 1224 ATH10K_BD_IE_BOARD_EXT); 1225 if (ret == -ENOENT) 1226 /* no match found, continue */ 1227 break; 1228 1229 /* either found or error, so stop searching */ 1230 goto out; 1231 } 1232 1233 /* jump over the padding */ 1234 ie_len = ALIGN(ie_len, 4); 1235 1236 len -= ie_len; 1237 data += ie_len; 1238 } 1239 1240 out: 1241 /* return result of parse_bd_ie_board() or -ENOENT */ 1242 return ret; 1243 } 1244 1245 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1246 const char *boardname, 1247 const char *fallback_boardname, 1248 const char *filename) 1249 { 1250 size_t len, magic_len; 1251 const u8 *data; 1252 int ret; 1253 1254 /* Skip if already fetched during board data download */ 1255 if (!ar->normal_mode_fw.board) 1256 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1257 ar->hw_params.fw.dir, 1258 filename); 1259 if (IS_ERR(ar->normal_mode_fw.board)) 1260 return PTR_ERR(ar->normal_mode_fw.board); 1261 1262 data = ar->normal_mode_fw.board->data; 1263 len = ar->normal_mode_fw.board->size; 1264 1265 /* magic has extra null byte padded */ 1266 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1267 if (len < magic_len) { 1268 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1269 ar->hw_params.fw.dir, filename, len); 1270 ret = -EINVAL; 1271 goto err; 1272 } 1273 1274 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1275 ath10k_err(ar, "found invalid board magic\n"); 1276 ret = -EINVAL; 1277 goto err; 1278 } 1279 1280 /* magic is padded to 4 bytes */ 1281 magic_len = ALIGN(magic_len, 4); 1282 if (len < magic_len) { 1283 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1284 ar->hw_params.fw.dir, filename, len); 1285 ret = -EINVAL; 1286 goto err; 1287 } 1288 1289 data += magic_len; 1290 len -= magic_len; 1291 1292 /* attempt to find boardname in the IE list */ 1293 ret = ath10k_core_search_bd(ar, boardname, data, len); 1294 1295 /* if we didn't find it and have a fallback name, try that */ 1296 if (ret == -ENOENT && fallback_boardname) 1297 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1298 1299 if (ret == -ENOENT) { 1300 ath10k_err(ar, 1301 "failed to fetch board data for %s from %s/%s\n", 1302 boardname, ar->hw_params.fw.dir, filename); 1303 ret = -ENODATA; 1304 } 1305 1306 if (ret) 1307 goto err; 1308 1309 return 0; 1310 1311 err: 1312 ath10k_core_free_board_files(ar); 1313 return ret; 1314 } 1315 1316 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1317 size_t name_len, bool with_variant) 1318 { 1319 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1320 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1321 1322 if (with_variant && ar->id.bdf_ext[0] != '\0') 1323 scnprintf(variant, sizeof(variant), ",variant=%s", 1324 ar->id.bdf_ext); 1325 1326 if (ar->id.bmi_ids_valid) { 1327 scnprintf(name, name_len, 1328 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1329 ath10k_bus_str(ar->hif.bus), 1330 ar->id.bmi_chip_id, 1331 ar->id.bmi_board_id, variant); 1332 goto out; 1333 } 1334 1335 if (ar->id.qmi_ids_valid) { 1336 scnprintf(name, name_len, 1337 "bus=%s,qmi-board-id=%x", 1338 ath10k_bus_str(ar->hif.bus), 1339 ar->id.qmi_board_id); 1340 goto out; 1341 } 1342 1343 scnprintf(name, name_len, 1344 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1345 ath10k_bus_str(ar->hif.bus), 1346 ar->id.vendor, ar->id.device, 1347 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1348 out: 1349 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1350 1351 return 0; 1352 } 1353 1354 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1355 size_t name_len) 1356 { 1357 if (ar->id.bmi_ids_valid) { 1358 scnprintf(name, name_len, 1359 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1360 ath10k_bus_str(ar->hif.bus), 1361 ar->id.bmi_chip_id, 1362 ar->id.bmi_eboard_id); 1363 1364 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1365 return 0; 1366 } 1367 /* Fallback if returned board id is zero */ 1368 return -1; 1369 } 1370 1371 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1372 { 1373 char boardname[100], fallback_boardname[100]; 1374 int ret; 1375 1376 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1377 ret = ath10k_core_create_board_name(ar, boardname, 1378 sizeof(boardname), true); 1379 if (ret) { 1380 ath10k_err(ar, "failed to create board name: %d", ret); 1381 return ret; 1382 } 1383 1384 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1385 sizeof(boardname), false); 1386 if (ret) { 1387 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1388 return ret; 1389 } 1390 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1391 ret = ath10k_core_create_eboard_name(ar, boardname, 1392 sizeof(boardname)); 1393 if (ret) { 1394 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1395 goto fallback; 1396 } 1397 } 1398 1399 ar->bd_api = 2; 1400 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1401 fallback_boardname, 1402 ATH10K_BOARD_API2_FILE); 1403 if (!ret) 1404 goto success; 1405 1406 fallback: 1407 ar->bd_api = 1; 1408 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1409 if (ret) { 1410 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1411 ar->hw_params.fw.dir); 1412 return ret; 1413 } 1414 1415 success: 1416 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1417 return 0; 1418 } 1419 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1420 1421 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1422 { 1423 u32 result, address; 1424 u8 ext_board_id; 1425 int ret; 1426 1427 address = ar->hw_params.patch_load_addr; 1428 1429 if (!ar->normal_mode_fw.fw_file.otp_data || 1430 !ar->normal_mode_fw.fw_file.otp_len) { 1431 ath10k_warn(ar, 1432 "failed to retrieve extended board id due to otp binary missing\n"); 1433 return -ENODATA; 1434 } 1435 1436 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1437 "boot upload otp to 0x%x len %zd for ext board id\n", 1438 address, ar->normal_mode_fw.fw_file.otp_len); 1439 1440 ret = ath10k_bmi_fast_download(ar, address, 1441 ar->normal_mode_fw.fw_file.otp_data, 1442 ar->normal_mode_fw.fw_file.otp_len); 1443 if (ret) { 1444 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1445 ret); 1446 return ret; 1447 } 1448 1449 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1450 if (ret) { 1451 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1452 ret); 1453 return ret; 1454 } 1455 1456 if (!result) { 1457 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1458 "ext board id does not exist in otp, ignore it\n"); 1459 return -EOPNOTSUPP; 1460 } 1461 1462 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1463 1464 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1465 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1466 result, ext_board_id); 1467 1468 ar->id.bmi_eboard_id = ext_board_id; 1469 1470 return 0; 1471 } 1472 1473 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1474 size_t data_len) 1475 { 1476 u32 board_data_size = ar->hw_params.fw.board_size; 1477 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1478 u32 board_address; 1479 u32 ext_board_address; 1480 int ret; 1481 1482 ret = ath10k_push_board_ext_data(ar, data, data_len); 1483 if (ret) { 1484 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1485 goto exit; 1486 } 1487 1488 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1489 if (ret) { 1490 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1491 goto exit; 1492 } 1493 1494 ret = ath10k_bmi_write_memory(ar, board_address, data, 1495 min_t(u32, board_data_size, 1496 data_len)); 1497 if (ret) { 1498 ath10k_err(ar, "could not write board data (%d)\n", ret); 1499 goto exit; 1500 } 1501 1502 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1503 if (ret) { 1504 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1505 goto exit; 1506 } 1507 1508 if (!ar->id.ext_bid_supported) 1509 goto exit; 1510 1511 /* Extended board data download */ 1512 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1513 if (ret == -EOPNOTSUPP) { 1514 /* Not fetching ext_board_data if ext board id is 0 */ 1515 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1516 return 0; 1517 } else if (ret) { 1518 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1519 goto exit; 1520 } 1521 1522 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1523 if (ret) 1524 goto exit; 1525 1526 if (ar->normal_mode_fw.ext_board_data) { 1527 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1528 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1529 "boot writing ext board data to addr 0x%x", 1530 ext_board_address); 1531 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1532 ar->normal_mode_fw.ext_board_data, 1533 min_t(u32, eboard_data_size, data_len)); 1534 if (ret) 1535 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1536 } 1537 1538 exit: 1539 return ret; 1540 } 1541 1542 static int ath10k_download_and_run_otp(struct ath10k *ar) 1543 { 1544 u32 result, address = ar->hw_params.patch_load_addr; 1545 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1546 int ret; 1547 1548 ret = ath10k_download_board_data(ar, 1549 ar->running_fw->board_data, 1550 ar->running_fw->board_len); 1551 if (ret) { 1552 ath10k_err(ar, "failed to download board data: %d\n", ret); 1553 return ret; 1554 } 1555 1556 /* OTP is optional */ 1557 1558 if (!ar->running_fw->fw_file.otp_data || 1559 !ar->running_fw->fw_file.otp_len) { 1560 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1561 ar->running_fw->fw_file.otp_data, 1562 ar->running_fw->fw_file.otp_len); 1563 return 0; 1564 } 1565 1566 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1567 address, ar->running_fw->fw_file.otp_len); 1568 1569 ret = ath10k_bmi_fast_download(ar, address, 1570 ar->running_fw->fw_file.otp_data, 1571 ar->running_fw->fw_file.otp_len); 1572 if (ret) { 1573 ath10k_err(ar, "could not write otp (%d)\n", ret); 1574 return ret; 1575 } 1576 1577 /* As of now pre-cal is valid for 10_4 variants */ 1578 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1579 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1580 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1581 1582 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1583 if (ret) { 1584 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1585 return ret; 1586 } 1587 1588 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1589 1590 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1591 ar->running_fw->fw_file.fw_features)) && 1592 result != 0) { 1593 ath10k_err(ar, "otp calibration failed: %d", result); 1594 return -EINVAL; 1595 } 1596 1597 return 0; 1598 } 1599 1600 static int ath10k_download_cal_file(struct ath10k *ar, 1601 const struct firmware *file) 1602 { 1603 int ret; 1604 1605 if (!file) 1606 return -ENOENT; 1607 1608 if (IS_ERR(file)) 1609 return PTR_ERR(file); 1610 1611 ret = ath10k_download_board_data(ar, file->data, file->size); 1612 if (ret) { 1613 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1614 return ret; 1615 } 1616 1617 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1618 1619 return 0; 1620 } 1621 1622 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1623 { 1624 struct device_node *node; 1625 int data_len; 1626 void *data; 1627 int ret; 1628 1629 node = ar->dev->of_node; 1630 if (!node) 1631 /* Device Tree is optional, don't print any warnings if 1632 * there's no node for ath10k. 1633 */ 1634 return -ENOENT; 1635 1636 if (!of_get_property(node, dt_name, &data_len)) { 1637 /* The calibration data node is optional */ 1638 return -ENOENT; 1639 } 1640 1641 if (data_len != ar->hw_params.cal_data_len) { 1642 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1643 data_len); 1644 ret = -EMSGSIZE; 1645 goto out; 1646 } 1647 1648 data = kmalloc(data_len, GFP_KERNEL); 1649 if (!data) { 1650 ret = -ENOMEM; 1651 goto out; 1652 } 1653 1654 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1655 if (ret) { 1656 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1657 ret); 1658 goto out_free; 1659 } 1660 1661 ret = ath10k_download_board_data(ar, data, data_len); 1662 if (ret) { 1663 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1664 ret); 1665 goto out_free; 1666 } 1667 1668 ret = 0; 1669 1670 out_free: 1671 kfree(data); 1672 1673 out: 1674 return ret; 1675 } 1676 1677 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1678 { 1679 size_t data_len; 1680 void *data = NULL; 1681 int ret; 1682 1683 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1684 if (ret) { 1685 if (ret != -EOPNOTSUPP) 1686 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1687 ret); 1688 goto out_free; 1689 } 1690 1691 ret = ath10k_download_board_data(ar, data, data_len); 1692 if (ret) { 1693 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1694 ret); 1695 goto out_free; 1696 } 1697 1698 ret = 0; 1699 1700 out_free: 1701 kfree(data); 1702 1703 return ret; 1704 } 1705 1706 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1707 struct ath10k_fw_file *fw_file) 1708 { 1709 size_t magic_len, len, ie_len; 1710 int ie_id, i, index, bit, ret; 1711 struct ath10k_fw_ie *hdr; 1712 const u8 *data; 1713 __le32 *timestamp, *version; 1714 1715 /* first fetch the firmware file (firmware-*.bin) */ 1716 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1717 name); 1718 if (IS_ERR(fw_file->firmware)) 1719 return PTR_ERR(fw_file->firmware); 1720 1721 data = fw_file->firmware->data; 1722 len = fw_file->firmware->size; 1723 1724 /* magic also includes the null byte, check that as well */ 1725 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1726 1727 if (len < magic_len) { 1728 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1729 ar->hw_params.fw.dir, name, len); 1730 ret = -EINVAL; 1731 goto err; 1732 } 1733 1734 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1735 ath10k_err(ar, "invalid firmware magic\n"); 1736 ret = -EINVAL; 1737 goto err; 1738 } 1739 1740 /* jump over the padding */ 1741 magic_len = ALIGN(magic_len, 4); 1742 1743 len -= magic_len; 1744 data += magic_len; 1745 1746 /* loop elements */ 1747 while (len > sizeof(struct ath10k_fw_ie)) { 1748 hdr = (struct ath10k_fw_ie *)data; 1749 1750 ie_id = le32_to_cpu(hdr->id); 1751 ie_len = le32_to_cpu(hdr->len); 1752 1753 len -= sizeof(*hdr); 1754 data += sizeof(*hdr); 1755 1756 if (len < ie_len) { 1757 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1758 ie_id, len, ie_len); 1759 ret = -EINVAL; 1760 goto err; 1761 } 1762 1763 switch (ie_id) { 1764 case ATH10K_FW_IE_FW_VERSION: 1765 if (ie_len > sizeof(fw_file->fw_version) - 1) 1766 break; 1767 1768 memcpy(fw_file->fw_version, data, ie_len); 1769 fw_file->fw_version[ie_len] = '\0'; 1770 1771 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1772 "found fw version %s\n", 1773 fw_file->fw_version); 1774 break; 1775 case ATH10K_FW_IE_TIMESTAMP: 1776 if (ie_len != sizeof(u32)) 1777 break; 1778 1779 timestamp = (__le32 *)data; 1780 1781 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1782 le32_to_cpup(timestamp)); 1783 break; 1784 case ATH10K_FW_IE_FEATURES: 1785 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1786 "found firmware features ie (%zd B)\n", 1787 ie_len); 1788 1789 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1790 index = i / 8; 1791 bit = i % 8; 1792 1793 if (index == ie_len) 1794 break; 1795 1796 if (data[index] & (1 << bit)) { 1797 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1798 "Enabling feature bit: %i\n", 1799 i); 1800 __set_bit(i, fw_file->fw_features); 1801 } 1802 } 1803 1804 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1805 fw_file->fw_features, 1806 sizeof(fw_file->fw_features)); 1807 break; 1808 case ATH10K_FW_IE_FW_IMAGE: 1809 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1810 "found fw image ie (%zd B)\n", 1811 ie_len); 1812 1813 fw_file->firmware_data = data; 1814 fw_file->firmware_len = ie_len; 1815 1816 break; 1817 case ATH10K_FW_IE_OTP_IMAGE: 1818 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1819 "found otp image ie (%zd B)\n", 1820 ie_len); 1821 1822 fw_file->otp_data = data; 1823 fw_file->otp_len = ie_len; 1824 1825 break; 1826 case ATH10K_FW_IE_WMI_OP_VERSION: 1827 if (ie_len != sizeof(u32)) 1828 break; 1829 1830 version = (__le32 *)data; 1831 1832 fw_file->wmi_op_version = le32_to_cpup(version); 1833 1834 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1835 fw_file->wmi_op_version); 1836 break; 1837 case ATH10K_FW_IE_HTT_OP_VERSION: 1838 if (ie_len != sizeof(u32)) 1839 break; 1840 1841 version = (__le32 *)data; 1842 1843 fw_file->htt_op_version = le32_to_cpup(version); 1844 1845 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1846 fw_file->htt_op_version); 1847 break; 1848 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1849 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1850 "found fw code swap image ie (%zd B)\n", 1851 ie_len); 1852 fw_file->codeswap_data = data; 1853 fw_file->codeswap_len = ie_len; 1854 break; 1855 default: 1856 ath10k_warn(ar, "Unknown FW IE: %u\n", 1857 le32_to_cpu(hdr->id)); 1858 break; 1859 } 1860 1861 /* jump over the padding */ 1862 ie_len = ALIGN(ie_len, 4); 1863 1864 len -= ie_len; 1865 data += ie_len; 1866 } 1867 1868 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1869 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1870 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1871 ar->hw_params.fw.dir, name); 1872 ret = -ENOMEDIUM; 1873 goto err; 1874 } 1875 1876 return 0; 1877 1878 err: 1879 ath10k_core_free_firmware_files(ar); 1880 return ret; 1881 } 1882 1883 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1884 size_t fw_name_len, int fw_api) 1885 { 1886 switch (ar->hif.bus) { 1887 case ATH10K_BUS_SDIO: 1888 case ATH10K_BUS_USB: 1889 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1890 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1891 fw_api); 1892 break; 1893 case ATH10K_BUS_PCI: 1894 case ATH10K_BUS_AHB: 1895 case ATH10K_BUS_SNOC: 1896 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1897 ATH10K_FW_FILE_BASE, fw_api); 1898 break; 1899 } 1900 } 1901 1902 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1903 { 1904 int ret, i; 1905 char fw_name[100]; 1906 1907 /* calibration file is optional, don't check for any errors */ 1908 ath10k_fetch_cal_file(ar); 1909 1910 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1911 ar->fw_api = i; 1912 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1913 ar->fw_api); 1914 1915 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1916 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1917 &ar->normal_mode_fw.fw_file); 1918 if (!ret) 1919 goto success; 1920 } 1921 1922 /* we end up here if we couldn't fetch any firmware */ 1923 1924 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1925 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1926 ret); 1927 1928 return ret; 1929 1930 success: 1931 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1932 1933 return 0; 1934 } 1935 1936 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1937 { 1938 int ret; 1939 1940 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1941 if (ret == 0) { 1942 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1943 goto success; 1944 } 1945 1946 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1947 "boot did not find a pre calibration file, try DT next: %d\n", 1948 ret); 1949 1950 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1951 if (ret) { 1952 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1953 "unable to load pre cal data from DT: %d\n", ret); 1954 return ret; 1955 } 1956 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1957 1958 success: 1959 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1960 ath10k_cal_mode_str(ar->cal_mode)); 1961 1962 return 0; 1963 } 1964 1965 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1966 { 1967 int ret; 1968 1969 ret = ath10k_core_pre_cal_download(ar); 1970 if (ret) { 1971 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1972 "failed to load pre cal data: %d\n", ret); 1973 return ret; 1974 } 1975 1976 ret = ath10k_core_get_board_id_from_otp(ar); 1977 if (ret) { 1978 ath10k_err(ar, "failed to get board id: %d\n", ret); 1979 return ret; 1980 } 1981 1982 ret = ath10k_download_and_run_otp(ar); 1983 if (ret) { 1984 ath10k_err(ar, "failed to run otp: %d\n", ret); 1985 return ret; 1986 } 1987 1988 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1989 "pre cal configuration done successfully\n"); 1990 1991 return 0; 1992 } 1993 1994 static int ath10k_download_cal_data(struct ath10k *ar) 1995 { 1996 int ret; 1997 1998 ret = ath10k_core_pre_cal_config(ar); 1999 if (ret == 0) 2000 return 0; 2001 2002 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2003 "pre cal download procedure failed, try cal file: %d\n", 2004 ret); 2005 2006 ret = ath10k_download_cal_file(ar, ar->cal_file); 2007 if (ret == 0) { 2008 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2009 goto done; 2010 } 2011 2012 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2013 "boot did not find a calibration file, try DT next: %d\n", 2014 ret); 2015 2016 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2017 if (ret == 0) { 2018 ar->cal_mode = ATH10K_CAL_MODE_DT; 2019 goto done; 2020 } 2021 2022 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2023 "boot did not find DT entry, try target EEPROM next: %d\n", 2024 ret); 2025 2026 ret = ath10k_download_cal_eeprom(ar); 2027 if (ret == 0) { 2028 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2029 goto done; 2030 } 2031 2032 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2033 "boot did not find target EEPROM entry, try OTP next: %d\n", 2034 ret); 2035 2036 ret = ath10k_download_and_run_otp(ar); 2037 if (ret) { 2038 ath10k_err(ar, "failed to run otp: %d\n", ret); 2039 return ret; 2040 } 2041 2042 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2043 2044 done: 2045 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2046 ath10k_cal_mode_str(ar->cal_mode)); 2047 return 0; 2048 } 2049 2050 static int ath10k_init_uart(struct ath10k *ar) 2051 { 2052 int ret; 2053 2054 /* 2055 * Explicitly setting UART prints to zero as target turns it on 2056 * based on scratch registers. 2057 */ 2058 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2059 if (ret) { 2060 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2061 return ret; 2062 } 2063 2064 if (!uart_print) 2065 return 0; 2066 2067 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2068 if (ret) { 2069 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2070 return ret; 2071 } 2072 2073 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2074 if (ret) { 2075 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2076 return ret; 2077 } 2078 2079 /* Set the UART baud rate to 19200. */ 2080 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2081 if (ret) { 2082 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2083 return ret; 2084 } 2085 2086 ath10k_info(ar, "UART prints enabled\n"); 2087 return 0; 2088 } 2089 2090 static int ath10k_init_hw_params(struct ath10k *ar) 2091 { 2092 const struct ath10k_hw_params *uninitialized_var(hw_params); 2093 int i; 2094 2095 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2096 hw_params = &ath10k_hw_params_list[i]; 2097 2098 if (hw_params->bus == ar->hif.bus && 2099 hw_params->id == ar->target_version && 2100 hw_params->dev_id == ar->dev_id) 2101 break; 2102 } 2103 2104 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2105 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2106 ar->target_version); 2107 return -EINVAL; 2108 } 2109 2110 ar->hw_params = *hw_params; 2111 2112 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2113 ar->hw_params.name, ar->target_version); 2114 2115 return 0; 2116 } 2117 2118 static void ath10k_core_restart(struct work_struct *work) 2119 { 2120 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2121 int ret; 2122 2123 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2124 2125 /* Place a barrier to make sure the compiler doesn't reorder 2126 * CRASH_FLUSH and calling other functions. 2127 */ 2128 barrier(); 2129 2130 ieee80211_stop_queues(ar->hw); 2131 ath10k_drain_tx(ar); 2132 complete(&ar->scan.started); 2133 complete(&ar->scan.completed); 2134 complete(&ar->scan.on_channel); 2135 complete(&ar->offchan_tx_completed); 2136 complete(&ar->install_key_done); 2137 complete(&ar->vdev_setup_done); 2138 complete(&ar->thermal.wmi_sync); 2139 complete(&ar->bss_survey_done); 2140 wake_up(&ar->htt.empty_tx_wq); 2141 wake_up(&ar->wmi.tx_credits_wq); 2142 wake_up(&ar->peer_mapping_wq); 2143 2144 /* TODO: We can have one instance of cancelling coverage_class_work by 2145 * moving it to ath10k_halt(), so that both stop() and restart() would 2146 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2147 * with conf_mutex it will deadlock. 2148 */ 2149 cancel_work_sync(&ar->set_coverage_class_work); 2150 2151 mutex_lock(&ar->conf_mutex); 2152 2153 switch (ar->state) { 2154 case ATH10K_STATE_ON: 2155 ar->state = ATH10K_STATE_RESTARTING; 2156 ath10k_halt(ar); 2157 ath10k_scan_finish(ar); 2158 ieee80211_restart_hw(ar->hw); 2159 break; 2160 case ATH10K_STATE_OFF: 2161 /* this can happen if driver is being unloaded 2162 * or if the crash happens during FW probing 2163 */ 2164 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2165 break; 2166 case ATH10K_STATE_RESTARTING: 2167 /* hw restart might be requested from multiple places */ 2168 break; 2169 case ATH10K_STATE_RESTARTED: 2170 ar->state = ATH10K_STATE_WEDGED; 2171 /* fall through */ 2172 case ATH10K_STATE_WEDGED: 2173 ath10k_warn(ar, "device is wedged, will not restart\n"); 2174 break; 2175 case ATH10K_STATE_UTF: 2176 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2177 break; 2178 } 2179 2180 mutex_unlock(&ar->conf_mutex); 2181 2182 ret = ath10k_coredump_submit(ar); 2183 if (ret) 2184 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2185 ret); 2186 } 2187 2188 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2189 { 2190 struct ath10k *ar = container_of(work, struct ath10k, 2191 set_coverage_class_work); 2192 2193 if (ar->hw_params.hw_ops->set_coverage_class) 2194 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2195 } 2196 2197 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2198 { 2199 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2200 int max_num_peers; 2201 2202 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2203 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2204 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2205 return -EINVAL; 2206 } 2207 2208 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2209 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2210 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2211 return -EINVAL; 2212 } 2213 2214 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2215 switch (ath10k_cryptmode_param) { 2216 case ATH10K_CRYPT_MODE_HW: 2217 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2218 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2219 break; 2220 case ATH10K_CRYPT_MODE_SW: 2221 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2222 fw_file->fw_features)) { 2223 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2224 return -EINVAL; 2225 } 2226 2227 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2228 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2229 break; 2230 default: 2231 ath10k_info(ar, "invalid cryptmode: %d\n", 2232 ath10k_cryptmode_param); 2233 return -EINVAL; 2234 } 2235 2236 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2237 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2238 2239 if (rawmode) { 2240 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2241 fw_file->fw_features)) { 2242 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2243 return -EINVAL; 2244 } 2245 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2246 } 2247 2248 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2249 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2250 2251 /* Workaround: 2252 * 2253 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2254 * and causes enormous performance issues (malformed frames, 2255 * etc). 2256 * 2257 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2258 * albeit a bit slower compared to regular operation. 2259 */ 2260 ar->htt.max_num_amsdu = 1; 2261 } 2262 2263 /* Backwards compatibility for firmwares without 2264 * ATH10K_FW_IE_WMI_OP_VERSION. 2265 */ 2266 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2267 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2268 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2269 fw_file->fw_features)) 2270 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2271 else 2272 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2273 } else { 2274 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2275 } 2276 } 2277 2278 switch (fw_file->wmi_op_version) { 2279 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2280 max_num_peers = TARGET_NUM_PEERS; 2281 ar->max_num_stations = TARGET_NUM_STATIONS; 2282 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2283 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2284 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2285 WMI_STAT_PEER; 2286 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2287 break; 2288 case ATH10K_FW_WMI_OP_VERSION_10_1: 2289 case ATH10K_FW_WMI_OP_VERSION_10_2: 2290 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2291 if (ath10k_peer_stats_enabled(ar)) { 2292 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2293 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2294 } else { 2295 max_num_peers = TARGET_10X_NUM_PEERS; 2296 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2297 } 2298 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2299 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2300 ar->fw_stats_req_mask = WMI_STAT_PEER; 2301 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2302 break; 2303 case ATH10K_FW_WMI_OP_VERSION_TLV: 2304 max_num_peers = TARGET_TLV_NUM_PEERS; 2305 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2306 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2307 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2308 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2309 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2310 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2311 WMI_STAT_PEER; 2312 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2313 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2314 break; 2315 case ATH10K_FW_WMI_OP_VERSION_10_4: 2316 max_num_peers = TARGET_10_4_NUM_PEERS; 2317 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2318 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2319 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2320 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2321 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2322 WMI_10_4_STAT_PEER_EXTD | 2323 WMI_10_4_STAT_VDEV_EXTD; 2324 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2325 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2326 2327 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2328 fw_file->fw_features)) 2329 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2330 else 2331 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2332 break; 2333 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2334 case ATH10K_FW_WMI_OP_VERSION_MAX: 2335 default: 2336 WARN_ON(1); 2337 return -EINVAL; 2338 } 2339 2340 if (ar->hw_params.num_peers) 2341 ar->max_num_peers = ar->hw_params.num_peers; 2342 else 2343 ar->max_num_peers = max_num_peers; 2344 2345 /* Backwards compatibility for firmwares without 2346 * ATH10K_FW_IE_HTT_OP_VERSION. 2347 */ 2348 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2349 switch (fw_file->wmi_op_version) { 2350 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2351 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2352 break; 2353 case ATH10K_FW_WMI_OP_VERSION_10_1: 2354 case ATH10K_FW_WMI_OP_VERSION_10_2: 2355 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2356 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2357 break; 2358 case ATH10K_FW_WMI_OP_VERSION_TLV: 2359 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2360 break; 2361 case ATH10K_FW_WMI_OP_VERSION_10_4: 2362 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2363 case ATH10K_FW_WMI_OP_VERSION_MAX: 2364 ath10k_err(ar, "htt op version not found from fw meta data"); 2365 return -EINVAL; 2366 } 2367 } 2368 2369 return 0; 2370 } 2371 2372 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2373 { 2374 int ret; 2375 int vdev_id; 2376 int vdev_type; 2377 int vdev_subtype; 2378 const u8 *vdev_addr; 2379 2380 vdev_id = 0; 2381 vdev_type = WMI_VDEV_TYPE_STA; 2382 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2383 vdev_addr = ar->mac_addr; 2384 2385 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2386 vdev_addr); 2387 if (ret) { 2388 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2389 return ret; 2390 } 2391 2392 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2393 if (ret) { 2394 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2395 return ret; 2396 } 2397 2398 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2399 * serialized properly implicitly. 2400 * 2401 * Moreover (most) WMI commands have no explicit acknowledges. It is 2402 * possible to infer it implicitly by poking firmware with echo 2403 * command - getting a reply means all preceding comments have been 2404 * (mostly) processed. 2405 * 2406 * In case of vdev create/delete this is sufficient. 2407 * 2408 * Without this it's possible to end up with a race when HTT Rx ring is 2409 * started before vdev create/delete hack is complete allowing a short 2410 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2411 */ 2412 ret = ath10k_wmi_barrier(ar); 2413 if (ret) { 2414 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2415 return ret; 2416 } 2417 2418 return 0; 2419 } 2420 2421 static int ath10k_core_compat_services(struct ath10k *ar) 2422 { 2423 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2424 2425 /* all 10.x firmware versions support thermal throttling but don't 2426 * advertise the support via service flags so we have to hardcode 2427 * it here 2428 */ 2429 switch (fw_file->wmi_op_version) { 2430 case ATH10K_FW_WMI_OP_VERSION_10_1: 2431 case ATH10K_FW_WMI_OP_VERSION_10_2: 2432 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2433 case ATH10K_FW_WMI_OP_VERSION_10_4: 2434 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2435 break; 2436 default: 2437 break; 2438 } 2439 2440 return 0; 2441 } 2442 2443 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2444 const struct ath10k_fw_components *fw) 2445 { 2446 int status; 2447 u32 val; 2448 2449 lockdep_assert_held(&ar->conf_mutex); 2450 2451 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2452 2453 ar->running_fw = fw; 2454 2455 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2456 ar->running_fw->fw_file.fw_features)) { 2457 ath10k_bmi_start(ar); 2458 2459 if (ath10k_init_configure_target(ar)) { 2460 status = -EINVAL; 2461 goto err; 2462 } 2463 2464 status = ath10k_download_cal_data(ar); 2465 if (status) 2466 goto err; 2467 2468 /* Some of of qca988x solutions are having global reset issue 2469 * during target initialization. Bypassing PLL setting before 2470 * downloading firmware and letting the SoC run on REF_CLK is 2471 * fixing the problem. Corresponding firmware change is also 2472 * needed to set the clock source once the target is 2473 * initialized. 2474 */ 2475 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2476 ar->running_fw->fw_file.fw_features)) { 2477 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2478 if (status) { 2479 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2480 status); 2481 goto err; 2482 } 2483 } 2484 2485 status = ath10k_download_fw(ar); 2486 if (status) 2487 goto err; 2488 2489 status = ath10k_init_uart(ar); 2490 if (status) 2491 goto err; 2492 2493 if (ar->hif.bus == ATH10K_BUS_SDIO) 2494 ath10k_init_sdio(ar); 2495 } 2496 2497 ar->htc.htc_ops.target_send_suspend_complete = 2498 ath10k_send_suspend_complete; 2499 2500 status = ath10k_htc_init(ar); 2501 if (status) { 2502 ath10k_err(ar, "could not init HTC (%d)\n", status); 2503 goto err; 2504 } 2505 2506 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2507 ar->running_fw->fw_file.fw_features)) { 2508 status = ath10k_bmi_done(ar); 2509 if (status) 2510 goto err; 2511 } 2512 2513 status = ath10k_wmi_attach(ar); 2514 if (status) { 2515 ath10k_err(ar, "WMI attach failed: %d\n", status); 2516 goto err; 2517 } 2518 2519 status = ath10k_htt_init(ar); 2520 if (status) { 2521 ath10k_err(ar, "failed to init htt: %d\n", status); 2522 goto err_wmi_detach; 2523 } 2524 2525 status = ath10k_htt_tx_start(&ar->htt); 2526 if (status) { 2527 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2528 goto err_wmi_detach; 2529 } 2530 2531 /* If firmware indicates Full Rx Reorder support it must be used in a 2532 * slightly different manner. Let HTT code know. 2533 */ 2534 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2535 ar->wmi.svc_map)); 2536 2537 status = ath10k_htt_rx_alloc(&ar->htt); 2538 if (status) { 2539 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2540 goto err_htt_tx_detach; 2541 } 2542 2543 status = ath10k_hif_start(ar); 2544 if (status) { 2545 ath10k_err(ar, "could not start HIF: %d\n", status); 2546 goto err_htt_rx_detach; 2547 } 2548 2549 status = ath10k_htc_wait_target(&ar->htc); 2550 if (status) { 2551 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2552 goto err_hif_stop; 2553 } 2554 2555 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2556 status = ath10k_htt_connect(&ar->htt); 2557 if (status) { 2558 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2559 goto err_hif_stop; 2560 } 2561 } 2562 2563 status = ath10k_wmi_connect(ar); 2564 if (status) { 2565 ath10k_err(ar, "could not connect wmi: %d\n", status); 2566 goto err_hif_stop; 2567 } 2568 2569 status = ath10k_htc_start(&ar->htc); 2570 if (status) { 2571 ath10k_err(ar, "failed to start htc: %d\n", status); 2572 goto err_hif_stop; 2573 } 2574 2575 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2576 status = ath10k_wmi_wait_for_service_ready(ar); 2577 if (status) { 2578 ath10k_warn(ar, "wmi service ready event not received"); 2579 goto err_hif_stop; 2580 } 2581 } 2582 2583 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2584 ar->hw->wiphy->fw_version); 2585 2586 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2587 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2588 val = 0; 2589 if (ath10k_peer_stats_enabled(ar)) 2590 val = WMI_10_4_PEER_STATS; 2591 2592 /* Enable vdev stats by default */ 2593 val |= WMI_10_4_VDEV_STATS; 2594 2595 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2596 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2597 2598 /* 10.4 firmware supports BT-Coex without reloading firmware 2599 * via pdev param. To support Bluetooth coexistence pdev param, 2600 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2601 * enabled always. 2602 */ 2603 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2604 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2605 ar->running_fw->fw_file.fw_features)) 2606 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2607 2608 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2609 ar->wmi.svc_map)) 2610 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2611 2612 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2613 ar->wmi.svc_map)) 2614 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2615 2616 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2617 ar->wmi.svc_map)) 2618 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2619 2620 status = ath10k_mac_ext_resource_config(ar, val); 2621 if (status) { 2622 ath10k_err(ar, 2623 "failed to send ext resource cfg command : %d\n", 2624 status); 2625 goto err_hif_stop; 2626 } 2627 } 2628 2629 status = ath10k_wmi_cmd_init(ar); 2630 if (status) { 2631 ath10k_err(ar, "could not send WMI init command (%d)\n", 2632 status); 2633 goto err_hif_stop; 2634 } 2635 2636 status = ath10k_wmi_wait_for_unified_ready(ar); 2637 if (status) { 2638 ath10k_err(ar, "wmi unified ready event not received\n"); 2639 goto err_hif_stop; 2640 } 2641 2642 status = ath10k_core_compat_services(ar); 2643 if (status) { 2644 ath10k_err(ar, "compat services failed: %d\n", status); 2645 goto err_hif_stop; 2646 } 2647 2648 /* Some firmware revisions do not properly set up hardware rx filter 2649 * registers. 2650 * 2651 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2652 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2653 * any frames that matches MAC_PCU_RX_FILTER which is also 2654 * misconfigured to accept anything. 2655 * 2656 * The ADDR1 is programmed using internal firmware structure field and 2657 * can't be (easily/sanely) reached from the driver explicitly. It is 2658 * possible to implicitly make it correct by creating a dummy vdev and 2659 * then deleting it. 2660 */ 2661 if (ar->hw_params.hw_filter_reset_required && 2662 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2663 status = ath10k_core_reset_rx_filter(ar); 2664 if (status) { 2665 ath10k_err(ar, 2666 "failed to reset rx filter: %d\n", status); 2667 goto err_hif_stop; 2668 } 2669 } 2670 2671 status = ath10k_htt_rx_ring_refill(ar); 2672 if (status) { 2673 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2674 goto err_hif_stop; 2675 } 2676 2677 if (ar->max_num_vdevs >= 64) 2678 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2679 else 2680 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2681 2682 INIT_LIST_HEAD(&ar->arvifs); 2683 2684 /* we don't care about HTT in UTF mode */ 2685 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2686 status = ath10k_htt_setup(&ar->htt); 2687 if (status) { 2688 ath10k_err(ar, "failed to setup htt: %d\n", status); 2689 goto err_hif_stop; 2690 } 2691 } 2692 2693 status = ath10k_debug_start(ar); 2694 if (status) 2695 goto err_hif_stop; 2696 2697 return 0; 2698 2699 err_hif_stop: 2700 ath10k_hif_stop(ar); 2701 err_htt_rx_detach: 2702 ath10k_htt_rx_free(&ar->htt); 2703 err_htt_tx_detach: 2704 ath10k_htt_tx_free(&ar->htt); 2705 err_wmi_detach: 2706 ath10k_wmi_detach(ar); 2707 err: 2708 return status; 2709 } 2710 EXPORT_SYMBOL(ath10k_core_start); 2711 2712 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2713 { 2714 int ret; 2715 unsigned long time_left; 2716 2717 reinit_completion(&ar->target_suspend); 2718 2719 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2720 if (ret) { 2721 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2722 return ret; 2723 } 2724 2725 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2726 2727 if (!time_left) { 2728 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2729 return -ETIMEDOUT; 2730 } 2731 2732 return 0; 2733 } 2734 2735 void ath10k_core_stop(struct ath10k *ar) 2736 { 2737 lockdep_assert_held(&ar->conf_mutex); 2738 ath10k_debug_stop(ar); 2739 2740 /* try to suspend target */ 2741 if (ar->state != ATH10K_STATE_RESTARTING && 2742 ar->state != ATH10K_STATE_UTF) 2743 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2744 2745 ath10k_hif_stop(ar); 2746 ath10k_htt_tx_stop(&ar->htt); 2747 ath10k_htt_rx_free(&ar->htt); 2748 ath10k_wmi_detach(ar); 2749 } 2750 EXPORT_SYMBOL(ath10k_core_stop); 2751 2752 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2753 * order to know what hw capabilities should be advertised to mac80211 it is 2754 * necessary to load the firmware (and tear it down immediately since start 2755 * hook will try to init it again) before registering 2756 */ 2757 static int ath10k_core_probe_fw(struct ath10k *ar) 2758 { 2759 struct bmi_target_info target_info; 2760 int ret = 0; 2761 2762 ret = ath10k_hif_power_up(ar); 2763 if (ret) { 2764 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2765 return ret; 2766 } 2767 2768 switch (ar->hif.bus) { 2769 case ATH10K_BUS_SDIO: 2770 memset(&target_info, 0, sizeof(target_info)); 2771 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2772 if (ret) { 2773 ath10k_err(ar, "could not get target info (%d)\n", ret); 2774 goto err_power_down; 2775 } 2776 ar->target_version = target_info.version; 2777 ar->hw->wiphy->hw_version = target_info.version; 2778 break; 2779 case ATH10K_BUS_PCI: 2780 case ATH10K_BUS_AHB: 2781 case ATH10K_BUS_USB: 2782 memset(&target_info, 0, sizeof(target_info)); 2783 ret = ath10k_bmi_get_target_info(ar, &target_info); 2784 if (ret) { 2785 ath10k_err(ar, "could not get target info (%d)\n", ret); 2786 goto err_power_down; 2787 } 2788 ar->target_version = target_info.version; 2789 ar->hw->wiphy->hw_version = target_info.version; 2790 break; 2791 case ATH10K_BUS_SNOC: 2792 memset(&target_info, 0, sizeof(target_info)); 2793 ret = ath10k_hif_get_target_info(ar, &target_info); 2794 if (ret) { 2795 ath10k_err(ar, "could not get target info (%d)\n", ret); 2796 goto err_power_down; 2797 } 2798 ar->target_version = target_info.version; 2799 ar->hw->wiphy->hw_version = target_info.version; 2800 break; 2801 default: 2802 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2803 } 2804 2805 ret = ath10k_init_hw_params(ar); 2806 if (ret) { 2807 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2808 goto err_power_down; 2809 } 2810 2811 ret = ath10k_core_fetch_firmware_files(ar); 2812 if (ret) { 2813 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2814 goto err_power_down; 2815 } 2816 2817 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2818 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2819 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2820 sizeof(ar->hw->wiphy->fw_version)); 2821 2822 ath10k_debug_print_hwfw_info(ar); 2823 2824 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2825 ar->normal_mode_fw.fw_file.fw_features)) { 2826 ret = ath10k_core_pre_cal_download(ar); 2827 if (ret) { 2828 /* pre calibration data download is not necessary 2829 * for all the chipsets. Ignore failures and continue. 2830 */ 2831 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2832 "could not load pre cal data: %d\n", ret); 2833 } 2834 2835 ret = ath10k_core_get_board_id_from_otp(ar); 2836 if (ret && ret != -EOPNOTSUPP) { 2837 ath10k_err(ar, "failed to get board id from otp: %d\n", 2838 ret); 2839 goto err_free_firmware_files; 2840 } 2841 2842 ret = ath10k_core_check_smbios(ar); 2843 if (ret) 2844 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2845 2846 ret = ath10k_core_check_dt(ar); 2847 if (ret) 2848 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2849 2850 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2851 if (ret) { 2852 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2853 goto err_free_firmware_files; 2854 } 2855 2856 ath10k_debug_print_board_info(ar); 2857 } 2858 2859 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2860 2861 ret = ath10k_core_init_firmware_features(ar); 2862 if (ret) { 2863 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2864 ret); 2865 goto err_free_firmware_files; 2866 } 2867 2868 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2869 ar->normal_mode_fw.fw_file.fw_features)) { 2870 ret = ath10k_swap_code_seg_init(ar, 2871 &ar->normal_mode_fw.fw_file); 2872 if (ret) { 2873 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2874 ret); 2875 goto err_free_firmware_files; 2876 } 2877 } 2878 2879 mutex_lock(&ar->conf_mutex); 2880 2881 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2882 &ar->normal_mode_fw); 2883 if (ret) { 2884 ath10k_err(ar, "could not init core (%d)\n", ret); 2885 goto err_unlock; 2886 } 2887 2888 ath10k_debug_print_boot_info(ar); 2889 ath10k_core_stop(ar); 2890 2891 mutex_unlock(&ar->conf_mutex); 2892 2893 ath10k_hif_power_down(ar); 2894 return 0; 2895 2896 err_unlock: 2897 mutex_unlock(&ar->conf_mutex); 2898 2899 err_free_firmware_files: 2900 ath10k_core_free_firmware_files(ar); 2901 2902 err_power_down: 2903 ath10k_hif_power_down(ar); 2904 2905 return ret; 2906 } 2907 2908 static void ath10k_core_register_work(struct work_struct *work) 2909 { 2910 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2911 int status; 2912 2913 /* peer stats are enabled by default */ 2914 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2915 2916 status = ath10k_core_probe_fw(ar); 2917 if (status) { 2918 ath10k_err(ar, "could not probe fw (%d)\n", status); 2919 goto err; 2920 } 2921 2922 status = ath10k_mac_register(ar); 2923 if (status) { 2924 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2925 goto err_release_fw; 2926 } 2927 2928 status = ath10k_coredump_register(ar); 2929 if (status) { 2930 ath10k_err(ar, "unable to register coredump\n"); 2931 goto err_unregister_mac; 2932 } 2933 2934 status = ath10k_debug_register(ar); 2935 if (status) { 2936 ath10k_err(ar, "unable to initialize debugfs\n"); 2937 goto err_unregister_coredump; 2938 } 2939 2940 status = ath10k_spectral_create(ar); 2941 if (status) { 2942 ath10k_err(ar, "failed to initialize spectral\n"); 2943 goto err_debug_destroy; 2944 } 2945 2946 status = ath10k_thermal_register(ar); 2947 if (status) { 2948 ath10k_err(ar, "could not register thermal device: %d\n", 2949 status); 2950 goto err_spectral_destroy; 2951 } 2952 2953 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2954 return; 2955 2956 err_spectral_destroy: 2957 ath10k_spectral_destroy(ar); 2958 err_debug_destroy: 2959 ath10k_debug_destroy(ar); 2960 err_unregister_coredump: 2961 ath10k_coredump_unregister(ar); 2962 err_unregister_mac: 2963 ath10k_mac_unregister(ar); 2964 err_release_fw: 2965 ath10k_core_free_firmware_files(ar); 2966 err: 2967 /* TODO: It's probably a good idea to release device from the driver 2968 * but calling device_release_driver() here will cause a deadlock. 2969 */ 2970 return; 2971 } 2972 2973 int ath10k_core_register(struct ath10k *ar, 2974 const struct ath10k_bus_params *bus_params) 2975 { 2976 ar->chip_id = bus_params->chip_id; 2977 ar->dev_type = bus_params->dev_type; 2978 queue_work(ar->workqueue, &ar->register_work); 2979 2980 return 0; 2981 } 2982 EXPORT_SYMBOL(ath10k_core_register); 2983 2984 void ath10k_core_unregister(struct ath10k *ar) 2985 { 2986 cancel_work_sync(&ar->register_work); 2987 2988 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2989 return; 2990 2991 ath10k_thermal_unregister(ar); 2992 /* Stop spectral before unregistering from mac80211 to remove the 2993 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2994 * would be already be free'd recursively, leading to a double free. 2995 */ 2996 ath10k_spectral_destroy(ar); 2997 2998 /* We must unregister from mac80211 before we stop HTC and HIF. 2999 * Otherwise we will fail to submit commands to FW and mac80211 will be 3000 * unhappy about callback failures. 3001 */ 3002 ath10k_mac_unregister(ar); 3003 3004 ath10k_testmode_destroy(ar); 3005 3006 ath10k_core_free_firmware_files(ar); 3007 ath10k_core_free_board_files(ar); 3008 3009 ath10k_debug_unregister(ar); 3010 } 3011 EXPORT_SYMBOL(ath10k_core_unregister); 3012 3013 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3014 enum ath10k_bus bus, 3015 enum ath10k_hw_rev hw_rev, 3016 const struct ath10k_hif_ops *hif_ops) 3017 { 3018 struct ath10k *ar; 3019 int ret; 3020 3021 ar = ath10k_mac_create(priv_size); 3022 if (!ar) 3023 return NULL; 3024 3025 ar->ath_common.priv = ar; 3026 ar->ath_common.hw = ar->hw; 3027 ar->dev = dev; 3028 ar->hw_rev = hw_rev; 3029 ar->hif.ops = hif_ops; 3030 ar->hif.bus = bus; 3031 3032 switch (hw_rev) { 3033 case ATH10K_HW_QCA988X: 3034 case ATH10K_HW_QCA9887: 3035 ar->regs = &qca988x_regs; 3036 ar->hw_ce_regs = &qcax_ce_regs; 3037 ar->hw_values = &qca988x_values; 3038 break; 3039 case ATH10K_HW_QCA6174: 3040 case ATH10K_HW_QCA9377: 3041 ar->regs = &qca6174_regs; 3042 ar->hw_ce_regs = &qcax_ce_regs; 3043 ar->hw_values = &qca6174_values; 3044 break; 3045 case ATH10K_HW_QCA99X0: 3046 case ATH10K_HW_QCA9984: 3047 ar->regs = &qca99x0_regs; 3048 ar->hw_ce_regs = &qcax_ce_regs; 3049 ar->hw_values = &qca99x0_values; 3050 break; 3051 case ATH10K_HW_QCA9888: 3052 ar->regs = &qca99x0_regs; 3053 ar->hw_ce_regs = &qcax_ce_regs; 3054 ar->hw_values = &qca9888_values; 3055 break; 3056 case ATH10K_HW_QCA4019: 3057 ar->regs = &qca4019_regs; 3058 ar->hw_ce_regs = &qcax_ce_regs; 3059 ar->hw_values = &qca4019_values; 3060 break; 3061 case ATH10K_HW_WCN3990: 3062 ar->regs = &wcn3990_regs; 3063 ar->hw_ce_regs = &wcn3990_ce_regs; 3064 ar->hw_values = &wcn3990_values; 3065 break; 3066 default: 3067 ath10k_err(ar, "unsupported core hardware revision %d\n", 3068 hw_rev); 3069 ret = -ENOTSUPP; 3070 goto err_free_mac; 3071 } 3072 3073 init_completion(&ar->scan.started); 3074 init_completion(&ar->scan.completed); 3075 init_completion(&ar->scan.on_channel); 3076 init_completion(&ar->target_suspend); 3077 init_completion(&ar->wow.wakeup_completed); 3078 3079 init_completion(&ar->install_key_done); 3080 init_completion(&ar->vdev_setup_done); 3081 init_completion(&ar->thermal.wmi_sync); 3082 init_completion(&ar->bss_survey_done); 3083 3084 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3085 3086 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3087 if (!ar->workqueue) 3088 goto err_free_mac; 3089 3090 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3091 if (!ar->workqueue_aux) 3092 goto err_free_wq; 3093 3094 mutex_init(&ar->conf_mutex); 3095 spin_lock_init(&ar->data_lock); 3096 spin_lock_init(&ar->txqs_lock); 3097 3098 INIT_LIST_HEAD(&ar->txqs); 3099 INIT_LIST_HEAD(&ar->peers); 3100 init_waitqueue_head(&ar->peer_mapping_wq); 3101 init_waitqueue_head(&ar->htt.empty_tx_wq); 3102 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3103 3104 init_completion(&ar->offchan_tx_completed); 3105 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3106 skb_queue_head_init(&ar->offchan_tx_queue); 3107 3108 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3109 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3110 3111 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3112 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3113 INIT_WORK(&ar->set_coverage_class_work, 3114 ath10k_core_set_coverage_class_work); 3115 3116 init_dummy_netdev(&ar->napi_dev); 3117 3118 ret = ath10k_coredump_create(ar); 3119 if (ret) 3120 goto err_free_aux_wq; 3121 3122 ret = ath10k_debug_create(ar); 3123 if (ret) 3124 goto err_free_coredump; 3125 3126 return ar; 3127 3128 err_free_coredump: 3129 ath10k_coredump_destroy(ar); 3130 3131 err_free_aux_wq: 3132 destroy_workqueue(ar->workqueue_aux); 3133 err_free_wq: 3134 destroy_workqueue(ar->workqueue); 3135 3136 err_free_mac: 3137 ath10k_mac_destroy(ar); 3138 3139 return NULL; 3140 } 3141 EXPORT_SYMBOL(ath10k_core_create); 3142 3143 void ath10k_core_destroy(struct ath10k *ar) 3144 { 3145 flush_workqueue(ar->workqueue); 3146 destroy_workqueue(ar->workqueue); 3147 3148 flush_workqueue(ar->workqueue_aux); 3149 destroy_workqueue(ar->workqueue_aux); 3150 3151 ath10k_debug_destroy(ar); 3152 ath10k_coredump_destroy(ar); 3153 ath10k_htt_tx_destroy(&ar->htt); 3154 ath10k_wmi_free_host_mem(ar); 3155 ath10k_mac_destroy(ar); 3156 } 3157 EXPORT_SYMBOL(ath10k_core_destroy); 3158 3159 MODULE_AUTHOR("Qualcomm Atheros"); 3160 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3161 MODULE_LICENSE("Dual BSD/GPL"); 3162