1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 22 #include "core.h" 23 #include "mac.h" 24 #include "htc.h" 25 #include "hif.h" 26 #include "wmi.h" 27 #include "bmi.h" 28 #include "debug.h" 29 #include "htt.h" 30 #include "testmode.h" 31 #include "wmi-ops.h" 32 33 unsigned int ath10k_debug_mask; 34 static unsigned int ath10k_cryptmode_param; 35 static bool uart_print; 36 static bool skip_otp; 37 static bool rawmode; 38 39 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 40 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 41 module_param(uart_print, bool, 0644); 42 module_param(skip_otp, bool, 0644); 43 module_param(rawmode, bool, 0644); 44 45 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 46 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 47 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 48 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 49 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 50 51 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 52 { 53 .id = QCA988X_HW_2_0_VERSION, 54 .dev_id = QCA988X_2_0_DEVICE_ID, 55 .name = "qca988x hw2.0", 56 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 57 .uart_pin = 7, 58 .has_shifted_cc_wraparound = true, 59 .otp_exe_param = 0, 60 .channel_counters_freq_hz = 88000, 61 .max_probe_resp_desc_thres = 0, 62 .fw = { 63 .dir = QCA988X_HW_2_0_FW_DIR, 64 .fw = QCA988X_HW_2_0_FW_FILE, 65 .otp = QCA988X_HW_2_0_OTP_FILE, 66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 67 .board_size = QCA988X_BOARD_DATA_SZ, 68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 69 }, 70 }, 71 { 72 .id = QCA6174_HW_2_1_VERSION, 73 .dev_id = QCA6164_2_1_DEVICE_ID, 74 .name = "qca6164 hw2.1", 75 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 76 .uart_pin = 6, 77 .otp_exe_param = 0, 78 .channel_counters_freq_hz = 88000, 79 .max_probe_resp_desc_thres = 0, 80 .fw = { 81 .dir = QCA6174_HW_2_1_FW_DIR, 82 .fw = QCA6174_HW_2_1_FW_FILE, 83 .otp = QCA6174_HW_2_1_OTP_FILE, 84 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 85 .board_size = QCA6174_BOARD_DATA_SZ, 86 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 87 }, 88 }, 89 { 90 .id = QCA6174_HW_2_1_VERSION, 91 .dev_id = QCA6174_2_1_DEVICE_ID, 92 .name = "qca6174 hw2.1", 93 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 94 .uart_pin = 6, 95 .otp_exe_param = 0, 96 .channel_counters_freq_hz = 88000, 97 .max_probe_resp_desc_thres = 0, 98 .fw = { 99 .dir = QCA6174_HW_2_1_FW_DIR, 100 .fw = QCA6174_HW_2_1_FW_FILE, 101 .otp = QCA6174_HW_2_1_OTP_FILE, 102 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 103 .board_size = QCA6174_BOARD_DATA_SZ, 104 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 105 }, 106 }, 107 { 108 .id = QCA6174_HW_3_0_VERSION, 109 .dev_id = QCA6174_2_1_DEVICE_ID, 110 .name = "qca6174 hw3.0", 111 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 112 .uart_pin = 6, 113 .otp_exe_param = 0, 114 .channel_counters_freq_hz = 88000, 115 .max_probe_resp_desc_thres = 0, 116 .fw = { 117 .dir = QCA6174_HW_3_0_FW_DIR, 118 .fw = QCA6174_HW_3_0_FW_FILE, 119 .otp = QCA6174_HW_3_0_OTP_FILE, 120 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 121 .board_size = QCA6174_BOARD_DATA_SZ, 122 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 123 }, 124 }, 125 { 126 .id = QCA6174_HW_3_2_VERSION, 127 .dev_id = QCA6174_2_1_DEVICE_ID, 128 .name = "qca6174 hw3.2", 129 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 130 .uart_pin = 6, 131 .otp_exe_param = 0, 132 .channel_counters_freq_hz = 88000, 133 .max_probe_resp_desc_thres = 0, 134 .fw = { 135 /* uses same binaries as hw3.0 */ 136 .dir = QCA6174_HW_3_0_FW_DIR, 137 .fw = QCA6174_HW_3_0_FW_FILE, 138 .otp = QCA6174_HW_3_0_OTP_FILE, 139 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 140 .board_size = QCA6174_BOARD_DATA_SZ, 141 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 142 }, 143 }, 144 { 145 .id = QCA99X0_HW_2_0_DEV_VERSION, 146 .dev_id = QCA99X0_2_0_DEVICE_ID, 147 .name = "qca99x0 hw2.0", 148 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 149 .uart_pin = 7, 150 .otp_exe_param = 0x00000700, 151 .continuous_frag_desc = true, 152 .channel_counters_freq_hz = 150000, 153 .max_probe_resp_desc_thres = 24, 154 .fw = { 155 .dir = QCA99X0_HW_2_0_FW_DIR, 156 .fw = QCA99X0_HW_2_0_FW_FILE, 157 .otp = QCA99X0_HW_2_0_OTP_FILE, 158 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 159 .board_size = QCA99X0_BOARD_DATA_SZ, 160 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 161 }, 162 }, 163 { 164 .id = QCA9377_HW_1_0_DEV_VERSION, 165 .dev_id = QCA9377_1_0_DEVICE_ID, 166 .name = "qca9377 hw1.0", 167 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 168 .uart_pin = 6, 169 .otp_exe_param = 0, 170 .channel_counters_freq_hz = 88000, 171 .max_probe_resp_desc_thres = 0, 172 .fw = { 173 .dir = QCA9377_HW_1_0_FW_DIR, 174 .fw = QCA9377_HW_1_0_FW_FILE, 175 .otp = QCA9377_HW_1_0_OTP_FILE, 176 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 177 .board_size = QCA9377_BOARD_DATA_SZ, 178 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 179 }, 180 }, 181 { 182 .id = QCA9377_HW_1_1_DEV_VERSION, 183 .dev_id = QCA9377_1_0_DEVICE_ID, 184 .name = "qca9377 hw1.1", 185 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 186 .uart_pin = 6, 187 .otp_exe_param = 0, 188 .channel_counters_freq_hz = 88000, 189 .max_probe_resp_desc_thres = 0, 190 .fw = { 191 .dir = QCA9377_HW_1_0_FW_DIR, 192 .fw = QCA9377_HW_1_0_FW_FILE, 193 .otp = QCA9377_HW_1_0_OTP_FILE, 194 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 195 .board_size = QCA9377_BOARD_DATA_SZ, 196 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 197 }, 198 }, 199 }; 200 201 static const char *const ath10k_core_fw_feature_str[] = { 202 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 203 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 204 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 205 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 206 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 207 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 208 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 209 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 210 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 211 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 212 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 213 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 214 }; 215 216 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 217 size_t buf_len, 218 enum ath10k_fw_features feat) 219 { 220 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 221 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 222 ATH10K_FW_FEATURE_COUNT); 223 224 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 225 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 226 return scnprintf(buf, buf_len, "bit%d", feat); 227 } 228 229 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 230 } 231 232 void ath10k_core_get_fw_features_str(struct ath10k *ar, 233 char *buf, 234 size_t buf_len) 235 { 236 unsigned int len = 0; 237 int i; 238 239 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 240 if (test_bit(i, ar->fw_features)) { 241 if (len > 0) 242 len += scnprintf(buf + len, buf_len - len, ","); 243 244 len += ath10k_core_get_fw_feature_str(buf + len, 245 buf_len - len, 246 i); 247 } 248 } 249 } 250 251 static void ath10k_send_suspend_complete(struct ath10k *ar) 252 { 253 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 254 255 complete(&ar->target_suspend); 256 } 257 258 static int ath10k_init_configure_target(struct ath10k *ar) 259 { 260 u32 param_host; 261 int ret; 262 263 /* tell target which HTC version it is used*/ 264 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 265 HTC_PROTOCOL_VERSION); 266 if (ret) { 267 ath10k_err(ar, "settings HTC version failed\n"); 268 return ret; 269 } 270 271 /* set the firmware mode to STA/IBSS/AP */ 272 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 273 if (ret) { 274 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 275 return ret; 276 } 277 278 /* TODO following parameters need to be re-visited. */ 279 /* num_device */ 280 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 281 /* Firmware mode */ 282 /* FIXME: Why FW_MODE_AP ??.*/ 283 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 284 /* mac_addr_method */ 285 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 286 /* firmware_bridge */ 287 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 288 /* fwsubmode */ 289 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 290 291 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 292 if (ret) { 293 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 294 return ret; 295 } 296 297 /* We do all byte-swapping on the host */ 298 ret = ath10k_bmi_write32(ar, hi_be, 0); 299 if (ret) { 300 ath10k_err(ar, "setting host CPU BE mode failed\n"); 301 return ret; 302 } 303 304 /* FW descriptor/Data swap flags */ 305 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 306 307 if (ret) { 308 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 309 return ret; 310 } 311 312 /* Some devices have a special sanity check that verifies the PCI 313 * Device ID is written to this host interest var. It is known to be 314 * required to boot QCA6164. 315 */ 316 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 317 ar->dev_id); 318 if (ret) { 319 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 320 return ret; 321 } 322 323 return 0; 324 } 325 326 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 327 const char *dir, 328 const char *file) 329 { 330 char filename[100]; 331 const struct firmware *fw; 332 int ret; 333 334 if (file == NULL) 335 return ERR_PTR(-ENOENT); 336 337 if (dir == NULL) 338 dir = "."; 339 340 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 341 ret = request_firmware(&fw, filename, ar->dev); 342 if (ret) 343 return ERR_PTR(ret); 344 345 return fw; 346 } 347 348 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 349 size_t data_len) 350 { 351 u32 board_data_size = ar->hw_params.fw.board_size; 352 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 353 u32 board_ext_data_addr; 354 int ret; 355 356 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 357 if (ret) { 358 ath10k_err(ar, "could not read board ext data addr (%d)\n", 359 ret); 360 return ret; 361 } 362 363 ath10k_dbg(ar, ATH10K_DBG_BOOT, 364 "boot push board extended data addr 0x%x\n", 365 board_ext_data_addr); 366 367 if (board_ext_data_addr == 0) 368 return 0; 369 370 if (data_len != (board_data_size + board_ext_data_size)) { 371 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 372 data_len, board_data_size, board_ext_data_size); 373 return -EINVAL; 374 } 375 376 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 377 data + board_data_size, 378 board_ext_data_size); 379 if (ret) { 380 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 381 return ret; 382 } 383 384 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 385 (board_ext_data_size << 16) | 1); 386 if (ret) { 387 ath10k_err(ar, "could not write board ext data bit (%d)\n", 388 ret); 389 return ret; 390 } 391 392 return 0; 393 } 394 395 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 396 size_t data_len) 397 { 398 u32 board_data_size = ar->hw_params.fw.board_size; 399 u32 address; 400 int ret; 401 402 ret = ath10k_push_board_ext_data(ar, data, data_len); 403 if (ret) { 404 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 405 goto exit; 406 } 407 408 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 409 if (ret) { 410 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 411 goto exit; 412 } 413 414 ret = ath10k_bmi_write_memory(ar, address, data, 415 min_t(u32, board_data_size, 416 data_len)); 417 if (ret) { 418 ath10k_err(ar, "could not write board data (%d)\n", ret); 419 goto exit; 420 } 421 422 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 423 if (ret) { 424 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 425 goto exit; 426 } 427 428 exit: 429 return ret; 430 } 431 432 static int ath10k_download_cal_file(struct ath10k *ar) 433 { 434 int ret; 435 436 if (!ar->cal_file) 437 return -ENOENT; 438 439 if (IS_ERR(ar->cal_file)) 440 return PTR_ERR(ar->cal_file); 441 442 ret = ath10k_download_board_data(ar, ar->cal_file->data, 443 ar->cal_file->size); 444 if (ret) { 445 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 446 return ret; 447 } 448 449 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 450 451 return 0; 452 } 453 454 static int ath10k_download_cal_dt(struct ath10k *ar) 455 { 456 struct device_node *node; 457 int data_len; 458 void *data; 459 int ret; 460 461 node = ar->dev->of_node; 462 if (!node) 463 /* Device Tree is optional, don't print any warnings if 464 * there's no node for ath10k. 465 */ 466 return -ENOENT; 467 468 if (!of_get_property(node, "qcom,ath10k-calibration-data", 469 &data_len)) { 470 /* The calibration data node is optional */ 471 return -ENOENT; 472 } 473 474 if (data_len != QCA988X_CAL_DATA_LEN) { 475 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 476 data_len); 477 ret = -EMSGSIZE; 478 goto out; 479 } 480 481 data = kmalloc(data_len, GFP_KERNEL); 482 if (!data) { 483 ret = -ENOMEM; 484 goto out; 485 } 486 487 ret = of_property_read_u8_array(node, "qcom,ath10k-calibration-data", 488 data, data_len); 489 if (ret) { 490 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 491 ret); 492 goto out_free; 493 } 494 495 ret = ath10k_download_board_data(ar, data, data_len); 496 if (ret) { 497 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 498 ret); 499 goto out_free; 500 } 501 502 ret = 0; 503 504 out_free: 505 kfree(data); 506 507 out: 508 return ret; 509 } 510 511 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 512 { 513 u32 result, address; 514 u8 board_id, chip_id; 515 int ret; 516 517 address = ar->hw_params.patch_load_addr; 518 519 if (!ar->otp_data || !ar->otp_len) { 520 ath10k_warn(ar, 521 "failed to retrieve board id because of invalid otp\n"); 522 return -ENODATA; 523 } 524 525 ath10k_dbg(ar, ATH10K_DBG_BOOT, 526 "boot upload otp to 0x%x len %zd for board id\n", 527 address, ar->otp_len); 528 529 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 530 if (ret) { 531 ath10k_err(ar, "could not write otp for board id check: %d\n", 532 ret); 533 return ret; 534 } 535 536 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 537 &result); 538 if (ret) { 539 ath10k_err(ar, "could not execute otp for board id check: %d\n", 540 ret); 541 return ret; 542 } 543 544 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 545 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 546 547 ath10k_dbg(ar, ATH10K_DBG_BOOT, 548 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 549 result, board_id, chip_id); 550 551 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) 552 return -EOPNOTSUPP; 553 554 ar->id.bmi_ids_valid = true; 555 ar->id.bmi_board_id = board_id; 556 ar->id.bmi_chip_id = chip_id; 557 558 return 0; 559 } 560 561 static int ath10k_download_and_run_otp(struct ath10k *ar) 562 { 563 u32 result, address = ar->hw_params.patch_load_addr; 564 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 565 int ret; 566 567 ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len); 568 if (ret) { 569 ath10k_err(ar, "failed to download board data: %d\n", ret); 570 return ret; 571 } 572 573 /* OTP is optional */ 574 575 if (!ar->otp_data || !ar->otp_len) { 576 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 577 ar->otp_data, ar->otp_len); 578 return 0; 579 } 580 581 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 582 address, ar->otp_len); 583 584 ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len); 585 if (ret) { 586 ath10k_err(ar, "could not write otp (%d)\n", ret); 587 return ret; 588 } 589 590 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 591 if (ret) { 592 ath10k_err(ar, "could not execute otp (%d)\n", ret); 593 return ret; 594 } 595 596 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 597 598 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 599 ar->fw_features)) && 600 result != 0) { 601 ath10k_err(ar, "otp calibration failed: %d", result); 602 return -EINVAL; 603 } 604 605 return 0; 606 } 607 608 static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode) 609 { 610 u32 address, data_len; 611 const char *mode_name; 612 const void *data; 613 int ret; 614 615 address = ar->hw_params.patch_load_addr; 616 617 switch (mode) { 618 case ATH10K_FIRMWARE_MODE_NORMAL: 619 data = ar->firmware_data; 620 data_len = ar->firmware_len; 621 mode_name = "normal"; 622 ret = ath10k_swap_code_seg_configure(ar, 623 ATH10K_SWAP_CODE_SEG_BIN_TYPE_FW); 624 if (ret) { 625 ath10k_err(ar, "failed to configure fw code swap: %d\n", 626 ret); 627 return ret; 628 } 629 break; 630 case ATH10K_FIRMWARE_MODE_UTF: 631 data = ar->testmode.utf_firmware_data; 632 data_len = ar->testmode.utf_firmware_len; 633 mode_name = "utf"; 634 break; 635 default: 636 ath10k_err(ar, "unknown firmware mode: %d\n", mode); 637 return -EINVAL; 638 } 639 640 ath10k_dbg(ar, ATH10K_DBG_BOOT, 641 "boot uploading firmware image %p len %d mode %s\n", 642 data, data_len, mode_name); 643 644 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 645 if (ret) { 646 ath10k_err(ar, "failed to download %s firmware: %d\n", 647 mode_name, ret); 648 return ret; 649 } 650 651 return ret; 652 } 653 654 static void ath10k_core_free_board_files(struct ath10k *ar) 655 { 656 if (!IS_ERR(ar->board)) 657 release_firmware(ar->board); 658 659 ar->board = NULL; 660 ar->board_data = NULL; 661 ar->board_len = 0; 662 } 663 664 static void ath10k_core_free_firmware_files(struct ath10k *ar) 665 { 666 if (!IS_ERR(ar->otp)) 667 release_firmware(ar->otp); 668 669 if (!IS_ERR(ar->firmware)) 670 release_firmware(ar->firmware); 671 672 if (!IS_ERR(ar->cal_file)) 673 release_firmware(ar->cal_file); 674 675 ath10k_swap_code_seg_release(ar); 676 677 ar->otp = NULL; 678 ar->otp_data = NULL; 679 ar->otp_len = 0; 680 681 ar->firmware = NULL; 682 ar->firmware_data = NULL; 683 ar->firmware_len = 0; 684 685 ar->cal_file = NULL; 686 } 687 688 static int ath10k_fetch_cal_file(struct ath10k *ar) 689 { 690 char filename[100]; 691 692 /* cal-<bus>-<id>.bin */ 693 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 694 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 695 696 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 697 if (IS_ERR(ar->cal_file)) 698 /* calibration file is optional, don't print any warnings */ 699 return PTR_ERR(ar->cal_file); 700 701 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 702 ATH10K_FW_DIR, filename); 703 704 return 0; 705 } 706 707 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 708 { 709 if (!ar->hw_params.fw.board) { 710 ath10k_err(ar, "failed to find board file fw entry\n"); 711 return -EINVAL; 712 } 713 714 ar->board = ath10k_fetch_fw_file(ar, 715 ar->hw_params.fw.dir, 716 ar->hw_params.fw.board); 717 if (IS_ERR(ar->board)) 718 return PTR_ERR(ar->board); 719 720 ar->board_data = ar->board->data; 721 ar->board_len = ar->board->size; 722 723 return 0; 724 } 725 726 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 727 const void *buf, size_t buf_len, 728 const char *boardname) 729 { 730 const struct ath10k_fw_ie *hdr; 731 bool name_match_found; 732 int ret, board_ie_id; 733 size_t board_ie_len; 734 const void *board_ie_data; 735 736 name_match_found = false; 737 738 /* go through ATH10K_BD_IE_BOARD_ elements */ 739 while (buf_len > sizeof(struct ath10k_fw_ie)) { 740 hdr = buf; 741 board_ie_id = le32_to_cpu(hdr->id); 742 board_ie_len = le32_to_cpu(hdr->len); 743 board_ie_data = hdr->data; 744 745 buf_len -= sizeof(*hdr); 746 buf += sizeof(*hdr); 747 748 if (buf_len < ALIGN(board_ie_len, 4)) { 749 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 750 buf_len, ALIGN(board_ie_len, 4)); 751 ret = -EINVAL; 752 goto out; 753 } 754 755 switch (board_ie_id) { 756 case ATH10K_BD_IE_BOARD_NAME: 757 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 758 board_ie_data, board_ie_len); 759 760 if (board_ie_len != strlen(boardname)) 761 break; 762 763 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 764 if (ret) 765 break; 766 767 name_match_found = true; 768 ath10k_dbg(ar, ATH10K_DBG_BOOT, 769 "boot found match for name '%s'", 770 boardname); 771 break; 772 case ATH10K_BD_IE_BOARD_DATA: 773 if (!name_match_found) 774 /* no match found */ 775 break; 776 777 ath10k_dbg(ar, ATH10K_DBG_BOOT, 778 "boot found board data for '%s'", 779 boardname); 780 781 ar->board_data = board_ie_data; 782 ar->board_len = board_ie_len; 783 784 ret = 0; 785 goto out; 786 default: 787 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 788 board_ie_id); 789 break; 790 } 791 792 /* jump over the padding */ 793 board_ie_len = ALIGN(board_ie_len, 4); 794 795 buf_len -= board_ie_len; 796 buf += board_ie_len; 797 } 798 799 /* no match found */ 800 ret = -ENOENT; 801 802 out: 803 return ret; 804 } 805 806 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 807 const char *boardname, 808 const char *filename) 809 { 810 size_t len, magic_len, ie_len; 811 struct ath10k_fw_ie *hdr; 812 const u8 *data; 813 int ret, ie_id; 814 815 ar->board = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, filename); 816 if (IS_ERR(ar->board)) 817 return PTR_ERR(ar->board); 818 819 data = ar->board->data; 820 len = ar->board->size; 821 822 /* magic has extra null byte padded */ 823 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 824 if (len < magic_len) { 825 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 826 ar->hw_params.fw.dir, filename, len); 827 ret = -EINVAL; 828 goto err; 829 } 830 831 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 832 ath10k_err(ar, "found invalid board magic\n"); 833 ret = -EINVAL; 834 goto err; 835 } 836 837 /* magic is padded to 4 bytes */ 838 magic_len = ALIGN(magic_len, 4); 839 if (len < magic_len) { 840 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 841 ar->hw_params.fw.dir, filename, len); 842 ret = -EINVAL; 843 goto err; 844 } 845 846 data += magic_len; 847 len -= magic_len; 848 849 while (len > sizeof(struct ath10k_fw_ie)) { 850 hdr = (struct ath10k_fw_ie *)data; 851 ie_id = le32_to_cpu(hdr->id); 852 ie_len = le32_to_cpu(hdr->len); 853 854 len -= sizeof(*hdr); 855 data = hdr->data; 856 857 if (len < ALIGN(ie_len, 4)) { 858 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 859 ie_id, ie_len, len); 860 ret = -EINVAL; 861 goto err; 862 } 863 864 switch (ie_id) { 865 case ATH10K_BD_IE_BOARD: 866 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 867 boardname); 868 if (ret == -ENOENT) 869 /* no match found, continue */ 870 break; 871 else if (ret) 872 /* there was an error, bail out */ 873 goto err; 874 875 /* board data found */ 876 goto out; 877 } 878 879 /* jump over the padding */ 880 ie_len = ALIGN(ie_len, 4); 881 882 len -= ie_len; 883 data += ie_len; 884 } 885 886 out: 887 if (!ar->board_data || !ar->board_len) { 888 ath10k_err(ar, 889 "failed to fetch board data for %s from %s/%s\n", 890 ar->hw_params.fw.dir, boardname, filename); 891 ret = -ENODATA; 892 goto err; 893 } 894 895 return 0; 896 897 err: 898 ath10k_core_free_board_files(ar); 899 return ret; 900 } 901 902 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 903 size_t name_len) 904 { 905 if (ar->id.bmi_ids_valid) { 906 scnprintf(name, name_len, 907 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 908 ath10k_bus_str(ar->hif.bus), 909 ar->id.bmi_chip_id, 910 ar->id.bmi_board_id); 911 goto out; 912 } 913 914 scnprintf(name, name_len, 915 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 916 ath10k_bus_str(ar->hif.bus), 917 ar->id.vendor, ar->id.device, 918 ar->id.subsystem_vendor, ar->id.subsystem_device); 919 920 out: 921 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 922 923 return 0; 924 } 925 926 static int ath10k_core_fetch_board_file(struct ath10k *ar) 927 { 928 char boardname[100]; 929 int ret; 930 931 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 932 if (ret) { 933 ath10k_err(ar, "failed to create board name: %d", ret); 934 return ret; 935 } 936 937 ar->bd_api = 2; 938 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 939 ATH10K_BOARD_API2_FILE); 940 if (!ret) 941 goto success; 942 943 ar->bd_api = 1; 944 ret = ath10k_core_fetch_board_data_api_1(ar); 945 if (ret) { 946 ath10k_err(ar, "failed to fetch board data\n"); 947 return ret; 948 } 949 950 success: 951 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 952 return 0; 953 } 954 955 static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar) 956 { 957 int ret = 0; 958 959 if (ar->hw_params.fw.fw == NULL) { 960 ath10k_err(ar, "firmware file not defined\n"); 961 return -EINVAL; 962 } 963 964 ar->firmware = ath10k_fetch_fw_file(ar, 965 ar->hw_params.fw.dir, 966 ar->hw_params.fw.fw); 967 if (IS_ERR(ar->firmware)) { 968 ret = PTR_ERR(ar->firmware); 969 ath10k_err(ar, "could not fetch firmware (%d)\n", ret); 970 goto err; 971 } 972 973 ar->firmware_data = ar->firmware->data; 974 ar->firmware_len = ar->firmware->size; 975 976 /* OTP may be undefined. If so, don't fetch it at all */ 977 if (ar->hw_params.fw.otp == NULL) 978 return 0; 979 980 ar->otp = ath10k_fetch_fw_file(ar, 981 ar->hw_params.fw.dir, 982 ar->hw_params.fw.otp); 983 if (IS_ERR(ar->otp)) { 984 ret = PTR_ERR(ar->otp); 985 ath10k_err(ar, "could not fetch otp (%d)\n", ret); 986 goto err; 987 } 988 989 ar->otp_data = ar->otp->data; 990 ar->otp_len = ar->otp->size; 991 992 return 0; 993 994 err: 995 ath10k_core_free_firmware_files(ar); 996 return ret; 997 } 998 999 static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name) 1000 { 1001 size_t magic_len, len, ie_len; 1002 int ie_id, i, index, bit, ret; 1003 struct ath10k_fw_ie *hdr; 1004 const u8 *data; 1005 __le32 *timestamp, *version; 1006 1007 /* first fetch the firmware file (firmware-*.bin) */ 1008 ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name); 1009 if (IS_ERR(ar->firmware)) { 1010 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 1011 ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware)); 1012 return PTR_ERR(ar->firmware); 1013 } 1014 1015 data = ar->firmware->data; 1016 len = ar->firmware->size; 1017 1018 /* magic also includes the null byte, check that as well */ 1019 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1020 1021 if (len < magic_len) { 1022 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1023 ar->hw_params.fw.dir, name, len); 1024 ret = -EINVAL; 1025 goto err; 1026 } 1027 1028 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1029 ath10k_err(ar, "invalid firmware magic\n"); 1030 ret = -EINVAL; 1031 goto err; 1032 } 1033 1034 /* jump over the padding */ 1035 magic_len = ALIGN(magic_len, 4); 1036 1037 len -= magic_len; 1038 data += magic_len; 1039 1040 /* loop elements */ 1041 while (len > sizeof(struct ath10k_fw_ie)) { 1042 hdr = (struct ath10k_fw_ie *)data; 1043 1044 ie_id = le32_to_cpu(hdr->id); 1045 ie_len = le32_to_cpu(hdr->len); 1046 1047 len -= sizeof(*hdr); 1048 data += sizeof(*hdr); 1049 1050 if (len < ie_len) { 1051 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1052 ie_id, len, ie_len); 1053 ret = -EINVAL; 1054 goto err; 1055 } 1056 1057 switch (ie_id) { 1058 case ATH10K_FW_IE_FW_VERSION: 1059 if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1) 1060 break; 1061 1062 memcpy(ar->hw->wiphy->fw_version, data, ie_len); 1063 ar->hw->wiphy->fw_version[ie_len] = '\0'; 1064 1065 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1066 "found fw version %s\n", 1067 ar->hw->wiphy->fw_version); 1068 break; 1069 case ATH10K_FW_IE_TIMESTAMP: 1070 if (ie_len != sizeof(u32)) 1071 break; 1072 1073 timestamp = (__le32 *)data; 1074 1075 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1076 le32_to_cpup(timestamp)); 1077 break; 1078 case ATH10K_FW_IE_FEATURES: 1079 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1080 "found firmware features ie (%zd B)\n", 1081 ie_len); 1082 1083 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1084 index = i / 8; 1085 bit = i % 8; 1086 1087 if (index == ie_len) 1088 break; 1089 1090 if (data[index] & (1 << bit)) { 1091 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1092 "Enabling feature bit: %i\n", 1093 i); 1094 __set_bit(i, ar->fw_features); 1095 } 1096 } 1097 1098 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1099 ar->fw_features, 1100 sizeof(ar->fw_features)); 1101 break; 1102 case ATH10K_FW_IE_FW_IMAGE: 1103 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1104 "found fw image ie (%zd B)\n", 1105 ie_len); 1106 1107 ar->firmware_data = data; 1108 ar->firmware_len = ie_len; 1109 1110 break; 1111 case ATH10K_FW_IE_OTP_IMAGE: 1112 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1113 "found otp image ie (%zd B)\n", 1114 ie_len); 1115 1116 ar->otp_data = data; 1117 ar->otp_len = ie_len; 1118 1119 break; 1120 case ATH10K_FW_IE_WMI_OP_VERSION: 1121 if (ie_len != sizeof(u32)) 1122 break; 1123 1124 version = (__le32 *)data; 1125 1126 ar->wmi.op_version = le32_to_cpup(version); 1127 1128 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1129 ar->wmi.op_version); 1130 break; 1131 case ATH10K_FW_IE_HTT_OP_VERSION: 1132 if (ie_len != sizeof(u32)) 1133 break; 1134 1135 version = (__le32 *)data; 1136 1137 ar->htt.op_version = le32_to_cpup(version); 1138 1139 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1140 ar->htt.op_version); 1141 break; 1142 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1143 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1144 "found fw code swap image ie (%zd B)\n", 1145 ie_len); 1146 ar->swap.firmware_codeswap_data = data; 1147 ar->swap.firmware_codeswap_len = ie_len; 1148 break; 1149 default: 1150 ath10k_warn(ar, "Unknown FW IE: %u\n", 1151 le32_to_cpu(hdr->id)); 1152 break; 1153 } 1154 1155 /* jump over the padding */ 1156 ie_len = ALIGN(ie_len, 4); 1157 1158 len -= ie_len; 1159 data += ie_len; 1160 } 1161 1162 if (!ar->firmware_data || !ar->firmware_len) { 1163 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1164 ar->hw_params.fw.dir, name); 1165 ret = -ENOMEDIUM; 1166 goto err; 1167 } 1168 1169 return 0; 1170 1171 err: 1172 ath10k_core_free_firmware_files(ar); 1173 return ret; 1174 } 1175 1176 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1177 { 1178 int ret; 1179 1180 /* calibration file is optional, don't check for any errors */ 1181 ath10k_fetch_cal_file(ar); 1182 1183 ar->fw_api = 5; 1184 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1185 1186 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE); 1187 if (ret == 0) 1188 goto success; 1189 1190 ar->fw_api = 4; 1191 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1192 1193 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE); 1194 if (ret == 0) 1195 goto success; 1196 1197 ar->fw_api = 3; 1198 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1199 1200 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE); 1201 if (ret == 0) 1202 goto success; 1203 1204 ar->fw_api = 2; 1205 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1206 1207 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE); 1208 if (ret == 0) 1209 goto success; 1210 1211 ar->fw_api = 1; 1212 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1213 1214 ret = ath10k_core_fetch_firmware_api_1(ar); 1215 if (ret) 1216 return ret; 1217 1218 success: 1219 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1220 1221 return 0; 1222 } 1223 1224 static int ath10k_download_cal_data(struct ath10k *ar) 1225 { 1226 int ret; 1227 1228 ret = ath10k_download_cal_file(ar); 1229 if (ret == 0) { 1230 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1231 goto done; 1232 } 1233 1234 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1235 "boot did not find a calibration file, try DT next: %d\n", 1236 ret); 1237 1238 ret = ath10k_download_cal_dt(ar); 1239 if (ret == 0) { 1240 ar->cal_mode = ATH10K_CAL_MODE_DT; 1241 goto done; 1242 } 1243 1244 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1245 "boot did not find DT entry, try OTP next: %d\n", 1246 ret); 1247 1248 ret = ath10k_download_and_run_otp(ar); 1249 if (ret) { 1250 ath10k_err(ar, "failed to run otp: %d\n", ret); 1251 return ret; 1252 } 1253 1254 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1255 1256 done: 1257 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1258 ath10k_cal_mode_str(ar->cal_mode)); 1259 return 0; 1260 } 1261 1262 static int ath10k_init_uart(struct ath10k *ar) 1263 { 1264 int ret; 1265 1266 /* 1267 * Explicitly setting UART prints to zero as target turns it on 1268 * based on scratch registers. 1269 */ 1270 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1271 if (ret) { 1272 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1273 return ret; 1274 } 1275 1276 if (!uart_print) 1277 return 0; 1278 1279 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1280 if (ret) { 1281 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1282 return ret; 1283 } 1284 1285 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1286 if (ret) { 1287 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1288 return ret; 1289 } 1290 1291 /* Set the UART baud rate to 19200. */ 1292 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1293 if (ret) { 1294 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1295 return ret; 1296 } 1297 1298 ath10k_info(ar, "UART prints enabled\n"); 1299 return 0; 1300 } 1301 1302 static int ath10k_init_hw_params(struct ath10k *ar) 1303 { 1304 const struct ath10k_hw_params *uninitialized_var(hw_params); 1305 int i; 1306 1307 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1308 hw_params = &ath10k_hw_params_list[i]; 1309 1310 if (hw_params->id == ar->target_version && 1311 hw_params->dev_id == ar->dev_id) 1312 break; 1313 } 1314 1315 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1316 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1317 ar->target_version); 1318 return -EINVAL; 1319 } 1320 1321 ar->hw_params = *hw_params; 1322 1323 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1324 ar->hw_params.name, ar->target_version); 1325 1326 return 0; 1327 } 1328 1329 static void ath10k_core_restart(struct work_struct *work) 1330 { 1331 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1332 1333 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1334 1335 /* Place a barrier to make sure the compiler doesn't reorder 1336 * CRASH_FLUSH and calling other functions. 1337 */ 1338 barrier(); 1339 1340 ieee80211_stop_queues(ar->hw); 1341 ath10k_drain_tx(ar); 1342 complete_all(&ar->scan.started); 1343 complete_all(&ar->scan.completed); 1344 complete_all(&ar->scan.on_channel); 1345 complete_all(&ar->offchan_tx_completed); 1346 complete_all(&ar->install_key_done); 1347 complete_all(&ar->vdev_setup_done); 1348 complete_all(&ar->thermal.wmi_sync); 1349 wake_up(&ar->htt.empty_tx_wq); 1350 wake_up(&ar->wmi.tx_credits_wq); 1351 wake_up(&ar->peer_mapping_wq); 1352 1353 mutex_lock(&ar->conf_mutex); 1354 1355 switch (ar->state) { 1356 case ATH10K_STATE_ON: 1357 ar->state = ATH10K_STATE_RESTARTING; 1358 ath10k_hif_stop(ar); 1359 ath10k_scan_finish(ar); 1360 ieee80211_restart_hw(ar->hw); 1361 break; 1362 case ATH10K_STATE_OFF: 1363 /* this can happen if driver is being unloaded 1364 * or if the crash happens during FW probing */ 1365 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1366 break; 1367 case ATH10K_STATE_RESTARTING: 1368 /* hw restart might be requested from multiple places */ 1369 break; 1370 case ATH10K_STATE_RESTARTED: 1371 ar->state = ATH10K_STATE_WEDGED; 1372 /* fall through */ 1373 case ATH10K_STATE_WEDGED: 1374 ath10k_warn(ar, "device is wedged, will not restart\n"); 1375 break; 1376 case ATH10K_STATE_UTF: 1377 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1378 break; 1379 } 1380 1381 mutex_unlock(&ar->conf_mutex); 1382 } 1383 1384 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1385 { 1386 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) && 1387 !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1388 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1389 return -EINVAL; 1390 } 1391 1392 if (ar->wmi.op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1393 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1394 ATH10K_FW_WMI_OP_VERSION_MAX, ar->wmi.op_version); 1395 return -EINVAL; 1396 } 1397 1398 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1399 switch (ath10k_cryptmode_param) { 1400 case ATH10K_CRYPT_MODE_HW: 1401 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1402 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1403 break; 1404 case ATH10K_CRYPT_MODE_SW: 1405 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1406 ar->fw_features)) { 1407 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1408 return -EINVAL; 1409 } 1410 1411 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1412 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1413 break; 1414 default: 1415 ath10k_info(ar, "invalid cryptmode: %d\n", 1416 ath10k_cryptmode_param); 1417 return -EINVAL; 1418 } 1419 1420 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1421 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1422 1423 if (rawmode) { 1424 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1425 ar->fw_features)) { 1426 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1427 return -EINVAL; 1428 } 1429 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1430 } 1431 1432 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1433 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1434 1435 /* Workaround: 1436 * 1437 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1438 * and causes enormous performance issues (malformed frames, 1439 * etc). 1440 * 1441 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1442 * albeit a bit slower compared to regular operation. 1443 */ 1444 ar->htt.max_num_amsdu = 1; 1445 } 1446 1447 /* Backwards compatibility for firmwares without 1448 * ATH10K_FW_IE_WMI_OP_VERSION. 1449 */ 1450 if (ar->wmi.op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1451 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) { 1452 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1453 ar->fw_features)) 1454 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1455 else 1456 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1457 } else { 1458 ar->wmi.op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1459 } 1460 } 1461 1462 switch (ar->wmi.op_version) { 1463 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1464 ar->max_num_peers = TARGET_NUM_PEERS; 1465 ar->max_num_stations = TARGET_NUM_STATIONS; 1466 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1467 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1468 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1469 WMI_STAT_PEER; 1470 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1471 break; 1472 case ATH10K_FW_WMI_OP_VERSION_10_1: 1473 case ATH10K_FW_WMI_OP_VERSION_10_2: 1474 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1475 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1476 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1477 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1478 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1479 ar->fw_stats_req_mask = WMI_STAT_PEER; 1480 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1481 break; 1482 case ATH10K_FW_WMI_OP_VERSION_TLV: 1483 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1484 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1485 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1486 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1487 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1488 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1489 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1490 WMI_STAT_PEER; 1491 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1492 break; 1493 case ATH10K_FW_WMI_OP_VERSION_10_4: 1494 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1495 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1496 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1497 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1498 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1499 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1500 ar->fw_stats_req_mask = WMI_STAT_PEER; 1501 ar->max_spatial_stream = WMI_10_4_MAX_SPATIAL_STREAM; 1502 break; 1503 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1504 case ATH10K_FW_WMI_OP_VERSION_MAX: 1505 WARN_ON(1); 1506 return -EINVAL; 1507 } 1508 1509 /* Backwards compatibility for firmwares without 1510 * ATH10K_FW_IE_HTT_OP_VERSION. 1511 */ 1512 if (ar->htt.op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1513 switch (ar->wmi.op_version) { 1514 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1515 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1516 break; 1517 case ATH10K_FW_WMI_OP_VERSION_10_1: 1518 case ATH10K_FW_WMI_OP_VERSION_10_2: 1519 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1520 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1521 break; 1522 case ATH10K_FW_WMI_OP_VERSION_TLV: 1523 ar->htt.op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1524 break; 1525 case ATH10K_FW_WMI_OP_VERSION_10_4: 1526 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1527 case ATH10K_FW_WMI_OP_VERSION_MAX: 1528 WARN_ON(1); 1529 return -EINVAL; 1530 } 1531 } 1532 1533 return 0; 1534 } 1535 1536 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode) 1537 { 1538 int status; 1539 1540 lockdep_assert_held(&ar->conf_mutex); 1541 1542 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1543 1544 ath10k_bmi_start(ar); 1545 1546 if (ath10k_init_configure_target(ar)) { 1547 status = -EINVAL; 1548 goto err; 1549 } 1550 1551 status = ath10k_download_cal_data(ar); 1552 if (status) 1553 goto err; 1554 1555 /* Some of of qca988x solutions are having global reset issue 1556 * during target initialization. Bypassing PLL setting before 1557 * downloading firmware and letting the SoC run on REF_CLK is 1558 * fixing the problem. Corresponding firmware change is also needed 1559 * to set the clock source once the target is initialized. 1560 */ 1561 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1562 ar->fw_features)) { 1563 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1564 if (status) { 1565 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1566 status); 1567 goto err; 1568 } 1569 } 1570 1571 status = ath10k_download_fw(ar, mode); 1572 if (status) 1573 goto err; 1574 1575 status = ath10k_init_uart(ar); 1576 if (status) 1577 goto err; 1578 1579 ar->htc.htc_ops.target_send_suspend_complete = 1580 ath10k_send_suspend_complete; 1581 1582 status = ath10k_htc_init(ar); 1583 if (status) { 1584 ath10k_err(ar, "could not init HTC (%d)\n", status); 1585 goto err; 1586 } 1587 1588 status = ath10k_bmi_done(ar); 1589 if (status) 1590 goto err; 1591 1592 status = ath10k_wmi_attach(ar); 1593 if (status) { 1594 ath10k_err(ar, "WMI attach failed: %d\n", status); 1595 goto err; 1596 } 1597 1598 status = ath10k_htt_init(ar); 1599 if (status) { 1600 ath10k_err(ar, "failed to init htt: %d\n", status); 1601 goto err_wmi_detach; 1602 } 1603 1604 status = ath10k_htt_tx_alloc(&ar->htt); 1605 if (status) { 1606 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1607 goto err_wmi_detach; 1608 } 1609 1610 status = ath10k_htt_rx_alloc(&ar->htt); 1611 if (status) { 1612 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1613 goto err_htt_tx_detach; 1614 } 1615 1616 status = ath10k_hif_start(ar); 1617 if (status) { 1618 ath10k_err(ar, "could not start HIF: %d\n", status); 1619 goto err_htt_rx_detach; 1620 } 1621 1622 status = ath10k_htc_wait_target(&ar->htc); 1623 if (status) { 1624 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1625 goto err_hif_stop; 1626 } 1627 1628 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1629 status = ath10k_htt_connect(&ar->htt); 1630 if (status) { 1631 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1632 goto err_hif_stop; 1633 } 1634 } 1635 1636 status = ath10k_wmi_connect(ar); 1637 if (status) { 1638 ath10k_err(ar, "could not connect wmi: %d\n", status); 1639 goto err_hif_stop; 1640 } 1641 1642 status = ath10k_htc_start(&ar->htc); 1643 if (status) { 1644 ath10k_err(ar, "failed to start htc: %d\n", status); 1645 goto err_hif_stop; 1646 } 1647 1648 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1649 status = ath10k_wmi_wait_for_service_ready(ar); 1650 if (status) { 1651 ath10k_warn(ar, "wmi service ready event not received"); 1652 goto err_hif_stop; 1653 } 1654 } 1655 1656 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1657 ar->hw->wiphy->fw_version); 1658 1659 status = ath10k_wmi_cmd_init(ar); 1660 if (status) { 1661 ath10k_err(ar, "could not send WMI init command (%d)\n", 1662 status); 1663 goto err_hif_stop; 1664 } 1665 1666 status = ath10k_wmi_wait_for_unified_ready(ar); 1667 if (status) { 1668 ath10k_err(ar, "wmi unified ready event not received\n"); 1669 goto err_hif_stop; 1670 } 1671 1672 /* If firmware indicates Full Rx Reorder support it must be used in a 1673 * slightly different manner. Let HTT code know. 1674 */ 1675 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1676 ar->wmi.svc_map)); 1677 1678 status = ath10k_htt_rx_ring_refill(ar); 1679 if (status) { 1680 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1681 goto err_hif_stop; 1682 } 1683 1684 /* we don't care about HTT in UTF mode */ 1685 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1686 status = ath10k_htt_setup(&ar->htt); 1687 if (status) { 1688 ath10k_err(ar, "failed to setup htt: %d\n", status); 1689 goto err_hif_stop; 1690 } 1691 } 1692 1693 status = ath10k_debug_start(ar); 1694 if (status) 1695 goto err_hif_stop; 1696 1697 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 1698 1699 INIT_LIST_HEAD(&ar->arvifs); 1700 1701 return 0; 1702 1703 err_hif_stop: 1704 ath10k_hif_stop(ar); 1705 err_htt_rx_detach: 1706 ath10k_htt_rx_free(&ar->htt); 1707 err_htt_tx_detach: 1708 ath10k_htt_tx_free(&ar->htt); 1709 err_wmi_detach: 1710 ath10k_wmi_detach(ar); 1711 err: 1712 return status; 1713 } 1714 EXPORT_SYMBOL(ath10k_core_start); 1715 1716 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 1717 { 1718 int ret; 1719 unsigned long time_left; 1720 1721 reinit_completion(&ar->target_suspend); 1722 1723 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 1724 if (ret) { 1725 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 1726 return ret; 1727 } 1728 1729 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 1730 1731 if (!time_left) { 1732 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 1733 return -ETIMEDOUT; 1734 } 1735 1736 return 0; 1737 } 1738 1739 void ath10k_core_stop(struct ath10k *ar) 1740 { 1741 lockdep_assert_held(&ar->conf_mutex); 1742 ath10k_debug_stop(ar); 1743 1744 /* try to suspend target */ 1745 if (ar->state != ATH10K_STATE_RESTARTING && 1746 ar->state != ATH10K_STATE_UTF) 1747 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 1748 1749 ath10k_hif_stop(ar); 1750 ath10k_htt_tx_free(&ar->htt); 1751 ath10k_htt_rx_free(&ar->htt); 1752 ath10k_wmi_detach(ar); 1753 } 1754 EXPORT_SYMBOL(ath10k_core_stop); 1755 1756 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 1757 * order to know what hw capabilities should be advertised to mac80211 it is 1758 * necessary to load the firmware (and tear it down immediately since start 1759 * hook will try to init it again) before registering */ 1760 static int ath10k_core_probe_fw(struct ath10k *ar) 1761 { 1762 struct bmi_target_info target_info; 1763 int ret = 0; 1764 1765 ret = ath10k_hif_power_up(ar); 1766 if (ret) { 1767 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 1768 return ret; 1769 } 1770 1771 memset(&target_info, 0, sizeof(target_info)); 1772 ret = ath10k_bmi_get_target_info(ar, &target_info); 1773 if (ret) { 1774 ath10k_err(ar, "could not get target info (%d)\n", ret); 1775 goto err_power_down; 1776 } 1777 1778 ar->target_version = target_info.version; 1779 ar->hw->wiphy->hw_version = target_info.version; 1780 1781 ret = ath10k_init_hw_params(ar); 1782 if (ret) { 1783 ath10k_err(ar, "could not get hw params (%d)\n", ret); 1784 goto err_power_down; 1785 } 1786 1787 ret = ath10k_core_fetch_firmware_files(ar); 1788 if (ret) { 1789 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 1790 goto err_power_down; 1791 } 1792 1793 ret = ath10k_core_get_board_id_from_otp(ar); 1794 if (ret && ret != -EOPNOTSUPP) { 1795 ath10k_err(ar, "failed to get board id from otp for qca99x0: %d\n", 1796 ret); 1797 return ret; 1798 } 1799 1800 ret = ath10k_core_fetch_board_file(ar); 1801 if (ret) { 1802 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 1803 goto err_free_firmware_files; 1804 } 1805 1806 ret = ath10k_core_init_firmware_features(ar); 1807 if (ret) { 1808 ath10k_err(ar, "fatal problem with firmware features: %d\n", 1809 ret); 1810 goto err_free_firmware_files; 1811 } 1812 1813 ret = ath10k_swap_code_seg_init(ar); 1814 if (ret) { 1815 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 1816 ret); 1817 goto err_free_firmware_files; 1818 } 1819 1820 mutex_lock(&ar->conf_mutex); 1821 1822 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL); 1823 if (ret) { 1824 ath10k_err(ar, "could not init core (%d)\n", ret); 1825 goto err_unlock; 1826 } 1827 1828 ath10k_print_driver_info(ar); 1829 ath10k_core_stop(ar); 1830 1831 mutex_unlock(&ar->conf_mutex); 1832 1833 ath10k_hif_power_down(ar); 1834 return 0; 1835 1836 err_unlock: 1837 mutex_unlock(&ar->conf_mutex); 1838 1839 err_free_firmware_files: 1840 ath10k_core_free_firmware_files(ar); 1841 1842 err_power_down: 1843 ath10k_hif_power_down(ar); 1844 1845 return ret; 1846 } 1847 1848 static void ath10k_core_register_work(struct work_struct *work) 1849 { 1850 struct ath10k *ar = container_of(work, struct ath10k, register_work); 1851 int status; 1852 1853 status = ath10k_core_probe_fw(ar); 1854 if (status) { 1855 ath10k_err(ar, "could not probe fw (%d)\n", status); 1856 goto err; 1857 } 1858 1859 status = ath10k_mac_register(ar); 1860 if (status) { 1861 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 1862 goto err_release_fw; 1863 } 1864 1865 status = ath10k_debug_register(ar); 1866 if (status) { 1867 ath10k_err(ar, "unable to initialize debugfs\n"); 1868 goto err_unregister_mac; 1869 } 1870 1871 status = ath10k_spectral_create(ar); 1872 if (status) { 1873 ath10k_err(ar, "failed to initialize spectral\n"); 1874 goto err_debug_destroy; 1875 } 1876 1877 status = ath10k_thermal_register(ar); 1878 if (status) { 1879 ath10k_err(ar, "could not register thermal device: %d\n", 1880 status); 1881 goto err_spectral_destroy; 1882 } 1883 1884 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 1885 return; 1886 1887 err_spectral_destroy: 1888 ath10k_spectral_destroy(ar); 1889 err_debug_destroy: 1890 ath10k_debug_destroy(ar); 1891 err_unregister_mac: 1892 ath10k_mac_unregister(ar); 1893 err_release_fw: 1894 ath10k_core_free_firmware_files(ar); 1895 err: 1896 /* TODO: It's probably a good idea to release device from the driver 1897 * but calling device_release_driver() here will cause a deadlock. 1898 */ 1899 return; 1900 } 1901 1902 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 1903 { 1904 ar->chip_id = chip_id; 1905 queue_work(ar->workqueue, &ar->register_work); 1906 1907 return 0; 1908 } 1909 EXPORT_SYMBOL(ath10k_core_register); 1910 1911 void ath10k_core_unregister(struct ath10k *ar) 1912 { 1913 cancel_work_sync(&ar->register_work); 1914 1915 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 1916 return; 1917 1918 ath10k_thermal_unregister(ar); 1919 /* Stop spectral before unregistering from mac80211 to remove the 1920 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 1921 * would be already be free'd recursively, leading to a double free. 1922 */ 1923 ath10k_spectral_destroy(ar); 1924 1925 /* We must unregister from mac80211 before we stop HTC and HIF. 1926 * Otherwise we will fail to submit commands to FW and mac80211 will be 1927 * unhappy about callback failures. */ 1928 ath10k_mac_unregister(ar); 1929 1930 ath10k_testmode_destroy(ar); 1931 1932 ath10k_core_free_firmware_files(ar); 1933 ath10k_core_free_board_files(ar); 1934 1935 ath10k_debug_unregister(ar); 1936 } 1937 EXPORT_SYMBOL(ath10k_core_unregister); 1938 1939 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 1940 enum ath10k_bus bus, 1941 enum ath10k_hw_rev hw_rev, 1942 const struct ath10k_hif_ops *hif_ops) 1943 { 1944 struct ath10k *ar; 1945 int ret; 1946 1947 ar = ath10k_mac_create(priv_size); 1948 if (!ar) 1949 return NULL; 1950 1951 ar->ath_common.priv = ar; 1952 ar->ath_common.hw = ar->hw; 1953 ar->dev = dev; 1954 ar->hw_rev = hw_rev; 1955 ar->hif.ops = hif_ops; 1956 ar->hif.bus = bus; 1957 1958 switch (hw_rev) { 1959 case ATH10K_HW_QCA988X: 1960 ar->regs = &qca988x_regs; 1961 ar->hw_values = &qca988x_values; 1962 break; 1963 case ATH10K_HW_QCA6174: 1964 case ATH10K_HW_QCA9377: 1965 ar->regs = &qca6174_regs; 1966 ar->hw_values = &qca6174_values; 1967 break; 1968 case ATH10K_HW_QCA99X0: 1969 ar->regs = &qca99x0_regs; 1970 ar->hw_values = &qca99x0_values; 1971 break; 1972 default: 1973 ath10k_err(ar, "unsupported core hardware revision %d\n", 1974 hw_rev); 1975 ret = -ENOTSUPP; 1976 goto err_free_mac; 1977 } 1978 1979 init_completion(&ar->scan.started); 1980 init_completion(&ar->scan.completed); 1981 init_completion(&ar->scan.on_channel); 1982 init_completion(&ar->target_suspend); 1983 init_completion(&ar->wow.wakeup_completed); 1984 1985 init_completion(&ar->install_key_done); 1986 init_completion(&ar->vdev_setup_done); 1987 init_completion(&ar->thermal.wmi_sync); 1988 1989 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 1990 1991 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 1992 if (!ar->workqueue) 1993 goto err_free_mac; 1994 1995 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 1996 if (!ar->workqueue_aux) 1997 goto err_free_wq; 1998 1999 mutex_init(&ar->conf_mutex); 2000 spin_lock_init(&ar->data_lock); 2001 2002 INIT_LIST_HEAD(&ar->peers); 2003 init_waitqueue_head(&ar->peer_mapping_wq); 2004 init_waitqueue_head(&ar->htt.empty_tx_wq); 2005 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2006 2007 init_completion(&ar->offchan_tx_completed); 2008 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2009 skb_queue_head_init(&ar->offchan_tx_queue); 2010 2011 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2012 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2013 2014 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2015 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2016 2017 ret = ath10k_debug_create(ar); 2018 if (ret) 2019 goto err_free_aux_wq; 2020 2021 return ar; 2022 2023 err_free_aux_wq: 2024 destroy_workqueue(ar->workqueue_aux); 2025 err_free_wq: 2026 destroy_workqueue(ar->workqueue); 2027 2028 err_free_mac: 2029 ath10k_mac_destroy(ar); 2030 2031 return NULL; 2032 } 2033 EXPORT_SYMBOL(ath10k_core_create); 2034 2035 void ath10k_core_destroy(struct ath10k *ar) 2036 { 2037 flush_workqueue(ar->workqueue); 2038 destroy_workqueue(ar->workqueue); 2039 2040 flush_workqueue(ar->workqueue_aux); 2041 destroy_workqueue(ar->workqueue_aux); 2042 2043 ath10k_debug_destroy(ar); 2044 ath10k_wmi_free_host_mem(ar); 2045 ath10k_mac_destroy(ar); 2046 } 2047 EXPORT_SYMBOL(ath10k_core_destroy); 2048 2049 MODULE_AUTHOR("Qualcomm Atheros"); 2050 MODULE_DESCRIPTION("Core module for QCA988X PCIe devices."); 2051 MODULE_LICENSE("Dual BSD/GPL"); 2052