1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <asm/byteorder.h> 15 16 #include "core.h" 17 #include "mac.h" 18 #include "htc.h" 19 #include "hif.h" 20 #include "wmi.h" 21 #include "bmi.h" 22 #include "debug.h" 23 #include "htt.h" 24 #include "testmode.h" 25 #include "wmi-ops.h" 26 #include "coredump.h" 27 28 unsigned int ath10k_debug_mask; 29 EXPORT_SYMBOL(ath10k_debug_mask); 30 31 static unsigned int ath10k_cryptmode_param; 32 static bool uart_print; 33 static bool skip_otp; 34 static bool rawmode; 35 static bool fw_diag_log; 36 37 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 38 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 39 40 /* FIXME: most of these should be readonly */ 41 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 42 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 43 module_param(uart_print, bool, 0644); 44 module_param(skip_otp, bool, 0644); 45 module_param(rawmode, bool, 0644); 46 module_param(fw_diag_log, bool, 0644); 47 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 48 49 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 50 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 51 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 52 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 53 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 54 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 55 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 56 57 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 58 { 59 .id = QCA988X_HW_2_0_VERSION, 60 .dev_id = QCA988X_2_0_DEVICE_ID, 61 .bus = ATH10K_BUS_PCI, 62 .name = "qca988x hw2.0", 63 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 64 .uart_pin = 7, 65 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 66 .otp_exe_param = 0, 67 .channel_counters_freq_hz = 88000, 68 .max_probe_resp_desc_thres = 0, 69 .cal_data_len = 2116, 70 .fw = { 71 .dir = QCA988X_HW_2_0_FW_DIR, 72 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 73 .board_size = QCA988X_BOARD_DATA_SZ, 74 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 75 }, 76 .hw_ops = &qca988x_ops, 77 .decap_align_bytes = 4, 78 .spectral_bin_discard = 0, 79 .spectral_bin_offset = 0, 80 .vht160_mcs_rx_highest = 0, 81 .vht160_mcs_tx_highest = 0, 82 .n_cipher_suites = 8, 83 .ast_skid_limit = 0x10, 84 .num_wds_entries = 0x20, 85 .target_64bit = false, 86 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 87 .shadow_reg_support = false, 88 .rri_on_ddr = false, 89 .hw_filter_reset_required = true, 90 .fw_diag_ce_download = false, 91 .tx_stats_over_pktlog = true, 92 }, 93 { 94 .id = QCA988X_HW_2_0_VERSION, 95 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 96 .name = "qca988x hw2.0 ubiquiti", 97 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 98 .uart_pin = 7, 99 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 100 .otp_exe_param = 0, 101 .channel_counters_freq_hz = 88000, 102 .max_probe_resp_desc_thres = 0, 103 .cal_data_len = 2116, 104 .fw = { 105 .dir = QCA988X_HW_2_0_FW_DIR, 106 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 107 .board_size = QCA988X_BOARD_DATA_SZ, 108 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 109 }, 110 .hw_ops = &qca988x_ops, 111 .decap_align_bytes = 4, 112 .spectral_bin_discard = 0, 113 .spectral_bin_offset = 0, 114 .vht160_mcs_rx_highest = 0, 115 .vht160_mcs_tx_highest = 0, 116 .n_cipher_suites = 8, 117 .ast_skid_limit = 0x10, 118 .num_wds_entries = 0x20, 119 .target_64bit = false, 120 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 121 .per_ce_irq = false, 122 .shadow_reg_support = false, 123 .rri_on_ddr = false, 124 .hw_filter_reset_required = true, 125 .fw_diag_ce_download = false, 126 .tx_stats_over_pktlog = true, 127 }, 128 { 129 .id = QCA9887_HW_1_0_VERSION, 130 .dev_id = QCA9887_1_0_DEVICE_ID, 131 .bus = ATH10K_BUS_PCI, 132 .name = "qca9887 hw1.0", 133 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 134 .uart_pin = 7, 135 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 136 .otp_exe_param = 0, 137 .channel_counters_freq_hz = 88000, 138 .max_probe_resp_desc_thres = 0, 139 .cal_data_len = 2116, 140 .fw = { 141 .dir = QCA9887_HW_1_0_FW_DIR, 142 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 143 .board_size = QCA9887_BOARD_DATA_SZ, 144 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 145 }, 146 .hw_ops = &qca988x_ops, 147 .decap_align_bytes = 4, 148 .spectral_bin_discard = 0, 149 .spectral_bin_offset = 0, 150 .vht160_mcs_rx_highest = 0, 151 .vht160_mcs_tx_highest = 0, 152 .n_cipher_suites = 8, 153 .ast_skid_limit = 0x10, 154 .num_wds_entries = 0x20, 155 .target_64bit = false, 156 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 157 .per_ce_irq = false, 158 .shadow_reg_support = false, 159 .rri_on_ddr = false, 160 .hw_filter_reset_required = true, 161 .fw_diag_ce_download = false, 162 .tx_stats_over_pktlog = false, 163 }, 164 { 165 .id = QCA6174_HW_3_2_VERSION, 166 .dev_id = QCA6174_3_2_DEVICE_ID, 167 .bus = ATH10K_BUS_SDIO, 168 .name = "qca6174 hw3.2 sdio", 169 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 170 .uart_pin = 19, 171 .otp_exe_param = 0, 172 .channel_counters_freq_hz = 88000, 173 .max_probe_resp_desc_thres = 0, 174 .cal_data_len = 0, 175 .fw = { 176 .dir = QCA6174_HW_3_0_FW_DIR, 177 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 178 .board_size = QCA6174_BOARD_DATA_SZ, 179 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 180 }, 181 .hw_ops = &qca6174_sdio_ops, 182 .hw_clk = qca6174_clk, 183 .target_cpu_freq = 176000000, 184 .decap_align_bytes = 4, 185 .n_cipher_suites = 8, 186 .num_peers = 10, 187 .ast_skid_limit = 0x10, 188 .num_wds_entries = 0x20, 189 .uart_pin_workaround = true, 190 .tx_stats_over_pktlog = false, 191 }, 192 { 193 .id = QCA6174_HW_2_1_VERSION, 194 .dev_id = QCA6164_2_1_DEVICE_ID, 195 .bus = ATH10K_BUS_PCI, 196 .name = "qca6164 hw2.1", 197 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 198 .uart_pin = 6, 199 .otp_exe_param = 0, 200 .channel_counters_freq_hz = 88000, 201 .max_probe_resp_desc_thres = 0, 202 .cal_data_len = 8124, 203 .fw = { 204 .dir = QCA6174_HW_2_1_FW_DIR, 205 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 206 .board_size = QCA6174_BOARD_DATA_SZ, 207 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 208 }, 209 .hw_ops = &qca988x_ops, 210 .decap_align_bytes = 4, 211 .spectral_bin_discard = 0, 212 .spectral_bin_offset = 0, 213 .vht160_mcs_rx_highest = 0, 214 .vht160_mcs_tx_highest = 0, 215 .n_cipher_suites = 8, 216 .ast_skid_limit = 0x10, 217 .num_wds_entries = 0x20, 218 .target_64bit = false, 219 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 220 .per_ce_irq = false, 221 .shadow_reg_support = false, 222 .rri_on_ddr = false, 223 .hw_filter_reset_required = true, 224 .fw_diag_ce_download = false, 225 .tx_stats_over_pktlog = false, 226 }, 227 { 228 .id = QCA6174_HW_2_1_VERSION, 229 .dev_id = QCA6174_2_1_DEVICE_ID, 230 .bus = ATH10K_BUS_PCI, 231 .name = "qca6174 hw2.1", 232 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 233 .uart_pin = 6, 234 .otp_exe_param = 0, 235 .channel_counters_freq_hz = 88000, 236 .max_probe_resp_desc_thres = 0, 237 .cal_data_len = 8124, 238 .fw = { 239 .dir = QCA6174_HW_2_1_FW_DIR, 240 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 241 .board_size = QCA6174_BOARD_DATA_SZ, 242 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 243 }, 244 .hw_ops = &qca988x_ops, 245 .decap_align_bytes = 4, 246 .spectral_bin_discard = 0, 247 .spectral_bin_offset = 0, 248 .vht160_mcs_rx_highest = 0, 249 .vht160_mcs_tx_highest = 0, 250 .n_cipher_suites = 8, 251 .ast_skid_limit = 0x10, 252 .num_wds_entries = 0x20, 253 .target_64bit = false, 254 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 255 .per_ce_irq = false, 256 .shadow_reg_support = false, 257 .rri_on_ddr = false, 258 .hw_filter_reset_required = true, 259 .fw_diag_ce_download = false, 260 .tx_stats_over_pktlog = false, 261 }, 262 { 263 .id = QCA6174_HW_3_0_VERSION, 264 .dev_id = QCA6174_2_1_DEVICE_ID, 265 .bus = ATH10K_BUS_PCI, 266 .name = "qca6174 hw3.0", 267 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 268 .uart_pin = 6, 269 .otp_exe_param = 0, 270 .channel_counters_freq_hz = 88000, 271 .max_probe_resp_desc_thres = 0, 272 .cal_data_len = 8124, 273 .fw = { 274 .dir = QCA6174_HW_3_0_FW_DIR, 275 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 276 .board_size = QCA6174_BOARD_DATA_SZ, 277 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 278 }, 279 .hw_ops = &qca988x_ops, 280 .decap_align_bytes = 4, 281 .spectral_bin_discard = 0, 282 .spectral_bin_offset = 0, 283 .vht160_mcs_rx_highest = 0, 284 .vht160_mcs_tx_highest = 0, 285 .n_cipher_suites = 8, 286 .ast_skid_limit = 0x10, 287 .num_wds_entries = 0x20, 288 .target_64bit = false, 289 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 290 .per_ce_irq = false, 291 .shadow_reg_support = false, 292 .rri_on_ddr = false, 293 .hw_filter_reset_required = true, 294 .fw_diag_ce_download = false, 295 .tx_stats_over_pktlog = false, 296 }, 297 { 298 .id = QCA6174_HW_3_2_VERSION, 299 .dev_id = QCA6174_2_1_DEVICE_ID, 300 .bus = ATH10K_BUS_PCI, 301 .name = "qca6174 hw3.2", 302 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 303 .uart_pin = 6, 304 .otp_exe_param = 0, 305 .channel_counters_freq_hz = 88000, 306 .max_probe_resp_desc_thres = 0, 307 .cal_data_len = 8124, 308 .fw = { 309 /* uses same binaries as hw3.0 */ 310 .dir = QCA6174_HW_3_0_FW_DIR, 311 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 312 .board_size = QCA6174_BOARD_DATA_SZ, 313 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 314 }, 315 .hw_ops = &qca6174_ops, 316 .hw_clk = qca6174_clk, 317 .target_cpu_freq = 176000000, 318 .decap_align_bytes = 4, 319 .spectral_bin_discard = 0, 320 .spectral_bin_offset = 0, 321 .vht160_mcs_rx_highest = 0, 322 .vht160_mcs_tx_highest = 0, 323 .n_cipher_suites = 8, 324 .ast_skid_limit = 0x10, 325 .num_wds_entries = 0x20, 326 .target_64bit = false, 327 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 328 .per_ce_irq = false, 329 .shadow_reg_support = false, 330 .rri_on_ddr = false, 331 .hw_filter_reset_required = true, 332 .fw_diag_ce_download = true, 333 .tx_stats_over_pktlog = false, 334 }, 335 { 336 .id = QCA99X0_HW_2_0_DEV_VERSION, 337 .dev_id = QCA99X0_2_0_DEVICE_ID, 338 .bus = ATH10K_BUS_PCI, 339 .name = "qca99x0 hw2.0", 340 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 341 .uart_pin = 7, 342 .otp_exe_param = 0x00000700, 343 .continuous_frag_desc = true, 344 .cck_rate_map_rev2 = true, 345 .channel_counters_freq_hz = 150000, 346 .max_probe_resp_desc_thres = 24, 347 .tx_chain_mask = 0xf, 348 .rx_chain_mask = 0xf, 349 .max_spatial_stream = 4, 350 .cal_data_len = 12064, 351 .fw = { 352 .dir = QCA99X0_HW_2_0_FW_DIR, 353 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 354 .board_size = QCA99X0_BOARD_DATA_SZ, 355 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 356 }, 357 .sw_decrypt_mcast_mgmt = true, 358 .hw_ops = &qca99x0_ops, 359 .decap_align_bytes = 1, 360 .spectral_bin_discard = 4, 361 .spectral_bin_offset = 0, 362 .vht160_mcs_rx_highest = 0, 363 .vht160_mcs_tx_highest = 0, 364 .n_cipher_suites = 11, 365 .ast_skid_limit = 0x10, 366 .num_wds_entries = 0x20, 367 .target_64bit = false, 368 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 369 .per_ce_irq = false, 370 .shadow_reg_support = false, 371 .rri_on_ddr = false, 372 .hw_filter_reset_required = true, 373 .fw_diag_ce_download = false, 374 .tx_stats_over_pktlog = false, 375 }, 376 { 377 .id = QCA9984_HW_1_0_DEV_VERSION, 378 .dev_id = QCA9984_1_0_DEVICE_ID, 379 .bus = ATH10K_BUS_PCI, 380 .name = "qca9984/qca9994 hw1.0", 381 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 382 .uart_pin = 7, 383 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 384 .otp_exe_param = 0x00000700, 385 .continuous_frag_desc = true, 386 .cck_rate_map_rev2 = true, 387 .channel_counters_freq_hz = 150000, 388 .max_probe_resp_desc_thres = 24, 389 .tx_chain_mask = 0xf, 390 .rx_chain_mask = 0xf, 391 .max_spatial_stream = 4, 392 .cal_data_len = 12064, 393 .fw = { 394 .dir = QCA9984_HW_1_0_FW_DIR, 395 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 396 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 397 .board_size = QCA99X0_BOARD_DATA_SZ, 398 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 399 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 400 }, 401 .sw_decrypt_mcast_mgmt = true, 402 .hw_ops = &qca99x0_ops, 403 .decap_align_bytes = 1, 404 .spectral_bin_discard = 12, 405 .spectral_bin_offset = 8, 406 407 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 408 * or 2x2 160Mhz, long-guard-interval. 409 */ 410 .vht160_mcs_rx_highest = 1560, 411 .vht160_mcs_tx_highest = 1560, 412 .n_cipher_suites = 11, 413 .ast_skid_limit = 0x10, 414 .num_wds_entries = 0x20, 415 .target_64bit = false, 416 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 417 .per_ce_irq = false, 418 .shadow_reg_support = false, 419 .rri_on_ddr = false, 420 .hw_filter_reset_required = true, 421 .fw_diag_ce_download = false, 422 .tx_stats_over_pktlog = false, 423 }, 424 { 425 .id = QCA9888_HW_2_0_DEV_VERSION, 426 .dev_id = QCA9888_2_0_DEVICE_ID, 427 .bus = ATH10K_BUS_PCI, 428 .name = "qca9888 hw2.0", 429 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 430 .uart_pin = 7, 431 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 432 .otp_exe_param = 0x00000700, 433 .continuous_frag_desc = true, 434 .channel_counters_freq_hz = 150000, 435 .max_probe_resp_desc_thres = 24, 436 .tx_chain_mask = 3, 437 .rx_chain_mask = 3, 438 .max_spatial_stream = 2, 439 .cal_data_len = 12064, 440 .fw = { 441 .dir = QCA9888_HW_2_0_FW_DIR, 442 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 443 .board_size = QCA99X0_BOARD_DATA_SZ, 444 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 445 }, 446 .sw_decrypt_mcast_mgmt = true, 447 .hw_ops = &qca99x0_ops, 448 .decap_align_bytes = 1, 449 .spectral_bin_discard = 12, 450 .spectral_bin_offset = 8, 451 452 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 453 * 1x1 160Mhz, long-guard-interval. 454 */ 455 .vht160_mcs_rx_highest = 780, 456 .vht160_mcs_tx_highest = 780, 457 .n_cipher_suites = 11, 458 .ast_skid_limit = 0x10, 459 .num_wds_entries = 0x20, 460 .target_64bit = false, 461 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 462 .per_ce_irq = false, 463 .shadow_reg_support = false, 464 .rri_on_ddr = false, 465 .hw_filter_reset_required = true, 466 .fw_diag_ce_download = false, 467 .tx_stats_over_pktlog = false, 468 }, 469 { 470 .id = QCA9377_HW_1_0_DEV_VERSION, 471 .dev_id = QCA9377_1_0_DEVICE_ID, 472 .bus = ATH10K_BUS_PCI, 473 .name = "qca9377 hw1.0", 474 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 475 .uart_pin = 6, 476 .otp_exe_param = 0, 477 .channel_counters_freq_hz = 88000, 478 .max_probe_resp_desc_thres = 0, 479 .cal_data_len = 8124, 480 .fw = { 481 .dir = QCA9377_HW_1_0_FW_DIR, 482 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 483 .board_size = QCA9377_BOARD_DATA_SZ, 484 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 485 }, 486 .hw_ops = &qca988x_ops, 487 .decap_align_bytes = 4, 488 .spectral_bin_discard = 0, 489 .spectral_bin_offset = 0, 490 .vht160_mcs_rx_highest = 0, 491 .vht160_mcs_tx_highest = 0, 492 .n_cipher_suites = 8, 493 .ast_skid_limit = 0x10, 494 .num_wds_entries = 0x20, 495 .target_64bit = false, 496 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 497 .per_ce_irq = false, 498 .shadow_reg_support = false, 499 .rri_on_ddr = false, 500 .hw_filter_reset_required = true, 501 .fw_diag_ce_download = false, 502 .tx_stats_over_pktlog = false, 503 }, 504 { 505 .id = QCA9377_HW_1_1_DEV_VERSION, 506 .dev_id = QCA9377_1_0_DEVICE_ID, 507 .bus = ATH10K_BUS_PCI, 508 .name = "qca9377 hw1.1", 509 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 510 .uart_pin = 6, 511 .otp_exe_param = 0, 512 .channel_counters_freq_hz = 88000, 513 .max_probe_resp_desc_thres = 0, 514 .cal_data_len = 8124, 515 .fw = { 516 .dir = QCA9377_HW_1_0_FW_DIR, 517 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 518 .board_size = QCA9377_BOARD_DATA_SZ, 519 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 520 }, 521 .hw_ops = &qca6174_ops, 522 .hw_clk = qca6174_clk, 523 .target_cpu_freq = 176000000, 524 .decap_align_bytes = 4, 525 .spectral_bin_discard = 0, 526 .spectral_bin_offset = 0, 527 .vht160_mcs_rx_highest = 0, 528 .vht160_mcs_tx_highest = 0, 529 .n_cipher_suites = 8, 530 .ast_skid_limit = 0x10, 531 .num_wds_entries = 0x20, 532 .target_64bit = false, 533 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 534 .per_ce_irq = false, 535 .shadow_reg_support = false, 536 .rri_on_ddr = false, 537 .hw_filter_reset_required = true, 538 .fw_diag_ce_download = true, 539 .tx_stats_over_pktlog = false, 540 }, 541 { 542 .id = QCA4019_HW_1_0_DEV_VERSION, 543 .dev_id = 0, 544 .bus = ATH10K_BUS_AHB, 545 .name = "qca4019 hw1.0", 546 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 547 .uart_pin = 7, 548 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 549 .otp_exe_param = 0x0010000, 550 .continuous_frag_desc = true, 551 .cck_rate_map_rev2 = true, 552 .channel_counters_freq_hz = 125000, 553 .max_probe_resp_desc_thres = 24, 554 .tx_chain_mask = 0x3, 555 .rx_chain_mask = 0x3, 556 .max_spatial_stream = 2, 557 .cal_data_len = 12064, 558 .fw = { 559 .dir = QCA4019_HW_1_0_FW_DIR, 560 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 561 .board_size = QCA4019_BOARD_DATA_SZ, 562 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 563 }, 564 .sw_decrypt_mcast_mgmt = true, 565 .hw_ops = &qca99x0_ops, 566 .decap_align_bytes = 1, 567 .spectral_bin_discard = 4, 568 .spectral_bin_offset = 0, 569 .vht160_mcs_rx_highest = 0, 570 .vht160_mcs_tx_highest = 0, 571 .n_cipher_suites = 11, 572 .ast_skid_limit = 0x10, 573 .num_wds_entries = 0x20, 574 .target_64bit = false, 575 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 576 .per_ce_irq = false, 577 .shadow_reg_support = false, 578 .rri_on_ddr = false, 579 .hw_filter_reset_required = true, 580 .fw_diag_ce_download = false, 581 .tx_stats_over_pktlog = false, 582 }, 583 { 584 .id = WCN3990_HW_1_0_DEV_VERSION, 585 .dev_id = 0, 586 .bus = ATH10K_BUS_SNOC, 587 .name = "wcn3990 hw1.0", 588 .continuous_frag_desc = true, 589 .tx_chain_mask = 0x7, 590 .rx_chain_mask = 0x7, 591 .max_spatial_stream = 4, 592 .fw = { 593 .dir = WCN3990_HW_1_0_FW_DIR, 594 }, 595 .sw_decrypt_mcast_mgmt = true, 596 .hw_ops = &wcn3990_ops, 597 .decap_align_bytes = 1, 598 .num_peers = TARGET_HL_TLV_NUM_PEERS, 599 .n_cipher_suites = 11, 600 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 601 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 602 .target_64bit = true, 603 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 604 .per_ce_irq = true, 605 .shadow_reg_support = true, 606 .rri_on_ddr = true, 607 .hw_filter_reset_required = false, 608 .fw_diag_ce_download = false, 609 .tx_stats_over_pktlog = false, 610 }, 611 }; 612 613 static const char *const ath10k_core_fw_feature_str[] = { 614 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 615 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 616 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 617 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 618 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 619 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 620 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 621 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 622 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 623 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 624 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 625 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 626 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 627 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 628 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 629 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 630 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 631 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 632 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 633 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 634 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 635 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 636 }; 637 638 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 639 size_t buf_len, 640 enum ath10k_fw_features feat) 641 { 642 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 643 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 644 ATH10K_FW_FEATURE_COUNT); 645 646 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 647 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 648 return scnprintf(buf, buf_len, "bit%d", feat); 649 } 650 651 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 652 } 653 654 void ath10k_core_get_fw_features_str(struct ath10k *ar, 655 char *buf, 656 size_t buf_len) 657 { 658 size_t len = 0; 659 int i; 660 661 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 662 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 663 if (len > 0) 664 len += scnprintf(buf + len, buf_len - len, ","); 665 666 len += ath10k_core_get_fw_feature_str(buf + len, 667 buf_len - len, 668 i); 669 } 670 } 671 } 672 673 static void ath10k_send_suspend_complete(struct ath10k *ar) 674 { 675 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 676 677 complete(&ar->target_suspend); 678 } 679 680 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 681 { 682 int ret; 683 u32 param = 0; 684 685 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 686 if (ret) 687 return ret; 688 689 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 690 if (ret) 691 return ret; 692 693 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 694 if (ret) 695 return ret; 696 697 /* Data transfer is not initiated, when reduced Tx completion 698 * is used for SDIO. disable it until fixed 699 */ 700 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 701 702 /* Alternate credit size of 1544 as used by SDIO firmware is 703 * not big enough for mac80211 / native wifi frames. disable it 704 */ 705 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 706 707 if (mode == ATH10K_FIRMWARE_MODE_UTF) 708 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 709 else 710 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 711 712 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 713 if (ret) 714 return ret; 715 716 /* Explicitly set fwlog prints to zero as target may turn it on 717 * based on scratch registers. 718 */ 719 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m); 720 if (ret) 721 return ret; 722 723 param |= HI_OPTION_DISABLE_DBGLOG; 724 ret = ath10k_bmi_write32(ar, hi_option_flag, param); 725 if (ret) 726 return ret; 727 728 return 0; 729 } 730 731 static int ath10k_init_configure_target(struct ath10k *ar) 732 { 733 u32 param_host; 734 int ret; 735 736 /* tell target which HTC version it is used*/ 737 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 738 HTC_PROTOCOL_VERSION); 739 if (ret) { 740 ath10k_err(ar, "settings HTC version failed\n"); 741 return ret; 742 } 743 744 /* set the firmware mode to STA/IBSS/AP */ 745 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 746 if (ret) { 747 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 748 return ret; 749 } 750 751 /* TODO following parameters need to be re-visited. */ 752 /* num_device */ 753 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 754 /* Firmware mode */ 755 /* FIXME: Why FW_MODE_AP ??.*/ 756 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 757 /* mac_addr_method */ 758 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 759 /* firmware_bridge */ 760 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 761 /* fwsubmode */ 762 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 763 764 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 765 if (ret) { 766 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 767 return ret; 768 } 769 770 /* We do all byte-swapping on the host */ 771 ret = ath10k_bmi_write32(ar, hi_be, 0); 772 if (ret) { 773 ath10k_err(ar, "setting host CPU BE mode failed\n"); 774 return ret; 775 } 776 777 /* FW descriptor/Data swap flags */ 778 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 779 780 if (ret) { 781 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 782 return ret; 783 } 784 785 /* Some devices have a special sanity check that verifies the PCI 786 * Device ID is written to this host interest var. It is known to be 787 * required to boot QCA6164. 788 */ 789 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 790 ar->dev_id); 791 if (ret) { 792 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 793 return ret; 794 } 795 796 return 0; 797 } 798 799 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 800 const char *dir, 801 const char *file) 802 { 803 char filename[100]; 804 const struct firmware *fw; 805 int ret; 806 807 if (file == NULL) 808 return ERR_PTR(-ENOENT); 809 810 if (dir == NULL) 811 dir = "."; 812 813 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 814 ret = firmware_request_nowarn(&fw, filename, ar->dev); 815 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 816 filename, ret); 817 818 if (ret) 819 return ERR_PTR(ret); 820 821 return fw; 822 } 823 824 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 825 size_t data_len) 826 { 827 u32 board_data_size = ar->hw_params.fw.board_size; 828 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 829 u32 board_ext_data_addr; 830 int ret; 831 832 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 833 if (ret) { 834 ath10k_err(ar, "could not read board ext data addr (%d)\n", 835 ret); 836 return ret; 837 } 838 839 ath10k_dbg(ar, ATH10K_DBG_BOOT, 840 "boot push board extended data addr 0x%x\n", 841 board_ext_data_addr); 842 843 if (board_ext_data_addr == 0) 844 return 0; 845 846 if (data_len != (board_data_size + board_ext_data_size)) { 847 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 848 data_len, board_data_size, board_ext_data_size); 849 return -EINVAL; 850 } 851 852 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 853 data + board_data_size, 854 board_ext_data_size); 855 if (ret) { 856 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 857 return ret; 858 } 859 860 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 861 (board_ext_data_size << 16) | 1); 862 if (ret) { 863 ath10k_err(ar, "could not write board ext data bit (%d)\n", 864 ret); 865 return ret; 866 } 867 868 return 0; 869 } 870 871 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 872 { 873 u32 result, address; 874 u8 board_id, chip_id; 875 bool ext_bid_support; 876 int ret, bmi_board_id_param; 877 878 address = ar->hw_params.patch_load_addr; 879 880 if (!ar->normal_mode_fw.fw_file.otp_data || 881 !ar->normal_mode_fw.fw_file.otp_len) { 882 ath10k_warn(ar, 883 "failed to retrieve board id because of invalid otp\n"); 884 return -ENODATA; 885 } 886 887 ath10k_dbg(ar, ATH10K_DBG_BOOT, 888 "boot upload otp to 0x%x len %zd for board id\n", 889 address, ar->normal_mode_fw.fw_file.otp_len); 890 891 ret = ath10k_bmi_fast_download(ar, address, 892 ar->normal_mode_fw.fw_file.otp_data, 893 ar->normal_mode_fw.fw_file.otp_len); 894 if (ret) { 895 ath10k_err(ar, "could not write otp for board id check: %d\n", 896 ret); 897 return ret; 898 } 899 900 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 901 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 902 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 903 else 904 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 905 906 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 907 if (ret) { 908 ath10k_err(ar, "could not execute otp for board id check: %d\n", 909 ret); 910 return ret; 911 } 912 913 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 914 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 915 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 916 917 ath10k_dbg(ar, ATH10K_DBG_BOOT, 918 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 919 result, board_id, chip_id, ext_bid_support); 920 921 ar->id.ext_bid_supported = ext_bid_support; 922 923 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 924 (board_id == 0)) { 925 ath10k_dbg(ar, ATH10K_DBG_BOOT, 926 "board id does not exist in otp, ignore it\n"); 927 return -EOPNOTSUPP; 928 } 929 930 ar->id.bmi_ids_valid = true; 931 ar->id.bmi_board_id = board_id; 932 ar->id.bmi_chip_id = chip_id; 933 934 return 0; 935 } 936 937 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 938 { 939 struct ath10k *ar = data; 940 const char *bdf_ext; 941 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 942 u8 bdf_enabled; 943 int i; 944 945 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 946 return; 947 948 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 949 ath10k_dbg(ar, ATH10K_DBG_BOOT, 950 "wrong smbios bdf ext type length (%d).\n", 951 hdr->length); 952 return; 953 } 954 955 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 956 if (!bdf_enabled) { 957 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 958 return; 959 } 960 961 /* Only one string exists (per spec) */ 962 bdf_ext = (char *)hdr + hdr->length; 963 964 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 965 ath10k_dbg(ar, ATH10K_DBG_BOOT, 966 "bdf variant magic does not match.\n"); 967 return; 968 } 969 970 for (i = 0; i < strlen(bdf_ext); i++) { 971 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 972 ath10k_dbg(ar, ATH10K_DBG_BOOT, 973 "bdf variant name contains non ascii chars.\n"); 974 return; 975 } 976 } 977 978 /* Copy extension name without magic suffix */ 979 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 980 sizeof(ar->id.bdf_ext)) < 0) { 981 ath10k_dbg(ar, ATH10K_DBG_BOOT, 982 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 983 bdf_ext); 984 return; 985 } 986 987 ath10k_dbg(ar, ATH10K_DBG_BOOT, 988 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 989 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 990 } 991 992 static int ath10k_core_check_smbios(struct ath10k *ar) 993 { 994 ar->id.bdf_ext[0] = '\0'; 995 dmi_walk(ath10k_core_check_bdfext, ar); 996 997 if (ar->id.bdf_ext[0] == '\0') 998 return -ENODATA; 999 1000 return 0; 1001 } 1002 1003 static int ath10k_core_check_dt(struct ath10k *ar) 1004 { 1005 struct device_node *node; 1006 const char *variant = NULL; 1007 1008 node = ar->dev->of_node; 1009 if (!node) 1010 return -ENOENT; 1011 1012 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1013 &variant); 1014 if (!variant) 1015 return -ENODATA; 1016 1017 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1018 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1019 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1020 variant); 1021 1022 return 0; 1023 } 1024 1025 static int ath10k_download_fw(struct ath10k *ar) 1026 { 1027 u32 address, data_len; 1028 const void *data; 1029 int ret; 1030 1031 address = ar->hw_params.patch_load_addr; 1032 1033 data = ar->running_fw->fw_file.firmware_data; 1034 data_len = ar->running_fw->fw_file.firmware_len; 1035 1036 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1037 if (ret) { 1038 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1039 ret); 1040 return ret; 1041 } 1042 1043 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1044 "boot uploading firmware image %pK len %d\n", 1045 data, data_len); 1046 1047 /* Check if device supports to download firmware via 1048 * diag copy engine. Downloading firmware via diag CE 1049 * greatly reduces the time to download firmware. 1050 */ 1051 if (ar->hw_params.fw_diag_ce_download) { 1052 ret = ath10k_hw_diag_fast_download(ar, address, 1053 data, data_len); 1054 if (ret == 0) 1055 /* firmware upload via diag ce was successful */ 1056 return 0; 1057 1058 ath10k_warn(ar, 1059 "failed to upload firmware via diag ce, trying BMI: %d", 1060 ret); 1061 } 1062 1063 return ath10k_bmi_fast_download(ar, address, 1064 data, data_len); 1065 } 1066 1067 void ath10k_core_free_board_files(struct ath10k *ar) 1068 { 1069 if (!IS_ERR(ar->normal_mode_fw.board)) 1070 release_firmware(ar->normal_mode_fw.board); 1071 1072 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1073 release_firmware(ar->normal_mode_fw.ext_board); 1074 1075 ar->normal_mode_fw.board = NULL; 1076 ar->normal_mode_fw.board_data = NULL; 1077 ar->normal_mode_fw.board_len = 0; 1078 ar->normal_mode_fw.ext_board = NULL; 1079 ar->normal_mode_fw.ext_board_data = NULL; 1080 ar->normal_mode_fw.ext_board_len = 0; 1081 } 1082 EXPORT_SYMBOL(ath10k_core_free_board_files); 1083 1084 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1085 { 1086 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1087 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1088 1089 if (!IS_ERR(ar->cal_file)) 1090 release_firmware(ar->cal_file); 1091 1092 if (!IS_ERR(ar->pre_cal_file)) 1093 release_firmware(ar->pre_cal_file); 1094 1095 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1096 1097 ar->normal_mode_fw.fw_file.otp_data = NULL; 1098 ar->normal_mode_fw.fw_file.otp_len = 0; 1099 1100 ar->normal_mode_fw.fw_file.firmware = NULL; 1101 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1102 ar->normal_mode_fw.fw_file.firmware_len = 0; 1103 1104 ar->cal_file = NULL; 1105 ar->pre_cal_file = NULL; 1106 } 1107 1108 static int ath10k_fetch_cal_file(struct ath10k *ar) 1109 { 1110 char filename[100]; 1111 1112 /* pre-cal-<bus>-<id>.bin */ 1113 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1114 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1115 1116 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1117 if (!IS_ERR(ar->pre_cal_file)) 1118 goto success; 1119 1120 /* cal-<bus>-<id>.bin */ 1121 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1122 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1123 1124 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1125 if (IS_ERR(ar->cal_file)) 1126 /* calibration file is optional, don't print any warnings */ 1127 return PTR_ERR(ar->cal_file); 1128 success: 1129 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1130 ATH10K_FW_DIR, filename); 1131 1132 return 0; 1133 } 1134 1135 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1136 { 1137 const struct firmware *fw; 1138 1139 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1140 if (!ar->hw_params.fw.board) { 1141 ath10k_err(ar, "failed to find board file fw entry\n"); 1142 return -EINVAL; 1143 } 1144 1145 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1146 ar->hw_params.fw.dir, 1147 ar->hw_params.fw.board); 1148 if (IS_ERR(ar->normal_mode_fw.board)) 1149 return PTR_ERR(ar->normal_mode_fw.board); 1150 1151 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1152 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1153 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1154 if (!ar->hw_params.fw.eboard) { 1155 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1156 return -EINVAL; 1157 } 1158 1159 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1160 ar->hw_params.fw.eboard); 1161 ar->normal_mode_fw.ext_board = fw; 1162 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1163 return PTR_ERR(ar->normal_mode_fw.ext_board); 1164 1165 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1166 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1167 } 1168 1169 return 0; 1170 } 1171 1172 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1173 const void *buf, size_t buf_len, 1174 const char *boardname, 1175 int bd_ie_type) 1176 { 1177 const struct ath10k_fw_ie *hdr; 1178 bool name_match_found; 1179 int ret, board_ie_id; 1180 size_t board_ie_len; 1181 const void *board_ie_data; 1182 1183 name_match_found = false; 1184 1185 /* go through ATH10K_BD_IE_BOARD_ elements */ 1186 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1187 hdr = buf; 1188 board_ie_id = le32_to_cpu(hdr->id); 1189 board_ie_len = le32_to_cpu(hdr->len); 1190 board_ie_data = hdr->data; 1191 1192 buf_len -= sizeof(*hdr); 1193 buf += sizeof(*hdr); 1194 1195 if (buf_len < ALIGN(board_ie_len, 4)) { 1196 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1197 buf_len, ALIGN(board_ie_len, 4)); 1198 ret = -EINVAL; 1199 goto out; 1200 } 1201 1202 switch (board_ie_id) { 1203 case ATH10K_BD_IE_BOARD_NAME: 1204 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1205 board_ie_data, board_ie_len); 1206 1207 if (board_ie_len != strlen(boardname)) 1208 break; 1209 1210 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1211 if (ret) 1212 break; 1213 1214 name_match_found = true; 1215 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1216 "boot found match for name '%s'", 1217 boardname); 1218 break; 1219 case ATH10K_BD_IE_BOARD_DATA: 1220 if (!name_match_found) 1221 /* no match found */ 1222 break; 1223 1224 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1225 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1226 "boot found board data for '%s'", 1227 boardname); 1228 1229 ar->normal_mode_fw.board_data = board_ie_data; 1230 ar->normal_mode_fw.board_len = board_ie_len; 1231 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1232 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1233 "boot found eboard data for '%s'", 1234 boardname); 1235 1236 ar->normal_mode_fw.ext_board_data = board_ie_data; 1237 ar->normal_mode_fw.ext_board_len = board_ie_len; 1238 } 1239 1240 ret = 0; 1241 goto out; 1242 default: 1243 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1244 board_ie_id); 1245 break; 1246 } 1247 1248 /* jump over the padding */ 1249 board_ie_len = ALIGN(board_ie_len, 4); 1250 1251 buf_len -= board_ie_len; 1252 buf += board_ie_len; 1253 } 1254 1255 /* no match found */ 1256 ret = -ENOENT; 1257 1258 out: 1259 return ret; 1260 } 1261 1262 static int ath10k_core_search_bd(struct ath10k *ar, 1263 const char *boardname, 1264 const u8 *data, 1265 size_t len) 1266 { 1267 size_t ie_len; 1268 struct ath10k_fw_ie *hdr; 1269 int ret = -ENOENT, ie_id; 1270 1271 while (len > sizeof(struct ath10k_fw_ie)) { 1272 hdr = (struct ath10k_fw_ie *)data; 1273 ie_id = le32_to_cpu(hdr->id); 1274 ie_len = le32_to_cpu(hdr->len); 1275 1276 len -= sizeof(*hdr); 1277 data = hdr->data; 1278 1279 if (len < ALIGN(ie_len, 4)) { 1280 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1281 ie_id, ie_len, len); 1282 return -EINVAL; 1283 } 1284 1285 switch (ie_id) { 1286 case ATH10K_BD_IE_BOARD: 1287 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1288 boardname, 1289 ATH10K_BD_IE_BOARD); 1290 if (ret == -ENOENT) 1291 /* no match found, continue */ 1292 break; 1293 1294 /* either found or error, so stop searching */ 1295 goto out; 1296 case ATH10K_BD_IE_BOARD_EXT: 1297 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1298 boardname, 1299 ATH10K_BD_IE_BOARD_EXT); 1300 if (ret == -ENOENT) 1301 /* no match found, continue */ 1302 break; 1303 1304 /* either found or error, so stop searching */ 1305 goto out; 1306 } 1307 1308 /* jump over the padding */ 1309 ie_len = ALIGN(ie_len, 4); 1310 1311 len -= ie_len; 1312 data += ie_len; 1313 } 1314 1315 out: 1316 /* return result of parse_bd_ie_board() or -ENOENT */ 1317 return ret; 1318 } 1319 1320 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1321 const char *boardname, 1322 const char *fallback_boardname, 1323 const char *filename) 1324 { 1325 size_t len, magic_len; 1326 const u8 *data; 1327 int ret; 1328 1329 /* Skip if already fetched during board data download */ 1330 if (!ar->normal_mode_fw.board) 1331 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1332 ar->hw_params.fw.dir, 1333 filename); 1334 if (IS_ERR(ar->normal_mode_fw.board)) 1335 return PTR_ERR(ar->normal_mode_fw.board); 1336 1337 data = ar->normal_mode_fw.board->data; 1338 len = ar->normal_mode_fw.board->size; 1339 1340 /* magic has extra null byte padded */ 1341 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1342 if (len < magic_len) { 1343 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1344 ar->hw_params.fw.dir, filename, len); 1345 ret = -EINVAL; 1346 goto err; 1347 } 1348 1349 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1350 ath10k_err(ar, "found invalid board magic\n"); 1351 ret = -EINVAL; 1352 goto err; 1353 } 1354 1355 /* magic is padded to 4 bytes */ 1356 magic_len = ALIGN(magic_len, 4); 1357 if (len < magic_len) { 1358 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1359 ar->hw_params.fw.dir, filename, len); 1360 ret = -EINVAL; 1361 goto err; 1362 } 1363 1364 data += magic_len; 1365 len -= magic_len; 1366 1367 /* attempt to find boardname in the IE list */ 1368 ret = ath10k_core_search_bd(ar, boardname, data, len); 1369 1370 /* if we didn't find it and have a fallback name, try that */ 1371 if (ret == -ENOENT && fallback_boardname) 1372 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1373 1374 if (ret == -ENOENT) { 1375 ath10k_err(ar, 1376 "failed to fetch board data for %s from %s/%s\n", 1377 boardname, ar->hw_params.fw.dir, filename); 1378 ret = -ENODATA; 1379 } 1380 1381 if (ret) 1382 goto err; 1383 1384 return 0; 1385 1386 err: 1387 ath10k_core_free_board_files(ar); 1388 return ret; 1389 } 1390 1391 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1392 size_t name_len, bool with_variant) 1393 { 1394 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1395 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1396 1397 if (with_variant && ar->id.bdf_ext[0] != '\0') 1398 scnprintf(variant, sizeof(variant), ",variant=%s", 1399 ar->id.bdf_ext); 1400 1401 if (ar->id.bmi_ids_valid) { 1402 scnprintf(name, name_len, 1403 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1404 ath10k_bus_str(ar->hif.bus), 1405 ar->id.bmi_chip_id, 1406 ar->id.bmi_board_id, variant); 1407 goto out; 1408 } 1409 1410 if (ar->id.qmi_ids_valid) { 1411 scnprintf(name, name_len, 1412 "bus=%s,qmi-board-id=%x", 1413 ath10k_bus_str(ar->hif.bus), 1414 ar->id.qmi_board_id); 1415 goto out; 1416 } 1417 1418 scnprintf(name, name_len, 1419 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1420 ath10k_bus_str(ar->hif.bus), 1421 ar->id.vendor, ar->id.device, 1422 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1423 out: 1424 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1425 1426 return 0; 1427 } 1428 1429 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1430 size_t name_len) 1431 { 1432 if (ar->id.bmi_ids_valid) { 1433 scnprintf(name, name_len, 1434 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1435 ath10k_bus_str(ar->hif.bus), 1436 ar->id.bmi_chip_id, 1437 ar->id.bmi_eboard_id); 1438 1439 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1440 return 0; 1441 } 1442 /* Fallback if returned board id is zero */ 1443 return -1; 1444 } 1445 1446 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1447 { 1448 char boardname[100], fallback_boardname[100]; 1449 int ret; 1450 1451 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1452 ret = ath10k_core_create_board_name(ar, boardname, 1453 sizeof(boardname), true); 1454 if (ret) { 1455 ath10k_err(ar, "failed to create board name: %d", ret); 1456 return ret; 1457 } 1458 1459 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1460 sizeof(boardname), false); 1461 if (ret) { 1462 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1463 return ret; 1464 } 1465 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1466 ret = ath10k_core_create_eboard_name(ar, boardname, 1467 sizeof(boardname)); 1468 if (ret) { 1469 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1470 goto fallback; 1471 } 1472 } 1473 1474 ar->bd_api = 2; 1475 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1476 fallback_boardname, 1477 ATH10K_BOARD_API2_FILE); 1478 if (!ret) 1479 goto success; 1480 1481 fallback: 1482 ar->bd_api = 1; 1483 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1484 if (ret) { 1485 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1486 ar->hw_params.fw.dir); 1487 return ret; 1488 } 1489 1490 success: 1491 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1492 return 0; 1493 } 1494 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1495 1496 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1497 { 1498 u32 result, address; 1499 u8 ext_board_id; 1500 int ret; 1501 1502 address = ar->hw_params.patch_load_addr; 1503 1504 if (!ar->normal_mode_fw.fw_file.otp_data || 1505 !ar->normal_mode_fw.fw_file.otp_len) { 1506 ath10k_warn(ar, 1507 "failed to retrieve extended board id due to otp binary missing\n"); 1508 return -ENODATA; 1509 } 1510 1511 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1512 "boot upload otp to 0x%x len %zd for ext board id\n", 1513 address, ar->normal_mode_fw.fw_file.otp_len); 1514 1515 ret = ath10k_bmi_fast_download(ar, address, 1516 ar->normal_mode_fw.fw_file.otp_data, 1517 ar->normal_mode_fw.fw_file.otp_len); 1518 if (ret) { 1519 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1520 ret); 1521 return ret; 1522 } 1523 1524 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1525 if (ret) { 1526 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1527 ret); 1528 return ret; 1529 } 1530 1531 if (!result) { 1532 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1533 "ext board id does not exist in otp, ignore it\n"); 1534 return -EOPNOTSUPP; 1535 } 1536 1537 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1538 1539 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1540 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1541 result, ext_board_id); 1542 1543 ar->id.bmi_eboard_id = ext_board_id; 1544 1545 return 0; 1546 } 1547 1548 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1549 size_t data_len) 1550 { 1551 u32 board_data_size = ar->hw_params.fw.board_size; 1552 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1553 u32 board_address; 1554 u32 ext_board_address; 1555 int ret; 1556 1557 ret = ath10k_push_board_ext_data(ar, data, data_len); 1558 if (ret) { 1559 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1560 goto exit; 1561 } 1562 1563 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1564 if (ret) { 1565 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1566 goto exit; 1567 } 1568 1569 ret = ath10k_bmi_write_memory(ar, board_address, data, 1570 min_t(u32, board_data_size, 1571 data_len)); 1572 if (ret) { 1573 ath10k_err(ar, "could not write board data (%d)\n", ret); 1574 goto exit; 1575 } 1576 1577 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1578 if (ret) { 1579 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1580 goto exit; 1581 } 1582 1583 if (!ar->id.ext_bid_supported) 1584 goto exit; 1585 1586 /* Extended board data download */ 1587 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1588 if (ret == -EOPNOTSUPP) { 1589 /* Not fetching ext_board_data if ext board id is 0 */ 1590 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1591 return 0; 1592 } else if (ret) { 1593 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1594 goto exit; 1595 } 1596 1597 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1598 if (ret) 1599 goto exit; 1600 1601 if (ar->normal_mode_fw.ext_board_data) { 1602 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1603 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1604 "boot writing ext board data to addr 0x%x", 1605 ext_board_address); 1606 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1607 ar->normal_mode_fw.ext_board_data, 1608 min_t(u32, eboard_data_size, data_len)); 1609 if (ret) 1610 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1611 } 1612 1613 exit: 1614 return ret; 1615 } 1616 1617 static int ath10k_download_and_run_otp(struct ath10k *ar) 1618 { 1619 u32 result, address = ar->hw_params.patch_load_addr; 1620 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1621 int ret; 1622 1623 ret = ath10k_download_board_data(ar, 1624 ar->running_fw->board_data, 1625 ar->running_fw->board_len); 1626 if (ret) { 1627 ath10k_err(ar, "failed to download board data: %d\n", ret); 1628 return ret; 1629 } 1630 1631 /* OTP is optional */ 1632 1633 if (!ar->running_fw->fw_file.otp_data || 1634 !ar->running_fw->fw_file.otp_len) { 1635 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1636 ar->running_fw->fw_file.otp_data, 1637 ar->running_fw->fw_file.otp_len); 1638 return 0; 1639 } 1640 1641 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1642 address, ar->running_fw->fw_file.otp_len); 1643 1644 ret = ath10k_bmi_fast_download(ar, address, 1645 ar->running_fw->fw_file.otp_data, 1646 ar->running_fw->fw_file.otp_len); 1647 if (ret) { 1648 ath10k_err(ar, "could not write otp (%d)\n", ret); 1649 return ret; 1650 } 1651 1652 /* As of now pre-cal is valid for 10_4 variants */ 1653 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1654 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1655 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1656 1657 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1658 if (ret) { 1659 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1660 return ret; 1661 } 1662 1663 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1664 1665 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1666 ar->running_fw->fw_file.fw_features)) && 1667 result != 0) { 1668 ath10k_err(ar, "otp calibration failed: %d", result); 1669 return -EINVAL; 1670 } 1671 1672 return 0; 1673 } 1674 1675 static int ath10k_download_cal_file(struct ath10k *ar, 1676 const struct firmware *file) 1677 { 1678 int ret; 1679 1680 if (!file) 1681 return -ENOENT; 1682 1683 if (IS_ERR(file)) 1684 return PTR_ERR(file); 1685 1686 ret = ath10k_download_board_data(ar, file->data, file->size); 1687 if (ret) { 1688 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1689 return ret; 1690 } 1691 1692 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1693 1694 return 0; 1695 } 1696 1697 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1698 { 1699 struct device_node *node; 1700 int data_len; 1701 void *data; 1702 int ret; 1703 1704 node = ar->dev->of_node; 1705 if (!node) 1706 /* Device Tree is optional, don't print any warnings if 1707 * there's no node for ath10k. 1708 */ 1709 return -ENOENT; 1710 1711 if (!of_get_property(node, dt_name, &data_len)) { 1712 /* The calibration data node is optional */ 1713 return -ENOENT; 1714 } 1715 1716 if (data_len != ar->hw_params.cal_data_len) { 1717 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1718 data_len); 1719 ret = -EMSGSIZE; 1720 goto out; 1721 } 1722 1723 data = kmalloc(data_len, GFP_KERNEL); 1724 if (!data) { 1725 ret = -ENOMEM; 1726 goto out; 1727 } 1728 1729 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1730 if (ret) { 1731 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1732 ret); 1733 goto out_free; 1734 } 1735 1736 ret = ath10k_download_board_data(ar, data, data_len); 1737 if (ret) { 1738 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1739 ret); 1740 goto out_free; 1741 } 1742 1743 ret = 0; 1744 1745 out_free: 1746 kfree(data); 1747 1748 out: 1749 return ret; 1750 } 1751 1752 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1753 { 1754 size_t data_len; 1755 void *data = NULL; 1756 int ret; 1757 1758 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1759 if (ret) { 1760 if (ret != -EOPNOTSUPP) 1761 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1762 ret); 1763 goto out_free; 1764 } 1765 1766 ret = ath10k_download_board_data(ar, data, data_len); 1767 if (ret) { 1768 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1769 ret); 1770 goto out_free; 1771 } 1772 1773 ret = 0; 1774 1775 out_free: 1776 kfree(data); 1777 1778 return ret; 1779 } 1780 1781 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1782 struct ath10k_fw_file *fw_file) 1783 { 1784 size_t magic_len, len, ie_len; 1785 int ie_id, i, index, bit, ret; 1786 struct ath10k_fw_ie *hdr; 1787 const u8 *data; 1788 __le32 *timestamp, *version; 1789 1790 /* first fetch the firmware file (firmware-*.bin) */ 1791 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1792 name); 1793 if (IS_ERR(fw_file->firmware)) 1794 return PTR_ERR(fw_file->firmware); 1795 1796 data = fw_file->firmware->data; 1797 len = fw_file->firmware->size; 1798 1799 /* magic also includes the null byte, check that as well */ 1800 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1801 1802 if (len < magic_len) { 1803 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1804 ar->hw_params.fw.dir, name, len); 1805 ret = -EINVAL; 1806 goto err; 1807 } 1808 1809 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1810 ath10k_err(ar, "invalid firmware magic\n"); 1811 ret = -EINVAL; 1812 goto err; 1813 } 1814 1815 /* jump over the padding */ 1816 magic_len = ALIGN(magic_len, 4); 1817 1818 len -= magic_len; 1819 data += magic_len; 1820 1821 /* loop elements */ 1822 while (len > sizeof(struct ath10k_fw_ie)) { 1823 hdr = (struct ath10k_fw_ie *)data; 1824 1825 ie_id = le32_to_cpu(hdr->id); 1826 ie_len = le32_to_cpu(hdr->len); 1827 1828 len -= sizeof(*hdr); 1829 data += sizeof(*hdr); 1830 1831 if (len < ie_len) { 1832 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1833 ie_id, len, ie_len); 1834 ret = -EINVAL; 1835 goto err; 1836 } 1837 1838 switch (ie_id) { 1839 case ATH10K_FW_IE_FW_VERSION: 1840 if (ie_len > sizeof(fw_file->fw_version) - 1) 1841 break; 1842 1843 memcpy(fw_file->fw_version, data, ie_len); 1844 fw_file->fw_version[ie_len] = '\0'; 1845 1846 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1847 "found fw version %s\n", 1848 fw_file->fw_version); 1849 break; 1850 case ATH10K_FW_IE_TIMESTAMP: 1851 if (ie_len != sizeof(u32)) 1852 break; 1853 1854 timestamp = (__le32 *)data; 1855 1856 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1857 le32_to_cpup(timestamp)); 1858 break; 1859 case ATH10K_FW_IE_FEATURES: 1860 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1861 "found firmware features ie (%zd B)\n", 1862 ie_len); 1863 1864 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1865 index = i / 8; 1866 bit = i % 8; 1867 1868 if (index == ie_len) 1869 break; 1870 1871 if (data[index] & (1 << bit)) { 1872 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1873 "Enabling feature bit: %i\n", 1874 i); 1875 __set_bit(i, fw_file->fw_features); 1876 } 1877 } 1878 1879 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1880 fw_file->fw_features, 1881 sizeof(fw_file->fw_features)); 1882 break; 1883 case ATH10K_FW_IE_FW_IMAGE: 1884 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1885 "found fw image ie (%zd B)\n", 1886 ie_len); 1887 1888 fw_file->firmware_data = data; 1889 fw_file->firmware_len = ie_len; 1890 1891 break; 1892 case ATH10K_FW_IE_OTP_IMAGE: 1893 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1894 "found otp image ie (%zd B)\n", 1895 ie_len); 1896 1897 fw_file->otp_data = data; 1898 fw_file->otp_len = ie_len; 1899 1900 break; 1901 case ATH10K_FW_IE_WMI_OP_VERSION: 1902 if (ie_len != sizeof(u32)) 1903 break; 1904 1905 version = (__le32 *)data; 1906 1907 fw_file->wmi_op_version = le32_to_cpup(version); 1908 1909 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1910 fw_file->wmi_op_version); 1911 break; 1912 case ATH10K_FW_IE_HTT_OP_VERSION: 1913 if (ie_len != sizeof(u32)) 1914 break; 1915 1916 version = (__le32 *)data; 1917 1918 fw_file->htt_op_version = le32_to_cpup(version); 1919 1920 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1921 fw_file->htt_op_version); 1922 break; 1923 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1924 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1925 "found fw code swap image ie (%zd B)\n", 1926 ie_len); 1927 fw_file->codeswap_data = data; 1928 fw_file->codeswap_len = ie_len; 1929 break; 1930 default: 1931 ath10k_warn(ar, "Unknown FW IE: %u\n", 1932 le32_to_cpu(hdr->id)); 1933 break; 1934 } 1935 1936 /* jump over the padding */ 1937 ie_len = ALIGN(ie_len, 4); 1938 1939 len -= ie_len; 1940 data += ie_len; 1941 } 1942 1943 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1944 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1945 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1946 ar->hw_params.fw.dir, name); 1947 ret = -ENOMEDIUM; 1948 goto err; 1949 } 1950 1951 return 0; 1952 1953 err: 1954 ath10k_core_free_firmware_files(ar); 1955 return ret; 1956 } 1957 1958 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1959 size_t fw_name_len, int fw_api) 1960 { 1961 switch (ar->hif.bus) { 1962 case ATH10K_BUS_SDIO: 1963 case ATH10K_BUS_USB: 1964 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1965 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1966 fw_api); 1967 break; 1968 case ATH10K_BUS_PCI: 1969 case ATH10K_BUS_AHB: 1970 case ATH10K_BUS_SNOC: 1971 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1972 ATH10K_FW_FILE_BASE, fw_api); 1973 break; 1974 } 1975 } 1976 1977 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1978 { 1979 int ret, i; 1980 char fw_name[100]; 1981 1982 /* calibration file is optional, don't check for any errors */ 1983 ath10k_fetch_cal_file(ar); 1984 1985 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1986 ar->fw_api = i; 1987 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1988 ar->fw_api); 1989 1990 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1991 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1992 &ar->normal_mode_fw.fw_file); 1993 if (!ret) 1994 goto success; 1995 } 1996 1997 /* we end up here if we couldn't fetch any firmware */ 1998 1999 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 2000 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 2001 ret); 2002 2003 return ret; 2004 2005 success: 2006 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2007 2008 return 0; 2009 } 2010 2011 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2012 { 2013 int ret; 2014 2015 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2016 if (ret == 0) { 2017 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2018 goto success; 2019 } 2020 2021 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2022 "boot did not find a pre calibration file, try DT next: %d\n", 2023 ret); 2024 2025 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2026 if (ret) { 2027 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2028 "unable to load pre cal data from DT: %d\n", ret); 2029 return ret; 2030 } 2031 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2032 2033 success: 2034 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2035 ath10k_cal_mode_str(ar->cal_mode)); 2036 2037 return 0; 2038 } 2039 2040 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2041 { 2042 int ret; 2043 2044 ret = ath10k_core_pre_cal_download(ar); 2045 if (ret) { 2046 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2047 "failed to load pre cal data: %d\n", ret); 2048 return ret; 2049 } 2050 2051 ret = ath10k_core_get_board_id_from_otp(ar); 2052 if (ret) { 2053 ath10k_err(ar, "failed to get board id: %d\n", ret); 2054 return ret; 2055 } 2056 2057 ret = ath10k_download_and_run_otp(ar); 2058 if (ret) { 2059 ath10k_err(ar, "failed to run otp: %d\n", ret); 2060 return ret; 2061 } 2062 2063 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2064 "pre cal configuration done successfully\n"); 2065 2066 return 0; 2067 } 2068 2069 static int ath10k_download_cal_data(struct ath10k *ar) 2070 { 2071 int ret; 2072 2073 ret = ath10k_core_pre_cal_config(ar); 2074 if (ret == 0) 2075 return 0; 2076 2077 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2078 "pre cal download procedure failed, try cal file: %d\n", 2079 ret); 2080 2081 ret = ath10k_download_cal_file(ar, ar->cal_file); 2082 if (ret == 0) { 2083 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2084 goto done; 2085 } 2086 2087 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2088 "boot did not find a calibration file, try DT next: %d\n", 2089 ret); 2090 2091 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2092 if (ret == 0) { 2093 ar->cal_mode = ATH10K_CAL_MODE_DT; 2094 goto done; 2095 } 2096 2097 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2098 "boot did not find DT entry, try target EEPROM next: %d\n", 2099 ret); 2100 2101 ret = ath10k_download_cal_eeprom(ar); 2102 if (ret == 0) { 2103 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2104 goto done; 2105 } 2106 2107 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2108 "boot did not find target EEPROM entry, try OTP next: %d\n", 2109 ret); 2110 2111 ret = ath10k_download_and_run_otp(ar); 2112 if (ret) { 2113 ath10k_err(ar, "failed to run otp: %d\n", ret); 2114 return ret; 2115 } 2116 2117 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2118 2119 done: 2120 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2121 ath10k_cal_mode_str(ar->cal_mode)); 2122 return 0; 2123 } 2124 2125 static int ath10k_init_uart(struct ath10k *ar) 2126 { 2127 int ret; 2128 2129 /* 2130 * Explicitly setting UART prints to zero as target turns it on 2131 * based on scratch registers. 2132 */ 2133 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2134 if (ret) { 2135 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2136 return ret; 2137 } 2138 2139 if (!uart_print) { 2140 if (ar->hw_params.uart_pin_workaround) { 2141 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2142 ar->hw_params.uart_pin); 2143 if (ret) { 2144 ath10k_warn(ar, "failed to set UART TX pin: %d", 2145 ret); 2146 return ret; 2147 } 2148 } 2149 2150 return 0; 2151 } 2152 2153 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2154 if (ret) { 2155 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2156 return ret; 2157 } 2158 2159 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2160 if (ret) { 2161 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2162 return ret; 2163 } 2164 2165 /* Set the UART baud rate to 19200. */ 2166 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2167 if (ret) { 2168 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2169 return ret; 2170 } 2171 2172 ath10k_info(ar, "UART prints enabled\n"); 2173 return 0; 2174 } 2175 2176 static int ath10k_init_hw_params(struct ath10k *ar) 2177 { 2178 const struct ath10k_hw_params *uninitialized_var(hw_params); 2179 int i; 2180 2181 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2182 hw_params = &ath10k_hw_params_list[i]; 2183 2184 if (hw_params->bus == ar->hif.bus && 2185 hw_params->id == ar->target_version && 2186 hw_params->dev_id == ar->dev_id) 2187 break; 2188 } 2189 2190 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2191 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2192 ar->target_version); 2193 return -EINVAL; 2194 } 2195 2196 ar->hw_params = *hw_params; 2197 2198 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2199 ar->hw_params.name, ar->target_version); 2200 2201 return 0; 2202 } 2203 2204 static void ath10k_core_restart(struct work_struct *work) 2205 { 2206 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2207 int ret; 2208 2209 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2210 2211 /* Place a barrier to make sure the compiler doesn't reorder 2212 * CRASH_FLUSH and calling other functions. 2213 */ 2214 barrier(); 2215 2216 ieee80211_stop_queues(ar->hw); 2217 ath10k_drain_tx(ar); 2218 complete(&ar->scan.started); 2219 complete(&ar->scan.completed); 2220 complete(&ar->scan.on_channel); 2221 complete(&ar->offchan_tx_completed); 2222 complete(&ar->install_key_done); 2223 complete(&ar->vdev_setup_done); 2224 complete(&ar->vdev_delete_done); 2225 complete(&ar->thermal.wmi_sync); 2226 complete(&ar->bss_survey_done); 2227 wake_up(&ar->htt.empty_tx_wq); 2228 wake_up(&ar->wmi.tx_credits_wq); 2229 wake_up(&ar->peer_mapping_wq); 2230 2231 /* TODO: We can have one instance of cancelling coverage_class_work by 2232 * moving it to ath10k_halt(), so that both stop() and restart() would 2233 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2234 * with conf_mutex it will deadlock. 2235 */ 2236 cancel_work_sync(&ar->set_coverage_class_work); 2237 2238 mutex_lock(&ar->conf_mutex); 2239 2240 switch (ar->state) { 2241 case ATH10K_STATE_ON: 2242 ar->state = ATH10K_STATE_RESTARTING; 2243 ath10k_halt(ar); 2244 ath10k_scan_finish(ar); 2245 ieee80211_restart_hw(ar->hw); 2246 break; 2247 case ATH10K_STATE_OFF: 2248 /* this can happen if driver is being unloaded 2249 * or if the crash happens during FW probing 2250 */ 2251 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2252 break; 2253 case ATH10K_STATE_RESTARTING: 2254 /* hw restart might be requested from multiple places */ 2255 break; 2256 case ATH10K_STATE_RESTARTED: 2257 ar->state = ATH10K_STATE_WEDGED; 2258 /* fall through */ 2259 case ATH10K_STATE_WEDGED: 2260 ath10k_warn(ar, "device is wedged, will not restart\n"); 2261 break; 2262 case ATH10K_STATE_UTF: 2263 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2264 break; 2265 } 2266 2267 mutex_unlock(&ar->conf_mutex); 2268 2269 ret = ath10k_coredump_submit(ar); 2270 if (ret) 2271 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2272 ret); 2273 2274 complete(&ar->driver_recovery); 2275 } 2276 2277 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2278 { 2279 struct ath10k *ar = container_of(work, struct ath10k, 2280 set_coverage_class_work); 2281 2282 if (ar->hw_params.hw_ops->set_coverage_class) 2283 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2284 } 2285 2286 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2287 { 2288 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2289 int max_num_peers; 2290 2291 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2292 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2293 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2294 return -EINVAL; 2295 } 2296 2297 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2298 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2299 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2300 return -EINVAL; 2301 } 2302 2303 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2304 switch (ath10k_cryptmode_param) { 2305 case ATH10K_CRYPT_MODE_HW: 2306 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2307 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2308 break; 2309 case ATH10K_CRYPT_MODE_SW: 2310 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2311 fw_file->fw_features)) { 2312 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2313 return -EINVAL; 2314 } 2315 2316 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2317 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2318 break; 2319 default: 2320 ath10k_info(ar, "invalid cryptmode: %d\n", 2321 ath10k_cryptmode_param); 2322 return -EINVAL; 2323 } 2324 2325 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2326 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2327 2328 if (rawmode) { 2329 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2330 fw_file->fw_features)) { 2331 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2332 return -EINVAL; 2333 } 2334 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2335 } 2336 2337 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2338 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2339 2340 /* Workaround: 2341 * 2342 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2343 * and causes enormous performance issues (malformed frames, 2344 * etc). 2345 * 2346 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2347 * albeit a bit slower compared to regular operation. 2348 */ 2349 ar->htt.max_num_amsdu = 1; 2350 } 2351 2352 /* Backwards compatibility for firmwares without 2353 * ATH10K_FW_IE_WMI_OP_VERSION. 2354 */ 2355 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2356 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2357 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2358 fw_file->fw_features)) 2359 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2360 else 2361 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2362 } else { 2363 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2364 } 2365 } 2366 2367 switch (fw_file->wmi_op_version) { 2368 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2369 max_num_peers = TARGET_NUM_PEERS; 2370 ar->max_num_stations = TARGET_NUM_STATIONS; 2371 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2372 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2373 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2374 WMI_STAT_PEER; 2375 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2376 break; 2377 case ATH10K_FW_WMI_OP_VERSION_10_1: 2378 case ATH10K_FW_WMI_OP_VERSION_10_2: 2379 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2380 if (ath10k_peer_stats_enabled(ar)) { 2381 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2382 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2383 } else { 2384 max_num_peers = TARGET_10X_NUM_PEERS; 2385 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2386 } 2387 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2388 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2389 ar->fw_stats_req_mask = WMI_STAT_PEER; 2390 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2391 break; 2392 case ATH10K_FW_WMI_OP_VERSION_TLV: 2393 max_num_peers = TARGET_TLV_NUM_PEERS; 2394 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2395 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2396 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2397 if (ar->hif.bus == ATH10K_BUS_SDIO) 2398 ar->htt.max_num_pending_tx = 2399 TARGET_TLV_NUM_MSDU_DESC_HL; 2400 else 2401 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2402 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2403 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2404 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2405 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2406 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2407 break; 2408 case ATH10K_FW_WMI_OP_VERSION_10_4: 2409 max_num_peers = TARGET_10_4_NUM_PEERS; 2410 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2411 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2412 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2413 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2414 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2415 WMI_10_4_STAT_PEER_EXTD | 2416 WMI_10_4_STAT_VDEV_EXTD; 2417 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2418 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2419 2420 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2421 fw_file->fw_features)) 2422 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2423 else 2424 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2425 break; 2426 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2427 case ATH10K_FW_WMI_OP_VERSION_MAX: 2428 default: 2429 WARN_ON(1); 2430 return -EINVAL; 2431 } 2432 2433 if (ar->hw_params.num_peers) 2434 ar->max_num_peers = ar->hw_params.num_peers; 2435 else 2436 ar->max_num_peers = max_num_peers; 2437 2438 /* Backwards compatibility for firmwares without 2439 * ATH10K_FW_IE_HTT_OP_VERSION. 2440 */ 2441 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2442 switch (fw_file->wmi_op_version) { 2443 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2444 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2445 break; 2446 case ATH10K_FW_WMI_OP_VERSION_10_1: 2447 case ATH10K_FW_WMI_OP_VERSION_10_2: 2448 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2449 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2450 break; 2451 case ATH10K_FW_WMI_OP_VERSION_TLV: 2452 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2453 break; 2454 case ATH10K_FW_WMI_OP_VERSION_10_4: 2455 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2456 case ATH10K_FW_WMI_OP_VERSION_MAX: 2457 ath10k_err(ar, "htt op version not found from fw meta data"); 2458 return -EINVAL; 2459 } 2460 } 2461 2462 return 0; 2463 } 2464 2465 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2466 { 2467 int ret; 2468 int vdev_id; 2469 int vdev_type; 2470 int vdev_subtype; 2471 const u8 *vdev_addr; 2472 2473 vdev_id = 0; 2474 vdev_type = WMI_VDEV_TYPE_STA; 2475 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2476 vdev_addr = ar->mac_addr; 2477 2478 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2479 vdev_addr); 2480 if (ret) { 2481 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2482 return ret; 2483 } 2484 2485 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2486 if (ret) { 2487 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2488 return ret; 2489 } 2490 2491 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2492 * serialized properly implicitly. 2493 * 2494 * Moreover (most) WMI commands have no explicit acknowledges. It is 2495 * possible to infer it implicitly by poking firmware with echo 2496 * command - getting a reply means all preceding comments have been 2497 * (mostly) processed. 2498 * 2499 * In case of vdev create/delete this is sufficient. 2500 * 2501 * Without this it's possible to end up with a race when HTT Rx ring is 2502 * started before vdev create/delete hack is complete allowing a short 2503 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2504 */ 2505 ret = ath10k_wmi_barrier(ar); 2506 if (ret) { 2507 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2508 return ret; 2509 } 2510 2511 return 0; 2512 } 2513 2514 static int ath10k_core_compat_services(struct ath10k *ar) 2515 { 2516 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2517 2518 /* all 10.x firmware versions support thermal throttling but don't 2519 * advertise the support via service flags so we have to hardcode 2520 * it here 2521 */ 2522 switch (fw_file->wmi_op_version) { 2523 case ATH10K_FW_WMI_OP_VERSION_10_1: 2524 case ATH10K_FW_WMI_OP_VERSION_10_2: 2525 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2526 case ATH10K_FW_WMI_OP_VERSION_10_4: 2527 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2528 break; 2529 default: 2530 break; 2531 } 2532 2533 return 0; 2534 } 2535 2536 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2537 const struct ath10k_fw_components *fw) 2538 { 2539 int status; 2540 u32 val; 2541 2542 lockdep_assert_held(&ar->conf_mutex); 2543 2544 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2545 2546 ar->running_fw = fw; 2547 2548 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2549 ar->running_fw->fw_file.fw_features)) { 2550 ath10k_bmi_start(ar); 2551 2552 if (ath10k_init_configure_target(ar)) { 2553 status = -EINVAL; 2554 goto err; 2555 } 2556 2557 status = ath10k_download_cal_data(ar); 2558 if (status) 2559 goto err; 2560 2561 /* Some of of qca988x solutions are having global reset issue 2562 * during target initialization. Bypassing PLL setting before 2563 * downloading firmware and letting the SoC run on REF_CLK is 2564 * fixing the problem. Corresponding firmware change is also 2565 * needed to set the clock source once the target is 2566 * initialized. 2567 */ 2568 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2569 ar->running_fw->fw_file.fw_features)) { 2570 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2571 if (status) { 2572 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2573 status); 2574 goto err; 2575 } 2576 } 2577 2578 status = ath10k_download_fw(ar); 2579 if (status) 2580 goto err; 2581 2582 status = ath10k_init_uart(ar); 2583 if (status) 2584 goto err; 2585 2586 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2587 status = ath10k_init_sdio(ar, mode); 2588 if (status) { 2589 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2590 goto err; 2591 } 2592 } 2593 } 2594 2595 ar->htc.htc_ops.target_send_suspend_complete = 2596 ath10k_send_suspend_complete; 2597 2598 status = ath10k_htc_init(ar); 2599 if (status) { 2600 ath10k_err(ar, "could not init HTC (%d)\n", status); 2601 goto err; 2602 } 2603 2604 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2605 ar->running_fw->fw_file.fw_features)) { 2606 status = ath10k_bmi_done(ar); 2607 if (status) 2608 goto err; 2609 } 2610 2611 status = ath10k_wmi_attach(ar); 2612 if (status) { 2613 ath10k_err(ar, "WMI attach failed: %d\n", status); 2614 goto err; 2615 } 2616 2617 status = ath10k_htt_init(ar); 2618 if (status) { 2619 ath10k_err(ar, "failed to init htt: %d\n", status); 2620 goto err_wmi_detach; 2621 } 2622 2623 status = ath10k_htt_tx_start(&ar->htt); 2624 if (status) { 2625 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2626 goto err_wmi_detach; 2627 } 2628 2629 /* If firmware indicates Full Rx Reorder support it must be used in a 2630 * slightly different manner. Let HTT code know. 2631 */ 2632 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2633 ar->wmi.svc_map)); 2634 2635 status = ath10k_htt_rx_alloc(&ar->htt); 2636 if (status) { 2637 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2638 goto err_htt_tx_detach; 2639 } 2640 2641 status = ath10k_hif_start(ar); 2642 if (status) { 2643 ath10k_err(ar, "could not start HIF: %d\n", status); 2644 goto err_htt_rx_detach; 2645 } 2646 2647 status = ath10k_htc_wait_target(&ar->htc); 2648 if (status) { 2649 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2650 goto err_hif_stop; 2651 } 2652 2653 status = ath10k_hif_swap_mailbox(ar); 2654 if (status) { 2655 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 2656 goto err_hif_stop; 2657 } 2658 2659 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2660 status = ath10k_htt_connect(&ar->htt); 2661 if (status) { 2662 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2663 goto err_hif_stop; 2664 } 2665 } 2666 2667 status = ath10k_wmi_connect(ar); 2668 if (status) { 2669 ath10k_err(ar, "could not connect wmi: %d\n", status); 2670 goto err_hif_stop; 2671 } 2672 2673 status = ath10k_htc_start(&ar->htc); 2674 if (status) { 2675 ath10k_err(ar, "failed to start htc: %d\n", status); 2676 goto err_hif_stop; 2677 } 2678 2679 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2680 status = ath10k_wmi_wait_for_service_ready(ar); 2681 if (status) { 2682 ath10k_warn(ar, "wmi service ready event not received"); 2683 goto err_hif_stop; 2684 } 2685 } 2686 2687 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2688 ar->hw->wiphy->fw_version); 2689 2690 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2691 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2692 val = 0; 2693 if (ath10k_peer_stats_enabled(ar)) 2694 val = WMI_10_4_PEER_STATS; 2695 2696 /* Enable vdev stats by default */ 2697 val |= WMI_10_4_VDEV_STATS; 2698 2699 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2700 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2701 2702 /* 10.4 firmware supports BT-Coex without reloading firmware 2703 * via pdev param. To support Bluetooth coexistence pdev param, 2704 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2705 * enabled always. 2706 */ 2707 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2708 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2709 ar->running_fw->fw_file.fw_features)) 2710 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2711 2712 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2713 ar->wmi.svc_map)) 2714 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2715 2716 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2717 ar->wmi.svc_map)) 2718 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2719 2720 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2721 ar->wmi.svc_map)) 2722 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2723 2724 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 2725 val |= WMI_10_4_REPORT_AIRTIME; 2726 2727 status = ath10k_mac_ext_resource_config(ar, val); 2728 if (status) { 2729 ath10k_err(ar, 2730 "failed to send ext resource cfg command : %d\n", 2731 status); 2732 goto err_hif_stop; 2733 } 2734 } 2735 2736 status = ath10k_wmi_cmd_init(ar); 2737 if (status) { 2738 ath10k_err(ar, "could not send WMI init command (%d)\n", 2739 status); 2740 goto err_hif_stop; 2741 } 2742 2743 status = ath10k_wmi_wait_for_unified_ready(ar); 2744 if (status) { 2745 ath10k_err(ar, "wmi unified ready event not received\n"); 2746 goto err_hif_stop; 2747 } 2748 2749 status = ath10k_core_compat_services(ar); 2750 if (status) { 2751 ath10k_err(ar, "compat services failed: %d\n", status); 2752 goto err_hif_stop; 2753 } 2754 2755 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 2756 if (status && status != -EOPNOTSUPP) { 2757 ath10k_err(ar, 2758 "failed to set base mac address: %d\n", status); 2759 goto err_hif_stop; 2760 } 2761 2762 /* Some firmware revisions do not properly set up hardware rx filter 2763 * registers. 2764 * 2765 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2766 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2767 * any frames that matches MAC_PCU_RX_FILTER which is also 2768 * misconfigured to accept anything. 2769 * 2770 * The ADDR1 is programmed using internal firmware structure field and 2771 * can't be (easily/sanely) reached from the driver explicitly. It is 2772 * possible to implicitly make it correct by creating a dummy vdev and 2773 * then deleting it. 2774 */ 2775 if (ar->hw_params.hw_filter_reset_required && 2776 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2777 status = ath10k_core_reset_rx_filter(ar); 2778 if (status) { 2779 ath10k_err(ar, 2780 "failed to reset rx filter: %d\n", status); 2781 goto err_hif_stop; 2782 } 2783 } 2784 2785 status = ath10k_htt_rx_ring_refill(ar); 2786 if (status) { 2787 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2788 goto err_hif_stop; 2789 } 2790 2791 if (ar->max_num_vdevs >= 64) 2792 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2793 else 2794 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2795 2796 INIT_LIST_HEAD(&ar->arvifs); 2797 2798 /* we don't care about HTT in UTF mode */ 2799 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2800 status = ath10k_htt_setup(&ar->htt); 2801 if (status) { 2802 ath10k_err(ar, "failed to setup htt: %d\n", status); 2803 goto err_hif_stop; 2804 } 2805 } 2806 2807 status = ath10k_debug_start(ar); 2808 if (status) 2809 goto err_hif_stop; 2810 2811 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 2812 if (status && status != -EOPNOTSUPP) { 2813 ath10k_warn(ar, "set target log mode failed: %d\n", status); 2814 goto err_hif_stop; 2815 } 2816 2817 return 0; 2818 2819 err_hif_stop: 2820 ath10k_hif_stop(ar); 2821 err_htt_rx_detach: 2822 ath10k_htt_rx_free(&ar->htt); 2823 err_htt_tx_detach: 2824 ath10k_htt_tx_free(&ar->htt); 2825 err_wmi_detach: 2826 ath10k_wmi_detach(ar); 2827 err: 2828 return status; 2829 } 2830 EXPORT_SYMBOL(ath10k_core_start); 2831 2832 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2833 { 2834 int ret; 2835 unsigned long time_left; 2836 2837 reinit_completion(&ar->target_suspend); 2838 2839 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2840 if (ret) { 2841 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2842 return ret; 2843 } 2844 2845 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2846 2847 if (!time_left) { 2848 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2849 return -ETIMEDOUT; 2850 } 2851 2852 return 0; 2853 } 2854 2855 void ath10k_core_stop(struct ath10k *ar) 2856 { 2857 lockdep_assert_held(&ar->conf_mutex); 2858 ath10k_debug_stop(ar); 2859 2860 /* try to suspend target */ 2861 if (ar->state != ATH10K_STATE_RESTARTING && 2862 ar->state != ATH10K_STATE_UTF) 2863 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2864 2865 ath10k_hif_stop(ar); 2866 ath10k_htt_tx_stop(&ar->htt); 2867 ath10k_htt_rx_free(&ar->htt); 2868 ath10k_wmi_detach(ar); 2869 } 2870 EXPORT_SYMBOL(ath10k_core_stop); 2871 2872 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2873 * order to know what hw capabilities should be advertised to mac80211 it is 2874 * necessary to load the firmware (and tear it down immediately since start 2875 * hook will try to init it again) before registering 2876 */ 2877 static int ath10k_core_probe_fw(struct ath10k *ar) 2878 { 2879 struct bmi_target_info target_info; 2880 int ret = 0; 2881 2882 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 2883 if (ret) { 2884 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2885 return ret; 2886 } 2887 2888 switch (ar->hif.bus) { 2889 case ATH10K_BUS_SDIO: 2890 memset(&target_info, 0, sizeof(target_info)); 2891 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2892 if (ret) { 2893 ath10k_err(ar, "could not get target info (%d)\n", ret); 2894 goto err_power_down; 2895 } 2896 ar->target_version = target_info.version; 2897 ar->hw->wiphy->hw_version = target_info.version; 2898 break; 2899 case ATH10K_BUS_PCI: 2900 case ATH10K_BUS_AHB: 2901 case ATH10K_BUS_USB: 2902 memset(&target_info, 0, sizeof(target_info)); 2903 ret = ath10k_bmi_get_target_info(ar, &target_info); 2904 if (ret) { 2905 ath10k_err(ar, "could not get target info (%d)\n", ret); 2906 goto err_power_down; 2907 } 2908 ar->target_version = target_info.version; 2909 ar->hw->wiphy->hw_version = target_info.version; 2910 break; 2911 case ATH10K_BUS_SNOC: 2912 memset(&target_info, 0, sizeof(target_info)); 2913 ret = ath10k_hif_get_target_info(ar, &target_info); 2914 if (ret) { 2915 ath10k_err(ar, "could not get target info (%d)\n", ret); 2916 goto err_power_down; 2917 } 2918 ar->target_version = target_info.version; 2919 ar->hw->wiphy->hw_version = target_info.version; 2920 break; 2921 default: 2922 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2923 } 2924 2925 ret = ath10k_init_hw_params(ar); 2926 if (ret) { 2927 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2928 goto err_power_down; 2929 } 2930 2931 ret = ath10k_core_fetch_firmware_files(ar); 2932 if (ret) { 2933 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2934 goto err_power_down; 2935 } 2936 2937 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2938 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2939 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2940 sizeof(ar->hw->wiphy->fw_version)); 2941 2942 ath10k_debug_print_hwfw_info(ar); 2943 2944 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2945 ar->normal_mode_fw.fw_file.fw_features)) { 2946 ret = ath10k_core_pre_cal_download(ar); 2947 if (ret) { 2948 /* pre calibration data download is not necessary 2949 * for all the chipsets. Ignore failures and continue. 2950 */ 2951 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2952 "could not load pre cal data: %d\n", ret); 2953 } 2954 2955 ret = ath10k_core_get_board_id_from_otp(ar); 2956 if (ret && ret != -EOPNOTSUPP) { 2957 ath10k_err(ar, "failed to get board id from otp: %d\n", 2958 ret); 2959 goto err_free_firmware_files; 2960 } 2961 2962 ret = ath10k_core_check_smbios(ar); 2963 if (ret) 2964 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2965 2966 ret = ath10k_core_check_dt(ar); 2967 if (ret) 2968 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2969 2970 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2971 if (ret) { 2972 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2973 goto err_free_firmware_files; 2974 } 2975 2976 ath10k_debug_print_board_info(ar); 2977 } 2978 2979 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2980 2981 ret = ath10k_core_init_firmware_features(ar); 2982 if (ret) { 2983 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2984 ret); 2985 goto err_free_firmware_files; 2986 } 2987 2988 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2989 ar->normal_mode_fw.fw_file.fw_features)) { 2990 ret = ath10k_swap_code_seg_init(ar, 2991 &ar->normal_mode_fw.fw_file); 2992 if (ret) { 2993 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2994 ret); 2995 goto err_free_firmware_files; 2996 } 2997 } 2998 2999 mutex_lock(&ar->conf_mutex); 3000 3001 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 3002 &ar->normal_mode_fw); 3003 if (ret) { 3004 ath10k_err(ar, "could not init core (%d)\n", ret); 3005 goto err_unlock; 3006 } 3007 3008 ath10k_debug_print_boot_info(ar); 3009 ath10k_core_stop(ar); 3010 3011 mutex_unlock(&ar->conf_mutex); 3012 3013 ath10k_hif_power_down(ar); 3014 return 0; 3015 3016 err_unlock: 3017 mutex_unlock(&ar->conf_mutex); 3018 3019 err_free_firmware_files: 3020 ath10k_core_free_firmware_files(ar); 3021 3022 err_power_down: 3023 ath10k_hif_power_down(ar); 3024 3025 return ret; 3026 } 3027 3028 static void ath10k_core_register_work(struct work_struct *work) 3029 { 3030 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3031 int status; 3032 3033 /* peer stats are enabled by default */ 3034 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3035 3036 status = ath10k_core_probe_fw(ar); 3037 if (status) { 3038 ath10k_err(ar, "could not probe fw (%d)\n", status); 3039 goto err; 3040 } 3041 3042 status = ath10k_mac_register(ar); 3043 if (status) { 3044 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3045 goto err_release_fw; 3046 } 3047 3048 status = ath10k_coredump_register(ar); 3049 if (status) { 3050 ath10k_err(ar, "unable to register coredump\n"); 3051 goto err_unregister_mac; 3052 } 3053 3054 status = ath10k_debug_register(ar); 3055 if (status) { 3056 ath10k_err(ar, "unable to initialize debugfs\n"); 3057 goto err_unregister_coredump; 3058 } 3059 3060 status = ath10k_spectral_create(ar); 3061 if (status) { 3062 ath10k_err(ar, "failed to initialize spectral\n"); 3063 goto err_debug_destroy; 3064 } 3065 3066 status = ath10k_thermal_register(ar); 3067 if (status) { 3068 ath10k_err(ar, "could not register thermal device: %d\n", 3069 status); 3070 goto err_spectral_destroy; 3071 } 3072 3073 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3074 return; 3075 3076 err_spectral_destroy: 3077 ath10k_spectral_destroy(ar); 3078 err_debug_destroy: 3079 ath10k_debug_destroy(ar); 3080 err_unregister_coredump: 3081 ath10k_coredump_unregister(ar); 3082 err_unregister_mac: 3083 ath10k_mac_unregister(ar); 3084 err_release_fw: 3085 ath10k_core_free_firmware_files(ar); 3086 err: 3087 /* TODO: It's probably a good idea to release device from the driver 3088 * but calling device_release_driver() here will cause a deadlock. 3089 */ 3090 return; 3091 } 3092 3093 int ath10k_core_register(struct ath10k *ar, 3094 const struct ath10k_bus_params *bus_params) 3095 { 3096 ar->bus_param = *bus_params; 3097 3098 queue_work(ar->workqueue, &ar->register_work); 3099 3100 return 0; 3101 } 3102 EXPORT_SYMBOL(ath10k_core_register); 3103 3104 void ath10k_core_unregister(struct ath10k *ar) 3105 { 3106 cancel_work_sync(&ar->register_work); 3107 3108 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3109 return; 3110 3111 ath10k_thermal_unregister(ar); 3112 /* Stop spectral before unregistering from mac80211 to remove the 3113 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3114 * would be already be free'd recursively, leading to a double free. 3115 */ 3116 ath10k_spectral_destroy(ar); 3117 3118 /* We must unregister from mac80211 before we stop HTC and HIF. 3119 * Otherwise we will fail to submit commands to FW and mac80211 will be 3120 * unhappy about callback failures. 3121 */ 3122 ath10k_mac_unregister(ar); 3123 3124 ath10k_testmode_destroy(ar); 3125 3126 ath10k_core_free_firmware_files(ar); 3127 ath10k_core_free_board_files(ar); 3128 3129 ath10k_debug_unregister(ar); 3130 } 3131 EXPORT_SYMBOL(ath10k_core_unregister); 3132 3133 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3134 enum ath10k_bus bus, 3135 enum ath10k_hw_rev hw_rev, 3136 const struct ath10k_hif_ops *hif_ops) 3137 { 3138 struct ath10k *ar; 3139 int ret; 3140 3141 ar = ath10k_mac_create(priv_size); 3142 if (!ar) 3143 return NULL; 3144 3145 ar->ath_common.priv = ar; 3146 ar->ath_common.hw = ar->hw; 3147 ar->dev = dev; 3148 ar->hw_rev = hw_rev; 3149 ar->hif.ops = hif_ops; 3150 ar->hif.bus = bus; 3151 3152 switch (hw_rev) { 3153 case ATH10K_HW_QCA988X: 3154 case ATH10K_HW_QCA9887: 3155 ar->regs = &qca988x_regs; 3156 ar->hw_ce_regs = &qcax_ce_regs; 3157 ar->hw_values = &qca988x_values; 3158 break; 3159 case ATH10K_HW_QCA6174: 3160 case ATH10K_HW_QCA9377: 3161 ar->regs = &qca6174_regs; 3162 ar->hw_ce_regs = &qcax_ce_regs; 3163 ar->hw_values = &qca6174_values; 3164 break; 3165 case ATH10K_HW_QCA99X0: 3166 case ATH10K_HW_QCA9984: 3167 ar->regs = &qca99x0_regs; 3168 ar->hw_ce_regs = &qcax_ce_regs; 3169 ar->hw_values = &qca99x0_values; 3170 break; 3171 case ATH10K_HW_QCA9888: 3172 ar->regs = &qca99x0_regs; 3173 ar->hw_ce_regs = &qcax_ce_regs; 3174 ar->hw_values = &qca9888_values; 3175 break; 3176 case ATH10K_HW_QCA4019: 3177 ar->regs = &qca4019_regs; 3178 ar->hw_ce_regs = &qcax_ce_regs; 3179 ar->hw_values = &qca4019_values; 3180 break; 3181 case ATH10K_HW_WCN3990: 3182 ar->regs = &wcn3990_regs; 3183 ar->hw_ce_regs = &wcn3990_ce_regs; 3184 ar->hw_values = &wcn3990_values; 3185 break; 3186 default: 3187 ath10k_err(ar, "unsupported core hardware revision %d\n", 3188 hw_rev); 3189 ret = -ENOTSUPP; 3190 goto err_free_mac; 3191 } 3192 3193 init_completion(&ar->scan.started); 3194 init_completion(&ar->scan.completed); 3195 init_completion(&ar->scan.on_channel); 3196 init_completion(&ar->target_suspend); 3197 init_completion(&ar->driver_recovery); 3198 init_completion(&ar->wow.wakeup_completed); 3199 3200 init_completion(&ar->install_key_done); 3201 init_completion(&ar->vdev_setup_done); 3202 init_completion(&ar->vdev_delete_done); 3203 init_completion(&ar->thermal.wmi_sync); 3204 init_completion(&ar->bss_survey_done); 3205 init_completion(&ar->peer_delete_done); 3206 3207 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3208 3209 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3210 if (!ar->workqueue) 3211 goto err_free_mac; 3212 3213 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3214 if (!ar->workqueue_aux) 3215 goto err_free_wq; 3216 3217 mutex_init(&ar->conf_mutex); 3218 mutex_init(&ar->dump_mutex); 3219 spin_lock_init(&ar->data_lock); 3220 3221 INIT_LIST_HEAD(&ar->peers); 3222 init_waitqueue_head(&ar->peer_mapping_wq); 3223 init_waitqueue_head(&ar->htt.empty_tx_wq); 3224 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3225 3226 init_completion(&ar->offchan_tx_completed); 3227 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3228 skb_queue_head_init(&ar->offchan_tx_queue); 3229 3230 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3231 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3232 3233 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3234 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3235 INIT_WORK(&ar->set_coverage_class_work, 3236 ath10k_core_set_coverage_class_work); 3237 3238 init_dummy_netdev(&ar->napi_dev); 3239 3240 ret = ath10k_coredump_create(ar); 3241 if (ret) 3242 goto err_free_aux_wq; 3243 3244 ret = ath10k_debug_create(ar); 3245 if (ret) 3246 goto err_free_coredump; 3247 3248 return ar; 3249 3250 err_free_coredump: 3251 ath10k_coredump_destroy(ar); 3252 3253 err_free_aux_wq: 3254 destroy_workqueue(ar->workqueue_aux); 3255 err_free_wq: 3256 destroy_workqueue(ar->workqueue); 3257 3258 err_free_mac: 3259 ath10k_mac_destroy(ar); 3260 3261 return NULL; 3262 } 3263 EXPORT_SYMBOL(ath10k_core_create); 3264 3265 void ath10k_core_destroy(struct ath10k *ar) 3266 { 3267 flush_workqueue(ar->workqueue); 3268 destroy_workqueue(ar->workqueue); 3269 3270 flush_workqueue(ar->workqueue_aux); 3271 destroy_workqueue(ar->workqueue_aux); 3272 3273 ath10k_debug_destroy(ar); 3274 ath10k_coredump_destroy(ar); 3275 ath10k_htt_tx_destroy(&ar->htt); 3276 ath10k_wmi_free_host_mem(ar); 3277 ath10k_mac_destroy(ar); 3278 } 3279 EXPORT_SYMBOL(ath10k_core_destroy); 3280 3281 MODULE_AUTHOR("Qualcomm Atheros"); 3282 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3283 MODULE_LICENSE("Dual BSD/GPL"); 3284