1 // SPDX-License-Identifier: ISC 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 5 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved. 6 */ 7 8 #include <linux/module.h> 9 #include <linux/firmware.h> 10 #include <linux/of.h> 11 #include <linux/property.h> 12 #include <linux/dmi.h> 13 #include <linux/ctype.h> 14 #include <linux/pm_qos.h> 15 #include <asm/byteorder.h> 16 17 #include "core.h" 18 #include "mac.h" 19 #include "htc.h" 20 #include "hif.h" 21 #include "wmi.h" 22 #include "bmi.h" 23 #include "debug.h" 24 #include "htt.h" 25 #include "testmode.h" 26 #include "wmi-ops.h" 27 #include "coredump.h" 28 29 unsigned int ath10k_debug_mask; 30 EXPORT_SYMBOL(ath10k_debug_mask); 31 32 static unsigned int ath10k_cryptmode_param; 33 static bool uart_print; 34 static bool skip_otp; 35 static bool rawmode; 36 static bool fw_diag_log; 37 38 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 39 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 40 41 /* FIXME: most of these should be readonly */ 42 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 43 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 44 module_param(uart_print, bool, 0644); 45 module_param(skip_otp, bool, 0644); 46 module_param(rawmode, bool, 0644); 47 module_param(fw_diag_log, bool, 0644); 48 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 49 50 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 51 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 52 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 53 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 54 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 55 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 56 MODULE_PARM_DESC(fw_diag_log, "Diag based fw log debugging"); 57 58 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 59 { 60 .id = QCA988X_HW_2_0_VERSION, 61 .dev_id = QCA988X_2_0_DEVICE_ID, 62 .bus = ATH10K_BUS_PCI, 63 .name = "qca988x hw2.0", 64 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 65 .uart_pin = 7, 66 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 67 .otp_exe_param = 0, 68 .channel_counters_freq_hz = 88000, 69 .max_probe_resp_desc_thres = 0, 70 .cal_data_len = 2116, 71 .fw = { 72 .dir = QCA988X_HW_2_0_FW_DIR, 73 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 74 .board_size = QCA988X_BOARD_DATA_SZ, 75 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 76 }, 77 .hw_ops = &qca988x_ops, 78 .decap_align_bytes = 4, 79 .spectral_bin_discard = 0, 80 .spectral_bin_offset = 0, 81 .vht160_mcs_rx_highest = 0, 82 .vht160_mcs_tx_highest = 0, 83 .n_cipher_suites = 8, 84 .ast_skid_limit = 0x10, 85 .num_wds_entries = 0x20, 86 .target_64bit = false, 87 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 88 .shadow_reg_support = false, 89 .rri_on_ddr = false, 90 .hw_filter_reset_required = true, 91 .fw_diag_ce_download = false, 92 .tx_stats_over_pktlog = true, 93 }, 94 { 95 .id = QCA988X_HW_2_0_VERSION, 96 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 97 .name = "qca988x hw2.0 ubiquiti", 98 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 99 .uart_pin = 7, 100 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 101 .otp_exe_param = 0, 102 .channel_counters_freq_hz = 88000, 103 .max_probe_resp_desc_thres = 0, 104 .cal_data_len = 2116, 105 .fw = { 106 .dir = QCA988X_HW_2_0_FW_DIR, 107 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 108 .board_size = QCA988X_BOARD_DATA_SZ, 109 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 110 }, 111 .hw_ops = &qca988x_ops, 112 .decap_align_bytes = 4, 113 .spectral_bin_discard = 0, 114 .spectral_bin_offset = 0, 115 .vht160_mcs_rx_highest = 0, 116 .vht160_mcs_tx_highest = 0, 117 .n_cipher_suites = 8, 118 .ast_skid_limit = 0x10, 119 .num_wds_entries = 0x20, 120 .target_64bit = false, 121 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 122 .per_ce_irq = false, 123 .shadow_reg_support = false, 124 .rri_on_ddr = false, 125 .hw_filter_reset_required = true, 126 .fw_diag_ce_download = false, 127 .tx_stats_over_pktlog = true, 128 }, 129 { 130 .id = QCA9887_HW_1_0_VERSION, 131 .dev_id = QCA9887_1_0_DEVICE_ID, 132 .bus = ATH10K_BUS_PCI, 133 .name = "qca9887 hw1.0", 134 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 135 .uart_pin = 7, 136 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 2116, 141 .fw = { 142 .dir = QCA9887_HW_1_0_FW_DIR, 143 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 144 .board_size = QCA9887_BOARD_DATA_SZ, 145 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 .spectral_bin_discard = 0, 150 .spectral_bin_offset = 0, 151 .vht160_mcs_rx_highest = 0, 152 .vht160_mcs_tx_highest = 0, 153 .n_cipher_suites = 8, 154 .ast_skid_limit = 0x10, 155 .num_wds_entries = 0x20, 156 .target_64bit = false, 157 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 158 .per_ce_irq = false, 159 .shadow_reg_support = false, 160 .rri_on_ddr = false, 161 .hw_filter_reset_required = true, 162 .fw_diag_ce_download = false, 163 .tx_stats_over_pktlog = false, 164 }, 165 { 166 .id = QCA6174_HW_3_2_VERSION, 167 .dev_id = QCA6174_3_2_DEVICE_ID, 168 .bus = ATH10K_BUS_SDIO, 169 .name = "qca6174 hw3.2 sdio", 170 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 171 .uart_pin = 19, 172 .otp_exe_param = 0, 173 .channel_counters_freq_hz = 88000, 174 .max_probe_resp_desc_thres = 0, 175 .cal_data_len = 0, 176 .fw = { 177 .dir = QCA6174_HW_3_0_FW_DIR, 178 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 179 .board_size = QCA6174_BOARD_DATA_SZ, 180 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 181 }, 182 .hw_ops = &qca6174_sdio_ops, 183 .hw_clk = qca6174_clk, 184 .target_cpu_freq = 176000000, 185 .decap_align_bytes = 4, 186 .n_cipher_suites = 8, 187 .num_peers = 10, 188 .ast_skid_limit = 0x10, 189 .num_wds_entries = 0x20, 190 .uart_pin_workaround = true, 191 .tx_stats_over_pktlog = false, 192 .bmi_large_size_download = true, 193 }, 194 { 195 .id = QCA6174_HW_2_1_VERSION, 196 .dev_id = QCA6164_2_1_DEVICE_ID, 197 .bus = ATH10K_BUS_PCI, 198 .name = "qca6164 hw2.1", 199 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 200 .uart_pin = 6, 201 .otp_exe_param = 0, 202 .channel_counters_freq_hz = 88000, 203 .max_probe_resp_desc_thres = 0, 204 .cal_data_len = 8124, 205 .fw = { 206 .dir = QCA6174_HW_2_1_FW_DIR, 207 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 208 .board_size = QCA6174_BOARD_DATA_SZ, 209 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 210 }, 211 .hw_ops = &qca988x_ops, 212 .decap_align_bytes = 4, 213 .spectral_bin_discard = 0, 214 .spectral_bin_offset = 0, 215 .vht160_mcs_rx_highest = 0, 216 .vht160_mcs_tx_highest = 0, 217 .n_cipher_suites = 8, 218 .ast_skid_limit = 0x10, 219 .num_wds_entries = 0x20, 220 .target_64bit = false, 221 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 222 .per_ce_irq = false, 223 .shadow_reg_support = false, 224 .rri_on_ddr = false, 225 .hw_filter_reset_required = true, 226 .fw_diag_ce_download = false, 227 .tx_stats_over_pktlog = false, 228 }, 229 { 230 .id = QCA6174_HW_2_1_VERSION, 231 .dev_id = QCA6174_2_1_DEVICE_ID, 232 .bus = ATH10K_BUS_PCI, 233 .name = "qca6174 hw2.1", 234 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 235 .uart_pin = 6, 236 .otp_exe_param = 0, 237 .channel_counters_freq_hz = 88000, 238 .max_probe_resp_desc_thres = 0, 239 .cal_data_len = 8124, 240 .fw = { 241 .dir = QCA6174_HW_2_1_FW_DIR, 242 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 243 .board_size = QCA6174_BOARD_DATA_SZ, 244 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 245 }, 246 .hw_ops = &qca988x_ops, 247 .decap_align_bytes = 4, 248 .spectral_bin_discard = 0, 249 .spectral_bin_offset = 0, 250 .vht160_mcs_rx_highest = 0, 251 .vht160_mcs_tx_highest = 0, 252 .n_cipher_suites = 8, 253 .ast_skid_limit = 0x10, 254 .num_wds_entries = 0x20, 255 .target_64bit = false, 256 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 257 .per_ce_irq = false, 258 .shadow_reg_support = false, 259 .rri_on_ddr = false, 260 .hw_filter_reset_required = true, 261 .fw_diag_ce_download = false, 262 .tx_stats_over_pktlog = false, 263 }, 264 { 265 .id = QCA6174_HW_3_0_VERSION, 266 .dev_id = QCA6174_2_1_DEVICE_ID, 267 .bus = ATH10K_BUS_PCI, 268 .name = "qca6174 hw3.0", 269 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 270 .uart_pin = 6, 271 .otp_exe_param = 0, 272 .channel_counters_freq_hz = 88000, 273 .max_probe_resp_desc_thres = 0, 274 .cal_data_len = 8124, 275 .fw = { 276 .dir = QCA6174_HW_3_0_FW_DIR, 277 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 278 .board_size = QCA6174_BOARD_DATA_SZ, 279 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 280 }, 281 .hw_ops = &qca988x_ops, 282 .decap_align_bytes = 4, 283 .spectral_bin_discard = 0, 284 .spectral_bin_offset = 0, 285 .vht160_mcs_rx_highest = 0, 286 .vht160_mcs_tx_highest = 0, 287 .n_cipher_suites = 8, 288 .ast_skid_limit = 0x10, 289 .num_wds_entries = 0x20, 290 .target_64bit = false, 291 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 292 .per_ce_irq = false, 293 .shadow_reg_support = false, 294 .rri_on_ddr = false, 295 .hw_filter_reset_required = true, 296 .fw_diag_ce_download = false, 297 .tx_stats_over_pktlog = false, 298 }, 299 { 300 .id = QCA6174_HW_3_2_VERSION, 301 .dev_id = QCA6174_2_1_DEVICE_ID, 302 .bus = ATH10K_BUS_PCI, 303 .name = "qca6174 hw3.2", 304 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 305 .uart_pin = 6, 306 .otp_exe_param = 0, 307 .channel_counters_freq_hz = 88000, 308 .max_probe_resp_desc_thres = 0, 309 .cal_data_len = 8124, 310 .fw = { 311 /* uses same binaries as hw3.0 */ 312 .dir = QCA6174_HW_3_0_FW_DIR, 313 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 314 .board_size = QCA6174_BOARD_DATA_SZ, 315 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 316 }, 317 .hw_ops = &qca6174_ops, 318 .hw_clk = qca6174_clk, 319 .target_cpu_freq = 176000000, 320 .decap_align_bytes = 4, 321 .spectral_bin_discard = 0, 322 .spectral_bin_offset = 0, 323 .vht160_mcs_rx_highest = 0, 324 .vht160_mcs_tx_highest = 0, 325 .n_cipher_suites = 8, 326 .ast_skid_limit = 0x10, 327 .num_wds_entries = 0x20, 328 .target_64bit = false, 329 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 330 .per_ce_irq = false, 331 .shadow_reg_support = false, 332 .rri_on_ddr = false, 333 .hw_filter_reset_required = true, 334 .fw_diag_ce_download = true, 335 .tx_stats_over_pktlog = false, 336 }, 337 { 338 .id = QCA99X0_HW_2_0_DEV_VERSION, 339 .dev_id = QCA99X0_2_0_DEVICE_ID, 340 .bus = ATH10K_BUS_PCI, 341 .name = "qca99x0 hw2.0", 342 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 343 .uart_pin = 7, 344 .otp_exe_param = 0x00000700, 345 .continuous_frag_desc = true, 346 .cck_rate_map_rev2 = true, 347 .channel_counters_freq_hz = 150000, 348 .max_probe_resp_desc_thres = 24, 349 .tx_chain_mask = 0xf, 350 .rx_chain_mask = 0xf, 351 .max_spatial_stream = 4, 352 .cal_data_len = 12064, 353 .fw = { 354 .dir = QCA99X0_HW_2_0_FW_DIR, 355 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 356 .board_size = QCA99X0_BOARD_DATA_SZ, 357 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 358 }, 359 .sw_decrypt_mcast_mgmt = true, 360 .hw_ops = &qca99x0_ops, 361 .decap_align_bytes = 1, 362 .spectral_bin_discard = 4, 363 .spectral_bin_offset = 0, 364 .vht160_mcs_rx_highest = 0, 365 .vht160_mcs_tx_highest = 0, 366 .n_cipher_suites = 11, 367 .ast_skid_limit = 0x10, 368 .num_wds_entries = 0x20, 369 .target_64bit = false, 370 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 371 .per_ce_irq = false, 372 .shadow_reg_support = false, 373 .rri_on_ddr = false, 374 .hw_filter_reset_required = true, 375 .fw_diag_ce_download = false, 376 .tx_stats_over_pktlog = false, 377 }, 378 { 379 .id = QCA9984_HW_1_0_DEV_VERSION, 380 .dev_id = QCA9984_1_0_DEVICE_ID, 381 .bus = ATH10K_BUS_PCI, 382 .name = "qca9984/qca9994 hw1.0", 383 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 384 .uart_pin = 7, 385 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 386 .otp_exe_param = 0x00000700, 387 .continuous_frag_desc = true, 388 .cck_rate_map_rev2 = true, 389 .channel_counters_freq_hz = 150000, 390 .max_probe_resp_desc_thres = 24, 391 .tx_chain_mask = 0xf, 392 .rx_chain_mask = 0xf, 393 .max_spatial_stream = 4, 394 .cal_data_len = 12064, 395 .fw = { 396 .dir = QCA9984_HW_1_0_FW_DIR, 397 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 398 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 399 .board_size = QCA99X0_BOARD_DATA_SZ, 400 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 401 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 402 }, 403 .sw_decrypt_mcast_mgmt = true, 404 .hw_ops = &qca99x0_ops, 405 .decap_align_bytes = 1, 406 .spectral_bin_discard = 12, 407 .spectral_bin_offset = 8, 408 409 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 410 * or 2x2 160Mhz, long-guard-interval. 411 */ 412 .vht160_mcs_rx_highest = 1560, 413 .vht160_mcs_tx_highest = 1560, 414 .n_cipher_suites = 11, 415 .ast_skid_limit = 0x10, 416 .num_wds_entries = 0x20, 417 .target_64bit = false, 418 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 419 .per_ce_irq = false, 420 .shadow_reg_support = false, 421 .rri_on_ddr = false, 422 .hw_filter_reset_required = true, 423 .fw_diag_ce_download = false, 424 .tx_stats_over_pktlog = false, 425 }, 426 { 427 .id = QCA9888_HW_2_0_DEV_VERSION, 428 .dev_id = QCA9888_2_0_DEVICE_ID, 429 .bus = ATH10K_BUS_PCI, 430 .name = "qca9888 hw2.0", 431 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 432 .uart_pin = 7, 433 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 434 .otp_exe_param = 0x00000700, 435 .continuous_frag_desc = true, 436 .channel_counters_freq_hz = 150000, 437 .max_probe_resp_desc_thres = 24, 438 .tx_chain_mask = 3, 439 .rx_chain_mask = 3, 440 .max_spatial_stream = 2, 441 .cal_data_len = 12064, 442 .fw = { 443 .dir = QCA9888_HW_2_0_FW_DIR, 444 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 445 .board_size = QCA99X0_BOARD_DATA_SZ, 446 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 447 }, 448 .sw_decrypt_mcast_mgmt = true, 449 .hw_ops = &qca99x0_ops, 450 .decap_align_bytes = 1, 451 .spectral_bin_discard = 12, 452 .spectral_bin_offset = 8, 453 454 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 455 * 1x1 160Mhz, long-guard-interval. 456 */ 457 .vht160_mcs_rx_highest = 780, 458 .vht160_mcs_tx_highest = 780, 459 .n_cipher_suites = 11, 460 .ast_skid_limit = 0x10, 461 .num_wds_entries = 0x20, 462 .target_64bit = false, 463 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 464 .per_ce_irq = false, 465 .shadow_reg_support = false, 466 .rri_on_ddr = false, 467 .hw_filter_reset_required = true, 468 .fw_diag_ce_download = false, 469 .tx_stats_over_pktlog = false, 470 }, 471 { 472 .id = QCA9377_HW_1_0_DEV_VERSION, 473 .dev_id = QCA9377_1_0_DEVICE_ID, 474 .bus = ATH10K_BUS_PCI, 475 .name = "qca9377 hw1.0", 476 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 477 .uart_pin = 6, 478 .otp_exe_param = 0, 479 .channel_counters_freq_hz = 88000, 480 .max_probe_resp_desc_thres = 0, 481 .cal_data_len = 8124, 482 .fw = { 483 .dir = QCA9377_HW_1_0_FW_DIR, 484 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 485 .board_size = QCA9377_BOARD_DATA_SZ, 486 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 487 }, 488 .hw_ops = &qca988x_ops, 489 .decap_align_bytes = 4, 490 .spectral_bin_discard = 0, 491 .spectral_bin_offset = 0, 492 .vht160_mcs_rx_highest = 0, 493 .vht160_mcs_tx_highest = 0, 494 .n_cipher_suites = 8, 495 .ast_skid_limit = 0x10, 496 .num_wds_entries = 0x20, 497 .target_64bit = false, 498 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 499 .per_ce_irq = false, 500 .shadow_reg_support = false, 501 .rri_on_ddr = false, 502 .hw_filter_reset_required = true, 503 .fw_diag_ce_download = false, 504 .tx_stats_over_pktlog = false, 505 }, 506 { 507 .id = QCA9377_HW_1_1_DEV_VERSION, 508 .dev_id = QCA9377_1_0_DEVICE_ID, 509 .bus = ATH10K_BUS_PCI, 510 .name = "qca9377 hw1.1", 511 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 512 .uart_pin = 6, 513 .otp_exe_param = 0, 514 .channel_counters_freq_hz = 88000, 515 .max_probe_resp_desc_thres = 0, 516 .cal_data_len = 8124, 517 .fw = { 518 .dir = QCA9377_HW_1_0_FW_DIR, 519 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 520 .board_size = QCA9377_BOARD_DATA_SZ, 521 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 522 }, 523 .hw_ops = &qca6174_ops, 524 .hw_clk = qca6174_clk, 525 .target_cpu_freq = 176000000, 526 .decap_align_bytes = 4, 527 .spectral_bin_discard = 0, 528 .spectral_bin_offset = 0, 529 .vht160_mcs_rx_highest = 0, 530 .vht160_mcs_tx_highest = 0, 531 .n_cipher_suites = 8, 532 .ast_skid_limit = 0x10, 533 .num_wds_entries = 0x20, 534 .target_64bit = false, 535 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 536 .per_ce_irq = false, 537 .shadow_reg_support = false, 538 .rri_on_ddr = false, 539 .hw_filter_reset_required = true, 540 .fw_diag_ce_download = true, 541 .tx_stats_over_pktlog = false, 542 }, 543 { 544 .id = QCA4019_HW_1_0_DEV_VERSION, 545 .dev_id = 0, 546 .bus = ATH10K_BUS_AHB, 547 .name = "qca4019 hw1.0", 548 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 549 .uart_pin = 7, 550 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 551 .otp_exe_param = 0x0010000, 552 .continuous_frag_desc = true, 553 .cck_rate_map_rev2 = true, 554 .channel_counters_freq_hz = 125000, 555 .max_probe_resp_desc_thres = 24, 556 .tx_chain_mask = 0x3, 557 .rx_chain_mask = 0x3, 558 .max_spatial_stream = 2, 559 .cal_data_len = 12064, 560 .fw = { 561 .dir = QCA4019_HW_1_0_FW_DIR, 562 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 563 .board_size = QCA4019_BOARD_DATA_SZ, 564 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 565 }, 566 .sw_decrypt_mcast_mgmt = true, 567 .hw_ops = &qca99x0_ops, 568 .decap_align_bytes = 1, 569 .spectral_bin_discard = 4, 570 .spectral_bin_offset = 0, 571 .vht160_mcs_rx_highest = 0, 572 .vht160_mcs_tx_highest = 0, 573 .n_cipher_suites = 11, 574 .ast_skid_limit = 0x10, 575 .num_wds_entries = 0x20, 576 .target_64bit = false, 577 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 578 .per_ce_irq = false, 579 .shadow_reg_support = false, 580 .rri_on_ddr = false, 581 .hw_filter_reset_required = true, 582 .fw_diag_ce_download = false, 583 .tx_stats_over_pktlog = false, 584 }, 585 { 586 .id = WCN3990_HW_1_0_DEV_VERSION, 587 .dev_id = 0, 588 .bus = ATH10K_BUS_SNOC, 589 .name = "wcn3990 hw1.0", 590 .continuous_frag_desc = true, 591 .tx_chain_mask = 0x7, 592 .rx_chain_mask = 0x7, 593 .max_spatial_stream = 4, 594 .fw = { 595 .dir = WCN3990_HW_1_0_FW_DIR, 596 }, 597 .sw_decrypt_mcast_mgmt = true, 598 .hw_ops = &wcn3990_ops, 599 .decap_align_bytes = 1, 600 .num_peers = TARGET_HL_TLV_NUM_PEERS, 601 .n_cipher_suites = 11, 602 .ast_skid_limit = TARGET_HL_TLV_AST_SKID_LIMIT, 603 .num_wds_entries = TARGET_HL_TLV_NUM_WDS_ENTRIES, 604 .target_64bit = true, 605 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 606 .per_ce_irq = true, 607 .shadow_reg_support = true, 608 .rri_on_ddr = true, 609 .hw_filter_reset_required = false, 610 .fw_diag_ce_download = false, 611 .tx_stats_over_pktlog = false, 612 }, 613 }; 614 615 static const char *const ath10k_core_fw_feature_str[] = { 616 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 617 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 618 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 619 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 620 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 621 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 622 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 623 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 624 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 625 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 626 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 627 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 628 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 629 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 630 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 631 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 632 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 633 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 634 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 635 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 636 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 637 [ATH10K_FW_FEATURE_PEER_FIXED_RATE] = "peer-fixed-rate", 638 }; 639 640 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 641 size_t buf_len, 642 enum ath10k_fw_features feat) 643 { 644 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 645 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 646 ATH10K_FW_FEATURE_COUNT); 647 648 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 649 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 650 return scnprintf(buf, buf_len, "bit%d", feat); 651 } 652 653 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 654 } 655 656 void ath10k_core_get_fw_features_str(struct ath10k *ar, 657 char *buf, 658 size_t buf_len) 659 { 660 size_t len = 0; 661 int i; 662 663 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 664 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 665 if (len > 0) 666 len += scnprintf(buf + len, buf_len - len, ","); 667 668 len += ath10k_core_get_fw_feature_str(buf + len, 669 buf_len - len, 670 i); 671 } 672 } 673 } 674 675 static void ath10k_send_suspend_complete(struct ath10k *ar) 676 { 677 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 678 679 complete(&ar->target_suspend); 680 } 681 682 static int ath10k_init_sdio(struct ath10k *ar, enum ath10k_firmware_mode mode) 683 { 684 int ret; 685 u32 param = 0; 686 687 ret = ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 688 if (ret) 689 return ret; 690 691 ret = ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 692 if (ret) 693 return ret; 694 695 ret = ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 696 if (ret) 697 return ret; 698 699 /* Data transfer is not initiated, when reduced Tx completion 700 * is used for SDIO. disable it until fixed 701 */ 702 param &= ~HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET; 703 704 /* Alternate credit size of 1544 as used by SDIO firmware is 705 * not big enough for mac80211 / native wifi frames. disable it 706 */ 707 param &= ~HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE; 708 709 if (mode == ATH10K_FIRMWARE_MODE_UTF) 710 param &= ~HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 711 else 712 param |= HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET; 713 714 ret = ath10k_bmi_write32(ar, hi_acs_flags, param); 715 if (ret) 716 return ret; 717 718 return 0; 719 } 720 721 static int ath10k_init_configure_target(struct ath10k *ar) 722 { 723 u32 param_host; 724 int ret; 725 726 /* tell target which HTC version it is used*/ 727 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 728 HTC_PROTOCOL_VERSION); 729 if (ret) { 730 ath10k_err(ar, "settings HTC version failed\n"); 731 return ret; 732 } 733 734 /* set the firmware mode to STA/IBSS/AP */ 735 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 736 if (ret) { 737 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 738 return ret; 739 } 740 741 /* TODO following parameters need to be re-visited. */ 742 /* num_device */ 743 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 744 /* Firmware mode */ 745 /* FIXME: Why FW_MODE_AP ??.*/ 746 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 747 /* mac_addr_method */ 748 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 749 /* firmware_bridge */ 750 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 751 /* fwsubmode */ 752 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 753 754 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 755 if (ret) { 756 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 757 return ret; 758 } 759 760 /* We do all byte-swapping on the host */ 761 ret = ath10k_bmi_write32(ar, hi_be, 0); 762 if (ret) { 763 ath10k_err(ar, "setting host CPU BE mode failed\n"); 764 return ret; 765 } 766 767 /* FW descriptor/Data swap flags */ 768 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 769 770 if (ret) { 771 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 772 return ret; 773 } 774 775 /* Some devices have a special sanity check that verifies the PCI 776 * Device ID is written to this host interest var. It is known to be 777 * required to boot QCA6164. 778 */ 779 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 780 ar->dev_id); 781 if (ret) { 782 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 783 return ret; 784 } 785 786 return 0; 787 } 788 789 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 790 const char *dir, 791 const char *file) 792 { 793 char filename[100]; 794 const struct firmware *fw; 795 int ret; 796 797 if (file == NULL) 798 return ERR_PTR(-ENOENT); 799 800 if (dir == NULL) 801 dir = "."; 802 803 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 804 ret = firmware_request_nowarn(&fw, filename, ar->dev); 805 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 806 filename, ret); 807 808 if (ret) 809 return ERR_PTR(ret); 810 811 return fw; 812 } 813 814 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 815 size_t data_len) 816 { 817 u32 board_data_size = ar->hw_params.fw.board_size; 818 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 819 u32 board_ext_data_addr; 820 int ret; 821 822 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 823 if (ret) { 824 ath10k_err(ar, "could not read board ext data addr (%d)\n", 825 ret); 826 return ret; 827 } 828 829 ath10k_dbg(ar, ATH10K_DBG_BOOT, 830 "boot push board extended data addr 0x%x\n", 831 board_ext_data_addr); 832 833 if (board_ext_data_addr == 0) 834 return 0; 835 836 if (data_len != (board_data_size + board_ext_data_size)) { 837 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 838 data_len, board_data_size, board_ext_data_size); 839 return -EINVAL; 840 } 841 842 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 843 data + board_data_size, 844 board_ext_data_size); 845 if (ret) { 846 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 847 return ret; 848 } 849 850 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 851 (board_ext_data_size << 16) | 1); 852 if (ret) { 853 ath10k_err(ar, "could not write board ext data bit (%d)\n", 854 ret); 855 return ret; 856 } 857 858 return 0; 859 } 860 861 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 862 { 863 u32 result, address; 864 u8 board_id, chip_id; 865 bool ext_bid_support; 866 int ret, bmi_board_id_param; 867 868 address = ar->hw_params.patch_load_addr; 869 870 if (!ar->normal_mode_fw.fw_file.otp_data || 871 !ar->normal_mode_fw.fw_file.otp_len) { 872 ath10k_warn(ar, 873 "failed to retrieve board id because of invalid otp\n"); 874 return -ENODATA; 875 } 876 877 ath10k_dbg(ar, ATH10K_DBG_BOOT, 878 "boot upload otp to 0x%x len %zd for board id\n", 879 address, ar->normal_mode_fw.fw_file.otp_len); 880 881 ret = ath10k_bmi_fast_download(ar, address, 882 ar->normal_mode_fw.fw_file.otp_data, 883 ar->normal_mode_fw.fw_file.otp_len); 884 if (ret) { 885 ath10k_err(ar, "could not write otp for board id check: %d\n", 886 ret); 887 return ret; 888 } 889 890 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 891 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 892 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 893 else 894 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 895 896 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 897 if (ret) { 898 ath10k_err(ar, "could not execute otp for board id check: %d\n", 899 ret); 900 return ret; 901 } 902 903 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 904 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 905 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 906 907 ath10k_dbg(ar, ATH10K_DBG_BOOT, 908 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 909 result, board_id, chip_id, ext_bid_support); 910 911 ar->id.ext_bid_supported = ext_bid_support; 912 913 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 914 (board_id == 0)) { 915 ath10k_dbg(ar, ATH10K_DBG_BOOT, 916 "board id does not exist in otp, ignore it\n"); 917 return -EOPNOTSUPP; 918 } 919 920 ar->id.bmi_ids_valid = true; 921 ar->id.bmi_board_id = board_id; 922 ar->id.bmi_chip_id = chip_id; 923 924 return 0; 925 } 926 927 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 928 { 929 struct ath10k *ar = data; 930 const char *bdf_ext; 931 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 932 u8 bdf_enabled; 933 int i; 934 935 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 936 return; 937 938 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 939 ath10k_dbg(ar, ATH10K_DBG_BOOT, 940 "wrong smbios bdf ext type length (%d).\n", 941 hdr->length); 942 return; 943 } 944 945 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 946 if (!bdf_enabled) { 947 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 948 return; 949 } 950 951 /* Only one string exists (per spec) */ 952 bdf_ext = (char *)hdr + hdr->length; 953 954 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 955 ath10k_dbg(ar, ATH10K_DBG_BOOT, 956 "bdf variant magic does not match.\n"); 957 return; 958 } 959 960 for (i = 0; i < strlen(bdf_ext); i++) { 961 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 962 ath10k_dbg(ar, ATH10K_DBG_BOOT, 963 "bdf variant name contains non ascii chars.\n"); 964 return; 965 } 966 } 967 968 /* Copy extension name without magic suffix */ 969 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 970 sizeof(ar->id.bdf_ext)) < 0) { 971 ath10k_dbg(ar, ATH10K_DBG_BOOT, 972 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 973 bdf_ext); 974 return; 975 } 976 977 ath10k_dbg(ar, ATH10K_DBG_BOOT, 978 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 979 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 980 } 981 982 static int ath10k_core_check_smbios(struct ath10k *ar) 983 { 984 ar->id.bdf_ext[0] = '\0'; 985 dmi_walk(ath10k_core_check_bdfext, ar); 986 987 if (ar->id.bdf_ext[0] == '\0') 988 return -ENODATA; 989 990 return 0; 991 } 992 993 static int ath10k_core_check_dt(struct ath10k *ar) 994 { 995 struct device_node *node; 996 const char *variant = NULL; 997 998 node = ar->dev->of_node; 999 if (!node) 1000 return -ENOENT; 1001 1002 of_property_read_string(node, "qcom,ath10k-calibration-variant", 1003 &variant); 1004 if (!variant) 1005 return -ENODATA; 1006 1007 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 1008 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1009 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 1010 variant); 1011 1012 return 0; 1013 } 1014 1015 static int ath10k_download_fw(struct ath10k *ar) 1016 { 1017 u32 address, data_len; 1018 const void *data; 1019 int ret; 1020 struct pm_qos_request latency_qos; 1021 1022 address = ar->hw_params.patch_load_addr; 1023 1024 data = ar->running_fw->fw_file.firmware_data; 1025 data_len = ar->running_fw->fw_file.firmware_len; 1026 1027 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 1028 if (ret) { 1029 ath10k_err(ar, "failed to configure fw code swap: %d\n", 1030 ret); 1031 return ret; 1032 } 1033 1034 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1035 "boot uploading firmware image %pK len %d\n", 1036 data, data_len); 1037 1038 /* Check if device supports to download firmware via 1039 * diag copy engine. Downloading firmware via diag CE 1040 * greatly reduces the time to download firmware. 1041 */ 1042 if (ar->hw_params.fw_diag_ce_download) { 1043 ret = ath10k_hw_diag_fast_download(ar, address, 1044 data, data_len); 1045 if (ret == 0) 1046 /* firmware upload via diag ce was successful */ 1047 return 0; 1048 1049 ath10k_warn(ar, 1050 "failed to upload firmware via diag ce, trying BMI: %d", 1051 ret); 1052 } 1053 1054 memset(&latency_qos, 0, sizeof(latency_qos)); 1055 pm_qos_add_request(&latency_qos, PM_QOS_CPU_DMA_LATENCY, 0); 1056 1057 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 1058 1059 pm_qos_remove_request(&latency_qos); 1060 1061 return ret; 1062 } 1063 1064 void ath10k_core_free_board_files(struct ath10k *ar) 1065 { 1066 if (!IS_ERR(ar->normal_mode_fw.board)) 1067 release_firmware(ar->normal_mode_fw.board); 1068 1069 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1070 release_firmware(ar->normal_mode_fw.ext_board); 1071 1072 ar->normal_mode_fw.board = NULL; 1073 ar->normal_mode_fw.board_data = NULL; 1074 ar->normal_mode_fw.board_len = 0; 1075 ar->normal_mode_fw.ext_board = NULL; 1076 ar->normal_mode_fw.ext_board_data = NULL; 1077 ar->normal_mode_fw.ext_board_len = 0; 1078 } 1079 EXPORT_SYMBOL(ath10k_core_free_board_files); 1080 1081 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1082 { 1083 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1084 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1085 1086 if (!IS_ERR(ar->cal_file)) 1087 release_firmware(ar->cal_file); 1088 1089 if (!IS_ERR(ar->pre_cal_file)) 1090 release_firmware(ar->pre_cal_file); 1091 1092 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1093 1094 ar->normal_mode_fw.fw_file.otp_data = NULL; 1095 ar->normal_mode_fw.fw_file.otp_len = 0; 1096 1097 ar->normal_mode_fw.fw_file.firmware = NULL; 1098 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1099 ar->normal_mode_fw.fw_file.firmware_len = 0; 1100 1101 ar->cal_file = NULL; 1102 ar->pre_cal_file = NULL; 1103 } 1104 1105 static int ath10k_fetch_cal_file(struct ath10k *ar) 1106 { 1107 char filename[100]; 1108 1109 /* pre-cal-<bus>-<id>.bin */ 1110 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1111 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1112 1113 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1114 if (!IS_ERR(ar->pre_cal_file)) 1115 goto success; 1116 1117 /* cal-<bus>-<id>.bin */ 1118 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1119 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1120 1121 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1122 if (IS_ERR(ar->cal_file)) 1123 /* calibration file is optional, don't print any warnings */ 1124 return PTR_ERR(ar->cal_file); 1125 success: 1126 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1127 ATH10K_FW_DIR, filename); 1128 1129 return 0; 1130 } 1131 1132 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1133 { 1134 const struct firmware *fw; 1135 1136 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1137 if (!ar->hw_params.fw.board) { 1138 ath10k_err(ar, "failed to find board file fw entry\n"); 1139 return -EINVAL; 1140 } 1141 1142 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1143 ar->hw_params.fw.dir, 1144 ar->hw_params.fw.board); 1145 if (IS_ERR(ar->normal_mode_fw.board)) 1146 return PTR_ERR(ar->normal_mode_fw.board); 1147 1148 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1149 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1150 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1151 if (!ar->hw_params.fw.eboard) { 1152 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1153 return -EINVAL; 1154 } 1155 1156 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1157 ar->hw_params.fw.eboard); 1158 ar->normal_mode_fw.ext_board = fw; 1159 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1160 return PTR_ERR(ar->normal_mode_fw.ext_board); 1161 1162 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1163 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1164 } 1165 1166 return 0; 1167 } 1168 1169 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1170 const void *buf, size_t buf_len, 1171 const char *boardname, 1172 int bd_ie_type) 1173 { 1174 const struct ath10k_fw_ie *hdr; 1175 bool name_match_found; 1176 int ret, board_ie_id; 1177 size_t board_ie_len; 1178 const void *board_ie_data; 1179 1180 name_match_found = false; 1181 1182 /* go through ATH10K_BD_IE_BOARD_ elements */ 1183 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1184 hdr = buf; 1185 board_ie_id = le32_to_cpu(hdr->id); 1186 board_ie_len = le32_to_cpu(hdr->len); 1187 board_ie_data = hdr->data; 1188 1189 buf_len -= sizeof(*hdr); 1190 buf += sizeof(*hdr); 1191 1192 if (buf_len < ALIGN(board_ie_len, 4)) { 1193 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1194 buf_len, ALIGN(board_ie_len, 4)); 1195 ret = -EINVAL; 1196 goto out; 1197 } 1198 1199 switch (board_ie_id) { 1200 case ATH10K_BD_IE_BOARD_NAME: 1201 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1202 board_ie_data, board_ie_len); 1203 1204 if (board_ie_len != strlen(boardname)) 1205 break; 1206 1207 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1208 if (ret) 1209 break; 1210 1211 name_match_found = true; 1212 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1213 "boot found match for name '%s'", 1214 boardname); 1215 break; 1216 case ATH10K_BD_IE_BOARD_DATA: 1217 if (!name_match_found) 1218 /* no match found */ 1219 break; 1220 1221 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1222 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1223 "boot found board data for '%s'", 1224 boardname); 1225 1226 ar->normal_mode_fw.board_data = board_ie_data; 1227 ar->normal_mode_fw.board_len = board_ie_len; 1228 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1229 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1230 "boot found eboard data for '%s'", 1231 boardname); 1232 1233 ar->normal_mode_fw.ext_board_data = board_ie_data; 1234 ar->normal_mode_fw.ext_board_len = board_ie_len; 1235 } 1236 1237 ret = 0; 1238 goto out; 1239 default: 1240 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1241 board_ie_id); 1242 break; 1243 } 1244 1245 /* jump over the padding */ 1246 board_ie_len = ALIGN(board_ie_len, 4); 1247 1248 buf_len -= board_ie_len; 1249 buf += board_ie_len; 1250 } 1251 1252 /* no match found */ 1253 ret = -ENOENT; 1254 1255 out: 1256 return ret; 1257 } 1258 1259 static int ath10k_core_search_bd(struct ath10k *ar, 1260 const char *boardname, 1261 const u8 *data, 1262 size_t len) 1263 { 1264 size_t ie_len; 1265 struct ath10k_fw_ie *hdr; 1266 int ret = -ENOENT, ie_id; 1267 1268 while (len > sizeof(struct ath10k_fw_ie)) { 1269 hdr = (struct ath10k_fw_ie *)data; 1270 ie_id = le32_to_cpu(hdr->id); 1271 ie_len = le32_to_cpu(hdr->len); 1272 1273 len -= sizeof(*hdr); 1274 data = hdr->data; 1275 1276 if (len < ALIGN(ie_len, 4)) { 1277 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1278 ie_id, ie_len, len); 1279 return -EINVAL; 1280 } 1281 1282 switch (ie_id) { 1283 case ATH10K_BD_IE_BOARD: 1284 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1285 boardname, 1286 ATH10K_BD_IE_BOARD); 1287 if (ret == -ENOENT) 1288 /* no match found, continue */ 1289 break; 1290 1291 /* either found or error, so stop searching */ 1292 goto out; 1293 case ATH10K_BD_IE_BOARD_EXT: 1294 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1295 boardname, 1296 ATH10K_BD_IE_BOARD_EXT); 1297 if (ret == -ENOENT) 1298 /* no match found, continue */ 1299 break; 1300 1301 /* either found or error, so stop searching */ 1302 goto out; 1303 } 1304 1305 /* jump over the padding */ 1306 ie_len = ALIGN(ie_len, 4); 1307 1308 len -= ie_len; 1309 data += ie_len; 1310 } 1311 1312 out: 1313 /* return result of parse_bd_ie_board() or -ENOENT */ 1314 return ret; 1315 } 1316 1317 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1318 const char *boardname, 1319 const char *fallback_boardname, 1320 const char *filename) 1321 { 1322 size_t len, magic_len; 1323 const u8 *data; 1324 int ret; 1325 1326 /* Skip if already fetched during board data download */ 1327 if (!ar->normal_mode_fw.board) 1328 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1329 ar->hw_params.fw.dir, 1330 filename); 1331 if (IS_ERR(ar->normal_mode_fw.board)) 1332 return PTR_ERR(ar->normal_mode_fw.board); 1333 1334 data = ar->normal_mode_fw.board->data; 1335 len = ar->normal_mode_fw.board->size; 1336 1337 /* magic has extra null byte padded */ 1338 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1339 if (len < magic_len) { 1340 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1341 ar->hw_params.fw.dir, filename, len); 1342 ret = -EINVAL; 1343 goto err; 1344 } 1345 1346 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1347 ath10k_err(ar, "found invalid board magic\n"); 1348 ret = -EINVAL; 1349 goto err; 1350 } 1351 1352 /* magic is padded to 4 bytes */ 1353 magic_len = ALIGN(magic_len, 4); 1354 if (len < magic_len) { 1355 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1356 ar->hw_params.fw.dir, filename, len); 1357 ret = -EINVAL; 1358 goto err; 1359 } 1360 1361 data += magic_len; 1362 len -= magic_len; 1363 1364 /* attempt to find boardname in the IE list */ 1365 ret = ath10k_core_search_bd(ar, boardname, data, len); 1366 1367 /* if we didn't find it and have a fallback name, try that */ 1368 if (ret == -ENOENT && fallback_boardname) 1369 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1370 1371 if (ret == -ENOENT) { 1372 ath10k_err(ar, 1373 "failed to fetch board data for %s from %s/%s\n", 1374 boardname, ar->hw_params.fw.dir, filename); 1375 ret = -ENODATA; 1376 } 1377 1378 if (ret) 1379 goto err; 1380 1381 return 0; 1382 1383 err: 1384 ath10k_core_free_board_files(ar); 1385 return ret; 1386 } 1387 1388 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1389 size_t name_len, bool with_variant) 1390 { 1391 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1392 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1393 1394 if (with_variant && ar->id.bdf_ext[0] != '\0') 1395 scnprintf(variant, sizeof(variant), ",variant=%s", 1396 ar->id.bdf_ext); 1397 1398 if (ar->id.bmi_ids_valid) { 1399 scnprintf(name, name_len, 1400 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1401 ath10k_bus_str(ar->hif.bus), 1402 ar->id.bmi_chip_id, 1403 ar->id.bmi_board_id, variant); 1404 goto out; 1405 } 1406 1407 if (ar->id.qmi_ids_valid) { 1408 scnprintf(name, name_len, 1409 "bus=%s,qmi-board-id=%x", 1410 ath10k_bus_str(ar->hif.bus), 1411 ar->id.qmi_board_id); 1412 goto out; 1413 } 1414 1415 scnprintf(name, name_len, 1416 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1417 ath10k_bus_str(ar->hif.bus), 1418 ar->id.vendor, ar->id.device, 1419 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1420 out: 1421 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1422 1423 return 0; 1424 } 1425 1426 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1427 size_t name_len) 1428 { 1429 if (ar->id.bmi_ids_valid) { 1430 scnprintf(name, name_len, 1431 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1432 ath10k_bus_str(ar->hif.bus), 1433 ar->id.bmi_chip_id, 1434 ar->id.bmi_eboard_id); 1435 1436 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1437 return 0; 1438 } 1439 /* Fallback if returned board id is zero */ 1440 return -1; 1441 } 1442 1443 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1444 { 1445 char boardname[100], fallback_boardname[100]; 1446 int ret; 1447 1448 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1449 ret = ath10k_core_create_board_name(ar, boardname, 1450 sizeof(boardname), true); 1451 if (ret) { 1452 ath10k_err(ar, "failed to create board name: %d", ret); 1453 return ret; 1454 } 1455 1456 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1457 sizeof(boardname), false); 1458 if (ret) { 1459 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1460 return ret; 1461 } 1462 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1463 ret = ath10k_core_create_eboard_name(ar, boardname, 1464 sizeof(boardname)); 1465 if (ret) { 1466 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1467 goto fallback; 1468 } 1469 } 1470 1471 ar->bd_api = 2; 1472 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1473 fallback_boardname, 1474 ATH10K_BOARD_API2_FILE); 1475 if (!ret) 1476 goto success; 1477 1478 fallback: 1479 ar->bd_api = 1; 1480 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1481 if (ret) { 1482 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1483 ar->hw_params.fw.dir); 1484 return ret; 1485 } 1486 1487 success: 1488 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1489 return 0; 1490 } 1491 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1492 1493 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1494 { 1495 u32 result, address; 1496 u8 ext_board_id; 1497 int ret; 1498 1499 address = ar->hw_params.patch_load_addr; 1500 1501 if (!ar->normal_mode_fw.fw_file.otp_data || 1502 !ar->normal_mode_fw.fw_file.otp_len) { 1503 ath10k_warn(ar, 1504 "failed to retrieve extended board id due to otp binary missing\n"); 1505 return -ENODATA; 1506 } 1507 1508 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1509 "boot upload otp to 0x%x len %zd for ext board id\n", 1510 address, ar->normal_mode_fw.fw_file.otp_len); 1511 1512 ret = ath10k_bmi_fast_download(ar, address, 1513 ar->normal_mode_fw.fw_file.otp_data, 1514 ar->normal_mode_fw.fw_file.otp_len); 1515 if (ret) { 1516 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1517 ret); 1518 return ret; 1519 } 1520 1521 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1522 if (ret) { 1523 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1524 ret); 1525 return ret; 1526 } 1527 1528 if (!result) { 1529 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1530 "ext board id does not exist in otp, ignore it\n"); 1531 return -EOPNOTSUPP; 1532 } 1533 1534 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1535 1536 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1537 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1538 result, ext_board_id); 1539 1540 ar->id.bmi_eboard_id = ext_board_id; 1541 1542 return 0; 1543 } 1544 1545 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1546 size_t data_len) 1547 { 1548 u32 board_data_size = ar->hw_params.fw.board_size; 1549 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1550 u32 board_address; 1551 u32 ext_board_address; 1552 int ret; 1553 1554 ret = ath10k_push_board_ext_data(ar, data, data_len); 1555 if (ret) { 1556 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1557 goto exit; 1558 } 1559 1560 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1561 if (ret) { 1562 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1563 goto exit; 1564 } 1565 1566 ret = ath10k_bmi_write_memory(ar, board_address, data, 1567 min_t(u32, board_data_size, 1568 data_len)); 1569 if (ret) { 1570 ath10k_err(ar, "could not write board data (%d)\n", ret); 1571 goto exit; 1572 } 1573 1574 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1575 if (ret) { 1576 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1577 goto exit; 1578 } 1579 1580 if (!ar->id.ext_bid_supported) 1581 goto exit; 1582 1583 /* Extended board data download */ 1584 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1585 if (ret == -EOPNOTSUPP) { 1586 /* Not fetching ext_board_data if ext board id is 0 */ 1587 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1588 return 0; 1589 } else if (ret) { 1590 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1591 goto exit; 1592 } 1593 1594 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1595 if (ret) 1596 goto exit; 1597 1598 if (ar->normal_mode_fw.ext_board_data) { 1599 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1600 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1601 "boot writing ext board data to addr 0x%x", 1602 ext_board_address); 1603 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1604 ar->normal_mode_fw.ext_board_data, 1605 min_t(u32, eboard_data_size, data_len)); 1606 if (ret) 1607 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1608 } 1609 1610 exit: 1611 return ret; 1612 } 1613 1614 static int ath10k_download_and_run_otp(struct ath10k *ar) 1615 { 1616 u32 result, address = ar->hw_params.patch_load_addr; 1617 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1618 int ret; 1619 1620 ret = ath10k_download_board_data(ar, 1621 ar->running_fw->board_data, 1622 ar->running_fw->board_len); 1623 if (ret) { 1624 ath10k_err(ar, "failed to download board data: %d\n", ret); 1625 return ret; 1626 } 1627 1628 /* OTP is optional */ 1629 1630 if (!ar->running_fw->fw_file.otp_data || 1631 !ar->running_fw->fw_file.otp_len) { 1632 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1633 ar->running_fw->fw_file.otp_data, 1634 ar->running_fw->fw_file.otp_len); 1635 return 0; 1636 } 1637 1638 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1639 address, ar->running_fw->fw_file.otp_len); 1640 1641 ret = ath10k_bmi_fast_download(ar, address, 1642 ar->running_fw->fw_file.otp_data, 1643 ar->running_fw->fw_file.otp_len); 1644 if (ret) { 1645 ath10k_err(ar, "could not write otp (%d)\n", ret); 1646 return ret; 1647 } 1648 1649 /* As of now pre-cal is valid for 10_4 variants */ 1650 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1651 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1652 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1653 1654 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1655 if (ret) { 1656 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1657 return ret; 1658 } 1659 1660 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1661 1662 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1663 ar->running_fw->fw_file.fw_features)) && 1664 result != 0) { 1665 ath10k_err(ar, "otp calibration failed: %d", result); 1666 return -EINVAL; 1667 } 1668 1669 return 0; 1670 } 1671 1672 static int ath10k_download_cal_file(struct ath10k *ar, 1673 const struct firmware *file) 1674 { 1675 int ret; 1676 1677 if (!file) 1678 return -ENOENT; 1679 1680 if (IS_ERR(file)) 1681 return PTR_ERR(file); 1682 1683 ret = ath10k_download_board_data(ar, file->data, file->size); 1684 if (ret) { 1685 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1686 return ret; 1687 } 1688 1689 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1690 1691 return 0; 1692 } 1693 1694 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1695 { 1696 struct device_node *node; 1697 int data_len; 1698 void *data; 1699 int ret; 1700 1701 node = ar->dev->of_node; 1702 if (!node) 1703 /* Device Tree is optional, don't print any warnings if 1704 * there's no node for ath10k. 1705 */ 1706 return -ENOENT; 1707 1708 if (!of_get_property(node, dt_name, &data_len)) { 1709 /* The calibration data node is optional */ 1710 return -ENOENT; 1711 } 1712 1713 if (data_len != ar->hw_params.cal_data_len) { 1714 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1715 data_len); 1716 ret = -EMSGSIZE; 1717 goto out; 1718 } 1719 1720 data = kmalloc(data_len, GFP_KERNEL); 1721 if (!data) { 1722 ret = -ENOMEM; 1723 goto out; 1724 } 1725 1726 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1727 if (ret) { 1728 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1729 ret); 1730 goto out_free; 1731 } 1732 1733 ret = ath10k_download_board_data(ar, data, data_len); 1734 if (ret) { 1735 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1736 ret); 1737 goto out_free; 1738 } 1739 1740 ret = 0; 1741 1742 out_free: 1743 kfree(data); 1744 1745 out: 1746 return ret; 1747 } 1748 1749 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1750 { 1751 size_t data_len; 1752 void *data = NULL; 1753 int ret; 1754 1755 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1756 if (ret) { 1757 if (ret != -EOPNOTSUPP) 1758 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1759 ret); 1760 goto out_free; 1761 } 1762 1763 ret = ath10k_download_board_data(ar, data, data_len); 1764 if (ret) { 1765 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1766 ret); 1767 goto out_free; 1768 } 1769 1770 ret = 0; 1771 1772 out_free: 1773 kfree(data); 1774 1775 return ret; 1776 } 1777 1778 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1779 struct ath10k_fw_file *fw_file) 1780 { 1781 size_t magic_len, len, ie_len; 1782 int ie_id, i, index, bit, ret; 1783 struct ath10k_fw_ie *hdr; 1784 const u8 *data; 1785 __le32 *timestamp, *version; 1786 1787 /* first fetch the firmware file (firmware-*.bin) */ 1788 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1789 name); 1790 if (IS_ERR(fw_file->firmware)) 1791 return PTR_ERR(fw_file->firmware); 1792 1793 data = fw_file->firmware->data; 1794 len = fw_file->firmware->size; 1795 1796 /* magic also includes the null byte, check that as well */ 1797 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1798 1799 if (len < magic_len) { 1800 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1801 ar->hw_params.fw.dir, name, len); 1802 ret = -EINVAL; 1803 goto err; 1804 } 1805 1806 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1807 ath10k_err(ar, "invalid firmware magic\n"); 1808 ret = -EINVAL; 1809 goto err; 1810 } 1811 1812 /* jump over the padding */ 1813 magic_len = ALIGN(magic_len, 4); 1814 1815 len -= magic_len; 1816 data += magic_len; 1817 1818 /* loop elements */ 1819 while (len > sizeof(struct ath10k_fw_ie)) { 1820 hdr = (struct ath10k_fw_ie *)data; 1821 1822 ie_id = le32_to_cpu(hdr->id); 1823 ie_len = le32_to_cpu(hdr->len); 1824 1825 len -= sizeof(*hdr); 1826 data += sizeof(*hdr); 1827 1828 if (len < ie_len) { 1829 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1830 ie_id, len, ie_len); 1831 ret = -EINVAL; 1832 goto err; 1833 } 1834 1835 switch (ie_id) { 1836 case ATH10K_FW_IE_FW_VERSION: 1837 if (ie_len > sizeof(fw_file->fw_version) - 1) 1838 break; 1839 1840 memcpy(fw_file->fw_version, data, ie_len); 1841 fw_file->fw_version[ie_len] = '\0'; 1842 1843 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1844 "found fw version %s\n", 1845 fw_file->fw_version); 1846 break; 1847 case ATH10K_FW_IE_TIMESTAMP: 1848 if (ie_len != sizeof(u32)) 1849 break; 1850 1851 timestamp = (__le32 *)data; 1852 1853 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1854 le32_to_cpup(timestamp)); 1855 break; 1856 case ATH10K_FW_IE_FEATURES: 1857 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1858 "found firmware features ie (%zd B)\n", 1859 ie_len); 1860 1861 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1862 index = i / 8; 1863 bit = i % 8; 1864 1865 if (index == ie_len) 1866 break; 1867 1868 if (data[index] & (1 << bit)) { 1869 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1870 "Enabling feature bit: %i\n", 1871 i); 1872 __set_bit(i, fw_file->fw_features); 1873 } 1874 } 1875 1876 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1877 fw_file->fw_features, 1878 sizeof(fw_file->fw_features)); 1879 break; 1880 case ATH10K_FW_IE_FW_IMAGE: 1881 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1882 "found fw image ie (%zd B)\n", 1883 ie_len); 1884 1885 fw_file->firmware_data = data; 1886 fw_file->firmware_len = ie_len; 1887 1888 break; 1889 case ATH10K_FW_IE_OTP_IMAGE: 1890 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1891 "found otp image ie (%zd B)\n", 1892 ie_len); 1893 1894 fw_file->otp_data = data; 1895 fw_file->otp_len = ie_len; 1896 1897 break; 1898 case ATH10K_FW_IE_WMI_OP_VERSION: 1899 if (ie_len != sizeof(u32)) 1900 break; 1901 1902 version = (__le32 *)data; 1903 1904 fw_file->wmi_op_version = le32_to_cpup(version); 1905 1906 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1907 fw_file->wmi_op_version); 1908 break; 1909 case ATH10K_FW_IE_HTT_OP_VERSION: 1910 if (ie_len != sizeof(u32)) 1911 break; 1912 1913 version = (__le32 *)data; 1914 1915 fw_file->htt_op_version = le32_to_cpup(version); 1916 1917 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1918 fw_file->htt_op_version); 1919 break; 1920 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1921 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1922 "found fw code swap image ie (%zd B)\n", 1923 ie_len); 1924 fw_file->codeswap_data = data; 1925 fw_file->codeswap_len = ie_len; 1926 break; 1927 default: 1928 ath10k_warn(ar, "Unknown FW IE: %u\n", 1929 le32_to_cpu(hdr->id)); 1930 break; 1931 } 1932 1933 /* jump over the padding */ 1934 ie_len = ALIGN(ie_len, 4); 1935 1936 len -= ie_len; 1937 data += ie_len; 1938 } 1939 1940 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1941 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1942 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1943 ar->hw_params.fw.dir, name); 1944 ret = -ENOMEDIUM; 1945 goto err; 1946 } 1947 1948 return 0; 1949 1950 err: 1951 ath10k_core_free_firmware_files(ar); 1952 return ret; 1953 } 1954 1955 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1956 size_t fw_name_len, int fw_api) 1957 { 1958 switch (ar->hif.bus) { 1959 case ATH10K_BUS_SDIO: 1960 case ATH10K_BUS_USB: 1961 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1962 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1963 fw_api); 1964 break; 1965 case ATH10K_BUS_PCI: 1966 case ATH10K_BUS_AHB: 1967 case ATH10K_BUS_SNOC: 1968 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1969 ATH10K_FW_FILE_BASE, fw_api); 1970 break; 1971 } 1972 } 1973 1974 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1975 { 1976 int ret, i; 1977 char fw_name[100]; 1978 1979 /* calibration file is optional, don't check for any errors */ 1980 ath10k_fetch_cal_file(ar); 1981 1982 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1983 ar->fw_api = i; 1984 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1985 ar->fw_api); 1986 1987 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1988 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1989 &ar->normal_mode_fw.fw_file); 1990 if (!ret) 1991 goto success; 1992 } 1993 1994 /* we end up here if we couldn't fetch any firmware */ 1995 1996 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1997 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1998 ret); 1999 2000 return ret; 2001 2002 success: 2003 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 2004 2005 return 0; 2006 } 2007 2008 static int ath10k_core_pre_cal_download(struct ath10k *ar) 2009 { 2010 int ret; 2011 2012 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 2013 if (ret == 0) { 2014 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 2015 goto success; 2016 } 2017 2018 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2019 "boot did not find a pre calibration file, try DT next: %d\n", 2020 ret); 2021 2022 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 2023 if (ret) { 2024 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2025 "unable to load pre cal data from DT: %d\n", ret); 2026 return ret; 2027 } 2028 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 2029 2030 success: 2031 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2032 ath10k_cal_mode_str(ar->cal_mode)); 2033 2034 return 0; 2035 } 2036 2037 static int ath10k_core_pre_cal_config(struct ath10k *ar) 2038 { 2039 int ret; 2040 2041 ret = ath10k_core_pre_cal_download(ar); 2042 if (ret) { 2043 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2044 "failed to load pre cal data: %d\n", ret); 2045 return ret; 2046 } 2047 2048 ret = ath10k_core_get_board_id_from_otp(ar); 2049 if (ret) { 2050 ath10k_err(ar, "failed to get board id: %d\n", ret); 2051 return ret; 2052 } 2053 2054 ret = ath10k_download_and_run_otp(ar); 2055 if (ret) { 2056 ath10k_err(ar, "failed to run otp: %d\n", ret); 2057 return ret; 2058 } 2059 2060 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2061 "pre cal configuration done successfully\n"); 2062 2063 return 0; 2064 } 2065 2066 static int ath10k_download_cal_data(struct ath10k *ar) 2067 { 2068 int ret; 2069 2070 ret = ath10k_core_pre_cal_config(ar); 2071 if (ret == 0) 2072 return 0; 2073 2074 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2075 "pre cal download procedure failed, try cal file: %d\n", 2076 ret); 2077 2078 ret = ath10k_download_cal_file(ar, ar->cal_file); 2079 if (ret == 0) { 2080 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2081 goto done; 2082 } 2083 2084 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2085 "boot did not find a calibration file, try DT next: %d\n", 2086 ret); 2087 2088 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2089 if (ret == 0) { 2090 ar->cal_mode = ATH10K_CAL_MODE_DT; 2091 goto done; 2092 } 2093 2094 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2095 "boot did not find DT entry, try target EEPROM next: %d\n", 2096 ret); 2097 2098 ret = ath10k_download_cal_eeprom(ar); 2099 if (ret == 0) { 2100 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2101 goto done; 2102 } 2103 2104 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2105 "boot did not find target EEPROM entry, try OTP next: %d\n", 2106 ret); 2107 2108 ret = ath10k_download_and_run_otp(ar); 2109 if (ret) { 2110 ath10k_err(ar, "failed to run otp: %d\n", ret); 2111 return ret; 2112 } 2113 2114 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2115 2116 done: 2117 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2118 ath10k_cal_mode_str(ar->cal_mode)); 2119 return 0; 2120 } 2121 2122 static int ath10k_init_uart(struct ath10k *ar) 2123 { 2124 int ret; 2125 2126 /* 2127 * Explicitly setting UART prints to zero as target turns it on 2128 * based on scratch registers. 2129 */ 2130 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2131 if (ret) { 2132 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2133 return ret; 2134 } 2135 2136 if (!uart_print) { 2137 if (ar->hw_params.uart_pin_workaround) { 2138 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 2139 ar->hw_params.uart_pin); 2140 if (ret) { 2141 ath10k_warn(ar, "failed to set UART TX pin: %d", 2142 ret); 2143 return ret; 2144 } 2145 } 2146 2147 return 0; 2148 } 2149 2150 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2151 if (ret) { 2152 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2153 return ret; 2154 } 2155 2156 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2157 if (ret) { 2158 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2159 return ret; 2160 } 2161 2162 /* Set the UART baud rate to 19200. */ 2163 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2164 if (ret) { 2165 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2166 return ret; 2167 } 2168 2169 ath10k_info(ar, "UART prints enabled\n"); 2170 return 0; 2171 } 2172 2173 static int ath10k_init_hw_params(struct ath10k *ar) 2174 { 2175 const struct ath10k_hw_params *uninitialized_var(hw_params); 2176 int i; 2177 2178 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2179 hw_params = &ath10k_hw_params_list[i]; 2180 2181 if (hw_params->bus == ar->hif.bus && 2182 hw_params->id == ar->target_version && 2183 hw_params->dev_id == ar->dev_id) 2184 break; 2185 } 2186 2187 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2188 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2189 ar->target_version); 2190 return -EINVAL; 2191 } 2192 2193 ar->hw_params = *hw_params; 2194 2195 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2196 ar->hw_params.name, ar->target_version); 2197 2198 return 0; 2199 } 2200 2201 static void ath10k_core_restart(struct work_struct *work) 2202 { 2203 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2204 int ret; 2205 2206 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2207 2208 /* Place a barrier to make sure the compiler doesn't reorder 2209 * CRASH_FLUSH and calling other functions. 2210 */ 2211 barrier(); 2212 2213 ieee80211_stop_queues(ar->hw); 2214 ath10k_drain_tx(ar); 2215 complete(&ar->scan.started); 2216 complete(&ar->scan.completed); 2217 complete(&ar->scan.on_channel); 2218 complete(&ar->offchan_tx_completed); 2219 complete(&ar->install_key_done); 2220 complete(&ar->vdev_setup_done); 2221 complete(&ar->vdev_delete_done); 2222 complete(&ar->thermal.wmi_sync); 2223 complete(&ar->bss_survey_done); 2224 wake_up(&ar->htt.empty_tx_wq); 2225 wake_up(&ar->wmi.tx_credits_wq); 2226 wake_up(&ar->peer_mapping_wq); 2227 2228 /* TODO: We can have one instance of cancelling coverage_class_work by 2229 * moving it to ath10k_halt(), so that both stop() and restart() would 2230 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2231 * with conf_mutex it will deadlock. 2232 */ 2233 cancel_work_sync(&ar->set_coverage_class_work); 2234 2235 mutex_lock(&ar->conf_mutex); 2236 2237 switch (ar->state) { 2238 case ATH10K_STATE_ON: 2239 ar->state = ATH10K_STATE_RESTARTING; 2240 ath10k_halt(ar); 2241 ath10k_scan_finish(ar); 2242 ieee80211_restart_hw(ar->hw); 2243 break; 2244 case ATH10K_STATE_OFF: 2245 /* this can happen if driver is being unloaded 2246 * or if the crash happens during FW probing 2247 */ 2248 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2249 break; 2250 case ATH10K_STATE_RESTARTING: 2251 /* hw restart might be requested from multiple places */ 2252 break; 2253 case ATH10K_STATE_RESTARTED: 2254 ar->state = ATH10K_STATE_WEDGED; 2255 /* fall through */ 2256 case ATH10K_STATE_WEDGED: 2257 ath10k_warn(ar, "device is wedged, will not restart\n"); 2258 break; 2259 case ATH10K_STATE_UTF: 2260 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2261 break; 2262 } 2263 2264 mutex_unlock(&ar->conf_mutex); 2265 2266 ret = ath10k_coredump_submit(ar); 2267 if (ret) 2268 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2269 ret); 2270 2271 complete(&ar->driver_recovery); 2272 } 2273 2274 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2275 { 2276 struct ath10k *ar = container_of(work, struct ath10k, 2277 set_coverage_class_work); 2278 2279 if (ar->hw_params.hw_ops->set_coverage_class) 2280 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2281 } 2282 2283 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2284 { 2285 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2286 int max_num_peers; 2287 2288 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2289 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2290 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2291 return -EINVAL; 2292 } 2293 2294 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2295 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2296 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2297 return -EINVAL; 2298 } 2299 2300 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2301 switch (ath10k_cryptmode_param) { 2302 case ATH10K_CRYPT_MODE_HW: 2303 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2304 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2305 break; 2306 case ATH10K_CRYPT_MODE_SW: 2307 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2308 fw_file->fw_features)) { 2309 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2310 return -EINVAL; 2311 } 2312 2313 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2314 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2315 break; 2316 default: 2317 ath10k_info(ar, "invalid cryptmode: %d\n", 2318 ath10k_cryptmode_param); 2319 return -EINVAL; 2320 } 2321 2322 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2323 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2324 2325 if (rawmode) { 2326 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2327 fw_file->fw_features)) { 2328 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2329 return -EINVAL; 2330 } 2331 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2332 } 2333 2334 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2335 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2336 2337 /* Workaround: 2338 * 2339 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2340 * and causes enormous performance issues (malformed frames, 2341 * etc). 2342 * 2343 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2344 * albeit a bit slower compared to regular operation. 2345 */ 2346 ar->htt.max_num_amsdu = 1; 2347 } 2348 2349 /* Backwards compatibility for firmwares without 2350 * ATH10K_FW_IE_WMI_OP_VERSION. 2351 */ 2352 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2353 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2354 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2355 fw_file->fw_features)) 2356 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2357 else 2358 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2359 } else { 2360 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2361 } 2362 } 2363 2364 switch (fw_file->wmi_op_version) { 2365 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2366 max_num_peers = TARGET_NUM_PEERS; 2367 ar->max_num_stations = TARGET_NUM_STATIONS; 2368 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2369 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2370 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2371 WMI_STAT_PEER; 2372 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2373 break; 2374 case ATH10K_FW_WMI_OP_VERSION_10_1: 2375 case ATH10K_FW_WMI_OP_VERSION_10_2: 2376 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2377 if (ath10k_peer_stats_enabled(ar)) { 2378 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2379 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2380 } else { 2381 max_num_peers = TARGET_10X_NUM_PEERS; 2382 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2383 } 2384 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2385 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2386 ar->fw_stats_req_mask = WMI_STAT_PEER; 2387 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2388 break; 2389 case ATH10K_FW_WMI_OP_VERSION_TLV: 2390 max_num_peers = TARGET_TLV_NUM_PEERS; 2391 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2392 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2393 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2394 if (ar->hif.bus == ATH10K_BUS_SDIO) 2395 ar->htt.max_num_pending_tx = 2396 TARGET_TLV_NUM_MSDU_DESC_HL; 2397 else 2398 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2399 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2400 ar->fw_stats_req_mask = WMI_TLV_STAT_PDEV | WMI_TLV_STAT_VDEV | 2401 WMI_TLV_STAT_PEER | WMI_TLV_STAT_PEER_EXTD; 2402 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2403 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2404 break; 2405 case ATH10K_FW_WMI_OP_VERSION_10_4: 2406 max_num_peers = TARGET_10_4_NUM_PEERS; 2407 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2408 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2409 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2410 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2411 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2412 WMI_10_4_STAT_PEER_EXTD | 2413 WMI_10_4_STAT_VDEV_EXTD; 2414 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2415 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2416 2417 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2418 fw_file->fw_features)) 2419 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2420 else 2421 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2422 break; 2423 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2424 case ATH10K_FW_WMI_OP_VERSION_MAX: 2425 default: 2426 WARN_ON(1); 2427 return -EINVAL; 2428 } 2429 2430 if (ar->hw_params.num_peers) 2431 ar->max_num_peers = ar->hw_params.num_peers; 2432 else 2433 ar->max_num_peers = max_num_peers; 2434 2435 /* Backwards compatibility for firmwares without 2436 * ATH10K_FW_IE_HTT_OP_VERSION. 2437 */ 2438 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2439 switch (fw_file->wmi_op_version) { 2440 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2441 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2442 break; 2443 case ATH10K_FW_WMI_OP_VERSION_10_1: 2444 case ATH10K_FW_WMI_OP_VERSION_10_2: 2445 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2446 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2447 break; 2448 case ATH10K_FW_WMI_OP_VERSION_TLV: 2449 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2450 break; 2451 case ATH10K_FW_WMI_OP_VERSION_10_4: 2452 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2453 case ATH10K_FW_WMI_OP_VERSION_MAX: 2454 ath10k_err(ar, "htt op version not found from fw meta data"); 2455 return -EINVAL; 2456 } 2457 } 2458 2459 return 0; 2460 } 2461 2462 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2463 { 2464 int ret; 2465 int vdev_id; 2466 int vdev_type; 2467 int vdev_subtype; 2468 const u8 *vdev_addr; 2469 2470 vdev_id = 0; 2471 vdev_type = WMI_VDEV_TYPE_STA; 2472 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2473 vdev_addr = ar->mac_addr; 2474 2475 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2476 vdev_addr); 2477 if (ret) { 2478 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2479 return ret; 2480 } 2481 2482 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2483 if (ret) { 2484 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2485 return ret; 2486 } 2487 2488 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2489 * serialized properly implicitly. 2490 * 2491 * Moreover (most) WMI commands have no explicit acknowledges. It is 2492 * possible to infer it implicitly by poking firmware with echo 2493 * command - getting a reply means all preceding comments have been 2494 * (mostly) processed. 2495 * 2496 * In case of vdev create/delete this is sufficient. 2497 * 2498 * Without this it's possible to end up with a race when HTT Rx ring is 2499 * started before vdev create/delete hack is complete allowing a short 2500 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2501 */ 2502 ret = ath10k_wmi_barrier(ar); 2503 if (ret) { 2504 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2505 return ret; 2506 } 2507 2508 return 0; 2509 } 2510 2511 static int ath10k_core_compat_services(struct ath10k *ar) 2512 { 2513 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2514 2515 /* all 10.x firmware versions support thermal throttling but don't 2516 * advertise the support via service flags so we have to hardcode 2517 * it here 2518 */ 2519 switch (fw_file->wmi_op_version) { 2520 case ATH10K_FW_WMI_OP_VERSION_10_1: 2521 case ATH10K_FW_WMI_OP_VERSION_10_2: 2522 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2523 case ATH10K_FW_WMI_OP_VERSION_10_4: 2524 set_bit(WMI_SERVICE_THERM_THROT, ar->wmi.svc_map); 2525 break; 2526 default: 2527 break; 2528 } 2529 2530 return 0; 2531 } 2532 2533 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2534 const struct ath10k_fw_components *fw) 2535 { 2536 int status; 2537 u32 val; 2538 2539 lockdep_assert_held(&ar->conf_mutex); 2540 2541 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2542 2543 ar->running_fw = fw; 2544 2545 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2546 ar->running_fw->fw_file.fw_features)) { 2547 ath10k_bmi_start(ar); 2548 2549 if (ath10k_init_configure_target(ar)) { 2550 status = -EINVAL; 2551 goto err; 2552 } 2553 2554 status = ath10k_download_cal_data(ar); 2555 if (status) 2556 goto err; 2557 2558 /* Some of of qca988x solutions are having global reset issue 2559 * during target initialization. Bypassing PLL setting before 2560 * downloading firmware and letting the SoC run on REF_CLK is 2561 * fixing the problem. Corresponding firmware change is also 2562 * needed to set the clock source once the target is 2563 * initialized. 2564 */ 2565 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2566 ar->running_fw->fw_file.fw_features)) { 2567 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2568 if (status) { 2569 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2570 status); 2571 goto err; 2572 } 2573 } 2574 2575 status = ath10k_download_fw(ar); 2576 if (status) 2577 goto err; 2578 2579 status = ath10k_init_uart(ar); 2580 if (status) 2581 goto err; 2582 2583 if (ar->hif.bus == ATH10K_BUS_SDIO) { 2584 status = ath10k_init_sdio(ar, mode); 2585 if (status) { 2586 ath10k_err(ar, "failed to init SDIO: %d\n", status); 2587 goto err; 2588 } 2589 } 2590 } 2591 2592 ar->htc.htc_ops.target_send_suspend_complete = 2593 ath10k_send_suspend_complete; 2594 2595 status = ath10k_htc_init(ar); 2596 if (status) { 2597 ath10k_err(ar, "could not init HTC (%d)\n", status); 2598 goto err; 2599 } 2600 2601 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2602 ar->running_fw->fw_file.fw_features)) { 2603 status = ath10k_bmi_done(ar); 2604 if (status) 2605 goto err; 2606 } 2607 2608 status = ath10k_wmi_attach(ar); 2609 if (status) { 2610 ath10k_err(ar, "WMI attach failed: %d\n", status); 2611 goto err; 2612 } 2613 2614 status = ath10k_htt_init(ar); 2615 if (status) { 2616 ath10k_err(ar, "failed to init htt: %d\n", status); 2617 goto err_wmi_detach; 2618 } 2619 2620 status = ath10k_htt_tx_start(&ar->htt); 2621 if (status) { 2622 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2623 goto err_wmi_detach; 2624 } 2625 2626 /* If firmware indicates Full Rx Reorder support it must be used in a 2627 * slightly different manner. Let HTT code know. 2628 */ 2629 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2630 ar->wmi.svc_map)); 2631 2632 status = ath10k_htt_rx_alloc(&ar->htt); 2633 if (status) { 2634 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2635 goto err_htt_tx_detach; 2636 } 2637 2638 status = ath10k_hif_start(ar); 2639 if (status) { 2640 ath10k_err(ar, "could not start HIF: %d\n", status); 2641 goto err_htt_rx_detach; 2642 } 2643 2644 status = ath10k_htc_wait_target(&ar->htc); 2645 if (status) { 2646 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2647 goto err_hif_stop; 2648 } 2649 2650 status = ath10k_hif_swap_mailbox(ar); 2651 if (status) { 2652 ath10k_err(ar, "failed to swap mailbox: %d\n", status); 2653 goto err_hif_stop; 2654 } 2655 2656 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2657 status = ath10k_htt_connect(&ar->htt); 2658 if (status) { 2659 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2660 goto err_hif_stop; 2661 } 2662 } 2663 2664 status = ath10k_wmi_connect(ar); 2665 if (status) { 2666 ath10k_err(ar, "could not connect wmi: %d\n", status); 2667 goto err_hif_stop; 2668 } 2669 2670 status = ath10k_htc_start(&ar->htc); 2671 if (status) { 2672 ath10k_err(ar, "failed to start htc: %d\n", status); 2673 goto err_hif_stop; 2674 } 2675 2676 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2677 status = ath10k_wmi_wait_for_service_ready(ar); 2678 if (status) { 2679 ath10k_warn(ar, "wmi service ready event not received"); 2680 goto err_hif_stop; 2681 } 2682 } 2683 2684 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2685 ar->hw->wiphy->fw_version); 2686 2687 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2688 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2689 val = 0; 2690 if (ath10k_peer_stats_enabled(ar)) 2691 val = WMI_10_4_PEER_STATS; 2692 2693 /* Enable vdev stats by default */ 2694 val |= WMI_10_4_VDEV_STATS; 2695 2696 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2697 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2698 2699 /* 10.4 firmware supports BT-Coex without reloading firmware 2700 * via pdev param. To support Bluetooth coexistence pdev param, 2701 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2702 * enabled always. 2703 */ 2704 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2705 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2706 ar->running_fw->fw_file.fw_features)) 2707 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2708 2709 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2710 ar->wmi.svc_map)) 2711 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2712 2713 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2714 ar->wmi.svc_map)) 2715 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2716 2717 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2718 ar->wmi.svc_map)) 2719 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2720 2721 if (test_bit(WMI_SERVICE_REPORT_AIRTIME, ar->wmi.svc_map)) 2722 val |= WMI_10_4_REPORT_AIRTIME; 2723 2724 status = ath10k_mac_ext_resource_config(ar, val); 2725 if (status) { 2726 ath10k_err(ar, 2727 "failed to send ext resource cfg command : %d\n", 2728 status); 2729 goto err_hif_stop; 2730 } 2731 } 2732 2733 status = ath10k_wmi_cmd_init(ar); 2734 if (status) { 2735 ath10k_err(ar, "could not send WMI init command (%d)\n", 2736 status); 2737 goto err_hif_stop; 2738 } 2739 2740 status = ath10k_wmi_wait_for_unified_ready(ar); 2741 if (status) { 2742 ath10k_err(ar, "wmi unified ready event not received\n"); 2743 goto err_hif_stop; 2744 } 2745 2746 status = ath10k_core_compat_services(ar); 2747 if (status) { 2748 ath10k_err(ar, "compat services failed: %d\n", status); 2749 goto err_hif_stop; 2750 } 2751 2752 status = ath10k_wmi_pdev_set_base_macaddr(ar, ar->mac_addr); 2753 if (status && status != -EOPNOTSUPP) { 2754 ath10k_err(ar, 2755 "failed to set base mac address: %d\n", status); 2756 goto err_hif_stop; 2757 } 2758 2759 /* Some firmware revisions do not properly set up hardware rx filter 2760 * registers. 2761 * 2762 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2763 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2764 * any frames that matches MAC_PCU_RX_FILTER which is also 2765 * misconfigured to accept anything. 2766 * 2767 * The ADDR1 is programmed using internal firmware structure field and 2768 * can't be (easily/sanely) reached from the driver explicitly. It is 2769 * possible to implicitly make it correct by creating a dummy vdev and 2770 * then deleting it. 2771 */ 2772 if (ar->hw_params.hw_filter_reset_required && 2773 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2774 status = ath10k_core_reset_rx_filter(ar); 2775 if (status) { 2776 ath10k_err(ar, 2777 "failed to reset rx filter: %d\n", status); 2778 goto err_hif_stop; 2779 } 2780 } 2781 2782 status = ath10k_htt_rx_ring_refill(ar); 2783 if (status) { 2784 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2785 goto err_hif_stop; 2786 } 2787 2788 if (ar->max_num_vdevs >= 64) 2789 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2790 else 2791 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2792 2793 INIT_LIST_HEAD(&ar->arvifs); 2794 2795 /* we don't care about HTT in UTF mode */ 2796 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2797 status = ath10k_htt_setup(&ar->htt); 2798 if (status) { 2799 ath10k_err(ar, "failed to setup htt: %d\n", status); 2800 goto err_hif_stop; 2801 } 2802 } 2803 2804 status = ath10k_debug_start(ar); 2805 if (status) 2806 goto err_hif_stop; 2807 2808 status = ath10k_hif_set_target_log_mode(ar, fw_diag_log); 2809 if (status && status != -EOPNOTSUPP) { 2810 ath10k_warn(ar, "set target log mode failed: %d\n", status); 2811 goto err_hif_stop; 2812 } 2813 2814 return 0; 2815 2816 err_hif_stop: 2817 ath10k_hif_stop(ar); 2818 err_htt_rx_detach: 2819 ath10k_htt_rx_free(&ar->htt); 2820 err_htt_tx_detach: 2821 ath10k_htt_tx_free(&ar->htt); 2822 err_wmi_detach: 2823 ath10k_wmi_detach(ar); 2824 err: 2825 return status; 2826 } 2827 EXPORT_SYMBOL(ath10k_core_start); 2828 2829 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2830 { 2831 int ret; 2832 unsigned long time_left; 2833 2834 reinit_completion(&ar->target_suspend); 2835 2836 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2837 if (ret) { 2838 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2839 return ret; 2840 } 2841 2842 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2843 2844 if (!time_left) { 2845 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2846 return -ETIMEDOUT; 2847 } 2848 2849 return 0; 2850 } 2851 2852 void ath10k_core_stop(struct ath10k *ar) 2853 { 2854 lockdep_assert_held(&ar->conf_mutex); 2855 ath10k_debug_stop(ar); 2856 2857 /* try to suspend target */ 2858 if (ar->state != ATH10K_STATE_RESTARTING && 2859 ar->state != ATH10K_STATE_UTF) 2860 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2861 2862 ath10k_hif_stop(ar); 2863 ath10k_htt_tx_stop(&ar->htt); 2864 ath10k_htt_rx_free(&ar->htt); 2865 ath10k_wmi_detach(ar); 2866 } 2867 EXPORT_SYMBOL(ath10k_core_stop); 2868 2869 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2870 * order to know what hw capabilities should be advertised to mac80211 it is 2871 * necessary to load the firmware (and tear it down immediately since start 2872 * hook will try to init it again) before registering 2873 */ 2874 static int ath10k_core_probe_fw(struct ath10k *ar) 2875 { 2876 struct bmi_target_info target_info; 2877 int ret = 0; 2878 2879 ret = ath10k_hif_power_up(ar, ATH10K_FIRMWARE_MODE_NORMAL); 2880 if (ret) { 2881 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2882 return ret; 2883 } 2884 2885 switch (ar->hif.bus) { 2886 case ATH10K_BUS_SDIO: 2887 memset(&target_info, 0, sizeof(target_info)); 2888 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2889 if (ret) { 2890 ath10k_err(ar, "could not get target info (%d)\n", ret); 2891 goto err_power_down; 2892 } 2893 ar->target_version = target_info.version; 2894 ar->hw->wiphy->hw_version = target_info.version; 2895 break; 2896 case ATH10K_BUS_PCI: 2897 case ATH10K_BUS_AHB: 2898 case ATH10K_BUS_USB: 2899 memset(&target_info, 0, sizeof(target_info)); 2900 ret = ath10k_bmi_get_target_info(ar, &target_info); 2901 if (ret) { 2902 ath10k_err(ar, "could not get target info (%d)\n", ret); 2903 goto err_power_down; 2904 } 2905 ar->target_version = target_info.version; 2906 ar->hw->wiphy->hw_version = target_info.version; 2907 break; 2908 case ATH10K_BUS_SNOC: 2909 memset(&target_info, 0, sizeof(target_info)); 2910 ret = ath10k_hif_get_target_info(ar, &target_info); 2911 if (ret) { 2912 ath10k_err(ar, "could not get target info (%d)\n", ret); 2913 goto err_power_down; 2914 } 2915 ar->target_version = target_info.version; 2916 ar->hw->wiphy->hw_version = target_info.version; 2917 break; 2918 default: 2919 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2920 } 2921 2922 ret = ath10k_init_hw_params(ar); 2923 if (ret) { 2924 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2925 goto err_power_down; 2926 } 2927 2928 ret = ath10k_core_fetch_firmware_files(ar); 2929 if (ret) { 2930 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2931 goto err_power_down; 2932 } 2933 2934 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2935 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2936 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2937 sizeof(ar->hw->wiphy->fw_version)); 2938 2939 ath10k_debug_print_hwfw_info(ar); 2940 2941 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2942 ar->normal_mode_fw.fw_file.fw_features)) { 2943 ret = ath10k_core_pre_cal_download(ar); 2944 if (ret) { 2945 /* pre calibration data download is not necessary 2946 * for all the chipsets. Ignore failures and continue. 2947 */ 2948 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2949 "could not load pre cal data: %d\n", ret); 2950 } 2951 2952 ret = ath10k_core_get_board_id_from_otp(ar); 2953 if (ret && ret != -EOPNOTSUPP) { 2954 ath10k_err(ar, "failed to get board id from otp: %d\n", 2955 ret); 2956 goto err_free_firmware_files; 2957 } 2958 2959 ret = ath10k_core_check_smbios(ar); 2960 if (ret) 2961 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2962 2963 ret = ath10k_core_check_dt(ar); 2964 if (ret) 2965 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2966 2967 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2968 if (ret) { 2969 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2970 goto err_free_firmware_files; 2971 } 2972 2973 ath10k_debug_print_board_info(ar); 2974 } 2975 2976 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2977 2978 ret = ath10k_core_init_firmware_features(ar); 2979 if (ret) { 2980 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2981 ret); 2982 goto err_free_firmware_files; 2983 } 2984 2985 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2986 ar->normal_mode_fw.fw_file.fw_features)) { 2987 ret = ath10k_swap_code_seg_init(ar, 2988 &ar->normal_mode_fw.fw_file); 2989 if (ret) { 2990 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2991 ret); 2992 goto err_free_firmware_files; 2993 } 2994 } 2995 2996 mutex_lock(&ar->conf_mutex); 2997 2998 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2999 &ar->normal_mode_fw); 3000 if (ret) { 3001 ath10k_err(ar, "could not init core (%d)\n", ret); 3002 goto err_unlock; 3003 } 3004 3005 ath10k_debug_print_boot_info(ar); 3006 ath10k_core_stop(ar); 3007 3008 mutex_unlock(&ar->conf_mutex); 3009 3010 ath10k_hif_power_down(ar); 3011 return 0; 3012 3013 err_unlock: 3014 mutex_unlock(&ar->conf_mutex); 3015 3016 err_free_firmware_files: 3017 ath10k_core_free_firmware_files(ar); 3018 3019 err_power_down: 3020 ath10k_hif_power_down(ar); 3021 3022 return ret; 3023 } 3024 3025 static void ath10k_core_register_work(struct work_struct *work) 3026 { 3027 struct ath10k *ar = container_of(work, struct ath10k, register_work); 3028 int status; 3029 3030 /* peer stats are enabled by default */ 3031 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 3032 3033 status = ath10k_core_probe_fw(ar); 3034 if (status) { 3035 ath10k_err(ar, "could not probe fw (%d)\n", status); 3036 goto err; 3037 } 3038 3039 status = ath10k_mac_register(ar); 3040 if (status) { 3041 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 3042 goto err_release_fw; 3043 } 3044 3045 status = ath10k_coredump_register(ar); 3046 if (status) { 3047 ath10k_err(ar, "unable to register coredump\n"); 3048 goto err_unregister_mac; 3049 } 3050 3051 status = ath10k_debug_register(ar); 3052 if (status) { 3053 ath10k_err(ar, "unable to initialize debugfs\n"); 3054 goto err_unregister_coredump; 3055 } 3056 3057 status = ath10k_spectral_create(ar); 3058 if (status) { 3059 ath10k_err(ar, "failed to initialize spectral\n"); 3060 goto err_debug_destroy; 3061 } 3062 3063 status = ath10k_thermal_register(ar); 3064 if (status) { 3065 ath10k_err(ar, "could not register thermal device: %d\n", 3066 status); 3067 goto err_spectral_destroy; 3068 } 3069 3070 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 3071 return; 3072 3073 err_spectral_destroy: 3074 ath10k_spectral_destroy(ar); 3075 err_debug_destroy: 3076 ath10k_debug_destroy(ar); 3077 err_unregister_coredump: 3078 ath10k_coredump_unregister(ar); 3079 err_unregister_mac: 3080 ath10k_mac_unregister(ar); 3081 err_release_fw: 3082 ath10k_core_free_firmware_files(ar); 3083 err: 3084 /* TODO: It's probably a good idea to release device from the driver 3085 * but calling device_release_driver() here will cause a deadlock. 3086 */ 3087 return; 3088 } 3089 3090 int ath10k_core_register(struct ath10k *ar, 3091 const struct ath10k_bus_params *bus_params) 3092 { 3093 ar->bus_param = *bus_params; 3094 3095 queue_work(ar->workqueue, &ar->register_work); 3096 3097 return 0; 3098 } 3099 EXPORT_SYMBOL(ath10k_core_register); 3100 3101 void ath10k_core_unregister(struct ath10k *ar) 3102 { 3103 cancel_work_sync(&ar->register_work); 3104 3105 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 3106 return; 3107 3108 ath10k_thermal_unregister(ar); 3109 /* Stop spectral before unregistering from mac80211 to remove the 3110 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 3111 * would be already be free'd recursively, leading to a double free. 3112 */ 3113 ath10k_spectral_destroy(ar); 3114 3115 /* We must unregister from mac80211 before we stop HTC and HIF. 3116 * Otherwise we will fail to submit commands to FW and mac80211 will be 3117 * unhappy about callback failures. 3118 */ 3119 ath10k_mac_unregister(ar); 3120 3121 ath10k_testmode_destroy(ar); 3122 3123 ath10k_core_free_firmware_files(ar); 3124 ath10k_core_free_board_files(ar); 3125 3126 ath10k_debug_unregister(ar); 3127 } 3128 EXPORT_SYMBOL(ath10k_core_unregister); 3129 3130 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 3131 enum ath10k_bus bus, 3132 enum ath10k_hw_rev hw_rev, 3133 const struct ath10k_hif_ops *hif_ops) 3134 { 3135 struct ath10k *ar; 3136 int ret; 3137 3138 ar = ath10k_mac_create(priv_size); 3139 if (!ar) 3140 return NULL; 3141 3142 ar->ath_common.priv = ar; 3143 ar->ath_common.hw = ar->hw; 3144 ar->dev = dev; 3145 ar->hw_rev = hw_rev; 3146 ar->hif.ops = hif_ops; 3147 ar->hif.bus = bus; 3148 3149 switch (hw_rev) { 3150 case ATH10K_HW_QCA988X: 3151 case ATH10K_HW_QCA9887: 3152 ar->regs = &qca988x_regs; 3153 ar->hw_ce_regs = &qcax_ce_regs; 3154 ar->hw_values = &qca988x_values; 3155 break; 3156 case ATH10K_HW_QCA6174: 3157 case ATH10K_HW_QCA9377: 3158 ar->regs = &qca6174_regs; 3159 ar->hw_ce_regs = &qcax_ce_regs; 3160 ar->hw_values = &qca6174_values; 3161 break; 3162 case ATH10K_HW_QCA99X0: 3163 case ATH10K_HW_QCA9984: 3164 ar->regs = &qca99x0_regs; 3165 ar->hw_ce_regs = &qcax_ce_regs; 3166 ar->hw_values = &qca99x0_values; 3167 break; 3168 case ATH10K_HW_QCA9888: 3169 ar->regs = &qca99x0_regs; 3170 ar->hw_ce_regs = &qcax_ce_regs; 3171 ar->hw_values = &qca9888_values; 3172 break; 3173 case ATH10K_HW_QCA4019: 3174 ar->regs = &qca4019_regs; 3175 ar->hw_ce_regs = &qcax_ce_regs; 3176 ar->hw_values = &qca4019_values; 3177 break; 3178 case ATH10K_HW_WCN3990: 3179 ar->regs = &wcn3990_regs; 3180 ar->hw_ce_regs = &wcn3990_ce_regs; 3181 ar->hw_values = &wcn3990_values; 3182 break; 3183 default: 3184 ath10k_err(ar, "unsupported core hardware revision %d\n", 3185 hw_rev); 3186 ret = -ENOTSUPP; 3187 goto err_free_mac; 3188 } 3189 3190 init_completion(&ar->scan.started); 3191 init_completion(&ar->scan.completed); 3192 init_completion(&ar->scan.on_channel); 3193 init_completion(&ar->target_suspend); 3194 init_completion(&ar->driver_recovery); 3195 init_completion(&ar->wow.wakeup_completed); 3196 3197 init_completion(&ar->install_key_done); 3198 init_completion(&ar->vdev_setup_done); 3199 init_completion(&ar->vdev_delete_done); 3200 init_completion(&ar->thermal.wmi_sync); 3201 init_completion(&ar->bss_survey_done); 3202 init_completion(&ar->peer_delete_done); 3203 3204 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3205 3206 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3207 if (!ar->workqueue) 3208 goto err_free_mac; 3209 3210 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3211 if (!ar->workqueue_aux) 3212 goto err_free_wq; 3213 3214 mutex_init(&ar->conf_mutex); 3215 mutex_init(&ar->dump_mutex); 3216 spin_lock_init(&ar->data_lock); 3217 3218 INIT_LIST_HEAD(&ar->peers); 3219 init_waitqueue_head(&ar->peer_mapping_wq); 3220 init_waitqueue_head(&ar->htt.empty_tx_wq); 3221 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3222 3223 skb_queue_head_init(&ar->htt.rx_indication_head); 3224 3225 init_completion(&ar->offchan_tx_completed); 3226 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3227 skb_queue_head_init(&ar->offchan_tx_queue); 3228 3229 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3230 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3231 3232 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3233 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3234 INIT_WORK(&ar->set_coverage_class_work, 3235 ath10k_core_set_coverage_class_work); 3236 3237 init_dummy_netdev(&ar->napi_dev); 3238 3239 ret = ath10k_coredump_create(ar); 3240 if (ret) 3241 goto err_free_aux_wq; 3242 3243 ret = ath10k_debug_create(ar); 3244 if (ret) 3245 goto err_free_coredump; 3246 3247 return ar; 3248 3249 err_free_coredump: 3250 ath10k_coredump_destroy(ar); 3251 3252 err_free_aux_wq: 3253 destroy_workqueue(ar->workqueue_aux); 3254 err_free_wq: 3255 destroy_workqueue(ar->workqueue); 3256 3257 err_free_mac: 3258 ath10k_mac_destroy(ar); 3259 3260 return NULL; 3261 } 3262 EXPORT_SYMBOL(ath10k_core_create); 3263 3264 void ath10k_core_destroy(struct ath10k *ar) 3265 { 3266 flush_workqueue(ar->workqueue); 3267 destroy_workqueue(ar->workqueue); 3268 3269 flush_workqueue(ar->workqueue_aux); 3270 destroy_workqueue(ar->workqueue_aux); 3271 3272 ath10k_debug_destroy(ar); 3273 ath10k_coredump_destroy(ar); 3274 ath10k_htt_tx_destroy(&ar->htt); 3275 ath10k_wmi_free_host_mem(ar); 3276 ath10k_mac_destroy(ar); 3277 } 3278 EXPORT_SYMBOL(ath10k_core_destroy); 3279 3280 MODULE_AUTHOR("Qualcomm Atheros"); 3281 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3282 MODULE_LICENSE("Dual BSD/GPL"); 3283