1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <asm/byteorder.h> 22 23 #include "core.h" 24 #include "mac.h" 25 #include "htc.h" 26 #include "hif.h" 27 #include "wmi.h" 28 #include "bmi.h" 29 #include "debug.h" 30 #include "htt.h" 31 #include "testmode.h" 32 #include "wmi-ops.h" 33 34 unsigned int ath10k_debug_mask; 35 static unsigned int ath10k_cryptmode_param; 36 static bool uart_print; 37 static bool skip_otp; 38 static bool rawmode; 39 40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 42 module_param(uart_print, bool, 0644); 43 module_param(skip_otp, bool, 0644); 44 module_param(rawmode, bool, 0644); 45 46 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 47 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 51 52 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 53 { 54 .id = QCA988X_HW_2_0_VERSION, 55 .dev_id = QCA988X_2_0_DEVICE_ID, 56 .name = "qca988x hw2.0", 57 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 58 .uart_pin = 7, 59 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 60 .otp_exe_param = 0, 61 .channel_counters_freq_hz = 88000, 62 .max_probe_resp_desc_thres = 0, 63 .cal_data_len = 2116, 64 .fw = { 65 .dir = QCA988X_HW_2_0_FW_DIR, 66 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 67 .board_size = QCA988X_BOARD_DATA_SZ, 68 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 69 }, 70 .hw_ops = &qca988x_ops, 71 .decap_align_bytes = 4, 72 }, 73 { 74 .id = QCA9887_HW_1_0_VERSION, 75 .dev_id = QCA9887_1_0_DEVICE_ID, 76 .name = "qca9887 hw1.0", 77 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 78 .uart_pin = 7, 79 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 80 .otp_exe_param = 0, 81 .channel_counters_freq_hz = 88000, 82 .max_probe_resp_desc_thres = 0, 83 .cal_data_len = 2116, 84 .fw = { 85 .dir = QCA9887_HW_1_0_FW_DIR, 86 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 87 .board_size = QCA9887_BOARD_DATA_SZ, 88 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 89 }, 90 .hw_ops = &qca988x_ops, 91 .decap_align_bytes = 4, 92 }, 93 { 94 .id = QCA6174_HW_2_1_VERSION, 95 .dev_id = QCA6164_2_1_DEVICE_ID, 96 .name = "qca6164 hw2.1", 97 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 98 .uart_pin = 6, 99 .otp_exe_param = 0, 100 .channel_counters_freq_hz = 88000, 101 .max_probe_resp_desc_thres = 0, 102 .cal_data_len = 8124, 103 .fw = { 104 .dir = QCA6174_HW_2_1_FW_DIR, 105 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 106 .board_size = QCA6174_BOARD_DATA_SZ, 107 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 108 }, 109 .hw_ops = &qca988x_ops, 110 .decap_align_bytes = 4, 111 }, 112 { 113 .id = QCA6174_HW_2_1_VERSION, 114 .dev_id = QCA6174_2_1_DEVICE_ID, 115 .name = "qca6174 hw2.1", 116 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 117 .uart_pin = 6, 118 .otp_exe_param = 0, 119 .channel_counters_freq_hz = 88000, 120 .max_probe_resp_desc_thres = 0, 121 .cal_data_len = 8124, 122 .fw = { 123 .dir = QCA6174_HW_2_1_FW_DIR, 124 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 125 .board_size = QCA6174_BOARD_DATA_SZ, 126 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 127 }, 128 .hw_ops = &qca988x_ops, 129 .decap_align_bytes = 4, 130 }, 131 { 132 .id = QCA6174_HW_3_0_VERSION, 133 .dev_id = QCA6174_2_1_DEVICE_ID, 134 .name = "qca6174 hw3.0", 135 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 136 .uart_pin = 6, 137 .otp_exe_param = 0, 138 .channel_counters_freq_hz = 88000, 139 .max_probe_resp_desc_thres = 0, 140 .cal_data_len = 8124, 141 .fw = { 142 .dir = QCA6174_HW_3_0_FW_DIR, 143 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 144 .board_size = QCA6174_BOARD_DATA_SZ, 145 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 146 }, 147 .hw_ops = &qca988x_ops, 148 .decap_align_bytes = 4, 149 }, 150 { 151 .id = QCA6174_HW_3_2_VERSION, 152 .dev_id = QCA6174_2_1_DEVICE_ID, 153 .name = "qca6174 hw3.2", 154 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 155 .uart_pin = 6, 156 .otp_exe_param = 0, 157 .channel_counters_freq_hz = 88000, 158 .max_probe_resp_desc_thres = 0, 159 .cal_data_len = 8124, 160 .fw = { 161 /* uses same binaries as hw3.0 */ 162 .dir = QCA6174_HW_3_0_FW_DIR, 163 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 164 .board_size = QCA6174_BOARD_DATA_SZ, 165 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 166 }, 167 .hw_ops = &qca988x_ops, 168 .decap_align_bytes = 4, 169 }, 170 { 171 .id = QCA99X0_HW_2_0_DEV_VERSION, 172 .dev_id = QCA99X0_2_0_DEVICE_ID, 173 .name = "qca99x0 hw2.0", 174 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 175 .uart_pin = 7, 176 .otp_exe_param = 0x00000700, 177 .continuous_frag_desc = true, 178 .cck_rate_map_rev2 = true, 179 .channel_counters_freq_hz = 150000, 180 .max_probe_resp_desc_thres = 24, 181 .tx_chain_mask = 0xf, 182 .rx_chain_mask = 0xf, 183 .max_spatial_stream = 4, 184 .cal_data_len = 12064, 185 .fw = { 186 .dir = QCA99X0_HW_2_0_FW_DIR, 187 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 188 .board_size = QCA99X0_BOARD_DATA_SZ, 189 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 190 }, 191 .sw_decrypt_mcast_mgmt = true, 192 .hw_ops = &qca99x0_ops, 193 .decap_align_bytes = 1, 194 }, 195 { 196 .id = QCA9984_HW_1_0_DEV_VERSION, 197 .dev_id = QCA9984_1_0_DEVICE_ID, 198 .name = "qca9984/qca9994 hw1.0", 199 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 200 .uart_pin = 7, 201 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 202 .otp_exe_param = 0x00000700, 203 .continuous_frag_desc = true, 204 .cck_rate_map_rev2 = true, 205 .channel_counters_freq_hz = 150000, 206 .max_probe_resp_desc_thres = 24, 207 .tx_chain_mask = 0xf, 208 .rx_chain_mask = 0xf, 209 .max_spatial_stream = 4, 210 .cal_data_len = 12064, 211 .fw = { 212 .dir = QCA9984_HW_1_0_FW_DIR, 213 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 214 .board_size = QCA99X0_BOARD_DATA_SZ, 215 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 216 }, 217 .sw_decrypt_mcast_mgmt = true, 218 .hw_ops = &qca99x0_ops, 219 .decap_align_bytes = 1, 220 }, 221 { 222 .id = QCA9888_HW_2_0_DEV_VERSION, 223 .dev_id = QCA9888_2_0_DEVICE_ID, 224 .name = "qca9888 hw2.0", 225 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 226 .uart_pin = 7, 227 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 228 .otp_exe_param = 0x00000700, 229 .continuous_frag_desc = true, 230 .channel_counters_freq_hz = 150000, 231 .max_probe_resp_desc_thres = 24, 232 .tx_chain_mask = 3, 233 .rx_chain_mask = 3, 234 .max_spatial_stream = 2, 235 .cal_data_len = 12064, 236 .fw = { 237 .dir = QCA9888_HW_2_0_FW_DIR, 238 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 239 .board_size = QCA99X0_BOARD_DATA_SZ, 240 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 241 }, 242 .sw_decrypt_mcast_mgmt = true, 243 .hw_ops = &qca99x0_ops, 244 .decap_align_bytes = 1, 245 }, 246 { 247 .id = QCA9377_HW_1_0_DEV_VERSION, 248 .dev_id = QCA9377_1_0_DEVICE_ID, 249 .name = "qca9377 hw1.0", 250 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 251 .uart_pin = 6, 252 .otp_exe_param = 0, 253 .channel_counters_freq_hz = 88000, 254 .max_probe_resp_desc_thres = 0, 255 .cal_data_len = 8124, 256 .fw = { 257 .dir = QCA9377_HW_1_0_FW_DIR, 258 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 259 .board_size = QCA9377_BOARD_DATA_SZ, 260 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 261 }, 262 .hw_ops = &qca988x_ops, 263 .decap_align_bytes = 4, 264 }, 265 { 266 .id = QCA9377_HW_1_1_DEV_VERSION, 267 .dev_id = QCA9377_1_0_DEVICE_ID, 268 .name = "qca9377 hw1.1", 269 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 270 .uart_pin = 6, 271 .otp_exe_param = 0, 272 .channel_counters_freq_hz = 88000, 273 .max_probe_resp_desc_thres = 0, 274 .cal_data_len = 8124, 275 .fw = { 276 .dir = QCA9377_HW_1_0_FW_DIR, 277 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 278 .board_size = QCA9377_BOARD_DATA_SZ, 279 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 280 }, 281 .hw_ops = &qca988x_ops, 282 .decap_align_bytes = 4, 283 }, 284 { 285 .id = QCA4019_HW_1_0_DEV_VERSION, 286 .dev_id = 0, 287 .name = "qca4019 hw1.0", 288 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 289 .uart_pin = 7, 290 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 291 .otp_exe_param = 0x0010000, 292 .continuous_frag_desc = true, 293 .cck_rate_map_rev2 = true, 294 .channel_counters_freq_hz = 125000, 295 .max_probe_resp_desc_thres = 24, 296 .tx_chain_mask = 0x3, 297 .rx_chain_mask = 0x3, 298 .max_spatial_stream = 2, 299 .cal_data_len = 12064, 300 .fw = { 301 .dir = QCA4019_HW_1_0_FW_DIR, 302 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 303 .board_size = QCA4019_BOARD_DATA_SZ, 304 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 305 }, 306 .sw_decrypt_mcast_mgmt = true, 307 .hw_ops = &qca99x0_ops, 308 .decap_align_bytes = 1, 309 }, 310 }; 311 312 static const char *const ath10k_core_fw_feature_str[] = { 313 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 314 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 315 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 316 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 317 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 318 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 319 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 320 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 321 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 322 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 323 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 324 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 325 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 326 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 327 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 328 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 329 }; 330 331 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 332 size_t buf_len, 333 enum ath10k_fw_features feat) 334 { 335 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 336 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 337 ATH10K_FW_FEATURE_COUNT); 338 339 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 340 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 341 return scnprintf(buf, buf_len, "bit%d", feat); 342 } 343 344 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 345 } 346 347 void ath10k_core_get_fw_features_str(struct ath10k *ar, 348 char *buf, 349 size_t buf_len) 350 { 351 unsigned int len = 0; 352 int i; 353 354 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 355 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 356 if (len > 0) 357 len += scnprintf(buf + len, buf_len - len, ","); 358 359 len += ath10k_core_get_fw_feature_str(buf + len, 360 buf_len - len, 361 i); 362 } 363 } 364 } 365 366 static void ath10k_send_suspend_complete(struct ath10k *ar) 367 { 368 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 369 370 complete(&ar->target_suspend); 371 } 372 373 static int ath10k_init_configure_target(struct ath10k *ar) 374 { 375 u32 param_host; 376 int ret; 377 378 /* tell target which HTC version it is used*/ 379 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 380 HTC_PROTOCOL_VERSION); 381 if (ret) { 382 ath10k_err(ar, "settings HTC version failed\n"); 383 return ret; 384 } 385 386 /* set the firmware mode to STA/IBSS/AP */ 387 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 388 if (ret) { 389 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 390 return ret; 391 } 392 393 /* TODO following parameters need to be re-visited. */ 394 /* num_device */ 395 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 396 /* Firmware mode */ 397 /* FIXME: Why FW_MODE_AP ??.*/ 398 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 399 /* mac_addr_method */ 400 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 401 /* firmware_bridge */ 402 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 403 /* fwsubmode */ 404 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 405 406 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 407 if (ret) { 408 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 409 return ret; 410 } 411 412 /* We do all byte-swapping on the host */ 413 ret = ath10k_bmi_write32(ar, hi_be, 0); 414 if (ret) { 415 ath10k_err(ar, "setting host CPU BE mode failed\n"); 416 return ret; 417 } 418 419 /* FW descriptor/Data swap flags */ 420 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 421 422 if (ret) { 423 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 424 return ret; 425 } 426 427 /* Some devices have a special sanity check that verifies the PCI 428 * Device ID is written to this host interest var. It is known to be 429 * required to boot QCA6164. 430 */ 431 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 432 ar->dev_id); 433 if (ret) { 434 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 435 return ret; 436 } 437 438 return 0; 439 } 440 441 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 442 const char *dir, 443 const char *file) 444 { 445 char filename[100]; 446 const struct firmware *fw; 447 int ret; 448 449 if (file == NULL) 450 return ERR_PTR(-ENOENT); 451 452 if (dir == NULL) 453 dir = "."; 454 455 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 456 ret = request_firmware(&fw, filename, ar->dev); 457 if (ret) 458 return ERR_PTR(ret); 459 460 return fw; 461 } 462 463 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 464 size_t data_len) 465 { 466 u32 board_data_size = ar->hw_params.fw.board_size; 467 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 468 u32 board_ext_data_addr; 469 int ret; 470 471 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 472 if (ret) { 473 ath10k_err(ar, "could not read board ext data addr (%d)\n", 474 ret); 475 return ret; 476 } 477 478 ath10k_dbg(ar, ATH10K_DBG_BOOT, 479 "boot push board extended data addr 0x%x\n", 480 board_ext_data_addr); 481 482 if (board_ext_data_addr == 0) 483 return 0; 484 485 if (data_len != (board_data_size + board_ext_data_size)) { 486 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 487 data_len, board_data_size, board_ext_data_size); 488 return -EINVAL; 489 } 490 491 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 492 data + board_data_size, 493 board_ext_data_size); 494 if (ret) { 495 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 496 return ret; 497 } 498 499 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 500 (board_ext_data_size << 16) | 1); 501 if (ret) { 502 ath10k_err(ar, "could not write board ext data bit (%d)\n", 503 ret); 504 return ret; 505 } 506 507 return 0; 508 } 509 510 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 511 size_t data_len) 512 { 513 u32 board_data_size = ar->hw_params.fw.board_size; 514 u32 address; 515 int ret; 516 517 ret = ath10k_push_board_ext_data(ar, data, data_len); 518 if (ret) { 519 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 520 goto exit; 521 } 522 523 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 524 if (ret) { 525 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 526 goto exit; 527 } 528 529 ret = ath10k_bmi_write_memory(ar, address, data, 530 min_t(u32, board_data_size, 531 data_len)); 532 if (ret) { 533 ath10k_err(ar, "could not write board data (%d)\n", ret); 534 goto exit; 535 } 536 537 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 538 if (ret) { 539 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 540 goto exit; 541 } 542 543 exit: 544 return ret; 545 } 546 547 static int ath10k_download_cal_file(struct ath10k *ar, 548 const struct firmware *file) 549 { 550 int ret; 551 552 if (!file) 553 return -ENOENT; 554 555 if (IS_ERR(file)) 556 return PTR_ERR(file); 557 558 ret = ath10k_download_board_data(ar, file->data, file->size); 559 if (ret) { 560 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 561 return ret; 562 } 563 564 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 565 566 return 0; 567 } 568 569 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 570 { 571 struct device_node *node; 572 int data_len; 573 void *data; 574 int ret; 575 576 node = ar->dev->of_node; 577 if (!node) 578 /* Device Tree is optional, don't print any warnings if 579 * there's no node for ath10k. 580 */ 581 return -ENOENT; 582 583 if (!of_get_property(node, dt_name, &data_len)) { 584 /* The calibration data node is optional */ 585 return -ENOENT; 586 } 587 588 if (data_len != ar->hw_params.cal_data_len) { 589 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 590 data_len); 591 ret = -EMSGSIZE; 592 goto out; 593 } 594 595 data = kmalloc(data_len, GFP_KERNEL); 596 if (!data) { 597 ret = -ENOMEM; 598 goto out; 599 } 600 601 ret = of_property_read_u8_array(node, dt_name, data, data_len); 602 if (ret) { 603 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 604 ret); 605 goto out_free; 606 } 607 608 ret = ath10k_download_board_data(ar, data, data_len); 609 if (ret) { 610 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 611 ret); 612 goto out_free; 613 } 614 615 ret = 0; 616 617 out_free: 618 kfree(data); 619 620 out: 621 return ret; 622 } 623 624 static int ath10k_download_cal_eeprom(struct ath10k *ar) 625 { 626 size_t data_len; 627 void *data = NULL; 628 int ret; 629 630 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 631 if (ret) { 632 if (ret != -EOPNOTSUPP) 633 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 634 ret); 635 goto out_free; 636 } 637 638 ret = ath10k_download_board_data(ar, data, data_len); 639 if (ret) { 640 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 641 ret); 642 goto out_free; 643 } 644 645 ret = 0; 646 647 out_free: 648 kfree(data); 649 650 return ret; 651 } 652 653 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 654 { 655 u32 result, address; 656 u8 board_id, chip_id; 657 int ret; 658 659 address = ar->hw_params.patch_load_addr; 660 661 if (!ar->normal_mode_fw.fw_file.otp_data || 662 !ar->normal_mode_fw.fw_file.otp_len) { 663 ath10k_warn(ar, 664 "failed to retrieve board id because of invalid otp\n"); 665 return -ENODATA; 666 } 667 668 ath10k_dbg(ar, ATH10K_DBG_BOOT, 669 "boot upload otp to 0x%x len %zd for board id\n", 670 address, ar->normal_mode_fw.fw_file.otp_len); 671 672 ret = ath10k_bmi_fast_download(ar, address, 673 ar->normal_mode_fw.fw_file.otp_data, 674 ar->normal_mode_fw.fw_file.otp_len); 675 if (ret) { 676 ath10k_err(ar, "could not write otp for board id check: %d\n", 677 ret); 678 return ret; 679 } 680 681 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 682 &result); 683 if (ret) { 684 ath10k_err(ar, "could not execute otp for board id check: %d\n", 685 ret); 686 return ret; 687 } 688 689 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 690 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 691 692 ath10k_dbg(ar, ATH10K_DBG_BOOT, 693 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 694 result, board_id, chip_id); 695 696 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) 697 return -EOPNOTSUPP; 698 699 ar->id.bmi_ids_valid = true; 700 ar->id.bmi_board_id = board_id; 701 ar->id.bmi_chip_id = chip_id; 702 703 return 0; 704 } 705 706 static int ath10k_download_and_run_otp(struct ath10k *ar) 707 { 708 u32 result, address = ar->hw_params.patch_load_addr; 709 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 710 int ret; 711 712 ret = ath10k_download_board_data(ar, 713 ar->running_fw->board_data, 714 ar->running_fw->board_len); 715 if (ret) { 716 ath10k_err(ar, "failed to download board data: %d\n", ret); 717 return ret; 718 } 719 720 /* OTP is optional */ 721 722 if (!ar->running_fw->fw_file.otp_data || 723 !ar->running_fw->fw_file.otp_len) { 724 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 725 ar->running_fw->fw_file.otp_data, 726 ar->running_fw->fw_file.otp_len); 727 return 0; 728 } 729 730 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 731 address, ar->running_fw->fw_file.otp_len); 732 733 ret = ath10k_bmi_fast_download(ar, address, 734 ar->running_fw->fw_file.otp_data, 735 ar->running_fw->fw_file.otp_len); 736 if (ret) { 737 ath10k_err(ar, "could not write otp (%d)\n", ret); 738 return ret; 739 } 740 741 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 742 if (ret) { 743 ath10k_err(ar, "could not execute otp (%d)\n", ret); 744 return ret; 745 } 746 747 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 748 749 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 750 ar->running_fw->fw_file.fw_features)) && 751 result != 0) { 752 ath10k_err(ar, "otp calibration failed: %d", result); 753 return -EINVAL; 754 } 755 756 return 0; 757 } 758 759 static int ath10k_download_fw(struct ath10k *ar) 760 { 761 u32 address, data_len; 762 const void *data; 763 int ret; 764 765 address = ar->hw_params.patch_load_addr; 766 767 data = ar->running_fw->fw_file.firmware_data; 768 data_len = ar->running_fw->fw_file.firmware_len; 769 770 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 771 if (ret) { 772 ath10k_err(ar, "failed to configure fw code swap: %d\n", 773 ret); 774 return ret; 775 } 776 777 ath10k_dbg(ar, ATH10K_DBG_BOOT, 778 "boot uploading firmware image %pK len %d\n", 779 data, data_len); 780 781 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 782 if (ret) { 783 ath10k_err(ar, "failed to download firmware: %d\n", 784 ret); 785 return ret; 786 } 787 788 return ret; 789 } 790 791 static void ath10k_core_free_board_files(struct ath10k *ar) 792 { 793 if (!IS_ERR(ar->normal_mode_fw.board)) 794 release_firmware(ar->normal_mode_fw.board); 795 796 ar->normal_mode_fw.board = NULL; 797 ar->normal_mode_fw.board_data = NULL; 798 ar->normal_mode_fw.board_len = 0; 799 } 800 801 static void ath10k_core_free_firmware_files(struct ath10k *ar) 802 { 803 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 804 release_firmware(ar->normal_mode_fw.fw_file.firmware); 805 806 if (!IS_ERR(ar->cal_file)) 807 release_firmware(ar->cal_file); 808 809 if (!IS_ERR(ar->pre_cal_file)) 810 release_firmware(ar->pre_cal_file); 811 812 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 813 814 ar->normal_mode_fw.fw_file.otp_data = NULL; 815 ar->normal_mode_fw.fw_file.otp_len = 0; 816 817 ar->normal_mode_fw.fw_file.firmware = NULL; 818 ar->normal_mode_fw.fw_file.firmware_data = NULL; 819 ar->normal_mode_fw.fw_file.firmware_len = 0; 820 821 ar->cal_file = NULL; 822 ar->pre_cal_file = NULL; 823 } 824 825 static int ath10k_fetch_cal_file(struct ath10k *ar) 826 { 827 char filename[100]; 828 829 /* pre-cal-<bus>-<id>.bin */ 830 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 831 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 832 833 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 834 if (!IS_ERR(ar->pre_cal_file)) 835 goto success; 836 837 /* cal-<bus>-<id>.bin */ 838 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 839 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 840 841 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 842 if (IS_ERR(ar->cal_file)) 843 /* calibration file is optional, don't print any warnings */ 844 return PTR_ERR(ar->cal_file); 845 success: 846 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 847 ATH10K_FW_DIR, filename); 848 849 return 0; 850 } 851 852 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 853 { 854 if (!ar->hw_params.fw.board) { 855 ath10k_err(ar, "failed to find board file fw entry\n"); 856 return -EINVAL; 857 } 858 859 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 860 ar->hw_params.fw.dir, 861 ar->hw_params.fw.board); 862 if (IS_ERR(ar->normal_mode_fw.board)) 863 return PTR_ERR(ar->normal_mode_fw.board); 864 865 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 866 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 867 868 return 0; 869 } 870 871 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 872 const void *buf, size_t buf_len, 873 const char *boardname) 874 { 875 const struct ath10k_fw_ie *hdr; 876 bool name_match_found; 877 int ret, board_ie_id; 878 size_t board_ie_len; 879 const void *board_ie_data; 880 881 name_match_found = false; 882 883 /* go through ATH10K_BD_IE_BOARD_ elements */ 884 while (buf_len > sizeof(struct ath10k_fw_ie)) { 885 hdr = buf; 886 board_ie_id = le32_to_cpu(hdr->id); 887 board_ie_len = le32_to_cpu(hdr->len); 888 board_ie_data = hdr->data; 889 890 buf_len -= sizeof(*hdr); 891 buf += sizeof(*hdr); 892 893 if (buf_len < ALIGN(board_ie_len, 4)) { 894 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 895 buf_len, ALIGN(board_ie_len, 4)); 896 ret = -EINVAL; 897 goto out; 898 } 899 900 switch (board_ie_id) { 901 case ATH10K_BD_IE_BOARD_NAME: 902 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 903 board_ie_data, board_ie_len); 904 905 if (board_ie_len != strlen(boardname)) 906 break; 907 908 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 909 if (ret) 910 break; 911 912 name_match_found = true; 913 ath10k_dbg(ar, ATH10K_DBG_BOOT, 914 "boot found match for name '%s'", 915 boardname); 916 break; 917 case ATH10K_BD_IE_BOARD_DATA: 918 if (!name_match_found) 919 /* no match found */ 920 break; 921 922 ath10k_dbg(ar, ATH10K_DBG_BOOT, 923 "boot found board data for '%s'", 924 boardname); 925 926 ar->normal_mode_fw.board_data = board_ie_data; 927 ar->normal_mode_fw.board_len = board_ie_len; 928 929 ret = 0; 930 goto out; 931 default: 932 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 933 board_ie_id); 934 break; 935 } 936 937 /* jump over the padding */ 938 board_ie_len = ALIGN(board_ie_len, 4); 939 940 buf_len -= board_ie_len; 941 buf += board_ie_len; 942 } 943 944 /* no match found */ 945 ret = -ENOENT; 946 947 out: 948 return ret; 949 } 950 951 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 952 const char *boardname, 953 const char *filename) 954 { 955 size_t len, magic_len, ie_len; 956 struct ath10k_fw_ie *hdr; 957 const u8 *data; 958 int ret, ie_id; 959 960 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 961 ar->hw_params.fw.dir, 962 filename); 963 if (IS_ERR(ar->normal_mode_fw.board)) 964 return PTR_ERR(ar->normal_mode_fw.board); 965 966 data = ar->normal_mode_fw.board->data; 967 len = ar->normal_mode_fw.board->size; 968 969 /* magic has extra null byte padded */ 970 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 971 if (len < magic_len) { 972 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 973 ar->hw_params.fw.dir, filename, len); 974 ret = -EINVAL; 975 goto err; 976 } 977 978 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 979 ath10k_err(ar, "found invalid board magic\n"); 980 ret = -EINVAL; 981 goto err; 982 } 983 984 /* magic is padded to 4 bytes */ 985 magic_len = ALIGN(magic_len, 4); 986 if (len < magic_len) { 987 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 988 ar->hw_params.fw.dir, filename, len); 989 ret = -EINVAL; 990 goto err; 991 } 992 993 data += magic_len; 994 len -= magic_len; 995 996 while (len > sizeof(struct ath10k_fw_ie)) { 997 hdr = (struct ath10k_fw_ie *)data; 998 ie_id = le32_to_cpu(hdr->id); 999 ie_len = le32_to_cpu(hdr->len); 1000 1001 len -= sizeof(*hdr); 1002 data = hdr->data; 1003 1004 if (len < ALIGN(ie_len, 4)) { 1005 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1006 ie_id, ie_len, len); 1007 ret = -EINVAL; 1008 goto err; 1009 } 1010 1011 switch (ie_id) { 1012 case ATH10K_BD_IE_BOARD: 1013 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1014 boardname); 1015 if (ret == -ENOENT) 1016 /* no match found, continue */ 1017 break; 1018 else if (ret) 1019 /* there was an error, bail out */ 1020 goto err; 1021 1022 /* board data found */ 1023 goto out; 1024 } 1025 1026 /* jump over the padding */ 1027 ie_len = ALIGN(ie_len, 4); 1028 1029 len -= ie_len; 1030 data += ie_len; 1031 } 1032 1033 out: 1034 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1035 ath10k_err(ar, 1036 "failed to fetch board data for %s from %s/%s\n", 1037 boardname, ar->hw_params.fw.dir, filename); 1038 ret = -ENODATA; 1039 goto err; 1040 } 1041 1042 return 0; 1043 1044 err: 1045 ath10k_core_free_board_files(ar); 1046 return ret; 1047 } 1048 1049 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1050 size_t name_len) 1051 { 1052 if (ar->id.bmi_ids_valid) { 1053 scnprintf(name, name_len, 1054 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1055 ath10k_bus_str(ar->hif.bus), 1056 ar->id.bmi_chip_id, 1057 ar->id.bmi_board_id); 1058 goto out; 1059 } 1060 1061 scnprintf(name, name_len, 1062 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 1063 ath10k_bus_str(ar->hif.bus), 1064 ar->id.vendor, ar->id.device, 1065 ar->id.subsystem_vendor, ar->id.subsystem_device); 1066 1067 out: 1068 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1069 1070 return 0; 1071 } 1072 1073 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1074 { 1075 char boardname[100]; 1076 int ret; 1077 1078 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1079 if (ret) { 1080 ath10k_err(ar, "failed to create board name: %d", ret); 1081 return ret; 1082 } 1083 1084 ar->bd_api = 2; 1085 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1086 ATH10K_BOARD_API2_FILE); 1087 if (!ret) 1088 goto success; 1089 1090 ar->bd_api = 1; 1091 ret = ath10k_core_fetch_board_data_api_1(ar); 1092 if (ret) { 1093 ath10k_err(ar, "failed to fetch board data\n"); 1094 return ret; 1095 } 1096 1097 success: 1098 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1099 return 0; 1100 } 1101 1102 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1103 struct ath10k_fw_file *fw_file) 1104 { 1105 size_t magic_len, len, ie_len; 1106 int ie_id, i, index, bit, ret; 1107 struct ath10k_fw_ie *hdr; 1108 const u8 *data; 1109 __le32 *timestamp, *version; 1110 1111 /* first fetch the firmware file (firmware-*.bin) */ 1112 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1113 name); 1114 if (IS_ERR(fw_file->firmware)) { 1115 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 1116 ar->hw_params.fw.dir, name, 1117 PTR_ERR(fw_file->firmware)); 1118 return PTR_ERR(fw_file->firmware); 1119 } 1120 1121 data = fw_file->firmware->data; 1122 len = fw_file->firmware->size; 1123 1124 /* magic also includes the null byte, check that as well */ 1125 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1126 1127 if (len < magic_len) { 1128 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1129 ar->hw_params.fw.dir, name, len); 1130 ret = -EINVAL; 1131 goto err; 1132 } 1133 1134 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1135 ath10k_err(ar, "invalid firmware magic\n"); 1136 ret = -EINVAL; 1137 goto err; 1138 } 1139 1140 /* jump over the padding */ 1141 magic_len = ALIGN(magic_len, 4); 1142 1143 len -= magic_len; 1144 data += magic_len; 1145 1146 /* loop elements */ 1147 while (len > sizeof(struct ath10k_fw_ie)) { 1148 hdr = (struct ath10k_fw_ie *)data; 1149 1150 ie_id = le32_to_cpu(hdr->id); 1151 ie_len = le32_to_cpu(hdr->len); 1152 1153 len -= sizeof(*hdr); 1154 data += sizeof(*hdr); 1155 1156 if (len < ie_len) { 1157 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1158 ie_id, len, ie_len); 1159 ret = -EINVAL; 1160 goto err; 1161 } 1162 1163 switch (ie_id) { 1164 case ATH10K_FW_IE_FW_VERSION: 1165 if (ie_len > sizeof(fw_file->fw_version) - 1) 1166 break; 1167 1168 memcpy(fw_file->fw_version, data, ie_len); 1169 fw_file->fw_version[ie_len] = '\0'; 1170 1171 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1172 "found fw version %s\n", 1173 fw_file->fw_version); 1174 break; 1175 case ATH10K_FW_IE_TIMESTAMP: 1176 if (ie_len != sizeof(u32)) 1177 break; 1178 1179 timestamp = (__le32 *)data; 1180 1181 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1182 le32_to_cpup(timestamp)); 1183 break; 1184 case ATH10K_FW_IE_FEATURES: 1185 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1186 "found firmware features ie (%zd B)\n", 1187 ie_len); 1188 1189 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1190 index = i / 8; 1191 bit = i % 8; 1192 1193 if (index == ie_len) 1194 break; 1195 1196 if (data[index] & (1 << bit)) { 1197 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1198 "Enabling feature bit: %i\n", 1199 i); 1200 __set_bit(i, fw_file->fw_features); 1201 } 1202 } 1203 1204 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1205 fw_file->fw_features, 1206 sizeof(fw_file->fw_features)); 1207 break; 1208 case ATH10K_FW_IE_FW_IMAGE: 1209 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1210 "found fw image ie (%zd B)\n", 1211 ie_len); 1212 1213 fw_file->firmware_data = data; 1214 fw_file->firmware_len = ie_len; 1215 1216 break; 1217 case ATH10K_FW_IE_OTP_IMAGE: 1218 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1219 "found otp image ie (%zd B)\n", 1220 ie_len); 1221 1222 fw_file->otp_data = data; 1223 fw_file->otp_len = ie_len; 1224 1225 break; 1226 case ATH10K_FW_IE_WMI_OP_VERSION: 1227 if (ie_len != sizeof(u32)) 1228 break; 1229 1230 version = (__le32 *)data; 1231 1232 fw_file->wmi_op_version = le32_to_cpup(version); 1233 1234 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1235 fw_file->wmi_op_version); 1236 break; 1237 case ATH10K_FW_IE_HTT_OP_VERSION: 1238 if (ie_len != sizeof(u32)) 1239 break; 1240 1241 version = (__le32 *)data; 1242 1243 fw_file->htt_op_version = le32_to_cpup(version); 1244 1245 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1246 fw_file->htt_op_version); 1247 break; 1248 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1249 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1250 "found fw code swap image ie (%zd B)\n", 1251 ie_len); 1252 fw_file->codeswap_data = data; 1253 fw_file->codeswap_len = ie_len; 1254 break; 1255 default: 1256 ath10k_warn(ar, "Unknown FW IE: %u\n", 1257 le32_to_cpu(hdr->id)); 1258 break; 1259 } 1260 1261 /* jump over the padding */ 1262 ie_len = ALIGN(ie_len, 4); 1263 1264 len -= ie_len; 1265 data += ie_len; 1266 } 1267 1268 if (!fw_file->firmware_data || 1269 !fw_file->firmware_len) { 1270 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1271 ar->hw_params.fw.dir, name); 1272 ret = -ENOMEDIUM; 1273 goto err; 1274 } 1275 1276 return 0; 1277 1278 err: 1279 ath10k_core_free_firmware_files(ar); 1280 return ret; 1281 } 1282 1283 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1284 { 1285 int ret; 1286 1287 /* calibration file is optional, don't check for any errors */ 1288 ath10k_fetch_cal_file(ar); 1289 1290 ar->fw_api = 5; 1291 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1292 1293 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE, 1294 &ar->normal_mode_fw.fw_file); 1295 if (ret == 0) 1296 goto success; 1297 1298 ar->fw_api = 4; 1299 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1300 1301 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE, 1302 &ar->normal_mode_fw.fw_file); 1303 if (ret == 0) 1304 goto success; 1305 1306 ar->fw_api = 3; 1307 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1308 1309 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE, 1310 &ar->normal_mode_fw.fw_file); 1311 if (ret == 0) 1312 goto success; 1313 1314 ar->fw_api = 2; 1315 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1316 1317 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE, 1318 &ar->normal_mode_fw.fw_file); 1319 if (ret) 1320 return ret; 1321 1322 success: 1323 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1324 1325 return 0; 1326 } 1327 1328 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1329 { 1330 int ret; 1331 1332 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1333 if (ret == 0) { 1334 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1335 goto success; 1336 } 1337 1338 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1339 "boot did not find a pre calibration file, try DT next: %d\n", 1340 ret); 1341 1342 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1343 if (ret) { 1344 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1345 "unable to load pre cal data from DT: %d\n", ret); 1346 return ret; 1347 } 1348 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1349 1350 success: 1351 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1352 ath10k_cal_mode_str(ar->cal_mode)); 1353 1354 return 0; 1355 } 1356 1357 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1358 { 1359 int ret; 1360 1361 ret = ath10k_core_pre_cal_download(ar); 1362 if (ret) { 1363 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1364 "failed to load pre cal data: %d\n", ret); 1365 return ret; 1366 } 1367 1368 ret = ath10k_core_get_board_id_from_otp(ar); 1369 if (ret) { 1370 ath10k_err(ar, "failed to get board id: %d\n", ret); 1371 return ret; 1372 } 1373 1374 ret = ath10k_download_and_run_otp(ar); 1375 if (ret) { 1376 ath10k_err(ar, "failed to run otp: %d\n", ret); 1377 return ret; 1378 } 1379 1380 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1381 "pre cal configuration done successfully\n"); 1382 1383 return 0; 1384 } 1385 1386 static int ath10k_download_cal_data(struct ath10k *ar) 1387 { 1388 int ret; 1389 1390 ret = ath10k_core_pre_cal_config(ar); 1391 if (ret == 0) 1392 return 0; 1393 1394 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1395 "pre cal download procedure failed, try cal file: %d\n", 1396 ret); 1397 1398 ret = ath10k_download_cal_file(ar, ar->cal_file); 1399 if (ret == 0) { 1400 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1401 goto done; 1402 } 1403 1404 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1405 "boot did not find a calibration file, try DT next: %d\n", 1406 ret); 1407 1408 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1409 if (ret == 0) { 1410 ar->cal_mode = ATH10K_CAL_MODE_DT; 1411 goto done; 1412 } 1413 1414 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1415 "boot did not find DT entry, try target EEPROM next: %d\n", 1416 ret); 1417 1418 ret = ath10k_download_cal_eeprom(ar); 1419 if (ret == 0) { 1420 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1421 goto done; 1422 } 1423 1424 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1425 "boot did not find target EEPROM entry, try OTP next: %d\n", 1426 ret); 1427 1428 ret = ath10k_download_and_run_otp(ar); 1429 if (ret) { 1430 ath10k_err(ar, "failed to run otp: %d\n", ret); 1431 return ret; 1432 } 1433 1434 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1435 1436 done: 1437 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1438 ath10k_cal_mode_str(ar->cal_mode)); 1439 return 0; 1440 } 1441 1442 static int ath10k_init_uart(struct ath10k *ar) 1443 { 1444 int ret; 1445 1446 /* 1447 * Explicitly setting UART prints to zero as target turns it on 1448 * based on scratch registers. 1449 */ 1450 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1451 if (ret) { 1452 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1453 return ret; 1454 } 1455 1456 if (!uart_print) 1457 return 0; 1458 1459 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1460 if (ret) { 1461 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1462 return ret; 1463 } 1464 1465 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1466 if (ret) { 1467 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1468 return ret; 1469 } 1470 1471 /* Set the UART baud rate to 19200. */ 1472 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1473 if (ret) { 1474 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1475 return ret; 1476 } 1477 1478 ath10k_info(ar, "UART prints enabled\n"); 1479 return 0; 1480 } 1481 1482 static int ath10k_init_hw_params(struct ath10k *ar) 1483 { 1484 const struct ath10k_hw_params *uninitialized_var(hw_params); 1485 int i; 1486 1487 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1488 hw_params = &ath10k_hw_params_list[i]; 1489 1490 if (hw_params->id == ar->target_version && 1491 hw_params->dev_id == ar->dev_id) 1492 break; 1493 } 1494 1495 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1496 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1497 ar->target_version); 1498 return -EINVAL; 1499 } 1500 1501 ar->hw_params = *hw_params; 1502 1503 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1504 ar->hw_params.name, ar->target_version); 1505 1506 return 0; 1507 } 1508 1509 static void ath10k_core_restart(struct work_struct *work) 1510 { 1511 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1512 1513 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1514 1515 /* Place a barrier to make sure the compiler doesn't reorder 1516 * CRASH_FLUSH and calling other functions. 1517 */ 1518 barrier(); 1519 1520 ieee80211_stop_queues(ar->hw); 1521 ath10k_drain_tx(ar); 1522 complete(&ar->scan.started); 1523 complete(&ar->scan.completed); 1524 complete(&ar->scan.on_channel); 1525 complete(&ar->offchan_tx_completed); 1526 complete(&ar->install_key_done); 1527 complete(&ar->vdev_setup_done); 1528 complete(&ar->thermal.wmi_sync); 1529 complete(&ar->bss_survey_done); 1530 wake_up(&ar->htt.empty_tx_wq); 1531 wake_up(&ar->wmi.tx_credits_wq); 1532 wake_up(&ar->peer_mapping_wq); 1533 1534 mutex_lock(&ar->conf_mutex); 1535 1536 switch (ar->state) { 1537 case ATH10K_STATE_ON: 1538 ar->state = ATH10K_STATE_RESTARTING; 1539 ath10k_hif_stop(ar); 1540 ath10k_scan_finish(ar); 1541 ieee80211_restart_hw(ar->hw); 1542 break; 1543 case ATH10K_STATE_OFF: 1544 /* this can happen if driver is being unloaded 1545 * or if the crash happens during FW probing */ 1546 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1547 break; 1548 case ATH10K_STATE_RESTARTING: 1549 /* hw restart might be requested from multiple places */ 1550 break; 1551 case ATH10K_STATE_RESTARTED: 1552 ar->state = ATH10K_STATE_WEDGED; 1553 /* fall through */ 1554 case ATH10K_STATE_WEDGED: 1555 ath10k_warn(ar, "device is wedged, will not restart\n"); 1556 break; 1557 case ATH10K_STATE_UTF: 1558 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1559 break; 1560 } 1561 1562 mutex_unlock(&ar->conf_mutex); 1563 } 1564 1565 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 1566 { 1567 struct ath10k *ar = container_of(work, struct ath10k, 1568 set_coverage_class_work); 1569 1570 if (ar->hw_params.hw_ops->set_coverage_class) 1571 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 1572 } 1573 1574 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1575 { 1576 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1577 1578 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1579 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1580 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1581 return -EINVAL; 1582 } 1583 1584 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1585 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1586 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1587 return -EINVAL; 1588 } 1589 1590 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1591 switch (ath10k_cryptmode_param) { 1592 case ATH10K_CRYPT_MODE_HW: 1593 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1594 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1595 break; 1596 case ATH10K_CRYPT_MODE_SW: 1597 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1598 fw_file->fw_features)) { 1599 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1600 return -EINVAL; 1601 } 1602 1603 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1604 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1605 break; 1606 default: 1607 ath10k_info(ar, "invalid cryptmode: %d\n", 1608 ath10k_cryptmode_param); 1609 return -EINVAL; 1610 } 1611 1612 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1613 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1614 1615 if (rawmode) { 1616 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1617 fw_file->fw_features)) { 1618 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1619 return -EINVAL; 1620 } 1621 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1622 } 1623 1624 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1625 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1626 1627 /* Workaround: 1628 * 1629 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1630 * and causes enormous performance issues (malformed frames, 1631 * etc). 1632 * 1633 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1634 * albeit a bit slower compared to regular operation. 1635 */ 1636 ar->htt.max_num_amsdu = 1; 1637 } 1638 1639 /* Backwards compatibility for firmwares without 1640 * ATH10K_FW_IE_WMI_OP_VERSION. 1641 */ 1642 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1643 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1644 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1645 fw_file->fw_features)) 1646 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1647 else 1648 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1649 } else { 1650 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1651 } 1652 } 1653 1654 switch (fw_file->wmi_op_version) { 1655 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1656 ar->max_num_peers = TARGET_NUM_PEERS; 1657 ar->max_num_stations = TARGET_NUM_STATIONS; 1658 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1659 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1660 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1661 WMI_STAT_PEER; 1662 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1663 break; 1664 case ATH10K_FW_WMI_OP_VERSION_10_1: 1665 case ATH10K_FW_WMI_OP_VERSION_10_2: 1666 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1667 if (ath10k_peer_stats_enabled(ar)) { 1668 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1669 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1670 } else { 1671 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1672 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1673 } 1674 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1675 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1676 ar->fw_stats_req_mask = WMI_STAT_PEER; 1677 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1678 break; 1679 case ATH10K_FW_WMI_OP_VERSION_TLV: 1680 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1681 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1682 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1683 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1684 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1685 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1686 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1687 WMI_STAT_PEER; 1688 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1689 break; 1690 case ATH10K_FW_WMI_OP_VERSION_10_4: 1691 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1692 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1693 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1694 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1695 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1696 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1697 WMI_10_4_STAT_PEER_EXTD; 1698 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1699 1700 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1701 fw_file->fw_features)) 1702 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1703 else 1704 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1705 break; 1706 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1707 case ATH10K_FW_WMI_OP_VERSION_MAX: 1708 WARN_ON(1); 1709 return -EINVAL; 1710 } 1711 1712 /* Backwards compatibility for firmwares without 1713 * ATH10K_FW_IE_HTT_OP_VERSION. 1714 */ 1715 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1716 switch (fw_file->wmi_op_version) { 1717 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1718 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1719 break; 1720 case ATH10K_FW_WMI_OP_VERSION_10_1: 1721 case ATH10K_FW_WMI_OP_VERSION_10_2: 1722 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1723 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1724 break; 1725 case ATH10K_FW_WMI_OP_VERSION_TLV: 1726 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1727 break; 1728 case ATH10K_FW_WMI_OP_VERSION_10_4: 1729 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1730 case ATH10K_FW_WMI_OP_VERSION_MAX: 1731 ath10k_err(ar, "htt op version not found from fw meta data"); 1732 return -EINVAL; 1733 } 1734 } 1735 1736 return 0; 1737 } 1738 1739 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 1740 { 1741 int ret; 1742 int vdev_id; 1743 int vdev_type; 1744 int vdev_subtype; 1745 const u8 *vdev_addr; 1746 1747 vdev_id = 0; 1748 vdev_type = WMI_VDEV_TYPE_STA; 1749 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 1750 vdev_addr = ar->mac_addr; 1751 1752 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 1753 vdev_addr); 1754 if (ret) { 1755 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 1756 return ret; 1757 } 1758 1759 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 1760 if (ret) { 1761 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 1762 return ret; 1763 } 1764 1765 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 1766 * serialized properly implicitly. 1767 * 1768 * Moreover (most) WMI commands have no explicit acknowledges. It is 1769 * possible to infer it implicitly by poking firmware with echo 1770 * command - getting a reply means all preceding comments have been 1771 * (mostly) processed. 1772 * 1773 * In case of vdev create/delete this is sufficient. 1774 * 1775 * Without this it's possible to end up with a race when HTT Rx ring is 1776 * started before vdev create/delete hack is complete allowing a short 1777 * window of opportunity to receive (and Tx ACK) a bunch of frames. 1778 */ 1779 ret = ath10k_wmi_barrier(ar); 1780 if (ret) { 1781 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 1782 return ret; 1783 } 1784 1785 return 0; 1786 } 1787 1788 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1789 const struct ath10k_fw_components *fw) 1790 { 1791 int status; 1792 u32 val; 1793 1794 lockdep_assert_held(&ar->conf_mutex); 1795 1796 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1797 1798 ar->running_fw = fw; 1799 1800 ath10k_bmi_start(ar); 1801 1802 if (ath10k_init_configure_target(ar)) { 1803 status = -EINVAL; 1804 goto err; 1805 } 1806 1807 status = ath10k_download_cal_data(ar); 1808 if (status) 1809 goto err; 1810 1811 /* Some of of qca988x solutions are having global reset issue 1812 * during target initialization. Bypassing PLL setting before 1813 * downloading firmware and letting the SoC run on REF_CLK is 1814 * fixing the problem. Corresponding firmware change is also needed 1815 * to set the clock source once the target is initialized. 1816 */ 1817 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1818 ar->running_fw->fw_file.fw_features)) { 1819 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1820 if (status) { 1821 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1822 status); 1823 goto err; 1824 } 1825 } 1826 1827 status = ath10k_download_fw(ar); 1828 if (status) 1829 goto err; 1830 1831 status = ath10k_init_uart(ar); 1832 if (status) 1833 goto err; 1834 1835 ar->htc.htc_ops.target_send_suspend_complete = 1836 ath10k_send_suspend_complete; 1837 1838 status = ath10k_htc_init(ar); 1839 if (status) { 1840 ath10k_err(ar, "could not init HTC (%d)\n", status); 1841 goto err; 1842 } 1843 1844 status = ath10k_bmi_done(ar); 1845 if (status) 1846 goto err; 1847 1848 status = ath10k_wmi_attach(ar); 1849 if (status) { 1850 ath10k_err(ar, "WMI attach failed: %d\n", status); 1851 goto err; 1852 } 1853 1854 status = ath10k_htt_init(ar); 1855 if (status) { 1856 ath10k_err(ar, "failed to init htt: %d\n", status); 1857 goto err_wmi_detach; 1858 } 1859 1860 status = ath10k_htt_tx_alloc(&ar->htt); 1861 if (status) { 1862 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1863 goto err_wmi_detach; 1864 } 1865 1866 status = ath10k_htt_rx_alloc(&ar->htt); 1867 if (status) { 1868 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1869 goto err_htt_tx_detach; 1870 } 1871 1872 status = ath10k_hif_start(ar); 1873 if (status) { 1874 ath10k_err(ar, "could not start HIF: %d\n", status); 1875 goto err_htt_rx_detach; 1876 } 1877 1878 status = ath10k_htc_wait_target(&ar->htc); 1879 if (status) { 1880 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1881 goto err_hif_stop; 1882 } 1883 1884 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1885 status = ath10k_htt_connect(&ar->htt); 1886 if (status) { 1887 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1888 goto err_hif_stop; 1889 } 1890 } 1891 1892 status = ath10k_wmi_connect(ar); 1893 if (status) { 1894 ath10k_err(ar, "could not connect wmi: %d\n", status); 1895 goto err_hif_stop; 1896 } 1897 1898 status = ath10k_htc_start(&ar->htc); 1899 if (status) { 1900 ath10k_err(ar, "failed to start htc: %d\n", status); 1901 goto err_hif_stop; 1902 } 1903 1904 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1905 status = ath10k_wmi_wait_for_service_ready(ar); 1906 if (status) { 1907 ath10k_warn(ar, "wmi service ready event not received"); 1908 goto err_hif_stop; 1909 } 1910 } 1911 1912 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1913 ar->hw->wiphy->fw_version); 1914 1915 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) { 1916 val = 0; 1917 if (ath10k_peer_stats_enabled(ar)) 1918 val = WMI_10_4_PEER_STATS; 1919 1920 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 1921 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 1922 1923 /* 10.4 firmware supports BT-Coex without reloading firmware 1924 * via pdev param. To support Bluetooth coexistence pdev param, 1925 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 1926 * enabled always. 1927 */ 1928 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 1929 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 1930 ar->running_fw->fw_file.fw_features)) 1931 val |= WMI_10_4_COEX_GPIO_SUPPORT; 1932 1933 status = ath10k_mac_ext_resource_config(ar, val); 1934 if (status) { 1935 ath10k_err(ar, 1936 "failed to send ext resource cfg command : %d\n", 1937 status); 1938 goto err_hif_stop; 1939 } 1940 } 1941 1942 status = ath10k_wmi_cmd_init(ar); 1943 if (status) { 1944 ath10k_err(ar, "could not send WMI init command (%d)\n", 1945 status); 1946 goto err_hif_stop; 1947 } 1948 1949 status = ath10k_wmi_wait_for_unified_ready(ar); 1950 if (status) { 1951 ath10k_err(ar, "wmi unified ready event not received\n"); 1952 goto err_hif_stop; 1953 } 1954 1955 /* Some firmware revisions do not properly set up hardware rx filter 1956 * registers. 1957 * 1958 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 1959 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 1960 * any frames that matches MAC_PCU_RX_FILTER which is also 1961 * misconfigured to accept anything. 1962 * 1963 * The ADDR1 is programmed using internal firmware structure field and 1964 * can't be (easily/sanely) reached from the driver explicitly. It is 1965 * possible to implicitly make it correct by creating a dummy vdev and 1966 * then deleting it. 1967 */ 1968 status = ath10k_core_reset_rx_filter(ar); 1969 if (status) { 1970 ath10k_err(ar, "failed to reset rx filter: %d\n", status); 1971 goto err_hif_stop; 1972 } 1973 1974 /* If firmware indicates Full Rx Reorder support it must be used in a 1975 * slightly different manner. Let HTT code know. 1976 */ 1977 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1978 ar->wmi.svc_map)); 1979 1980 status = ath10k_htt_rx_ring_refill(ar); 1981 if (status) { 1982 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1983 goto err_hif_stop; 1984 } 1985 1986 if (ar->max_num_vdevs >= 64) 1987 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 1988 else 1989 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 1990 1991 INIT_LIST_HEAD(&ar->arvifs); 1992 1993 /* we don't care about HTT in UTF mode */ 1994 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1995 status = ath10k_htt_setup(&ar->htt); 1996 if (status) { 1997 ath10k_err(ar, "failed to setup htt: %d\n", status); 1998 goto err_hif_stop; 1999 } 2000 } 2001 2002 status = ath10k_debug_start(ar); 2003 if (status) 2004 goto err_hif_stop; 2005 2006 return 0; 2007 2008 err_hif_stop: 2009 ath10k_hif_stop(ar); 2010 err_htt_rx_detach: 2011 ath10k_htt_rx_free(&ar->htt); 2012 err_htt_tx_detach: 2013 ath10k_htt_tx_free(&ar->htt); 2014 err_wmi_detach: 2015 ath10k_wmi_detach(ar); 2016 err: 2017 return status; 2018 } 2019 EXPORT_SYMBOL(ath10k_core_start); 2020 2021 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2022 { 2023 int ret; 2024 unsigned long time_left; 2025 2026 reinit_completion(&ar->target_suspend); 2027 2028 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2029 if (ret) { 2030 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2031 return ret; 2032 } 2033 2034 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2035 2036 if (!time_left) { 2037 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2038 return -ETIMEDOUT; 2039 } 2040 2041 return 0; 2042 } 2043 2044 void ath10k_core_stop(struct ath10k *ar) 2045 { 2046 lockdep_assert_held(&ar->conf_mutex); 2047 ath10k_debug_stop(ar); 2048 2049 /* try to suspend target */ 2050 if (ar->state != ATH10K_STATE_RESTARTING && 2051 ar->state != ATH10K_STATE_UTF) 2052 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2053 2054 ath10k_hif_stop(ar); 2055 ath10k_htt_tx_free(&ar->htt); 2056 ath10k_htt_rx_free(&ar->htt); 2057 ath10k_wmi_detach(ar); 2058 } 2059 EXPORT_SYMBOL(ath10k_core_stop); 2060 2061 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2062 * order to know what hw capabilities should be advertised to mac80211 it is 2063 * necessary to load the firmware (and tear it down immediately since start 2064 * hook will try to init it again) before registering */ 2065 static int ath10k_core_probe_fw(struct ath10k *ar) 2066 { 2067 struct bmi_target_info target_info; 2068 int ret = 0; 2069 2070 ret = ath10k_hif_power_up(ar); 2071 if (ret) { 2072 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 2073 return ret; 2074 } 2075 2076 memset(&target_info, 0, sizeof(target_info)); 2077 ret = ath10k_bmi_get_target_info(ar, &target_info); 2078 if (ret) { 2079 ath10k_err(ar, "could not get target info (%d)\n", ret); 2080 goto err_power_down; 2081 } 2082 2083 ar->target_version = target_info.version; 2084 ar->hw->wiphy->hw_version = target_info.version; 2085 2086 ret = ath10k_init_hw_params(ar); 2087 if (ret) { 2088 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2089 goto err_power_down; 2090 } 2091 2092 ret = ath10k_core_fetch_firmware_files(ar); 2093 if (ret) { 2094 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2095 goto err_power_down; 2096 } 2097 2098 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2099 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2100 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2101 sizeof(ar->hw->wiphy->fw_version)); 2102 2103 ath10k_debug_print_hwfw_info(ar); 2104 2105 ret = ath10k_core_pre_cal_download(ar); 2106 if (ret) { 2107 /* pre calibration data download is not necessary 2108 * for all the chipsets. Ignore failures and continue. 2109 */ 2110 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2111 "could not load pre cal data: %d\n", ret); 2112 } 2113 2114 ret = ath10k_core_get_board_id_from_otp(ar); 2115 if (ret && ret != -EOPNOTSUPP) { 2116 ath10k_err(ar, "failed to get board id from otp: %d\n", 2117 ret); 2118 goto err_free_firmware_files; 2119 } 2120 2121 ret = ath10k_core_fetch_board_file(ar); 2122 if (ret) { 2123 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2124 goto err_free_firmware_files; 2125 } 2126 2127 ath10k_debug_print_board_info(ar); 2128 2129 ret = ath10k_core_init_firmware_features(ar); 2130 if (ret) { 2131 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2132 ret); 2133 goto err_free_firmware_files; 2134 } 2135 2136 ret = ath10k_swap_code_seg_init(ar, &ar->normal_mode_fw.fw_file); 2137 if (ret) { 2138 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2139 ret); 2140 goto err_free_firmware_files; 2141 } 2142 2143 mutex_lock(&ar->conf_mutex); 2144 2145 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2146 &ar->normal_mode_fw); 2147 if (ret) { 2148 ath10k_err(ar, "could not init core (%d)\n", ret); 2149 goto err_unlock; 2150 } 2151 2152 ath10k_debug_print_boot_info(ar); 2153 ath10k_core_stop(ar); 2154 2155 mutex_unlock(&ar->conf_mutex); 2156 2157 ath10k_hif_power_down(ar); 2158 return 0; 2159 2160 err_unlock: 2161 mutex_unlock(&ar->conf_mutex); 2162 2163 err_free_firmware_files: 2164 ath10k_core_free_firmware_files(ar); 2165 2166 err_power_down: 2167 ath10k_hif_power_down(ar); 2168 2169 return ret; 2170 } 2171 2172 static void ath10k_core_register_work(struct work_struct *work) 2173 { 2174 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2175 int status; 2176 2177 /* peer stats are enabled by default */ 2178 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2179 2180 status = ath10k_core_probe_fw(ar); 2181 if (status) { 2182 ath10k_err(ar, "could not probe fw (%d)\n", status); 2183 goto err; 2184 } 2185 2186 status = ath10k_mac_register(ar); 2187 if (status) { 2188 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2189 goto err_release_fw; 2190 } 2191 2192 status = ath10k_debug_register(ar); 2193 if (status) { 2194 ath10k_err(ar, "unable to initialize debugfs\n"); 2195 goto err_unregister_mac; 2196 } 2197 2198 status = ath10k_spectral_create(ar); 2199 if (status) { 2200 ath10k_err(ar, "failed to initialize spectral\n"); 2201 goto err_debug_destroy; 2202 } 2203 2204 status = ath10k_thermal_register(ar); 2205 if (status) { 2206 ath10k_err(ar, "could not register thermal device: %d\n", 2207 status); 2208 goto err_spectral_destroy; 2209 } 2210 2211 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2212 return; 2213 2214 err_spectral_destroy: 2215 ath10k_spectral_destroy(ar); 2216 err_debug_destroy: 2217 ath10k_debug_destroy(ar); 2218 err_unregister_mac: 2219 ath10k_mac_unregister(ar); 2220 err_release_fw: 2221 ath10k_core_free_firmware_files(ar); 2222 err: 2223 /* TODO: It's probably a good idea to release device from the driver 2224 * but calling device_release_driver() here will cause a deadlock. 2225 */ 2226 return; 2227 } 2228 2229 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2230 { 2231 ar->chip_id = chip_id; 2232 queue_work(ar->workqueue, &ar->register_work); 2233 2234 return 0; 2235 } 2236 EXPORT_SYMBOL(ath10k_core_register); 2237 2238 void ath10k_core_unregister(struct ath10k *ar) 2239 { 2240 cancel_work_sync(&ar->register_work); 2241 2242 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2243 return; 2244 2245 ath10k_thermal_unregister(ar); 2246 /* Stop spectral before unregistering from mac80211 to remove the 2247 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2248 * would be already be free'd recursively, leading to a double free. 2249 */ 2250 ath10k_spectral_destroy(ar); 2251 2252 /* We must unregister from mac80211 before we stop HTC and HIF. 2253 * Otherwise we will fail to submit commands to FW and mac80211 will be 2254 * unhappy about callback failures. */ 2255 ath10k_mac_unregister(ar); 2256 2257 ath10k_testmode_destroy(ar); 2258 2259 ath10k_core_free_firmware_files(ar); 2260 ath10k_core_free_board_files(ar); 2261 2262 ath10k_debug_unregister(ar); 2263 } 2264 EXPORT_SYMBOL(ath10k_core_unregister); 2265 2266 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2267 enum ath10k_bus bus, 2268 enum ath10k_hw_rev hw_rev, 2269 const struct ath10k_hif_ops *hif_ops) 2270 { 2271 struct ath10k *ar; 2272 int ret; 2273 2274 ar = ath10k_mac_create(priv_size); 2275 if (!ar) 2276 return NULL; 2277 2278 ar->ath_common.priv = ar; 2279 ar->ath_common.hw = ar->hw; 2280 ar->dev = dev; 2281 ar->hw_rev = hw_rev; 2282 ar->hif.ops = hif_ops; 2283 ar->hif.bus = bus; 2284 2285 switch (hw_rev) { 2286 case ATH10K_HW_QCA988X: 2287 case ATH10K_HW_QCA9887: 2288 ar->regs = &qca988x_regs; 2289 ar->hw_values = &qca988x_values; 2290 break; 2291 case ATH10K_HW_QCA6174: 2292 case ATH10K_HW_QCA9377: 2293 ar->regs = &qca6174_regs; 2294 ar->hw_values = &qca6174_values; 2295 break; 2296 case ATH10K_HW_QCA99X0: 2297 case ATH10K_HW_QCA9984: 2298 ar->regs = &qca99x0_regs; 2299 ar->hw_values = &qca99x0_values; 2300 break; 2301 case ATH10K_HW_QCA9888: 2302 ar->regs = &qca99x0_regs; 2303 ar->hw_values = &qca9888_values; 2304 break; 2305 case ATH10K_HW_QCA4019: 2306 ar->regs = &qca4019_regs; 2307 ar->hw_values = &qca4019_values; 2308 break; 2309 default: 2310 ath10k_err(ar, "unsupported core hardware revision %d\n", 2311 hw_rev); 2312 ret = -ENOTSUPP; 2313 goto err_free_mac; 2314 } 2315 2316 init_completion(&ar->scan.started); 2317 init_completion(&ar->scan.completed); 2318 init_completion(&ar->scan.on_channel); 2319 init_completion(&ar->target_suspend); 2320 init_completion(&ar->wow.wakeup_completed); 2321 2322 init_completion(&ar->install_key_done); 2323 init_completion(&ar->vdev_setup_done); 2324 init_completion(&ar->thermal.wmi_sync); 2325 init_completion(&ar->bss_survey_done); 2326 2327 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2328 2329 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2330 if (!ar->workqueue) 2331 goto err_free_mac; 2332 2333 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2334 if (!ar->workqueue_aux) 2335 goto err_free_wq; 2336 2337 mutex_init(&ar->conf_mutex); 2338 spin_lock_init(&ar->data_lock); 2339 spin_lock_init(&ar->txqs_lock); 2340 2341 INIT_LIST_HEAD(&ar->txqs); 2342 INIT_LIST_HEAD(&ar->peers); 2343 init_waitqueue_head(&ar->peer_mapping_wq); 2344 init_waitqueue_head(&ar->htt.empty_tx_wq); 2345 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2346 2347 init_completion(&ar->offchan_tx_completed); 2348 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2349 skb_queue_head_init(&ar->offchan_tx_queue); 2350 2351 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2352 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2353 2354 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2355 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2356 INIT_WORK(&ar->set_coverage_class_work, 2357 ath10k_core_set_coverage_class_work); 2358 2359 init_dummy_netdev(&ar->napi_dev); 2360 2361 ret = ath10k_debug_create(ar); 2362 if (ret) 2363 goto err_free_aux_wq; 2364 2365 return ar; 2366 2367 err_free_aux_wq: 2368 destroy_workqueue(ar->workqueue_aux); 2369 err_free_wq: 2370 destroy_workqueue(ar->workqueue); 2371 2372 err_free_mac: 2373 ath10k_mac_destroy(ar); 2374 2375 return NULL; 2376 } 2377 EXPORT_SYMBOL(ath10k_core_create); 2378 2379 void ath10k_core_destroy(struct ath10k *ar) 2380 { 2381 flush_workqueue(ar->workqueue); 2382 destroy_workqueue(ar->workqueue); 2383 2384 flush_workqueue(ar->workqueue_aux); 2385 destroy_workqueue(ar->workqueue_aux); 2386 2387 ath10k_debug_destroy(ar); 2388 ath10k_wmi_free_host_mem(ar); 2389 ath10k_mac_destroy(ar); 2390 } 2391 EXPORT_SYMBOL(ath10k_core_destroy); 2392 2393 MODULE_AUTHOR("Qualcomm Atheros"); 2394 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2395 MODULE_LICENSE("Dual BSD/GPL"); 2396