1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2013 Qualcomm Atheros, Inc. 4 * 5 * Permission to use, copy, modify, and/or distribute this software for any 6 * purpose with or without fee is hereby granted, provided that the above 7 * copyright notice and this permission notice appear in all copies. 8 * 9 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 */ 17 18 #include <linux/module.h> 19 #include <linux/firmware.h> 20 #include <linux/of.h> 21 #include <asm/byteorder.h> 22 23 #include "core.h" 24 #include "mac.h" 25 #include "htc.h" 26 #include "hif.h" 27 #include "wmi.h" 28 #include "bmi.h" 29 #include "debug.h" 30 #include "htt.h" 31 #include "testmode.h" 32 #include "wmi-ops.h" 33 34 unsigned int ath10k_debug_mask; 35 static unsigned int ath10k_cryptmode_param; 36 static bool uart_print; 37 static bool skip_otp; 38 static bool rawmode; 39 40 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 41 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 42 module_param(uart_print, bool, 0644); 43 module_param(skip_otp, bool, 0644); 44 module_param(rawmode, bool, 0644); 45 46 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 47 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 48 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 49 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 50 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 51 52 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 53 { 54 .id = QCA988X_HW_2_0_VERSION, 55 .dev_id = QCA988X_2_0_DEVICE_ID, 56 .name = "qca988x hw2.0", 57 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 58 .uart_pin = 7, 59 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 60 .otp_exe_param = 0, 61 .channel_counters_freq_hz = 88000, 62 .max_probe_resp_desc_thres = 0, 63 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 64 .cal_data_len = 2116, 65 .fw = { 66 .dir = QCA988X_HW_2_0_FW_DIR, 67 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 68 .board_size = QCA988X_BOARD_DATA_SZ, 69 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 70 }, 71 }, 72 { 73 .id = QCA9887_HW_1_0_VERSION, 74 .dev_id = QCA9887_1_0_DEVICE_ID, 75 .name = "qca9887 hw1.0", 76 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 77 .uart_pin = 7, 78 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 79 .otp_exe_param = 0, 80 .channel_counters_freq_hz = 88000, 81 .max_probe_resp_desc_thres = 0, 82 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 83 .cal_data_len = 2116, 84 .fw = { 85 .dir = QCA9887_HW_1_0_FW_DIR, 86 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 87 .board_size = QCA9887_BOARD_DATA_SZ, 88 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 89 }, 90 }, 91 { 92 .id = QCA6174_HW_2_1_VERSION, 93 .dev_id = QCA6164_2_1_DEVICE_ID, 94 .name = "qca6164 hw2.1", 95 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 96 .uart_pin = 6, 97 .otp_exe_param = 0, 98 .channel_counters_freq_hz = 88000, 99 .max_probe_resp_desc_thres = 0, 100 .cal_data_len = 8124, 101 .fw = { 102 .dir = QCA6174_HW_2_1_FW_DIR, 103 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 104 .board_size = QCA6174_BOARD_DATA_SZ, 105 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 106 }, 107 }, 108 { 109 .id = QCA6174_HW_2_1_VERSION, 110 .dev_id = QCA6174_2_1_DEVICE_ID, 111 .name = "qca6174 hw2.1", 112 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 113 .uart_pin = 6, 114 .otp_exe_param = 0, 115 .channel_counters_freq_hz = 88000, 116 .max_probe_resp_desc_thres = 0, 117 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 118 .cal_data_len = 8124, 119 .fw = { 120 .dir = QCA6174_HW_2_1_FW_DIR, 121 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 122 .board_size = QCA6174_BOARD_DATA_SZ, 123 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 124 }, 125 }, 126 { 127 .id = QCA6174_HW_3_0_VERSION, 128 .dev_id = QCA6174_2_1_DEVICE_ID, 129 .name = "qca6174 hw3.0", 130 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 131 .uart_pin = 6, 132 .otp_exe_param = 0, 133 .channel_counters_freq_hz = 88000, 134 .max_probe_resp_desc_thres = 0, 135 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 136 .cal_data_len = 8124, 137 .fw = { 138 .dir = QCA6174_HW_3_0_FW_DIR, 139 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 140 .board_size = QCA6174_BOARD_DATA_SZ, 141 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 142 }, 143 }, 144 { 145 .id = QCA6174_HW_3_2_VERSION, 146 .dev_id = QCA6174_2_1_DEVICE_ID, 147 .name = "qca6174 hw3.2", 148 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 149 .uart_pin = 6, 150 .otp_exe_param = 0, 151 .channel_counters_freq_hz = 88000, 152 .max_probe_resp_desc_thres = 0, 153 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_AFTER, 154 .cal_data_len = 8124, 155 .fw = { 156 /* uses same binaries as hw3.0 */ 157 .dir = QCA6174_HW_3_0_FW_DIR, 158 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 159 .board_size = QCA6174_BOARD_DATA_SZ, 160 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 161 }, 162 }, 163 { 164 .id = QCA99X0_HW_2_0_DEV_VERSION, 165 .dev_id = QCA99X0_2_0_DEVICE_ID, 166 .name = "qca99x0 hw2.0", 167 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 168 .uart_pin = 7, 169 .otp_exe_param = 0x00000700, 170 .continuous_frag_desc = true, 171 .cck_rate_map_rev2 = true, 172 .channel_counters_freq_hz = 150000, 173 .max_probe_resp_desc_thres = 24, 174 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, 175 .tx_chain_mask = 0xf, 176 .rx_chain_mask = 0xf, 177 .max_spatial_stream = 4, 178 .cal_data_len = 12064, 179 .fw = { 180 .dir = QCA99X0_HW_2_0_FW_DIR, 181 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 182 .board_size = QCA99X0_BOARD_DATA_SZ, 183 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 184 }, 185 }, 186 { 187 .id = QCA9984_HW_1_0_DEV_VERSION, 188 .dev_id = QCA9984_1_0_DEVICE_ID, 189 .name = "qca9984/qca9994 hw1.0", 190 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 191 .uart_pin = 7, 192 .otp_exe_param = 0x00000700, 193 .continuous_frag_desc = true, 194 .cck_rate_map_rev2 = true, 195 .channel_counters_freq_hz = 150000, 196 .max_probe_resp_desc_thres = 24, 197 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, 198 .tx_chain_mask = 0xf, 199 .rx_chain_mask = 0xf, 200 .max_spatial_stream = 4, 201 .cal_data_len = 12064, 202 .fw = { 203 .dir = QCA9984_HW_1_0_FW_DIR, 204 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 205 .board_size = QCA99X0_BOARD_DATA_SZ, 206 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 207 }, 208 }, 209 { 210 .id = QCA9888_HW_2_0_DEV_VERSION, 211 .dev_id = QCA9888_2_0_DEVICE_ID, 212 .name = "qca9888 hw2.0", 213 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 214 .uart_pin = 7, 215 .otp_exe_param = 0x00000700, 216 .continuous_frag_desc = true, 217 .channel_counters_freq_hz = 150000, 218 .max_probe_resp_desc_thres = 24, 219 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, 220 .tx_chain_mask = 3, 221 .rx_chain_mask = 3, 222 .max_spatial_stream = 2, 223 .cal_data_len = 12064, 224 .fw = { 225 .dir = QCA9888_HW_2_0_FW_DIR, 226 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 227 .board_size = QCA99X0_BOARD_DATA_SZ, 228 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 229 }, 230 }, 231 { 232 .id = QCA9377_HW_1_0_DEV_VERSION, 233 .dev_id = QCA9377_1_0_DEVICE_ID, 234 .name = "qca9377 hw1.0", 235 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 236 .uart_pin = 6, 237 .otp_exe_param = 0, 238 .channel_counters_freq_hz = 88000, 239 .max_probe_resp_desc_thres = 0, 240 .cal_data_len = 8124, 241 .fw = { 242 .dir = QCA9377_HW_1_0_FW_DIR, 243 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 244 .board_size = QCA9377_BOARD_DATA_SZ, 245 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 246 }, 247 }, 248 { 249 .id = QCA9377_HW_1_1_DEV_VERSION, 250 .dev_id = QCA9377_1_0_DEVICE_ID, 251 .name = "qca9377 hw1.1", 252 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 253 .uart_pin = 6, 254 .otp_exe_param = 0, 255 .channel_counters_freq_hz = 88000, 256 .max_probe_resp_desc_thres = 0, 257 .cal_data_len = 8124, 258 .fw = { 259 .dir = QCA9377_HW_1_0_FW_DIR, 260 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 261 .board_size = QCA9377_BOARD_DATA_SZ, 262 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 263 }, 264 }, 265 { 266 .id = QCA4019_HW_1_0_DEV_VERSION, 267 .dev_id = 0, 268 .name = "qca4019 hw1.0", 269 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 270 .uart_pin = 7, 271 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 272 .otp_exe_param = 0x0010000, 273 .continuous_frag_desc = true, 274 .cck_rate_map_rev2 = true, 275 .channel_counters_freq_hz = 125000, 276 .max_probe_resp_desc_thres = 24, 277 .hw_4addr_pad = ATH10K_HW_4ADDR_PAD_BEFORE, 278 .tx_chain_mask = 0x3, 279 .rx_chain_mask = 0x3, 280 .max_spatial_stream = 2, 281 .cal_data_len = 12064, 282 .fw = { 283 .dir = QCA4019_HW_1_0_FW_DIR, 284 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 285 .board_size = QCA4019_BOARD_DATA_SZ, 286 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 287 }, 288 }, 289 }; 290 291 static const char *const ath10k_core_fw_feature_str[] = { 292 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 293 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 294 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 295 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 296 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 297 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 298 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 299 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 300 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 301 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 302 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 303 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 304 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 305 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 306 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 307 }; 308 309 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 310 size_t buf_len, 311 enum ath10k_fw_features feat) 312 { 313 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 314 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 315 ATH10K_FW_FEATURE_COUNT); 316 317 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 318 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 319 return scnprintf(buf, buf_len, "bit%d", feat); 320 } 321 322 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 323 } 324 325 void ath10k_core_get_fw_features_str(struct ath10k *ar, 326 char *buf, 327 size_t buf_len) 328 { 329 unsigned int len = 0; 330 int i; 331 332 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 333 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 334 if (len > 0) 335 len += scnprintf(buf + len, buf_len - len, ","); 336 337 len += ath10k_core_get_fw_feature_str(buf + len, 338 buf_len - len, 339 i); 340 } 341 } 342 } 343 344 static void ath10k_send_suspend_complete(struct ath10k *ar) 345 { 346 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 347 348 complete(&ar->target_suspend); 349 } 350 351 static int ath10k_init_configure_target(struct ath10k *ar) 352 { 353 u32 param_host; 354 int ret; 355 356 /* tell target which HTC version it is used*/ 357 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 358 HTC_PROTOCOL_VERSION); 359 if (ret) { 360 ath10k_err(ar, "settings HTC version failed\n"); 361 return ret; 362 } 363 364 /* set the firmware mode to STA/IBSS/AP */ 365 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 366 if (ret) { 367 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 368 return ret; 369 } 370 371 /* TODO following parameters need to be re-visited. */ 372 /* num_device */ 373 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 374 /* Firmware mode */ 375 /* FIXME: Why FW_MODE_AP ??.*/ 376 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 377 /* mac_addr_method */ 378 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 379 /* firmware_bridge */ 380 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 381 /* fwsubmode */ 382 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 383 384 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 385 if (ret) { 386 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 387 return ret; 388 } 389 390 /* We do all byte-swapping on the host */ 391 ret = ath10k_bmi_write32(ar, hi_be, 0); 392 if (ret) { 393 ath10k_err(ar, "setting host CPU BE mode failed\n"); 394 return ret; 395 } 396 397 /* FW descriptor/Data swap flags */ 398 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 399 400 if (ret) { 401 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 402 return ret; 403 } 404 405 /* Some devices have a special sanity check that verifies the PCI 406 * Device ID is written to this host interest var. It is known to be 407 * required to boot QCA6164. 408 */ 409 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 410 ar->dev_id); 411 if (ret) { 412 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 413 return ret; 414 } 415 416 return 0; 417 } 418 419 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 420 const char *dir, 421 const char *file) 422 { 423 char filename[100]; 424 const struct firmware *fw; 425 int ret; 426 427 if (file == NULL) 428 return ERR_PTR(-ENOENT); 429 430 if (dir == NULL) 431 dir = "."; 432 433 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 434 ret = request_firmware(&fw, filename, ar->dev); 435 if (ret) 436 return ERR_PTR(ret); 437 438 return fw; 439 } 440 441 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 442 size_t data_len) 443 { 444 u32 board_data_size = ar->hw_params.fw.board_size; 445 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 446 u32 board_ext_data_addr; 447 int ret; 448 449 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 450 if (ret) { 451 ath10k_err(ar, "could not read board ext data addr (%d)\n", 452 ret); 453 return ret; 454 } 455 456 ath10k_dbg(ar, ATH10K_DBG_BOOT, 457 "boot push board extended data addr 0x%x\n", 458 board_ext_data_addr); 459 460 if (board_ext_data_addr == 0) 461 return 0; 462 463 if (data_len != (board_data_size + board_ext_data_size)) { 464 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 465 data_len, board_data_size, board_ext_data_size); 466 return -EINVAL; 467 } 468 469 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 470 data + board_data_size, 471 board_ext_data_size); 472 if (ret) { 473 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 474 return ret; 475 } 476 477 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 478 (board_ext_data_size << 16) | 1); 479 if (ret) { 480 ath10k_err(ar, "could not write board ext data bit (%d)\n", 481 ret); 482 return ret; 483 } 484 485 return 0; 486 } 487 488 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 489 size_t data_len) 490 { 491 u32 board_data_size = ar->hw_params.fw.board_size; 492 u32 address; 493 int ret; 494 495 ret = ath10k_push_board_ext_data(ar, data, data_len); 496 if (ret) { 497 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 498 goto exit; 499 } 500 501 ret = ath10k_bmi_read32(ar, hi_board_data, &address); 502 if (ret) { 503 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 504 goto exit; 505 } 506 507 ret = ath10k_bmi_write_memory(ar, address, data, 508 min_t(u32, board_data_size, 509 data_len)); 510 if (ret) { 511 ath10k_err(ar, "could not write board data (%d)\n", ret); 512 goto exit; 513 } 514 515 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 516 if (ret) { 517 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 518 goto exit; 519 } 520 521 exit: 522 return ret; 523 } 524 525 static int ath10k_download_cal_file(struct ath10k *ar, 526 const struct firmware *file) 527 { 528 int ret; 529 530 if (!file) 531 return -ENOENT; 532 533 if (IS_ERR(file)) 534 return PTR_ERR(file); 535 536 ret = ath10k_download_board_data(ar, file->data, file->size); 537 if (ret) { 538 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 539 return ret; 540 } 541 542 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 543 544 return 0; 545 } 546 547 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 548 { 549 struct device_node *node; 550 int data_len; 551 void *data; 552 int ret; 553 554 node = ar->dev->of_node; 555 if (!node) 556 /* Device Tree is optional, don't print any warnings if 557 * there's no node for ath10k. 558 */ 559 return -ENOENT; 560 561 if (!of_get_property(node, dt_name, &data_len)) { 562 /* The calibration data node is optional */ 563 return -ENOENT; 564 } 565 566 if (data_len != ar->hw_params.cal_data_len) { 567 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 568 data_len); 569 ret = -EMSGSIZE; 570 goto out; 571 } 572 573 data = kmalloc(data_len, GFP_KERNEL); 574 if (!data) { 575 ret = -ENOMEM; 576 goto out; 577 } 578 579 ret = of_property_read_u8_array(node, dt_name, data, data_len); 580 if (ret) { 581 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 582 ret); 583 goto out_free; 584 } 585 586 ret = ath10k_download_board_data(ar, data, data_len); 587 if (ret) { 588 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 589 ret); 590 goto out_free; 591 } 592 593 ret = 0; 594 595 out_free: 596 kfree(data); 597 598 out: 599 return ret; 600 } 601 602 static int ath10k_download_cal_eeprom(struct ath10k *ar) 603 { 604 size_t data_len; 605 void *data = NULL; 606 int ret; 607 608 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 609 if (ret) { 610 if (ret != -EOPNOTSUPP) 611 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 612 ret); 613 goto out_free; 614 } 615 616 ret = ath10k_download_board_data(ar, data, data_len); 617 if (ret) { 618 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 619 ret); 620 goto out_free; 621 } 622 623 ret = 0; 624 625 out_free: 626 kfree(data); 627 628 return ret; 629 } 630 631 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 632 { 633 u32 result, address; 634 u8 board_id, chip_id; 635 int ret; 636 637 address = ar->hw_params.patch_load_addr; 638 639 if (!ar->normal_mode_fw.fw_file.otp_data || 640 !ar->normal_mode_fw.fw_file.otp_len) { 641 ath10k_warn(ar, 642 "failed to retrieve board id because of invalid otp\n"); 643 return -ENODATA; 644 } 645 646 ath10k_dbg(ar, ATH10K_DBG_BOOT, 647 "boot upload otp to 0x%x len %zd for board id\n", 648 address, ar->normal_mode_fw.fw_file.otp_len); 649 650 ret = ath10k_bmi_fast_download(ar, address, 651 ar->normal_mode_fw.fw_file.otp_data, 652 ar->normal_mode_fw.fw_file.otp_len); 653 if (ret) { 654 ath10k_err(ar, "could not write otp for board id check: %d\n", 655 ret); 656 return ret; 657 } 658 659 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EEPROM_BOARD_ID, 660 &result); 661 if (ret) { 662 ath10k_err(ar, "could not execute otp for board id check: %d\n", 663 ret); 664 return ret; 665 } 666 667 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 668 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 669 670 ath10k_dbg(ar, ATH10K_DBG_BOOT, 671 "boot get otp board id result 0x%08x board_id %d chip_id %d\n", 672 result, board_id, chip_id); 673 674 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0) 675 return -EOPNOTSUPP; 676 677 ar->id.bmi_ids_valid = true; 678 ar->id.bmi_board_id = board_id; 679 ar->id.bmi_chip_id = chip_id; 680 681 return 0; 682 } 683 684 static int ath10k_download_and_run_otp(struct ath10k *ar) 685 { 686 u32 result, address = ar->hw_params.patch_load_addr; 687 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 688 int ret; 689 690 ret = ath10k_download_board_data(ar, 691 ar->running_fw->board_data, 692 ar->running_fw->board_len); 693 if (ret) { 694 ath10k_err(ar, "failed to download board data: %d\n", ret); 695 return ret; 696 } 697 698 /* OTP is optional */ 699 700 if (!ar->running_fw->fw_file.otp_data || 701 !ar->running_fw->fw_file.otp_len) { 702 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n", 703 ar->running_fw->fw_file.otp_data, 704 ar->running_fw->fw_file.otp_len); 705 return 0; 706 } 707 708 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 709 address, ar->running_fw->fw_file.otp_len); 710 711 ret = ath10k_bmi_fast_download(ar, address, 712 ar->running_fw->fw_file.otp_data, 713 ar->running_fw->fw_file.otp_len); 714 if (ret) { 715 ath10k_err(ar, "could not write otp (%d)\n", ret); 716 return ret; 717 } 718 719 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 720 if (ret) { 721 ath10k_err(ar, "could not execute otp (%d)\n", ret); 722 return ret; 723 } 724 725 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 726 727 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 728 ar->running_fw->fw_file.fw_features)) && 729 result != 0) { 730 ath10k_err(ar, "otp calibration failed: %d", result); 731 return -EINVAL; 732 } 733 734 return 0; 735 } 736 737 static int ath10k_download_fw(struct ath10k *ar) 738 { 739 u32 address, data_len; 740 const void *data; 741 int ret; 742 743 address = ar->hw_params.patch_load_addr; 744 745 data = ar->running_fw->fw_file.firmware_data; 746 data_len = ar->running_fw->fw_file.firmware_len; 747 748 ret = ath10k_swap_code_seg_configure(ar); 749 if (ret) { 750 ath10k_err(ar, "failed to configure fw code swap: %d\n", 751 ret); 752 return ret; 753 } 754 755 ath10k_dbg(ar, ATH10K_DBG_BOOT, 756 "boot uploading firmware image %p len %d\n", 757 data, data_len); 758 759 ret = ath10k_bmi_fast_download(ar, address, data, data_len); 760 if (ret) { 761 ath10k_err(ar, "failed to download firmware: %d\n", 762 ret); 763 return ret; 764 } 765 766 return ret; 767 } 768 769 static void ath10k_core_free_board_files(struct ath10k *ar) 770 { 771 if (!IS_ERR(ar->normal_mode_fw.board)) 772 release_firmware(ar->normal_mode_fw.board); 773 774 ar->normal_mode_fw.board = NULL; 775 ar->normal_mode_fw.board_data = NULL; 776 ar->normal_mode_fw.board_len = 0; 777 } 778 779 static void ath10k_core_free_firmware_files(struct ath10k *ar) 780 { 781 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 782 release_firmware(ar->normal_mode_fw.fw_file.firmware); 783 784 if (!IS_ERR(ar->cal_file)) 785 release_firmware(ar->cal_file); 786 787 if (!IS_ERR(ar->pre_cal_file)) 788 release_firmware(ar->pre_cal_file); 789 790 ath10k_swap_code_seg_release(ar); 791 792 ar->normal_mode_fw.fw_file.otp_data = NULL; 793 ar->normal_mode_fw.fw_file.otp_len = 0; 794 795 ar->normal_mode_fw.fw_file.firmware = NULL; 796 ar->normal_mode_fw.fw_file.firmware_data = NULL; 797 ar->normal_mode_fw.fw_file.firmware_len = 0; 798 799 ar->cal_file = NULL; 800 ar->pre_cal_file = NULL; 801 } 802 803 static int ath10k_fetch_cal_file(struct ath10k *ar) 804 { 805 char filename[100]; 806 807 /* pre-cal-<bus>-<id>.bin */ 808 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 809 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 810 811 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 812 if (!IS_ERR(ar->pre_cal_file)) 813 goto success; 814 815 /* cal-<bus>-<id>.bin */ 816 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 817 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 818 819 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 820 if (IS_ERR(ar->cal_file)) 821 /* calibration file is optional, don't print any warnings */ 822 return PTR_ERR(ar->cal_file); 823 success: 824 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 825 ATH10K_FW_DIR, filename); 826 827 return 0; 828 } 829 830 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar) 831 { 832 if (!ar->hw_params.fw.board) { 833 ath10k_err(ar, "failed to find board file fw entry\n"); 834 return -EINVAL; 835 } 836 837 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 838 ar->hw_params.fw.dir, 839 ar->hw_params.fw.board); 840 if (IS_ERR(ar->normal_mode_fw.board)) 841 return PTR_ERR(ar->normal_mode_fw.board); 842 843 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 844 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 845 846 return 0; 847 } 848 849 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 850 const void *buf, size_t buf_len, 851 const char *boardname) 852 { 853 const struct ath10k_fw_ie *hdr; 854 bool name_match_found; 855 int ret, board_ie_id; 856 size_t board_ie_len; 857 const void *board_ie_data; 858 859 name_match_found = false; 860 861 /* go through ATH10K_BD_IE_BOARD_ elements */ 862 while (buf_len > sizeof(struct ath10k_fw_ie)) { 863 hdr = buf; 864 board_ie_id = le32_to_cpu(hdr->id); 865 board_ie_len = le32_to_cpu(hdr->len); 866 board_ie_data = hdr->data; 867 868 buf_len -= sizeof(*hdr); 869 buf += sizeof(*hdr); 870 871 if (buf_len < ALIGN(board_ie_len, 4)) { 872 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 873 buf_len, ALIGN(board_ie_len, 4)); 874 ret = -EINVAL; 875 goto out; 876 } 877 878 switch (board_ie_id) { 879 case ATH10K_BD_IE_BOARD_NAME: 880 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 881 board_ie_data, board_ie_len); 882 883 if (board_ie_len != strlen(boardname)) 884 break; 885 886 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 887 if (ret) 888 break; 889 890 name_match_found = true; 891 ath10k_dbg(ar, ATH10K_DBG_BOOT, 892 "boot found match for name '%s'", 893 boardname); 894 break; 895 case ATH10K_BD_IE_BOARD_DATA: 896 if (!name_match_found) 897 /* no match found */ 898 break; 899 900 ath10k_dbg(ar, ATH10K_DBG_BOOT, 901 "boot found board data for '%s'", 902 boardname); 903 904 ar->normal_mode_fw.board_data = board_ie_data; 905 ar->normal_mode_fw.board_len = board_ie_len; 906 907 ret = 0; 908 goto out; 909 default: 910 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 911 board_ie_id); 912 break; 913 } 914 915 /* jump over the padding */ 916 board_ie_len = ALIGN(board_ie_len, 4); 917 918 buf_len -= board_ie_len; 919 buf += board_ie_len; 920 } 921 922 /* no match found */ 923 ret = -ENOENT; 924 925 out: 926 return ret; 927 } 928 929 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 930 const char *boardname, 931 const char *filename) 932 { 933 size_t len, magic_len, ie_len; 934 struct ath10k_fw_ie *hdr; 935 const u8 *data; 936 int ret, ie_id; 937 938 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 939 ar->hw_params.fw.dir, 940 filename); 941 if (IS_ERR(ar->normal_mode_fw.board)) 942 return PTR_ERR(ar->normal_mode_fw.board); 943 944 data = ar->normal_mode_fw.board->data; 945 len = ar->normal_mode_fw.board->size; 946 947 /* magic has extra null byte padded */ 948 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 949 if (len < magic_len) { 950 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 951 ar->hw_params.fw.dir, filename, len); 952 ret = -EINVAL; 953 goto err; 954 } 955 956 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 957 ath10k_err(ar, "found invalid board magic\n"); 958 ret = -EINVAL; 959 goto err; 960 } 961 962 /* magic is padded to 4 bytes */ 963 magic_len = ALIGN(magic_len, 4); 964 if (len < magic_len) { 965 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 966 ar->hw_params.fw.dir, filename, len); 967 ret = -EINVAL; 968 goto err; 969 } 970 971 data += magic_len; 972 len -= magic_len; 973 974 while (len > sizeof(struct ath10k_fw_ie)) { 975 hdr = (struct ath10k_fw_ie *)data; 976 ie_id = le32_to_cpu(hdr->id); 977 ie_len = le32_to_cpu(hdr->len); 978 979 len -= sizeof(*hdr); 980 data = hdr->data; 981 982 if (len < ALIGN(ie_len, 4)) { 983 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 984 ie_id, ie_len, len); 985 ret = -EINVAL; 986 goto err; 987 } 988 989 switch (ie_id) { 990 case ATH10K_BD_IE_BOARD: 991 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 992 boardname); 993 if (ret == -ENOENT) 994 /* no match found, continue */ 995 break; 996 else if (ret) 997 /* there was an error, bail out */ 998 goto err; 999 1000 /* board data found */ 1001 goto out; 1002 } 1003 1004 /* jump over the padding */ 1005 ie_len = ALIGN(ie_len, 4); 1006 1007 len -= ie_len; 1008 data += ie_len; 1009 } 1010 1011 out: 1012 if (!ar->normal_mode_fw.board_data || !ar->normal_mode_fw.board_len) { 1013 ath10k_err(ar, 1014 "failed to fetch board data for %s from %s/%s\n", 1015 boardname, ar->hw_params.fw.dir, filename); 1016 ret = -ENODATA; 1017 goto err; 1018 } 1019 1020 return 0; 1021 1022 err: 1023 ath10k_core_free_board_files(ar); 1024 return ret; 1025 } 1026 1027 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1028 size_t name_len) 1029 { 1030 if (ar->id.bmi_ids_valid) { 1031 scnprintf(name, name_len, 1032 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d", 1033 ath10k_bus_str(ar->hif.bus), 1034 ar->id.bmi_chip_id, 1035 ar->id.bmi_board_id); 1036 goto out; 1037 } 1038 1039 scnprintf(name, name_len, 1040 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x", 1041 ath10k_bus_str(ar->hif.bus), 1042 ar->id.vendor, ar->id.device, 1043 ar->id.subsystem_vendor, ar->id.subsystem_device); 1044 1045 out: 1046 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1047 1048 return 0; 1049 } 1050 1051 static int ath10k_core_fetch_board_file(struct ath10k *ar) 1052 { 1053 char boardname[100]; 1054 int ret; 1055 1056 ret = ath10k_core_create_board_name(ar, boardname, sizeof(boardname)); 1057 if (ret) { 1058 ath10k_err(ar, "failed to create board name: %d", ret); 1059 return ret; 1060 } 1061 1062 ar->bd_api = 2; 1063 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1064 ATH10K_BOARD_API2_FILE); 1065 if (!ret) 1066 goto success; 1067 1068 ar->bd_api = 1; 1069 ret = ath10k_core_fetch_board_data_api_1(ar); 1070 if (ret) { 1071 ath10k_err(ar, "failed to fetch board data\n"); 1072 return ret; 1073 } 1074 1075 success: 1076 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1077 return 0; 1078 } 1079 1080 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1081 struct ath10k_fw_file *fw_file) 1082 { 1083 size_t magic_len, len, ie_len; 1084 int ie_id, i, index, bit, ret; 1085 struct ath10k_fw_ie *hdr; 1086 const u8 *data; 1087 __le32 *timestamp, *version; 1088 1089 /* first fetch the firmware file (firmware-*.bin) */ 1090 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1091 name); 1092 if (IS_ERR(fw_file->firmware)) { 1093 ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n", 1094 ar->hw_params.fw.dir, name, 1095 PTR_ERR(fw_file->firmware)); 1096 return PTR_ERR(fw_file->firmware); 1097 } 1098 1099 data = fw_file->firmware->data; 1100 len = fw_file->firmware->size; 1101 1102 /* magic also includes the null byte, check that as well */ 1103 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1104 1105 if (len < magic_len) { 1106 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1107 ar->hw_params.fw.dir, name, len); 1108 ret = -EINVAL; 1109 goto err; 1110 } 1111 1112 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1113 ath10k_err(ar, "invalid firmware magic\n"); 1114 ret = -EINVAL; 1115 goto err; 1116 } 1117 1118 /* jump over the padding */ 1119 magic_len = ALIGN(magic_len, 4); 1120 1121 len -= magic_len; 1122 data += magic_len; 1123 1124 /* loop elements */ 1125 while (len > sizeof(struct ath10k_fw_ie)) { 1126 hdr = (struct ath10k_fw_ie *)data; 1127 1128 ie_id = le32_to_cpu(hdr->id); 1129 ie_len = le32_to_cpu(hdr->len); 1130 1131 len -= sizeof(*hdr); 1132 data += sizeof(*hdr); 1133 1134 if (len < ie_len) { 1135 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1136 ie_id, len, ie_len); 1137 ret = -EINVAL; 1138 goto err; 1139 } 1140 1141 switch (ie_id) { 1142 case ATH10K_FW_IE_FW_VERSION: 1143 if (ie_len > sizeof(fw_file->fw_version) - 1) 1144 break; 1145 1146 memcpy(fw_file->fw_version, data, ie_len); 1147 fw_file->fw_version[ie_len] = '\0'; 1148 1149 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1150 "found fw version %s\n", 1151 fw_file->fw_version); 1152 break; 1153 case ATH10K_FW_IE_TIMESTAMP: 1154 if (ie_len != sizeof(u32)) 1155 break; 1156 1157 timestamp = (__le32 *)data; 1158 1159 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1160 le32_to_cpup(timestamp)); 1161 break; 1162 case ATH10K_FW_IE_FEATURES: 1163 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1164 "found firmware features ie (%zd B)\n", 1165 ie_len); 1166 1167 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1168 index = i / 8; 1169 bit = i % 8; 1170 1171 if (index == ie_len) 1172 break; 1173 1174 if (data[index] & (1 << bit)) { 1175 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1176 "Enabling feature bit: %i\n", 1177 i); 1178 __set_bit(i, fw_file->fw_features); 1179 } 1180 } 1181 1182 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1183 fw_file->fw_features, 1184 sizeof(fw_file->fw_features)); 1185 break; 1186 case ATH10K_FW_IE_FW_IMAGE: 1187 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1188 "found fw image ie (%zd B)\n", 1189 ie_len); 1190 1191 fw_file->firmware_data = data; 1192 fw_file->firmware_len = ie_len; 1193 1194 break; 1195 case ATH10K_FW_IE_OTP_IMAGE: 1196 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1197 "found otp image ie (%zd B)\n", 1198 ie_len); 1199 1200 fw_file->otp_data = data; 1201 fw_file->otp_len = ie_len; 1202 1203 break; 1204 case ATH10K_FW_IE_WMI_OP_VERSION: 1205 if (ie_len != sizeof(u32)) 1206 break; 1207 1208 version = (__le32 *)data; 1209 1210 fw_file->wmi_op_version = le32_to_cpup(version); 1211 1212 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1213 fw_file->wmi_op_version); 1214 break; 1215 case ATH10K_FW_IE_HTT_OP_VERSION: 1216 if (ie_len != sizeof(u32)) 1217 break; 1218 1219 version = (__le32 *)data; 1220 1221 fw_file->htt_op_version = le32_to_cpup(version); 1222 1223 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1224 fw_file->htt_op_version); 1225 break; 1226 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1227 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1228 "found fw code swap image ie (%zd B)\n", 1229 ie_len); 1230 fw_file->codeswap_data = data; 1231 fw_file->codeswap_len = ie_len; 1232 break; 1233 default: 1234 ath10k_warn(ar, "Unknown FW IE: %u\n", 1235 le32_to_cpu(hdr->id)); 1236 break; 1237 } 1238 1239 /* jump over the padding */ 1240 ie_len = ALIGN(ie_len, 4); 1241 1242 len -= ie_len; 1243 data += ie_len; 1244 } 1245 1246 if (!fw_file->firmware_data || 1247 !fw_file->firmware_len) { 1248 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1249 ar->hw_params.fw.dir, name); 1250 ret = -ENOMEDIUM; 1251 goto err; 1252 } 1253 1254 return 0; 1255 1256 err: 1257 ath10k_core_free_firmware_files(ar); 1258 return ret; 1259 } 1260 1261 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1262 { 1263 int ret; 1264 1265 /* calibration file is optional, don't check for any errors */ 1266 ath10k_fetch_cal_file(ar); 1267 1268 ar->fw_api = 5; 1269 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1270 1271 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API5_FILE, 1272 &ar->normal_mode_fw.fw_file); 1273 if (ret == 0) 1274 goto success; 1275 1276 ar->fw_api = 4; 1277 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1278 1279 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API4_FILE, 1280 &ar->normal_mode_fw.fw_file); 1281 if (ret == 0) 1282 goto success; 1283 1284 ar->fw_api = 3; 1285 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1286 1287 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE, 1288 &ar->normal_mode_fw.fw_file); 1289 if (ret == 0) 1290 goto success; 1291 1292 ar->fw_api = 2; 1293 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api); 1294 1295 ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE, 1296 &ar->normal_mode_fw.fw_file); 1297 if (ret) 1298 return ret; 1299 1300 success: 1301 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1302 1303 return 0; 1304 } 1305 1306 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1307 { 1308 int ret; 1309 1310 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1311 if (ret == 0) { 1312 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1313 goto success; 1314 } 1315 1316 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1317 "boot did not find a pre calibration file, try DT next: %d\n", 1318 ret); 1319 1320 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1321 if (ret) { 1322 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1323 "unable to load pre cal data from DT: %d\n", ret); 1324 return ret; 1325 } 1326 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1327 1328 success: 1329 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1330 ath10k_cal_mode_str(ar->cal_mode)); 1331 1332 return 0; 1333 } 1334 1335 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1336 { 1337 int ret; 1338 1339 ret = ath10k_core_pre_cal_download(ar); 1340 if (ret) { 1341 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1342 "failed to load pre cal data: %d\n", ret); 1343 return ret; 1344 } 1345 1346 ret = ath10k_core_get_board_id_from_otp(ar); 1347 if (ret) { 1348 ath10k_err(ar, "failed to get board id: %d\n", ret); 1349 return ret; 1350 } 1351 1352 ret = ath10k_download_and_run_otp(ar); 1353 if (ret) { 1354 ath10k_err(ar, "failed to run otp: %d\n", ret); 1355 return ret; 1356 } 1357 1358 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1359 "pre cal configuration done successfully\n"); 1360 1361 return 0; 1362 } 1363 1364 static int ath10k_download_cal_data(struct ath10k *ar) 1365 { 1366 int ret; 1367 1368 ret = ath10k_core_pre_cal_config(ar); 1369 if (ret == 0) 1370 return 0; 1371 1372 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1373 "pre cal download procedure failed, try cal file: %d\n", 1374 ret); 1375 1376 ret = ath10k_download_cal_file(ar, ar->cal_file); 1377 if (ret == 0) { 1378 ar->cal_mode = ATH10K_CAL_MODE_FILE; 1379 goto done; 1380 } 1381 1382 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1383 "boot did not find a calibration file, try DT next: %d\n", 1384 ret); 1385 1386 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 1387 if (ret == 0) { 1388 ar->cal_mode = ATH10K_CAL_MODE_DT; 1389 goto done; 1390 } 1391 1392 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1393 "boot did not find DT entry, try target EEPROM next: %d\n", 1394 ret); 1395 1396 ret = ath10k_download_cal_eeprom(ar); 1397 if (ret == 0) { 1398 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 1399 goto done; 1400 } 1401 1402 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1403 "boot did not find target EEPROM entry, try OTP next: %d\n", 1404 ret); 1405 1406 ret = ath10k_download_and_run_otp(ar); 1407 if (ret) { 1408 ath10k_err(ar, "failed to run otp: %d\n", ret); 1409 return ret; 1410 } 1411 1412 ar->cal_mode = ATH10K_CAL_MODE_OTP; 1413 1414 done: 1415 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1416 ath10k_cal_mode_str(ar->cal_mode)); 1417 return 0; 1418 } 1419 1420 static int ath10k_init_uart(struct ath10k *ar) 1421 { 1422 int ret; 1423 1424 /* 1425 * Explicitly setting UART prints to zero as target turns it on 1426 * based on scratch registers. 1427 */ 1428 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 1429 if (ret) { 1430 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 1431 return ret; 1432 } 1433 1434 if (!uart_print) 1435 return 0; 1436 1437 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 1438 if (ret) { 1439 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1440 return ret; 1441 } 1442 1443 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 1444 if (ret) { 1445 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 1446 return ret; 1447 } 1448 1449 /* Set the UART baud rate to 19200. */ 1450 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 1451 if (ret) { 1452 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 1453 return ret; 1454 } 1455 1456 ath10k_info(ar, "UART prints enabled\n"); 1457 return 0; 1458 } 1459 1460 static int ath10k_init_hw_params(struct ath10k *ar) 1461 { 1462 const struct ath10k_hw_params *uninitialized_var(hw_params); 1463 int i; 1464 1465 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 1466 hw_params = &ath10k_hw_params_list[i]; 1467 1468 if (hw_params->id == ar->target_version && 1469 hw_params->dev_id == ar->dev_id) 1470 break; 1471 } 1472 1473 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 1474 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 1475 ar->target_version); 1476 return -EINVAL; 1477 } 1478 1479 ar->hw_params = *hw_params; 1480 1481 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 1482 ar->hw_params.name, ar->target_version); 1483 1484 return 0; 1485 } 1486 1487 static void ath10k_core_restart(struct work_struct *work) 1488 { 1489 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 1490 1491 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1492 1493 /* Place a barrier to make sure the compiler doesn't reorder 1494 * CRASH_FLUSH and calling other functions. 1495 */ 1496 barrier(); 1497 1498 ieee80211_stop_queues(ar->hw); 1499 ath10k_drain_tx(ar); 1500 complete_all(&ar->scan.started); 1501 complete_all(&ar->scan.completed); 1502 complete_all(&ar->scan.on_channel); 1503 complete_all(&ar->offchan_tx_completed); 1504 complete_all(&ar->install_key_done); 1505 complete_all(&ar->vdev_setup_done); 1506 complete_all(&ar->thermal.wmi_sync); 1507 complete_all(&ar->bss_survey_done); 1508 wake_up(&ar->htt.empty_tx_wq); 1509 wake_up(&ar->wmi.tx_credits_wq); 1510 wake_up(&ar->peer_mapping_wq); 1511 1512 mutex_lock(&ar->conf_mutex); 1513 1514 switch (ar->state) { 1515 case ATH10K_STATE_ON: 1516 ar->state = ATH10K_STATE_RESTARTING; 1517 ath10k_hif_stop(ar); 1518 ath10k_scan_finish(ar); 1519 ieee80211_restart_hw(ar->hw); 1520 break; 1521 case ATH10K_STATE_OFF: 1522 /* this can happen if driver is being unloaded 1523 * or if the crash happens during FW probing */ 1524 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 1525 break; 1526 case ATH10K_STATE_RESTARTING: 1527 /* hw restart might be requested from multiple places */ 1528 break; 1529 case ATH10K_STATE_RESTARTED: 1530 ar->state = ATH10K_STATE_WEDGED; 1531 /* fall through */ 1532 case ATH10K_STATE_WEDGED: 1533 ath10k_warn(ar, "device is wedged, will not restart\n"); 1534 break; 1535 case ATH10K_STATE_UTF: 1536 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 1537 break; 1538 } 1539 1540 mutex_unlock(&ar->conf_mutex); 1541 } 1542 1543 static int ath10k_core_init_firmware_features(struct ath10k *ar) 1544 { 1545 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 1546 1547 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 1548 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1549 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 1550 return -EINVAL; 1551 } 1552 1553 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 1554 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 1555 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 1556 return -EINVAL; 1557 } 1558 1559 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 1560 switch (ath10k_cryptmode_param) { 1561 case ATH10K_CRYPT_MODE_HW: 1562 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1563 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1564 break; 1565 case ATH10K_CRYPT_MODE_SW: 1566 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1567 fw_file->fw_features)) { 1568 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 1569 return -EINVAL; 1570 } 1571 1572 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1573 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 1574 break; 1575 default: 1576 ath10k_info(ar, "invalid cryptmode: %d\n", 1577 ath10k_cryptmode_param); 1578 return -EINVAL; 1579 } 1580 1581 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 1582 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 1583 1584 if (rawmode) { 1585 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 1586 fw_file->fw_features)) { 1587 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 1588 return -EINVAL; 1589 } 1590 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 1591 } 1592 1593 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 1594 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 1595 1596 /* Workaround: 1597 * 1598 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 1599 * and causes enormous performance issues (malformed frames, 1600 * etc). 1601 * 1602 * Disabling A-MSDU makes RAW mode stable with heavy traffic 1603 * albeit a bit slower compared to regular operation. 1604 */ 1605 ar->htt.max_num_amsdu = 1; 1606 } 1607 1608 /* Backwards compatibility for firmwares without 1609 * ATH10K_FW_IE_WMI_OP_VERSION. 1610 */ 1611 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 1612 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 1613 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 1614 fw_file->fw_features)) 1615 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 1616 else 1617 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 1618 } else { 1619 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 1620 } 1621 } 1622 1623 switch (fw_file->wmi_op_version) { 1624 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1625 ar->max_num_peers = TARGET_NUM_PEERS; 1626 ar->max_num_stations = TARGET_NUM_STATIONS; 1627 ar->max_num_vdevs = TARGET_NUM_VDEVS; 1628 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 1629 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1630 WMI_STAT_PEER; 1631 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1632 break; 1633 case ATH10K_FW_WMI_OP_VERSION_10_1: 1634 case ATH10K_FW_WMI_OP_VERSION_10_2: 1635 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1636 if (ath10k_peer_stats_enabled(ar)) { 1637 ar->max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 1638 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 1639 } else { 1640 ar->max_num_peers = TARGET_10X_NUM_PEERS; 1641 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 1642 } 1643 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 1644 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 1645 ar->fw_stats_req_mask = WMI_STAT_PEER; 1646 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1647 break; 1648 case ATH10K_FW_WMI_OP_VERSION_TLV: 1649 ar->max_num_peers = TARGET_TLV_NUM_PEERS; 1650 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 1651 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 1652 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 1653 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 1654 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 1655 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 1656 WMI_STAT_PEER; 1657 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 1658 break; 1659 case ATH10K_FW_WMI_OP_VERSION_10_4: 1660 ar->max_num_peers = TARGET_10_4_NUM_PEERS; 1661 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 1662 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 1663 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 1664 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 1665 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 1666 WMI_10_4_STAT_PEER_EXTD; 1667 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 1668 1669 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 1670 fw_file->fw_features)) 1671 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 1672 else 1673 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 1674 break; 1675 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1676 case ATH10K_FW_WMI_OP_VERSION_MAX: 1677 WARN_ON(1); 1678 return -EINVAL; 1679 } 1680 1681 /* Backwards compatibility for firmwares without 1682 * ATH10K_FW_IE_HTT_OP_VERSION. 1683 */ 1684 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 1685 switch (fw_file->wmi_op_version) { 1686 case ATH10K_FW_WMI_OP_VERSION_MAIN: 1687 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 1688 break; 1689 case ATH10K_FW_WMI_OP_VERSION_10_1: 1690 case ATH10K_FW_WMI_OP_VERSION_10_2: 1691 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 1692 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 1693 break; 1694 case ATH10K_FW_WMI_OP_VERSION_TLV: 1695 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 1696 break; 1697 case ATH10K_FW_WMI_OP_VERSION_10_4: 1698 case ATH10K_FW_WMI_OP_VERSION_UNSET: 1699 case ATH10K_FW_WMI_OP_VERSION_MAX: 1700 ath10k_err(ar, "htt op version not found from fw meta data"); 1701 return -EINVAL; 1702 } 1703 } 1704 1705 return 0; 1706 } 1707 1708 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 1709 const struct ath10k_fw_components *fw) 1710 { 1711 int status; 1712 u32 val; 1713 1714 lockdep_assert_held(&ar->conf_mutex); 1715 1716 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 1717 1718 ar->running_fw = fw; 1719 1720 ath10k_bmi_start(ar); 1721 1722 if (ath10k_init_configure_target(ar)) { 1723 status = -EINVAL; 1724 goto err; 1725 } 1726 1727 status = ath10k_download_cal_data(ar); 1728 if (status) 1729 goto err; 1730 1731 /* Some of of qca988x solutions are having global reset issue 1732 * during target initialization. Bypassing PLL setting before 1733 * downloading firmware and letting the SoC run on REF_CLK is 1734 * fixing the problem. Corresponding firmware change is also needed 1735 * to set the clock source once the target is initialized. 1736 */ 1737 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 1738 ar->running_fw->fw_file.fw_features)) { 1739 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 1740 if (status) { 1741 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 1742 status); 1743 goto err; 1744 } 1745 } 1746 1747 status = ath10k_download_fw(ar); 1748 if (status) 1749 goto err; 1750 1751 status = ath10k_init_uart(ar); 1752 if (status) 1753 goto err; 1754 1755 ar->htc.htc_ops.target_send_suspend_complete = 1756 ath10k_send_suspend_complete; 1757 1758 status = ath10k_htc_init(ar); 1759 if (status) { 1760 ath10k_err(ar, "could not init HTC (%d)\n", status); 1761 goto err; 1762 } 1763 1764 status = ath10k_bmi_done(ar); 1765 if (status) 1766 goto err; 1767 1768 status = ath10k_wmi_attach(ar); 1769 if (status) { 1770 ath10k_err(ar, "WMI attach failed: %d\n", status); 1771 goto err; 1772 } 1773 1774 status = ath10k_htt_init(ar); 1775 if (status) { 1776 ath10k_err(ar, "failed to init htt: %d\n", status); 1777 goto err_wmi_detach; 1778 } 1779 1780 status = ath10k_htt_tx_alloc(&ar->htt); 1781 if (status) { 1782 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 1783 goto err_wmi_detach; 1784 } 1785 1786 status = ath10k_htt_rx_alloc(&ar->htt); 1787 if (status) { 1788 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 1789 goto err_htt_tx_detach; 1790 } 1791 1792 status = ath10k_hif_start(ar); 1793 if (status) { 1794 ath10k_err(ar, "could not start HIF: %d\n", status); 1795 goto err_htt_rx_detach; 1796 } 1797 1798 status = ath10k_htc_wait_target(&ar->htc); 1799 if (status) { 1800 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 1801 goto err_hif_stop; 1802 } 1803 1804 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1805 status = ath10k_htt_connect(&ar->htt); 1806 if (status) { 1807 ath10k_err(ar, "failed to connect htt (%d)\n", status); 1808 goto err_hif_stop; 1809 } 1810 } 1811 1812 status = ath10k_wmi_connect(ar); 1813 if (status) { 1814 ath10k_err(ar, "could not connect wmi: %d\n", status); 1815 goto err_hif_stop; 1816 } 1817 1818 status = ath10k_htc_start(&ar->htc); 1819 if (status) { 1820 ath10k_err(ar, "failed to start htc: %d\n", status); 1821 goto err_hif_stop; 1822 } 1823 1824 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1825 status = ath10k_wmi_wait_for_service_ready(ar); 1826 if (status) { 1827 ath10k_warn(ar, "wmi service ready event not received"); 1828 goto err_hif_stop; 1829 } 1830 } 1831 1832 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 1833 ar->hw->wiphy->fw_version); 1834 1835 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map)) { 1836 val = 0; 1837 if (ath10k_peer_stats_enabled(ar)) 1838 val = WMI_10_4_PEER_STATS; 1839 1840 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 1841 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 1842 1843 /* 10.4 firmware supports BT-Coex without reloading firmware 1844 * via pdev param. To support Bluetooth coexistence pdev param, 1845 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 1846 * enabled always. 1847 */ 1848 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 1849 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 1850 ar->running_fw->fw_file.fw_features)) 1851 val |= WMI_10_4_COEX_GPIO_SUPPORT; 1852 1853 status = ath10k_mac_ext_resource_config(ar, val); 1854 if (status) { 1855 ath10k_err(ar, 1856 "failed to send ext resource cfg command : %d\n", 1857 status); 1858 goto err_hif_stop; 1859 } 1860 } 1861 1862 status = ath10k_wmi_cmd_init(ar); 1863 if (status) { 1864 ath10k_err(ar, "could not send WMI init command (%d)\n", 1865 status); 1866 goto err_hif_stop; 1867 } 1868 1869 status = ath10k_wmi_wait_for_unified_ready(ar); 1870 if (status) { 1871 ath10k_err(ar, "wmi unified ready event not received\n"); 1872 goto err_hif_stop; 1873 } 1874 1875 /* If firmware indicates Full Rx Reorder support it must be used in a 1876 * slightly different manner. Let HTT code know. 1877 */ 1878 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 1879 ar->wmi.svc_map)); 1880 1881 status = ath10k_htt_rx_ring_refill(ar); 1882 if (status) { 1883 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 1884 goto err_hif_stop; 1885 } 1886 1887 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 1888 1889 INIT_LIST_HEAD(&ar->arvifs); 1890 1891 /* we don't care about HTT in UTF mode */ 1892 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 1893 status = ath10k_htt_setup(&ar->htt); 1894 if (status) { 1895 ath10k_err(ar, "failed to setup htt: %d\n", status); 1896 goto err_hif_stop; 1897 } 1898 } 1899 1900 status = ath10k_debug_start(ar); 1901 if (status) 1902 goto err_hif_stop; 1903 1904 return 0; 1905 1906 err_hif_stop: 1907 ath10k_hif_stop(ar); 1908 err_htt_rx_detach: 1909 ath10k_htt_rx_free(&ar->htt); 1910 err_htt_tx_detach: 1911 ath10k_htt_tx_free(&ar->htt); 1912 err_wmi_detach: 1913 ath10k_wmi_detach(ar); 1914 err: 1915 return status; 1916 } 1917 EXPORT_SYMBOL(ath10k_core_start); 1918 1919 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 1920 { 1921 int ret; 1922 unsigned long time_left; 1923 1924 reinit_completion(&ar->target_suspend); 1925 1926 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 1927 if (ret) { 1928 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 1929 return ret; 1930 } 1931 1932 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 1933 1934 if (!time_left) { 1935 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 1936 return -ETIMEDOUT; 1937 } 1938 1939 return 0; 1940 } 1941 1942 void ath10k_core_stop(struct ath10k *ar) 1943 { 1944 lockdep_assert_held(&ar->conf_mutex); 1945 ath10k_debug_stop(ar); 1946 1947 /* try to suspend target */ 1948 if (ar->state != ATH10K_STATE_RESTARTING && 1949 ar->state != ATH10K_STATE_UTF) 1950 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 1951 1952 ath10k_hif_stop(ar); 1953 ath10k_htt_tx_free(&ar->htt); 1954 ath10k_htt_rx_free(&ar->htt); 1955 ath10k_wmi_detach(ar); 1956 } 1957 EXPORT_SYMBOL(ath10k_core_stop); 1958 1959 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 1960 * order to know what hw capabilities should be advertised to mac80211 it is 1961 * necessary to load the firmware (and tear it down immediately since start 1962 * hook will try to init it again) before registering */ 1963 static int ath10k_core_probe_fw(struct ath10k *ar) 1964 { 1965 struct bmi_target_info target_info; 1966 int ret = 0; 1967 1968 ret = ath10k_hif_power_up(ar); 1969 if (ret) { 1970 ath10k_err(ar, "could not start pci hif (%d)\n", ret); 1971 return ret; 1972 } 1973 1974 memset(&target_info, 0, sizeof(target_info)); 1975 ret = ath10k_bmi_get_target_info(ar, &target_info); 1976 if (ret) { 1977 ath10k_err(ar, "could not get target info (%d)\n", ret); 1978 goto err_power_down; 1979 } 1980 1981 ar->target_version = target_info.version; 1982 ar->hw->wiphy->hw_version = target_info.version; 1983 1984 ret = ath10k_init_hw_params(ar); 1985 if (ret) { 1986 ath10k_err(ar, "could not get hw params (%d)\n", ret); 1987 goto err_power_down; 1988 } 1989 1990 ret = ath10k_core_fetch_firmware_files(ar); 1991 if (ret) { 1992 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 1993 goto err_power_down; 1994 } 1995 1996 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 1997 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 1998 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 1999 sizeof(ar->hw->wiphy->fw_version)); 2000 2001 ath10k_debug_print_hwfw_info(ar); 2002 2003 ret = ath10k_core_pre_cal_download(ar); 2004 if (ret) { 2005 /* pre calibration data download is not necessary 2006 * for all the chipsets. Ignore failures and continue. 2007 */ 2008 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2009 "could not load pre cal data: %d\n", ret); 2010 } 2011 2012 ret = ath10k_core_get_board_id_from_otp(ar); 2013 if (ret && ret != -EOPNOTSUPP) { 2014 ath10k_err(ar, "failed to get board id from otp: %d\n", 2015 ret); 2016 goto err_free_firmware_files; 2017 } 2018 2019 ret = ath10k_core_fetch_board_file(ar); 2020 if (ret) { 2021 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2022 goto err_free_firmware_files; 2023 } 2024 2025 ath10k_debug_print_board_info(ar); 2026 2027 ret = ath10k_core_init_firmware_features(ar); 2028 if (ret) { 2029 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2030 ret); 2031 goto err_free_firmware_files; 2032 } 2033 2034 ret = ath10k_swap_code_seg_init(ar); 2035 if (ret) { 2036 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2037 ret); 2038 goto err_free_firmware_files; 2039 } 2040 2041 mutex_lock(&ar->conf_mutex); 2042 2043 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2044 &ar->normal_mode_fw); 2045 if (ret) { 2046 ath10k_err(ar, "could not init core (%d)\n", ret); 2047 goto err_unlock; 2048 } 2049 2050 ath10k_debug_print_boot_info(ar); 2051 ath10k_core_stop(ar); 2052 2053 mutex_unlock(&ar->conf_mutex); 2054 2055 ath10k_hif_power_down(ar); 2056 return 0; 2057 2058 err_unlock: 2059 mutex_unlock(&ar->conf_mutex); 2060 2061 err_free_firmware_files: 2062 ath10k_core_free_firmware_files(ar); 2063 2064 err_power_down: 2065 ath10k_hif_power_down(ar); 2066 2067 return ret; 2068 } 2069 2070 static void ath10k_core_register_work(struct work_struct *work) 2071 { 2072 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2073 int status; 2074 2075 status = ath10k_core_probe_fw(ar); 2076 if (status) { 2077 ath10k_err(ar, "could not probe fw (%d)\n", status); 2078 goto err; 2079 } 2080 2081 status = ath10k_mac_register(ar); 2082 if (status) { 2083 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2084 goto err_release_fw; 2085 } 2086 2087 status = ath10k_debug_register(ar); 2088 if (status) { 2089 ath10k_err(ar, "unable to initialize debugfs\n"); 2090 goto err_unregister_mac; 2091 } 2092 2093 status = ath10k_spectral_create(ar); 2094 if (status) { 2095 ath10k_err(ar, "failed to initialize spectral\n"); 2096 goto err_debug_destroy; 2097 } 2098 2099 status = ath10k_thermal_register(ar); 2100 if (status) { 2101 ath10k_err(ar, "could not register thermal device: %d\n", 2102 status); 2103 goto err_spectral_destroy; 2104 } 2105 2106 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2107 return; 2108 2109 err_spectral_destroy: 2110 ath10k_spectral_destroy(ar); 2111 err_debug_destroy: 2112 ath10k_debug_destroy(ar); 2113 err_unregister_mac: 2114 ath10k_mac_unregister(ar); 2115 err_release_fw: 2116 ath10k_core_free_firmware_files(ar); 2117 err: 2118 /* TODO: It's probably a good idea to release device from the driver 2119 * but calling device_release_driver() here will cause a deadlock. 2120 */ 2121 return; 2122 } 2123 2124 int ath10k_core_register(struct ath10k *ar, u32 chip_id) 2125 { 2126 ar->chip_id = chip_id; 2127 queue_work(ar->workqueue, &ar->register_work); 2128 2129 return 0; 2130 } 2131 EXPORT_SYMBOL(ath10k_core_register); 2132 2133 void ath10k_core_unregister(struct ath10k *ar) 2134 { 2135 cancel_work_sync(&ar->register_work); 2136 2137 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2138 return; 2139 2140 ath10k_thermal_unregister(ar); 2141 /* Stop spectral before unregistering from mac80211 to remove the 2142 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2143 * would be already be free'd recursively, leading to a double free. 2144 */ 2145 ath10k_spectral_destroy(ar); 2146 2147 /* We must unregister from mac80211 before we stop HTC and HIF. 2148 * Otherwise we will fail to submit commands to FW and mac80211 will be 2149 * unhappy about callback failures. */ 2150 ath10k_mac_unregister(ar); 2151 2152 ath10k_testmode_destroy(ar); 2153 2154 ath10k_core_free_firmware_files(ar); 2155 ath10k_core_free_board_files(ar); 2156 2157 ath10k_debug_unregister(ar); 2158 } 2159 EXPORT_SYMBOL(ath10k_core_unregister); 2160 2161 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2162 enum ath10k_bus bus, 2163 enum ath10k_hw_rev hw_rev, 2164 const struct ath10k_hif_ops *hif_ops) 2165 { 2166 struct ath10k *ar; 2167 int ret; 2168 2169 ar = ath10k_mac_create(priv_size); 2170 if (!ar) 2171 return NULL; 2172 2173 ar->ath_common.priv = ar; 2174 ar->ath_common.hw = ar->hw; 2175 ar->dev = dev; 2176 ar->hw_rev = hw_rev; 2177 ar->hif.ops = hif_ops; 2178 ar->hif.bus = bus; 2179 2180 switch (hw_rev) { 2181 case ATH10K_HW_QCA988X: 2182 case ATH10K_HW_QCA9887: 2183 ar->regs = &qca988x_regs; 2184 ar->hw_values = &qca988x_values; 2185 break; 2186 case ATH10K_HW_QCA6174: 2187 case ATH10K_HW_QCA9377: 2188 ar->regs = &qca6174_regs; 2189 ar->hw_values = &qca6174_values; 2190 break; 2191 case ATH10K_HW_QCA99X0: 2192 case ATH10K_HW_QCA9984: 2193 ar->regs = &qca99x0_regs; 2194 ar->hw_values = &qca99x0_values; 2195 break; 2196 case ATH10K_HW_QCA9888: 2197 ar->regs = &qca99x0_regs; 2198 ar->hw_values = &qca9888_values; 2199 break; 2200 case ATH10K_HW_QCA4019: 2201 ar->regs = &qca4019_regs; 2202 ar->hw_values = &qca4019_values; 2203 break; 2204 default: 2205 ath10k_err(ar, "unsupported core hardware revision %d\n", 2206 hw_rev); 2207 ret = -ENOTSUPP; 2208 goto err_free_mac; 2209 } 2210 2211 init_completion(&ar->scan.started); 2212 init_completion(&ar->scan.completed); 2213 init_completion(&ar->scan.on_channel); 2214 init_completion(&ar->target_suspend); 2215 init_completion(&ar->wow.wakeup_completed); 2216 2217 init_completion(&ar->install_key_done); 2218 init_completion(&ar->vdev_setup_done); 2219 init_completion(&ar->thermal.wmi_sync); 2220 init_completion(&ar->bss_survey_done); 2221 2222 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 2223 2224 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 2225 if (!ar->workqueue) 2226 goto err_free_mac; 2227 2228 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 2229 if (!ar->workqueue_aux) 2230 goto err_free_wq; 2231 2232 mutex_init(&ar->conf_mutex); 2233 spin_lock_init(&ar->data_lock); 2234 spin_lock_init(&ar->txqs_lock); 2235 2236 INIT_LIST_HEAD(&ar->txqs); 2237 INIT_LIST_HEAD(&ar->peers); 2238 init_waitqueue_head(&ar->peer_mapping_wq); 2239 init_waitqueue_head(&ar->htt.empty_tx_wq); 2240 init_waitqueue_head(&ar->wmi.tx_credits_wq); 2241 2242 init_completion(&ar->offchan_tx_completed); 2243 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 2244 skb_queue_head_init(&ar->offchan_tx_queue); 2245 2246 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 2247 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 2248 2249 INIT_WORK(&ar->register_work, ath10k_core_register_work); 2250 INIT_WORK(&ar->restart_work, ath10k_core_restart); 2251 2252 ret = ath10k_debug_create(ar); 2253 if (ret) 2254 goto err_free_aux_wq; 2255 2256 return ar; 2257 2258 err_free_aux_wq: 2259 destroy_workqueue(ar->workqueue_aux); 2260 err_free_wq: 2261 destroy_workqueue(ar->workqueue); 2262 2263 err_free_mac: 2264 ath10k_mac_destroy(ar); 2265 2266 return NULL; 2267 } 2268 EXPORT_SYMBOL(ath10k_core_create); 2269 2270 void ath10k_core_destroy(struct ath10k *ar) 2271 { 2272 flush_workqueue(ar->workqueue); 2273 destroy_workqueue(ar->workqueue); 2274 2275 flush_workqueue(ar->workqueue_aux); 2276 destroy_workqueue(ar->workqueue_aux); 2277 2278 ath10k_debug_destroy(ar); 2279 ath10k_wmi_free_host_mem(ar); 2280 ath10k_mac_destroy(ar); 2281 } 2282 EXPORT_SYMBOL(ath10k_core_destroy); 2283 2284 MODULE_AUTHOR("Qualcomm Atheros"); 2285 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 2286 MODULE_LICENSE("Dual BSD/GPL"); 2287