1 /* 2 * Copyright (c) 2005-2011 Atheros Communications Inc. 3 * Copyright (c) 2011-2017 Qualcomm Atheros, Inc. 4 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 5 * 6 * Permission to use, copy, modify, and/or distribute this software for any 7 * purpose with or without fee is hereby granted, provided that the above 8 * copyright notice and this permission notice appear in all copies. 9 * 10 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 11 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 12 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 13 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 14 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 15 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 16 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/firmware.h> 21 #include <linux/of.h> 22 #include <linux/property.h> 23 #include <linux/dmi.h> 24 #include <linux/ctype.h> 25 #include <asm/byteorder.h> 26 27 #include "core.h" 28 #include "mac.h" 29 #include "htc.h" 30 #include "hif.h" 31 #include "wmi.h" 32 #include "bmi.h" 33 #include "debug.h" 34 #include "htt.h" 35 #include "testmode.h" 36 #include "wmi-ops.h" 37 #include "coredump.h" 38 39 unsigned int ath10k_debug_mask; 40 static unsigned int ath10k_cryptmode_param; 41 static bool uart_print; 42 static bool skip_otp; 43 static bool rawmode; 44 45 unsigned long ath10k_coredump_mask = BIT(ATH10K_FW_CRASH_DUMP_REGISTERS) | 46 BIT(ATH10K_FW_CRASH_DUMP_CE_DATA); 47 48 /* FIXME: most of these should be readonly */ 49 module_param_named(debug_mask, ath10k_debug_mask, uint, 0644); 50 module_param_named(cryptmode, ath10k_cryptmode_param, uint, 0644); 51 module_param(uart_print, bool, 0644); 52 module_param(skip_otp, bool, 0644); 53 module_param(rawmode, bool, 0644); 54 module_param_named(coredump_mask, ath10k_coredump_mask, ulong, 0444); 55 56 MODULE_PARM_DESC(debug_mask, "Debugging mask"); 57 MODULE_PARM_DESC(uart_print, "Uart target debugging"); 58 MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode"); 59 MODULE_PARM_DESC(cryptmode, "Crypto mode: 0-hardware, 1-software"); 60 MODULE_PARM_DESC(rawmode, "Use raw 802.11 frame datapath"); 61 MODULE_PARM_DESC(coredump_mask, "Bitfield of what to include in firmware crash file"); 62 63 static const struct ath10k_hw_params ath10k_hw_params_list[] = { 64 { 65 .id = QCA988X_HW_2_0_VERSION, 66 .dev_id = QCA988X_2_0_DEVICE_ID, 67 .bus = ATH10K_BUS_PCI, 68 .name = "qca988x hw2.0", 69 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 70 .uart_pin = 7, 71 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 72 .otp_exe_param = 0, 73 .channel_counters_freq_hz = 88000, 74 .max_probe_resp_desc_thres = 0, 75 .cal_data_len = 2116, 76 .fw = { 77 .dir = QCA988X_HW_2_0_FW_DIR, 78 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 79 .board_size = QCA988X_BOARD_DATA_SZ, 80 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 81 }, 82 .hw_ops = &qca988x_ops, 83 .decap_align_bytes = 4, 84 .spectral_bin_discard = 0, 85 .spectral_bin_offset = 0, 86 .vht160_mcs_rx_highest = 0, 87 .vht160_mcs_tx_highest = 0, 88 .n_cipher_suites = 8, 89 .ast_skid_limit = 0x10, 90 .num_wds_entries = 0x20, 91 .target_64bit = false, 92 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 93 .shadow_reg_support = false, 94 .rri_on_ddr = false, 95 .hw_filter_reset_required = true, 96 .fw_diag_ce_download = false, 97 }, 98 { 99 .id = QCA988X_HW_2_0_VERSION, 100 .dev_id = QCA988X_2_0_DEVICE_ID_UBNT, 101 .name = "qca988x hw2.0 ubiquiti", 102 .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR, 103 .uart_pin = 7, 104 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 105 .otp_exe_param = 0, 106 .channel_counters_freq_hz = 88000, 107 .max_probe_resp_desc_thres = 0, 108 .cal_data_len = 2116, 109 .fw = { 110 .dir = QCA988X_HW_2_0_FW_DIR, 111 .board = QCA988X_HW_2_0_BOARD_DATA_FILE, 112 .board_size = QCA988X_BOARD_DATA_SZ, 113 .board_ext_size = QCA988X_BOARD_EXT_DATA_SZ, 114 }, 115 .hw_ops = &qca988x_ops, 116 .decap_align_bytes = 4, 117 .spectral_bin_discard = 0, 118 .spectral_bin_offset = 0, 119 .vht160_mcs_rx_highest = 0, 120 .vht160_mcs_tx_highest = 0, 121 .n_cipher_suites = 8, 122 .ast_skid_limit = 0x10, 123 .num_wds_entries = 0x20, 124 .target_64bit = false, 125 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 126 .per_ce_irq = false, 127 .shadow_reg_support = false, 128 .rri_on_ddr = false, 129 .hw_filter_reset_required = true, 130 .fw_diag_ce_download = false, 131 }, 132 { 133 .id = QCA9887_HW_1_0_VERSION, 134 .dev_id = QCA9887_1_0_DEVICE_ID, 135 .bus = ATH10K_BUS_PCI, 136 .name = "qca9887 hw1.0", 137 .patch_load_addr = QCA9887_HW_1_0_PATCH_LOAD_ADDR, 138 .uart_pin = 7, 139 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_ALL, 140 .otp_exe_param = 0, 141 .channel_counters_freq_hz = 88000, 142 .max_probe_resp_desc_thres = 0, 143 .cal_data_len = 2116, 144 .fw = { 145 .dir = QCA9887_HW_1_0_FW_DIR, 146 .board = QCA9887_HW_1_0_BOARD_DATA_FILE, 147 .board_size = QCA9887_BOARD_DATA_SZ, 148 .board_ext_size = QCA9887_BOARD_EXT_DATA_SZ, 149 }, 150 .hw_ops = &qca988x_ops, 151 .decap_align_bytes = 4, 152 .spectral_bin_discard = 0, 153 .spectral_bin_offset = 0, 154 .vht160_mcs_rx_highest = 0, 155 .vht160_mcs_tx_highest = 0, 156 .n_cipher_suites = 8, 157 .ast_skid_limit = 0x10, 158 .num_wds_entries = 0x20, 159 .target_64bit = false, 160 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 161 .per_ce_irq = false, 162 .shadow_reg_support = false, 163 .rri_on_ddr = false, 164 .hw_filter_reset_required = true, 165 .fw_diag_ce_download = false, 166 }, 167 { 168 .id = QCA6174_HW_2_1_VERSION, 169 .dev_id = QCA6164_2_1_DEVICE_ID, 170 .bus = ATH10K_BUS_PCI, 171 .name = "qca6164 hw2.1", 172 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 173 .uart_pin = 6, 174 .otp_exe_param = 0, 175 .channel_counters_freq_hz = 88000, 176 .max_probe_resp_desc_thres = 0, 177 .cal_data_len = 8124, 178 .fw = { 179 .dir = QCA6174_HW_2_1_FW_DIR, 180 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 181 .board_size = QCA6174_BOARD_DATA_SZ, 182 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 183 }, 184 .hw_ops = &qca988x_ops, 185 .decap_align_bytes = 4, 186 .spectral_bin_discard = 0, 187 .spectral_bin_offset = 0, 188 .vht160_mcs_rx_highest = 0, 189 .vht160_mcs_tx_highest = 0, 190 .n_cipher_suites = 8, 191 .ast_skid_limit = 0x10, 192 .num_wds_entries = 0x20, 193 .target_64bit = false, 194 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 195 .per_ce_irq = false, 196 .shadow_reg_support = false, 197 .rri_on_ddr = false, 198 .hw_filter_reset_required = true, 199 .fw_diag_ce_download = false, 200 }, 201 { 202 .id = QCA6174_HW_2_1_VERSION, 203 .dev_id = QCA6174_2_1_DEVICE_ID, 204 .bus = ATH10K_BUS_PCI, 205 .name = "qca6174 hw2.1", 206 .patch_load_addr = QCA6174_HW_2_1_PATCH_LOAD_ADDR, 207 .uart_pin = 6, 208 .otp_exe_param = 0, 209 .channel_counters_freq_hz = 88000, 210 .max_probe_resp_desc_thres = 0, 211 .cal_data_len = 8124, 212 .fw = { 213 .dir = QCA6174_HW_2_1_FW_DIR, 214 .board = QCA6174_HW_2_1_BOARD_DATA_FILE, 215 .board_size = QCA6174_BOARD_DATA_SZ, 216 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 217 }, 218 .hw_ops = &qca988x_ops, 219 .decap_align_bytes = 4, 220 .spectral_bin_discard = 0, 221 .spectral_bin_offset = 0, 222 .vht160_mcs_rx_highest = 0, 223 .vht160_mcs_tx_highest = 0, 224 .n_cipher_suites = 8, 225 .ast_skid_limit = 0x10, 226 .num_wds_entries = 0x20, 227 .target_64bit = false, 228 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 229 .per_ce_irq = false, 230 .shadow_reg_support = false, 231 .rri_on_ddr = false, 232 .hw_filter_reset_required = true, 233 .fw_diag_ce_download = false, 234 }, 235 { 236 .id = QCA6174_HW_3_0_VERSION, 237 .dev_id = QCA6174_2_1_DEVICE_ID, 238 .bus = ATH10K_BUS_PCI, 239 .name = "qca6174 hw3.0", 240 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 241 .uart_pin = 6, 242 .otp_exe_param = 0, 243 .channel_counters_freq_hz = 88000, 244 .max_probe_resp_desc_thres = 0, 245 .cal_data_len = 8124, 246 .fw = { 247 .dir = QCA6174_HW_3_0_FW_DIR, 248 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 249 .board_size = QCA6174_BOARD_DATA_SZ, 250 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 251 }, 252 .hw_ops = &qca988x_ops, 253 .decap_align_bytes = 4, 254 .spectral_bin_discard = 0, 255 .spectral_bin_offset = 0, 256 .vht160_mcs_rx_highest = 0, 257 .vht160_mcs_tx_highest = 0, 258 .n_cipher_suites = 8, 259 .ast_skid_limit = 0x10, 260 .num_wds_entries = 0x20, 261 .target_64bit = false, 262 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 263 .per_ce_irq = false, 264 .shadow_reg_support = false, 265 .rri_on_ddr = false, 266 .hw_filter_reset_required = true, 267 .fw_diag_ce_download = false, 268 }, 269 { 270 .id = QCA6174_HW_3_2_VERSION, 271 .dev_id = QCA6174_2_1_DEVICE_ID, 272 .bus = ATH10K_BUS_PCI, 273 .name = "qca6174 hw3.2", 274 .patch_load_addr = QCA6174_HW_3_0_PATCH_LOAD_ADDR, 275 .uart_pin = 6, 276 .otp_exe_param = 0, 277 .channel_counters_freq_hz = 88000, 278 .max_probe_resp_desc_thres = 0, 279 .cal_data_len = 8124, 280 .fw = { 281 /* uses same binaries as hw3.0 */ 282 .dir = QCA6174_HW_3_0_FW_DIR, 283 .board = QCA6174_HW_3_0_BOARD_DATA_FILE, 284 .board_size = QCA6174_BOARD_DATA_SZ, 285 .board_ext_size = QCA6174_BOARD_EXT_DATA_SZ, 286 }, 287 .hw_ops = &qca6174_ops, 288 .hw_clk = qca6174_clk, 289 .target_cpu_freq = 176000000, 290 .decap_align_bytes = 4, 291 .spectral_bin_discard = 0, 292 .spectral_bin_offset = 0, 293 .vht160_mcs_rx_highest = 0, 294 .vht160_mcs_tx_highest = 0, 295 .n_cipher_suites = 8, 296 .ast_skid_limit = 0x10, 297 .num_wds_entries = 0x20, 298 .target_64bit = false, 299 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 300 .per_ce_irq = false, 301 .shadow_reg_support = false, 302 .rri_on_ddr = false, 303 .hw_filter_reset_required = true, 304 .fw_diag_ce_download = true, 305 }, 306 { 307 .id = QCA99X0_HW_2_0_DEV_VERSION, 308 .dev_id = QCA99X0_2_0_DEVICE_ID, 309 .bus = ATH10K_BUS_PCI, 310 .name = "qca99x0 hw2.0", 311 .patch_load_addr = QCA99X0_HW_2_0_PATCH_LOAD_ADDR, 312 .uart_pin = 7, 313 .otp_exe_param = 0x00000700, 314 .continuous_frag_desc = true, 315 .cck_rate_map_rev2 = true, 316 .channel_counters_freq_hz = 150000, 317 .max_probe_resp_desc_thres = 24, 318 .tx_chain_mask = 0xf, 319 .rx_chain_mask = 0xf, 320 .max_spatial_stream = 4, 321 .cal_data_len = 12064, 322 .fw = { 323 .dir = QCA99X0_HW_2_0_FW_DIR, 324 .board = QCA99X0_HW_2_0_BOARD_DATA_FILE, 325 .board_size = QCA99X0_BOARD_DATA_SZ, 326 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 327 }, 328 .sw_decrypt_mcast_mgmt = true, 329 .hw_ops = &qca99x0_ops, 330 .decap_align_bytes = 1, 331 .spectral_bin_discard = 4, 332 .spectral_bin_offset = 0, 333 .vht160_mcs_rx_highest = 0, 334 .vht160_mcs_tx_highest = 0, 335 .n_cipher_suites = 11, 336 .ast_skid_limit = 0x10, 337 .num_wds_entries = 0x20, 338 .target_64bit = false, 339 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 340 .per_ce_irq = false, 341 .shadow_reg_support = false, 342 .rri_on_ddr = false, 343 .hw_filter_reset_required = true, 344 .fw_diag_ce_download = false, 345 }, 346 { 347 .id = QCA9984_HW_1_0_DEV_VERSION, 348 .dev_id = QCA9984_1_0_DEVICE_ID, 349 .bus = ATH10K_BUS_PCI, 350 .name = "qca9984/qca9994 hw1.0", 351 .patch_load_addr = QCA9984_HW_1_0_PATCH_LOAD_ADDR, 352 .uart_pin = 7, 353 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 354 .otp_exe_param = 0x00000700, 355 .continuous_frag_desc = true, 356 .cck_rate_map_rev2 = true, 357 .channel_counters_freq_hz = 150000, 358 .max_probe_resp_desc_thres = 24, 359 .tx_chain_mask = 0xf, 360 .rx_chain_mask = 0xf, 361 .max_spatial_stream = 4, 362 .cal_data_len = 12064, 363 .fw = { 364 .dir = QCA9984_HW_1_0_FW_DIR, 365 .board = QCA9984_HW_1_0_BOARD_DATA_FILE, 366 .eboard = QCA9984_HW_1_0_EBOARD_DATA_FILE, 367 .board_size = QCA99X0_BOARD_DATA_SZ, 368 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 369 .ext_board_size = QCA99X0_EXT_BOARD_DATA_SZ, 370 }, 371 .sw_decrypt_mcast_mgmt = true, 372 .hw_ops = &qca99x0_ops, 373 .decap_align_bytes = 1, 374 .spectral_bin_discard = 12, 375 .spectral_bin_offset = 8, 376 377 /* Can do only 2x2 VHT160 or 80+80. 1560Mbps is 4x4 80Mhz 378 * or 2x2 160Mhz, long-guard-interval. 379 */ 380 .vht160_mcs_rx_highest = 1560, 381 .vht160_mcs_tx_highest = 1560, 382 .n_cipher_suites = 11, 383 .ast_skid_limit = 0x10, 384 .num_wds_entries = 0x20, 385 .target_64bit = false, 386 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 387 .per_ce_irq = false, 388 .shadow_reg_support = false, 389 .rri_on_ddr = false, 390 .hw_filter_reset_required = true, 391 .fw_diag_ce_download = false, 392 }, 393 { 394 .id = QCA9888_HW_2_0_DEV_VERSION, 395 .dev_id = QCA9888_2_0_DEVICE_ID, 396 .bus = ATH10K_BUS_PCI, 397 .name = "qca9888 hw2.0", 398 .patch_load_addr = QCA9888_HW_2_0_PATCH_LOAD_ADDR, 399 .uart_pin = 7, 400 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 401 .otp_exe_param = 0x00000700, 402 .continuous_frag_desc = true, 403 .channel_counters_freq_hz = 150000, 404 .max_probe_resp_desc_thres = 24, 405 .tx_chain_mask = 3, 406 .rx_chain_mask = 3, 407 .max_spatial_stream = 2, 408 .cal_data_len = 12064, 409 .fw = { 410 .dir = QCA9888_HW_2_0_FW_DIR, 411 .board = QCA9888_HW_2_0_BOARD_DATA_FILE, 412 .board_size = QCA99X0_BOARD_DATA_SZ, 413 .board_ext_size = QCA99X0_BOARD_EXT_DATA_SZ, 414 }, 415 .sw_decrypt_mcast_mgmt = true, 416 .hw_ops = &qca99x0_ops, 417 .decap_align_bytes = 1, 418 .spectral_bin_discard = 12, 419 .spectral_bin_offset = 8, 420 421 /* Can do only 1x1 VHT160 or 80+80. 780Mbps is 2x2 80Mhz or 422 * 1x1 160Mhz, long-guard-interval. 423 */ 424 .vht160_mcs_rx_highest = 780, 425 .vht160_mcs_tx_highest = 780, 426 .n_cipher_suites = 11, 427 .ast_skid_limit = 0x10, 428 .num_wds_entries = 0x20, 429 .target_64bit = false, 430 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 431 .per_ce_irq = false, 432 .shadow_reg_support = false, 433 .rri_on_ddr = false, 434 .hw_filter_reset_required = true, 435 .fw_diag_ce_download = false, 436 }, 437 { 438 .id = QCA9377_HW_1_0_DEV_VERSION, 439 .dev_id = QCA9377_1_0_DEVICE_ID, 440 .bus = ATH10K_BUS_PCI, 441 .name = "qca9377 hw1.0", 442 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 443 .uart_pin = 6, 444 .otp_exe_param = 0, 445 .channel_counters_freq_hz = 88000, 446 .max_probe_resp_desc_thres = 0, 447 .cal_data_len = 8124, 448 .fw = { 449 .dir = QCA9377_HW_1_0_FW_DIR, 450 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 451 .board_size = QCA9377_BOARD_DATA_SZ, 452 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 453 }, 454 .hw_ops = &qca988x_ops, 455 .decap_align_bytes = 4, 456 .spectral_bin_discard = 0, 457 .spectral_bin_offset = 0, 458 .vht160_mcs_rx_highest = 0, 459 .vht160_mcs_tx_highest = 0, 460 .n_cipher_suites = 8, 461 .ast_skid_limit = 0x10, 462 .num_wds_entries = 0x20, 463 .target_64bit = false, 464 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 465 .per_ce_irq = false, 466 .shadow_reg_support = false, 467 .rri_on_ddr = false, 468 .hw_filter_reset_required = true, 469 .fw_diag_ce_download = false, 470 }, 471 { 472 .id = QCA9377_HW_1_1_DEV_VERSION, 473 .dev_id = QCA9377_1_0_DEVICE_ID, 474 .bus = ATH10K_BUS_PCI, 475 .name = "qca9377 hw1.1", 476 .patch_load_addr = QCA9377_HW_1_0_PATCH_LOAD_ADDR, 477 .uart_pin = 6, 478 .otp_exe_param = 0, 479 .channel_counters_freq_hz = 88000, 480 .max_probe_resp_desc_thres = 0, 481 .cal_data_len = 8124, 482 .fw = { 483 .dir = QCA9377_HW_1_0_FW_DIR, 484 .board = QCA9377_HW_1_0_BOARD_DATA_FILE, 485 .board_size = QCA9377_BOARD_DATA_SZ, 486 .board_ext_size = QCA9377_BOARD_EXT_DATA_SZ, 487 }, 488 .hw_ops = &qca6174_ops, 489 .hw_clk = qca6174_clk, 490 .target_cpu_freq = 176000000, 491 .decap_align_bytes = 4, 492 .spectral_bin_discard = 0, 493 .spectral_bin_offset = 0, 494 .vht160_mcs_rx_highest = 0, 495 .vht160_mcs_tx_highest = 0, 496 .n_cipher_suites = 8, 497 .ast_skid_limit = 0x10, 498 .num_wds_entries = 0x20, 499 .target_64bit = false, 500 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 501 .per_ce_irq = false, 502 .shadow_reg_support = false, 503 .rri_on_ddr = false, 504 .hw_filter_reset_required = true, 505 .fw_diag_ce_download = true, 506 }, 507 { 508 .id = QCA4019_HW_1_0_DEV_VERSION, 509 .dev_id = 0, 510 .bus = ATH10K_BUS_AHB, 511 .name = "qca4019 hw1.0", 512 .patch_load_addr = QCA4019_HW_1_0_PATCH_LOAD_ADDR, 513 .uart_pin = 7, 514 .cc_wraparound_type = ATH10K_HW_CC_WRAP_SHIFTED_EACH, 515 .otp_exe_param = 0x0010000, 516 .continuous_frag_desc = true, 517 .cck_rate_map_rev2 = true, 518 .channel_counters_freq_hz = 125000, 519 .max_probe_resp_desc_thres = 24, 520 .tx_chain_mask = 0x3, 521 .rx_chain_mask = 0x3, 522 .max_spatial_stream = 2, 523 .cal_data_len = 12064, 524 .fw = { 525 .dir = QCA4019_HW_1_0_FW_DIR, 526 .board = QCA4019_HW_1_0_BOARD_DATA_FILE, 527 .board_size = QCA4019_BOARD_DATA_SZ, 528 .board_ext_size = QCA4019_BOARD_EXT_DATA_SZ, 529 }, 530 .sw_decrypt_mcast_mgmt = true, 531 .hw_ops = &qca99x0_ops, 532 .decap_align_bytes = 1, 533 .spectral_bin_discard = 4, 534 .spectral_bin_offset = 0, 535 .vht160_mcs_rx_highest = 0, 536 .vht160_mcs_tx_highest = 0, 537 .n_cipher_suites = 11, 538 .ast_skid_limit = 0x10, 539 .num_wds_entries = 0x20, 540 .target_64bit = false, 541 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL, 542 .per_ce_irq = false, 543 .shadow_reg_support = false, 544 .rri_on_ddr = false, 545 .hw_filter_reset_required = true, 546 .fw_diag_ce_download = false, 547 }, 548 { 549 .id = WCN3990_HW_1_0_DEV_VERSION, 550 .dev_id = 0, 551 .bus = ATH10K_BUS_PCI, 552 .name = "wcn3990 hw1.0", 553 .continuous_frag_desc = true, 554 .tx_chain_mask = 0x7, 555 .rx_chain_mask = 0x7, 556 .max_spatial_stream = 4, 557 .fw = { 558 .dir = WCN3990_HW_1_0_FW_DIR, 559 }, 560 .sw_decrypt_mcast_mgmt = true, 561 .hw_ops = &wcn3990_ops, 562 .decap_align_bytes = 1, 563 .num_peers = TARGET_HL_10_TLV_NUM_PEERS, 564 .n_cipher_suites = 8, 565 .ast_skid_limit = TARGET_HL_10_TLV_AST_SKID_LIMIT, 566 .num_wds_entries = TARGET_HL_10_TLV_NUM_WDS_ENTRIES, 567 .target_64bit = true, 568 .rx_ring_fill_level = HTT_RX_RING_FILL_LEVEL_DUAL_MAC, 569 .per_ce_irq = true, 570 .shadow_reg_support = true, 571 .rri_on_ddr = true, 572 .hw_filter_reset_required = false, 573 .fw_diag_ce_download = false, 574 }, 575 }; 576 577 static const char *const ath10k_core_fw_feature_str[] = { 578 [ATH10K_FW_FEATURE_EXT_WMI_MGMT_RX] = "wmi-mgmt-rx", 579 [ATH10K_FW_FEATURE_WMI_10X] = "wmi-10.x", 580 [ATH10K_FW_FEATURE_HAS_WMI_MGMT_TX] = "has-wmi-mgmt-tx", 581 [ATH10K_FW_FEATURE_NO_P2P] = "no-p2p", 582 [ATH10K_FW_FEATURE_WMI_10_2] = "wmi-10.2", 583 [ATH10K_FW_FEATURE_MULTI_VIF_PS_SUPPORT] = "multi-vif-ps", 584 [ATH10K_FW_FEATURE_WOWLAN_SUPPORT] = "wowlan", 585 [ATH10K_FW_FEATURE_IGNORE_OTP_RESULT] = "ignore-otp", 586 [ATH10K_FW_FEATURE_NO_NWIFI_DECAP_4ADDR_PADDING] = "no-4addr-pad", 587 [ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT] = "skip-clock-init", 588 [ATH10K_FW_FEATURE_RAW_MODE_SUPPORT] = "raw-mode", 589 [ATH10K_FW_FEATURE_SUPPORTS_ADAPTIVE_CCA] = "adaptive-cca", 590 [ATH10K_FW_FEATURE_MFP_SUPPORT] = "mfp", 591 [ATH10K_FW_FEATURE_PEER_FLOW_CONTROL] = "peer-flow-ctrl", 592 [ATH10K_FW_FEATURE_BTCOEX_PARAM] = "btcoex-param", 593 [ATH10K_FW_FEATURE_SKIP_NULL_FUNC_WAR] = "skip-null-func-war", 594 [ATH10K_FW_FEATURE_ALLOWS_MESH_BCAST] = "allows-mesh-bcast", 595 [ATH10K_FW_FEATURE_NO_PS] = "no-ps", 596 [ATH10K_FW_FEATURE_MGMT_TX_BY_REF] = "mgmt-tx-by-reference", 597 [ATH10K_FW_FEATURE_NON_BMI] = "non-bmi", 598 [ATH10K_FW_FEATURE_SINGLE_CHAN_INFO_PER_CHANNEL] = "single-chan-info-per-channel", 599 }; 600 601 static unsigned int ath10k_core_get_fw_feature_str(char *buf, 602 size_t buf_len, 603 enum ath10k_fw_features feat) 604 { 605 /* make sure that ath10k_core_fw_feature_str[] gets updated */ 606 BUILD_BUG_ON(ARRAY_SIZE(ath10k_core_fw_feature_str) != 607 ATH10K_FW_FEATURE_COUNT); 608 609 if (feat >= ARRAY_SIZE(ath10k_core_fw_feature_str) || 610 WARN_ON(!ath10k_core_fw_feature_str[feat])) { 611 return scnprintf(buf, buf_len, "bit%d", feat); 612 } 613 614 return scnprintf(buf, buf_len, "%s", ath10k_core_fw_feature_str[feat]); 615 } 616 617 void ath10k_core_get_fw_features_str(struct ath10k *ar, 618 char *buf, 619 size_t buf_len) 620 { 621 size_t len = 0; 622 int i; 623 624 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 625 if (test_bit(i, ar->normal_mode_fw.fw_file.fw_features)) { 626 if (len > 0) 627 len += scnprintf(buf + len, buf_len - len, ","); 628 629 len += ath10k_core_get_fw_feature_str(buf + len, 630 buf_len - len, 631 i); 632 } 633 } 634 } 635 636 static void ath10k_send_suspend_complete(struct ath10k *ar) 637 { 638 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n"); 639 640 complete(&ar->target_suspend); 641 } 642 643 static void ath10k_init_sdio(struct ath10k *ar) 644 { 645 u32 param = 0; 646 647 ath10k_bmi_write32(ar, hi_mbox_io_block_sz, 256); 648 ath10k_bmi_write32(ar, hi_mbox_isr_yield_limit, 99); 649 ath10k_bmi_read32(ar, hi_acs_flags, ¶m); 650 651 param |= (HI_ACS_FLAGS_SDIO_SWAP_MAILBOX_SET | 652 HI_ACS_FLAGS_SDIO_REDUCE_TX_COMPL_SET | 653 HI_ACS_FLAGS_ALT_DATA_CREDIT_SIZE); 654 655 ath10k_bmi_write32(ar, hi_acs_flags, param); 656 } 657 658 static int ath10k_init_configure_target(struct ath10k *ar) 659 { 660 u32 param_host; 661 int ret; 662 663 /* tell target which HTC version it is used*/ 664 ret = ath10k_bmi_write32(ar, hi_app_host_interest, 665 HTC_PROTOCOL_VERSION); 666 if (ret) { 667 ath10k_err(ar, "settings HTC version failed\n"); 668 return ret; 669 } 670 671 /* set the firmware mode to STA/IBSS/AP */ 672 ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host); 673 if (ret) { 674 ath10k_err(ar, "setting firmware mode (1/2) failed\n"); 675 return ret; 676 } 677 678 /* TODO following parameters need to be re-visited. */ 679 /* num_device */ 680 param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT); 681 /* Firmware mode */ 682 /* FIXME: Why FW_MODE_AP ??.*/ 683 param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT); 684 /* mac_addr_method */ 685 param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT); 686 /* firmware_bridge */ 687 param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT); 688 /* fwsubmode */ 689 param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT); 690 691 ret = ath10k_bmi_write32(ar, hi_option_flag, param_host); 692 if (ret) { 693 ath10k_err(ar, "setting firmware mode (2/2) failed\n"); 694 return ret; 695 } 696 697 /* We do all byte-swapping on the host */ 698 ret = ath10k_bmi_write32(ar, hi_be, 0); 699 if (ret) { 700 ath10k_err(ar, "setting host CPU BE mode failed\n"); 701 return ret; 702 } 703 704 /* FW descriptor/Data swap flags */ 705 ret = ath10k_bmi_write32(ar, hi_fw_swap, 0); 706 707 if (ret) { 708 ath10k_err(ar, "setting FW data/desc swap flags failed\n"); 709 return ret; 710 } 711 712 /* Some devices have a special sanity check that verifies the PCI 713 * Device ID is written to this host interest var. It is known to be 714 * required to boot QCA6164. 715 */ 716 ret = ath10k_bmi_write32(ar, hi_hci_uart_pwr_mgmt_params_ext, 717 ar->dev_id); 718 if (ret) { 719 ath10k_err(ar, "failed to set pwr_mgmt_params: %d\n", ret); 720 return ret; 721 } 722 723 return 0; 724 } 725 726 static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar, 727 const char *dir, 728 const char *file) 729 { 730 char filename[100]; 731 const struct firmware *fw; 732 int ret; 733 734 if (file == NULL) 735 return ERR_PTR(-ENOENT); 736 737 if (dir == NULL) 738 dir = "."; 739 740 snprintf(filename, sizeof(filename), "%s/%s", dir, file); 741 ret = firmware_request_nowarn(&fw, filename, ar->dev); 742 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot fw request '%s': %d\n", 743 filename, ret); 744 745 if (ret) 746 return ERR_PTR(ret); 747 748 return fw; 749 } 750 751 static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data, 752 size_t data_len) 753 { 754 u32 board_data_size = ar->hw_params.fw.board_size; 755 u32 board_ext_data_size = ar->hw_params.fw.board_ext_size; 756 u32 board_ext_data_addr; 757 int ret; 758 759 ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr); 760 if (ret) { 761 ath10k_err(ar, "could not read board ext data addr (%d)\n", 762 ret); 763 return ret; 764 } 765 766 ath10k_dbg(ar, ATH10K_DBG_BOOT, 767 "boot push board extended data addr 0x%x\n", 768 board_ext_data_addr); 769 770 if (board_ext_data_addr == 0) 771 return 0; 772 773 if (data_len != (board_data_size + board_ext_data_size)) { 774 ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n", 775 data_len, board_data_size, board_ext_data_size); 776 return -EINVAL; 777 } 778 779 ret = ath10k_bmi_write_memory(ar, board_ext_data_addr, 780 data + board_data_size, 781 board_ext_data_size); 782 if (ret) { 783 ath10k_err(ar, "could not write board ext data (%d)\n", ret); 784 return ret; 785 } 786 787 ret = ath10k_bmi_write32(ar, hi_board_ext_data_config, 788 (board_ext_data_size << 16) | 1); 789 if (ret) { 790 ath10k_err(ar, "could not write board ext data bit (%d)\n", 791 ret); 792 return ret; 793 } 794 795 return 0; 796 } 797 798 static int ath10k_core_get_board_id_from_otp(struct ath10k *ar) 799 { 800 u32 result, address; 801 u8 board_id, chip_id; 802 bool ext_bid_support; 803 int ret, bmi_board_id_param; 804 805 address = ar->hw_params.patch_load_addr; 806 807 if (!ar->normal_mode_fw.fw_file.otp_data || 808 !ar->normal_mode_fw.fw_file.otp_len) { 809 ath10k_warn(ar, 810 "failed to retrieve board id because of invalid otp\n"); 811 return -ENODATA; 812 } 813 814 ath10k_dbg(ar, ATH10K_DBG_BOOT, 815 "boot upload otp to 0x%x len %zd for board id\n", 816 address, ar->normal_mode_fw.fw_file.otp_len); 817 818 ret = ath10k_bmi_fast_download(ar, address, 819 ar->normal_mode_fw.fw_file.otp_data, 820 ar->normal_mode_fw.fw_file.otp_len); 821 if (ret) { 822 ath10k_err(ar, "could not write otp for board id check: %d\n", 823 ret); 824 return ret; 825 } 826 827 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 828 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 829 bmi_board_id_param = BMI_PARAM_GET_FLASH_BOARD_ID; 830 else 831 bmi_board_id_param = BMI_PARAM_GET_EEPROM_BOARD_ID; 832 833 ret = ath10k_bmi_execute(ar, address, bmi_board_id_param, &result); 834 if (ret) { 835 ath10k_err(ar, "could not execute otp for board id check: %d\n", 836 ret); 837 return ret; 838 } 839 840 board_id = MS(result, ATH10K_BMI_BOARD_ID_FROM_OTP); 841 chip_id = MS(result, ATH10K_BMI_CHIP_ID_FROM_OTP); 842 ext_bid_support = (result & ATH10K_BMI_EXT_BOARD_ID_SUPPORT); 843 844 ath10k_dbg(ar, ATH10K_DBG_BOOT, 845 "boot get otp board id result 0x%08x board_id %d chip_id %d ext_bid_support %d\n", 846 result, board_id, chip_id, ext_bid_support); 847 848 ar->id.ext_bid_supported = ext_bid_support; 849 850 if ((result & ATH10K_BMI_BOARD_ID_STATUS_MASK) != 0 || 851 (board_id == 0)) { 852 ath10k_dbg(ar, ATH10K_DBG_BOOT, 853 "board id does not exist in otp, ignore it\n"); 854 return -EOPNOTSUPP; 855 } 856 857 ar->id.bmi_ids_valid = true; 858 ar->id.bmi_board_id = board_id; 859 ar->id.bmi_chip_id = chip_id; 860 861 return 0; 862 } 863 864 static void ath10k_core_check_bdfext(const struct dmi_header *hdr, void *data) 865 { 866 struct ath10k *ar = data; 867 const char *bdf_ext; 868 const char *magic = ATH10K_SMBIOS_BDF_EXT_MAGIC; 869 u8 bdf_enabled; 870 int i; 871 872 if (hdr->type != ATH10K_SMBIOS_BDF_EXT_TYPE) 873 return; 874 875 if (hdr->length != ATH10K_SMBIOS_BDF_EXT_LENGTH) { 876 ath10k_dbg(ar, ATH10K_DBG_BOOT, 877 "wrong smbios bdf ext type length (%d).\n", 878 hdr->length); 879 return; 880 } 881 882 bdf_enabled = *((u8 *)hdr + ATH10K_SMBIOS_BDF_EXT_OFFSET); 883 if (!bdf_enabled) { 884 ath10k_dbg(ar, ATH10K_DBG_BOOT, "bdf variant name not found.\n"); 885 return; 886 } 887 888 /* Only one string exists (per spec) */ 889 bdf_ext = (char *)hdr + hdr->length; 890 891 if (memcmp(bdf_ext, magic, strlen(magic)) != 0) { 892 ath10k_dbg(ar, ATH10K_DBG_BOOT, 893 "bdf variant magic does not match.\n"); 894 return; 895 } 896 897 for (i = 0; i < strlen(bdf_ext); i++) { 898 if (!isascii(bdf_ext[i]) || !isprint(bdf_ext[i])) { 899 ath10k_dbg(ar, ATH10K_DBG_BOOT, 900 "bdf variant name contains non ascii chars.\n"); 901 return; 902 } 903 } 904 905 /* Copy extension name without magic suffix */ 906 if (strscpy(ar->id.bdf_ext, bdf_ext + strlen(magic), 907 sizeof(ar->id.bdf_ext)) < 0) { 908 ath10k_dbg(ar, ATH10K_DBG_BOOT, 909 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 910 bdf_ext); 911 return; 912 } 913 914 ath10k_dbg(ar, ATH10K_DBG_BOOT, 915 "found and validated bdf variant smbios_type 0x%x bdf %s\n", 916 ATH10K_SMBIOS_BDF_EXT_TYPE, bdf_ext); 917 } 918 919 static int ath10k_core_check_smbios(struct ath10k *ar) 920 { 921 ar->id.bdf_ext[0] = '\0'; 922 dmi_walk(ath10k_core_check_bdfext, ar); 923 924 if (ar->id.bdf_ext[0] == '\0') 925 return -ENODATA; 926 927 return 0; 928 } 929 930 static int ath10k_core_check_dt(struct ath10k *ar) 931 { 932 struct device_node *node; 933 const char *variant = NULL; 934 935 node = ar->dev->of_node; 936 if (!node) 937 return -ENOENT; 938 939 of_property_read_string(node, "qcom,ath10k-calibration-variant", 940 &variant); 941 if (!variant) 942 return -ENODATA; 943 944 if (strscpy(ar->id.bdf_ext, variant, sizeof(ar->id.bdf_ext)) < 0) 945 ath10k_dbg(ar, ATH10K_DBG_BOOT, 946 "bdf variant string is longer than the buffer can accommodate (variant: %s)\n", 947 variant); 948 949 return 0; 950 } 951 952 static int ath10k_download_fw(struct ath10k *ar) 953 { 954 u32 address, data_len; 955 const void *data; 956 int ret; 957 958 address = ar->hw_params.patch_load_addr; 959 960 data = ar->running_fw->fw_file.firmware_data; 961 data_len = ar->running_fw->fw_file.firmware_len; 962 963 ret = ath10k_swap_code_seg_configure(ar, &ar->running_fw->fw_file); 964 if (ret) { 965 ath10k_err(ar, "failed to configure fw code swap: %d\n", 966 ret); 967 return ret; 968 } 969 970 ath10k_dbg(ar, ATH10K_DBG_BOOT, 971 "boot uploading firmware image %pK len %d\n", 972 data, data_len); 973 974 /* Check if device supports to download firmware via 975 * diag copy engine. Downloading firmware via diag CE 976 * greatly reduces the time to download firmware. 977 */ 978 if (ar->hw_params.fw_diag_ce_download) { 979 ret = ath10k_hw_diag_fast_download(ar, address, 980 data, data_len); 981 if (ret == 0) 982 /* firmware upload via diag ce was successful */ 983 return 0; 984 985 ath10k_warn(ar, 986 "failed to upload firmware via diag ce, trying BMI: %d", 987 ret); 988 } 989 990 return ath10k_bmi_fast_download(ar, address, 991 data, data_len); 992 } 993 994 void ath10k_core_free_board_files(struct ath10k *ar) 995 { 996 if (!IS_ERR(ar->normal_mode_fw.board)) 997 release_firmware(ar->normal_mode_fw.board); 998 999 if (!IS_ERR(ar->normal_mode_fw.ext_board)) 1000 release_firmware(ar->normal_mode_fw.ext_board); 1001 1002 ar->normal_mode_fw.board = NULL; 1003 ar->normal_mode_fw.board_data = NULL; 1004 ar->normal_mode_fw.board_len = 0; 1005 ar->normal_mode_fw.ext_board = NULL; 1006 ar->normal_mode_fw.ext_board_data = NULL; 1007 ar->normal_mode_fw.ext_board_len = 0; 1008 } 1009 EXPORT_SYMBOL(ath10k_core_free_board_files); 1010 1011 static void ath10k_core_free_firmware_files(struct ath10k *ar) 1012 { 1013 if (!IS_ERR(ar->normal_mode_fw.fw_file.firmware)) 1014 release_firmware(ar->normal_mode_fw.fw_file.firmware); 1015 1016 if (!IS_ERR(ar->cal_file)) 1017 release_firmware(ar->cal_file); 1018 1019 if (!IS_ERR(ar->pre_cal_file)) 1020 release_firmware(ar->pre_cal_file); 1021 1022 ath10k_swap_code_seg_release(ar, &ar->normal_mode_fw.fw_file); 1023 1024 ar->normal_mode_fw.fw_file.otp_data = NULL; 1025 ar->normal_mode_fw.fw_file.otp_len = 0; 1026 1027 ar->normal_mode_fw.fw_file.firmware = NULL; 1028 ar->normal_mode_fw.fw_file.firmware_data = NULL; 1029 ar->normal_mode_fw.fw_file.firmware_len = 0; 1030 1031 ar->cal_file = NULL; 1032 ar->pre_cal_file = NULL; 1033 } 1034 1035 static int ath10k_fetch_cal_file(struct ath10k *ar) 1036 { 1037 char filename[100]; 1038 1039 /* pre-cal-<bus>-<id>.bin */ 1040 scnprintf(filename, sizeof(filename), "pre-cal-%s-%s.bin", 1041 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1042 1043 ar->pre_cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1044 if (!IS_ERR(ar->pre_cal_file)) 1045 goto success; 1046 1047 /* cal-<bus>-<id>.bin */ 1048 scnprintf(filename, sizeof(filename), "cal-%s-%s.bin", 1049 ath10k_bus_str(ar->hif.bus), dev_name(ar->dev)); 1050 1051 ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename); 1052 if (IS_ERR(ar->cal_file)) 1053 /* calibration file is optional, don't print any warnings */ 1054 return PTR_ERR(ar->cal_file); 1055 success: 1056 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n", 1057 ATH10K_FW_DIR, filename); 1058 1059 return 0; 1060 } 1061 1062 static int ath10k_core_fetch_board_data_api_1(struct ath10k *ar, int bd_ie_type) 1063 { 1064 const struct firmware *fw; 1065 1066 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1067 if (!ar->hw_params.fw.board) { 1068 ath10k_err(ar, "failed to find board file fw entry\n"); 1069 return -EINVAL; 1070 } 1071 1072 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1073 ar->hw_params.fw.dir, 1074 ar->hw_params.fw.board); 1075 if (IS_ERR(ar->normal_mode_fw.board)) 1076 return PTR_ERR(ar->normal_mode_fw.board); 1077 1078 ar->normal_mode_fw.board_data = ar->normal_mode_fw.board->data; 1079 ar->normal_mode_fw.board_len = ar->normal_mode_fw.board->size; 1080 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1081 if (!ar->hw_params.fw.eboard) { 1082 ath10k_err(ar, "failed to find eboard file fw entry\n"); 1083 return -EINVAL; 1084 } 1085 1086 fw = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1087 ar->hw_params.fw.eboard); 1088 ar->normal_mode_fw.ext_board = fw; 1089 if (IS_ERR(ar->normal_mode_fw.ext_board)) 1090 return PTR_ERR(ar->normal_mode_fw.ext_board); 1091 1092 ar->normal_mode_fw.ext_board_data = ar->normal_mode_fw.ext_board->data; 1093 ar->normal_mode_fw.ext_board_len = ar->normal_mode_fw.ext_board->size; 1094 } 1095 1096 return 0; 1097 } 1098 1099 static int ath10k_core_parse_bd_ie_board(struct ath10k *ar, 1100 const void *buf, size_t buf_len, 1101 const char *boardname, 1102 int bd_ie_type) 1103 { 1104 const struct ath10k_fw_ie *hdr; 1105 bool name_match_found; 1106 int ret, board_ie_id; 1107 size_t board_ie_len; 1108 const void *board_ie_data; 1109 1110 name_match_found = false; 1111 1112 /* go through ATH10K_BD_IE_BOARD_ elements */ 1113 while (buf_len > sizeof(struct ath10k_fw_ie)) { 1114 hdr = buf; 1115 board_ie_id = le32_to_cpu(hdr->id); 1116 board_ie_len = le32_to_cpu(hdr->len); 1117 board_ie_data = hdr->data; 1118 1119 buf_len -= sizeof(*hdr); 1120 buf += sizeof(*hdr); 1121 1122 if (buf_len < ALIGN(board_ie_len, 4)) { 1123 ath10k_err(ar, "invalid ATH10K_BD_IE_BOARD length: %zu < %zu\n", 1124 buf_len, ALIGN(board_ie_len, 4)); 1125 ret = -EINVAL; 1126 goto out; 1127 } 1128 1129 switch (board_ie_id) { 1130 case ATH10K_BD_IE_BOARD_NAME: 1131 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "board name", "", 1132 board_ie_data, board_ie_len); 1133 1134 if (board_ie_len != strlen(boardname)) 1135 break; 1136 1137 ret = memcmp(board_ie_data, boardname, strlen(boardname)); 1138 if (ret) 1139 break; 1140 1141 name_match_found = true; 1142 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1143 "boot found match for name '%s'", 1144 boardname); 1145 break; 1146 case ATH10K_BD_IE_BOARD_DATA: 1147 if (!name_match_found) 1148 /* no match found */ 1149 break; 1150 1151 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1152 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1153 "boot found board data for '%s'", 1154 boardname); 1155 1156 ar->normal_mode_fw.board_data = board_ie_data; 1157 ar->normal_mode_fw.board_len = board_ie_len; 1158 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1159 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1160 "boot found eboard data for '%s'", 1161 boardname); 1162 1163 ar->normal_mode_fw.ext_board_data = board_ie_data; 1164 ar->normal_mode_fw.ext_board_len = board_ie_len; 1165 } 1166 1167 ret = 0; 1168 goto out; 1169 default: 1170 ath10k_warn(ar, "unknown ATH10K_BD_IE_BOARD found: %d\n", 1171 board_ie_id); 1172 break; 1173 } 1174 1175 /* jump over the padding */ 1176 board_ie_len = ALIGN(board_ie_len, 4); 1177 1178 buf_len -= board_ie_len; 1179 buf += board_ie_len; 1180 } 1181 1182 /* no match found */ 1183 ret = -ENOENT; 1184 1185 out: 1186 return ret; 1187 } 1188 1189 static int ath10k_core_search_bd(struct ath10k *ar, 1190 const char *boardname, 1191 const u8 *data, 1192 size_t len) 1193 { 1194 size_t ie_len; 1195 struct ath10k_fw_ie *hdr; 1196 int ret = -ENOENT, ie_id; 1197 1198 while (len > sizeof(struct ath10k_fw_ie)) { 1199 hdr = (struct ath10k_fw_ie *)data; 1200 ie_id = le32_to_cpu(hdr->id); 1201 ie_len = le32_to_cpu(hdr->len); 1202 1203 len -= sizeof(*hdr); 1204 data = hdr->data; 1205 1206 if (len < ALIGN(ie_len, 4)) { 1207 ath10k_err(ar, "invalid length for board ie_id %d ie_len %zu len %zu\n", 1208 ie_id, ie_len, len); 1209 return -EINVAL; 1210 } 1211 1212 switch (ie_id) { 1213 case ATH10K_BD_IE_BOARD: 1214 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1215 boardname, 1216 ATH10K_BD_IE_BOARD); 1217 if (ret == -ENOENT) 1218 /* no match found, continue */ 1219 break; 1220 1221 /* either found or error, so stop searching */ 1222 goto out; 1223 case ATH10K_BD_IE_BOARD_EXT: 1224 ret = ath10k_core_parse_bd_ie_board(ar, data, ie_len, 1225 boardname, 1226 ATH10K_BD_IE_BOARD_EXT); 1227 if (ret == -ENOENT) 1228 /* no match found, continue */ 1229 break; 1230 1231 /* either found or error, so stop searching */ 1232 goto out; 1233 } 1234 1235 /* jump over the padding */ 1236 ie_len = ALIGN(ie_len, 4); 1237 1238 len -= ie_len; 1239 data += ie_len; 1240 } 1241 1242 out: 1243 /* return result of parse_bd_ie_board() or -ENOENT */ 1244 return ret; 1245 } 1246 1247 static int ath10k_core_fetch_board_data_api_n(struct ath10k *ar, 1248 const char *boardname, 1249 const char *fallback_boardname, 1250 const char *filename) 1251 { 1252 size_t len, magic_len; 1253 const u8 *data; 1254 int ret; 1255 1256 /* Skip if already fetched during board data download */ 1257 if (!ar->normal_mode_fw.board) 1258 ar->normal_mode_fw.board = ath10k_fetch_fw_file(ar, 1259 ar->hw_params.fw.dir, 1260 filename); 1261 if (IS_ERR(ar->normal_mode_fw.board)) 1262 return PTR_ERR(ar->normal_mode_fw.board); 1263 1264 data = ar->normal_mode_fw.board->data; 1265 len = ar->normal_mode_fw.board->size; 1266 1267 /* magic has extra null byte padded */ 1268 magic_len = strlen(ATH10K_BOARD_MAGIC) + 1; 1269 if (len < magic_len) { 1270 ath10k_err(ar, "failed to find magic value in %s/%s, file too short: %zu\n", 1271 ar->hw_params.fw.dir, filename, len); 1272 ret = -EINVAL; 1273 goto err; 1274 } 1275 1276 if (memcmp(data, ATH10K_BOARD_MAGIC, magic_len)) { 1277 ath10k_err(ar, "found invalid board magic\n"); 1278 ret = -EINVAL; 1279 goto err; 1280 } 1281 1282 /* magic is padded to 4 bytes */ 1283 magic_len = ALIGN(magic_len, 4); 1284 if (len < magic_len) { 1285 ath10k_err(ar, "failed: %s/%s too small to contain board data, len: %zu\n", 1286 ar->hw_params.fw.dir, filename, len); 1287 ret = -EINVAL; 1288 goto err; 1289 } 1290 1291 data += magic_len; 1292 len -= magic_len; 1293 1294 /* attempt to find boardname in the IE list */ 1295 ret = ath10k_core_search_bd(ar, boardname, data, len); 1296 1297 /* if we didn't find it and have a fallback name, try that */ 1298 if (ret == -ENOENT && fallback_boardname) 1299 ret = ath10k_core_search_bd(ar, fallback_boardname, data, len); 1300 1301 if (ret == -ENOENT) { 1302 ath10k_err(ar, 1303 "failed to fetch board data for %s from %s/%s\n", 1304 boardname, ar->hw_params.fw.dir, filename); 1305 ret = -ENODATA; 1306 } 1307 1308 if (ret) 1309 goto err; 1310 1311 return 0; 1312 1313 err: 1314 ath10k_core_free_board_files(ar); 1315 return ret; 1316 } 1317 1318 static int ath10k_core_create_board_name(struct ath10k *ar, char *name, 1319 size_t name_len, bool with_variant) 1320 { 1321 /* strlen(',variant=') + strlen(ar->id.bdf_ext) */ 1322 char variant[9 + ATH10K_SMBIOS_BDF_EXT_STR_LENGTH] = { 0 }; 1323 1324 if (with_variant && ar->id.bdf_ext[0] != '\0') 1325 scnprintf(variant, sizeof(variant), ",variant=%s", 1326 ar->id.bdf_ext); 1327 1328 if (ar->id.bmi_ids_valid) { 1329 scnprintf(name, name_len, 1330 "bus=%s,bmi-chip-id=%d,bmi-board-id=%d%s", 1331 ath10k_bus_str(ar->hif.bus), 1332 ar->id.bmi_chip_id, 1333 ar->id.bmi_board_id, variant); 1334 goto out; 1335 } 1336 1337 if (ar->id.qmi_ids_valid) { 1338 scnprintf(name, name_len, 1339 "bus=%s,qmi-board-id=%x", 1340 ath10k_bus_str(ar->hif.bus), 1341 ar->id.qmi_board_id); 1342 goto out; 1343 } 1344 1345 scnprintf(name, name_len, 1346 "bus=%s,vendor=%04x,device=%04x,subsystem-vendor=%04x,subsystem-device=%04x%s", 1347 ath10k_bus_str(ar->hif.bus), 1348 ar->id.vendor, ar->id.device, 1349 ar->id.subsystem_vendor, ar->id.subsystem_device, variant); 1350 out: 1351 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using board name '%s'\n", name); 1352 1353 return 0; 1354 } 1355 1356 static int ath10k_core_create_eboard_name(struct ath10k *ar, char *name, 1357 size_t name_len) 1358 { 1359 if (ar->id.bmi_ids_valid) { 1360 scnprintf(name, name_len, 1361 "bus=%s,bmi-chip-id=%d,bmi-eboard-id=%d", 1362 ath10k_bus_str(ar->hif.bus), 1363 ar->id.bmi_chip_id, 1364 ar->id.bmi_eboard_id); 1365 1366 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using eboard name '%s'\n", name); 1367 return 0; 1368 } 1369 /* Fallback if returned board id is zero */ 1370 return -1; 1371 } 1372 1373 int ath10k_core_fetch_board_file(struct ath10k *ar, int bd_ie_type) 1374 { 1375 char boardname[100], fallback_boardname[100]; 1376 int ret; 1377 1378 if (bd_ie_type == ATH10K_BD_IE_BOARD) { 1379 ret = ath10k_core_create_board_name(ar, boardname, 1380 sizeof(boardname), true); 1381 if (ret) { 1382 ath10k_err(ar, "failed to create board name: %d", ret); 1383 return ret; 1384 } 1385 1386 ret = ath10k_core_create_board_name(ar, fallback_boardname, 1387 sizeof(boardname), false); 1388 if (ret) { 1389 ath10k_err(ar, "failed to create fallback board name: %d", ret); 1390 return ret; 1391 } 1392 } else if (bd_ie_type == ATH10K_BD_IE_BOARD_EXT) { 1393 ret = ath10k_core_create_eboard_name(ar, boardname, 1394 sizeof(boardname)); 1395 if (ret) { 1396 ath10k_err(ar, "fallback to eboard.bin since board id 0"); 1397 goto fallback; 1398 } 1399 } 1400 1401 ar->bd_api = 2; 1402 ret = ath10k_core_fetch_board_data_api_n(ar, boardname, 1403 fallback_boardname, 1404 ATH10K_BOARD_API2_FILE); 1405 if (!ret) 1406 goto success; 1407 1408 fallback: 1409 ar->bd_api = 1; 1410 ret = ath10k_core_fetch_board_data_api_1(ar, bd_ie_type); 1411 if (ret) { 1412 ath10k_err(ar, "failed to fetch board-2.bin or board.bin from %s\n", 1413 ar->hw_params.fw.dir); 1414 return ret; 1415 } 1416 1417 success: 1418 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using board api %d\n", ar->bd_api); 1419 return 0; 1420 } 1421 EXPORT_SYMBOL(ath10k_core_fetch_board_file); 1422 1423 static int ath10k_core_get_ext_board_id_from_otp(struct ath10k *ar) 1424 { 1425 u32 result, address; 1426 u8 ext_board_id; 1427 int ret; 1428 1429 address = ar->hw_params.patch_load_addr; 1430 1431 if (!ar->normal_mode_fw.fw_file.otp_data || 1432 !ar->normal_mode_fw.fw_file.otp_len) { 1433 ath10k_warn(ar, 1434 "failed to retrieve extended board id due to otp binary missing\n"); 1435 return -ENODATA; 1436 } 1437 1438 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1439 "boot upload otp to 0x%x len %zd for ext board id\n", 1440 address, ar->normal_mode_fw.fw_file.otp_len); 1441 1442 ret = ath10k_bmi_fast_download(ar, address, 1443 ar->normal_mode_fw.fw_file.otp_data, 1444 ar->normal_mode_fw.fw_file.otp_len); 1445 if (ret) { 1446 ath10k_err(ar, "could not write otp for ext board id check: %d\n", 1447 ret); 1448 return ret; 1449 } 1450 1451 ret = ath10k_bmi_execute(ar, address, BMI_PARAM_GET_EXT_BOARD_ID, &result); 1452 if (ret) { 1453 ath10k_err(ar, "could not execute otp for ext board id check: %d\n", 1454 ret); 1455 return ret; 1456 } 1457 1458 if (!result) { 1459 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1460 "ext board id does not exist in otp, ignore it\n"); 1461 return -EOPNOTSUPP; 1462 } 1463 1464 ext_board_id = result & ATH10K_BMI_EBOARD_ID_STATUS_MASK; 1465 1466 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1467 "boot get otp ext board id result 0x%08x ext_board_id %d\n", 1468 result, ext_board_id); 1469 1470 ar->id.bmi_eboard_id = ext_board_id; 1471 1472 return 0; 1473 } 1474 1475 static int ath10k_download_board_data(struct ath10k *ar, const void *data, 1476 size_t data_len) 1477 { 1478 u32 board_data_size = ar->hw_params.fw.board_size; 1479 u32 eboard_data_size = ar->hw_params.fw.ext_board_size; 1480 u32 board_address; 1481 u32 ext_board_address; 1482 int ret; 1483 1484 ret = ath10k_push_board_ext_data(ar, data, data_len); 1485 if (ret) { 1486 ath10k_err(ar, "could not push board ext data (%d)\n", ret); 1487 goto exit; 1488 } 1489 1490 ret = ath10k_bmi_read32(ar, hi_board_data, &board_address); 1491 if (ret) { 1492 ath10k_err(ar, "could not read board data addr (%d)\n", ret); 1493 goto exit; 1494 } 1495 1496 ret = ath10k_bmi_write_memory(ar, board_address, data, 1497 min_t(u32, board_data_size, 1498 data_len)); 1499 if (ret) { 1500 ath10k_err(ar, "could not write board data (%d)\n", ret); 1501 goto exit; 1502 } 1503 1504 ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1); 1505 if (ret) { 1506 ath10k_err(ar, "could not write board data bit (%d)\n", ret); 1507 goto exit; 1508 } 1509 1510 if (!ar->id.ext_bid_supported) 1511 goto exit; 1512 1513 /* Extended board data download */ 1514 ret = ath10k_core_get_ext_board_id_from_otp(ar); 1515 if (ret == -EOPNOTSUPP) { 1516 /* Not fetching ext_board_data if ext board id is 0 */ 1517 ath10k_dbg(ar, ATH10K_DBG_BOOT, "otp returned ext board id 0\n"); 1518 return 0; 1519 } else if (ret) { 1520 ath10k_err(ar, "failed to get extended board id: %d\n", ret); 1521 goto exit; 1522 } 1523 1524 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD_EXT); 1525 if (ret) 1526 goto exit; 1527 1528 if (ar->normal_mode_fw.ext_board_data) { 1529 ext_board_address = board_address + EXT_BOARD_ADDRESS_OFFSET; 1530 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1531 "boot writing ext board data to addr 0x%x", 1532 ext_board_address); 1533 ret = ath10k_bmi_write_memory(ar, ext_board_address, 1534 ar->normal_mode_fw.ext_board_data, 1535 min_t(u32, eboard_data_size, data_len)); 1536 if (ret) 1537 ath10k_err(ar, "failed to write ext board data: %d\n", ret); 1538 } 1539 1540 exit: 1541 return ret; 1542 } 1543 1544 static int ath10k_download_and_run_otp(struct ath10k *ar) 1545 { 1546 u32 result, address = ar->hw_params.patch_load_addr; 1547 u32 bmi_otp_exe_param = ar->hw_params.otp_exe_param; 1548 int ret; 1549 1550 ret = ath10k_download_board_data(ar, 1551 ar->running_fw->board_data, 1552 ar->running_fw->board_len); 1553 if (ret) { 1554 ath10k_err(ar, "failed to download board data: %d\n", ret); 1555 return ret; 1556 } 1557 1558 /* OTP is optional */ 1559 1560 if (!ar->running_fw->fw_file.otp_data || 1561 !ar->running_fw->fw_file.otp_len) { 1562 ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %pK otp_len %zd)!\n", 1563 ar->running_fw->fw_file.otp_data, 1564 ar->running_fw->fw_file.otp_len); 1565 return 0; 1566 } 1567 1568 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n", 1569 address, ar->running_fw->fw_file.otp_len); 1570 1571 ret = ath10k_bmi_fast_download(ar, address, 1572 ar->running_fw->fw_file.otp_data, 1573 ar->running_fw->fw_file.otp_len); 1574 if (ret) { 1575 ath10k_err(ar, "could not write otp (%d)\n", ret); 1576 return ret; 1577 } 1578 1579 /* As of now pre-cal is valid for 10_4 variants */ 1580 if (ar->cal_mode == ATH10K_PRE_CAL_MODE_DT || 1581 ar->cal_mode == ATH10K_PRE_CAL_MODE_FILE) 1582 bmi_otp_exe_param = BMI_PARAM_FLASH_SECTION_ALL; 1583 1584 ret = ath10k_bmi_execute(ar, address, bmi_otp_exe_param, &result); 1585 if (ret) { 1586 ath10k_err(ar, "could not execute otp (%d)\n", ret); 1587 return ret; 1588 } 1589 1590 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result); 1591 1592 if (!(skip_otp || test_bit(ATH10K_FW_FEATURE_IGNORE_OTP_RESULT, 1593 ar->running_fw->fw_file.fw_features)) && 1594 result != 0) { 1595 ath10k_err(ar, "otp calibration failed: %d", result); 1596 return -EINVAL; 1597 } 1598 1599 return 0; 1600 } 1601 1602 static int ath10k_download_cal_file(struct ath10k *ar, 1603 const struct firmware *file) 1604 { 1605 int ret; 1606 1607 if (!file) 1608 return -ENOENT; 1609 1610 if (IS_ERR(file)) 1611 return PTR_ERR(file); 1612 1613 ret = ath10k_download_board_data(ar, file->data, file->size); 1614 if (ret) { 1615 ath10k_err(ar, "failed to download cal_file data: %d\n", ret); 1616 return ret; 1617 } 1618 1619 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n"); 1620 1621 return 0; 1622 } 1623 1624 static int ath10k_download_cal_dt(struct ath10k *ar, const char *dt_name) 1625 { 1626 struct device_node *node; 1627 int data_len; 1628 void *data; 1629 int ret; 1630 1631 node = ar->dev->of_node; 1632 if (!node) 1633 /* Device Tree is optional, don't print any warnings if 1634 * there's no node for ath10k. 1635 */ 1636 return -ENOENT; 1637 1638 if (!of_get_property(node, dt_name, &data_len)) { 1639 /* The calibration data node is optional */ 1640 return -ENOENT; 1641 } 1642 1643 if (data_len != ar->hw_params.cal_data_len) { 1644 ath10k_warn(ar, "invalid calibration data length in DT: %d\n", 1645 data_len); 1646 ret = -EMSGSIZE; 1647 goto out; 1648 } 1649 1650 data = kmalloc(data_len, GFP_KERNEL); 1651 if (!data) { 1652 ret = -ENOMEM; 1653 goto out; 1654 } 1655 1656 ret = of_property_read_u8_array(node, dt_name, data, data_len); 1657 if (ret) { 1658 ath10k_warn(ar, "failed to read calibration data from DT: %d\n", 1659 ret); 1660 goto out_free; 1661 } 1662 1663 ret = ath10k_download_board_data(ar, data, data_len); 1664 if (ret) { 1665 ath10k_warn(ar, "failed to download calibration data from Device Tree: %d\n", 1666 ret); 1667 goto out_free; 1668 } 1669 1670 ret = 0; 1671 1672 out_free: 1673 kfree(data); 1674 1675 out: 1676 return ret; 1677 } 1678 1679 static int ath10k_download_cal_eeprom(struct ath10k *ar) 1680 { 1681 size_t data_len; 1682 void *data = NULL; 1683 int ret; 1684 1685 ret = ath10k_hif_fetch_cal_eeprom(ar, &data, &data_len); 1686 if (ret) { 1687 if (ret != -EOPNOTSUPP) 1688 ath10k_warn(ar, "failed to read calibration data from EEPROM: %d\n", 1689 ret); 1690 goto out_free; 1691 } 1692 1693 ret = ath10k_download_board_data(ar, data, data_len); 1694 if (ret) { 1695 ath10k_warn(ar, "failed to download calibration data from EEPROM: %d\n", 1696 ret); 1697 goto out_free; 1698 } 1699 1700 ret = 0; 1701 1702 out_free: 1703 kfree(data); 1704 1705 return ret; 1706 } 1707 1708 int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name, 1709 struct ath10k_fw_file *fw_file) 1710 { 1711 size_t magic_len, len, ie_len; 1712 int ie_id, i, index, bit, ret; 1713 struct ath10k_fw_ie *hdr; 1714 const u8 *data; 1715 __le32 *timestamp, *version; 1716 1717 /* first fetch the firmware file (firmware-*.bin) */ 1718 fw_file->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, 1719 name); 1720 if (IS_ERR(fw_file->firmware)) 1721 return PTR_ERR(fw_file->firmware); 1722 1723 data = fw_file->firmware->data; 1724 len = fw_file->firmware->size; 1725 1726 /* magic also includes the null byte, check that as well */ 1727 magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1; 1728 1729 if (len < magic_len) { 1730 ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n", 1731 ar->hw_params.fw.dir, name, len); 1732 ret = -EINVAL; 1733 goto err; 1734 } 1735 1736 if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) { 1737 ath10k_err(ar, "invalid firmware magic\n"); 1738 ret = -EINVAL; 1739 goto err; 1740 } 1741 1742 /* jump over the padding */ 1743 magic_len = ALIGN(magic_len, 4); 1744 1745 len -= magic_len; 1746 data += magic_len; 1747 1748 /* loop elements */ 1749 while (len > sizeof(struct ath10k_fw_ie)) { 1750 hdr = (struct ath10k_fw_ie *)data; 1751 1752 ie_id = le32_to_cpu(hdr->id); 1753 ie_len = le32_to_cpu(hdr->len); 1754 1755 len -= sizeof(*hdr); 1756 data += sizeof(*hdr); 1757 1758 if (len < ie_len) { 1759 ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n", 1760 ie_id, len, ie_len); 1761 ret = -EINVAL; 1762 goto err; 1763 } 1764 1765 switch (ie_id) { 1766 case ATH10K_FW_IE_FW_VERSION: 1767 if (ie_len > sizeof(fw_file->fw_version) - 1) 1768 break; 1769 1770 memcpy(fw_file->fw_version, data, ie_len); 1771 fw_file->fw_version[ie_len] = '\0'; 1772 1773 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1774 "found fw version %s\n", 1775 fw_file->fw_version); 1776 break; 1777 case ATH10K_FW_IE_TIMESTAMP: 1778 if (ie_len != sizeof(u32)) 1779 break; 1780 1781 timestamp = (__le32 *)data; 1782 1783 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n", 1784 le32_to_cpup(timestamp)); 1785 break; 1786 case ATH10K_FW_IE_FEATURES: 1787 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1788 "found firmware features ie (%zd B)\n", 1789 ie_len); 1790 1791 for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) { 1792 index = i / 8; 1793 bit = i % 8; 1794 1795 if (index == ie_len) 1796 break; 1797 1798 if (data[index] & (1 << bit)) { 1799 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1800 "Enabling feature bit: %i\n", 1801 i); 1802 __set_bit(i, fw_file->fw_features); 1803 } 1804 } 1805 1806 ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "", 1807 fw_file->fw_features, 1808 sizeof(fw_file->fw_features)); 1809 break; 1810 case ATH10K_FW_IE_FW_IMAGE: 1811 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1812 "found fw image ie (%zd B)\n", 1813 ie_len); 1814 1815 fw_file->firmware_data = data; 1816 fw_file->firmware_len = ie_len; 1817 1818 break; 1819 case ATH10K_FW_IE_OTP_IMAGE: 1820 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1821 "found otp image ie (%zd B)\n", 1822 ie_len); 1823 1824 fw_file->otp_data = data; 1825 fw_file->otp_len = ie_len; 1826 1827 break; 1828 case ATH10K_FW_IE_WMI_OP_VERSION: 1829 if (ie_len != sizeof(u32)) 1830 break; 1831 1832 version = (__le32 *)data; 1833 1834 fw_file->wmi_op_version = le32_to_cpup(version); 1835 1836 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie wmi op version %d\n", 1837 fw_file->wmi_op_version); 1838 break; 1839 case ATH10K_FW_IE_HTT_OP_VERSION: 1840 if (ie_len != sizeof(u32)) 1841 break; 1842 1843 version = (__le32 *)data; 1844 1845 fw_file->htt_op_version = le32_to_cpup(version); 1846 1847 ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw ie htt op version %d\n", 1848 fw_file->htt_op_version); 1849 break; 1850 case ATH10K_FW_IE_FW_CODE_SWAP_IMAGE: 1851 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1852 "found fw code swap image ie (%zd B)\n", 1853 ie_len); 1854 fw_file->codeswap_data = data; 1855 fw_file->codeswap_len = ie_len; 1856 break; 1857 default: 1858 ath10k_warn(ar, "Unknown FW IE: %u\n", 1859 le32_to_cpu(hdr->id)); 1860 break; 1861 } 1862 1863 /* jump over the padding */ 1864 ie_len = ALIGN(ie_len, 4); 1865 1866 len -= ie_len; 1867 data += ie_len; 1868 } 1869 1870 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, fw_file->fw_features) && 1871 (!fw_file->firmware_data || !fw_file->firmware_len)) { 1872 ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n", 1873 ar->hw_params.fw.dir, name); 1874 ret = -ENOMEDIUM; 1875 goto err; 1876 } 1877 1878 return 0; 1879 1880 err: 1881 ath10k_core_free_firmware_files(ar); 1882 return ret; 1883 } 1884 1885 static void ath10k_core_get_fw_name(struct ath10k *ar, char *fw_name, 1886 size_t fw_name_len, int fw_api) 1887 { 1888 switch (ar->hif.bus) { 1889 case ATH10K_BUS_SDIO: 1890 case ATH10K_BUS_USB: 1891 scnprintf(fw_name, fw_name_len, "%s-%s-%d.bin", 1892 ATH10K_FW_FILE_BASE, ath10k_bus_str(ar->hif.bus), 1893 fw_api); 1894 break; 1895 case ATH10K_BUS_PCI: 1896 case ATH10K_BUS_AHB: 1897 case ATH10K_BUS_SNOC: 1898 scnprintf(fw_name, fw_name_len, "%s-%d.bin", 1899 ATH10K_FW_FILE_BASE, fw_api); 1900 break; 1901 } 1902 } 1903 1904 static int ath10k_core_fetch_firmware_files(struct ath10k *ar) 1905 { 1906 int ret, i; 1907 char fw_name[100]; 1908 1909 /* calibration file is optional, don't check for any errors */ 1910 ath10k_fetch_cal_file(ar); 1911 1912 for (i = ATH10K_FW_API_MAX; i >= ATH10K_FW_API_MIN; i--) { 1913 ar->fw_api = i; 1914 ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", 1915 ar->fw_api); 1916 1917 ath10k_core_get_fw_name(ar, fw_name, sizeof(fw_name), ar->fw_api); 1918 ret = ath10k_core_fetch_firmware_api_n(ar, fw_name, 1919 &ar->normal_mode_fw.fw_file); 1920 if (!ret) 1921 goto success; 1922 } 1923 1924 /* we end up here if we couldn't fetch any firmware */ 1925 1926 ath10k_err(ar, "Failed to find firmware-N.bin (N between %d and %d) from %s: %d", 1927 ATH10K_FW_API_MIN, ATH10K_FW_API_MAX, ar->hw_params.fw.dir, 1928 ret); 1929 1930 return ret; 1931 1932 success: 1933 ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api); 1934 1935 return 0; 1936 } 1937 1938 static int ath10k_core_pre_cal_download(struct ath10k *ar) 1939 { 1940 int ret; 1941 1942 ret = ath10k_download_cal_file(ar, ar->pre_cal_file); 1943 if (ret == 0) { 1944 ar->cal_mode = ATH10K_PRE_CAL_MODE_FILE; 1945 goto success; 1946 } 1947 1948 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1949 "boot did not find a pre calibration file, try DT next: %d\n", 1950 ret); 1951 1952 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-pre-calibration-data"); 1953 if (ret) { 1954 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1955 "unable to load pre cal data from DT: %d\n", ret); 1956 return ret; 1957 } 1958 ar->cal_mode = ATH10K_PRE_CAL_MODE_DT; 1959 1960 success: 1961 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 1962 ath10k_cal_mode_str(ar->cal_mode)); 1963 1964 return 0; 1965 } 1966 1967 static int ath10k_core_pre_cal_config(struct ath10k *ar) 1968 { 1969 int ret; 1970 1971 ret = ath10k_core_pre_cal_download(ar); 1972 if (ret) { 1973 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1974 "failed to load pre cal data: %d\n", ret); 1975 return ret; 1976 } 1977 1978 ret = ath10k_core_get_board_id_from_otp(ar); 1979 if (ret) { 1980 ath10k_err(ar, "failed to get board id: %d\n", ret); 1981 return ret; 1982 } 1983 1984 ret = ath10k_download_and_run_otp(ar); 1985 if (ret) { 1986 ath10k_err(ar, "failed to run otp: %d\n", ret); 1987 return ret; 1988 } 1989 1990 ath10k_dbg(ar, ATH10K_DBG_BOOT, 1991 "pre cal configuration done successfully\n"); 1992 1993 return 0; 1994 } 1995 1996 static int ath10k_download_cal_data(struct ath10k *ar) 1997 { 1998 int ret; 1999 2000 ret = ath10k_core_pre_cal_config(ar); 2001 if (ret == 0) 2002 return 0; 2003 2004 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2005 "pre cal download procedure failed, try cal file: %d\n", 2006 ret); 2007 2008 ret = ath10k_download_cal_file(ar, ar->cal_file); 2009 if (ret == 0) { 2010 ar->cal_mode = ATH10K_CAL_MODE_FILE; 2011 goto done; 2012 } 2013 2014 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2015 "boot did not find a calibration file, try DT next: %d\n", 2016 ret); 2017 2018 ret = ath10k_download_cal_dt(ar, "qcom,ath10k-calibration-data"); 2019 if (ret == 0) { 2020 ar->cal_mode = ATH10K_CAL_MODE_DT; 2021 goto done; 2022 } 2023 2024 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2025 "boot did not find DT entry, try target EEPROM next: %d\n", 2026 ret); 2027 2028 ret = ath10k_download_cal_eeprom(ar); 2029 if (ret == 0) { 2030 ar->cal_mode = ATH10K_CAL_MODE_EEPROM; 2031 goto done; 2032 } 2033 2034 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2035 "boot did not find target EEPROM entry, try OTP next: %d\n", 2036 ret); 2037 2038 ret = ath10k_download_and_run_otp(ar); 2039 if (ret) { 2040 ath10k_err(ar, "failed to run otp: %d\n", ret); 2041 return ret; 2042 } 2043 2044 ar->cal_mode = ATH10K_CAL_MODE_OTP; 2045 2046 done: 2047 ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", 2048 ath10k_cal_mode_str(ar->cal_mode)); 2049 return 0; 2050 } 2051 2052 static int ath10k_init_uart(struct ath10k *ar) 2053 { 2054 int ret; 2055 2056 /* 2057 * Explicitly setting UART prints to zero as target turns it on 2058 * based on scratch registers. 2059 */ 2060 ret = ath10k_bmi_write32(ar, hi_serial_enable, 0); 2061 if (ret) { 2062 ath10k_warn(ar, "could not disable UART prints (%d)\n", ret); 2063 return ret; 2064 } 2065 2066 if (!uart_print) 2067 return 0; 2068 2069 ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, ar->hw_params.uart_pin); 2070 if (ret) { 2071 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2072 return ret; 2073 } 2074 2075 ret = ath10k_bmi_write32(ar, hi_serial_enable, 1); 2076 if (ret) { 2077 ath10k_warn(ar, "could not enable UART prints (%d)\n", ret); 2078 return ret; 2079 } 2080 2081 /* Set the UART baud rate to 19200. */ 2082 ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200); 2083 if (ret) { 2084 ath10k_warn(ar, "could not set the baud rate (%d)\n", ret); 2085 return ret; 2086 } 2087 2088 ath10k_info(ar, "UART prints enabled\n"); 2089 return 0; 2090 } 2091 2092 static int ath10k_init_hw_params(struct ath10k *ar) 2093 { 2094 const struct ath10k_hw_params *uninitialized_var(hw_params); 2095 int i; 2096 2097 for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) { 2098 hw_params = &ath10k_hw_params_list[i]; 2099 2100 if (hw_params->bus == ar->hif.bus && 2101 hw_params->id == ar->target_version && 2102 hw_params->dev_id == ar->dev_id) 2103 break; 2104 } 2105 2106 if (i == ARRAY_SIZE(ath10k_hw_params_list)) { 2107 ath10k_err(ar, "Unsupported hardware version: 0x%x\n", 2108 ar->target_version); 2109 return -EINVAL; 2110 } 2111 2112 ar->hw_params = *hw_params; 2113 2114 ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n", 2115 ar->hw_params.name, ar->target_version); 2116 2117 return 0; 2118 } 2119 2120 static void ath10k_core_restart(struct work_struct *work) 2121 { 2122 struct ath10k *ar = container_of(work, struct ath10k, restart_work); 2123 int ret; 2124 2125 set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2126 2127 /* Place a barrier to make sure the compiler doesn't reorder 2128 * CRASH_FLUSH and calling other functions. 2129 */ 2130 barrier(); 2131 2132 ieee80211_stop_queues(ar->hw); 2133 ath10k_drain_tx(ar); 2134 complete(&ar->scan.started); 2135 complete(&ar->scan.completed); 2136 complete(&ar->scan.on_channel); 2137 complete(&ar->offchan_tx_completed); 2138 complete(&ar->install_key_done); 2139 complete(&ar->vdev_setup_done); 2140 complete(&ar->thermal.wmi_sync); 2141 complete(&ar->bss_survey_done); 2142 wake_up(&ar->htt.empty_tx_wq); 2143 wake_up(&ar->wmi.tx_credits_wq); 2144 wake_up(&ar->peer_mapping_wq); 2145 2146 /* TODO: We can have one instance of cancelling coverage_class_work by 2147 * moving it to ath10k_halt(), so that both stop() and restart() would 2148 * call that but it takes conf_mutex() and if we call cancel_work_sync() 2149 * with conf_mutex it will deadlock. 2150 */ 2151 cancel_work_sync(&ar->set_coverage_class_work); 2152 2153 mutex_lock(&ar->conf_mutex); 2154 2155 switch (ar->state) { 2156 case ATH10K_STATE_ON: 2157 ar->state = ATH10K_STATE_RESTARTING; 2158 ath10k_halt(ar); 2159 ath10k_scan_finish(ar); 2160 ieee80211_restart_hw(ar->hw); 2161 break; 2162 case ATH10K_STATE_OFF: 2163 /* this can happen if driver is being unloaded 2164 * or if the crash happens during FW probing 2165 */ 2166 ath10k_warn(ar, "cannot restart a device that hasn't been started\n"); 2167 break; 2168 case ATH10K_STATE_RESTARTING: 2169 /* hw restart might be requested from multiple places */ 2170 break; 2171 case ATH10K_STATE_RESTARTED: 2172 ar->state = ATH10K_STATE_WEDGED; 2173 /* fall through */ 2174 case ATH10K_STATE_WEDGED: 2175 ath10k_warn(ar, "device is wedged, will not restart\n"); 2176 break; 2177 case ATH10K_STATE_UTF: 2178 ath10k_warn(ar, "firmware restart in UTF mode not supported\n"); 2179 break; 2180 } 2181 2182 mutex_unlock(&ar->conf_mutex); 2183 2184 ret = ath10k_coredump_submit(ar); 2185 if (ret) 2186 ath10k_warn(ar, "failed to send firmware crash dump via devcoredump: %d", 2187 ret); 2188 2189 complete(&ar->driver_recovery); 2190 } 2191 2192 static void ath10k_core_set_coverage_class_work(struct work_struct *work) 2193 { 2194 struct ath10k *ar = container_of(work, struct ath10k, 2195 set_coverage_class_work); 2196 2197 if (ar->hw_params.hw_ops->set_coverage_class) 2198 ar->hw_params.hw_ops->set_coverage_class(ar, -1); 2199 } 2200 2201 static int ath10k_core_init_firmware_features(struct ath10k *ar) 2202 { 2203 struct ath10k_fw_file *fw_file = &ar->normal_mode_fw.fw_file; 2204 int max_num_peers; 2205 2206 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, fw_file->fw_features) && 2207 !test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2208 ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well"); 2209 return -EINVAL; 2210 } 2211 2212 if (fw_file->wmi_op_version >= ATH10K_FW_WMI_OP_VERSION_MAX) { 2213 ath10k_err(ar, "unsupported WMI OP version (max %d): %d\n", 2214 ATH10K_FW_WMI_OP_VERSION_MAX, fw_file->wmi_op_version); 2215 return -EINVAL; 2216 } 2217 2218 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_NATIVE_WIFI; 2219 switch (ath10k_cryptmode_param) { 2220 case ATH10K_CRYPT_MODE_HW: 2221 clear_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2222 clear_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2223 break; 2224 case ATH10K_CRYPT_MODE_SW: 2225 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2226 fw_file->fw_features)) { 2227 ath10k_err(ar, "cryptmode > 0 requires raw mode support from firmware"); 2228 return -EINVAL; 2229 } 2230 2231 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2232 set_bit(ATH10K_FLAG_HW_CRYPTO_DISABLED, &ar->dev_flags); 2233 break; 2234 default: 2235 ath10k_info(ar, "invalid cryptmode: %d\n", 2236 ath10k_cryptmode_param); 2237 return -EINVAL; 2238 } 2239 2240 ar->htt.max_num_amsdu = ATH10K_HTT_MAX_NUM_AMSDU_DEFAULT; 2241 ar->htt.max_num_ampdu = ATH10K_HTT_MAX_NUM_AMPDU_DEFAULT; 2242 2243 if (rawmode) { 2244 if (!test_bit(ATH10K_FW_FEATURE_RAW_MODE_SUPPORT, 2245 fw_file->fw_features)) { 2246 ath10k_err(ar, "rawmode = 1 requires support from firmware"); 2247 return -EINVAL; 2248 } 2249 set_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags); 2250 } 2251 2252 if (test_bit(ATH10K_FLAG_RAW_MODE, &ar->dev_flags)) { 2253 ar->wmi.rx_decap_mode = ATH10K_HW_TXRX_RAW; 2254 2255 /* Workaround: 2256 * 2257 * Firmware A-MSDU aggregation breaks with RAW Tx encap mode 2258 * and causes enormous performance issues (malformed frames, 2259 * etc). 2260 * 2261 * Disabling A-MSDU makes RAW mode stable with heavy traffic 2262 * albeit a bit slower compared to regular operation. 2263 */ 2264 ar->htt.max_num_amsdu = 1; 2265 } 2266 2267 /* Backwards compatibility for firmwares without 2268 * ATH10K_FW_IE_WMI_OP_VERSION. 2269 */ 2270 if (fw_file->wmi_op_version == ATH10K_FW_WMI_OP_VERSION_UNSET) { 2271 if (test_bit(ATH10K_FW_FEATURE_WMI_10X, fw_file->fw_features)) { 2272 if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, 2273 fw_file->fw_features)) 2274 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_2; 2275 else 2276 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_10_1; 2277 } else { 2278 fw_file->wmi_op_version = ATH10K_FW_WMI_OP_VERSION_MAIN; 2279 } 2280 } 2281 2282 switch (fw_file->wmi_op_version) { 2283 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2284 max_num_peers = TARGET_NUM_PEERS; 2285 ar->max_num_stations = TARGET_NUM_STATIONS; 2286 ar->max_num_vdevs = TARGET_NUM_VDEVS; 2287 ar->htt.max_num_pending_tx = TARGET_NUM_MSDU_DESC; 2288 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2289 WMI_STAT_PEER; 2290 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2291 break; 2292 case ATH10K_FW_WMI_OP_VERSION_10_1: 2293 case ATH10K_FW_WMI_OP_VERSION_10_2: 2294 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2295 if (ath10k_peer_stats_enabled(ar)) { 2296 max_num_peers = TARGET_10X_TX_STATS_NUM_PEERS; 2297 ar->max_num_stations = TARGET_10X_TX_STATS_NUM_STATIONS; 2298 } else { 2299 max_num_peers = TARGET_10X_NUM_PEERS; 2300 ar->max_num_stations = TARGET_10X_NUM_STATIONS; 2301 } 2302 ar->max_num_vdevs = TARGET_10X_NUM_VDEVS; 2303 ar->htt.max_num_pending_tx = TARGET_10X_NUM_MSDU_DESC; 2304 ar->fw_stats_req_mask = WMI_STAT_PEER; 2305 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2306 break; 2307 case ATH10K_FW_WMI_OP_VERSION_TLV: 2308 max_num_peers = TARGET_TLV_NUM_PEERS; 2309 ar->max_num_stations = TARGET_TLV_NUM_STATIONS; 2310 ar->max_num_vdevs = TARGET_TLV_NUM_VDEVS; 2311 ar->max_num_tdls_vdevs = TARGET_TLV_NUM_TDLS_VDEVS; 2312 ar->htt.max_num_pending_tx = TARGET_TLV_NUM_MSDU_DESC; 2313 ar->wow.max_num_patterns = TARGET_TLV_NUM_WOW_PATTERNS; 2314 ar->fw_stats_req_mask = WMI_STAT_PDEV | WMI_STAT_VDEV | 2315 WMI_STAT_PEER; 2316 ar->max_spatial_stream = WMI_MAX_SPATIAL_STREAM; 2317 ar->wmi.mgmt_max_num_pending_tx = TARGET_TLV_MGMT_NUM_MSDU_DESC; 2318 break; 2319 case ATH10K_FW_WMI_OP_VERSION_10_4: 2320 max_num_peers = TARGET_10_4_NUM_PEERS; 2321 ar->max_num_stations = TARGET_10_4_NUM_STATIONS; 2322 ar->num_active_peers = TARGET_10_4_ACTIVE_PEERS; 2323 ar->max_num_vdevs = TARGET_10_4_NUM_VDEVS; 2324 ar->num_tids = TARGET_10_4_TGT_NUM_TIDS; 2325 ar->fw_stats_req_mask = WMI_10_4_STAT_PEER | 2326 WMI_10_4_STAT_PEER_EXTD | 2327 WMI_10_4_STAT_VDEV_EXTD; 2328 ar->max_spatial_stream = ar->hw_params.max_spatial_stream; 2329 ar->max_num_tdls_vdevs = TARGET_10_4_NUM_TDLS_VDEVS; 2330 2331 if (test_bit(ATH10K_FW_FEATURE_PEER_FLOW_CONTROL, 2332 fw_file->fw_features)) 2333 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC_PFC; 2334 else 2335 ar->htt.max_num_pending_tx = TARGET_10_4_NUM_MSDU_DESC; 2336 break; 2337 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2338 case ATH10K_FW_WMI_OP_VERSION_MAX: 2339 default: 2340 WARN_ON(1); 2341 return -EINVAL; 2342 } 2343 2344 if (ar->hw_params.num_peers) 2345 ar->max_num_peers = ar->hw_params.num_peers; 2346 else 2347 ar->max_num_peers = max_num_peers; 2348 2349 /* Backwards compatibility for firmwares without 2350 * ATH10K_FW_IE_HTT_OP_VERSION. 2351 */ 2352 if (fw_file->htt_op_version == ATH10K_FW_HTT_OP_VERSION_UNSET) { 2353 switch (fw_file->wmi_op_version) { 2354 case ATH10K_FW_WMI_OP_VERSION_MAIN: 2355 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_MAIN; 2356 break; 2357 case ATH10K_FW_WMI_OP_VERSION_10_1: 2358 case ATH10K_FW_WMI_OP_VERSION_10_2: 2359 case ATH10K_FW_WMI_OP_VERSION_10_2_4: 2360 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_10_1; 2361 break; 2362 case ATH10K_FW_WMI_OP_VERSION_TLV: 2363 fw_file->htt_op_version = ATH10K_FW_HTT_OP_VERSION_TLV; 2364 break; 2365 case ATH10K_FW_WMI_OP_VERSION_10_4: 2366 case ATH10K_FW_WMI_OP_VERSION_UNSET: 2367 case ATH10K_FW_WMI_OP_VERSION_MAX: 2368 ath10k_err(ar, "htt op version not found from fw meta data"); 2369 return -EINVAL; 2370 } 2371 } 2372 2373 return 0; 2374 } 2375 2376 static int ath10k_core_reset_rx_filter(struct ath10k *ar) 2377 { 2378 int ret; 2379 int vdev_id; 2380 int vdev_type; 2381 int vdev_subtype; 2382 const u8 *vdev_addr; 2383 2384 vdev_id = 0; 2385 vdev_type = WMI_VDEV_TYPE_STA; 2386 vdev_subtype = ath10k_wmi_get_vdev_subtype(ar, WMI_VDEV_SUBTYPE_NONE); 2387 vdev_addr = ar->mac_addr; 2388 2389 ret = ath10k_wmi_vdev_create(ar, vdev_id, vdev_type, vdev_subtype, 2390 vdev_addr); 2391 if (ret) { 2392 ath10k_err(ar, "failed to create dummy vdev: %d\n", ret); 2393 return ret; 2394 } 2395 2396 ret = ath10k_wmi_vdev_delete(ar, vdev_id); 2397 if (ret) { 2398 ath10k_err(ar, "failed to delete dummy vdev: %d\n", ret); 2399 return ret; 2400 } 2401 2402 /* WMI and HTT may use separate HIF pipes and are not guaranteed to be 2403 * serialized properly implicitly. 2404 * 2405 * Moreover (most) WMI commands have no explicit acknowledges. It is 2406 * possible to infer it implicitly by poking firmware with echo 2407 * command - getting a reply means all preceding comments have been 2408 * (mostly) processed. 2409 * 2410 * In case of vdev create/delete this is sufficient. 2411 * 2412 * Without this it's possible to end up with a race when HTT Rx ring is 2413 * started before vdev create/delete hack is complete allowing a short 2414 * window of opportunity to receive (and Tx ACK) a bunch of frames. 2415 */ 2416 ret = ath10k_wmi_barrier(ar); 2417 if (ret) { 2418 ath10k_err(ar, "failed to ping firmware: %d\n", ret); 2419 return ret; 2420 } 2421 2422 return 0; 2423 } 2424 2425 int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode, 2426 const struct ath10k_fw_components *fw) 2427 { 2428 int status; 2429 u32 val; 2430 2431 lockdep_assert_held(&ar->conf_mutex); 2432 2433 clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags); 2434 2435 ar->running_fw = fw; 2436 2437 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2438 ar->running_fw->fw_file.fw_features)) { 2439 ath10k_bmi_start(ar); 2440 2441 if (ath10k_init_configure_target(ar)) { 2442 status = -EINVAL; 2443 goto err; 2444 } 2445 2446 status = ath10k_download_cal_data(ar); 2447 if (status) 2448 goto err; 2449 2450 /* Some of of qca988x solutions are having global reset issue 2451 * during target initialization. Bypassing PLL setting before 2452 * downloading firmware and letting the SoC run on REF_CLK is 2453 * fixing the problem. Corresponding firmware change is also 2454 * needed to set the clock source once the target is 2455 * initialized. 2456 */ 2457 if (test_bit(ATH10K_FW_FEATURE_SUPPORTS_SKIP_CLOCK_INIT, 2458 ar->running_fw->fw_file.fw_features)) { 2459 status = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); 2460 if (status) { 2461 ath10k_err(ar, "could not write to skip_clock_init: %d\n", 2462 status); 2463 goto err; 2464 } 2465 } 2466 2467 status = ath10k_download_fw(ar); 2468 if (status) 2469 goto err; 2470 2471 status = ath10k_init_uart(ar); 2472 if (status) 2473 goto err; 2474 2475 if (ar->hif.bus == ATH10K_BUS_SDIO) 2476 ath10k_init_sdio(ar); 2477 } 2478 2479 ar->htc.htc_ops.target_send_suspend_complete = 2480 ath10k_send_suspend_complete; 2481 2482 status = ath10k_htc_init(ar); 2483 if (status) { 2484 ath10k_err(ar, "could not init HTC (%d)\n", status); 2485 goto err; 2486 } 2487 2488 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2489 ar->running_fw->fw_file.fw_features)) { 2490 status = ath10k_bmi_done(ar); 2491 if (status) 2492 goto err; 2493 } 2494 2495 status = ath10k_wmi_attach(ar); 2496 if (status) { 2497 ath10k_err(ar, "WMI attach failed: %d\n", status); 2498 goto err; 2499 } 2500 2501 status = ath10k_htt_init(ar); 2502 if (status) { 2503 ath10k_err(ar, "failed to init htt: %d\n", status); 2504 goto err_wmi_detach; 2505 } 2506 2507 status = ath10k_htt_tx_start(&ar->htt); 2508 if (status) { 2509 ath10k_err(ar, "failed to alloc htt tx: %d\n", status); 2510 goto err_wmi_detach; 2511 } 2512 2513 /* If firmware indicates Full Rx Reorder support it must be used in a 2514 * slightly different manner. Let HTT code know. 2515 */ 2516 ar->htt.rx_ring.in_ord_rx = !!(test_bit(WMI_SERVICE_RX_FULL_REORDER, 2517 ar->wmi.svc_map)); 2518 2519 status = ath10k_htt_rx_alloc(&ar->htt); 2520 if (status) { 2521 ath10k_err(ar, "failed to alloc htt rx: %d\n", status); 2522 goto err_htt_tx_detach; 2523 } 2524 2525 status = ath10k_hif_start(ar); 2526 if (status) { 2527 ath10k_err(ar, "could not start HIF: %d\n", status); 2528 goto err_htt_rx_detach; 2529 } 2530 2531 status = ath10k_htc_wait_target(&ar->htc); 2532 if (status) { 2533 ath10k_err(ar, "failed to connect to HTC: %d\n", status); 2534 goto err_hif_stop; 2535 } 2536 2537 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2538 status = ath10k_htt_connect(&ar->htt); 2539 if (status) { 2540 ath10k_err(ar, "failed to connect htt (%d)\n", status); 2541 goto err_hif_stop; 2542 } 2543 } 2544 2545 status = ath10k_wmi_connect(ar); 2546 if (status) { 2547 ath10k_err(ar, "could not connect wmi: %d\n", status); 2548 goto err_hif_stop; 2549 } 2550 2551 status = ath10k_htc_start(&ar->htc); 2552 if (status) { 2553 ath10k_err(ar, "failed to start htc: %d\n", status); 2554 goto err_hif_stop; 2555 } 2556 2557 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2558 status = ath10k_wmi_wait_for_service_ready(ar); 2559 if (status) { 2560 ath10k_warn(ar, "wmi service ready event not received"); 2561 goto err_hif_stop; 2562 } 2563 } 2564 2565 ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n", 2566 ar->hw->wiphy->fw_version); 2567 2568 if (test_bit(WMI_SERVICE_EXT_RES_CFG_SUPPORT, ar->wmi.svc_map) && 2569 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2570 val = 0; 2571 if (ath10k_peer_stats_enabled(ar)) 2572 val = WMI_10_4_PEER_STATS; 2573 2574 /* Enable vdev stats by default */ 2575 val |= WMI_10_4_VDEV_STATS; 2576 2577 if (test_bit(WMI_SERVICE_BSS_CHANNEL_INFO_64, ar->wmi.svc_map)) 2578 val |= WMI_10_4_BSS_CHANNEL_INFO_64; 2579 2580 /* 10.4 firmware supports BT-Coex without reloading firmware 2581 * via pdev param. To support Bluetooth coexistence pdev param, 2582 * WMI_COEX_GPIO_SUPPORT of extended resource config should be 2583 * enabled always. 2584 */ 2585 if (test_bit(WMI_SERVICE_COEX_GPIO, ar->wmi.svc_map) && 2586 test_bit(ATH10K_FW_FEATURE_BTCOEX_PARAM, 2587 ar->running_fw->fw_file.fw_features)) 2588 val |= WMI_10_4_COEX_GPIO_SUPPORT; 2589 2590 if (test_bit(WMI_SERVICE_TDLS_EXPLICIT_MODE_ONLY, 2591 ar->wmi.svc_map)) 2592 val |= WMI_10_4_TDLS_EXPLICIT_MODE_ONLY; 2593 2594 if (test_bit(WMI_SERVICE_TDLS_UAPSD_BUFFER_STA, 2595 ar->wmi.svc_map)) 2596 val |= WMI_10_4_TDLS_UAPSD_BUFFER_STA; 2597 2598 if (test_bit(WMI_SERVICE_TX_DATA_ACK_RSSI, 2599 ar->wmi.svc_map)) 2600 val |= WMI_10_4_TX_DATA_ACK_RSSI; 2601 2602 status = ath10k_mac_ext_resource_config(ar, val); 2603 if (status) { 2604 ath10k_err(ar, 2605 "failed to send ext resource cfg command : %d\n", 2606 status); 2607 goto err_hif_stop; 2608 } 2609 } 2610 2611 status = ath10k_wmi_cmd_init(ar); 2612 if (status) { 2613 ath10k_err(ar, "could not send WMI init command (%d)\n", 2614 status); 2615 goto err_hif_stop; 2616 } 2617 2618 status = ath10k_wmi_wait_for_unified_ready(ar); 2619 if (status) { 2620 ath10k_err(ar, "wmi unified ready event not received\n"); 2621 goto err_hif_stop; 2622 } 2623 2624 /* Some firmware revisions do not properly set up hardware rx filter 2625 * registers. 2626 * 2627 * A known example from QCA9880 and 10.2.4 is that MAC_PCU_ADDR1_MASK 2628 * is filled with 0s instead of 1s allowing HW to respond with ACKs to 2629 * any frames that matches MAC_PCU_RX_FILTER which is also 2630 * misconfigured to accept anything. 2631 * 2632 * The ADDR1 is programmed using internal firmware structure field and 2633 * can't be (easily/sanely) reached from the driver explicitly. It is 2634 * possible to implicitly make it correct by creating a dummy vdev and 2635 * then deleting it. 2636 */ 2637 if (ar->hw_params.hw_filter_reset_required && 2638 mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2639 status = ath10k_core_reset_rx_filter(ar); 2640 if (status) { 2641 ath10k_err(ar, 2642 "failed to reset rx filter: %d\n", status); 2643 goto err_hif_stop; 2644 } 2645 } 2646 2647 status = ath10k_htt_rx_ring_refill(ar); 2648 if (status) { 2649 ath10k_err(ar, "failed to refill htt rx ring: %d\n", status); 2650 goto err_hif_stop; 2651 } 2652 2653 if (ar->max_num_vdevs >= 64) 2654 ar->free_vdev_map = 0xFFFFFFFFFFFFFFFFLL; 2655 else 2656 ar->free_vdev_map = (1LL << ar->max_num_vdevs) - 1; 2657 2658 INIT_LIST_HEAD(&ar->arvifs); 2659 2660 /* we don't care about HTT in UTF mode */ 2661 if (mode == ATH10K_FIRMWARE_MODE_NORMAL) { 2662 status = ath10k_htt_setup(&ar->htt); 2663 if (status) { 2664 ath10k_err(ar, "failed to setup htt: %d\n", status); 2665 goto err_hif_stop; 2666 } 2667 } 2668 2669 status = ath10k_debug_start(ar); 2670 if (status) 2671 goto err_hif_stop; 2672 2673 return 0; 2674 2675 err_hif_stop: 2676 ath10k_hif_stop(ar); 2677 err_htt_rx_detach: 2678 ath10k_htt_rx_free(&ar->htt); 2679 err_htt_tx_detach: 2680 ath10k_htt_tx_free(&ar->htt); 2681 err_wmi_detach: 2682 ath10k_wmi_detach(ar); 2683 err: 2684 return status; 2685 } 2686 EXPORT_SYMBOL(ath10k_core_start); 2687 2688 int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt) 2689 { 2690 int ret; 2691 unsigned long time_left; 2692 2693 reinit_completion(&ar->target_suspend); 2694 2695 ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt); 2696 if (ret) { 2697 ath10k_warn(ar, "could not suspend target (%d)\n", ret); 2698 return ret; 2699 } 2700 2701 time_left = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ); 2702 2703 if (!time_left) { 2704 ath10k_warn(ar, "suspend timed out - target pause event never came\n"); 2705 return -ETIMEDOUT; 2706 } 2707 2708 return 0; 2709 } 2710 2711 void ath10k_core_stop(struct ath10k *ar) 2712 { 2713 lockdep_assert_held(&ar->conf_mutex); 2714 ath10k_debug_stop(ar); 2715 2716 /* try to suspend target */ 2717 if (ar->state != ATH10K_STATE_RESTARTING && 2718 ar->state != ATH10K_STATE_UTF) 2719 ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR); 2720 2721 ath10k_hif_stop(ar); 2722 ath10k_htt_tx_stop(&ar->htt); 2723 ath10k_htt_rx_free(&ar->htt); 2724 ath10k_wmi_detach(ar); 2725 } 2726 EXPORT_SYMBOL(ath10k_core_stop); 2727 2728 /* mac80211 manages fw/hw initialization through start/stop hooks. However in 2729 * order to know what hw capabilities should be advertised to mac80211 it is 2730 * necessary to load the firmware (and tear it down immediately since start 2731 * hook will try to init it again) before registering 2732 */ 2733 static int ath10k_core_probe_fw(struct ath10k *ar) 2734 { 2735 struct bmi_target_info target_info; 2736 int ret = 0; 2737 2738 ret = ath10k_hif_power_up(ar); 2739 if (ret) { 2740 ath10k_err(ar, "could not power on hif bus (%d)\n", ret); 2741 return ret; 2742 } 2743 2744 switch (ar->hif.bus) { 2745 case ATH10K_BUS_SDIO: 2746 memset(&target_info, 0, sizeof(target_info)); 2747 ret = ath10k_bmi_get_target_info_sdio(ar, &target_info); 2748 if (ret) { 2749 ath10k_err(ar, "could not get target info (%d)\n", ret); 2750 goto err_power_down; 2751 } 2752 ar->target_version = target_info.version; 2753 ar->hw->wiphy->hw_version = target_info.version; 2754 break; 2755 case ATH10K_BUS_PCI: 2756 case ATH10K_BUS_AHB: 2757 case ATH10K_BUS_USB: 2758 memset(&target_info, 0, sizeof(target_info)); 2759 ret = ath10k_bmi_get_target_info(ar, &target_info); 2760 if (ret) { 2761 ath10k_err(ar, "could not get target info (%d)\n", ret); 2762 goto err_power_down; 2763 } 2764 ar->target_version = target_info.version; 2765 ar->hw->wiphy->hw_version = target_info.version; 2766 break; 2767 case ATH10K_BUS_SNOC: 2768 memset(&target_info, 0, sizeof(target_info)); 2769 ret = ath10k_hif_get_target_info(ar, &target_info); 2770 if (ret) { 2771 ath10k_err(ar, "could not get target info (%d)\n", ret); 2772 goto err_power_down; 2773 } 2774 ar->target_version = target_info.version; 2775 ar->hw->wiphy->hw_version = target_info.version; 2776 break; 2777 default: 2778 ath10k_err(ar, "incorrect hif bus type: %d\n", ar->hif.bus); 2779 } 2780 2781 ret = ath10k_init_hw_params(ar); 2782 if (ret) { 2783 ath10k_err(ar, "could not get hw params (%d)\n", ret); 2784 goto err_power_down; 2785 } 2786 2787 ret = ath10k_core_fetch_firmware_files(ar); 2788 if (ret) { 2789 ath10k_err(ar, "could not fetch firmware files (%d)\n", ret); 2790 goto err_power_down; 2791 } 2792 2793 BUILD_BUG_ON(sizeof(ar->hw->wiphy->fw_version) != 2794 sizeof(ar->normal_mode_fw.fw_file.fw_version)); 2795 memcpy(ar->hw->wiphy->fw_version, ar->normal_mode_fw.fw_file.fw_version, 2796 sizeof(ar->hw->wiphy->fw_version)); 2797 2798 ath10k_debug_print_hwfw_info(ar); 2799 2800 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2801 ar->normal_mode_fw.fw_file.fw_features)) { 2802 ret = ath10k_core_pre_cal_download(ar); 2803 if (ret) { 2804 /* pre calibration data download is not necessary 2805 * for all the chipsets. Ignore failures and continue. 2806 */ 2807 ath10k_dbg(ar, ATH10K_DBG_BOOT, 2808 "could not load pre cal data: %d\n", ret); 2809 } 2810 2811 ret = ath10k_core_get_board_id_from_otp(ar); 2812 if (ret && ret != -EOPNOTSUPP) { 2813 ath10k_err(ar, "failed to get board id from otp: %d\n", 2814 ret); 2815 goto err_free_firmware_files; 2816 } 2817 2818 ret = ath10k_core_check_smbios(ar); 2819 if (ret) 2820 ath10k_dbg(ar, ATH10K_DBG_BOOT, "SMBIOS bdf variant name not set.\n"); 2821 2822 ret = ath10k_core_check_dt(ar); 2823 if (ret) 2824 ath10k_dbg(ar, ATH10K_DBG_BOOT, "DT bdf variant name not set.\n"); 2825 2826 ret = ath10k_core_fetch_board_file(ar, ATH10K_BD_IE_BOARD); 2827 if (ret) { 2828 ath10k_err(ar, "failed to fetch board file: %d\n", ret); 2829 goto err_free_firmware_files; 2830 } 2831 2832 ath10k_debug_print_board_info(ar); 2833 } 2834 2835 device_get_mac_address(ar->dev, ar->mac_addr, sizeof(ar->mac_addr)); 2836 2837 ret = ath10k_core_init_firmware_features(ar); 2838 if (ret) { 2839 ath10k_err(ar, "fatal problem with firmware features: %d\n", 2840 ret); 2841 goto err_free_firmware_files; 2842 } 2843 2844 if (!test_bit(ATH10K_FW_FEATURE_NON_BMI, 2845 ar->normal_mode_fw.fw_file.fw_features)) { 2846 ret = ath10k_swap_code_seg_init(ar, 2847 &ar->normal_mode_fw.fw_file); 2848 if (ret) { 2849 ath10k_err(ar, "failed to initialize code swap segment: %d\n", 2850 ret); 2851 goto err_free_firmware_files; 2852 } 2853 } 2854 2855 mutex_lock(&ar->conf_mutex); 2856 2857 ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL, 2858 &ar->normal_mode_fw); 2859 if (ret) { 2860 ath10k_err(ar, "could not init core (%d)\n", ret); 2861 goto err_unlock; 2862 } 2863 2864 ath10k_debug_print_boot_info(ar); 2865 ath10k_core_stop(ar); 2866 2867 mutex_unlock(&ar->conf_mutex); 2868 2869 ath10k_hif_power_down(ar); 2870 return 0; 2871 2872 err_unlock: 2873 mutex_unlock(&ar->conf_mutex); 2874 2875 err_free_firmware_files: 2876 ath10k_core_free_firmware_files(ar); 2877 2878 err_power_down: 2879 ath10k_hif_power_down(ar); 2880 2881 return ret; 2882 } 2883 2884 static void ath10k_core_register_work(struct work_struct *work) 2885 { 2886 struct ath10k *ar = container_of(work, struct ath10k, register_work); 2887 int status; 2888 2889 /* peer stats are enabled by default */ 2890 set_bit(ATH10K_FLAG_PEER_STATS, &ar->dev_flags); 2891 2892 status = ath10k_core_probe_fw(ar); 2893 if (status) { 2894 ath10k_err(ar, "could not probe fw (%d)\n", status); 2895 goto err; 2896 } 2897 2898 status = ath10k_mac_register(ar); 2899 if (status) { 2900 ath10k_err(ar, "could not register to mac80211 (%d)\n", status); 2901 goto err_release_fw; 2902 } 2903 2904 status = ath10k_coredump_register(ar); 2905 if (status) { 2906 ath10k_err(ar, "unable to register coredump\n"); 2907 goto err_unregister_mac; 2908 } 2909 2910 status = ath10k_debug_register(ar); 2911 if (status) { 2912 ath10k_err(ar, "unable to initialize debugfs\n"); 2913 goto err_unregister_coredump; 2914 } 2915 2916 status = ath10k_spectral_create(ar); 2917 if (status) { 2918 ath10k_err(ar, "failed to initialize spectral\n"); 2919 goto err_debug_destroy; 2920 } 2921 2922 status = ath10k_thermal_register(ar); 2923 if (status) { 2924 ath10k_err(ar, "could not register thermal device: %d\n", 2925 status); 2926 goto err_spectral_destroy; 2927 } 2928 2929 set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags); 2930 return; 2931 2932 err_spectral_destroy: 2933 ath10k_spectral_destroy(ar); 2934 err_debug_destroy: 2935 ath10k_debug_destroy(ar); 2936 err_unregister_coredump: 2937 ath10k_coredump_unregister(ar); 2938 err_unregister_mac: 2939 ath10k_mac_unregister(ar); 2940 err_release_fw: 2941 ath10k_core_free_firmware_files(ar); 2942 err: 2943 /* TODO: It's probably a good idea to release device from the driver 2944 * but calling device_release_driver() here will cause a deadlock. 2945 */ 2946 return; 2947 } 2948 2949 int ath10k_core_register(struct ath10k *ar, 2950 const struct ath10k_bus_params *bus_params) 2951 { 2952 ar->chip_id = bus_params->chip_id; 2953 ar->dev_type = bus_params->dev_type; 2954 queue_work(ar->workqueue, &ar->register_work); 2955 2956 return 0; 2957 } 2958 EXPORT_SYMBOL(ath10k_core_register); 2959 2960 void ath10k_core_unregister(struct ath10k *ar) 2961 { 2962 cancel_work_sync(&ar->register_work); 2963 2964 if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags)) 2965 return; 2966 2967 ath10k_thermal_unregister(ar); 2968 /* Stop spectral before unregistering from mac80211 to remove the 2969 * relayfs debugfs file cleanly. Otherwise the parent debugfs tree 2970 * would be already be free'd recursively, leading to a double free. 2971 */ 2972 ath10k_spectral_destroy(ar); 2973 2974 /* We must unregister from mac80211 before we stop HTC and HIF. 2975 * Otherwise we will fail to submit commands to FW and mac80211 will be 2976 * unhappy about callback failures. 2977 */ 2978 ath10k_mac_unregister(ar); 2979 2980 ath10k_testmode_destroy(ar); 2981 2982 ath10k_core_free_firmware_files(ar); 2983 ath10k_core_free_board_files(ar); 2984 2985 ath10k_debug_unregister(ar); 2986 } 2987 EXPORT_SYMBOL(ath10k_core_unregister); 2988 2989 struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev, 2990 enum ath10k_bus bus, 2991 enum ath10k_hw_rev hw_rev, 2992 const struct ath10k_hif_ops *hif_ops) 2993 { 2994 struct ath10k *ar; 2995 int ret; 2996 2997 ar = ath10k_mac_create(priv_size); 2998 if (!ar) 2999 return NULL; 3000 3001 ar->ath_common.priv = ar; 3002 ar->ath_common.hw = ar->hw; 3003 ar->dev = dev; 3004 ar->hw_rev = hw_rev; 3005 ar->hif.ops = hif_ops; 3006 ar->hif.bus = bus; 3007 3008 switch (hw_rev) { 3009 case ATH10K_HW_QCA988X: 3010 case ATH10K_HW_QCA9887: 3011 ar->regs = &qca988x_regs; 3012 ar->hw_ce_regs = &qcax_ce_regs; 3013 ar->hw_values = &qca988x_values; 3014 break; 3015 case ATH10K_HW_QCA6174: 3016 case ATH10K_HW_QCA9377: 3017 ar->regs = &qca6174_regs; 3018 ar->hw_ce_regs = &qcax_ce_regs; 3019 ar->hw_values = &qca6174_values; 3020 break; 3021 case ATH10K_HW_QCA99X0: 3022 case ATH10K_HW_QCA9984: 3023 ar->regs = &qca99x0_regs; 3024 ar->hw_ce_regs = &qcax_ce_regs; 3025 ar->hw_values = &qca99x0_values; 3026 break; 3027 case ATH10K_HW_QCA9888: 3028 ar->regs = &qca99x0_regs; 3029 ar->hw_ce_regs = &qcax_ce_regs; 3030 ar->hw_values = &qca9888_values; 3031 break; 3032 case ATH10K_HW_QCA4019: 3033 ar->regs = &qca4019_regs; 3034 ar->hw_ce_regs = &qcax_ce_regs; 3035 ar->hw_values = &qca4019_values; 3036 break; 3037 case ATH10K_HW_WCN3990: 3038 ar->regs = &wcn3990_regs; 3039 ar->hw_ce_regs = &wcn3990_ce_regs; 3040 ar->hw_values = &wcn3990_values; 3041 break; 3042 default: 3043 ath10k_err(ar, "unsupported core hardware revision %d\n", 3044 hw_rev); 3045 ret = -ENOTSUPP; 3046 goto err_free_mac; 3047 } 3048 3049 init_completion(&ar->scan.started); 3050 init_completion(&ar->scan.completed); 3051 init_completion(&ar->scan.on_channel); 3052 init_completion(&ar->target_suspend); 3053 init_completion(&ar->driver_recovery); 3054 init_completion(&ar->wow.wakeup_completed); 3055 3056 init_completion(&ar->install_key_done); 3057 init_completion(&ar->vdev_setup_done); 3058 init_completion(&ar->thermal.wmi_sync); 3059 init_completion(&ar->bss_survey_done); 3060 3061 INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work); 3062 3063 ar->workqueue = create_singlethread_workqueue("ath10k_wq"); 3064 if (!ar->workqueue) 3065 goto err_free_mac; 3066 3067 ar->workqueue_aux = create_singlethread_workqueue("ath10k_aux_wq"); 3068 if (!ar->workqueue_aux) 3069 goto err_free_wq; 3070 3071 mutex_init(&ar->conf_mutex); 3072 spin_lock_init(&ar->data_lock); 3073 spin_lock_init(&ar->txqs_lock); 3074 3075 INIT_LIST_HEAD(&ar->txqs); 3076 INIT_LIST_HEAD(&ar->peers); 3077 init_waitqueue_head(&ar->peer_mapping_wq); 3078 init_waitqueue_head(&ar->htt.empty_tx_wq); 3079 init_waitqueue_head(&ar->wmi.tx_credits_wq); 3080 3081 init_completion(&ar->offchan_tx_completed); 3082 INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work); 3083 skb_queue_head_init(&ar->offchan_tx_queue); 3084 3085 INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work); 3086 skb_queue_head_init(&ar->wmi_mgmt_tx_queue); 3087 3088 INIT_WORK(&ar->register_work, ath10k_core_register_work); 3089 INIT_WORK(&ar->restart_work, ath10k_core_restart); 3090 INIT_WORK(&ar->set_coverage_class_work, 3091 ath10k_core_set_coverage_class_work); 3092 3093 init_dummy_netdev(&ar->napi_dev); 3094 3095 ret = ath10k_coredump_create(ar); 3096 if (ret) 3097 goto err_free_aux_wq; 3098 3099 ret = ath10k_debug_create(ar); 3100 if (ret) 3101 goto err_free_coredump; 3102 3103 return ar; 3104 3105 err_free_coredump: 3106 ath10k_coredump_destroy(ar); 3107 3108 err_free_aux_wq: 3109 destroy_workqueue(ar->workqueue_aux); 3110 err_free_wq: 3111 destroy_workqueue(ar->workqueue); 3112 3113 err_free_mac: 3114 ath10k_mac_destroy(ar); 3115 3116 return NULL; 3117 } 3118 EXPORT_SYMBOL(ath10k_core_create); 3119 3120 void ath10k_core_destroy(struct ath10k *ar) 3121 { 3122 flush_workqueue(ar->workqueue); 3123 destroy_workqueue(ar->workqueue); 3124 3125 flush_workqueue(ar->workqueue_aux); 3126 destroy_workqueue(ar->workqueue_aux); 3127 3128 ath10k_debug_destroy(ar); 3129 ath10k_coredump_destroy(ar); 3130 ath10k_htt_tx_destroy(&ar->htt); 3131 ath10k_wmi_free_host_mem(ar); 3132 ath10k_mac_destroy(ar); 3133 } 3134 EXPORT_SYMBOL(ath10k_core_destroy); 3135 3136 MODULE_AUTHOR("Qualcomm Atheros"); 3137 MODULE_DESCRIPTION("Core module for Qualcomm Atheros 802.11ac wireless LAN cards."); 3138 MODULE_LICENSE("Dual BSD/GPL"); 3139