1 /* SPDX-License-Identifier: ISC */ 2 /* 3 * Copyright (c) 2005-2011 Atheros Communications Inc. 4 * Copyright (c) 2011-2015,2017 Qualcomm Atheros, Inc. 5 */ 6 7 #ifndef _BMI_H_ 8 #define _BMI_H_ 9 10 #include "core.h" 11 12 /* 13 * Bootloader Messaging Interface (BMI) 14 * 15 * BMI is a very simple messaging interface used during initialization 16 * to read memory, write memory, execute code, and to define an 17 * application entry PC. 18 * 19 * It is used to download an application to QCA988x, to provide 20 * patches to code that is already resident on QCA988x, and generally 21 * to examine and modify state. The Host has an opportunity to use 22 * BMI only once during bootup. Once the Host issues a BMI_DONE 23 * command, this opportunity ends. 24 * 25 * The Host writes BMI requests to mailbox0, and reads BMI responses 26 * from mailbox0. BMI requests all begin with a command 27 * (see below for specific commands), and are followed by 28 * command-specific data. 29 * 30 * Flow control: 31 * The Host can only issue a command once the Target gives it a 32 * "BMI Command Credit", using AR8K Counter #4. As soon as the 33 * Target has completed a command, it issues another BMI Command 34 * Credit (so the Host can issue the next command). 35 * 36 * BMI handles all required Target-side cache flushing. 37 */ 38 39 /* Maximum data size used for BMI transfers */ 40 #define BMI_MAX_DATA_SIZE 256 41 42 /* len = cmd + addr + length */ 43 #define BMI_MAX_CMDBUF_SIZE (BMI_MAX_DATA_SIZE + \ 44 sizeof(u32) + \ 45 sizeof(u32) + \ 46 sizeof(u32)) 47 48 /* Maximum data size used for large BMI transfers */ 49 #define BMI_MAX_LARGE_DATA_SIZE 2048 50 51 /* len = cmd + addr + length */ 52 #define BMI_MAX_LARGE_CMDBUF_SIZE (BMI_MAX_LARGE_DATA_SIZE + \ 53 sizeof(u32) + \ 54 sizeof(u32) + \ 55 sizeof(u32)) 56 57 /* BMI Commands */ 58 59 enum bmi_cmd_id { 60 BMI_NO_COMMAND = 0, 61 BMI_DONE = 1, 62 BMI_READ_MEMORY = 2, 63 BMI_WRITE_MEMORY = 3, 64 BMI_EXECUTE = 4, 65 BMI_SET_APP_START = 5, 66 BMI_READ_SOC_REGISTER = 6, 67 BMI_READ_SOC_WORD = 6, 68 BMI_WRITE_SOC_REGISTER = 7, 69 BMI_WRITE_SOC_WORD = 7, 70 BMI_GET_TARGET_ID = 8, 71 BMI_GET_TARGET_INFO = 8, 72 BMI_ROMPATCH_INSTALL = 9, 73 BMI_ROMPATCH_UNINSTALL = 10, 74 BMI_ROMPATCH_ACTIVATE = 11, 75 BMI_ROMPATCH_DEACTIVATE = 12, 76 BMI_LZ_STREAM_START = 13, /* should be followed by LZ_DATA */ 77 BMI_LZ_DATA = 14, 78 BMI_NVRAM_PROCESS = 15, 79 }; 80 81 #define BMI_NVRAM_SEG_NAME_SZ 16 82 83 #define BMI_PARAM_GET_EEPROM_BOARD_ID 0x10 84 #define BMI_PARAM_GET_FLASH_BOARD_ID 0x8000 85 #define BMI_PARAM_FLASH_SECTION_ALL 0x10000 86 87 /* Dual-band Extended Board ID */ 88 #define BMI_PARAM_GET_EXT_BOARD_ID 0x40000 89 #define ATH10K_BMI_EXT_BOARD_ID_SUPPORT 0x40000 90 91 #define ATH10K_BMI_BOARD_ID_FROM_OTP_MASK 0x7c00 92 #define ATH10K_BMI_BOARD_ID_FROM_OTP_LSB 10 93 94 #define ATH10K_BMI_CHIP_ID_FROM_OTP_MASK 0x18000 95 #define ATH10K_BMI_CHIP_ID_FROM_OTP_LSB 15 96 97 #define ATH10K_BMI_BOARD_ID_STATUS_MASK 0xff 98 #define ATH10K_BMI_EBOARD_ID_STATUS_MASK 0xff 99 100 struct bmi_cmd { 101 __le32 id; /* enum bmi_cmd_id */ 102 union { 103 struct { 104 } done; 105 struct { 106 __le32 addr; 107 __le32 len; 108 } read_mem; 109 struct { 110 __le32 addr; 111 __le32 len; 112 u8 payload[]; 113 } write_mem; 114 struct { 115 __le32 addr; 116 __le32 param; 117 } execute; 118 struct { 119 __le32 addr; 120 } set_app_start; 121 struct { 122 __le32 addr; 123 } read_soc_reg; 124 struct { 125 __le32 addr; 126 __le32 value; 127 } write_soc_reg; 128 struct { 129 } get_target_info; 130 struct { 131 __le32 rom_addr; 132 __le32 ram_addr; /* or value */ 133 __le32 size; 134 __le32 activate; /* 0=install, but dont activate */ 135 } rompatch_install; 136 struct { 137 __le32 patch_id; 138 } rompatch_uninstall; 139 struct { 140 __le32 count; 141 __le32 patch_ids[]; /* length of @count */ 142 } rompatch_activate; 143 struct { 144 __le32 count; 145 __le32 patch_ids[]; /* length of @count */ 146 } rompatch_deactivate; 147 struct { 148 __le32 addr; 149 } lz_start; 150 struct { 151 __le32 len; /* max BMI_MAX_DATA_SIZE */ 152 u8 payload[]; /* length of @len */ 153 } lz_data; 154 struct { 155 u8 name[BMI_NVRAM_SEG_NAME_SZ]; 156 } nvram_process; 157 u8 payload[BMI_MAX_CMDBUF_SIZE]; 158 }; 159 } __packed; 160 161 union bmi_resp { 162 struct { 163 DECLARE_FLEX_ARRAY(u8, payload); 164 } read_mem; 165 struct { 166 __le32 result; 167 } execute; 168 struct { 169 __le32 value; 170 } read_soc_reg; 171 struct { 172 __le32 len; 173 __le32 version; 174 __le32 type; 175 } get_target_info; 176 struct { 177 __le32 patch_id; 178 } rompatch_install; 179 struct { 180 __le32 patch_id; 181 } rompatch_uninstall; 182 struct { 183 /* 0 = nothing executed 184 * otherwise = NVRAM segment return value 185 */ 186 __le32 result; 187 } nvram_process; 188 u8 payload[BMI_MAX_CMDBUF_SIZE]; 189 } __packed; 190 191 struct bmi_target_info { 192 u32 version; 193 u32 type; 194 }; 195 196 struct bmi_segmented_file_header { 197 __le32 magic_num; 198 __le32 file_flags; 199 u8 data[]; 200 }; 201 202 struct bmi_segmented_metadata { 203 __le32 addr; 204 __le32 length; 205 u8 data[]; 206 }; 207 208 #define BMI_SGMTFILE_MAGIC_NUM 0x544d4753 /* "SGMT" */ 209 #define BMI_SGMTFILE_FLAG_COMPRESS 1 210 211 /* Special values for bmi_segmented_metadata.length (all have high bit set) */ 212 213 /* end of segmented data */ 214 #define BMI_SGMTFILE_DONE 0xffffffff 215 216 /* Board Data segment */ 217 #define BMI_SGMTFILE_BDDATA 0xfffffffe 218 219 /* set beginning address */ 220 #define BMI_SGMTFILE_BEGINADDR 0xfffffffd 221 222 /* immediate function execution */ 223 #define BMI_SGMTFILE_EXEC 0xfffffffc 224 225 /* in jiffies */ 226 #define BMI_COMMUNICATION_TIMEOUT_HZ (3 * HZ) 227 228 #define BMI_CE_NUM_TO_TARG 0 229 #define BMI_CE_NUM_TO_HOST 1 230 231 void ath10k_bmi_start(struct ath10k *ar); 232 int ath10k_bmi_done(struct ath10k *ar); 233 int ath10k_bmi_get_target_info(struct ath10k *ar, 234 struct bmi_target_info *target_info); 235 int ath10k_bmi_get_target_info_sdio(struct ath10k *ar, 236 struct bmi_target_info *target_info); 237 int ath10k_bmi_read_memory(struct ath10k *ar, u32 address, 238 void *buffer, u32 length); 239 int ath10k_bmi_write_memory(struct ath10k *ar, u32 address, 240 const void *buffer, u32 length); 241 242 #define ath10k_bmi_read32(ar, item, val) \ 243 ({ \ 244 int ret; \ 245 u32 addr; \ 246 __le32 tmp; \ 247 \ 248 addr = host_interest_item_address(HI_ITEM(item)); \ 249 ret = ath10k_bmi_read_memory(ar, addr, (u8 *)&tmp, 4); \ 250 if (!ret) \ 251 *val = __le32_to_cpu(tmp); \ 252 ret; \ 253 }) 254 255 #define ath10k_bmi_write32(ar, item, val) \ 256 ({ \ 257 int ret; \ 258 u32 address; \ 259 __le32 v = __cpu_to_le32(val); \ 260 \ 261 address = host_interest_item_address(HI_ITEM(item)); \ 262 ret = ath10k_bmi_write_memory(ar, address, \ 263 (u8 *)&v, sizeof(v)); \ 264 ret; \ 265 }) 266 267 int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result); 268 int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address); 269 int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length); 270 271 int ath10k_bmi_fast_download(struct ath10k *ar, u32 address, 272 const void *buffer, u32 length); 273 int ath10k_bmi_read_soc_reg(struct ath10k *ar, u32 address, u32 *reg_val); 274 int ath10k_bmi_write_soc_reg(struct ath10k *ar, u32 address, u32 reg_val); 275 int ath10k_bmi_set_start(struct ath10k *ar, u32 address); 276 277 #endif /* _BMI_H_ */ 278