1 /* 2 * Goramo PCI200SYN synchronous serial card driver for Linux 3 * 4 * Copyright (C) 2002-2008 Krzysztof Halasa <khc@pm.waw.pl> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of version 2 of the GNU General Public License 8 * as published by the Free Software Foundation. 9 * 10 * For information see <http://www.kernel.org/pub/linux/utils/net/hdlc/> 11 * 12 * Sources of information: 13 * Hitachi HD64572 SCA-II User's Manual 14 * PLX Technology Inc. PCI9052 Data Book 15 */ 16 17 #include <linux/module.h> 18 #include <linux/kernel.h> 19 #include <linux/capability.h> 20 #include <linux/slab.h> 21 #include <linux/types.h> 22 #include <linux/fcntl.h> 23 #include <linux/in.h> 24 #include <linux/string.h> 25 #include <linux/errno.h> 26 #include <linux/init.h> 27 #include <linux/ioport.h> 28 #include <linux/moduleparam.h> 29 #include <linux/netdevice.h> 30 #include <linux/hdlc.h> 31 #include <linux/pci.h> 32 #include <linux/delay.h> 33 #include <asm/io.h> 34 35 #include "hd64572.h" 36 37 #undef DEBUG_PKT 38 #define DEBUG_RINGS 39 40 #define PCI200SYN_PLX_SIZE 0x80 /* PLX control window size (128b) */ 41 #define PCI200SYN_SCA_SIZE 0x400 /* SCA window size (1Kb) */ 42 #define MAX_TX_BUFFERS 10 43 44 static int pci_clock_freq = 33000000; 45 #define CLOCK_BASE pci_clock_freq 46 47 /* 48 * PLX PCI9052 local configuration and shared runtime registers. 49 * This structure can be used to access 9052 registers (memory mapped). 50 */ 51 typedef struct { 52 u32 loc_addr_range[4]; /* 00-0Ch : Local Address Ranges */ 53 u32 loc_rom_range; /* 10h : Local ROM Range */ 54 u32 loc_addr_base[4]; /* 14-20h : Local Address Base Addrs */ 55 u32 loc_rom_base; /* 24h : Local ROM Base */ 56 u32 loc_bus_descr[4]; /* 28-34h : Local Bus Descriptors */ 57 u32 rom_bus_descr; /* 38h : ROM Bus Descriptor */ 58 u32 cs_base[4]; /* 3C-48h : Chip Select Base Addrs */ 59 u32 intr_ctrl_stat; /* 4Ch : Interrupt Control/Status */ 60 u32 init_ctrl; /* 50h : EEPROM ctrl, Init Ctrl, etc */ 61 }plx9052; 62 63 64 65 typedef struct port_s { 66 struct napi_struct napi; 67 struct net_device *netdev; 68 struct card_s *card; 69 spinlock_t lock; /* TX lock */ 70 sync_serial_settings settings; 71 int rxpart; /* partial frame received, next frame invalid*/ 72 unsigned short encoding; 73 unsigned short parity; 74 u16 rxin; /* rx ring buffer 'in' pointer */ 75 u16 txin; /* tx ring buffer 'in' and 'last' pointers */ 76 u16 txlast; 77 u8 rxs, txs, tmc; /* SCA registers */ 78 u8 chan; /* physical port # - 0 or 1 */ 79 }port_t; 80 81 82 83 typedef struct card_s { 84 u8 __iomem *rambase; /* buffer memory base (virtual) */ 85 u8 __iomem *scabase; /* SCA memory base (virtual) */ 86 plx9052 __iomem *plxbase;/* PLX registers memory base (virtual) */ 87 u16 rx_ring_buffers; /* number of buffers in a ring */ 88 u16 tx_ring_buffers; 89 u16 buff_offset; /* offset of first buffer of first channel */ 90 u8 irq; /* interrupt request level */ 91 92 port_t ports[2]; 93 }card_t; 94 95 96 #define get_port(card, port) (&card->ports[port]) 97 #define sca_flush(card) (sca_in(IER0, card)); 98 99 static inline void new_memcpy_toio(char __iomem *dest, char *src, int length) 100 { 101 int len; 102 do { 103 len = length > 256 ? 256 : length; 104 memcpy_toio(dest, src, len); 105 dest += len; 106 src += len; 107 length -= len; 108 readb(dest); 109 } while (len); 110 } 111 112 #undef memcpy_toio 113 #define memcpy_toio new_memcpy_toio 114 115 #include "hd64572.c" 116 117 118 static void pci200_set_iface(port_t *port) 119 { 120 card_t *card = port->card; 121 u16 msci = get_msci(port); 122 u8 rxs = port->rxs & CLK_BRG_MASK; 123 u8 txs = port->txs & CLK_BRG_MASK; 124 125 sca_out(EXS_TES1, (port->chan ? MSCI1_OFFSET : MSCI0_OFFSET) + EXS, 126 port->card); 127 switch(port->settings.clock_type) { 128 case CLOCK_INT: 129 rxs |= CLK_BRG; /* BRG output */ 130 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 131 break; 132 133 case CLOCK_TXINT: 134 rxs |= CLK_LINE; /* RXC input */ 135 txs |= CLK_PIN_OUT | CLK_BRG; /* BRG output */ 136 break; 137 138 case CLOCK_TXFROMRX: 139 rxs |= CLK_LINE; /* RXC input */ 140 txs |= CLK_PIN_OUT | CLK_TX_RXCLK; /* RX clock */ 141 break; 142 143 default: /* EXTernal clock */ 144 rxs |= CLK_LINE; /* RXC input */ 145 txs |= CLK_PIN_OUT | CLK_LINE; /* TXC input */ 146 break; 147 } 148 149 port->rxs = rxs; 150 port->txs = txs; 151 sca_out(rxs, msci + RXS, card); 152 sca_out(txs, msci + TXS, card); 153 sca_set_port(port); 154 } 155 156 157 158 static int pci200_open(struct net_device *dev) 159 { 160 port_t *port = dev_to_port(dev); 161 162 int result = hdlc_open(dev); 163 if (result) 164 return result; 165 166 sca_open(dev); 167 pci200_set_iface(port); 168 sca_flush(port->card); 169 return 0; 170 } 171 172 173 174 static int pci200_close(struct net_device *dev) 175 { 176 sca_close(dev); 177 sca_flush(dev_to_port(dev)->card); 178 hdlc_close(dev); 179 return 0; 180 } 181 182 183 184 static int pci200_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) 185 { 186 const size_t size = sizeof(sync_serial_settings); 187 sync_serial_settings new_line; 188 sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync; 189 port_t *port = dev_to_port(dev); 190 191 #ifdef DEBUG_RINGS 192 if (cmd == SIOCDEVPRIVATE) { 193 sca_dump_rings(dev); 194 return 0; 195 } 196 #endif 197 if (cmd != SIOCWANDEV) 198 return hdlc_ioctl(dev, ifr, cmd); 199 200 switch(ifr->ifr_settings.type) { 201 case IF_GET_IFACE: 202 ifr->ifr_settings.type = IF_IFACE_V35; 203 if (ifr->ifr_settings.size < size) { 204 ifr->ifr_settings.size = size; /* data size wanted */ 205 return -ENOBUFS; 206 } 207 if (copy_to_user(line, &port->settings, size)) 208 return -EFAULT; 209 return 0; 210 211 case IF_IFACE_V35: 212 case IF_IFACE_SYNC_SERIAL: 213 if (!capable(CAP_NET_ADMIN)) 214 return -EPERM; 215 216 if (copy_from_user(&new_line, line, size)) 217 return -EFAULT; 218 219 if (new_line.clock_type != CLOCK_EXT && 220 new_line.clock_type != CLOCK_TXFROMRX && 221 new_line.clock_type != CLOCK_INT && 222 new_line.clock_type != CLOCK_TXINT) 223 return -EINVAL; /* No such clock setting */ 224 225 if (new_line.loopback != 0 && new_line.loopback != 1) 226 return -EINVAL; 227 228 memcpy(&port->settings, &new_line, size); /* Update settings */ 229 pci200_set_iface(port); 230 sca_flush(port->card); 231 return 0; 232 233 default: 234 return hdlc_ioctl(dev, ifr, cmd); 235 } 236 } 237 238 239 240 static void pci200_pci_remove_one(struct pci_dev *pdev) 241 { 242 int i; 243 card_t *card = pci_get_drvdata(pdev); 244 245 for (i = 0; i < 2; i++) 246 if (card->ports[i].card) 247 unregister_hdlc_device(card->ports[i].netdev); 248 249 if (card->irq) 250 free_irq(card->irq, card); 251 252 if (card->rambase) 253 iounmap(card->rambase); 254 if (card->scabase) 255 iounmap(card->scabase); 256 if (card->plxbase) 257 iounmap(card->plxbase); 258 259 pci_release_regions(pdev); 260 pci_disable_device(pdev); 261 pci_set_drvdata(pdev, NULL); 262 if (card->ports[0].netdev) 263 free_netdev(card->ports[0].netdev); 264 if (card->ports[1].netdev) 265 free_netdev(card->ports[1].netdev); 266 kfree(card); 267 } 268 269 static const struct net_device_ops pci200_ops = { 270 .ndo_open = pci200_open, 271 .ndo_stop = pci200_close, 272 .ndo_change_mtu = hdlc_change_mtu, 273 .ndo_start_xmit = hdlc_start_xmit, 274 .ndo_do_ioctl = pci200_ioctl, 275 }; 276 277 static int __devinit pci200_pci_init_one(struct pci_dev *pdev, 278 const struct pci_device_id *ent) 279 { 280 card_t *card; 281 u32 __iomem *p; 282 int i; 283 u32 ramsize; 284 u32 ramphys; /* buffer memory base */ 285 u32 scaphys; /* SCA memory base */ 286 u32 plxphys; /* PLX registers memory base */ 287 288 i = pci_enable_device(pdev); 289 if (i) 290 return i; 291 292 i = pci_request_regions(pdev, "PCI200SYN"); 293 if (i) { 294 pci_disable_device(pdev); 295 return i; 296 } 297 298 card = kzalloc(sizeof(card_t), GFP_KERNEL); 299 if (card == NULL) { 300 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 301 pci_release_regions(pdev); 302 pci_disable_device(pdev); 303 return -ENOBUFS; 304 } 305 pci_set_drvdata(pdev, card); 306 card->ports[0].netdev = alloc_hdlcdev(&card->ports[0]); 307 card->ports[1].netdev = alloc_hdlcdev(&card->ports[1]); 308 if (!card->ports[0].netdev || !card->ports[1].netdev) { 309 printk(KERN_ERR "pci200syn: unable to allocate memory\n"); 310 pci200_pci_remove_one(pdev); 311 return -ENOMEM; 312 } 313 314 if (pci_resource_len(pdev, 0) != PCI200SYN_PLX_SIZE || 315 pci_resource_len(pdev, 2) != PCI200SYN_SCA_SIZE || 316 pci_resource_len(pdev, 3) < 16384) { 317 printk(KERN_ERR "pci200syn: invalid card EEPROM parameters\n"); 318 pci200_pci_remove_one(pdev); 319 return -EFAULT; 320 } 321 322 plxphys = pci_resource_start(pdev,0) & PCI_BASE_ADDRESS_MEM_MASK; 323 card->plxbase = ioremap(plxphys, PCI200SYN_PLX_SIZE); 324 325 scaphys = pci_resource_start(pdev,2) & PCI_BASE_ADDRESS_MEM_MASK; 326 card->scabase = ioremap(scaphys, PCI200SYN_SCA_SIZE); 327 328 ramphys = pci_resource_start(pdev,3) & PCI_BASE_ADDRESS_MEM_MASK; 329 card->rambase = pci_ioremap_bar(pdev, 3); 330 331 if (card->plxbase == NULL || 332 card->scabase == NULL || 333 card->rambase == NULL) { 334 printk(KERN_ERR "pci200syn: ioremap() failed\n"); 335 pci200_pci_remove_one(pdev); 336 return -EFAULT; 337 } 338 339 /* Reset PLX */ 340 p = &card->plxbase->init_ctrl; 341 writel(readl(p) | 0x40000000, p); 342 readl(p); /* Flush the write - do not use sca_flush */ 343 udelay(1); 344 345 writel(readl(p) & ~0x40000000, p); 346 readl(p); /* Flush the write - do not use sca_flush */ 347 udelay(1); 348 349 ramsize = sca_detect_ram(card, card->rambase, 350 pci_resource_len(pdev, 3)); 351 352 /* number of TX + RX buffers for one port - this is dual port card */ 353 i = ramsize / (2 * (sizeof(pkt_desc) + HDLC_MAX_MRU)); 354 card->tx_ring_buffers = min(i / 2, MAX_TX_BUFFERS); 355 card->rx_ring_buffers = i - card->tx_ring_buffers; 356 357 card->buff_offset = 2 * sizeof(pkt_desc) * (card->tx_ring_buffers + 358 card->rx_ring_buffers); 359 360 printk(KERN_INFO "pci200syn: %u KB RAM at 0x%x, IRQ%u, using %u TX +" 361 " %u RX packets rings\n", ramsize / 1024, ramphys, 362 pdev->irq, card->tx_ring_buffers, card->rx_ring_buffers); 363 364 if (card->tx_ring_buffers < 1) { 365 printk(KERN_ERR "pci200syn: RAM test failed\n"); 366 pci200_pci_remove_one(pdev); 367 return -EFAULT; 368 } 369 370 /* Enable interrupts on the PCI bridge */ 371 p = &card->plxbase->intr_ctrl_stat; 372 writew(readw(p) | 0x0040, p); 373 374 /* Allocate IRQ */ 375 if (request_irq(pdev->irq, sca_intr, IRQF_SHARED, "pci200syn", card)) { 376 printk(KERN_WARNING "pci200syn: could not allocate IRQ%d.\n", 377 pdev->irq); 378 pci200_pci_remove_one(pdev); 379 return -EBUSY; 380 } 381 card->irq = pdev->irq; 382 383 sca_init(card, 0); 384 385 for (i = 0; i < 2; i++) { 386 port_t *port = &card->ports[i]; 387 struct net_device *dev = port->netdev; 388 hdlc_device *hdlc = dev_to_hdlc(dev); 389 port->chan = i; 390 391 spin_lock_init(&port->lock); 392 dev->irq = card->irq; 393 dev->mem_start = ramphys; 394 dev->mem_end = ramphys + ramsize - 1; 395 dev->tx_queue_len = 50; 396 dev->netdev_ops = &pci200_ops; 397 hdlc->attach = sca_attach; 398 hdlc->xmit = sca_xmit; 399 port->settings.clock_type = CLOCK_EXT; 400 port->card = card; 401 sca_init_port(port); 402 if (register_hdlc_device(dev)) { 403 printk(KERN_ERR "pci200syn: unable to register hdlc " 404 "device\n"); 405 port->card = NULL; 406 pci200_pci_remove_one(pdev); 407 return -ENOBUFS; 408 } 409 410 printk(KERN_INFO "%s: PCI200SYN channel %d\n", 411 dev->name, port->chan); 412 } 413 414 sca_flush(card); 415 return 0; 416 } 417 418 419 420 static DEFINE_PCI_DEVICE_TABLE(pci200_pci_tbl) = { 421 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9050, PCI_VENDOR_ID_PLX, 422 PCI_DEVICE_ID_PLX_PCI200SYN, 0, 0, 0 }, 423 { 0, } 424 }; 425 426 427 static struct pci_driver pci200_pci_driver = { 428 .name = "PCI200SYN", 429 .id_table = pci200_pci_tbl, 430 .probe = pci200_pci_init_one, 431 .remove = pci200_pci_remove_one, 432 }; 433 434 435 static int __init pci200_init_module(void) 436 { 437 if (pci_clock_freq < 1000000 || pci_clock_freq > 80000000) { 438 printk(KERN_ERR "pci200syn: Invalid PCI clock frequency\n"); 439 return -EINVAL; 440 } 441 return pci_register_driver(&pci200_pci_driver); 442 } 443 444 445 446 static void __exit pci200_cleanup_module(void) 447 { 448 pci_unregister_driver(&pci200_pci_driver); 449 } 450 451 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>"); 452 MODULE_DESCRIPTION("Goramo PCI200SYN serial port driver"); 453 MODULE_LICENSE("GPL v2"); 454 MODULE_DEVICE_TABLE(pci, pci200_pci_tbl); 455 module_param(pci_clock_freq, int, 0444); 456 MODULE_PARM_DESC(pci_clock_freq, "System PCI clock frequency in Hz"); 457 module_init(pci200_init_module); 458 module_exit(pci200_cleanup_module); 459