1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21 #include <linux/module.h> 22 #include <linux/kmod.h> 23 #include <linux/init.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/mii.h> 28 #include <linux/usb.h> 29 #include <linux/crc32.h> 30 #include <linux/usb/usbnet.h> 31 #include "smsc95xx.h" 32 33 #define SMSC_CHIPNAME "smsc95xx" 34 #define SMSC_DRIVER_VERSION "1.0.4" 35 #define HS_USB_PKT_SIZE (512) 36 #define FS_USB_PKT_SIZE (64) 37 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 38 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 39 #define DEFAULT_BULK_IN_DELAY (0x00002000) 40 #define MAX_SINGLE_PACKET_SIZE (2048) 41 #define LAN95XX_EEPROM_MAGIC (0x9500) 42 #define EEPROM_MAC_OFFSET (0x01) 43 #define DEFAULT_TX_CSUM_ENABLE (true) 44 #define DEFAULT_RX_CSUM_ENABLE (true) 45 #define SMSC95XX_INTERNAL_PHY_ID (1) 46 #define SMSC95XX_TX_OVERHEAD (8) 47 #define SMSC95XX_TX_OVERHEAD_CSUM (12) 48 49 struct smsc95xx_priv { 50 u32 mac_cr; 51 spinlock_t mac_cr_lock; 52 bool use_tx_csum; 53 bool use_rx_csum; 54 }; 55 56 struct usb_context { 57 struct usb_ctrlrequest req; 58 struct usbnet *dev; 59 }; 60 61 static int turbo_mode = true; 62 module_param(turbo_mode, bool, 0644); 63 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 64 65 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) 66 { 67 u32 *buf = kmalloc(4, GFP_KERNEL); 68 int ret; 69 70 BUG_ON(!dev); 71 72 if (!buf) 73 return -ENOMEM; 74 75 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 76 USB_VENDOR_REQUEST_READ_REGISTER, 77 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 78 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 79 80 if (unlikely(ret < 0)) 81 devwarn(dev, "Failed to read register index 0x%08x", index); 82 83 le32_to_cpus(buf); 84 *data = *buf; 85 kfree(buf); 86 87 return ret; 88 } 89 90 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data) 91 { 92 u32 *buf = kmalloc(4, GFP_KERNEL); 93 int ret; 94 95 BUG_ON(!dev); 96 97 if (!buf) 98 return -ENOMEM; 99 100 *buf = data; 101 cpu_to_le32s(buf); 102 103 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 104 USB_VENDOR_REQUEST_WRITE_REGISTER, 105 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 106 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 107 108 if (unlikely(ret < 0)) 109 devwarn(dev, "Failed to write register index 0x%08x", index); 110 111 kfree(buf); 112 113 return ret; 114 } 115 116 /* Loop until the read is completed with timeout 117 * called with phy_mutex held */ 118 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev) 119 { 120 unsigned long start_time = jiffies; 121 u32 val; 122 123 do { 124 smsc95xx_read_reg(dev, MII_ADDR, &val); 125 if (!(val & MII_BUSY_)) 126 return 0; 127 } while (!time_after(jiffies, start_time + HZ)); 128 129 return -EIO; 130 } 131 132 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 133 { 134 struct usbnet *dev = netdev_priv(netdev); 135 u32 val, addr; 136 137 mutex_lock(&dev->phy_mutex); 138 139 /* confirm MII not busy */ 140 if (smsc95xx_phy_wait_not_busy(dev)) { 141 devwarn(dev, "MII is busy in smsc95xx_mdio_read"); 142 mutex_unlock(&dev->phy_mutex); 143 return -EIO; 144 } 145 146 /* set the address, index & direction (read from PHY) */ 147 phy_id &= dev->mii.phy_id_mask; 148 idx &= dev->mii.reg_num_mask; 149 addr = (phy_id << 11) | (idx << 6) | MII_READ_; 150 smsc95xx_write_reg(dev, MII_ADDR, addr); 151 152 if (smsc95xx_phy_wait_not_busy(dev)) { 153 devwarn(dev, "Timed out reading MII reg %02X", idx); 154 mutex_unlock(&dev->phy_mutex); 155 return -EIO; 156 } 157 158 smsc95xx_read_reg(dev, MII_DATA, &val); 159 160 mutex_unlock(&dev->phy_mutex); 161 162 return (u16)(val & 0xFFFF); 163 } 164 165 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 166 int regval) 167 { 168 struct usbnet *dev = netdev_priv(netdev); 169 u32 val, addr; 170 171 mutex_lock(&dev->phy_mutex); 172 173 /* confirm MII not busy */ 174 if (smsc95xx_phy_wait_not_busy(dev)) { 175 devwarn(dev, "MII is busy in smsc95xx_mdio_write"); 176 mutex_unlock(&dev->phy_mutex); 177 return; 178 } 179 180 val = regval; 181 smsc95xx_write_reg(dev, MII_DATA, val); 182 183 /* set the address, index & direction (write to PHY) */ 184 phy_id &= dev->mii.phy_id_mask; 185 idx &= dev->mii.reg_num_mask; 186 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; 187 smsc95xx_write_reg(dev, MII_ADDR, addr); 188 189 if (smsc95xx_phy_wait_not_busy(dev)) 190 devwarn(dev, "Timed out writing MII reg %02X", idx); 191 192 mutex_unlock(&dev->phy_mutex); 193 } 194 195 static int smsc95xx_wait_eeprom(struct usbnet *dev) 196 { 197 unsigned long start_time = jiffies; 198 u32 val; 199 200 do { 201 smsc95xx_read_reg(dev, E2P_CMD, &val); 202 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 203 break; 204 udelay(40); 205 } while (!time_after(jiffies, start_time + HZ)); 206 207 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 208 devwarn(dev, "EEPROM read operation timeout"); 209 return -EIO; 210 } 211 212 return 0; 213 } 214 215 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 216 { 217 unsigned long start_time = jiffies; 218 u32 val; 219 220 do { 221 smsc95xx_read_reg(dev, E2P_CMD, &val); 222 223 if (!(val & E2P_CMD_BUSY_)) 224 return 0; 225 226 udelay(40); 227 } while (!time_after(jiffies, start_time + HZ)); 228 229 devwarn(dev, "EEPROM is busy"); 230 return -EIO; 231 } 232 233 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 234 u8 *data) 235 { 236 u32 val; 237 int i, ret; 238 239 BUG_ON(!dev); 240 BUG_ON(!data); 241 242 ret = smsc95xx_eeprom_confirm_not_busy(dev); 243 if (ret) 244 return ret; 245 246 for (i = 0; i < length; i++) { 247 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 248 smsc95xx_write_reg(dev, E2P_CMD, val); 249 250 ret = smsc95xx_wait_eeprom(dev); 251 if (ret < 0) 252 return ret; 253 254 smsc95xx_read_reg(dev, E2P_DATA, &val); 255 256 data[i] = val & 0xFF; 257 offset++; 258 } 259 260 return 0; 261 } 262 263 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 264 u8 *data) 265 { 266 u32 val; 267 int i, ret; 268 269 BUG_ON(!dev); 270 BUG_ON(!data); 271 272 ret = smsc95xx_eeprom_confirm_not_busy(dev); 273 if (ret) 274 return ret; 275 276 /* Issue write/erase enable command */ 277 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 278 smsc95xx_write_reg(dev, E2P_CMD, val); 279 280 ret = smsc95xx_wait_eeprom(dev); 281 if (ret < 0) 282 return ret; 283 284 for (i = 0; i < length; i++) { 285 286 /* Fill data register */ 287 val = data[i]; 288 smsc95xx_write_reg(dev, E2P_DATA, val); 289 290 /* Send "write" command */ 291 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 292 smsc95xx_write_reg(dev, E2P_CMD, val); 293 294 ret = smsc95xx_wait_eeprom(dev); 295 if (ret < 0) 296 return ret; 297 298 offset++; 299 } 300 301 return 0; 302 } 303 304 static void smsc95xx_async_cmd_callback(struct urb *urb) 305 { 306 struct usb_context *usb_context = urb->context; 307 struct usbnet *dev = usb_context->dev; 308 int status = urb->status; 309 310 if (status < 0) 311 devwarn(dev, "async callback failed with %d", status); 312 313 kfree(usb_context); 314 usb_free_urb(urb); 315 } 316 317 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data) 318 { 319 struct usb_context *usb_context; 320 int status; 321 struct urb *urb; 322 const u16 size = 4; 323 324 urb = usb_alloc_urb(0, GFP_ATOMIC); 325 if (!urb) { 326 devwarn(dev, "Error allocating URB"); 327 return -ENOMEM; 328 } 329 330 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC); 331 if (usb_context == NULL) { 332 devwarn(dev, "Error allocating control msg"); 333 usb_free_urb(urb); 334 return -ENOMEM; 335 } 336 337 usb_context->req.bRequestType = 338 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 339 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER; 340 usb_context->req.wValue = 00; 341 usb_context->req.wIndex = cpu_to_le16(index); 342 usb_context->req.wLength = cpu_to_le16(size); 343 344 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0), 345 (void *)&usb_context->req, data, size, 346 smsc95xx_async_cmd_callback, 347 (void *)usb_context); 348 349 status = usb_submit_urb(urb, GFP_ATOMIC); 350 if (status < 0) { 351 devwarn(dev, "Error submitting control msg, sts=%d", status); 352 kfree(usb_context); 353 usb_free_urb(urb); 354 } 355 356 return status; 357 } 358 359 /* returns hash bit number for given MAC address 360 * example: 361 * 01 00 5E 00 00 01 -> returns bit number 31 */ 362 static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 363 { 364 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 365 } 366 367 static void smsc95xx_set_multicast(struct net_device *netdev) 368 { 369 struct usbnet *dev = netdev_priv(netdev); 370 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 371 u32 hash_hi = 0; 372 u32 hash_lo = 0; 373 unsigned long flags; 374 375 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 376 377 if (dev->net->flags & IFF_PROMISC) { 378 if (netif_msg_drv(dev)) 379 devdbg(dev, "promiscuous mode enabled"); 380 pdata->mac_cr |= MAC_CR_PRMS_; 381 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 382 } else if (dev->net->flags & IFF_ALLMULTI) { 383 if (netif_msg_drv(dev)) 384 devdbg(dev, "receive all multicast enabled"); 385 pdata->mac_cr |= MAC_CR_MCPAS_; 386 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 387 } else if (dev->net->mc_count > 0) { 388 struct dev_mc_list *mc_list = dev->net->mc_list; 389 int count = 0; 390 391 pdata->mac_cr |= MAC_CR_HPFILT_; 392 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 393 394 while (mc_list) { 395 count++; 396 if (mc_list->dmi_addrlen == ETH_ALEN) { 397 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr); 398 u32 mask = 0x01 << (bitnum & 0x1F); 399 if (bitnum & 0x20) 400 hash_hi |= mask; 401 else 402 hash_lo |= mask; 403 } else { 404 devwarn(dev, "dmi_addrlen != 6"); 405 } 406 mc_list = mc_list->next; 407 } 408 409 if (count != ((u32)dev->net->mc_count)) 410 devwarn(dev, "mc_count != dev->mc_count"); 411 412 if (netif_msg_drv(dev)) 413 devdbg(dev, "HASHH=0x%08X, HASHL=0x%08X", hash_hi, 414 hash_lo); 415 } else { 416 if (netif_msg_drv(dev)) 417 devdbg(dev, "receive own packets only"); 418 pdata->mac_cr &= 419 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 420 } 421 422 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 423 424 /* Initiate async writes, as we can't wait for completion here */ 425 smsc95xx_write_reg_async(dev, HASHH, &hash_hi); 426 smsc95xx_write_reg_async(dev, HASHL, &hash_lo); 427 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr); 428 } 429 430 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 431 u16 lcladv, u16 rmtadv) 432 { 433 u32 flow, afc_cfg = 0; 434 435 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 436 if (ret < 0) { 437 devwarn(dev, "error reading AFC_CFG"); 438 return; 439 } 440 441 if (duplex == DUPLEX_FULL) { 442 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 443 444 if (cap & FLOW_CTRL_RX) 445 flow = 0xFFFF0002; 446 else 447 flow = 0; 448 449 if (cap & FLOW_CTRL_TX) 450 afc_cfg |= 0xF; 451 else 452 afc_cfg &= ~0xF; 453 454 if (netif_msg_link(dev)) 455 devdbg(dev, "rx pause %s, tx pause %s", 456 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 457 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 458 } else { 459 if (netif_msg_link(dev)) 460 devdbg(dev, "half duplex"); 461 flow = 0; 462 afc_cfg |= 0xF; 463 } 464 465 smsc95xx_write_reg(dev, FLOW, flow); 466 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 467 } 468 469 static int smsc95xx_link_reset(struct usbnet *dev) 470 { 471 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 472 struct mii_if_info *mii = &dev->mii; 473 struct ethtool_cmd ecmd; 474 unsigned long flags; 475 u16 lcladv, rmtadv; 476 u32 intdata; 477 478 /* clear interrupt status */ 479 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 480 intdata = 0xFFFFFFFF; 481 smsc95xx_write_reg(dev, INT_STS, intdata); 482 483 mii_check_media(mii, 1, 1); 484 mii_ethtool_gset(&dev->mii, &ecmd); 485 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 486 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 487 488 if (netif_msg_link(dev)) 489 devdbg(dev, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x", 490 ecmd.speed, ecmd.duplex, lcladv, rmtadv); 491 492 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 493 if (ecmd.duplex != DUPLEX_FULL) { 494 pdata->mac_cr &= ~MAC_CR_FDPX_; 495 pdata->mac_cr |= MAC_CR_RCVOWN_; 496 } else { 497 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 498 pdata->mac_cr |= MAC_CR_FDPX_; 499 } 500 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 501 502 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 503 504 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 505 506 return 0; 507 } 508 509 static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 510 { 511 u32 intdata; 512 513 if (urb->actual_length != 4) { 514 devwarn(dev, "unexpected urb length %d", urb->actual_length); 515 return; 516 } 517 518 memcpy(&intdata, urb->transfer_buffer, 4); 519 le32_to_cpus(&intdata); 520 521 if (netif_msg_link(dev)) 522 devdbg(dev, "intdata: 0x%08X", intdata); 523 524 if (intdata & INT_ENP_PHY_INT_) 525 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 526 else 527 devwarn(dev, "unexpected interrupt, intdata=0x%08X", intdata); 528 } 529 530 /* Enable or disable Tx & Rx checksum offload engines */ 531 static int smsc95xx_set_csums(struct usbnet *dev) 532 { 533 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 534 u32 read_buf; 535 int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 536 if (ret < 0) { 537 devwarn(dev, "Failed to read COE_CR: %d", ret); 538 return ret; 539 } 540 541 if (pdata->use_tx_csum) 542 read_buf |= Tx_COE_EN_; 543 else 544 read_buf &= ~Tx_COE_EN_; 545 546 if (pdata->use_rx_csum) 547 read_buf |= Rx_COE_EN_; 548 else 549 read_buf &= ~Rx_COE_EN_; 550 551 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 552 if (ret < 0) { 553 devwarn(dev, "Failed to write COE_CR: %d", ret); 554 return ret; 555 } 556 557 if (netif_msg_hw(dev)) 558 devdbg(dev, "COE_CR = 0x%08x", read_buf); 559 return 0; 560 } 561 562 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 563 { 564 return MAX_EEPROM_SIZE; 565 } 566 567 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 568 struct ethtool_eeprom *ee, u8 *data) 569 { 570 struct usbnet *dev = netdev_priv(netdev); 571 572 ee->magic = LAN95XX_EEPROM_MAGIC; 573 574 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 575 } 576 577 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 578 struct ethtool_eeprom *ee, u8 *data) 579 { 580 struct usbnet *dev = netdev_priv(netdev); 581 582 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 583 devwarn(dev, "EEPROM: magic value mismatch, magic = 0x%x", 584 ee->magic); 585 return -EINVAL; 586 } 587 588 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 589 } 590 591 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev) 592 { 593 struct usbnet *dev = netdev_priv(netdev); 594 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 595 596 return pdata->use_rx_csum; 597 } 598 599 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val) 600 { 601 struct usbnet *dev = netdev_priv(netdev); 602 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 603 604 pdata->use_rx_csum = !!val; 605 606 return smsc95xx_set_csums(dev); 607 } 608 609 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev) 610 { 611 struct usbnet *dev = netdev_priv(netdev); 612 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 613 614 return pdata->use_tx_csum; 615 } 616 617 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val) 618 { 619 struct usbnet *dev = netdev_priv(netdev); 620 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 621 622 pdata->use_tx_csum = !!val; 623 624 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum); 625 return smsc95xx_set_csums(dev); 626 } 627 628 static const struct ethtool_ops smsc95xx_ethtool_ops = { 629 .get_link = usbnet_get_link, 630 .nway_reset = usbnet_nway_reset, 631 .get_drvinfo = usbnet_get_drvinfo, 632 .get_msglevel = usbnet_get_msglevel, 633 .set_msglevel = usbnet_set_msglevel, 634 .get_settings = usbnet_get_settings, 635 .set_settings = usbnet_set_settings, 636 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 637 .get_eeprom = smsc95xx_ethtool_get_eeprom, 638 .set_eeprom = smsc95xx_ethtool_set_eeprom, 639 .get_tx_csum = smsc95xx_ethtool_get_tx_csum, 640 .set_tx_csum = smsc95xx_ethtool_set_tx_csum, 641 .get_rx_csum = smsc95xx_ethtool_get_rx_csum, 642 .set_rx_csum = smsc95xx_ethtool_set_rx_csum, 643 }; 644 645 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 646 { 647 struct usbnet *dev = netdev_priv(netdev); 648 649 if (!netif_running(netdev)) 650 return -EINVAL; 651 652 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 653 } 654 655 static void smsc95xx_init_mac_address(struct usbnet *dev) 656 { 657 /* try reading mac address from EEPROM */ 658 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 659 dev->net->dev_addr) == 0) { 660 if (is_valid_ether_addr(dev->net->dev_addr)) { 661 /* eeprom values are valid so use them */ 662 if (netif_msg_ifup(dev)) 663 devdbg(dev, "MAC address read from EEPROM"); 664 return; 665 } 666 } 667 668 /* no eeprom, or eeprom values are invalid. generate random MAC */ 669 random_ether_addr(dev->net->dev_addr); 670 if (netif_msg_ifup(dev)) 671 devdbg(dev, "MAC address set to random_ether_addr"); 672 } 673 674 static int smsc95xx_set_mac_address(struct usbnet *dev) 675 { 676 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 677 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 678 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 679 int ret; 680 681 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 682 if (ret < 0) { 683 devwarn(dev, "Failed to write ADDRL: %d", ret); 684 return ret; 685 } 686 687 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 688 if (ret < 0) { 689 devwarn(dev, "Failed to write ADDRH: %d", ret); 690 return ret; 691 } 692 693 return 0; 694 } 695 696 /* starts the TX path */ 697 static void smsc95xx_start_tx_path(struct usbnet *dev) 698 { 699 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 700 unsigned long flags; 701 u32 reg_val; 702 703 /* Enable Tx at MAC */ 704 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 705 pdata->mac_cr |= MAC_CR_TXEN_; 706 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 707 708 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 709 710 /* Enable Tx at SCSRs */ 711 reg_val = TX_CFG_ON_; 712 smsc95xx_write_reg(dev, TX_CFG, reg_val); 713 } 714 715 /* Starts the Receive path */ 716 static void smsc95xx_start_rx_path(struct usbnet *dev) 717 { 718 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 719 unsigned long flags; 720 721 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 722 pdata->mac_cr |= MAC_CR_RXEN_; 723 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 724 725 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 726 } 727 728 static int smsc95xx_phy_initialize(struct usbnet *dev) 729 { 730 /* Initialize MII structure */ 731 dev->mii.dev = dev->net; 732 dev->mii.mdio_read = smsc95xx_mdio_read; 733 dev->mii.mdio_write = smsc95xx_mdio_write; 734 dev->mii.phy_id_mask = 0x1f; 735 dev->mii.reg_num_mask = 0x1f; 736 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 737 738 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 739 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 740 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 741 ADVERTISE_PAUSE_ASYM); 742 743 /* read to clear */ 744 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 745 746 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 747 PHY_INT_MASK_DEFAULT_); 748 mii_nway_restart(&dev->mii); 749 750 if (netif_msg_ifup(dev)) 751 devdbg(dev, "phy initialised succesfully"); 752 return 0; 753 } 754 755 static int smsc95xx_reset(struct usbnet *dev) 756 { 757 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 758 struct net_device *netdev = dev->net; 759 u32 read_buf, write_buf, burst_cap; 760 int ret = 0, timeout; 761 762 if (netif_msg_ifup(dev)) 763 devdbg(dev, "entering smsc95xx_reset"); 764 765 write_buf = HW_CFG_LRST_; 766 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf); 767 if (ret < 0) { 768 devwarn(dev, "Failed to write HW_CFG_LRST_ bit in HW_CFG " 769 "register, ret = %d", ret); 770 return ret; 771 } 772 773 timeout = 0; 774 do { 775 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 776 if (ret < 0) { 777 devwarn(dev, "Failed to read HW_CFG: %d", ret); 778 return ret; 779 } 780 msleep(10); 781 timeout++; 782 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 783 784 if (timeout >= 100) { 785 devwarn(dev, "timeout waiting for completion of Lite Reset"); 786 return ret; 787 } 788 789 write_buf = PM_CTL_PHY_RST_; 790 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf); 791 if (ret < 0) { 792 devwarn(dev, "Failed to write PM_CTRL: %d", ret); 793 return ret; 794 } 795 796 timeout = 0; 797 do { 798 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 799 if (ret < 0) { 800 devwarn(dev, "Failed to read PM_CTRL: %d", ret); 801 return ret; 802 } 803 msleep(10); 804 timeout++; 805 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 806 807 if (timeout >= 100) { 808 devwarn(dev, "timeout waiting for PHY Reset"); 809 return ret; 810 } 811 812 smsc95xx_init_mac_address(dev); 813 814 ret = smsc95xx_set_mac_address(dev); 815 if (ret < 0) 816 return ret; 817 818 if (netif_msg_ifup(dev)) 819 devdbg(dev, "MAC Address: %pM", dev->net->dev_addr); 820 821 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 822 if (ret < 0) { 823 devwarn(dev, "Failed to read HW_CFG: %d", ret); 824 return ret; 825 } 826 827 if (netif_msg_ifup(dev)) 828 devdbg(dev, "Read Value from HW_CFG : 0x%08x", read_buf); 829 830 read_buf |= HW_CFG_BIR_; 831 832 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 833 if (ret < 0) { 834 devwarn(dev, "Failed to write HW_CFG_BIR_ bit in HW_CFG " 835 "register, ret = %d", ret); 836 return ret; 837 } 838 839 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 840 if (ret < 0) { 841 devwarn(dev, "Failed to read HW_CFG: %d", ret); 842 return ret; 843 } 844 if (netif_msg_ifup(dev)) 845 devdbg(dev, "Read Value from HW_CFG after writing " 846 "HW_CFG_BIR_: 0x%08x", read_buf); 847 848 if (!turbo_mode) { 849 burst_cap = 0; 850 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 851 } else if (dev->udev->speed == USB_SPEED_HIGH) { 852 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 853 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 854 } else { 855 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 856 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 857 } 858 859 if (netif_msg_ifup(dev)) 860 devdbg(dev, "rx_urb_size=%ld", (ulong)dev->rx_urb_size); 861 862 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 863 if (ret < 0) { 864 devwarn(dev, "Failed to write BURST_CAP: %d", ret); 865 return ret; 866 } 867 868 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 869 if (ret < 0) { 870 devwarn(dev, "Failed to read BURST_CAP: %d", ret); 871 return ret; 872 } 873 if (netif_msg_ifup(dev)) 874 devdbg(dev, "Read Value from BURST_CAP after writing: 0x%08x", 875 read_buf); 876 877 read_buf = DEFAULT_BULK_IN_DELAY; 878 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf); 879 if (ret < 0) { 880 devwarn(dev, "ret = %d", ret); 881 return ret; 882 } 883 884 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 885 if (ret < 0) { 886 devwarn(dev, "Failed to read BULK_IN_DLY: %d", ret); 887 return ret; 888 } 889 if (netif_msg_ifup(dev)) 890 devdbg(dev, "Read Value from BULK_IN_DLY after writing: " 891 "0x%08x", read_buf); 892 893 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 894 if (ret < 0) { 895 devwarn(dev, "Failed to read HW_CFG: %d", ret); 896 return ret; 897 } 898 if (netif_msg_ifup(dev)) 899 devdbg(dev, "Read Value from HW_CFG: 0x%08x", read_buf); 900 901 if (turbo_mode) 902 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 903 904 read_buf &= ~HW_CFG_RXDOFF_; 905 906 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 907 read_buf |= NET_IP_ALIGN << 9; 908 909 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 910 if (ret < 0) { 911 devwarn(dev, "Failed to write HW_CFG register, ret=%d", ret); 912 return ret; 913 } 914 915 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 916 if (ret < 0) { 917 devwarn(dev, "Failed to read HW_CFG: %d", ret); 918 return ret; 919 } 920 if (netif_msg_ifup(dev)) 921 devdbg(dev, "Read Value from HW_CFG after writing: 0x%08x", 922 read_buf); 923 924 write_buf = 0xFFFFFFFF; 925 ret = smsc95xx_write_reg(dev, INT_STS, write_buf); 926 if (ret < 0) { 927 devwarn(dev, "Failed to write INT_STS register, ret=%d", ret); 928 return ret; 929 } 930 931 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 932 if (ret < 0) { 933 devwarn(dev, "Failed to read ID_REV: %d", ret); 934 return ret; 935 } 936 if (netif_msg_ifup(dev)) 937 devdbg(dev, "ID_REV = 0x%08x", read_buf); 938 939 /* Configure GPIO pins as LED outputs */ 940 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 941 LED_GPIO_CFG_FDX_LED; 942 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 943 if (ret < 0) { 944 devwarn(dev, "Failed to write LED_GPIO_CFG register, ret=%d", 945 ret); 946 return ret; 947 } 948 949 /* Init Tx */ 950 write_buf = 0; 951 ret = smsc95xx_write_reg(dev, FLOW, write_buf); 952 if (ret < 0) { 953 devwarn(dev, "Failed to write FLOW: %d", ret); 954 return ret; 955 } 956 957 read_buf = AFC_CFG_DEFAULT; 958 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf); 959 if (ret < 0) { 960 devwarn(dev, "Failed to write AFC_CFG: %d", ret); 961 return ret; 962 } 963 964 /* Don't need mac_cr_lock during initialisation */ 965 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 966 if (ret < 0) { 967 devwarn(dev, "Failed to read MAC_CR: %d", ret); 968 return ret; 969 } 970 971 /* Init Rx */ 972 /* Set Vlan */ 973 write_buf = (u32)ETH_P_8021Q; 974 ret = smsc95xx_write_reg(dev, VLAN1, write_buf); 975 if (ret < 0) { 976 devwarn(dev, "Failed to write VAN1: %d", ret); 977 return ret; 978 } 979 980 /* Enable or disable checksum offload engines */ 981 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum); 982 ret = smsc95xx_set_csums(dev); 983 if (ret < 0) { 984 devwarn(dev, "Failed to set csum offload: %d", ret); 985 return ret; 986 } 987 988 smsc95xx_set_multicast(dev->net); 989 990 if (smsc95xx_phy_initialize(dev) < 0) 991 return -EIO; 992 993 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 994 if (ret < 0) { 995 devwarn(dev, "Failed to read INT_EP_CTL: %d", ret); 996 return ret; 997 } 998 999 /* enable PHY interrupts */ 1000 read_buf |= INT_EP_CTL_PHY_INT_; 1001 1002 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 1003 if (ret < 0) { 1004 devwarn(dev, "Failed to write INT_EP_CTL: %d", ret); 1005 return ret; 1006 } 1007 1008 smsc95xx_start_tx_path(dev); 1009 smsc95xx_start_rx_path(dev); 1010 1011 if (netif_msg_ifup(dev)) 1012 devdbg(dev, "smsc95xx_reset, return 0"); 1013 return 0; 1014 } 1015 1016 static const struct net_device_ops smsc95xx_netdev_ops = { 1017 .ndo_open = usbnet_open, 1018 .ndo_stop = usbnet_stop, 1019 .ndo_start_xmit = usbnet_start_xmit, 1020 .ndo_tx_timeout = usbnet_tx_timeout, 1021 .ndo_change_mtu = usbnet_change_mtu, 1022 .ndo_set_mac_address = eth_mac_addr, 1023 .ndo_validate_addr = eth_validate_addr, 1024 .ndo_do_ioctl = smsc95xx_ioctl, 1025 .ndo_set_multicast_list = smsc95xx_set_multicast, 1026 }; 1027 1028 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 1029 { 1030 struct smsc95xx_priv *pdata = NULL; 1031 int ret; 1032 1033 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1034 1035 ret = usbnet_get_endpoints(dev, intf); 1036 if (ret < 0) { 1037 devwarn(dev, "usbnet_get_endpoints failed: %d", ret); 1038 return ret; 1039 } 1040 1041 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 1042 GFP_KERNEL); 1043 1044 pdata = (struct smsc95xx_priv *)(dev->data[0]); 1045 if (!pdata) { 1046 devwarn(dev, "Unable to allocate struct smsc95xx_priv"); 1047 return -ENOMEM; 1048 } 1049 1050 spin_lock_init(&pdata->mac_cr_lock); 1051 1052 pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE; 1053 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE; 1054 1055 /* Init all registers */ 1056 ret = smsc95xx_reset(dev); 1057 1058 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1059 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1060 dev->net->flags |= IFF_MULTICAST; 1061 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD; 1062 return 0; 1063 } 1064 1065 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1066 { 1067 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1068 if (pdata) { 1069 if (netif_msg_ifdown(dev)) 1070 devdbg(dev, "free pdata"); 1071 kfree(pdata); 1072 pdata = NULL; 1073 dev->data[0] = 0; 1074 } 1075 } 1076 1077 static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1078 { 1079 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1080 skb->ip_summed = CHECKSUM_COMPLETE; 1081 skb_trim(skb, skb->len - 2); 1082 } 1083 1084 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1085 { 1086 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1087 1088 while (skb->len > 0) { 1089 u32 header, align_count; 1090 struct sk_buff *ax_skb; 1091 unsigned char *packet; 1092 u16 size; 1093 1094 memcpy(&header, skb->data, sizeof(header)); 1095 le32_to_cpus(&header); 1096 skb_pull(skb, 4 + NET_IP_ALIGN); 1097 packet = skb->data; 1098 1099 /* get the packet length */ 1100 size = (u16)((header & RX_STS_FL_) >> 16); 1101 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1102 1103 if (unlikely(header & RX_STS_ES_)) { 1104 if (netif_msg_rx_err(dev)) 1105 devdbg(dev, "Error header=0x%08x", header); 1106 dev->net->stats.rx_errors++; 1107 dev->net->stats.rx_dropped++; 1108 1109 if (header & RX_STS_CRC_) { 1110 dev->net->stats.rx_crc_errors++; 1111 } else { 1112 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1113 dev->net->stats.rx_frame_errors++; 1114 1115 if ((header & RX_STS_LE_) && 1116 (!(header & RX_STS_FT_))) 1117 dev->net->stats.rx_length_errors++; 1118 } 1119 } else { 1120 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1121 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1122 if (netif_msg_rx_err(dev)) 1123 devdbg(dev, "size err header=0x%08x", 1124 header); 1125 return 0; 1126 } 1127 1128 /* last frame in this batch */ 1129 if (skb->len == size) { 1130 if (pdata->use_rx_csum) 1131 smsc95xx_rx_csum_offload(skb); 1132 skb_trim(skb, skb->len - 4); /* remove fcs */ 1133 skb->truesize = size + sizeof(struct sk_buff); 1134 1135 return 1; 1136 } 1137 1138 ax_skb = skb_clone(skb, GFP_ATOMIC); 1139 if (unlikely(!ax_skb)) { 1140 devwarn(dev, "Error allocating skb"); 1141 return 0; 1142 } 1143 1144 ax_skb->len = size; 1145 ax_skb->data = packet; 1146 skb_set_tail_pointer(ax_skb, size); 1147 1148 if (pdata->use_rx_csum) 1149 smsc95xx_rx_csum_offload(ax_skb); 1150 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1151 ax_skb->truesize = size + sizeof(struct sk_buff); 1152 1153 usbnet_skb_return(dev, ax_skb); 1154 } 1155 1156 skb_pull(skb, size); 1157 1158 /* padding bytes before the next frame starts */ 1159 if (skb->len) 1160 skb_pull(skb, align_count); 1161 } 1162 1163 if (unlikely(skb->len < 0)) { 1164 devwarn(dev, "invalid rx length<0 %d", skb->len); 1165 return 0; 1166 } 1167 1168 return 1; 1169 } 1170 1171 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1172 { 1173 int len = skb->data - skb->head; 1174 u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len); 1175 u16 low_16 = (u16)(skb->csum_start - len); 1176 return (high_16 << 16) | low_16; 1177 } 1178 1179 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1180 struct sk_buff *skb, gfp_t flags) 1181 { 1182 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1183 bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL); 1184 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1185 u32 tx_cmd_a, tx_cmd_b; 1186 1187 /* We do not advertise SG, so skbs should be already linearized */ 1188 BUG_ON(skb_shinfo(skb)->nr_frags); 1189 1190 if (skb_headroom(skb) < overhead) { 1191 struct sk_buff *skb2 = skb_copy_expand(skb, 1192 overhead, 0, flags); 1193 dev_kfree_skb_any(skb); 1194 skb = skb2; 1195 if (!skb) 1196 return NULL; 1197 } 1198 1199 if (csum) { 1200 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1201 skb_push(skb, 4); 1202 memcpy(skb->data, &csum_preamble, 4); 1203 } 1204 1205 skb_push(skb, 4); 1206 tx_cmd_b = (u32)(skb->len - 4); 1207 if (csum) 1208 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1209 cpu_to_le32s(&tx_cmd_b); 1210 memcpy(skb->data, &tx_cmd_b, 4); 1211 1212 skb_push(skb, 4); 1213 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1214 TX_CMD_A_LAST_SEG_; 1215 cpu_to_le32s(&tx_cmd_a); 1216 memcpy(skb->data, &tx_cmd_a, 4); 1217 1218 return skb; 1219 } 1220 1221 static const struct driver_info smsc95xx_info = { 1222 .description = "smsc95xx USB 2.0 Ethernet", 1223 .bind = smsc95xx_bind, 1224 .unbind = smsc95xx_unbind, 1225 .link_reset = smsc95xx_link_reset, 1226 .reset = smsc95xx_reset, 1227 .rx_fixup = smsc95xx_rx_fixup, 1228 .tx_fixup = smsc95xx_tx_fixup, 1229 .status = smsc95xx_status, 1230 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1231 }; 1232 1233 static const struct usb_device_id products[] = { 1234 { 1235 /* SMSC9500 USB Ethernet Device */ 1236 USB_DEVICE(0x0424, 0x9500), 1237 .driver_info = (unsigned long) &smsc95xx_info, 1238 }, 1239 { 1240 /* SMSC9505 USB Ethernet Device */ 1241 USB_DEVICE(0x0424, 0x9505), 1242 .driver_info = (unsigned long) &smsc95xx_info, 1243 }, 1244 { 1245 /* SMSC9500A USB Ethernet Device */ 1246 USB_DEVICE(0x0424, 0x9E00), 1247 .driver_info = (unsigned long) &smsc95xx_info, 1248 }, 1249 { 1250 /* SMSC9505A USB Ethernet Device */ 1251 USB_DEVICE(0x0424, 0x9E01), 1252 .driver_info = (unsigned long) &smsc95xx_info, 1253 }, 1254 { 1255 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1256 USB_DEVICE(0x0424, 0xec00), 1257 .driver_info = (unsigned long) &smsc95xx_info, 1258 }, 1259 { 1260 /* SMSC9500 USB Ethernet Device (SAL10) */ 1261 USB_DEVICE(0x0424, 0x9900), 1262 .driver_info = (unsigned long) &smsc95xx_info, 1263 }, 1264 { 1265 /* SMSC9505 USB Ethernet Device (SAL10) */ 1266 USB_DEVICE(0x0424, 0x9901), 1267 .driver_info = (unsigned long) &smsc95xx_info, 1268 }, 1269 { 1270 /* SMSC9500A USB Ethernet Device (SAL10) */ 1271 USB_DEVICE(0x0424, 0x9902), 1272 .driver_info = (unsigned long) &smsc95xx_info, 1273 }, 1274 { 1275 /* SMSC9505A USB Ethernet Device (SAL10) */ 1276 USB_DEVICE(0x0424, 0x9903), 1277 .driver_info = (unsigned long) &smsc95xx_info, 1278 }, 1279 { 1280 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1281 USB_DEVICE(0x0424, 0x9904), 1282 .driver_info = (unsigned long) &smsc95xx_info, 1283 }, 1284 { 1285 /* SMSC9500A USB Ethernet Device (HAL) */ 1286 USB_DEVICE(0x0424, 0x9905), 1287 .driver_info = (unsigned long) &smsc95xx_info, 1288 }, 1289 { 1290 /* SMSC9505A USB Ethernet Device (HAL) */ 1291 USB_DEVICE(0x0424, 0x9906), 1292 .driver_info = (unsigned long) &smsc95xx_info, 1293 }, 1294 { 1295 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1296 USB_DEVICE(0x0424, 0x9907), 1297 .driver_info = (unsigned long) &smsc95xx_info, 1298 }, 1299 { 1300 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1301 USB_DEVICE(0x0424, 0x9908), 1302 .driver_info = (unsigned long) &smsc95xx_info, 1303 }, 1304 { 1305 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1306 USB_DEVICE(0x0424, 0x9909), 1307 .driver_info = (unsigned long) &smsc95xx_info, 1308 }, 1309 { }, /* END */ 1310 }; 1311 MODULE_DEVICE_TABLE(usb, products); 1312 1313 static struct usb_driver smsc95xx_driver = { 1314 .name = "smsc95xx", 1315 .id_table = products, 1316 .probe = usbnet_probe, 1317 .suspend = usbnet_suspend, 1318 .resume = usbnet_resume, 1319 .disconnect = usbnet_disconnect, 1320 }; 1321 1322 static int __init smsc95xx_init(void) 1323 { 1324 return usb_register(&smsc95xx_driver); 1325 } 1326 module_init(smsc95xx_init); 1327 1328 static void __exit smsc95xx_exit(void) 1329 { 1330 usb_deregister(&smsc95xx_driver); 1331 } 1332 module_exit(smsc95xx_exit); 1333 1334 MODULE_AUTHOR("Nancy Lin"); 1335 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1336 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 1337 MODULE_LICENSE("GPL"); 1338