1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21 #include <linux/module.h> 22 #include <linux/kmod.h> 23 #include <linux/init.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/mii.h> 28 #include <linux/usb.h> 29 #include <linux/crc32.h> 30 #include <linux/usb/usbnet.h> 31 #include <linux/slab.h> 32 #include "smsc95xx.h" 33 34 #define SMSC_CHIPNAME "smsc95xx" 35 #define SMSC_DRIVER_VERSION "1.0.4" 36 #define HS_USB_PKT_SIZE (512) 37 #define FS_USB_PKT_SIZE (64) 38 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 39 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 40 #define DEFAULT_BULK_IN_DELAY (0x00002000) 41 #define MAX_SINGLE_PACKET_SIZE (2048) 42 #define LAN95XX_EEPROM_MAGIC (0x9500) 43 #define EEPROM_MAC_OFFSET (0x01) 44 #define DEFAULT_TX_CSUM_ENABLE (true) 45 #define DEFAULT_RX_CSUM_ENABLE (true) 46 #define SMSC95XX_INTERNAL_PHY_ID (1) 47 #define SMSC95XX_TX_OVERHEAD (8) 48 #define SMSC95XX_TX_OVERHEAD_CSUM (12) 49 50 struct smsc95xx_priv { 51 u32 mac_cr; 52 u32 hash_hi; 53 u32 hash_lo; 54 spinlock_t mac_cr_lock; 55 }; 56 57 struct usb_context { 58 struct usb_ctrlrequest req; 59 struct usbnet *dev; 60 }; 61 62 static bool turbo_mode = true; 63 module_param(turbo_mode, bool, 0644); 64 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 65 66 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) 67 { 68 u32 *buf = kmalloc(4, GFP_KERNEL); 69 int ret; 70 71 BUG_ON(!dev); 72 73 if (!buf) 74 return -ENOMEM; 75 76 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 77 USB_VENDOR_REQUEST_READ_REGISTER, 78 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 79 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 80 81 if (unlikely(ret < 0)) 82 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index); 83 84 le32_to_cpus(buf); 85 *data = *buf; 86 kfree(buf); 87 88 return ret; 89 } 90 91 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data) 92 { 93 u32 *buf = kmalloc(4, GFP_KERNEL); 94 int ret; 95 96 BUG_ON(!dev); 97 98 if (!buf) 99 return -ENOMEM; 100 101 *buf = data; 102 cpu_to_le32s(buf); 103 104 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 105 USB_VENDOR_REQUEST_WRITE_REGISTER, 106 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 107 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 108 109 if (unlikely(ret < 0)) 110 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index); 111 112 kfree(buf); 113 114 return ret; 115 } 116 117 /* Loop until the read is completed with timeout 118 * called with phy_mutex held */ 119 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev) 120 { 121 unsigned long start_time = jiffies; 122 u32 val; 123 124 do { 125 smsc95xx_read_reg(dev, MII_ADDR, &val); 126 if (!(val & MII_BUSY_)) 127 return 0; 128 } while (!time_after(jiffies, start_time + HZ)); 129 130 return -EIO; 131 } 132 133 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 134 { 135 struct usbnet *dev = netdev_priv(netdev); 136 u32 val, addr; 137 138 mutex_lock(&dev->phy_mutex); 139 140 /* confirm MII not busy */ 141 if (smsc95xx_phy_wait_not_busy(dev)) { 142 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 143 mutex_unlock(&dev->phy_mutex); 144 return -EIO; 145 } 146 147 /* set the address, index & direction (read from PHY) */ 148 phy_id &= dev->mii.phy_id_mask; 149 idx &= dev->mii.reg_num_mask; 150 addr = (phy_id << 11) | (idx << 6) | MII_READ_; 151 smsc95xx_write_reg(dev, MII_ADDR, addr); 152 153 if (smsc95xx_phy_wait_not_busy(dev)) { 154 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 155 mutex_unlock(&dev->phy_mutex); 156 return -EIO; 157 } 158 159 smsc95xx_read_reg(dev, MII_DATA, &val); 160 161 mutex_unlock(&dev->phy_mutex); 162 163 return (u16)(val & 0xFFFF); 164 } 165 166 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 167 int regval) 168 { 169 struct usbnet *dev = netdev_priv(netdev); 170 u32 val, addr; 171 172 mutex_lock(&dev->phy_mutex); 173 174 /* confirm MII not busy */ 175 if (smsc95xx_phy_wait_not_busy(dev)) { 176 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 177 mutex_unlock(&dev->phy_mutex); 178 return; 179 } 180 181 val = regval; 182 smsc95xx_write_reg(dev, MII_DATA, val); 183 184 /* set the address, index & direction (write to PHY) */ 185 phy_id &= dev->mii.phy_id_mask; 186 idx &= dev->mii.reg_num_mask; 187 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; 188 smsc95xx_write_reg(dev, MII_ADDR, addr); 189 190 if (smsc95xx_phy_wait_not_busy(dev)) 191 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 192 193 mutex_unlock(&dev->phy_mutex); 194 } 195 196 static int smsc95xx_wait_eeprom(struct usbnet *dev) 197 { 198 unsigned long start_time = jiffies; 199 u32 val; 200 201 do { 202 smsc95xx_read_reg(dev, E2P_CMD, &val); 203 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 204 break; 205 udelay(40); 206 } while (!time_after(jiffies, start_time + HZ)); 207 208 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 209 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 210 return -EIO; 211 } 212 213 return 0; 214 } 215 216 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 217 { 218 unsigned long start_time = jiffies; 219 u32 val; 220 221 do { 222 smsc95xx_read_reg(dev, E2P_CMD, &val); 223 224 if (!(val & E2P_CMD_BUSY_)) 225 return 0; 226 227 udelay(40); 228 } while (!time_after(jiffies, start_time + HZ)); 229 230 netdev_warn(dev->net, "EEPROM is busy\n"); 231 return -EIO; 232 } 233 234 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 235 u8 *data) 236 { 237 u32 val; 238 int i, ret; 239 240 BUG_ON(!dev); 241 BUG_ON(!data); 242 243 ret = smsc95xx_eeprom_confirm_not_busy(dev); 244 if (ret) 245 return ret; 246 247 for (i = 0; i < length; i++) { 248 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 249 smsc95xx_write_reg(dev, E2P_CMD, val); 250 251 ret = smsc95xx_wait_eeprom(dev); 252 if (ret < 0) 253 return ret; 254 255 smsc95xx_read_reg(dev, E2P_DATA, &val); 256 257 data[i] = val & 0xFF; 258 offset++; 259 } 260 261 return 0; 262 } 263 264 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 265 u8 *data) 266 { 267 u32 val; 268 int i, ret; 269 270 BUG_ON(!dev); 271 BUG_ON(!data); 272 273 ret = smsc95xx_eeprom_confirm_not_busy(dev); 274 if (ret) 275 return ret; 276 277 /* Issue write/erase enable command */ 278 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 279 smsc95xx_write_reg(dev, E2P_CMD, val); 280 281 ret = smsc95xx_wait_eeprom(dev); 282 if (ret < 0) 283 return ret; 284 285 for (i = 0; i < length; i++) { 286 287 /* Fill data register */ 288 val = data[i]; 289 smsc95xx_write_reg(dev, E2P_DATA, val); 290 291 /* Send "write" command */ 292 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 293 smsc95xx_write_reg(dev, E2P_CMD, val); 294 295 ret = smsc95xx_wait_eeprom(dev); 296 if (ret < 0) 297 return ret; 298 299 offset++; 300 } 301 302 return 0; 303 } 304 305 static void smsc95xx_async_cmd_callback(struct urb *urb) 306 { 307 struct usb_context *usb_context = urb->context; 308 struct usbnet *dev = usb_context->dev; 309 int status = urb->status; 310 311 if (status < 0) 312 netdev_warn(dev->net, "async callback failed with %d\n", status); 313 314 kfree(usb_context); 315 usb_free_urb(urb); 316 } 317 318 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data) 319 { 320 struct usb_context *usb_context; 321 int status; 322 struct urb *urb; 323 const u16 size = 4; 324 325 urb = usb_alloc_urb(0, GFP_ATOMIC); 326 if (!urb) { 327 netdev_warn(dev->net, "Error allocating URB\n"); 328 return -ENOMEM; 329 } 330 331 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC); 332 if (usb_context == NULL) { 333 netdev_warn(dev->net, "Error allocating control msg\n"); 334 usb_free_urb(urb); 335 return -ENOMEM; 336 } 337 338 usb_context->req.bRequestType = 339 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 340 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER; 341 usb_context->req.wValue = 00; 342 usb_context->req.wIndex = cpu_to_le16(index); 343 usb_context->req.wLength = cpu_to_le16(size); 344 345 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0), 346 (void *)&usb_context->req, data, size, 347 smsc95xx_async_cmd_callback, 348 (void *)usb_context); 349 350 status = usb_submit_urb(urb, GFP_ATOMIC); 351 if (status < 0) { 352 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n", 353 status); 354 kfree(usb_context); 355 usb_free_urb(urb); 356 } 357 358 return status; 359 } 360 361 /* returns hash bit number for given MAC address 362 * example: 363 * 01 00 5E 00 00 01 -> returns bit number 31 */ 364 static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 365 { 366 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 367 } 368 369 static void smsc95xx_set_multicast(struct net_device *netdev) 370 { 371 struct usbnet *dev = netdev_priv(netdev); 372 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 373 unsigned long flags; 374 375 pdata->hash_hi = 0; 376 pdata->hash_lo = 0; 377 378 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 379 380 if (dev->net->flags & IFF_PROMISC) { 381 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 382 pdata->mac_cr |= MAC_CR_PRMS_; 383 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 384 } else if (dev->net->flags & IFF_ALLMULTI) { 385 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 386 pdata->mac_cr |= MAC_CR_MCPAS_; 387 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 388 } else if (!netdev_mc_empty(dev->net)) { 389 struct netdev_hw_addr *ha; 390 391 pdata->mac_cr |= MAC_CR_HPFILT_; 392 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 393 394 netdev_for_each_mc_addr(ha, netdev) { 395 u32 bitnum = smsc95xx_hash(ha->addr); 396 u32 mask = 0x01 << (bitnum & 0x1F); 397 if (bitnum & 0x20) 398 pdata->hash_hi |= mask; 399 else 400 pdata->hash_lo |= mask; 401 } 402 403 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 404 pdata->hash_hi, pdata->hash_lo); 405 } else { 406 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 407 pdata->mac_cr &= 408 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 409 } 410 411 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 412 413 /* Initiate async writes, as we can't wait for completion here */ 414 smsc95xx_write_reg_async(dev, HASHH, &pdata->hash_hi); 415 smsc95xx_write_reg_async(dev, HASHL, &pdata->hash_lo); 416 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr); 417 } 418 419 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 420 u16 lcladv, u16 rmtadv) 421 { 422 u32 flow, afc_cfg = 0; 423 424 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 425 if (ret < 0) { 426 netdev_warn(dev->net, "error reading AFC_CFG\n"); 427 return; 428 } 429 430 if (duplex == DUPLEX_FULL) { 431 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 432 433 if (cap & FLOW_CTRL_RX) 434 flow = 0xFFFF0002; 435 else 436 flow = 0; 437 438 if (cap & FLOW_CTRL_TX) 439 afc_cfg |= 0xF; 440 else 441 afc_cfg &= ~0xF; 442 443 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 444 cap & FLOW_CTRL_RX ? "enabled" : "disabled", 445 cap & FLOW_CTRL_TX ? "enabled" : "disabled"); 446 } else { 447 netif_dbg(dev, link, dev->net, "half duplex\n"); 448 flow = 0; 449 afc_cfg |= 0xF; 450 } 451 452 smsc95xx_write_reg(dev, FLOW, flow); 453 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 454 } 455 456 static int smsc95xx_link_reset(struct usbnet *dev) 457 { 458 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 459 struct mii_if_info *mii = &dev->mii; 460 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 461 unsigned long flags; 462 u16 lcladv, rmtadv; 463 u32 intdata; 464 465 /* clear interrupt status */ 466 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 467 intdata = 0xFFFFFFFF; 468 smsc95xx_write_reg(dev, INT_STS, intdata); 469 470 mii_check_media(mii, 1, 1); 471 mii_ethtool_gset(&dev->mii, &ecmd); 472 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 473 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 474 475 netif_dbg(dev, link, dev->net, 476 "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", 477 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); 478 479 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 480 if (ecmd.duplex != DUPLEX_FULL) { 481 pdata->mac_cr &= ~MAC_CR_FDPX_; 482 pdata->mac_cr |= MAC_CR_RCVOWN_; 483 } else { 484 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 485 pdata->mac_cr |= MAC_CR_FDPX_; 486 } 487 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 488 489 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 490 491 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 492 493 return 0; 494 } 495 496 static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 497 { 498 u32 intdata; 499 500 if (urb->actual_length != 4) { 501 netdev_warn(dev->net, "unexpected urb length %d\n", 502 urb->actual_length); 503 return; 504 } 505 506 memcpy(&intdata, urb->transfer_buffer, 4); 507 le32_to_cpus(&intdata); 508 509 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 510 511 if (intdata & INT_ENP_PHY_INT_) 512 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 513 else 514 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 515 intdata); 516 } 517 518 /* Enable or disable Tx & Rx checksum offload engines */ 519 static int smsc95xx_set_features(struct net_device *netdev, 520 netdev_features_t features) 521 { 522 struct usbnet *dev = netdev_priv(netdev); 523 u32 read_buf; 524 int ret; 525 526 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 527 if (ret < 0) { 528 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret); 529 return ret; 530 } 531 532 if (features & NETIF_F_HW_CSUM) 533 read_buf |= Tx_COE_EN_; 534 else 535 read_buf &= ~Tx_COE_EN_; 536 537 if (features & NETIF_F_RXCSUM) 538 read_buf |= Rx_COE_EN_; 539 else 540 read_buf &= ~Rx_COE_EN_; 541 542 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 543 if (ret < 0) { 544 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret); 545 return ret; 546 } 547 548 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 549 return 0; 550 } 551 552 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 553 { 554 return MAX_EEPROM_SIZE; 555 } 556 557 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 558 struct ethtool_eeprom *ee, u8 *data) 559 { 560 struct usbnet *dev = netdev_priv(netdev); 561 562 ee->magic = LAN95XX_EEPROM_MAGIC; 563 564 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 565 } 566 567 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 568 struct ethtool_eeprom *ee, u8 *data) 569 { 570 struct usbnet *dev = netdev_priv(netdev); 571 572 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 573 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", 574 ee->magic); 575 return -EINVAL; 576 } 577 578 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 579 } 580 581 static int smsc95xx_ethtool_getregslen(struct net_device *netdev) 582 { 583 /* all smsc95xx registers */ 584 return COE_CR - ID_REV + 1; 585 } 586 587 static void 588 smsc95xx_ethtool_getregs(struct net_device *netdev, struct ethtool_regs *regs, 589 void *buf) 590 { 591 struct usbnet *dev = netdev_priv(netdev); 592 unsigned int i, j; 593 int retval; 594 u32 *data = buf; 595 596 retval = smsc95xx_read_reg(dev, ID_REV, ®s->version); 597 if (retval < 0) { 598 netdev_warn(netdev, "REGS: cannot read ID_REV\n"); 599 return; 600 } 601 602 for (i = ID_REV, j = 0; i <= COE_CR; i += (sizeof(u32)), j++) { 603 retval = smsc95xx_read_reg(dev, i, &data[j]); 604 if (retval < 0) { 605 netdev_warn(netdev, "REGS: cannot read reg[%x]\n", i); 606 return; 607 } 608 } 609 } 610 611 static const struct ethtool_ops smsc95xx_ethtool_ops = { 612 .get_link = usbnet_get_link, 613 .nway_reset = usbnet_nway_reset, 614 .get_drvinfo = usbnet_get_drvinfo, 615 .get_msglevel = usbnet_get_msglevel, 616 .set_msglevel = usbnet_set_msglevel, 617 .get_settings = usbnet_get_settings, 618 .set_settings = usbnet_set_settings, 619 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 620 .get_eeprom = smsc95xx_ethtool_get_eeprom, 621 .set_eeprom = smsc95xx_ethtool_set_eeprom, 622 .get_regs_len = smsc95xx_ethtool_getregslen, 623 .get_regs = smsc95xx_ethtool_getregs, 624 }; 625 626 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 627 { 628 struct usbnet *dev = netdev_priv(netdev); 629 630 if (!netif_running(netdev)) 631 return -EINVAL; 632 633 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 634 } 635 636 static void smsc95xx_init_mac_address(struct usbnet *dev) 637 { 638 /* try reading mac address from EEPROM */ 639 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 640 dev->net->dev_addr) == 0) { 641 if (is_valid_ether_addr(dev->net->dev_addr)) { 642 /* eeprom values are valid so use them */ 643 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); 644 return; 645 } 646 } 647 648 /* no eeprom, or eeprom values are invalid. generate random MAC */ 649 eth_hw_addr_random(dev->net); 650 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); 651 } 652 653 static int smsc95xx_set_mac_address(struct usbnet *dev) 654 { 655 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 656 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 657 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 658 int ret; 659 660 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 661 if (ret < 0) { 662 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret); 663 return ret; 664 } 665 666 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 667 if (ret < 0) { 668 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret); 669 return ret; 670 } 671 672 return 0; 673 } 674 675 /* starts the TX path */ 676 static void smsc95xx_start_tx_path(struct usbnet *dev) 677 { 678 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 679 unsigned long flags; 680 u32 reg_val; 681 682 /* Enable Tx at MAC */ 683 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 684 pdata->mac_cr |= MAC_CR_TXEN_; 685 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 686 687 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 688 689 /* Enable Tx at SCSRs */ 690 reg_val = TX_CFG_ON_; 691 smsc95xx_write_reg(dev, TX_CFG, reg_val); 692 } 693 694 /* Starts the Receive path */ 695 static void smsc95xx_start_rx_path(struct usbnet *dev) 696 { 697 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 698 unsigned long flags; 699 700 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 701 pdata->mac_cr |= MAC_CR_RXEN_; 702 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 703 704 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 705 } 706 707 static int smsc95xx_phy_initialize(struct usbnet *dev) 708 { 709 int bmcr, timeout = 0; 710 711 /* Initialize MII structure */ 712 dev->mii.dev = dev->net; 713 dev->mii.mdio_read = smsc95xx_mdio_read; 714 dev->mii.mdio_write = smsc95xx_mdio_write; 715 dev->mii.phy_id_mask = 0x1f; 716 dev->mii.reg_num_mask = 0x1f; 717 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 718 719 /* reset phy and wait for reset to complete */ 720 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 721 722 do { 723 msleep(10); 724 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 725 timeout++; 726 } while ((bmcr & BMCR_RESET) && (timeout < 100)); 727 728 if (timeout >= 100) { 729 netdev_warn(dev->net, "timeout on PHY Reset"); 730 return -EIO; 731 } 732 733 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 734 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 735 ADVERTISE_PAUSE_ASYM); 736 737 /* read to clear */ 738 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 739 740 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 741 PHY_INT_MASK_DEFAULT_); 742 mii_nway_restart(&dev->mii); 743 744 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 745 return 0; 746 } 747 748 static int smsc95xx_reset(struct usbnet *dev) 749 { 750 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 751 u32 read_buf, write_buf, burst_cap; 752 int ret = 0, timeout; 753 754 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 755 756 write_buf = HW_CFG_LRST_; 757 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf); 758 if (ret < 0) { 759 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n", 760 ret); 761 return ret; 762 } 763 764 timeout = 0; 765 do { 766 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 767 if (ret < 0) { 768 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 769 return ret; 770 } 771 msleep(10); 772 timeout++; 773 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 774 775 if (timeout >= 100) { 776 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); 777 return ret; 778 } 779 780 write_buf = PM_CTL_PHY_RST_; 781 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf); 782 if (ret < 0) { 783 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret); 784 return ret; 785 } 786 787 timeout = 0; 788 do { 789 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 790 if (ret < 0) { 791 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret); 792 return ret; 793 } 794 msleep(10); 795 timeout++; 796 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 797 798 if (timeout >= 100) { 799 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 800 return ret; 801 } 802 803 ret = smsc95xx_set_mac_address(dev); 804 if (ret < 0) 805 return ret; 806 807 netif_dbg(dev, ifup, dev->net, 808 "MAC Address: %pM\n", dev->net->dev_addr); 809 810 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 811 if (ret < 0) { 812 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 813 return ret; 814 } 815 816 netif_dbg(dev, ifup, dev->net, 817 "Read Value from HW_CFG : 0x%08x\n", read_buf); 818 819 read_buf |= HW_CFG_BIR_; 820 821 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 822 if (ret < 0) { 823 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n", 824 ret); 825 return ret; 826 } 827 828 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 829 if (ret < 0) { 830 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 831 return ret; 832 } 833 netif_dbg(dev, ifup, dev->net, 834 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 835 read_buf); 836 837 if (!turbo_mode) { 838 burst_cap = 0; 839 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 840 } else if (dev->udev->speed == USB_SPEED_HIGH) { 841 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 842 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 843 } else { 844 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 845 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 846 } 847 848 netif_dbg(dev, ifup, dev->net, 849 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size); 850 851 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 852 if (ret < 0) { 853 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); 854 return ret; 855 } 856 857 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 858 if (ret < 0) { 859 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 860 return ret; 861 } 862 netif_dbg(dev, ifup, dev->net, 863 "Read Value from BURST_CAP after writing: 0x%08x\n", 864 read_buf); 865 866 read_buf = DEFAULT_BULK_IN_DELAY; 867 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf); 868 if (ret < 0) { 869 netdev_warn(dev->net, "ret = %d\n", ret); 870 return ret; 871 } 872 873 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 874 if (ret < 0) { 875 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 876 return ret; 877 } 878 netif_dbg(dev, ifup, dev->net, 879 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 880 read_buf); 881 882 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 883 if (ret < 0) { 884 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 885 return ret; 886 } 887 netif_dbg(dev, ifup, dev->net, 888 "Read Value from HW_CFG: 0x%08x\n", read_buf); 889 890 if (turbo_mode) 891 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 892 893 read_buf &= ~HW_CFG_RXDOFF_; 894 895 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 896 read_buf |= NET_IP_ALIGN << 9; 897 898 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 899 if (ret < 0) { 900 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n", 901 ret); 902 return ret; 903 } 904 905 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 906 if (ret < 0) { 907 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 908 return ret; 909 } 910 netif_dbg(dev, ifup, dev->net, 911 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 912 913 write_buf = 0xFFFFFFFF; 914 ret = smsc95xx_write_reg(dev, INT_STS, write_buf); 915 if (ret < 0) { 916 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n", 917 ret); 918 return ret; 919 } 920 921 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 922 if (ret < 0) { 923 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 924 return ret; 925 } 926 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 927 928 /* Configure GPIO pins as LED outputs */ 929 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 930 LED_GPIO_CFG_FDX_LED; 931 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 932 if (ret < 0) { 933 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n", 934 ret); 935 return ret; 936 } 937 938 /* Init Tx */ 939 write_buf = 0; 940 ret = smsc95xx_write_reg(dev, FLOW, write_buf); 941 if (ret < 0) { 942 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); 943 return ret; 944 } 945 946 read_buf = AFC_CFG_DEFAULT; 947 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf); 948 if (ret < 0) { 949 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret); 950 return ret; 951 } 952 953 /* Don't need mac_cr_lock during initialisation */ 954 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 955 if (ret < 0) { 956 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); 957 return ret; 958 } 959 960 /* Init Rx */ 961 /* Set Vlan */ 962 write_buf = (u32)ETH_P_8021Q; 963 ret = smsc95xx_write_reg(dev, VLAN1, write_buf); 964 if (ret < 0) { 965 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret); 966 return ret; 967 } 968 969 /* Enable or disable checksum offload engines */ 970 smsc95xx_set_features(dev->net, dev->net->features); 971 972 smsc95xx_set_multicast(dev->net); 973 974 if (smsc95xx_phy_initialize(dev) < 0) 975 return -EIO; 976 977 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 978 if (ret < 0) { 979 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); 980 return ret; 981 } 982 983 /* enable PHY interrupts */ 984 read_buf |= INT_EP_CTL_PHY_INT_; 985 986 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 987 if (ret < 0) { 988 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); 989 return ret; 990 } 991 992 smsc95xx_start_tx_path(dev); 993 smsc95xx_start_rx_path(dev); 994 995 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 996 return 0; 997 } 998 999 static const struct net_device_ops smsc95xx_netdev_ops = { 1000 .ndo_open = usbnet_open, 1001 .ndo_stop = usbnet_stop, 1002 .ndo_start_xmit = usbnet_start_xmit, 1003 .ndo_tx_timeout = usbnet_tx_timeout, 1004 .ndo_change_mtu = usbnet_change_mtu, 1005 .ndo_set_mac_address = eth_mac_addr, 1006 .ndo_validate_addr = eth_validate_addr, 1007 .ndo_do_ioctl = smsc95xx_ioctl, 1008 .ndo_set_rx_mode = smsc95xx_set_multicast, 1009 .ndo_set_features = smsc95xx_set_features, 1010 }; 1011 1012 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 1013 { 1014 struct smsc95xx_priv *pdata = NULL; 1015 int ret; 1016 1017 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1018 1019 ret = usbnet_get_endpoints(dev, intf); 1020 if (ret < 0) { 1021 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 1022 return ret; 1023 } 1024 1025 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 1026 GFP_KERNEL); 1027 1028 pdata = (struct smsc95xx_priv *)(dev->data[0]); 1029 if (!pdata) { 1030 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n"); 1031 return -ENOMEM; 1032 } 1033 1034 spin_lock_init(&pdata->mac_cr_lock); 1035 1036 if (DEFAULT_TX_CSUM_ENABLE) 1037 dev->net->features |= NETIF_F_HW_CSUM; 1038 if (DEFAULT_RX_CSUM_ENABLE) 1039 dev->net->features |= NETIF_F_RXCSUM; 1040 1041 dev->net->hw_features = NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 1042 1043 smsc95xx_init_mac_address(dev); 1044 1045 /* Init all registers */ 1046 ret = smsc95xx_reset(dev); 1047 1048 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1049 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1050 dev->net->flags |= IFF_MULTICAST; 1051 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; 1052 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; 1053 return 0; 1054 } 1055 1056 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1057 { 1058 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1059 if (pdata) { 1060 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1061 kfree(pdata); 1062 pdata = NULL; 1063 dev->data[0] = 0; 1064 } 1065 } 1066 1067 static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1068 { 1069 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1070 skb->ip_summed = CHECKSUM_COMPLETE; 1071 skb_trim(skb, skb->len - 2); 1072 } 1073 1074 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1075 { 1076 while (skb->len > 0) { 1077 u32 header, align_count; 1078 struct sk_buff *ax_skb; 1079 unsigned char *packet; 1080 u16 size; 1081 1082 memcpy(&header, skb->data, sizeof(header)); 1083 le32_to_cpus(&header); 1084 skb_pull(skb, 4 + NET_IP_ALIGN); 1085 packet = skb->data; 1086 1087 /* get the packet length */ 1088 size = (u16)((header & RX_STS_FL_) >> 16); 1089 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1090 1091 if (unlikely(header & RX_STS_ES_)) { 1092 netif_dbg(dev, rx_err, dev->net, 1093 "Error header=0x%08x\n", header); 1094 dev->net->stats.rx_errors++; 1095 dev->net->stats.rx_dropped++; 1096 1097 if (header & RX_STS_CRC_) { 1098 dev->net->stats.rx_crc_errors++; 1099 } else { 1100 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1101 dev->net->stats.rx_frame_errors++; 1102 1103 if ((header & RX_STS_LE_) && 1104 (!(header & RX_STS_FT_))) 1105 dev->net->stats.rx_length_errors++; 1106 } 1107 } else { 1108 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1109 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1110 netif_dbg(dev, rx_err, dev->net, 1111 "size err header=0x%08x\n", header); 1112 return 0; 1113 } 1114 1115 /* last frame in this batch */ 1116 if (skb->len == size) { 1117 if (dev->net->features & NETIF_F_RXCSUM) 1118 smsc95xx_rx_csum_offload(skb); 1119 skb_trim(skb, skb->len - 4); /* remove fcs */ 1120 skb->truesize = size + sizeof(struct sk_buff); 1121 1122 return 1; 1123 } 1124 1125 ax_skb = skb_clone(skb, GFP_ATOMIC); 1126 if (unlikely(!ax_skb)) { 1127 netdev_warn(dev->net, "Error allocating skb\n"); 1128 return 0; 1129 } 1130 1131 ax_skb->len = size; 1132 ax_skb->data = packet; 1133 skb_set_tail_pointer(ax_skb, size); 1134 1135 if (dev->net->features & NETIF_F_RXCSUM) 1136 smsc95xx_rx_csum_offload(ax_skb); 1137 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1138 ax_skb->truesize = size + sizeof(struct sk_buff); 1139 1140 usbnet_skb_return(dev, ax_skb); 1141 } 1142 1143 skb_pull(skb, size); 1144 1145 /* padding bytes before the next frame starts */ 1146 if (skb->len) 1147 skb_pull(skb, align_count); 1148 } 1149 1150 if (unlikely(skb->len < 0)) { 1151 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); 1152 return 0; 1153 } 1154 1155 return 1; 1156 } 1157 1158 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1159 { 1160 u16 low_16 = (u16)skb_checksum_start_offset(skb); 1161 u16 high_16 = low_16 + skb->csum_offset; 1162 return (high_16 << 16) | low_16; 1163 } 1164 1165 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1166 struct sk_buff *skb, gfp_t flags) 1167 { 1168 bool csum = skb->ip_summed == CHECKSUM_PARTIAL; 1169 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1170 u32 tx_cmd_a, tx_cmd_b; 1171 1172 /* We do not advertise SG, so skbs should be already linearized */ 1173 BUG_ON(skb_shinfo(skb)->nr_frags); 1174 1175 if (skb_headroom(skb) < overhead) { 1176 struct sk_buff *skb2 = skb_copy_expand(skb, 1177 overhead, 0, flags); 1178 dev_kfree_skb_any(skb); 1179 skb = skb2; 1180 if (!skb) 1181 return NULL; 1182 } 1183 1184 if (csum) { 1185 if (skb->len <= 45) { 1186 /* workaround - hardware tx checksum does not work 1187 * properly with extremely small packets */ 1188 long csstart = skb_checksum_start_offset(skb); 1189 __wsum calc = csum_partial(skb->data + csstart, 1190 skb->len - csstart, 0); 1191 *((__sum16 *)(skb->data + csstart 1192 + skb->csum_offset)) = csum_fold(calc); 1193 1194 csum = false; 1195 } else { 1196 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1197 skb_push(skb, 4); 1198 memcpy(skb->data, &csum_preamble, 4); 1199 } 1200 } 1201 1202 skb_push(skb, 4); 1203 tx_cmd_b = (u32)(skb->len - 4); 1204 if (csum) 1205 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1206 cpu_to_le32s(&tx_cmd_b); 1207 memcpy(skb->data, &tx_cmd_b, 4); 1208 1209 skb_push(skb, 4); 1210 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1211 TX_CMD_A_LAST_SEG_; 1212 cpu_to_le32s(&tx_cmd_a); 1213 memcpy(skb->data, &tx_cmd_a, 4); 1214 1215 return skb; 1216 } 1217 1218 static const struct driver_info smsc95xx_info = { 1219 .description = "smsc95xx USB 2.0 Ethernet", 1220 .bind = smsc95xx_bind, 1221 .unbind = smsc95xx_unbind, 1222 .link_reset = smsc95xx_link_reset, 1223 .reset = smsc95xx_reset, 1224 .rx_fixup = smsc95xx_rx_fixup, 1225 .tx_fixup = smsc95xx_tx_fixup, 1226 .status = smsc95xx_status, 1227 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, 1228 }; 1229 1230 static const struct usb_device_id products[] = { 1231 { 1232 /* SMSC9500 USB Ethernet Device */ 1233 USB_DEVICE(0x0424, 0x9500), 1234 .driver_info = (unsigned long) &smsc95xx_info, 1235 }, 1236 { 1237 /* SMSC9505 USB Ethernet Device */ 1238 USB_DEVICE(0x0424, 0x9505), 1239 .driver_info = (unsigned long) &smsc95xx_info, 1240 }, 1241 { 1242 /* SMSC9500A USB Ethernet Device */ 1243 USB_DEVICE(0x0424, 0x9E00), 1244 .driver_info = (unsigned long) &smsc95xx_info, 1245 }, 1246 { 1247 /* SMSC9505A USB Ethernet Device */ 1248 USB_DEVICE(0x0424, 0x9E01), 1249 .driver_info = (unsigned long) &smsc95xx_info, 1250 }, 1251 { 1252 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1253 USB_DEVICE(0x0424, 0xec00), 1254 .driver_info = (unsigned long) &smsc95xx_info, 1255 }, 1256 { 1257 /* SMSC9500 USB Ethernet Device (SAL10) */ 1258 USB_DEVICE(0x0424, 0x9900), 1259 .driver_info = (unsigned long) &smsc95xx_info, 1260 }, 1261 { 1262 /* SMSC9505 USB Ethernet Device (SAL10) */ 1263 USB_DEVICE(0x0424, 0x9901), 1264 .driver_info = (unsigned long) &smsc95xx_info, 1265 }, 1266 { 1267 /* SMSC9500A USB Ethernet Device (SAL10) */ 1268 USB_DEVICE(0x0424, 0x9902), 1269 .driver_info = (unsigned long) &smsc95xx_info, 1270 }, 1271 { 1272 /* SMSC9505A USB Ethernet Device (SAL10) */ 1273 USB_DEVICE(0x0424, 0x9903), 1274 .driver_info = (unsigned long) &smsc95xx_info, 1275 }, 1276 { 1277 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1278 USB_DEVICE(0x0424, 0x9904), 1279 .driver_info = (unsigned long) &smsc95xx_info, 1280 }, 1281 { 1282 /* SMSC9500A USB Ethernet Device (HAL) */ 1283 USB_DEVICE(0x0424, 0x9905), 1284 .driver_info = (unsigned long) &smsc95xx_info, 1285 }, 1286 { 1287 /* SMSC9505A USB Ethernet Device (HAL) */ 1288 USB_DEVICE(0x0424, 0x9906), 1289 .driver_info = (unsigned long) &smsc95xx_info, 1290 }, 1291 { 1292 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1293 USB_DEVICE(0x0424, 0x9907), 1294 .driver_info = (unsigned long) &smsc95xx_info, 1295 }, 1296 { 1297 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1298 USB_DEVICE(0x0424, 0x9908), 1299 .driver_info = (unsigned long) &smsc95xx_info, 1300 }, 1301 { 1302 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1303 USB_DEVICE(0x0424, 0x9909), 1304 .driver_info = (unsigned long) &smsc95xx_info, 1305 }, 1306 { 1307 /* SMSC LAN9530 USB Ethernet Device */ 1308 USB_DEVICE(0x0424, 0x9530), 1309 .driver_info = (unsigned long) &smsc95xx_info, 1310 }, 1311 { 1312 /* SMSC LAN9730 USB Ethernet Device */ 1313 USB_DEVICE(0x0424, 0x9730), 1314 .driver_info = (unsigned long) &smsc95xx_info, 1315 }, 1316 { 1317 /* SMSC LAN89530 USB Ethernet Device */ 1318 USB_DEVICE(0x0424, 0x9E08), 1319 .driver_info = (unsigned long) &smsc95xx_info, 1320 }, 1321 { }, /* END */ 1322 }; 1323 MODULE_DEVICE_TABLE(usb, products); 1324 1325 static struct usb_driver smsc95xx_driver = { 1326 .name = "smsc95xx", 1327 .id_table = products, 1328 .probe = usbnet_probe, 1329 .suspend = usbnet_suspend, 1330 .resume = usbnet_resume, 1331 .disconnect = usbnet_disconnect, 1332 .disable_hub_initiated_lpm = 1, 1333 }; 1334 1335 module_usb_driver(smsc95xx_driver); 1336 1337 MODULE_AUTHOR("Nancy Lin"); 1338 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); 1339 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 1340 MODULE_LICENSE("GPL"); 1341