1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2010 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, see <http://www.gnu.org/licenses/>. 17 * 18 *****************************************************************************/ 19 20 #include <linux/module.h> 21 #include <linux/kmod.h> 22 #include <linux/netdevice.h> 23 #include <linux/etherdevice.h> 24 #include <linux/ethtool.h> 25 #include <linux/mii.h> 26 #include <linux/usb.h> 27 #include <linux/bitrev.h> 28 #include <linux/crc16.h> 29 #include <linux/crc32.h> 30 #include <linux/usb/usbnet.h> 31 #include <linux/slab.h> 32 #include <linux/of_net.h> 33 #include "smsc75xx.h" 34 35 #define SMSC_CHIPNAME "smsc75xx" 36 #define SMSC_DRIVER_VERSION "1.0.0" 37 #define HS_USB_PKT_SIZE (512) 38 #define FS_USB_PKT_SIZE (64) 39 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 40 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 41 #define DEFAULT_BULK_IN_DELAY (0x00002000) 42 #define MAX_SINGLE_PACKET_SIZE (9000) 43 #define LAN75XX_EEPROM_MAGIC (0x7500) 44 #define EEPROM_MAC_OFFSET (0x01) 45 #define DEFAULT_TX_CSUM_ENABLE (true) 46 #define DEFAULT_RX_CSUM_ENABLE (true) 47 #define SMSC75XX_INTERNAL_PHY_ID (1) 48 #define SMSC75XX_TX_OVERHEAD (8) 49 #define MAX_RX_FIFO_SIZE (20 * 1024) 50 #define MAX_TX_FIFO_SIZE (12 * 1024) 51 #define USB_VENDOR_ID_SMSC (0x0424) 52 #define USB_PRODUCT_ID_LAN7500 (0x7500) 53 #define USB_PRODUCT_ID_LAN7505 (0x7505) 54 #define RXW_PADDING 2 55 #define SUPPORTED_WAKE (WAKE_PHY | WAKE_UCAST | WAKE_BCAST | \ 56 WAKE_MCAST | WAKE_ARP | WAKE_MAGIC) 57 58 #define SUSPEND_SUSPEND0 (0x01) 59 #define SUSPEND_SUSPEND1 (0x02) 60 #define SUSPEND_SUSPEND2 (0x04) 61 #define SUSPEND_SUSPEND3 (0x08) 62 #define SUSPEND_ALLMODES (SUSPEND_SUSPEND0 | SUSPEND_SUSPEND1 | \ 63 SUSPEND_SUSPEND2 | SUSPEND_SUSPEND3) 64 65 struct smsc75xx_priv { 66 struct usbnet *dev; 67 u32 rfe_ctl; 68 u32 wolopts; 69 u32 multicast_hash_table[DP_SEL_VHF_HASH_LEN]; 70 struct mutex dataport_mutex; 71 spinlock_t rfe_ctl_lock; 72 struct work_struct set_multicast; 73 u8 suspend_flags; 74 }; 75 76 struct usb_context { 77 struct usb_ctrlrequest req; 78 struct usbnet *dev; 79 }; 80 81 static bool turbo_mode = true; 82 module_param(turbo_mode, bool, 0644); 83 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 84 85 static int smsc75xx_link_ok_nopm(struct usbnet *dev); 86 static int smsc75xx_phy_gig_workaround(struct usbnet *dev); 87 88 static int __must_check __smsc75xx_read_reg(struct usbnet *dev, u32 index, 89 u32 *data, int in_pm) 90 { 91 u32 buf; 92 int ret; 93 int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16); 94 95 BUG_ON(!dev); 96 97 if (!in_pm) 98 fn = usbnet_read_cmd; 99 else 100 fn = usbnet_read_cmd_nopm; 101 102 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN 103 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 104 0, index, &buf, 4); 105 if (unlikely(ret < 0)) { 106 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", 107 index, ret); 108 return ret; 109 } 110 111 le32_to_cpus(&buf); 112 *data = buf; 113 114 return ret; 115 } 116 117 static int __must_check __smsc75xx_write_reg(struct usbnet *dev, u32 index, 118 u32 data, int in_pm) 119 { 120 u32 buf; 121 int ret; 122 int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16); 123 124 BUG_ON(!dev); 125 126 if (!in_pm) 127 fn = usbnet_write_cmd; 128 else 129 fn = usbnet_write_cmd_nopm; 130 131 buf = data; 132 cpu_to_le32s(&buf); 133 134 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT 135 | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 136 0, index, &buf, 4); 137 if (unlikely(ret < 0)) 138 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", 139 index, ret); 140 141 return ret; 142 } 143 144 static int __must_check smsc75xx_read_reg_nopm(struct usbnet *dev, u32 index, 145 u32 *data) 146 { 147 return __smsc75xx_read_reg(dev, index, data, 1); 148 } 149 150 static int __must_check smsc75xx_write_reg_nopm(struct usbnet *dev, u32 index, 151 u32 data) 152 { 153 return __smsc75xx_write_reg(dev, index, data, 1); 154 } 155 156 static int __must_check smsc75xx_read_reg(struct usbnet *dev, u32 index, 157 u32 *data) 158 { 159 return __smsc75xx_read_reg(dev, index, data, 0); 160 } 161 162 static int __must_check smsc75xx_write_reg(struct usbnet *dev, u32 index, 163 u32 data) 164 { 165 return __smsc75xx_write_reg(dev, index, data, 0); 166 } 167 168 /* Loop until the read is completed with timeout 169 * called with phy_mutex held */ 170 static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet *dev, 171 int in_pm) 172 { 173 unsigned long start_time = jiffies; 174 u32 val; 175 int ret; 176 177 do { 178 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm); 179 if (ret < 0) { 180 netdev_warn(dev->net, "Error reading MII_ACCESS\n"); 181 return ret; 182 } 183 184 if (!(val & MII_ACCESS_BUSY)) 185 return 0; 186 } while (!time_after(jiffies, start_time + HZ)); 187 188 return -EIO; 189 } 190 191 static int __smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx, 192 int in_pm) 193 { 194 struct usbnet *dev = netdev_priv(netdev); 195 u32 val, addr; 196 int ret; 197 198 mutex_lock(&dev->phy_mutex); 199 200 /* confirm MII not busy */ 201 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); 202 if (ret < 0) { 203 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); 204 goto done; 205 } 206 207 /* set the address, index & direction (read from PHY) */ 208 phy_id &= dev->mii.phy_id_mask; 209 idx &= dev->mii.reg_num_mask; 210 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 211 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 212 | MII_ACCESS_READ | MII_ACCESS_BUSY; 213 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); 214 if (ret < 0) { 215 netdev_warn(dev->net, "Error writing MII_ACCESS\n"); 216 goto done; 217 } 218 219 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); 220 if (ret < 0) { 221 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 222 goto done; 223 } 224 225 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm); 226 if (ret < 0) { 227 netdev_warn(dev->net, "Error reading MII_DATA\n"); 228 goto done; 229 } 230 231 ret = (u16)(val & 0xFFFF); 232 233 done: 234 mutex_unlock(&dev->phy_mutex); 235 return ret; 236 } 237 238 static void __smsc75xx_mdio_write(struct net_device *netdev, int phy_id, 239 int idx, int regval, int in_pm) 240 { 241 struct usbnet *dev = netdev_priv(netdev); 242 u32 val, addr; 243 int ret; 244 245 mutex_lock(&dev->phy_mutex); 246 247 /* confirm MII not busy */ 248 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); 249 if (ret < 0) { 250 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); 251 goto done; 252 } 253 254 val = regval; 255 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm); 256 if (ret < 0) { 257 netdev_warn(dev->net, "Error writing MII_DATA\n"); 258 goto done; 259 } 260 261 /* set the address, index & direction (write to PHY) */ 262 phy_id &= dev->mii.phy_id_mask; 263 idx &= dev->mii.reg_num_mask; 264 addr = ((phy_id << MII_ACCESS_PHY_ADDR_SHIFT) & MII_ACCESS_PHY_ADDR) 265 | ((idx << MII_ACCESS_REG_ADDR_SHIFT) & MII_ACCESS_REG_ADDR) 266 | MII_ACCESS_WRITE | MII_ACCESS_BUSY; 267 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); 268 if (ret < 0) { 269 netdev_warn(dev->net, "Error writing MII_ACCESS\n"); 270 goto done; 271 } 272 273 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); 274 if (ret < 0) { 275 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 276 goto done; 277 } 278 279 done: 280 mutex_unlock(&dev->phy_mutex); 281 } 282 283 static int smsc75xx_mdio_read_nopm(struct net_device *netdev, int phy_id, 284 int idx) 285 { 286 return __smsc75xx_mdio_read(netdev, phy_id, idx, 1); 287 } 288 289 static void smsc75xx_mdio_write_nopm(struct net_device *netdev, int phy_id, 290 int idx, int regval) 291 { 292 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1); 293 } 294 295 static int smsc75xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 296 { 297 return __smsc75xx_mdio_read(netdev, phy_id, idx, 0); 298 } 299 300 static void smsc75xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 301 int regval) 302 { 303 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0); 304 } 305 306 static int smsc75xx_wait_eeprom(struct usbnet *dev) 307 { 308 unsigned long start_time = jiffies; 309 u32 val; 310 int ret; 311 312 do { 313 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 314 if (ret < 0) { 315 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 316 return ret; 317 } 318 319 if (!(val & E2P_CMD_BUSY) || (val & E2P_CMD_TIMEOUT)) 320 break; 321 udelay(40); 322 } while (!time_after(jiffies, start_time + HZ)); 323 324 if (val & (E2P_CMD_TIMEOUT | E2P_CMD_BUSY)) { 325 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 326 return -EIO; 327 } 328 329 return 0; 330 } 331 332 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet *dev) 333 { 334 unsigned long start_time = jiffies; 335 u32 val; 336 int ret; 337 338 do { 339 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); 340 if (ret < 0) { 341 netdev_warn(dev->net, "Error reading E2P_CMD\n"); 342 return ret; 343 } 344 345 if (!(val & E2P_CMD_BUSY)) 346 return 0; 347 348 udelay(40); 349 } while (!time_after(jiffies, start_time + HZ)); 350 351 netdev_warn(dev->net, "EEPROM is busy\n"); 352 return -EIO; 353 } 354 355 static int smsc75xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 356 u8 *data) 357 { 358 u32 val; 359 int i, ret; 360 361 BUG_ON(!dev); 362 BUG_ON(!data); 363 364 ret = smsc75xx_eeprom_confirm_not_busy(dev); 365 if (ret) 366 return ret; 367 368 for (i = 0; i < length; i++) { 369 val = E2P_CMD_BUSY | E2P_CMD_READ | (offset & E2P_CMD_ADDR); 370 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 371 if (ret < 0) { 372 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 373 return ret; 374 } 375 376 ret = smsc75xx_wait_eeprom(dev); 377 if (ret < 0) 378 return ret; 379 380 ret = smsc75xx_read_reg(dev, E2P_DATA, &val); 381 if (ret < 0) { 382 netdev_warn(dev->net, "Error reading E2P_DATA\n"); 383 return ret; 384 } 385 386 data[i] = val & 0xFF; 387 offset++; 388 } 389 390 return 0; 391 } 392 393 static int smsc75xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 394 u8 *data) 395 { 396 u32 val; 397 int i, ret; 398 399 BUG_ON(!dev); 400 BUG_ON(!data); 401 402 ret = smsc75xx_eeprom_confirm_not_busy(dev); 403 if (ret) 404 return ret; 405 406 /* Issue write/erase enable command */ 407 val = E2P_CMD_BUSY | E2P_CMD_EWEN; 408 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 409 if (ret < 0) { 410 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 411 return ret; 412 } 413 414 ret = smsc75xx_wait_eeprom(dev); 415 if (ret < 0) 416 return ret; 417 418 for (i = 0; i < length; i++) { 419 420 /* Fill data register */ 421 val = data[i]; 422 ret = smsc75xx_write_reg(dev, E2P_DATA, val); 423 if (ret < 0) { 424 netdev_warn(dev->net, "Error writing E2P_DATA\n"); 425 return ret; 426 } 427 428 /* Send "write" command */ 429 val = E2P_CMD_BUSY | E2P_CMD_WRITE | (offset & E2P_CMD_ADDR); 430 ret = smsc75xx_write_reg(dev, E2P_CMD, val); 431 if (ret < 0) { 432 netdev_warn(dev->net, "Error writing E2P_CMD\n"); 433 return ret; 434 } 435 436 ret = smsc75xx_wait_eeprom(dev); 437 if (ret < 0) 438 return ret; 439 440 offset++; 441 } 442 443 return 0; 444 } 445 446 static int smsc75xx_dataport_wait_not_busy(struct usbnet *dev) 447 { 448 int i, ret; 449 450 for (i = 0; i < 100; i++) { 451 u32 dp_sel; 452 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 453 if (ret < 0) { 454 netdev_warn(dev->net, "Error reading DP_SEL\n"); 455 return ret; 456 } 457 458 if (dp_sel & DP_SEL_DPRDY) 459 return 0; 460 461 udelay(40); 462 } 463 464 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n"); 465 466 return -EIO; 467 } 468 469 static int smsc75xx_dataport_write(struct usbnet *dev, u32 ram_select, u32 addr, 470 u32 length, u32 *buf) 471 { 472 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 473 u32 dp_sel; 474 int i, ret; 475 476 mutex_lock(&pdata->dataport_mutex); 477 478 ret = smsc75xx_dataport_wait_not_busy(dev); 479 if (ret < 0) { 480 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n"); 481 goto done; 482 } 483 484 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); 485 if (ret < 0) { 486 netdev_warn(dev->net, "Error reading DP_SEL\n"); 487 goto done; 488 } 489 490 dp_sel &= ~DP_SEL_RSEL; 491 dp_sel |= ram_select; 492 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); 493 if (ret < 0) { 494 netdev_warn(dev->net, "Error writing DP_SEL\n"); 495 goto done; 496 } 497 498 for (i = 0; i < length; i++) { 499 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); 500 if (ret < 0) { 501 netdev_warn(dev->net, "Error writing DP_ADDR\n"); 502 goto done; 503 } 504 505 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); 506 if (ret < 0) { 507 netdev_warn(dev->net, "Error writing DP_DATA\n"); 508 goto done; 509 } 510 511 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); 512 if (ret < 0) { 513 netdev_warn(dev->net, "Error writing DP_CMD\n"); 514 goto done; 515 } 516 517 ret = smsc75xx_dataport_wait_not_busy(dev); 518 if (ret < 0) { 519 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n"); 520 goto done; 521 } 522 } 523 524 done: 525 mutex_unlock(&pdata->dataport_mutex); 526 return ret; 527 } 528 529 /* returns hash bit number for given MAC address */ 530 static u32 smsc75xx_hash(char addr[ETH_ALEN]) 531 { 532 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 533 } 534 535 static void smsc75xx_deferred_multicast_write(struct work_struct *param) 536 { 537 struct smsc75xx_priv *pdata = 538 container_of(param, struct smsc75xx_priv, set_multicast); 539 struct usbnet *dev = pdata->dev; 540 int ret; 541 542 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 543 pdata->rfe_ctl); 544 545 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, 546 DP_SEL_VHF_HASH_LEN, pdata->multicast_hash_table); 547 548 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 549 if (ret < 0) 550 netdev_warn(dev->net, "Error writing RFE_CRL\n"); 551 } 552 553 static void smsc75xx_set_multicast(struct net_device *netdev) 554 { 555 struct usbnet *dev = netdev_priv(netdev); 556 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 557 unsigned long flags; 558 int i; 559 560 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 561 562 pdata->rfe_ctl &= 563 ~(RFE_CTL_AU | RFE_CTL_AM | RFE_CTL_DPF | RFE_CTL_MHF); 564 pdata->rfe_ctl |= RFE_CTL_AB; 565 566 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 567 pdata->multicast_hash_table[i] = 0; 568 569 if (dev->net->flags & IFF_PROMISC) { 570 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 571 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_AU; 572 } else if (dev->net->flags & IFF_ALLMULTI) { 573 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 574 pdata->rfe_ctl |= RFE_CTL_AM | RFE_CTL_DPF; 575 } else if (!netdev_mc_empty(dev->net)) { 576 struct netdev_hw_addr *ha; 577 578 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n"); 579 580 pdata->rfe_ctl |= RFE_CTL_MHF | RFE_CTL_DPF; 581 582 netdev_for_each_mc_addr(ha, netdev) { 583 u32 bitnum = smsc75xx_hash(ha->addr); 584 pdata->multicast_hash_table[bitnum / 32] |= 585 (1 << (bitnum % 32)); 586 } 587 } else { 588 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 589 pdata->rfe_ctl |= RFE_CTL_DPF; 590 } 591 592 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 593 594 /* defer register writes to a sleepable context */ 595 schedule_work(&pdata->set_multicast); 596 } 597 598 static int smsc75xx_update_flowcontrol(struct usbnet *dev, u8 duplex, 599 u16 lcladv, u16 rmtadv) 600 { 601 u32 flow = 0, fct_flow = 0; 602 int ret; 603 604 if (duplex == DUPLEX_FULL) { 605 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 606 607 if (cap & FLOW_CTRL_TX) { 608 flow = (FLOW_TX_FCEN | 0xFFFF); 609 /* set fct_flow thresholds to 20% and 80% */ 610 fct_flow = (8 << 8) | 32; 611 } 612 613 if (cap & FLOW_CTRL_RX) 614 flow |= FLOW_RX_FCEN; 615 616 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 617 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 618 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 619 } else { 620 netif_dbg(dev, link, dev->net, "half duplex\n"); 621 } 622 623 ret = smsc75xx_write_reg(dev, FLOW, flow); 624 if (ret < 0) { 625 netdev_warn(dev->net, "Error writing FLOW\n"); 626 return ret; 627 } 628 629 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); 630 if (ret < 0) { 631 netdev_warn(dev->net, "Error writing FCT_FLOW\n"); 632 return ret; 633 } 634 635 return 0; 636 } 637 638 static int smsc75xx_link_reset(struct usbnet *dev) 639 { 640 struct mii_if_info *mii = &dev->mii; 641 struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET }; 642 u16 lcladv, rmtadv; 643 int ret; 644 645 /* write to clear phy interrupt status */ 646 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC, 647 PHY_INT_SRC_CLEAR_ALL); 648 649 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 650 if (ret < 0) { 651 netdev_warn(dev->net, "Error writing INT_STS\n"); 652 return ret; 653 } 654 655 mii_check_media(mii, 1, 1); 656 mii_ethtool_gset(&dev->mii, &ecmd); 657 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 658 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 659 660 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", 661 ethtool_cmd_speed(&ecmd), ecmd.duplex, lcladv, rmtadv); 662 663 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 664 } 665 666 static void smsc75xx_status(struct usbnet *dev, struct urb *urb) 667 { 668 u32 intdata; 669 670 if (urb->actual_length != 4) { 671 netdev_warn(dev->net, "unexpected urb length %d\n", 672 urb->actual_length); 673 return; 674 } 675 676 memcpy(&intdata, urb->transfer_buffer, 4); 677 le32_to_cpus(&intdata); 678 679 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 680 681 if (intdata & INT_ENP_PHY_INT) 682 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 683 else 684 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 685 intdata); 686 } 687 688 static int smsc75xx_ethtool_get_eeprom_len(struct net_device *net) 689 { 690 return MAX_EEPROM_SIZE; 691 } 692 693 static int smsc75xx_ethtool_get_eeprom(struct net_device *netdev, 694 struct ethtool_eeprom *ee, u8 *data) 695 { 696 struct usbnet *dev = netdev_priv(netdev); 697 698 ee->magic = LAN75XX_EEPROM_MAGIC; 699 700 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); 701 } 702 703 static int smsc75xx_ethtool_set_eeprom(struct net_device *netdev, 704 struct ethtool_eeprom *ee, u8 *data) 705 { 706 struct usbnet *dev = netdev_priv(netdev); 707 708 if (ee->magic != LAN75XX_EEPROM_MAGIC) { 709 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n", 710 ee->magic); 711 return -EINVAL; 712 } 713 714 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); 715 } 716 717 static void smsc75xx_ethtool_get_wol(struct net_device *net, 718 struct ethtool_wolinfo *wolinfo) 719 { 720 struct usbnet *dev = netdev_priv(net); 721 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 722 723 wolinfo->supported = SUPPORTED_WAKE; 724 wolinfo->wolopts = pdata->wolopts; 725 } 726 727 static int smsc75xx_ethtool_set_wol(struct net_device *net, 728 struct ethtool_wolinfo *wolinfo) 729 { 730 struct usbnet *dev = netdev_priv(net); 731 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 732 int ret; 733 734 pdata->wolopts = wolinfo->wolopts & SUPPORTED_WAKE; 735 736 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); 737 if (ret < 0) 738 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); 739 740 return ret; 741 } 742 743 static const struct ethtool_ops smsc75xx_ethtool_ops = { 744 .get_link = usbnet_get_link, 745 .nway_reset = usbnet_nway_reset, 746 .get_drvinfo = usbnet_get_drvinfo, 747 .get_msglevel = usbnet_get_msglevel, 748 .set_msglevel = usbnet_set_msglevel, 749 .get_eeprom_len = smsc75xx_ethtool_get_eeprom_len, 750 .get_eeprom = smsc75xx_ethtool_get_eeprom, 751 .set_eeprom = smsc75xx_ethtool_set_eeprom, 752 .get_wol = smsc75xx_ethtool_get_wol, 753 .set_wol = smsc75xx_ethtool_set_wol, 754 .get_link_ksettings = usbnet_get_link_ksettings, 755 .set_link_ksettings = usbnet_set_link_ksettings, 756 }; 757 758 static int smsc75xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 759 { 760 struct usbnet *dev = netdev_priv(netdev); 761 762 if (!netif_running(netdev)) 763 return -EINVAL; 764 765 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 766 } 767 768 static void smsc75xx_init_mac_address(struct usbnet *dev) 769 { 770 const u8 *mac_addr; 771 772 /* maybe the boot loader passed the MAC address in devicetree */ 773 mac_addr = of_get_mac_address(dev->udev->dev.of_node); 774 if (mac_addr) { 775 memcpy(dev->net->dev_addr, mac_addr, ETH_ALEN); 776 return; 777 } 778 779 /* try reading mac address from EEPROM */ 780 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 781 dev->net->dev_addr) == 0) { 782 if (is_valid_ether_addr(dev->net->dev_addr)) { 783 /* eeprom values are valid so use them */ 784 netif_dbg(dev, ifup, dev->net, 785 "MAC address read from EEPROM\n"); 786 return; 787 } 788 } 789 790 /* no useful static MAC address found. generate a random one */ 791 eth_hw_addr_random(dev->net); 792 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); 793 } 794 795 static int smsc75xx_set_mac_address(struct usbnet *dev) 796 { 797 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 798 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 799 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 800 801 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); 802 if (ret < 0) { 803 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret); 804 return ret; 805 } 806 807 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); 808 if (ret < 0) { 809 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret); 810 return ret; 811 } 812 813 addr_hi |= ADDR_FILTX_FB_VALID; 814 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); 815 if (ret < 0) { 816 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret); 817 return ret; 818 } 819 820 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); 821 if (ret < 0) 822 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret); 823 824 return ret; 825 } 826 827 static int smsc75xx_phy_initialize(struct usbnet *dev) 828 { 829 int bmcr, ret, timeout = 0; 830 831 /* Initialize MII structure */ 832 dev->mii.dev = dev->net; 833 dev->mii.mdio_read = smsc75xx_mdio_read; 834 dev->mii.mdio_write = smsc75xx_mdio_write; 835 dev->mii.phy_id_mask = 0x1f; 836 dev->mii.reg_num_mask = 0x1f; 837 dev->mii.supports_gmii = 1; 838 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; 839 840 /* reset phy and wait for reset to complete */ 841 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 842 843 do { 844 msleep(10); 845 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 846 if (bmcr < 0) { 847 netdev_warn(dev->net, "Error reading MII_BMCR\n"); 848 return bmcr; 849 } 850 timeout++; 851 } while ((bmcr & BMCR_RESET) && (timeout < 100)); 852 853 if (timeout >= 100) { 854 netdev_warn(dev->net, "timeout on PHY Reset\n"); 855 return -EIO; 856 } 857 858 /* phy workaround for gig link */ 859 smsc75xx_phy_gig_workaround(dev); 860 861 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 862 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 863 ADVERTISE_PAUSE_ASYM); 864 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, 865 ADVERTISE_1000FULL); 866 867 /* read and write to clear phy interrupt status */ 868 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 869 if (ret < 0) { 870 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); 871 return ret; 872 } 873 874 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff); 875 876 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 877 PHY_INT_MASK_DEFAULT); 878 mii_nway_restart(&dev->mii); 879 880 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 881 return 0; 882 } 883 884 static int smsc75xx_set_rx_max_frame_length(struct usbnet *dev, int size) 885 { 886 int ret = 0; 887 u32 buf; 888 bool rxenabled; 889 890 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 891 if (ret < 0) { 892 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); 893 return ret; 894 } 895 896 rxenabled = ((buf & MAC_RX_RXEN) != 0); 897 898 if (rxenabled) { 899 buf &= ~MAC_RX_RXEN; 900 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 901 if (ret < 0) { 902 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); 903 return ret; 904 } 905 } 906 907 /* add 4 to size for FCS */ 908 buf &= ~MAC_RX_MAX_SIZE; 909 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT) & MAC_RX_MAX_SIZE); 910 911 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 912 if (ret < 0) { 913 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); 914 return ret; 915 } 916 917 if (rxenabled) { 918 buf |= MAC_RX_RXEN; 919 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 920 if (ret < 0) { 921 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); 922 return ret; 923 } 924 } 925 926 return 0; 927 } 928 929 static int smsc75xx_change_mtu(struct net_device *netdev, int new_mtu) 930 { 931 struct usbnet *dev = netdev_priv(netdev); 932 int ret; 933 934 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN); 935 if (ret < 0) { 936 netdev_warn(dev->net, "Failed to set mac rx frame length\n"); 937 return ret; 938 } 939 940 return usbnet_change_mtu(netdev, new_mtu); 941 } 942 943 /* Enable or disable Rx checksum offload engine */ 944 static int smsc75xx_set_features(struct net_device *netdev, 945 netdev_features_t features) 946 { 947 struct usbnet *dev = netdev_priv(netdev); 948 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 949 unsigned long flags; 950 int ret; 951 952 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 953 954 if (features & NETIF_F_RXCSUM) 955 pdata->rfe_ctl |= RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM; 956 else 957 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_CKM | RFE_CTL_IP_CKM); 958 959 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 960 /* it's racing here! */ 961 962 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 963 if (ret < 0) { 964 netdev_warn(dev->net, "Error writing RFE_CTL\n"); 965 return ret; 966 } 967 return 0; 968 } 969 970 static int smsc75xx_wait_ready(struct usbnet *dev, int in_pm) 971 { 972 int timeout = 0; 973 974 do { 975 u32 buf; 976 int ret; 977 978 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm); 979 980 if (ret < 0) { 981 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); 982 return ret; 983 } 984 985 if (buf & PMT_CTL_DEV_RDY) 986 return 0; 987 988 msleep(10); 989 timeout++; 990 } while (timeout < 100); 991 992 netdev_warn(dev->net, "timeout waiting for device ready\n"); 993 return -EIO; 994 } 995 996 static int smsc75xx_phy_gig_workaround(struct usbnet *dev) 997 { 998 struct mii_if_info *mii = &dev->mii; 999 int ret = 0, timeout = 0; 1000 u32 buf, link_up = 0; 1001 1002 /* Set the phy in Gig loopback */ 1003 smsc75xx_mdio_write(dev->net, mii->phy_id, MII_BMCR, 0x4040); 1004 1005 /* Wait for the link up */ 1006 do { 1007 link_up = smsc75xx_link_ok_nopm(dev); 1008 usleep_range(10000, 20000); 1009 timeout++; 1010 } while ((!link_up) && (timeout < 1000)); 1011 1012 if (timeout >= 1000) { 1013 netdev_warn(dev->net, "Timeout waiting for PHY link up\n"); 1014 return -EIO; 1015 } 1016 1017 /* phy reset */ 1018 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 1019 if (ret < 0) { 1020 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); 1021 return ret; 1022 } 1023 1024 buf |= PMT_CTL_PHY_RST; 1025 1026 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); 1027 if (ret < 0) { 1028 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); 1029 return ret; 1030 } 1031 1032 timeout = 0; 1033 do { 1034 usleep_range(10000, 20000); 1035 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 1036 if (ret < 0) { 1037 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", 1038 ret); 1039 return ret; 1040 } 1041 timeout++; 1042 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); 1043 1044 if (timeout >= 100) { 1045 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 1046 return -EIO; 1047 } 1048 1049 return 0; 1050 } 1051 1052 static int smsc75xx_reset(struct usbnet *dev) 1053 { 1054 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1055 u32 buf; 1056 int ret = 0, timeout; 1057 1058 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n"); 1059 1060 ret = smsc75xx_wait_ready(dev, 0); 1061 if (ret < 0) { 1062 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n"); 1063 return ret; 1064 } 1065 1066 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1067 if (ret < 0) { 1068 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1069 return ret; 1070 } 1071 1072 buf |= HW_CFG_LRST; 1073 1074 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 1075 if (ret < 0) { 1076 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); 1077 return ret; 1078 } 1079 1080 timeout = 0; 1081 do { 1082 msleep(10); 1083 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1084 if (ret < 0) { 1085 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1086 return ret; 1087 } 1088 timeout++; 1089 } while ((buf & HW_CFG_LRST) && (timeout < 100)); 1090 1091 if (timeout >= 100) { 1092 netdev_warn(dev->net, "timeout on completion of Lite Reset\n"); 1093 return -EIO; 1094 } 1095 1096 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n"); 1097 1098 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 1099 if (ret < 0) { 1100 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); 1101 return ret; 1102 } 1103 1104 buf |= PMT_CTL_PHY_RST; 1105 1106 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); 1107 if (ret < 0) { 1108 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); 1109 return ret; 1110 } 1111 1112 timeout = 0; 1113 do { 1114 msleep(10); 1115 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); 1116 if (ret < 0) { 1117 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); 1118 return ret; 1119 } 1120 timeout++; 1121 } while ((buf & PMT_CTL_PHY_RST) && (timeout < 100)); 1122 1123 if (timeout >= 100) { 1124 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 1125 return -EIO; 1126 } 1127 1128 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n"); 1129 1130 ret = smsc75xx_set_mac_address(dev); 1131 if (ret < 0) { 1132 netdev_warn(dev->net, "Failed to set mac address\n"); 1133 return ret; 1134 } 1135 1136 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", 1137 dev->net->dev_addr); 1138 1139 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1140 if (ret < 0) { 1141 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1142 return ret; 1143 } 1144 1145 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", 1146 buf); 1147 1148 buf |= HW_CFG_BIR; 1149 1150 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 1151 if (ret < 0) { 1152 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); 1153 return ret; 1154 } 1155 1156 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1157 if (ret < 0) { 1158 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1159 return ret; 1160 } 1161 1162 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n", 1163 buf); 1164 1165 if (!turbo_mode) { 1166 buf = 0; 1167 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 1168 } else if (dev->udev->speed == USB_SPEED_HIGH) { 1169 buf = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 1170 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 1171 } else { 1172 buf = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 1173 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 1174 } 1175 1176 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", 1177 (ulong)dev->rx_urb_size); 1178 1179 ret = smsc75xx_write_reg(dev, BURST_CAP, buf); 1180 if (ret < 0) { 1181 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); 1182 return ret; 1183 } 1184 1185 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); 1186 if (ret < 0) { 1187 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 1188 return ret; 1189 } 1190 1191 netif_dbg(dev, ifup, dev->net, 1192 "Read Value from BURST_CAP after writing: 0x%08x\n", buf); 1193 1194 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); 1195 if (ret < 0) { 1196 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret); 1197 return ret; 1198 } 1199 1200 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); 1201 if (ret < 0) { 1202 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 1203 return ret; 1204 } 1205 1206 netif_dbg(dev, ifup, dev->net, 1207 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", buf); 1208 1209 if (turbo_mode) { 1210 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1211 if (ret < 0) { 1212 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1213 return ret; 1214 } 1215 1216 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); 1217 1218 buf |= (HW_CFG_MEF | HW_CFG_BCE); 1219 1220 ret = smsc75xx_write_reg(dev, HW_CFG, buf); 1221 if (ret < 0) { 1222 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); 1223 return ret; 1224 } 1225 1226 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); 1227 if (ret < 0) { 1228 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 1229 return ret; 1230 } 1231 1232 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); 1233 } 1234 1235 /* set FIFO sizes */ 1236 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 1237 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); 1238 if (ret < 0) { 1239 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret); 1240 return ret; 1241 } 1242 1243 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf); 1244 1245 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 1246 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); 1247 if (ret < 0) { 1248 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret); 1249 return ret; 1250 } 1251 1252 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf); 1253 1254 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); 1255 if (ret < 0) { 1256 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret); 1257 return ret; 1258 } 1259 1260 ret = smsc75xx_read_reg(dev, ID_REV, &buf); 1261 if (ret < 0) { 1262 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 1263 return ret; 1264 } 1265 1266 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf); 1267 1268 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf); 1269 if (ret < 0) { 1270 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret); 1271 return ret; 1272 } 1273 1274 /* only set default GPIO/LED settings if no EEPROM is detected */ 1275 if (!(buf & E2P_CMD_LOADED)) { 1276 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); 1277 if (ret < 0) { 1278 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret); 1279 return ret; 1280 } 1281 1282 buf &= ~(LED_GPIO_CFG_LED2_FUN_SEL | LED_GPIO_CFG_LED10_FUN_SEL); 1283 buf |= LED_GPIO_CFG_LEDGPIO_EN | LED_GPIO_CFG_LED2_FUN_SEL; 1284 1285 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); 1286 if (ret < 0) { 1287 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret); 1288 return ret; 1289 } 1290 } 1291 1292 ret = smsc75xx_write_reg(dev, FLOW, 0); 1293 if (ret < 0) { 1294 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); 1295 return ret; 1296 } 1297 1298 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); 1299 if (ret < 0) { 1300 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret); 1301 return ret; 1302 } 1303 1304 /* Don't need rfe_ctl_lock during initialisation */ 1305 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 1306 if (ret < 0) { 1307 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); 1308 return ret; 1309 } 1310 1311 pdata->rfe_ctl |= RFE_CTL_AB | RFE_CTL_DPF; 1312 1313 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1314 if (ret < 0) { 1315 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret); 1316 return ret; 1317 } 1318 1319 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 1320 if (ret < 0) { 1321 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); 1322 return ret; 1323 } 1324 1325 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n", 1326 pdata->rfe_ctl); 1327 1328 /* Enable or disable checksum offload engines */ 1329 smsc75xx_set_features(dev->net, dev->net->features); 1330 1331 smsc75xx_set_multicast(dev->net); 1332 1333 ret = smsc75xx_phy_initialize(dev); 1334 if (ret < 0) { 1335 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret); 1336 return ret; 1337 } 1338 1339 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); 1340 if (ret < 0) { 1341 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); 1342 return ret; 1343 } 1344 1345 /* enable PHY interrupts */ 1346 buf |= INT_ENP_PHY_INT; 1347 1348 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); 1349 if (ret < 0) { 1350 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); 1351 return ret; 1352 } 1353 1354 /* allow mac to detect speed and duplex from phy */ 1355 ret = smsc75xx_read_reg(dev, MAC_CR, &buf); 1356 if (ret < 0) { 1357 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); 1358 return ret; 1359 } 1360 1361 buf |= (MAC_CR_ADD | MAC_CR_ASD); 1362 ret = smsc75xx_write_reg(dev, MAC_CR, buf); 1363 if (ret < 0) { 1364 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); 1365 return ret; 1366 } 1367 1368 ret = smsc75xx_read_reg(dev, MAC_TX, &buf); 1369 if (ret < 0) { 1370 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret); 1371 return ret; 1372 } 1373 1374 buf |= MAC_TX_TXEN; 1375 1376 ret = smsc75xx_write_reg(dev, MAC_TX, buf); 1377 if (ret < 0) { 1378 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret); 1379 return ret; 1380 } 1381 1382 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf); 1383 1384 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); 1385 if (ret < 0) { 1386 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret); 1387 return ret; 1388 } 1389 1390 buf |= FCT_TX_CTL_EN; 1391 1392 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); 1393 if (ret < 0) { 1394 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret); 1395 return ret; 1396 } 1397 1398 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf); 1399 1400 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN); 1401 if (ret < 0) { 1402 netdev_warn(dev->net, "Failed to set max rx frame length\n"); 1403 return ret; 1404 } 1405 1406 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); 1407 if (ret < 0) { 1408 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); 1409 return ret; 1410 } 1411 1412 buf |= MAC_RX_RXEN; 1413 1414 ret = smsc75xx_write_reg(dev, MAC_RX, buf); 1415 if (ret < 0) { 1416 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); 1417 return ret; 1418 } 1419 1420 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf); 1421 1422 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); 1423 if (ret < 0) { 1424 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret); 1425 return ret; 1426 } 1427 1428 buf |= FCT_RX_CTL_EN; 1429 1430 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); 1431 if (ret < 0) { 1432 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret); 1433 return ret; 1434 } 1435 1436 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf); 1437 1438 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n"); 1439 return 0; 1440 } 1441 1442 static const struct net_device_ops smsc75xx_netdev_ops = { 1443 .ndo_open = usbnet_open, 1444 .ndo_stop = usbnet_stop, 1445 .ndo_start_xmit = usbnet_start_xmit, 1446 .ndo_tx_timeout = usbnet_tx_timeout, 1447 .ndo_get_stats64 = usbnet_get_stats64, 1448 .ndo_change_mtu = smsc75xx_change_mtu, 1449 .ndo_set_mac_address = eth_mac_addr, 1450 .ndo_validate_addr = eth_validate_addr, 1451 .ndo_do_ioctl = smsc75xx_ioctl, 1452 .ndo_set_rx_mode = smsc75xx_set_multicast, 1453 .ndo_set_features = smsc75xx_set_features, 1454 }; 1455 1456 static int smsc75xx_bind(struct usbnet *dev, struct usb_interface *intf) 1457 { 1458 struct smsc75xx_priv *pdata = NULL; 1459 int ret; 1460 1461 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1462 1463 ret = usbnet_get_endpoints(dev, intf); 1464 if (ret < 0) { 1465 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 1466 return ret; 1467 } 1468 1469 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), 1470 GFP_KERNEL); 1471 1472 pdata = (struct smsc75xx_priv *)(dev->data[0]); 1473 if (!pdata) 1474 return -ENOMEM; 1475 1476 pdata->dev = dev; 1477 1478 spin_lock_init(&pdata->rfe_ctl_lock); 1479 mutex_init(&pdata->dataport_mutex); 1480 1481 INIT_WORK(&pdata->set_multicast, smsc75xx_deferred_multicast_write); 1482 1483 if (DEFAULT_TX_CSUM_ENABLE) 1484 dev->net->features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM; 1485 1486 if (DEFAULT_RX_CSUM_ENABLE) 1487 dev->net->features |= NETIF_F_RXCSUM; 1488 1489 dev->net->hw_features = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM | 1490 NETIF_F_RXCSUM; 1491 1492 ret = smsc75xx_wait_ready(dev, 0); 1493 if (ret < 0) { 1494 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n"); 1495 return ret; 1496 } 1497 1498 smsc75xx_init_mac_address(dev); 1499 1500 /* Init all registers */ 1501 ret = smsc75xx_reset(dev); 1502 if (ret < 0) { 1503 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret); 1504 return ret; 1505 } 1506 1507 dev->net->netdev_ops = &smsc75xx_netdev_ops; 1508 dev->net->ethtool_ops = &smsc75xx_ethtool_ops; 1509 dev->net->flags |= IFF_MULTICAST; 1510 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; 1511 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; 1512 dev->net->max_mtu = MAX_SINGLE_PACKET_SIZE; 1513 return 0; 1514 } 1515 1516 static void smsc75xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1517 { 1518 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1519 if (pdata) { 1520 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1521 kfree(pdata); 1522 pdata = NULL; 1523 dev->data[0] = 0; 1524 } 1525 } 1526 1527 static u16 smsc_crc(const u8 *buffer, size_t len) 1528 { 1529 return bitrev16(crc16(0xFFFF, buffer, len)); 1530 } 1531 1532 static int smsc75xx_write_wuff(struct usbnet *dev, int filter, u32 wuf_cfg, 1533 u32 wuf_mask1) 1534 { 1535 int cfg_base = WUF_CFGX + filter * 4; 1536 int mask_base = WUF_MASKX + filter * 16; 1537 int ret; 1538 1539 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); 1540 if (ret < 0) { 1541 netdev_warn(dev->net, "Error writing WUF_CFGX\n"); 1542 return ret; 1543 } 1544 1545 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1); 1546 if (ret < 0) { 1547 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); 1548 return ret; 1549 } 1550 1551 ret = smsc75xx_write_reg(dev, mask_base + 4, 0); 1552 if (ret < 0) { 1553 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); 1554 return ret; 1555 } 1556 1557 ret = smsc75xx_write_reg(dev, mask_base + 8, 0); 1558 if (ret < 0) { 1559 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); 1560 return ret; 1561 } 1562 1563 ret = smsc75xx_write_reg(dev, mask_base + 12, 0); 1564 if (ret < 0) { 1565 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); 1566 return ret; 1567 } 1568 1569 return 0; 1570 } 1571 1572 static int smsc75xx_enter_suspend0(struct usbnet *dev) 1573 { 1574 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1575 u32 val; 1576 int ret; 1577 1578 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1579 if (ret < 0) { 1580 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 1581 return ret; 1582 } 1583 1584 val &= (~(PMT_CTL_SUS_MODE | PMT_CTL_PHY_RST)); 1585 val |= PMT_CTL_SUS_MODE_0 | PMT_CTL_WOL_EN | PMT_CTL_WUPS; 1586 1587 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1588 if (ret < 0) { 1589 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1590 return ret; 1591 } 1592 1593 pdata->suspend_flags |= SUSPEND_SUSPEND0; 1594 1595 return 0; 1596 } 1597 1598 static int smsc75xx_enter_suspend1(struct usbnet *dev) 1599 { 1600 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1601 u32 val; 1602 int ret; 1603 1604 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1605 if (ret < 0) { 1606 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 1607 return ret; 1608 } 1609 1610 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); 1611 val |= PMT_CTL_SUS_MODE_1; 1612 1613 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1614 if (ret < 0) { 1615 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1616 return ret; 1617 } 1618 1619 /* clear wol status, enable energy detection */ 1620 val &= ~PMT_CTL_WUPS; 1621 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); 1622 1623 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1624 if (ret < 0) { 1625 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1626 return ret; 1627 } 1628 1629 pdata->suspend_flags |= SUSPEND_SUSPEND1; 1630 1631 return 0; 1632 } 1633 1634 static int smsc75xx_enter_suspend2(struct usbnet *dev) 1635 { 1636 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1637 u32 val; 1638 int ret; 1639 1640 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1641 if (ret < 0) { 1642 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 1643 return ret; 1644 } 1645 1646 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); 1647 val |= PMT_CTL_SUS_MODE_2; 1648 1649 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1650 if (ret < 0) { 1651 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1652 return ret; 1653 } 1654 1655 pdata->suspend_flags |= SUSPEND_SUSPEND2; 1656 1657 return 0; 1658 } 1659 1660 static int smsc75xx_enter_suspend3(struct usbnet *dev) 1661 { 1662 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1663 u32 val; 1664 int ret; 1665 1666 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val); 1667 if (ret < 0) { 1668 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n"); 1669 return ret; 1670 } 1671 1672 if (val & FCT_RX_CTL_RXUSED) { 1673 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n"); 1674 return -EBUSY; 1675 } 1676 1677 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1678 if (ret < 0) { 1679 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 1680 return ret; 1681 } 1682 1683 val &= ~(PMT_CTL_SUS_MODE | PMT_CTL_WUPS | PMT_CTL_PHY_RST); 1684 val |= PMT_CTL_SUS_MODE_3 | PMT_CTL_RES_CLR_WKP_EN; 1685 1686 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1687 if (ret < 0) { 1688 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1689 return ret; 1690 } 1691 1692 /* clear wol status */ 1693 val &= ~PMT_CTL_WUPS; 1694 val |= PMT_CTL_WUPS_WOL; 1695 1696 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1697 if (ret < 0) { 1698 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1699 return ret; 1700 } 1701 1702 pdata->suspend_flags |= SUSPEND_SUSPEND3; 1703 1704 return 0; 1705 } 1706 1707 static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet *dev, u16 mask) 1708 { 1709 struct mii_if_info *mii = &dev->mii; 1710 int ret; 1711 1712 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); 1713 1714 /* read to clear */ 1715 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); 1716 if (ret < 0) { 1717 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); 1718 return ret; 1719 } 1720 1721 /* enable interrupt source */ 1722 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); 1723 if (ret < 0) { 1724 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n"); 1725 return ret; 1726 } 1727 1728 ret |= mask; 1729 1730 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); 1731 1732 return 0; 1733 } 1734 1735 static int smsc75xx_link_ok_nopm(struct usbnet *dev) 1736 { 1737 struct mii_if_info *mii = &dev->mii; 1738 int ret; 1739 1740 /* first, a dummy read, needed to latch some MII phys */ 1741 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1742 if (ret < 0) { 1743 netdev_warn(dev->net, "Error reading MII_BMSR\n"); 1744 return ret; 1745 } 1746 1747 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); 1748 if (ret < 0) { 1749 netdev_warn(dev->net, "Error reading MII_BMSR\n"); 1750 return ret; 1751 } 1752 1753 return !!(ret & BMSR_LSTATUS); 1754 } 1755 1756 static int smsc75xx_autosuspend(struct usbnet *dev, u32 link_up) 1757 { 1758 int ret; 1759 1760 if (!netif_running(dev->net)) { 1761 /* interface is ifconfig down so fully power down hw */ 1762 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); 1763 return smsc75xx_enter_suspend2(dev); 1764 } 1765 1766 if (!link_up) { 1767 /* link is down so enter EDPD mode */ 1768 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); 1769 1770 /* enable PHY wakeup events for if cable is attached */ 1771 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, 1772 PHY_INT_MASK_ANEG_COMP); 1773 if (ret < 0) { 1774 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1775 return ret; 1776 } 1777 1778 netdev_info(dev->net, "entering SUSPEND1 mode\n"); 1779 return smsc75xx_enter_suspend1(dev); 1780 } 1781 1782 /* enable PHY wakeup events so we remote wakeup if cable is pulled */ 1783 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, 1784 PHY_INT_MASK_LINK_DOWN); 1785 if (ret < 0) { 1786 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1787 return ret; 1788 } 1789 1790 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); 1791 return smsc75xx_enter_suspend3(dev); 1792 } 1793 1794 static int smsc75xx_suspend(struct usb_interface *intf, pm_message_t message) 1795 { 1796 struct usbnet *dev = usb_get_intfdata(intf); 1797 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 1798 u32 val, link_up; 1799 int ret; 1800 1801 ret = usbnet_suspend(intf, message); 1802 if (ret < 0) { 1803 netdev_warn(dev->net, "usbnet_suspend error\n"); 1804 return ret; 1805 } 1806 1807 if (pdata->suspend_flags) { 1808 netdev_warn(dev->net, "error during last resume\n"); 1809 pdata->suspend_flags = 0; 1810 } 1811 1812 /* determine if link is up using only _nopm functions */ 1813 link_up = smsc75xx_link_ok_nopm(dev); 1814 1815 if (message.event == PM_EVENT_AUTO_SUSPEND) { 1816 ret = smsc75xx_autosuspend(dev, link_up); 1817 goto done; 1818 } 1819 1820 /* if we get this far we're not autosuspending */ 1821 /* if no wol options set, or if link is down and we're not waking on 1822 * PHY activity, enter lowest power SUSPEND2 mode 1823 */ 1824 if (!(pdata->wolopts & SUPPORTED_WAKE) || 1825 !(link_up || (pdata->wolopts & WAKE_PHY))) { 1826 netdev_info(dev->net, "entering SUSPEND2 mode\n"); 1827 1828 /* disable energy detect (link up) & wake up events */ 1829 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 1830 if (ret < 0) { 1831 netdev_warn(dev->net, "Error reading WUCSR\n"); 1832 goto done; 1833 } 1834 1835 val &= ~(WUCSR_MPEN | WUCSR_WUEN); 1836 1837 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 1838 if (ret < 0) { 1839 netdev_warn(dev->net, "Error writing WUCSR\n"); 1840 goto done; 1841 } 1842 1843 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1844 if (ret < 0) { 1845 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 1846 goto done; 1847 } 1848 1849 val &= ~(PMT_CTL_ED_EN | PMT_CTL_WOL_EN); 1850 1851 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 1852 if (ret < 0) { 1853 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 1854 goto done; 1855 } 1856 1857 ret = smsc75xx_enter_suspend2(dev); 1858 goto done; 1859 } 1860 1861 if (pdata->wolopts & WAKE_PHY) { 1862 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, 1863 (PHY_INT_MASK_ANEG_COMP | PHY_INT_MASK_LINK_DOWN)); 1864 if (ret < 0) { 1865 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); 1866 goto done; 1867 } 1868 1869 /* if link is down then configure EDPD and enter SUSPEND1, 1870 * otherwise enter SUSPEND0 below 1871 */ 1872 if (!link_up) { 1873 struct mii_if_info *mii = &dev->mii; 1874 netdev_info(dev->net, "entering SUSPEND1 mode\n"); 1875 1876 /* enable energy detect power-down mode */ 1877 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, 1878 PHY_MODE_CTRL_STS); 1879 if (ret < 0) { 1880 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n"); 1881 goto done; 1882 } 1883 1884 ret |= MODE_CTRL_STS_EDPWRDOWN; 1885 1886 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, 1887 PHY_MODE_CTRL_STS, ret); 1888 1889 /* enter SUSPEND1 mode */ 1890 ret = smsc75xx_enter_suspend1(dev); 1891 goto done; 1892 } 1893 } 1894 1895 if (pdata->wolopts & (WAKE_MCAST | WAKE_ARP)) { 1896 int i, filter = 0; 1897 1898 /* disable all filters */ 1899 for (i = 0; i < WUF_NUM; i++) { 1900 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0); 1901 if (ret < 0) { 1902 netdev_warn(dev->net, "Error writing WUF_CFGX\n"); 1903 goto done; 1904 } 1905 } 1906 1907 if (pdata->wolopts & WAKE_MCAST) { 1908 const u8 mcast[] = {0x01, 0x00, 0x5E}; 1909 netdev_info(dev->net, "enabling multicast detection\n"); 1910 1911 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_MULTICAST 1912 | smsc_crc(mcast, 3); 1913 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007); 1914 if (ret < 0) { 1915 netdev_warn(dev->net, "Error writing wakeup filter\n"); 1916 goto done; 1917 } 1918 } 1919 1920 if (pdata->wolopts & WAKE_ARP) { 1921 const u8 arp[] = {0x08, 0x06}; 1922 netdev_info(dev->net, "enabling ARP detection\n"); 1923 1924 val = WUF_CFGX_EN | WUF_CFGX_ATYPE_ALL | (0x0C << 16) 1925 | smsc_crc(arp, 2); 1926 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003); 1927 if (ret < 0) { 1928 netdev_warn(dev->net, "Error writing wakeup filter\n"); 1929 goto done; 1930 } 1931 } 1932 1933 /* clear any pending pattern match packet status */ 1934 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 1935 if (ret < 0) { 1936 netdev_warn(dev->net, "Error reading WUCSR\n"); 1937 goto done; 1938 } 1939 1940 val |= WUCSR_WUFR; 1941 1942 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 1943 if (ret < 0) { 1944 netdev_warn(dev->net, "Error writing WUCSR\n"); 1945 goto done; 1946 } 1947 1948 netdev_info(dev->net, "enabling packet match detection\n"); 1949 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 1950 if (ret < 0) { 1951 netdev_warn(dev->net, "Error reading WUCSR\n"); 1952 goto done; 1953 } 1954 1955 val |= WUCSR_WUEN; 1956 1957 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 1958 if (ret < 0) { 1959 netdev_warn(dev->net, "Error writing WUCSR\n"); 1960 goto done; 1961 } 1962 } else { 1963 netdev_info(dev->net, "disabling packet match detection\n"); 1964 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 1965 if (ret < 0) { 1966 netdev_warn(dev->net, "Error reading WUCSR\n"); 1967 goto done; 1968 } 1969 1970 val &= ~WUCSR_WUEN; 1971 1972 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 1973 if (ret < 0) { 1974 netdev_warn(dev->net, "Error writing WUCSR\n"); 1975 goto done; 1976 } 1977 } 1978 1979 /* disable magic, bcast & unicast wakeup sources */ 1980 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 1981 if (ret < 0) { 1982 netdev_warn(dev->net, "Error reading WUCSR\n"); 1983 goto done; 1984 } 1985 1986 val &= ~(WUCSR_MPEN | WUCSR_BCST_EN | WUCSR_PFDA_EN); 1987 1988 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 1989 if (ret < 0) { 1990 netdev_warn(dev->net, "Error writing WUCSR\n"); 1991 goto done; 1992 } 1993 1994 if (pdata->wolopts & WAKE_PHY) { 1995 netdev_info(dev->net, "enabling PHY wakeup\n"); 1996 1997 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 1998 if (ret < 0) { 1999 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 2000 goto done; 2001 } 2002 2003 /* clear wol status, enable energy detection */ 2004 val &= ~PMT_CTL_WUPS; 2005 val |= (PMT_CTL_WUPS_ED | PMT_CTL_ED_EN); 2006 2007 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 2008 if (ret < 0) { 2009 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 2010 goto done; 2011 } 2012 } 2013 2014 if (pdata->wolopts & WAKE_MAGIC) { 2015 netdev_info(dev->net, "enabling magic packet wakeup\n"); 2016 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 2017 if (ret < 0) { 2018 netdev_warn(dev->net, "Error reading WUCSR\n"); 2019 goto done; 2020 } 2021 2022 /* clear any pending magic packet status */ 2023 val |= WUCSR_MPR | WUCSR_MPEN; 2024 2025 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 2026 if (ret < 0) { 2027 netdev_warn(dev->net, "Error writing WUCSR\n"); 2028 goto done; 2029 } 2030 } 2031 2032 if (pdata->wolopts & WAKE_BCAST) { 2033 netdev_info(dev->net, "enabling broadcast detection\n"); 2034 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 2035 if (ret < 0) { 2036 netdev_warn(dev->net, "Error reading WUCSR\n"); 2037 goto done; 2038 } 2039 2040 val |= WUCSR_BCAST_FR | WUCSR_BCST_EN; 2041 2042 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 2043 if (ret < 0) { 2044 netdev_warn(dev->net, "Error writing WUCSR\n"); 2045 goto done; 2046 } 2047 } 2048 2049 if (pdata->wolopts & WAKE_UCAST) { 2050 netdev_info(dev->net, "enabling unicast detection\n"); 2051 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 2052 if (ret < 0) { 2053 netdev_warn(dev->net, "Error reading WUCSR\n"); 2054 goto done; 2055 } 2056 2057 val |= WUCSR_WUFR | WUCSR_PFDA_EN; 2058 2059 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 2060 if (ret < 0) { 2061 netdev_warn(dev->net, "Error writing WUCSR\n"); 2062 goto done; 2063 } 2064 } 2065 2066 /* enable receiver to enable frame reception */ 2067 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val); 2068 if (ret < 0) { 2069 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); 2070 goto done; 2071 } 2072 2073 val |= MAC_RX_RXEN; 2074 2075 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val); 2076 if (ret < 0) { 2077 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); 2078 goto done; 2079 } 2080 2081 /* some wol options are enabled, so enter SUSPEND0 */ 2082 netdev_info(dev->net, "entering SUSPEND0 mode\n"); 2083 ret = smsc75xx_enter_suspend0(dev); 2084 2085 done: 2086 /* 2087 * TODO: resume() might need to handle the suspend failure 2088 * in system sleep 2089 */ 2090 if (ret && PMSG_IS_AUTO(message)) 2091 usbnet_resume(intf); 2092 return ret; 2093 } 2094 2095 static int smsc75xx_resume(struct usb_interface *intf) 2096 { 2097 struct usbnet *dev = usb_get_intfdata(intf); 2098 struct smsc75xx_priv *pdata = (struct smsc75xx_priv *)(dev->data[0]); 2099 u8 suspend_flags = pdata->suspend_flags; 2100 int ret; 2101 u32 val; 2102 2103 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); 2104 2105 /* do this first to ensure it's cleared even in error case */ 2106 pdata->suspend_flags = 0; 2107 2108 if (suspend_flags & SUSPEND_ALLMODES) { 2109 /* Disable wakeup sources */ 2110 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); 2111 if (ret < 0) { 2112 netdev_warn(dev->net, "Error reading WUCSR\n"); 2113 return ret; 2114 } 2115 2116 val &= ~(WUCSR_WUEN | WUCSR_MPEN | WUCSR_PFDA_EN 2117 | WUCSR_BCST_EN); 2118 2119 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); 2120 if (ret < 0) { 2121 netdev_warn(dev->net, "Error writing WUCSR\n"); 2122 return ret; 2123 } 2124 2125 /* clear wake-up status */ 2126 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 2127 if (ret < 0) { 2128 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 2129 return ret; 2130 } 2131 2132 val &= ~PMT_CTL_WOL_EN; 2133 val |= PMT_CTL_WUPS; 2134 2135 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 2136 if (ret < 0) { 2137 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 2138 return ret; 2139 } 2140 } 2141 2142 if (suspend_flags & SUSPEND_SUSPEND2) { 2143 netdev_info(dev->net, "resuming from SUSPEND2\n"); 2144 2145 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); 2146 if (ret < 0) { 2147 netdev_warn(dev->net, "Error reading PMT_CTL\n"); 2148 return ret; 2149 } 2150 2151 val |= PMT_CTL_PHY_PWRUP; 2152 2153 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); 2154 if (ret < 0) { 2155 netdev_warn(dev->net, "Error writing PMT_CTL\n"); 2156 return ret; 2157 } 2158 } 2159 2160 ret = smsc75xx_wait_ready(dev, 1); 2161 if (ret < 0) { 2162 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n"); 2163 return ret; 2164 } 2165 2166 return usbnet_resume(intf); 2167 } 2168 2169 static void smsc75xx_rx_csum_offload(struct usbnet *dev, struct sk_buff *skb, 2170 u32 rx_cmd_a, u32 rx_cmd_b) 2171 { 2172 if (!(dev->net->features & NETIF_F_RXCSUM) || 2173 unlikely(rx_cmd_a & RX_CMD_A_LCSM)) { 2174 skb->ip_summed = CHECKSUM_NONE; 2175 } else { 2176 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT)); 2177 skb->ip_summed = CHECKSUM_COMPLETE; 2178 } 2179 } 2180 2181 static int smsc75xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 2182 { 2183 /* This check is no longer done by usbnet */ 2184 if (skb->len < dev->net->hard_header_len) 2185 return 0; 2186 2187 while (skb->len > 0) { 2188 u32 rx_cmd_a, rx_cmd_b, align_count, size; 2189 struct sk_buff *ax_skb; 2190 unsigned char *packet; 2191 2192 memcpy(&rx_cmd_a, skb->data, sizeof(rx_cmd_a)); 2193 le32_to_cpus(&rx_cmd_a); 2194 skb_pull(skb, 4); 2195 2196 memcpy(&rx_cmd_b, skb->data, sizeof(rx_cmd_b)); 2197 le32_to_cpus(&rx_cmd_b); 2198 skb_pull(skb, 4 + RXW_PADDING); 2199 2200 packet = skb->data; 2201 2202 /* get the packet length */ 2203 size = (rx_cmd_a & RX_CMD_A_LEN) - RXW_PADDING; 2204 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 2205 2206 if (unlikely(rx_cmd_a & RX_CMD_A_RED)) { 2207 netif_dbg(dev, rx_err, dev->net, 2208 "Error rx_cmd_a=0x%08x\n", rx_cmd_a); 2209 dev->net->stats.rx_errors++; 2210 dev->net->stats.rx_dropped++; 2211 2212 if (rx_cmd_a & RX_CMD_A_FCS) 2213 dev->net->stats.rx_crc_errors++; 2214 else if (rx_cmd_a & (RX_CMD_A_LONG | RX_CMD_A_RUNT)) 2215 dev->net->stats.rx_frame_errors++; 2216 } else { 2217 /* MAX_SINGLE_PACKET_SIZE + 4(CRC) + 2(COE) + 4(Vlan) */ 2218 if (unlikely(size > (MAX_SINGLE_PACKET_SIZE + ETH_HLEN + 12))) { 2219 netif_dbg(dev, rx_err, dev->net, 2220 "size err rx_cmd_a=0x%08x\n", 2221 rx_cmd_a); 2222 return 0; 2223 } 2224 2225 /* last frame in this batch */ 2226 if (skb->len == size) { 2227 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, 2228 rx_cmd_b); 2229 2230 skb_trim(skb, skb->len - 4); /* remove fcs */ 2231 skb->truesize = size + sizeof(struct sk_buff); 2232 2233 return 1; 2234 } 2235 2236 ax_skb = skb_clone(skb, GFP_ATOMIC); 2237 if (unlikely(!ax_skb)) { 2238 netdev_warn(dev->net, "Error allocating skb\n"); 2239 return 0; 2240 } 2241 2242 ax_skb->len = size; 2243 ax_skb->data = packet; 2244 skb_set_tail_pointer(ax_skb, size); 2245 2246 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, 2247 rx_cmd_b); 2248 2249 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 2250 ax_skb->truesize = size + sizeof(struct sk_buff); 2251 2252 usbnet_skb_return(dev, ax_skb); 2253 } 2254 2255 skb_pull(skb, size); 2256 2257 /* padding bytes before the next frame starts */ 2258 if (skb->len) 2259 skb_pull(skb, align_count); 2260 } 2261 2262 return 1; 2263 } 2264 2265 static struct sk_buff *smsc75xx_tx_fixup(struct usbnet *dev, 2266 struct sk_buff *skb, gfp_t flags) 2267 { 2268 u32 tx_cmd_a, tx_cmd_b; 2269 2270 if (skb_cow_head(skb, SMSC75XX_TX_OVERHEAD)) { 2271 dev_kfree_skb_any(skb); 2272 return NULL; 2273 } 2274 2275 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN) | TX_CMD_A_FCS; 2276 2277 if (skb->ip_summed == CHECKSUM_PARTIAL) 2278 tx_cmd_a |= TX_CMD_A_IPE | TX_CMD_A_TPE; 2279 2280 if (skb_is_gso(skb)) { 2281 u16 mss = max(skb_shinfo(skb)->gso_size, TX_MSS_MIN); 2282 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT) & TX_CMD_B_MSS; 2283 2284 tx_cmd_a |= TX_CMD_A_LSO; 2285 } else { 2286 tx_cmd_b = 0; 2287 } 2288 2289 skb_push(skb, 4); 2290 cpu_to_le32s(&tx_cmd_b); 2291 memcpy(skb->data, &tx_cmd_b, 4); 2292 2293 skb_push(skb, 4); 2294 cpu_to_le32s(&tx_cmd_a); 2295 memcpy(skb->data, &tx_cmd_a, 4); 2296 2297 return skb; 2298 } 2299 2300 static int smsc75xx_manage_power(struct usbnet *dev, int on) 2301 { 2302 dev->intf->needs_remote_wakeup = on; 2303 return 0; 2304 } 2305 2306 static const struct driver_info smsc75xx_info = { 2307 .description = "smsc75xx USB 2.0 Gigabit Ethernet", 2308 .bind = smsc75xx_bind, 2309 .unbind = smsc75xx_unbind, 2310 .link_reset = smsc75xx_link_reset, 2311 .reset = smsc75xx_reset, 2312 .rx_fixup = smsc75xx_rx_fixup, 2313 .tx_fixup = smsc75xx_tx_fixup, 2314 .status = smsc75xx_status, 2315 .manage_power = smsc75xx_manage_power, 2316 .flags = FLAG_ETHER | FLAG_SEND_ZLP | FLAG_LINK_INTR, 2317 }; 2318 2319 static const struct usb_device_id products[] = { 2320 { 2321 /* SMSC7500 USB Gigabit Ethernet Device */ 2322 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7500), 2323 .driver_info = (unsigned long) &smsc75xx_info, 2324 }, 2325 { 2326 /* SMSC7500 USB Gigabit Ethernet Device */ 2327 USB_DEVICE(USB_VENDOR_ID_SMSC, USB_PRODUCT_ID_LAN7505), 2328 .driver_info = (unsigned long) &smsc75xx_info, 2329 }, 2330 { }, /* END */ 2331 }; 2332 MODULE_DEVICE_TABLE(usb, products); 2333 2334 static struct usb_driver smsc75xx_driver = { 2335 .name = SMSC_CHIPNAME, 2336 .id_table = products, 2337 .probe = usbnet_probe, 2338 .suspend = smsc75xx_suspend, 2339 .resume = smsc75xx_resume, 2340 .reset_resume = smsc75xx_resume, 2341 .disconnect = usbnet_disconnect, 2342 .disable_hub_initiated_lpm = 1, 2343 .supports_autosuspend = 1, 2344 }; 2345 2346 module_usb_driver(smsc75xx_driver); 2347 2348 MODULE_AUTHOR("Nancy Lin"); 2349 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@shawell.net>"); 2350 MODULE_DESCRIPTION("SMSC75XX USB 2.0 Gigabit Ethernet Devices"); 2351 MODULE_LICENSE("GPL"); 2352