1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015 Microchip Technology 4 */ 5 #include <linux/module.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/ethtool.h> 9 #include <linux/phylink.h> 10 #include <linux/usb.h> 11 #include <linux/crc32.h> 12 #include <linux/signal.h> 13 #include <linux/slab.h> 14 #include <linux/if_vlan.h> 15 #include <linux/uaccess.h> 16 #include <linux/linkmode.h> 17 #include <linux/list.h> 18 #include <linux/ip.h> 19 #include <linux/ipv6.h> 20 #include <linux/mdio.h> 21 #include <linux/phy.h> 22 #include <net/ip6_checksum.h> 23 #include <net/selftests.h> 24 #include <net/vxlan.h> 25 #include <linux/interrupt.h> 26 #include <linux/irqdomain.h> 27 #include <linux/irq.h> 28 #include <linux/irqchip/chained_irq.h> 29 #include <linux/microchipphy.h> 30 #include <linux/of_mdio.h> 31 #include <linux/of_net.h> 32 #include "lan78xx.h" 33 34 #define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>" 35 #define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices" 36 #define DRIVER_NAME "lan78xx" 37 38 #define TX_TIMEOUT_JIFFIES (5 * HZ) 39 #define THROTTLE_JIFFIES (HZ / 8) 40 #define UNLINK_TIMEOUT_MS 3 41 42 #define RX_MAX_QUEUE_MEMORY (60 * 1518) 43 44 #define SS_USB_PKT_SIZE (1024) 45 #define HS_USB_PKT_SIZE (512) 46 #define FS_USB_PKT_SIZE (64) 47 48 #define MAX_RX_FIFO_SIZE (12 * 1024) 49 #define MAX_TX_FIFO_SIZE (12 * 1024) 50 51 #define FLOW_THRESHOLD(n) ((((n) + 511) / 512) & 0x7F) 52 #define FLOW_CTRL_THRESHOLD(on, off) ((FLOW_THRESHOLD(on) << 0) | \ 53 (FLOW_THRESHOLD(off) << 8)) 54 55 /* Flow control turned on when Rx FIFO level rises above this level (bytes) */ 56 #define FLOW_ON_SS 9216 57 #define FLOW_ON_HS 8704 58 59 /* Flow control turned off when Rx FIFO level falls below this level (bytes) */ 60 #define FLOW_OFF_SS 4096 61 #define FLOW_OFF_HS 1024 62 63 #define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE) 64 #define DEFAULT_BULK_IN_DELAY (0x0800) 65 #define MAX_SINGLE_PACKET_SIZE (9000) 66 #define DEFAULT_TX_CSUM_ENABLE (true) 67 #define DEFAULT_RX_CSUM_ENABLE (true) 68 #define DEFAULT_TSO_CSUM_ENABLE (true) 69 #define DEFAULT_VLAN_FILTER_ENABLE (true) 70 #define DEFAULT_VLAN_RX_OFFLOAD (true) 71 #define TX_ALIGNMENT (4) 72 #define RXW_PADDING 2 73 74 #define LAN78XX_USB_VENDOR_ID (0x0424) 75 #define LAN7800_USB_PRODUCT_ID (0x7800) 76 #define LAN7850_USB_PRODUCT_ID (0x7850) 77 #define LAN7801_USB_PRODUCT_ID (0x7801) 78 #define LAN78XX_EEPROM_MAGIC (0x78A5) 79 #define LAN78XX_OTP_MAGIC (0x78F3) 80 #define AT29M2AF_USB_VENDOR_ID (0x07C9) 81 #define AT29M2AF_USB_PRODUCT_ID (0x0012) 82 83 #define MII_READ 1 84 #define MII_WRITE 0 85 86 #define EEPROM_INDICATOR (0xA5) 87 #define EEPROM_MAC_OFFSET (0x01) 88 #define MAX_EEPROM_SIZE 512 89 #define OTP_INDICATOR_1 (0xF3) 90 #define OTP_INDICATOR_2 (0xF7) 91 92 #define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \ 93 WAKE_MCAST | WAKE_BCAST | \ 94 WAKE_ARP | WAKE_MAGIC) 95 96 #define TX_URB_NUM 10 97 #define TX_SS_URB_NUM TX_URB_NUM 98 #define TX_HS_URB_NUM TX_URB_NUM 99 #define TX_FS_URB_NUM TX_URB_NUM 100 101 /* A single URB buffer must be large enough to hold a complete jumbo packet 102 */ 103 #define TX_SS_URB_SIZE (32 * 1024) 104 #define TX_HS_URB_SIZE (16 * 1024) 105 #define TX_FS_URB_SIZE (10 * 1024) 106 107 #define RX_SS_URB_NUM 30 108 #define RX_HS_URB_NUM 10 109 #define RX_FS_URB_NUM 10 110 #define RX_SS_URB_SIZE TX_SS_URB_SIZE 111 #define RX_HS_URB_SIZE TX_HS_URB_SIZE 112 #define RX_FS_URB_SIZE TX_FS_URB_SIZE 113 114 #define SS_BURST_CAP_SIZE RX_SS_URB_SIZE 115 #define SS_BULK_IN_DELAY 0x2000 116 #define HS_BURST_CAP_SIZE RX_HS_URB_SIZE 117 #define HS_BULK_IN_DELAY 0x2000 118 #define FS_BURST_CAP_SIZE RX_FS_URB_SIZE 119 #define FS_BULK_IN_DELAY 0x2000 120 121 #define TX_CMD_LEN 8 122 #define TX_SKB_MIN_LEN (TX_CMD_LEN + ETH_HLEN) 123 #define LAN78XX_TSO_SIZE(dev) ((dev)->tx_urb_size - TX_SKB_MIN_LEN) 124 125 #define RX_CMD_LEN 10 126 #define RX_SKB_MIN_LEN (RX_CMD_LEN + ETH_HLEN) 127 #define RX_MAX_FRAME_LEN(mtu) ((mtu) + ETH_HLEN + VLAN_HLEN) 128 129 /* USB related defines */ 130 #define BULK_IN_PIPE 1 131 #define BULK_OUT_PIPE 2 132 133 /* default autosuspend delay (mSec)*/ 134 #define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000) 135 136 /* statistic update interval (mSec) */ 137 #define STAT_UPDATE_TIMER (1 * 1000) 138 139 /* time to wait for MAC or FCT to stop (jiffies) */ 140 #define HW_DISABLE_TIMEOUT (HZ / 10) 141 142 /* time to wait between polling MAC or FCT state (ms) */ 143 #define HW_DISABLE_DELAY_MS 1 144 145 /* defines interrupts from interrupt EP */ 146 #define MAX_INT_EP (32) 147 #define INT_EP_INTEP (31) 148 #define INT_EP_OTP_WR_DONE (28) 149 #define INT_EP_EEE_TX_LPI_START (26) 150 #define INT_EP_EEE_TX_LPI_STOP (25) 151 #define INT_EP_EEE_RX_LPI (24) 152 #define INT_EP_MAC_RESET_TIMEOUT (23) 153 #define INT_EP_RDFO (22) 154 #define INT_EP_TXE (21) 155 #define INT_EP_USB_STATUS (20) 156 #define INT_EP_TX_DIS (19) 157 #define INT_EP_RX_DIS (18) 158 #define INT_EP_PHY (17) 159 #define INT_EP_DP (16) 160 #define INT_EP_MAC_ERR (15) 161 #define INT_EP_TDFU (14) 162 #define INT_EP_TDFO (13) 163 #define INT_EP_UTX (12) 164 #define INT_EP_GPIO_11 (11) 165 #define INT_EP_GPIO_10 (10) 166 #define INT_EP_GPIO_9 (9) 167 #define INT_EP_GPIO_8 (8) 168 #define INT_EP_GPIO_7 (7) 169 #define INT_EP_GPIO_6 (6) 170 #define INT_EP_GPIO_5 (5) 171 #define INT_EP_GPIO_4 (4) 172 #define INT_EP_GPIO_3 (3) 173 #define INT_EP_GPIO_2 (2) 174 #define INT_EP_GPIO_1 (1) 175 #define INT_EP_GPIO_0 (0) 176 177 static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = { 178 "RX FCS Errors", 179 "RX Alignment Errors", 180 "Rx Fragment Errors", 181 "RX Jabber Errors", 182 "RX Undersize Frame Errors", 183 "RX Oversize Frame Errors", 184 "RX Dropped Frames", 185 "RX Unicast Byte Count", 186 "RX Broadcast Byte Count", 187 "RX Multicast Byte Count", 188 "RX Unicast Frames", 189 "RX Broadcast Frames", 190 "RX Multicast Frames", 191 "RX Pause Frames", 192 "RX 64 Byte Frames", 193 "RX 65 - 127 Byte Frames", 194 "RX 128 - 255 Byte Frames", 195 "RX 256 - 511 Bytes Frames", 196 "RX 512 - 1023 Byte Frames", 197 "RX 1024 - 1518 Byte Frames", 198 "RX Greater 1518 Byte Frames", 199 "EEE RX LPI Transitions", 200 "EEE RX LPI Time", 201 "TX FCS Errors", 202 "TX Excess Deferral Errors", 203 "TX Carrier Errors", 204 "TX Bad Byte Count", 205 "TX Single Collisions", 206 "TX Multiple Collisions", 207 "TX Excessive Collision", 208 "TX Late Collisions", 209 "TX Unicast Byte Count", 210 "TX Broadcast Byte Count", 211 "TX Multicast Byte Count", 212 "TX Unicast Frames", 213 "TX Broadcast Frames", 214 "TX Multicast Frames", 215 "TX Pause Frames", 216 "TX 64 Byte Frames", 217 "TX 65 - 127 Byte Frames", 218 "TX 128 - 255 Byte Frames", 219 "TX 256 - 511 Bytes Frames", 220 "TX 512 - 1023 Byte Frames", 221 "TX 1024 - 1518 Byte Frames", 222 "TX Greater 1518 Byte Frames", 223 "EEE TX LPI Transitions", 224 "EEE TX LPI Time", 225 }; 226 227 struct lan78xx_statstage { 228 u32 rx_fcs_errors; 229 u32 rx_alignment_errors; 230 u32 rx_fragment_errors; 231 u32 rx_jabber_errors; 232 u32 rx_undersize_frame_errors; 233 u32 rx_oversize_frame_errors; 234 u32 rx_dropped_frames; 235 u32 rx_unicast_byte_count; 236 u32 rx_broadcast_byte_count; 237 u32 rx_multicast_byte_count; 238 u32 rx_unicast_frames; 239 u32 rx_broadcast_frames; 240 u32 rx_multicast_frames; 241 u32 rx_pause_frames; 242 u32 rx_64_byte_frames; 243 u32 rx_65_127_byte_frames; 244 u32 rx_128_255_byte_frames; 245 u32 rx_256_511_bytes_frames; 246 u32 rx_512_1023_byte_frames; 247 u32 rx_1024_1518_byte_frames; 248 u32 rx_greater_1518_byte_frames; 249 u32 eee_rx_lpi_transitions; 250 u32 eee_rx_lpi_time; 251 u32 tx_fcs_errors; 252 u32 tx_excess_deferral_errors; 253 u32 tx_carrier_errors; 254 u32 tx_bad_byte_count; 255 u32 tx_single_collisions; 256 u32 tx_multiple_collisions; 257 u32 tx_excessive_collision; 258 u32 tx_late_collisions; 259 u32 tx_unicast_byte_count; 260 u32 tx_broadcast_byte_count; 261 u32 tx_multicast_byte_count; 262 u32 tx_unicast_frames; 263 u32 tx_broadcast_frames; 264 u32 tx_multicast_frames; 265 u32 tx_pause_frames; 266 u32 tx_64_byte_frames; 267 u32 tx_65_127_byte_frames; 268 u32 tx_128_255_byte_frames; 269 u32 tx_256_511_bytes_frames; 270 u32 tx_512_1023_byte_frames; 271 u32 tx_1024_1518_byte_frames; 272 u32 tx_greater_1518_byte_frames; 273 u32 eee_tx_lpi_transitions; 274 u32 eee_tx_lpi_time; 275 }; 276 277 struct lan78xx_statstage64 { 278 u64 rx_fcs_errors; 279 u64 rx_alignment_errors; 280 u64 rx_fragment_errors; 281 u64 rx_jabber_errors; 282 u64 rx_undersize_frame_errors; 283 u64 rx_oversize_frame_errors; 284 u64 rx_dropped_frames; 285 u64 rx_unicast_byte_count; 286 u64 rx_broadcast_byte_count; 287 u64 rx_multicast_byte_count; 288 u64 rx_unicast_frames; 289 u64 rx_broadcast_frames; 290 u64 rx_multicast_frames; 291 u64 rx_pause_frames; 292 u64 rx_64_byte_frames; 293 u64 rx_65_127_byte_frames; 294 u64 rx_128_255_byte_frames; 295 u64 rx_256_511_bytes_frames; 296 u64 rx_512_1023_byte_frames; 297 u64 rx_1024_1518_byte_frames; 298 u64 rx_greater_1518_byte_frames; 299 u64 eee_rx_lpi_transitions; 300 u64 eee_rx_lpi_time; 301 u64 tx_fcs_errors; 302 u64 tx_excess_deferral_errors; 303 u64 tx_carrier_errors; 304 u64 tx_bad_byte_count; 305 u64 tx_single_collisions; 306 u64 tx_multiple_collisions; 307 u64 tx_excessive_collision; 308 u64 tx_late_collisions; 309 u64 tx_unicast_byte_count; 310 u64 tx_broadcast_byte_count; 311 u64 tx_multicast_byte_count; 312 u64 tx_unicast_frames; 313 u64 tx_broadcast_frames; 314 u64 tx_multicast_frames; 315 u64 tx_pause_frames; 316 u64 tx_64_byte_frames; 317 u64 tx_65_127_byte_frames; 318 u64 tx_128_255_byte_frames; 319 u64 tx_256_511_bytes_frames; 320 u64 tx_512_1023_byte_frames; 321 u64 tx_1024_1518_byte_frames; 322 u64 tx_greater_1518_byte_frames; 323 u64 eee_tx_lpi_transitions; 324 u64 eee_tx_lpi_time; 325 }; 326 327 static u32 lan78xx_regs[] = { 328 ID_REV, 329 INT_STS, 330 HW_CFG, 331 PMT_CTL, 332 E2P_CMD, 333 E2P_DATA, 334 USB_STATUS, 335 VLAN_TYPE, 336 MAC_CR, 337 MAC_RX, 338 MAC_TX, 339 FLOW, 340 ERR_STS, 341 MII_ACC, 342 MII_DATA, 343 EEE_TX_LPI_REQ_DLY, 344 EEE_TW_TX_SYS, 345 EEE_TX_LPI_REM_DLY, 346 WUCSR 347 }; 348 349 #define PHY_REG_SIZE (32 * sizeof(u32)) 350 351 struct lan78xx_net; 352 353 struct lan78xx_priv { 354 struct lan78xx_net *dev; 355 u32 rfe_ctl; 356 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicast hash table */ 357 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */ 358 u32 vlan_table[DP_SEL_VHF_VLAN_LEN]; 359 struct mutex dataport_mutex; /* for dataport access */ 360 spinlock_t rfe_ctl_lock; /* for rfe register access */ 361 struct work_struct set_multicast; 362 struct work_struct set_vlan; 363 u32 wol; 364 }; 365 366 enum skb_state { 367 illegal = 0, 368 tx_start, 369 tx_done, 370 rx_start, 371 rx_done, 372 rx_cleanup, 373 unlink_start 374 }; 375 376 struct skb_data { /* skb->cb is one of these */ 377 struct urb *urb; 378 struct lan78xx_net *dev; 379 enum skb_state state; 380 size_t length; 381 int num_of_packet; 382 }; 383 384 #define EVENT_TX_HALT 0 385 #define EVENT_RX_HALT 1 386 #define EVENT_RX_MEMORY 2 387 #define EVENT_STS_SPLIT 3 388 #define EVENT_PHY_INT_ACK 4 389 #define EVENT_RX_PAUSED 5 390 #define EVENT_DEV_WAKING 6 391 #define EVENT_DEV_ASLEEP 7 392 #define EVENT_DEV_OPEN 8 393 #define EVENT_STAT_UPDATE 9 394 #define EVENT_DEV_DISCONNECT 10 395 396 struct statstage { 397 struct mutex access_lock; /* for stats access */ 398 struct lan78xx_statstage saved; 399 struct lan78xx_statstage rollover_count; 400 struct lan78xx_statstage rollover_max; 401 struct lan78xx_statstage64 curr_stat; 402 }; 403 404 struct irq_domain_data { 405 struct irq_domain *irqdomain; 406 unsigned int phyirq; 407 struct irq_chip *irqchip; 408 irq_flow_handler_t irq_handler; 409 u32 irqenable; 410 struct mutex irq_lock; /* for irq bus access */ 411 }; 412 413 struct lan78xx_net { 414 struct net_device *net; 415 struct usb_device *udev; 416 struct usb_interface *intf; 417 418 unsigned int tx_pend_data_len; 419 size_t n_tx_urbs; 420 size_t n_rx_urbs; 421 size_t tx_urb_size; 422 size_t rx_urb_size; 423 424 struct sk_buff_head rxq_free; 425 struct sk_buff_head rxq; 426 struct sk_buff_head rxq_done; 427 struct sk_buff_head rxq_overflow; 428 struct sk_buff_head txq_free; 429 struct sk_buff_head txq; 430 struct sk_buff_head txq_pend; 431 432 struct napi_struct napi; 433 434 struct delayed_work wq; 435 436 int msg_enable; 437 438 struct urb *urb_intr; 439 struct usb_anchor deferred; 440 441 struct mutex dev_mutex; /* serialise open/stop wrt suspend/resume */ 442 struct mutex mdiobus_mutex; /* for MDIO bus access */ 443 unsigned int pipe_in, pipe_out, pipe_intr; 444 445 unsigned int bulk_in_delay; 446 unsigned int burst_cap; 447 448 unsigned long flags; 449 450 wait_queue_head_t *wait; 451 452 unsigned int maxpacket; 453 struct timer_list stat_monitor; 454 455 unsigned long data[5]; 456 457 u32 chipid; 458 u32 chiprev; 459 struct mii_bus *mdiobus; 460 phy_interface_t interface; 461 462 int delta; 463 struct statstage stats; 464 465 struct irq_domain_data domain_data; 466 467 struct phylink *phylink; 468 struct phylink_config phylink_config; 469 }; 470 471 /* use ethtool to change the level for any given device */ 472 static int msg_level = -1; 473 module_param(msg_level, int, 0); 474 MODULE_PARM_DESC(msg_level, "Override default message level"); 475 476 static struct sk_buff *lan78xx_get_buf(struct sk_buff_head *buf_pool) 477 { 478 if (skb_queue_empty(buf_pool)) 479 return NULL; 480 481 return skb_dequeue(buf_pool); 482 } 483 484 static void lan78xx_release_buf(struct sk_buff_head *buf_pool, 485 struct sk_buff *buf) 486 { 487 buf->data = buf->head; 488 skb_reset_tail_pointer(buf); 489 490 buf->len = 0; 491 buf->data_len = 0; 492 493 skb_queue_tail(buf_pool, buf); 494 } 495 496 static void lan78xx_free_buf_pool(struct sk_buff_head *buf_pool) 497 { 498 struct skb_data *entry; 499 struct sk_buff *buf; 500 501 while (!skb_queue_empty(buf_pool)) { 502 buf = skb_dequeue(buf_pool); 503 if (buf) { 504 entry = (struct skb_data *)buf->cb; 505 usb_free_urb(entry->urb); 506 dev_kfree_skb_any(buf); 507 } 508 } 509 } 510 511 static int lan78xx_alloc_buf_pool(struct sk_buff_head *buf_pool, 512 size_t n_urbs, size_t urb_size, 513 struct lan78xx_net *dev) 514 { 515 struct skb_data *entry; 516 struct sk_buff *buf; 517 struct urb *urb; 518 int i; 519 520 skb_queue_head_init(buf_pool); 521 522 for (i = 0; i < n_urbs; i++) { 523 buf = alloc_skb(urb_size, GFP_ATOMIC); 524 if (!buf) 525 goto error; 526 527 if (skb_linearize(buf) != 0) { 528 dev_kfree_skb_any(buf); 529 goto error; 530 } 531 532 urb = usb_alloc_urb(0, GFP_ATOMIC); 533 if (!urb) { 534 dev_kfree_skb_any(buf); 535 goto error; 536 } 537 538 entry = (struct skb_data *)buf->cb; 539 entry->urb = urb; 540 entry->dev = dev; 541 entry->length = 0; 542 entry->num_of_packet = 0; 543 544 skb_queue_tail(buf_pool, buf); 545 } 546 547 return 0; 548 549 error: 550 lan78xx_free_buf_pool(buf_pool); 551 552 return -ENOMEM; 553 } 554 555 static struct sk_buff *lan78xx_get_rx_buf(struct lan78xx_net *dev) 556 { 557 return lan78xx_get_buf(&dev->rxq_free); 558 } 559 560 static void lan78xx_release_rx_buf(struct lan78xx_net *dev, 561 struct sk_buff *rx_buf) 562 { 563 lan78xx_release_buf(&dev->rxq_free, rx_buf); 564 } 565 566 static void lan78xx_free_rx_resources(struct lan78xx_net *dev) 567 { 568 lan78xx_free_buf_pool(&dev->rxq_free); 569 } 570 571 static int lan78xx_alloc_rx_resources(struct lan78xx_net *dev) 572 { 573 return lan78xx_alloc_buf_pool(&dev->rxq_free, 574 dev->n_rx_urbs, dev->rx_urb_size, dev); 575 } 576 577 static struct sk_buff *lan78xx_get_tx_buf(struct lan78xx_net *dev) 578 { 579 return lan78xx_get_buf(&dev->txq_free); 580 } 581 582 static void lan78xx_release_tx_buf(struct lan78xx_net *dev, 583 struct sk_buff *tx_buf) 584 { 585 lan78xx_release_buf(&dev->txq_free, tx_buf); 586 } 587 588 static void lan78xx_free_tx_resources(struct lan78xx_net *dev) 589 { 590 lan78xx_free_buf_pool(&dev->txq_free); 591 } 592 593 static int lan78xx_alloc_tx_resources(struct lan78xx_net *dev) 594 { 595 return lan78xx_alloc_buf_pool(&dev->txq_free, 596 dev->n_tx_urbs, dev->tx_urb_size, dev); 597 } 598 599 static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) 600 { 601 u32 *buf; 602 int ret; 603 604 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 605 return -ENODEV; 606 607 buf = kmalloc(sizeof(u32), GFP_KERNEL); 608 if (!buf) 609 return -ENOMEM; 610 611 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 612 USB_VENDOR_REQUEST_READ_REGISTER, 613 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 614 0, index, buf, 4, USB_CTRL_GET_TIMEOUT); 615 if (likely(ret >= 0)) { 616 le32_to_cpus(buf); 617 *data = *buf; 618 } else if (net_ratelimit()) { 619 netdev_warn(dev->net, 620 "Failed to read register index 0x%08x. ret = %pe", 621 index, ERR_PTR(ret)); 622 } 623 624 kfree(buf); 625 626 return ret < 0 ? ret : 0; 627 } 628 629 static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data) 630 { 631 u32 *buf; 632 int ret; 633 634 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 635 return -ENODEV; 636 637 buf = kmalloc(sizeof(u32), GFP_KERNEL); 638 if (!buf) 639 return -ENOMEM; 640 641 *buf = data; 642 cpu_to_le32s(buf); 643 644 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 645 USB_VENDOR_REQUEST_WRITE_REGISTER, 646 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 647 0, index, buf, 4, USB_CTRL_SET_TIMEOUT); 648 if (unlikely(ret < 0) && 649 net_ratelimit()) { 650 netdev_warn(dev->net, 651 "Failed to write register index 0x%08x. ret = %pe", 652 index, ERR_PTR(ret)); 653 } 654 655 kfree(buf); 656 657 return ret < 0 ? ret : 0; 658 } 659 660 static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask, 661 u32 data) 662 { 663 int ret; 664 u32 buf; 665 666 ret = lan78xx_read_reg(dev, reg, &buf); 667 if (ret < 0) 668 return ret; 669 670 buf &= ~mask; 671 buf |= (mask & data); 672 673 return lan78xx_write_reg(dev, reg, buf); 674 } 675 676 static int lan78xx_read_stats(struct lan78xx_net *dev, 677 struct lan78xx_statstage *data) 678 { 679 int ret = 0; 680 int i; 681 struct lan78xx_statstage *stats; 682 u32 *src; 683 u32 *dst; 684 685 stats = kmalloc_obj(*stats); 686 if (!stats) 687 return -ENOMEM; 688 689 ret = usb_control_msg(dev->udev, 690 usb_rcvctrlpipe(dev->udev, 0), 691 USB_VENDOR_REQUEST_GET_STATS, 692 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 693 0, 694 0, 695 (void *)stats, 696 sizeof(*stats), 697 USB_CTRL_SET_TIMEOUT); 698 if (likely(ret >= 0)) { 699 src = (u32 *)stats; 700 dst = (u32 *)data; 701 for (i = 0; i < sizeof(*stats) / sizeof(u32); i++) { 702 le32_to_cpus(&src[i]); 703 dst[i] = src[i]; 704 } 705 } else { 706 netdev_warn(dev->net, 707 "Failed to read stat ret = %d", ret); 708 } 709 710 kfree(stats); 711 712 return ret; 713 } 714 715 #define check_counter_rollover(struct1, dev_stats, member) \ 716 do { \ 717 if ((struct1)->member < (dev_stats).saved.member) \ 718 (dev_stats).rollover_count.member++; \ 719 } while (0) 720 721 static void lan78xx_check_stat_rollover(struct lan78xx_net *dev, 722 struct lan78xx_statstage *stats) 723 { 724 check_counter_rollover(stats, dev->stats, rx_fcs_errors); 725 check_counter_rollover(stats, dev->stats, rx_alignment_errors); 726 check_counter_rollover(stats, dev->stats, rx_fragment_errors); 727 check_counter_rollover(stats, dev->stats, rx_jabber_errors); 728 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors); 729 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors); 730 check_counter_rollover(stats, dev->stats, rx_dropped_frames); 731 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count); 732 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count); 733 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count); 734 check_counter_rollover(stats, dev->stats, rx_unicast_frames); 735 check_counter_rollover(stats, dev->stats, rx_broadcast_frames); 736 check_counter_rollover(stats, dev->stats, rx_multicast_frames); 737 check_counter_rollover(stats, dev->stats, rx_pause_frames); 738 check_counter_rollover(stats, dev->stats, rx_64_byte_frames); 739 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames); 740 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames); 741 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames); 742 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames); 743 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames); 744 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames); 745 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions); 746 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time); 747 check_counter_rollover(stats, dev->stats, tx_fcs_errors); 748 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors); 749 check_counter_rollover(stats, dev->stats, tx_carrier_errors); 750 check_counter_rollover(stats, dev->stats, tx_bad_byte_count); 751 check_counter_rollover(stats, dev->stats, tx_single_collisions); 752 check_counter_rollover(stats, dev->stats, tx_multiple_collisions); 753 check_counter_rollover(stats, dev->stats, tx_excessive_collision); 754 check_counter_rollover(stats, dev->stats, tx_late_collisions); 755 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count); 756 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count); 757 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count); 758 check_counter_rollover(stats, dev->stats, tx_unicast_frames); 759 check_counter_rollover(stats, dev->stats, tx_broadcast_frames); 760 check_counter_rollover(stats, dev->stats, tx_multicast_frames); 761 check_counter_rollover(stats, dev->stats, tx_pause_frames); 762 check_counter_rollover(stats, dev->stats, tx_64_byte_frames); 763 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames); 764 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames); 765 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames); 766 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames); 767 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames); 768 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames); 769 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions); 770 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time); 771 772 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage)); 773 } 774 775 static void lan78xx_update_stats(struct lan78xx_net *dev) 776 { 777 u32 *p, *count, *max; 778 u64 *data; 779 int i; 780 struct lan78xx_statstage lan78xx_stats; 781 782 if (usb_autopm_get_interface(dev->intf) < 0) 783 return; 784 785 p = (u32 *)&lan78xx_stats; 786 count = (u32 *)&dev->stats.rollover_count; 787 max = (u32 *)&dev->stats.rollover_max; 788 data = (u64 *)&dev->stats.curr_stat; 789 790 mutex_lock(&dev->stats.access_lock); 791 792 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0) 793 lan78xx_check_stat_rollover(dev, &lan78xx_stats); 794 795 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++) 796 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1)); 797 798 mutex_unlock(&dev->stats.access_lock); 799 800 usb_autopm_put_interface(dev->intf); 801 } 802 803 static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 804 { 805 return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 806 } 807 808 static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 809 u32 hw_disabled) 810 { 811 unsigned long timeout; 812 bool stopped = true; 813 int ret; 814 u32 buf; 815 816 /* Stop the h/w block (if not already stopped) */ 817 818 ret = lan78xx_read_reg(dev, reg, &buf); 819 if (ret < 0) 820 return ret; 821 822 if (buf & hw_enabled) { 823 buf &= ~hw_enabled; 824 825 ret = lan78xx_write_reg(dev, reg, buf); 826 if (ret < 0) 827 return ret; 828 829 stopped = false; 830 timeout = jiffies + HW_DISABLE_TIMEOUT; 831 do { 832 ret = lan78xx_read_reg(dev, reg, &buf); 833 if (ret < 0) 834 return ret; 835 836 if (buf & hw_disabled) 837 stopped = true; 838 else 839 msleep(HW_DISABLE_DELAY_MS); 840 } while (!stopped && !time_after(jiffies, timeout)); 841 } 842 843 return stopped ? 0 : -ETIMEDOUT; 844 } 845 846 static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 847 { 848 return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 849 } 850 851 static int lan78xx_start_tx_path(struct lan78xx_net *dev) 852 { 853 int ret; 854 855 netif_dbg(dev, drv, dev->net, "start tx path"); 856 857 /* Start the MAC transmitter */ 858 859 ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 860 if (ret < 0) 861 return ret; 862 863 /* Start the Tx FIFO */ 864 865 ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 866 if (ret < 0) 867 return ret; 868 869 return 0; 870 } 871 872 static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 873 { 874 int ret; 875 876 netif_dbg(dev, drv, dev->net, "stop tx path"); 877 878 /* Stop the Tx FIFO */ 879 880 ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 881 if (ret < 0) 882 return ret; 883 884 /* Stop the MAC transmitter */ 885 886 ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 887 if (ret < 0) 888 return ret; 889 890 return 0; 891 } 892 893 /* The caller must ensure the Tx path is stopped before calling 894 * lan78xx_flush_tx_fifo(). 895 */ 896 static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 897 { 898 return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 899 } 900 901 static int lan78xx_start_rx_path(struct lan78xx_net *dev) 902 { 903 int ret; 904 905 netif_dbg(dev, drv, dev->net, "start rx path"); 906 907 /* Start the Rx FIFO */ 908 909 ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 910 if (ret < 0) 911 return ret; 912 913 /* Start the MAC receiver*/ 914 915 ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 916 if (ret < 0) 917 return ret; 918 919 return 0; 920 } 921 922 static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 923 { 924 int ret; 925 926 netif_dbg(dev, drv, dev->net, "stop rx path"); 927 928 /* Stop the MAC receiver */ 929 930 ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 931 if (ret < 0) 932 return ret; 933 934 /* Stop the Rx FIFO */ 935 936 ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 937 if (ret < 0) 938 return ret; 939 940 return 0; 941 } 942 943 /* The caller must ensure the Rx path is stopped before calling 944 * lan78xx_flush_rx_fifo(). 945 */ 946 static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 947 { 948 return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 949 } 950 951 /* Loop until the read is completed with timeout called with mdiobus_mutex held */ 952 static int lan78xx_mdiobus_wait_not_busy(struct lan78xx_net *dev) 953 { 954 unsigned long start_time = jiffies; 955 u32 val; 956 int ret; 957 958 do { 959 ret = lan78xx_read_reg(dev, MII_ACC, &val); 960 if (ret < 0) 961 return ret; 962 963 if (!(val & MII_ACC_MII_BUSY_)) 964 return 0; 965 } while (!time_after(jiffies, start_time + HZ)); 966 967 return -ETIMEDOUT; 968 } 969 970 static inline u32 mii_access(int id, int index, int read) 971 { 972 u32 ret; 973 974 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_; 975 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_; 976 if (read) 977 ret |= MII_ACC_MII_READ_; 978 else 979 ret |= MII_ACC_MII_WRITE_; 980 ret |= MII_ACC_MII_BUSY_; 981 982 return ret; 983 } 984 985 static int lan78xx_wait_eeprom(struct lan78xx_net *dev) 986 { 987 unsigned long start_time = jiffies; 988 u32 val; 989 int ret; 990 991 do { 992 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 993 if (ret < 0) 994 return ret; 995 996 if (!(val & E2P_CMD_EPC_BUSY_) || 997 (val & E2P_CMD_EPC_TIMEOUT_)) 998 break; 999 usleep_range(40, 100); 1000 } while (!time_after(jiffies, start_time + HZ)); 1001 1002 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) { 1003 netdev_warn(dev->net, "EEPROM read operation timeout"); 1004 return -ETIMEDOUT; 1005 } 1006 1007 return 0; 1008 } 1009 1010 static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev) 1011 { 1012 unsigned long start_time = jiffies; 1013 u32 val; 1014 int ret; 1015 1016 do { 1017 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 1018 if (ret < 0) 1019 return ret; 1020 1021 if (!(val & E2P_CMD_EPC_BUSY_)) 1022 return 0; 1023 1024 usleep_range(40, 100); 1025 } while (!time_after(jiffies, start_time + HZ)); 1026 1027 netdev_warn(dev->net, "EEPROM is busy"); 1028 return -ETIMEDOUT; 1029 } 1030 1031 static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1032 u32 length, u8 *data) 1033 { 1034 u32 val, saved; 1035 int i, ret; 1036 1037 /* depends on chip, some EEPROM pins are muxed with LED function. 1038 * disable & restore LED function to access EEPROM. 1039 */ 1040 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1041 if (ret < 0) 1042 return ret; 1043 1044 saved = val; 1045 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1046 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1047 ret = lan78xx_write_reg(dev, HW_CFG, val); 1048 if (ret < 0) 1049 return ret; 1050 } 1051 1052 ret = lan78xx_eeprom_confirm_not_busy(dev); 1053 if (ret == -ETIMEDOUT) 1054 goto read_raw_eeprom_done; 1055 /* If USB fails, there is nothing to do */ 1056 if (ret < 0) 1057 return ret; 1058 1059 for (i = 0; i < length; i++) { 1060 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_; 1061 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1062 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1063 if (ret < 0) 1064 return ret; 1065 1066 ret = lan78xx_wait_eeprom(dev); 1067 /* Looks like not USB specific error, try to recover */ 1068 if (ret == -ETIMEDOUT) 1069 goto read_raw_eeprom_done; 1070 /* If USB fails, there is nothing to do */ 1071 if (ret < 0) 1072 return ret; 1073 1074 ret = lan78xx_read_reg(dev, E2P_DATA, &val); 1075 if (ret < 0) 1076 return ret; 1077 1078 data[i] = val & 0xFF; 1079 offset++; 1080 } 1081 1082 read_raw_eeprom_done: 1083 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1084 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1085 /* If USB fails, there is nothing to do */ 1086 if (rc < 0) 1087 return rc; 1088 } 1089 return ret; 1090 } 1091 1092 static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset, 1093 u32 length, u8 *data) 1094 { 1095 int ret; 1096 u8 sig; 1097 1098 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 1099 if (ret < 0) 1100 return ret; 1101 1102 if (sig != EEPROM_INDICATOR) 1103 return -ENODATA; 1104 1105 return lan78xx_read_raw_eeprom(dev, offset, length, data); 1106 } 1107 1108 static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset, 1109 u32 length, u8 *data) 1110 { 1111 u32 val; 1112 u32 saved; 1113 int i, ret; 1114 1115 /* depends on chip, some EEPROM pins are muxed with LED function. 1116 * disable & restore LED function to access EEPROM. 1117 */ 1118 ret = lan78xx_read_reg(dev, HW_CFG, &val); 1119 if (ret < 0) 1120 return ret; 1121 1122 saved = val; 1123 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1124 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 1125 ret = lan78xx_write_reg(dev, HW_CFG, val); 1126 if (ret < 0) 1127 return ret; 1128 } 1129 1130 ret = lan78xx_eeprom_confirm_not_busy(dev); 1131 /* Looks like not USB specific error, try to recover */ 1132 if (ret == -ETIMEDOUT) 1133 goto write_raw_eeprom_done; 1134 /* If USB fails, there is nothing to do */ 1135 if (ret < 0) 1136 return ret; 1137 1138 /* Issue write/erase enable command */ 1139 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_; 1140 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1141 if (ret < 0) 1142 return ret; 1143 1144 ret = lan78xx_wait_eeprom(dev); 1145 /* Looks like not USB specific error, try to recover */ 1146 if (ret == -ETIMEDOUT) 1147 goto write_raw_eeprom_done; 1148 /* If USB fails, there is nothing to do */ 1149 if (ret < 0) 1150 return ret; 1151 1152 for (i = 0; i < length; i++) { 1153 /* Fill data register */ 1154 val = data[i]; 1155 ret = lan78xx_write_reg(dev, E2P_DATA, val); 1156 if (ret < 0) 1157 return ret; 1158 1159 /* Send "write" command */ 1160 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_; 1161 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1162 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1163 if (ret < 0) 1164 return ret; 1165 1166 ret = lan78xx_wait_eeprom(dev); 1167 /* Looks like not USB specific error, try to recover */ 1168 if (ret == -ETIMEDOUT) 1169 goto write_raw_eeprom_done; 1170 /* If USB fails, there is nothing to do */ 1171 if (ret < 0) 1172 return ret; 1173 1174 offset++; 1175 } 1176 1177 write_raw_eeprom_done: 1178 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 1179 int rc = lan78xx_write_reg(dev, HW_CFG, saved); 1180 /* If USB fails, there is nothing to do */ 1181 if (rc < 0) 1182 return rc; 1183 } 1184 return ret; 1185 } 1186 1187 static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset, 1188 u32 length, u8 *data) 1189 { 1190 unsigned long timeout; 1191 int ret, i; 1192 u32 buf; 1193 1194 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1195 if (ret < 0) 1196 return ret; 1197 1198 if (buf & OTP_PWR_DN_PWRDN_N_) { 1199 /* clear it and wait to be cleared */ 1200 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1201 if (ret < 0) 1202 return ret; 1203 1204 timeout = jiffies + HZ; 1205 do { 1206 usleep_range(1, 10); 1207 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1208 if (ret < 0) 1209 return ret; 1210 1211 if (time_after(jiffies, timeout)) { 1212 netdev_warn(dev->net, 1213 "timeout on OTP_PWR_DN"); 1214 return -ETIMEDOUT; 1215 } 1216 } while (buf & OTP_PWR_DN_PWRDN_N_); 1217 } 1218 1219 for (i = 0; i < length; i++) { 1220 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1221 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1222 if (ret < 0) 1223 return ret; 1224 1225 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1226 ((offset + i) & OTP_ADDR2_10_3)); 1227 if (ret < 0) 1228 return ret; 1229 1230 ret = lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1231 if (ret < 0) 1232 return ret; 1233 1234 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1235 if (ret < 0) 1236 return ret; 1237 1238 timeout = jiffies + HZ; 1239 do { 1240 udelay(1); 1241 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1242 if (ret < 0) 1243 return ret; 1244 1245 if (time_after(jiffies, timeout)) { 1246 netdev_warn(dev->net, 1247 "timeout on OTP_STATUS"); 1248 return -ETIMEDOUT; 1249 } 1250 } while (buf & OTP_STATUS_BUSY_); 1251 1252 ret = lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1253 if (ret < 0) 1254 return ret; 1255 1256 data[i] = (u8)(buf & 0xFF); 1257 } 1258 1259 return 0; 1260 } 1261 1262 static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset, 1263 u32 length, u8 *data) 1264 { 1265 int i; 1266 u32 buf; 1267 unsigned long timeout; 1268 int ret; 1269 1270 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1271 if (ret < 0) 1272 return ret; 1273 1274 if (buf & OTP_PWR_DN_PWRDN_N_) { 1275 /* clear it and wait to be cleared */ 1276 ret = lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1277 if (ret < 0) 1278 return ret; 1279 1280 timeout = jiffies + HZ; 1281 do { 1282 udelay(1); 1283 ret = lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1284 if (ret < 0) 1285 return ret; 1286 1287 if (time_after(jiffies, timeout)) { 1288 netdev_warn(dev->net, 1289 "timeout on OTP_PWR_DN completion"); 1290 return -ETIMEDOUT; 1291 } 1292 } while (buf & OTP_PWR_DN_PWRDN_N_); 1293 } 1294 1295 /* set to BYTE program mode */ 1296 ret = lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1297 if (ret < 0) 1298 return ret; 1299 1300 for (i = 0; i < length; i++) { 1301 ret = lan78xx_write_reg(dev, OTP_ADDR1, 1302 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1303 if (ret < 0) 1304 return ret; 1305 1306 ret = lan78xx_write_reg(dev, OTP_ADDR2, 1307 ((offset + i) & OTP_ADDR2_10_3)); 1308 if (ret < 0) 1309 return ret; 1310 1311 ret = lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1312 if (ret < 0) 1313 return ret; 1314 1315 ret = lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1316 if (ret < 0) 1317 return ret; 1318 1319 ret = lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1320 if (ret < 0) 1321 return ret; 1322 1323 timeout = jiffies + HZ; 1324 do { 1325 udelay(1); 1326 ret = lan78xx_read_reg(dev, OTP_STATUS, &buf); 1327 if (ret < 0) 1328 return ret; 1329 1330 if (time_after(jiffies, timeout)) { 1331 netdev_warn(dev->net, 1332 "Timeout on OTP_STATUS completion"); 1333 return -ETIMEDOUT; 1334 } 1335 } while (buf & OTP_STATUS_BUSY_); 1336 } 1337 1338 return 0; 1339 } 1340 1341 static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset, 1342 u32 length, u8 *data) 1343 { 1344 u8 sig; 1345 int ret; 1346 1347 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig); 1348 1349 if (ret == 0) { 1350 if (sig == OTP_INDICATOR_2) 1351 offset += 0x100; 1352 else if (sig != OTP_INDICATOR_1) 1353 ret = -EINVAL; 1354 if (!ret) 1355 ret = lan78xx_read_raw_otp(dev, offset, length, data); 1356 } 1357 1358 return ret; 1359 } 1360 1361 static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev) 1362 { 1363 int i, ret; 1364 1365 for (i = 0; i < 100; i++) { 1366 u32 dp_sel; 1367 1368 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1369 if (unlikely(ret < 0)) 1370 return ret; 1371 1372 if (dp_sel & DP_SEL_DPRDY_) 1373 return 0; 1374 1375 usleep_range(40, 100); 1376 } 1377 1378 netdev_warn(dev->net, "%s timed out", __func__); 1379 1380 return -ETIMEDOUT; 1381 } 1382 1383 static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select, 1384 u32 addr, u32 length, u32 *buf) 1385 { 1386 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1387 int i, ret; 1388 1389 ret = usb_autopm_get_interface(dev->intf); 1390 if (ret < 0) 1391 return ret; 1392 1393 mutex_lock(&pdata->dataport_mutex); 1394 1395 ret = lan78xx_dataport_wait_not_busy(dev); 1396 if (ret < 0) 1397 goto dataport_write; 1398 1399 ret = lan78xx_update_reg(dev, DP_SEL, DP_SEL_RSEL_MASK_, ram_select); 1400 if (ret < 0) 1401 goto dataport_write; 1402 1403 for (i = 0; i < length; i++) { 1404 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i); 1405 if (ret < 0) 1406 goto dataport_write; 1407 1408 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]); 1409 if (ret < 0) 1410 goto dataport_write; 1411 1412 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_); 1413 if (ret < 0) 1414 goto dataport_write; 1415 1416 ret = lan78xx_dataport_wait_not_busy(dev); 1417 if (ret < 0) 1418 goto dataport_write; 1419 } 1420 1421 dataport_write: 1422 if (ret < 0) 1423 netdev_warn(dev->net, "dataport write failed %pe", ERR_PTR(ret)); 1424 1425 mutex_unlock(&pdata->dataport_mutex); 1426 usb_autopm_put_interface(dev->intf); 1427 1428 return ret; 1429 } 1430 1431 static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata, 1432 int index, u8 addr[ETH_ALEN]) 1433 { 1434 u32 temp; 1435 1436 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) { 1437 temp = addr[3]; 1438 temp = addr[2] | (temp << 8); 1439 temp = addr[1] | (temp << 8); 1440 temp = addr[0] | (temp << 8); 1441 pdata->pfilter_table[index][1] = temp; 1442 temp = addr[5]; 1443 temp = addr[4] | (temp << 8); 1444 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_; 1445 pdata->pfilter_table[index][0] = temp; 1446 } 1447 } 1448 1449 /* returns hash bit number for given MAC address */ 1450 static inline u32 lan78xx_hash(char addr[ETH_ALEN]) 1451 { 1452 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 1453 } 1454 1455 static int lan78xx_write_mchash_table(struct lan78xx_net *dev) 1456 { 1457 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1458 1459 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 1460 DP_SEL_VHF_VLAN_LEN, 1461 DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1462 } 1463 1464 static void lan78xx_deferred_multicast_write(struct work_struct *param) 1465 { 1466 struct lan78xx_priv *pdata = 1467 container_of(param, struct lan78xx_priv, set_multicast); 1468 struct lan78xx_net *dev = pdata->dev; 1469 int i, ret; 1470 1471 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 1472 pdata->rfe_ctl); 1473 1474 ret = lan78xx_write_mchash_table(dev); 1475 if (ret < 0) 1476 goto multicast_write_done; 1477 1478 for (i = 1; i < NUM_OF_MAF; i++) { 1479 ret = lan78xx_write_reg(dev, MAF_HI(i), 0); 1480 if (ret < 0) 1481 goto multicast_write_done; 1482 1483 ret = lan78xx_write_reg(dev, MAF_LO(i), 1484 pdata->pfilter_table[i][1]); 1485 if (ret < 0) 1486 goto multicast_write_done; 1487 1488 ret = lan78xx_write_reg(dev, MAF_HI(i), 1489 pdata->pfilter_table[i][0]); 1490 if (ret < 0) 1491 goto multicast_write_done; 1492 } 1493 1494 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1495 1496 multicast_write_done: 1497 if (ret < 0) 1498 netdev_warn(dev->net, "multicast write failed %pe", ERR_PTR(ret)); 1499 return; 1500 } 1501 1502 static void lan78xx_update_vlan_filter(struct lan78xx_priv *pdata, 1503 struct net_device *netdev, 1504 netdev_features_t features) 1505 { 1506 if ((features & NETIF_F_HW_VLAN_CTAG_FILTER) && 1507 !(netdev->flags & IFF_PROMISC)) 1508 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_; 1509 else 1510 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_; 1511 } 1512 1513 static void lan78xx_set_multicast(struct net_device *netdev) 1514 { 1515 struct lan78xx_net *dev = netdev_priv(netdev); 1516 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1517 unsigned long flags; 1518 int i; 1519 1520 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 1521 1522 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ | 1523 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1524 1525 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 1526 pdata->mchash_table[i] = 0; 1527 1528 /* pfilter_table[0] has own HW address */ 1529 for (i = 1; i < NUM_OF_MAF; i++) { 1530 pdata->pfilter_table[i][0] = 0; 1531 pdata->pfilter_table[i][1] = 0; 1532 } 1533 1534 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_; 1535 1536 if (dev->net->flags & IFF_PROMISC) { 1537 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 1538 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_; 1539 } else { 1540 if (dev->net->flags & IFF_ALLMULTI) { 1541 netif_dbg(dev, drv, dev->net, 1542 "receive all multicast enabled"); 1543 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_; 1544 } 1545 } 1546 1547 lan78xx_update_vlan_filter(pdata, dev->net, dev->net->features); 1548 1549 if (netdev_mc_count(dev->net)) { 1550 struct netdev_hw_addr *ha; 1551 int i; 1552 1553 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 1554 1555 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_; 1556 1557 i = 1; 1558 netdev_for_each_mc_addr(ha, netdev) { 1559 /* set first 32 into Perfect Filter */ 1560 if (i < 33) { 1561 lan78xx_set_addr_filter(pdata, i, ha->addr); 1562 } else { 1563 u32 bitnum = lan78xx_hash(ha->addr); 1564 1565 pdata->mchash_table[bitnum / 32] |= 1566 (1 << (bitnum % 32)); 1567 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_; 1568 } 1569 i++; 1570 } 1571 } 1572 1573 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 1574 1575 /* defer register writes to a sleepable context */ 1576 schedule_work(&pdata->set_multicast); 1577 } 1578 1579 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev); 1580 static int lan78xx_write_vlan_table(struct lan78xx_net *dev); 1581 1582 static int lan78xx_mac_reset(struct lan78xx_net *dev) 1583 { 1584 unsigned long start_time = jiffies; 1585 u32 val; 1586 int ret; 1587 1588 mutex_lock(&dev->mdiobus_mutex); 1589 1590 /* Resetting the device while there is activity on the MDIO 1591 * bus can result in the MAC interface locking up and not 1592 * completing register access transactions. 1593 */ 1594 ret = lan78xx_mdiobus_wait_not_busy(dev); 1595 if (ret < 0) 1596 goto exit_unlock; 1597 1598 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1599 if (ret < 0) 1600 goto exit_unlock; 1601 1602 val |= MAC_CR_RST_; 1603 ret = lan78xx_write_reg(dev, MAC_CR, val); 1604 if (ret < 0) 1605 goto exit_unlock; 1606 1607 /* Wait for the reset to complete before allowing any further 1608 * MAC register accesses otherwise the MAC may lock up. 1609 */ 1610 do { 1611 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1612 if (ret < 0) 1613 goto exit_unlock; 1614 1615 if (!(val & MAC_CR_RST_)) { 1616 ret = 0; 1617 goto exit_unlock; 1618 } 1619 } while (!time_after(jiffies, start_time + HZ)); 1620 1621 ret = -ETIMEDOUT; 1622 exit_unlock: 1623 mutex_unlock(&dev->mdiobus_mutex); 1624 1625 return ret; 1626 } 1627 1628 /** 1629 * lan78xx_phy_int_ack - Acknowledge PHY interrupt 1630 * @dev: pointer to the LAN78xx device structure 1631 * 1632 * This function acknowledges the PHY interrupt by setting the 1633 * INT_STS_PHY_INT_ bit in the interrupt status register (INT_STS). 1634 * 1635 * Return: 0 on success or a negative error code on failure. 1636 */ 1637 static int lan78xx_phy_int_ack(struct lan78xx_net *dev) 1638 { 1639 return lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1640 } 1641 1642 /* some work can't be done in tasklets, so we use keventd 1643 * 1644 * NOTE: annoying asymmetry: if it's active, schedule_work() fails, 1645 * but tasklet_schedule() doesn't. hope the failure is rare. 1646 */ 1647 static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work) 1648 { 1649 set_bit(work, &dev->flags); 1650 if (!schedule_delayed_work(&dev->wq, 0)) 1651 netdev_err(dev->net, "kevent %d may have been dropped\n", work); 1652 } 1653 1654 static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb) 1655 { 1656 u32 intdata; 1657 1658 if (urb->actual_length != 4) { 1659 netdev_warn(dev->net, 1660 "unexpected urb length %d", urb->actual_length); 1661 return; 1662 } 1663 1664 intdata = get_unaligned_le32(urb->transfer_buffer); 1665 1666 if (intdata & INT_ENP_PHY_INT) { 1667 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata); 1668 lan78xx_defer_kevent(dev, EVENT_PHY_INT_ACK); 1669 1670 if (dev->domain_data.phyirq > 0) 1671 generic_handle_irq_safe(dev->domain_data.phyirq); 1672 } else { 1673 netdev_warn(dev->net, 1674 "unexpected interrupt: 0x%08x\n", intdata); 1675 } 1676 } 1677 1678 static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev) 1679 { 1680 return MAX_EEPROM_SIZE; 1681 } 1682 1683 static int lan78xx_ethtool_get_eeprom(struct net_device *netdev, 1684 struct ethtool_eeprom *ee, u8 *data) 1685 { 1686 struct lan78xx_net *dev = netdev_priv(netdev); 1687 int ret; 1688 1689 ret = usb_autopm_get_interface(dev->intf); 1690 if (ret) 1691 return ret; 1692 1693 ee->magic = LAN78XX_EEPROM_MAGIC; 1694 1695 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data); 1696 1697 usb_autopm_put_interface(dev->intf); 1698 1699 return ret; 1700 } 1701 1702 static int lan78xx_ethtool_set_eeprom(struct net_device *netdev, 1703 struct ethtool_eeprom *ee, u8 *data) 1704 { 1705 struct lan78xx_net *dev = netdev_priv(netdev); 1706 int ret; 1707 1708 ret = usb_autopm_get_interface(dev->intf); 1709 if (ret) 1710 return ret; 1711 1712 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure 1713 * to load data from EEPROM 1714 */ 1715 if (ee->magic == LAN78XX_EEPROM_MAGIC) 1716 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data); 1717 else if ((ee->magic == LAN78XX_OTP_MAGIC) && 1718 (ee->offset == 0) && 1719 (ee->len == 512) && 1720 (data[0] == OTP_INDICATOR_1)) 1721 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data); 1722 1723 usb_autopm_put_interface(dev->intf); 1724 1725 return ret; 1726 } 1727 1728 static void lan78xx_get_strings(struct net_device *netdev, u32 stringset, 1729 u8 *data) 1730 { 1731 if (stringset == ETH_SS_STATS) 1732 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings)); 1733 else if (stringset == ETH_SS_TEST) 1734 net_selftest_get_strings(data); 1735 } 1736 1737 static int lan78xx_get_sset_count(struct net_device *netdev, int sset) 1738 { 1739 if (sset == ETH_SS_STATS) 1740 return ARRAY_SIZE(lan78xx_gstrings); 1741 else if (sset == ETH_SS_TEST) 1742 return net_selftest_get_count(); 1743 else 1744 return -EOPNOTSUPP; 1745 } 1746 1747 static void lan78xx_get_stats(struct net_device *netdev, 1748 struct ethtool_stats *stats, u64 *data) 1749 { 1750 struct lan78xx_net *dev = netdev_priv(netdev); 1751 1752 lan78xx_update_stats(dev); 1753 1754 mutex_lock(&dev->stats.access_lock); 1755 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat)); 1756 mutex_unlock(&dev->stats.access_lock); 1757 } 1758 1759 static void lan78xx_get_wol(struct net_device *netdev, 1760 struct ethtool_wolinfo *wol) 1761 { 1762 struct lan78xx_net *dev = netdev_priv(netdev); 1763 int ret; 1764 u32 buf; 1765 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1766 1767 if (usb_autopm_get_interface(dev->intf) < 0) 1768 return; 1769 1770 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 1771 if (unlikely(ret < 0)) { 1772 netdev_warn(dev->net, "failed to get WoL %pe", ERR_PTR(ret)); 1773 wol->supported = 0; 1774 wol->wolopts = 0; 1775 } else { 1776 if (buf & USB_CFG_RMT_WKP_) { 1777 wol->supported = WAKE_ALL; 1778 wol->wolopts = pdata->wol; 1779 } else { 1780 wol->supported = 0; 1781 wol->wolopts = 0; 1782 } 1783 } 1784 1785 usb_autopm_put_interface(dev->intf); 1786 } 1787 1788 static int lan78xx_set_wol(struct net_device *netdev, 1789 struct ethtool_wolinfo *wol) 1790 { 1791 struct lan78xx_net *dev = netdev_priv(netdev); 1792 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1793 int ret; 1794 1795 if (wol->wolopts & ~WAKE_ALL) 1796 return -EINVAL; 1797 1798 ret = usb_autopm_get_interface(dev->intf); 1799 if (ret < 0) 1800 return ret; 1801 1802 pdata->wol = wol->wolopts; 1803 1804 ret = device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts); 1805 if (ret < 0) 1806 goto exit_pm_put; 1807 1808 ret = phy_ethtool_set_wol(netdev->phydev, wol); 1809 1810 exit_pm_put: 1811 usb_autopm_put_interface(dev->intf); 1812 1813 return ret; 1814 } 1815 1816 static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata) 1817 { 1818 struct lan78xx_net *dev = netdev_priv(net); 1819 1820 return phylink_ethtool_get_eee(dev->phylink, edata); 1821 } 1822 1823 static int lan78xx_set_eee(struct net_device *net, struct ethtool_keee *edata) 1824 { 1825 struct lan78xx_net *dev = netdev_priv(net); 1826 1827 return phylink_ethtool_set_eee(dev->phylink, edata); 1828 } 1829 1830 static void lan78xx_get_drvinfo(struct net_device *net, 1831 struct ethtool_drvinfo *info) 1832 { 1833 struct lan78xx_net *dev = netdev_priv(net); 1834 1835 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver)); 1836 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info)); 1837 } 1838 1839 static u32 lan78xx_get_msglevel(struct net_device *net) 1840 { 1841 struct lan78xx_net *dev = netdev_priv(net); 1842 1843 return dev->msg_enable; 1844 } 1845 1846 static void lan78xx_set_msglevel(struct net_device *net, u32 level) 1847 { 1848 struct lan78xx_net *dev = netdev_priv(net); 1849 1850 dev->msg_enable = level; 1851 } 1852 1853 static int lan78xx_get_link_ksettings(struct net_device *net, 1854 struct ethtool_link_ksettings *cmd) 1855 { 1856 struct lan78xx_net *dev = netdev_priv(net); 1857 1858 return phylink_ethtool_ksettings_get(dev->phylink, cmd); 1859 } 1860 1861 static int lan78xx_set_link_ksettings(struct net_device *net, 1862 const struct ethtool_link_ksettings *cmd) 1863 { 1864 struct lan78xx_net *dev = netdev_priv(net); 1865 1866 return phylink_ethtool_ksettings_set(dev->phylink, cmd); 1867 } 1868 1869 static void lan78xx_get_pause(struct net_device *net, 1870 struct ethtool_pauseparam *pause) 1871 { 1872 struct lan78xx_net *dev = netdev_priv(net); 1873 1874 phylink_ethtool_get_pauseparam(dev->phylink, pause); 1875 } 1876 1877 static int lan78xx_set_pause(struct net_device *net, 1878 struct ethtool_pauseparam *pause) 1879 { 1880 struct lan78xx_net *dev = netdev_priv(net); 1881 1882 return phylink_ethtool_set_pauseparam(dev->phylink, pause); 1883 } 1884 1885 static int lan78xx_get_regs_len(struct net_device *netdev) 1886 { 1887 return sizeof(lan78xx_regs); 1888 } 1889 1890 static void 1891 lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1892 void *buf) 1893 { 1894 struct lan78xx_net *dev = netdev_priv(netdev); 1895 unsigned int data_count = 0; 1896 u32 *data = buf; 1897 int i, ret; 1898 1899 /* Read Device/MAC registers */ 1900 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++) { 1901 ret = lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]); 1902 if (ret < 0) { 1903 netdev_warn(dev->net, 1904 "failed to read register 0x%08x\n", 1905 lan78xx_regs[i]); 1906 goto clean_data; 1907 } 1908 1909 data_count++; 1910 } 1911 1912 return; 1913 1914 clean_data: 1915 memset(data, 0, data_count * sizeof(u32)); 1916 } 1917 1918 static const struct ethtool_ops lan78xx_ethtool_ops = { 1919 .get_link = ethtool_op_get_link, 1920 .nway_reset = phy_ethtool_nway_reset, 1921 .get_drvinfo = lan78xx_get_drvinfo, 1922 .get_msglevel = lan78xx_get_msglevel, 1923 .set_msglevel = lan78xx_set_msglevel, 1924 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len, 1925 .get_eeprom = lan78xx_ethtool_get_eeprom, 1926 .set_eeprom = lan78xx_ethtool_set_eeprom, 1927 .get_ethtool_stats = lan78xx_get_stats, 1928 .get_sset_count = lan78xx_get_sset_count, 1929 .self_test = net_selftest, 1930 .get_strings = lan78xx_get_strings, 1931 .get_wol = lan78xx_get_wol, 1932 .set_wol = lan78xx_set_wol, 1933 .get_ts_info = ethtool_op_get_ts_info, 1934 .get_eee = lan78xx_get_eee, 1935 .set_eee = lan78xx_set_eee, 1936 .get_pauseparam = lan78xx_get_pause, 1937 .set_pauseparam = lan78xx_set_pause, 1938 .get_link_ksettings = lan78xx_get_link_ksettings, 1939 .set_link_ksettings = lan78xx_set_link_ksettings, 1940 .get_regs_len = lan78xx_get_regs_len, 1941 .get_regs = lan78xx_get_regs, 1942 }; 1943 1944 static int lan78xx_init_mac_address(struct lan78xx_net *dev) 1945 { 1946 u32 addr_lo, addr_hi; 1947 u8 addr[6]; 1948 int ret; 1949 1950 ret = lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 1951 if (ret < 0) 1952 return ret; 1953 1954 ret = lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 1955 if (ret < 0) 1956 return ret; 1957 1958 addr[0] = addr_lo & 0xFF; 1959 addr[1] = (addr_lo >> 8) & 0xFF; 1960 addr[2] = (addr_lo >> 16) & 0xFF; 1961 addr[3] = (addr_lo >> 24) & 0xFF; 1962 addr[4] = addr_hi & 0xFF; 1963 addr[5] = (addr_hi >> 8) & 0xFF; 1964 1965 if (!is_valid_ether_addr(addr)) { 1966 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) { 1967 /* valid address present in Device Tree */ 1968 netif_dbg(dev, ifup, dev->net, 1969 "MAC address read from Device Tree"); 1970 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, 1971 ETH_ALEN, addr) == 0) || 1972 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, 1973 ETH_ALEN, addr) == 0)) && 1974 is_valid_ether_addr(addr)) { 1975 /* eeprom values are valid so use them */ 1976 netif_dbg(dev, ifup, dev->net, 1977 "MAC address read from EEPROM"); 1978 } else { 1979 /* generate random MAC */ 1980 eth_random_addr(addr); 1981 netif_dbg(dev, ifup, dev->net, 1982 "MAC address set to random addr"); 1983 } 1984 1985 addr_lo = addr[0] | (addr[1] << 8) | 1986 (addr[2] << 16) | (addr[3] << 24); 1987 addr_hi = addr[4] | (addr[5] << 8); 1988 1989 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 1990 if (ret < 0) 1991 return ret; 1992 1993 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 1994 if (ret < 0) 1995 return ret; 1996 } 1997 1998 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 1999 if (ret < 0) 2000 return ret; 2001 2002 ret = lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2003 if (ret < 0) 2004 return ret; 2005 2006 eth_hw_addr_set(dev->net, addr); 2007 2008 return 0; 2009 } 2010 2011 /* MDIO read and write wrappers for phylib */ 2012 static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx) 2013 { 2014 struct lan78xx_net *dev = bus->priv; 2015 u32 val, addr; 2016 int ret; 2017 2018 ret = usb_autopm_get_interface(dev->intf); 2019 if (ret < 0) 2020 return ret; 2021 2022 mutex_lock(&dev->mdiobus_mutex); 2023 2024 /* confirm MII not busy */ 2025 ret = lan78xx_mdiobus_wait_not_busy(dev); 2026 if (ret < 0) 2027 goto done; 2028 2029 /* set the address, index & direction (read from PHY) */ 2030 addr = mii_access(phy_id, idx, MII_READ); 2031 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2032 if (ret < 0) 2033 goto done; 2034 2035 ret = lan78xx_mdiobus_wait_not_busy(dev); 2036 if (ret < 0) 2037 goto done; 2038 2039 ret = lan78xx_read_reg(dev, MII_DATA, &val); 2040 if (ret < 0) 2041 goto done; 2042 2043 ret = (int)(val & 0xFFFF); 2044 2045 done: 2046 mutex_unlock(&dev->mdiobus_mutex); 2047 usb_autopm_put_interface(dev->intf); 2048 2049 return ret; 2050 } 2051 2052 static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx, 2053 u16 regval) 2054 { 2055 struct lan78xx_net *dev = bus->priv; 2056 u32 val, addr; 2057 int ret; 2058 2059 ret = usb_autopm_get_interface(dev->intf); 2060 if (ret < 0) 2061 return ret; 2062 2063 mutex_lock(&dev->mdiobus_mutex); 2064 2065 /* confirm MII not busy */ 2066 ret = lan78xx_mdiobus_wait_not_busy(dev); 2067 if (ret < 0) 2068 goto done; 2069 2070 val = (u32)regval; 2071 ret = lan78xx_write_reg(dev, MII_DATA, val); 2072 if (ret < 0) 2073 goto done; 2074 2075 /* set the address, index & direction (write to PHY) */ 2076 addr = mii_access(phy_id, idx, MII_WRITE); 2077 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2078 if (ret < 0) 2079 goto done; 2080 2081 ret = lan78xx_mdiobus_wait_not_busy(dev); 2082 if (ret < 0) 2083 goto done; 2084 2085 done: 2086 mutex_unlock(&dev->mdiobus_mutex); 2087 usb_autopm_put_interface(dev->intf); 2088 return ret; 2089 } 2090 2091 static int lan78xx_mdio_init(struct lan78xx_net *dev) 2092 { 2093 struct device_node *node; 2094 int ret; 2095 2096 dev->mdiobus = mdiobus_alloc(); 2097 if (!dev->mdiobus) { 2098 netdev_err(dev->net, "can't allocate MDIO bus\n"); 2099 return -ENOMEM; 2100 } 2101 2102 dev->mdiobus->priv = (void *)dev; 2103 dev->mdiobus->read = lan78xx_mdiobus_read; 2104 dev->mdiobus->write = lan78xx_mdiobus_write; 2105 dev->mdiobus->name = "lan78xx-mdiobus"; 2106 dev->mdiobus->parent = &dev->udev->dev; 2107 2108 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", 2109 dev->udev->bus->busnum, dev->udev->devnum); 2110 2111 switch (dev->chipid) { 2112 case ID_REV_CHIP_ID_7800_: 2113 case ID_REV_CHIP_ID_7850_: 2114 /* set to internal PHY id */ 2115 dev->mdiobus->phy_mask = ~(1 << 1); 2116 break; 2117 case ID_REV_CHIP_ID_7801_: 2118 break; 2119 } 2120 2121 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio"); 2122 ret = of_mdiobus_register(dev->mdiobus, node); 2123 of_node_put(node); 2124 if (ret) { 2125 netdev_err(dev->net, "can't register MDIO bus\n"); 2126 goto exit1; 2127 } 2128 2129 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id); 2130 return 0; 2131 exit1: 2132 mdiobus_free(dev->mdiobus); 2133 return ret; 2134 } 2135 2136 static void lan78xx_remove_mdio(struct lan78xx_net *dev) 2137 { 2138 mdiobus_unregister(dev->mdiobus); 2139 mdiobus_free(dev->mdiobus); 2140 } 2141 2142 static int irq_map(struct irq_domain *d, unsigned int irq, 2143 irq_hw_number_t hwirq) 2144 { 2145 struct irq_domain_data *data = d->host_data; 2146 2147 irq_set_chip_data(irq, data); 2148 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler); 2149 irq_set_noprobe(irq); 2150 2151 return 0; 2152 } 2153 2154 static void irq_unmap(struct irq_domain *d, unsigned int irq) 2155 { 2156 irq_set_chip_and_handler(irq, NULL, NULL); 2157 irq_set_chip_data(irq, NULL); 2158 } 2159 2160 static const struct irq_domain_ops chip_domain_ops = { 2161 .map = irq_map, 2162 .unmap = irq_unmap, 2163 }; 2164 2165 static void lan78xx_irq_mask(struct irq_data *irqd) 2166 { 2167 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2168 2169 data->irqenable &= ~BIT(irqd_to_hwirq(irqd)); 2170 } 2171 2172 static void lan78xx_irq_unmask(struct irq_data *irqd) 2173 { 2174 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2175 2176 data->irqenable |= BIT(irqd_to_hwirq(irqd)); 2177 } 2178 2179 static void lan78xx_irq_bus_lock(struct irq_data *irqd) 2180 { 2181 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2182 2183 mutex_lock(&data->irq_lock); 2184 } 2185 2186 static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd) 2187 { 2188 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2189 struct lan78xx_net *dev = 2190 container_of(data, struct lan78xx_net, domain_data); 2191 u32 buf; 2192 int ret; 2193 2194 /* call register access here because irq_bus_lock & irq_bus_sync_unlock 2195 * are only two callbacks executed in non-atomic contex. 2196 */ 2197 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2198 if (ret < 0) 2199 goto irq_bus_sync_unlock; 2200 2201 if (buf != data->irqenable) 2202 ret = lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2203 2204 irq_bus_sync_unlock: 2205 if (ret < 0) 2206 netdev_err(dev->net, "Failed to sync IRQ enable register: %pe\n", 2207 ERR_PTR(ret)); 2208 2209 mutex_unlock(&data->irq_lock); 2210 } 2211 2212 static struct irq_chip lan78xx_irqchip = { 2213 .name = "lan78xx-irqs", 2214 .irq_mask = lan78xx_irq_mask, 2215 .irq_unmask = lan78xx_irq_unmask, 2216 .irq_bus_lock = lan78xx_irq_bus_lock, 2217 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock, 2218 }; 2219 2220 static int lan78xx_setup_irq_domain(struct lan78xx_net *dev) 2221 { 2222 struct irq_domain *irqdomain; 2223 unsigned int irqmap = 0; 2224 u32 buf; 2225 int ret = 0; 2226 2227 mutex_init(&dev->domain_data.irq_lock); 2228 2229 ret = lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2230 if (ret < 0) 2231 return ret; 2232 2233 dev->domain_data.irqenable = buf; 2234 2235 dev->domain_data.irqchip = &lan78xx_irqchip; 2236 dev->domain_data.irq_handler = handle_simple_irq; 2237 2238 irqdomain = irq_domain_create_simple(dev_fwnode(dev->udev->dev.parent), MAX_INT_EP, 0, 2239 &chip_domain_ops, &dev->domain_data); 2240 if (irqdomain) { 2241 /* create mapping for PHY interrupt */ 2242 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY); 2243 if (!irqmap) { 2244 irq_domain_remove(irqdomain); 2245 2246 irqdomain = NULL; 2247 ret = -EINVAL; 2248 } 2249 } else { 2250 ret = -EINVAL; 2251 } 2252 2253 dev->domain_data.irqdomain = irqdomain; 2254 dev->domain_data.phyirq = irqmap; 2255 2256 return ret; 2257 } 2258 2259 static void lan78xx_remove_irq_domain(struct lan78xx_net *dev) 2260 { 2261 if (dev->domain_data.phyirq > 0) { 2262 irq_dispose_mapping(dev->domain_data.phyirq); 2263 2264 if (dev->domain_data.irqdomain) 2265 irq_domain_remove(dev->domain_data.irqdomain); 2266 } 2267 dev->domain_data.phyirq = 0; 2268 dev->domain_data.irqdomain = NULL; 2269 } 2270 2271 static void lan78xx_mac_config(struct phylink_config *config, unsigned int mode, 2272 const struct phylink_link_state *state) 2273 { 2274 struct net_device *net = to_net_dev(config->dev); 2275 struct lan78xx_net *dev = netdev_priv(net); 2276 u32 mac_cr = 0; 2277 int ret; 2278 2279 /* Check if the mode is supported */ 2280 if (mode != MLO_AN_FIXED && mode != MLO_AN_PHY) { 2281 netdev_err(net, "Unsupported negotiation mode: %u\n", mode); 2282 return; 2283 } 2284 2285 switch (state->interface) { 2286 case PHY_INTERFACE_MODE_GMII: 2287 mac_cr |= MAC_CR_GMII_EN_; 2288 break; 2289 case PHY_INTERFACE_MODE_RGMII: 2290 case PHY_INTERFACE_MODE_RGMII_ID: 2291 case PHY_INTERFACE_MODE_RGMII_TXID: 2292 case PHY_INTERFACE_MODE_RGMII_RXID: 2293 break; 2294 default: 2295 netdev_warn(net, "Unsupported interface mode: %d\n", 2296 state->interface); 2297 return; 2298 } 2299 2300 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_GMII_EN_, mac_cr); 2301 if (ret < 0) 2302 netdev_err(net, "Failed to config MAC with error %pe\n", 2303 ERR_PTR(ret)); 2304 } 2305 2306 static void lan78xx_mac_link_down(struct phylink_config *config, 2307 unsigned int mode, phy_interface_t interface) 2308 { 2309 struct net_device *net = to_net_dev(config->dev); 2310 struct lan78xx_net *dev = netdev_priv(net); 2311 int ret; 2312 2313 netif_stop_queue(net); 2314 2315 /* MAC reset will not de-assert TXEN/RXEN, we need to stop them 2316 * manually before reset. TX and RX should be disabled before running 2317 * link_up sequence. 2318 */ 2319 ret = lan78xx_stop_tx_path(dev); 2320 if (ret < 0) 2321 goto link_down_fail; 2322 2323 ret = lan78xx_stop_rx_path(dev); 2324 if (ret < 0) 2325 goto link_down_fail; 2326 2327 /* MAC reset seems to not affect MAC configuration, no idea if it is 2328 * really needed, but it was done in previous driver version. So, leave 2329 * it here. 2330 */ 2331 ret = lan78xx_mac_reset(dev); 2332 if (ret < 0) 2333 goto link_down_fail; 2334 2335 return; 2336 2337 link_down_fail: 2338 netdev_err(dev->net, "Failed to set MAC down with error %pe\n", 2339 ERR_PTR(ret)); 2340 } 2341 2342 /** 2343 * lan78xx_configure_usb - Configure USB link power settings 2344 * @dev: pointer to the LAN78xx device structure 2345 * @speed: negotiated Ethernet link speed (in Mbps) 2346 * 2347 * This function configures U1/U2 link power management for SuperSpeed 2348 * USB devices based on the current Ethernet link speed. It uses the 2349 * USB_CFG1 register to enable or disable U1 and U2 low-power states. 2350 * 2351 * Note: Only LAN7800 and LAN7801 support SuperSpeed (USB 3.x). 2352 * LAN7850 is a High-Speed-only (USB 2.0) device and is skipped. 2353 * 2354 * Return: 0 on success or a negative error code on failure. 2355 */ 2356 static int lan78xx_configure_usb(struct lan78xx_net *dev, int speed) 2357 { 2358 u32 mask, val; 2359 int ret; 2360 2361 /* Only configure USB settings for SuperSpeed devices */ 2362 if (dev->udev->speed != USB_SPEED_SUPER) 2363 return 0; 2364 2365 /* LAN7850 does not support USB 3.x */ 2366 if (dev->chipid == ID_REV_CHIP_ID_7850_) { 2367 netdev_warn_once(dev->net, "Unexpected SuperSpeed for LAN7850 (USB 2.0 only)\n"); 2368 return 0; 2369 } 2370 2371 switch (speed) { 2372 case SPEED_1000: 2373 /* Disable U2, enable U1 */ 2374 ret = lan78xx_update_reg(dev, USB_CFG1, 2375 USB_CFG1_DEV_U2_INIT_EN_, 0); 2376 if (ret < 0) 2377 return ret; 2378 2379 return lan78xx_update_reg(dev, USB_CFG1, 2380 USB_CFG1_DEV_U1_INIT_EN_, 2381 USB_CFG1_DEV_U1_INIT_EN_); 2382 2383 case SPEED_100: 2384 case SPEED_10: 2385 /* Enable both U1 and U2 */ 2386 mask = USB_CFG1_DEV_U1_INIT_EN_ | USB_CFG1_DEV_U2_INIT_EN_; 2387 val = mask; 2388 return lan78xx_update_reg(dev, USB_CFG1, mask, val); 2389 2390 default: 2391 netdev_warn(dev->net, "Unsupported link speed: %d\n", speed); 2392 return -EINVAL; 2393 } 2394 } 2395 2396 /** 2397 * lan78xx_configure_flowcontrol - Set MAC and FIFO flow control configuration 2398 * @dev: pointer to the LAN78xx device structure 2399 * @tx_pause: enable transmission of pause frames 2400 * @rx_pause: enable reception of pause frames 2401 * 2402 * This function configures the LAN78xx flow control settings by writing 2403 * to the FLOW and FCT_FLOW registers. The pause time is set to the 2404 * maximum allowed value (65535 quanta). FIFO thresholds are selected 2405 * based on USB speed. 2406 * 2407 * The Pause Time field is measured in units of 512-bit times (quanta): 2408 * - At 1 Gbps: 1 quanta = 512 ns → max ~33.6 ms pause 2409 * - At 100 Mbps: 1 quanta = 5.12 µs → max ~335 ms pause 2410 * - At 10 Mbps: 1 quanta = 51.2 µs → max ~3.3 s pause 2411 * 2412 * Flow control thresholds (FCT_FLOW) are used to trigger pause/resume: 2413 * - RXUSED is the number of bytes used in the RX FIFO 2414 * - Flow is turned ON when RXUSED ≥ FLOW_ON threshold 2415 * - Flow is turned OFF when RXUSED ≤ FLOW_OFF threshold 2416 * - Both thresholds are encoded in units of 512 bytes (rounded up) 2417 * 2418 * Thresholds differ by USB speed because available USB bandwidth 2419 * affects how fast packets can be drained from the RX FIFO: 2420 * - USB 3.x (SuperSpeed): 2421 * FLOW_ON = 9216 bytes → 18 units 2422 * FLOW_OFF = 4096 bytes → 8 units 2423 * - USB 2.0 (High-Speed): 2424 * FLOW_ON = 8704 bytes → 17 units 2425 * FLOW_OFF = 1024 bytes → 2 units 2426 * 2427 * Note: The FCT_FLOW register must be configured before enabling TX pause 2428 * (i.e., before setting FLOW_CR_TX_FCEN_), as required by the hardware. 2429 * 2430 * Return: 0 on success or a negative error code on failure. 2431 */ 2432 static int lan78xx_configure_flowcontrol(struct lan78xx_net *dev, 2433 bool tx_pause, bool rx_pause) 2434 { 2435 /* Use maximum pause time: 65535 quanta (512-bit times) */ 2436 const u32 pause_time_quanta = 65535; 2437 u32 fct_flow = 0; 2438 u32 flow = 0; 2439 int ret; 2440 2441 /* Prepare MAC flow control bits */ 2442 if (tx_pause) 2443 flow |= FLOW_CR_TX_FCEN_ | pause_time_quanta; 2444 2445 if (rx_pause) 2446 flow |= FLOW_CR_RX_FCEN_; 2447 2448 /* Select RX FIFO thresholds based on USB speed 2449 * 2450 * FCT_FLOW layout: 2451 * bits [6:0] FLOW_ON threshold (RXUSED ≥ ON → assert pause) 2452 * bits [14:8] FLOW_OFF threshold (RXUSED ≤ OFF → deassert pause) 2453 * thresholds are expressed in units of 512 bytes 2454 */ 2455 switch (dev->udev->speed) { 2456 case USB_SPEED_SUPER: 2457 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 2458 break; 2459 case USB_SPEED_HIGH: 2460 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 2461 break; 2462 default: 2463 netdev_warn(dev->net, "Unsupported USB speed: %d\n", 2464 dev->udev->speed); 2465 return -EINVAL; 2466 } 2467 2468 /* Step 1: Write FIFO thresholds before enabling pause frames */ 2469 ret = lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 2470 if (ret < 0) 2471 return ret; 2472 2473 /* Step 2: Enable MAC pause functionality */ 2474 return lan78xx_write_reg(dev, FLOW, flow); 2475 } 2476 2477 static void lan78xx_mac_link_up(struct phylink_config *config, 2478 struct phy_device *phy, 2479 unsigned int mode, phy_interface_t interface, 2480 int speed, int duplex, 2481 bool tx_pause, bool rx_pause) 2482 { 2483 struct net_device *net = to_net_dev(config->dev); 2484 struct lan78xx_net *dev = netdev_priv(net); 2485 u32 mac_cr = 0; 2486 int ret; 2487 2488 switch (speed) { 2489 case SPEED_1000: 2490 mac_cr |= MAC_CR_SPEED_1000_; 2491 break; 2492 case SPEED_100: 2493 mac_cr |= MAC_CR_SPEED_100_; 2494 break; 2495 case SPEED_10: 2496 mac_cr |= MAC_CR_SPEED_10_; 2497 break; 2498 default: 2499 netdev_err(dev->net, "Unsupported speed %d\n", speed); 2500 return; 2501 } 2502 2503 if (duplex == DUPLEX_FULL) 2504 mac_cr |= MAC_CR_FULL_DUPLEX_; 2505 2506 /* make sure TXEN and RXEN are disabled before reconfiguring MAC */ 2507 ret = lan78xx_update_reg(dev, MAC_CR, MAC_CR_SPEED_MASK_ | 2508 MAC_CR_FULL_DUPLEX_ | MAC_CR_EEE_EN_, mac_cr); 2509 if (ret < 0) 2510 goto link_up_fail; 2511 2512 ret = lan78xx_configure_flowcontrol(dev, tx_pause, rx_pause); 2513 if (ret < 0) 2514 goto link_up_fail; 2515 2516 ret = lan78xx_configure_usb(dev, speed); 2517 if (ret < 0) 2518 goto link_up_fail; 2519 2520 lan78xx_rx_urb_submit_all(dev); 2521 2522 ret = lan78xx_flush_rx_fifo(dev); 2523 if (ret < 0) 2524 goto link_up_fail; 2525 2526 ret = lan78xx_flush_tx_fifo(dev); 2527 if (ret < 0) 2528 goto link_up_fail; 2529 2530 ret = lan78xx_start_tx_path(dev); 2531 if (ret < 0) 2532 goto link_up_fail; 2533 2534 ret = lan78xx_start_rx_path(dev); 2535 if (ret < 0) 2536 goto link_up_fail; 2537 2538 /* The RFE clears the VLAN/DA hash filter (VHF) on a link down/up 2539 * cycle, so reprogram both tables from their shadow copies. 2540 */ 2541 ret = lan78xx_write_vlan_table(dev); 2542 if (ret < 0) 2543 goto link_up_fail; 2544 2545 ret = lan78xx_write_mchash_table(dev); 2546 if (ret < 0) 2547 goto link_up_fail; 2548 2549 netif_start_queue(net); 2550 2551 return; 2552 2553 link_up_fail: 2554 netdev_err(dev->net, "Failed to set MAC up with error %pe\n", 2555 ERR_PTR(ret)); 2556 } 2557 2558 /** 2559 * lan78xx_mac_eee_enable - Enable or disable MAC-side EEE support 2560 * @dev: LAN78xx device 2561 * @enable: true to enable EEE, false to disable 2562 * 2563 * This function sets or clears the MAC_CR_EEE_EN_ bit to control Energy 2564 * Efficient Ethernet (EEE) operation. According to current understanding 2565 * of the LAN7800 documentation, this bit can be modified while TX and RX 2566 * are enabled. No explicit requirement was found to disable data paths 2567 * before changing this bit. 2568 * 2569 * Return: 0 on success or a negative error code 2570 */ 2571 static int lan78xx_mac_eee_enable(struct lan78xx_net *dev, bool enable) 2572 { 2573 u32 mac_cr = 0; 2574 2575 if (enable) 2576 mac_cr |= MAC_CR_EEE_EN_; 2577 2578 return lan78xx_update_reg(dev, MAC_CR, MAC_CR_EEE_EN_, mac_cr); 2579 } 2580 2581 static void lan78xx_mac_disable_tx_lpi(struct phylink_config *config) 2582 { 2583 struct net_device *net = to_net_dev(config->dev); 2584 struct lan78xx_net *dev = netdev_priv(net); 2585 2586 lan78xx_mac_eee_enable(dev, false); 2587 } 2588 2589 static int lan78xx_mac_enable_tx_lpi(struct phylink_config *config, u32 timer, 2590 bool tx_clk_stop) 2591 { 2592 struct net_device *net = to_net_dev(config->dev); 2593 struct lan78xx_net *dev = netdev_priv(net); 2594 int ret; 2595 2596 /* Software should only change this field when Energy Efficient 2597 * Ethernet Enable (EEEEN) is cleared. We ensure that by clearing 2598 * EEEEN during probe, and phylink itself guarantees that 2599 * mac_disable_tx_lpi() will have been previously called. 2600 */ 2601 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, timer); 2602 if (ret < 0) 2603 return ret; 2604 2605 return lan78xx_mac_eee_enable(dev, true); 2606 } 2607 2608 static const struct phylink_mac_ops lan78xx_phylink_mac_ops = { 2609 .mac_config = lan78xx_mac_config, 2610 .mac_link_down = lan78xx_mac_link_down, 2611 .mac_link_up = lan78xx_mac_link_up, 2612 .mac_disable_tx_lpi = lan78xx_mac_disable_tx_lpi, 2613 .mac_enable_tx_lpi = lan78xx_mac_enable_tx_lpi, 2614 }; 2615 2616 /** 2617 * lan78xx_set_fixed_link() - Set fixed link configuration for LAN7801 2618 * @dev: LAN78xx device 2619 * 2620 * Use fixed link configuration with 1 Gbps full duplex. This is used in special 2621 * cases like EVB-KSZ9897-1, where LAN7801 acts as a USB-to-Ethernet interface 2622 * to a switch without a visible PHY. 2623 * 2624 * Return: pointer to the registered fixed PHY, or ERR_PTR() on error. 2625 */ 2626 static int lan78xx_set_fixed_link(struct lan78xx_net *dev) 2627 { 2628 static const struct phylink_link_state state = { 2629 .speed = SPEED_1000, 2630 .duplex = DUPLEX_FULL, 2631 }; 2632 2633 netdev_info(dev->net, 2634 "No PHY found on LAN7801 – using fixed link instead (e.g. EVB-KSZ9897-1)\n"); 2635 2636 return phylink_set_fixed_link(dev->phylink, &state); 2637 } 2638 2639 /** 2640 * lan78xx_get_phy() - Probe or register PHY device and set interface mode 2641 * @dev: LAN78xx device structure 2642 * 2643 * This function attempts to find a PHY on the MDIO bus. If no PHY is found 2644 * and the chip is LAN7801, it registers a fixed PHY as fallback. It also 2645 * sets dev->interface based on chip ID and detected PHY type. 2646 * 2647 * Return: a valid PHY device pointer, or ERR_PTR() on failure. 2648 */ 2649 static struct phy_device *lan78xx_get_phy(struct lan78xx_net *dev) 2650 { 2651 struct phy_device *phydev; 2652 2653 /* Attempt to locate a PHY on the MDIO bus */ 2654 phydev = phy_find_first(dev->mdiobus); 2655 2656 switch (dev->chipid) { 2657 case ID_REV_CHIP_ID_7801_: 2658 if (phydev) { 2659 /* External RGMII PHY detected */ 2660 dev->interface = PHY_INTERFACE_MODE_RGMII_ID; 2661 phydev->is_internal = false; 2662 2663 if (!phydev->drv) 2664 netdev_warn(dev->net, 2665 "PHY driver not found – assuming RGMII delays are on PCB or strapped for the PHY\n"); 2666 2667 return phydev; 2668 } 2669 2670 dev->interface = PHY_INTERFACE_MODE_RGMII; 2671 /* No PHY found – fallback to fixed PHY (e.g. KSZ switch board) */ 2672 return NULL; 2673 2674 case ID_REV_CHIP_ID_7800_: 2675 case ID_REV_CHIP_ID_7850_: 2676 if (!phydev) 2677 return ERR_PTR(-ENODEV); 2678 2679 /* These use internal GMII-connected PHY */ 2680 dev->interface = PHY_INTERFACE_MODE_GMII; 2681 phydev->is_internal = true; 2682 return phydev; 2683 2684 default: 2685 netdev_err(dev->net, "Unknown CHIP ID: 0x%08x\n", dev->chipid); 2686 return ERR_PTR(-ENODEV); 2687 } 2688 } 2689 2690 /** 2691 * lan78xx_mac_prepare_for_phy() - Preconfigure MAC-side interface settings 2692 * @dev: LAN78xx device 2693 * 2694 * Configure MAC-side registers according to dev->interface, which should be 2695 * set by lan78xx_get_phy(). 2696 * 2697 * - For PHY_INTERFACE_MODE_RGMII: 2698 * Enable MAC-side TXC delay. This mode seems to be used in a special setup 2699 * without a real PHY, likely on EVB-KSZ9897-1. In that design, LAN7801 is 2700 * connected to the KSZ9897 switch, and the link timing is expected to be 2701 * hardwired (e.g. via strapping or board layout). No devicetree support is 2702 * assumed here. 2703 * 2704 * - For PHY_INTERFACE_MODE_RGMII_ID: 2705 * Disable MAC-side delay and rely on the PHY driver to provide delay. 2706 * 2707 * - For GMII, no MAC-specific config is needed. 2708 * 2709 * Return: 0 on success or a negative error code. 2710 */ 2711 static int lan78xx_mac_prepare_for_phy(struct lan78xx_net *dev) 2712 { 2713 int ret; 2714 2715 switch (dev->interface) { 2716 case PHY_INTERFACE_MODE_RGMII: 2717 /* Enable MAC-side TX clock delay */ 2718 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 2719 MAC_RGMII_ID_TXC_DELAY_EN_); 2720 if (ret < 0) 2721 return ret; 2722 2723 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2724 if (ret < 0) 2725 return ret; 2726 2727 ret = lan78xx_update_reg(dev, HW_CFG, 2728 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_, 2729 HW_CFG_CLK125_EN_ | HW_CFG_REFCLK25_EN_); 2730 if (ret < 0) 2731 return ret; 2732 2733 break; 2734 2735 case PHY_INTERFACE_MODE_RGMII_ID: 2736 /* Disable MAC-side TXC delay, PHY provides it */ 2737 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 0); 2738 if (ret < 0) 2739 return ret; 2740 2741 break; 2742 2743 case PHY_INTERFACE_MODE_GMII: 2744 /* No MAC-specific configuration required */ 2745 break; 2746 2747 default: 2748 netdev_warn(dev->net, "Unsupported interface mode: %d\n", 2749 dev->interface); 2750 break; 2751 } 2752 2753 return 0; 2754 } 2755 2756 /** 2757 * lan78xx_configure_leds_from_dt() - Configure LED enables based on DT 2758 * @dev: LAN78xx device 2759 * @phydev: PHY device (must be valid) 2760 * 2761 * Reads "microchip,led-modes" property from the PHY's DT node and enables 2762 * the corresponding number of LEDs by writing to HW_CFG. 2763 * 2764 * This helper preserves the original logic, enabling up to 4 LEDs. 2765 * If the property is not present, this function does nothing. 2766 * 2767 * Return: 0 on success or a negative error code. 2768 */ 2769 static int lan78xx_configure_leds_from_dt(struct lan78xx_net *dev, 2770 struct phy_device *phydev) 2771 { 2772 struct device_node *np = phydev->mdio.dev.of_node; 2773 u32 reg; 2774 int len, ret; 2775 2776 if (!np) 2777 return 0; 2778 2779 len = of_property_count_elems_of_size(np, "microchip,led-modes", 2780 sizeof(u32)); 2781 if (len < 0) 2782 return 0; 2783 2784 ret = lan78xx_read_reg(dev, HW_CFG, ®); 2785 if (ret < 0) 2786 return ret; 2787 2788 reg &= ~(HW_CFG_LED0_EN_ | HW_CFG_LED1_EN_ | 2789 HW_CFG_LED2_EN_ | HW_CFG_LED3_EN_); 2790 2791 reg |= (len > 0) * HW_CFG_LED0_EN_ | 2792 (len > 1) * HW_CFG_LED1_EN_ | 2793 (len > 2) * HW_CFG_LED2_EN_ | 2794 (len > 3) * HW_CFG_LED3_EN_; 2795 2796 return lan78xx_write_reg(dev, HW_CFG, reg); 2797 } 2798 2799 static int lan78xx_phylink_setup(struct lan78xx_net *dev) 2800 { 2801 struct phylink_config *pc = &dev->phylink_config; 2802 struct phylink *phylink; 2803 2804 pc->dev = &dev->net->dev; 2805 pc->type = PHYLINK_NETDEV; 2806 pc->mac_capabilities = MAC_SYM_PAUSE | MAC_ASYM_PAUSE | MAC_10 | 2807 MAC_100 | MAC_1000FD; 2808 pc->mac_managed_pm = true; 2809 pc->lpi_capabilities = MAC_100FD | MAC_1000FD; 2810 /* 2811 * Default TX LPI (Low Power Idle) request delay count is set to 50us. 2812 * 2813 * Source: LAN7800 Documentation, DS00001992H, Section 15.1.57, Page 204. 2814 * 2815 * Reasoning: 2816 * According to the application note in the LAN7800 documentation, a 2817 * zero delay may negatively impact the TX data path’s ability to 2818 * support Gigabit operation. A value of 50us is recommended as a 2819 * reasonable default when the part operates at Gigabit speeds, 2820 * balancing stability and power efficiency in EEE mode. This delay can 2821 * be increased based on performance testing, as EEE is designed for 2822 * scenarios with mostly idle links and occasional bursts of full 2823 * bandwidth transmission. The goal is to ensure reliable Gigabit 2824 * performance without overly aggressive power optimization during 2825 * inactive periods. 2826 */ 2827 pc->lpi_timer_default = 50; 2828 pc->eee_enabled_default = true; 2829 2830 if (dev->chipid == ID_REV_CHIP_ID_7801_) 2831 phy_interface_set_rgmii(pc->supported_interfaces); 2832 else 2833 __set_bit(PHY_INTERFACE_MODE_GMII, pc->supported_interfaces); 2834 2835 memcpy(dev->phylink_config.lpi_interfaces, 2836 dev->phylink_config.supported_interfaces, 2837 sizeof(dev->phylink_config.lpi_interfaces)); 2838 2839 phylink = phylink_create(pc, dev->net->dev.fwnode, 2840 dev->interface, &lan78xx_phylink_mac_ops); 2841 if (IS_ERR(phylink)) 2842 return PTR_ERR(phylink); 2843 2844 dev->phylink = phylink; 2845 2846 return 0; 2847 } 2848 2849 static void lan78xx_phy_uninit(struct lan78xx_net *dev) 2850 { 2851 if (dev->phylink) { 2852 phylink_disconnect_phy(dev->phylink); 2853 phylink_destroy(dev->phylink); 2854 dev->phylink = NULL; 2855 } 2856 } 2857 2858 static int lan78xx_phy_init(struct lan78xx_net *dev) 2859 { 2860 struct phy_device *phydev; 2861 int ret; 2862 2863 phydev = lan78xx_get_phy(dev); 2864 /* phydev can be NULL if no PHY is found and the chip is LAN7801, 2865 * which will use a fixed link later. 2866 * If an error occurs, return the error code immediately. 2867 */ 2868 if (IS_ERR(phydev)) 2869 return PTR_ERR(phydev); 2870 2871 ret = lan78xx_phylink_setup(dev); 2872 if (ret < 0) 2873 return ret; 2874 2875 ret = lan78xx_mac_prepare_for_phy(dev); 2876 if (ret < 0) 2877 goto phylink_uninit; 2878 2879 /* If no PHY is found, set up a fixed link. It is very specific to 2880 * the LAN7801 and is used in special cases like EVB-KSZ9897-1 where 2881 * LAN7801 acts as a USB-to-Ethernet interface to a switch without 2882 * a visible PHY. 2883 */ 2884 if (!phydev) { 2885 ret = lan78xx_set_fixed_link(dev); 2886 if (ret < 0) 2887 goto phylink_uninit; 2888 2889 /* No PHY found, so set up a fixed link and return early. 2890 * No need to configure PHY IRQ or attach to phylink. 2891 */ 2892 return 0; 2893 } 2894 2895 /* if phyirq is not set, use polling mode in phylib */ 2896 if (dev->domain_data.phyirq > 0) 2897 phydev->irq = dev->domain_data.phyirq; 2898 else 2899 phydev->irq = PHY_POLL; 2900 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq); 2901 2902 ret = phylink_connect_phy(dev->phylink, phydev); 2903 if (ret) { 2904 netdev_err(dev->net, "can't attach PHY to %s, error %pe\n", 2905 dev->mdiobus->id, ERR_PTR(ret)); 2906 goto phylink_uninit; 2907 } 2908 2909 ret = lan78xx_configure_leds_from_dt(dev, phydev); 2910 if (ret < 0) 2911 goto phylink_uninit; 2912 2913 return 0; 2914 2915 phylink_uninit: 2916 lan78xx_phy_uninit(dev); 2917 2918 return ret; 2919 } 2920 2921 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size) 2922 { 2923 bool rxenabled; 2924 u32 buf; 2925 int ret; 2926 2927 ret = lan78xx_read_reg(dev, MAC_RX, &buf); 2928 if (ret < 0) 2929 return ret; 2930 2931 rxenabled = ((buf & MAC_RX_RXEN_) != 0); 2932 2933 if (rxenabled) { 2934 buf &= ~MAC_RX_RXEN_; 2935 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2936 if (ret < 0) 2937 return ret; 2938 } 2939 2940 /* add 4 to size for FCS */ 2941 buf &= ~MAC_RX_MAX_SIZE_MASK_; 2942 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 2943 2944 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2945 if (ret < 0) 2946 return ret; 2947 2948 if (rxenabled) { 2949 buf |= MAC_RX_RXEN_; 2950 ret = lan78xx_write_reg(dev, MAC_RX, buf); 2951 if (ret < 0) 2952 return ret; 2953 } 2954 2955 return 0; 2956 } 2957 2958 static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q) 2959 { 2960 struct sk_buff *skb; 2961 unsigned long flags; 2962 int count = 0; 2963 2964 spin_lock_irqsave(&q->lock, flags); 2965 while (!skb_queue_empty(q)) { 2966 struct skb_data *entry; 2967 struct urb *urb; 2968 int ret; 2969 2970 skb_queue_walk(q, skb) { 2971 entry = (struct skb_data *)skb->cb; 2972 if (entry->state != unlink_start) 2973 goto found; 2974 } 2975 break; 2976 found: 2977 entry->state = unlink_start; 2978 urb = entry->urb; 2979 2980 /* Get reference count of the URB to avoid it to be 2981 * freed during usb_unlink_urb, which may trigger 2982 * use-after-free problem inside usb_unlink_urb since 2983 * usb_unlink_urb is always racing with .complete 2984 * handler(include defer_bh). 2985 */ 2986 usb_get_urb(urb); 2987 spin_unlock_irqrestore(&q->lock, flags); 2988 /* during some PM-driven resume scenarios, 2989 * these (async) unlinks complete immediately 2990 */ 2991 ret = usb_unlink_urb(urb); 2992 if (ret != -EINPROGRESS && ret != 0) 2993 netdev_dbg(dev->net, "unlink urb err, %d\n", ret); 2994 else 2995 count++; 2996 usb_put_urb(urb); 2997 spin_lock_irqsave(&q->lock, flags); 2998 } 2999 spin_unlock_irqrestore(&q->lock, flags); 3000 return count; 3001 } 3002 3003 static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu) 3004 { 3005 struct lan78xx_net *dev = netdev_priv(netdev); 3006 int max_frame_len = RX_MAX_FRAME_LEN(new_mtu); 3007 int ret; 3008 3009 /* no second zero-length packet read wanted after mtu-sized packets */ 3010 if ((max_frame_len % dev->maxpacket) == 0) 3011 return -EDOM; 3012 3013 ret = usb_autopm_get_interface(dev->intf); 3014 if (ret < 0) 3015 return ret; 3016 3017 ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len); 3018 if (ret < 0) 3019 netdev_err(dev->net, "MTU changed to %d from %d failed with %pe\n", 3020 new_mtu, netdev->mtu, ERR_PTR(ret)); 3021 else 3022 WRITE_ONCE(netdev->mtu, new_mtu); 3023 3024 usb_autopm_put_interface(dev->intf); 3025 3026 return ret; 3027 } 3028 3029 static int lan78xx_set_mac_addr(struct net_device *netdev, void *p) 3030 { 3031 struct lan78xx_net *dev = netdev_priv(netdev); 3032 struct sockaddr *addr = p; 3033 u32 addr_lo, addr_hi; 3034 int ret; 3035 3036 if (netif_running(netdev)) 3037 return -EBUSY; 3038 3039 if (!is_valid_ether_addr(addr->sa_data)) 3040 return -EADDRNOTAVAIL; 3041 3042 eth_hw_addr_set(netdev, addr->sa_data); 3043 3044 addr_lo = netdev->dev_addr[0] | 3045 netdev->dev_addr[1] << 8 | 3046 netdev->dev_addr[2] << 16 | 3047 netdev->dev_addr[3] << 24; 3048 addr_hi = netdev->dev_addr[4] | 3049 netdev->dev_addr[5] << 8; 3050 3051 ret = lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 3052 if (ret < 0) 3053 return ret; 3054 3055 ret = lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 3056 if (ret < 0) 3057 return ret; 3058 3059 /* Added to support MAC address changes */ 3060 ret = lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 3061 if (ret < 0) 3062 return ret; 3063 3064 return lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 3065 } 3066 3067 /* Enable or disable Rx checksum offload engine */ 3068 static int lan78xx_set_features(struct net_device *netdev, 3069 netdev_features_t features) 3070 { 3071 struct lan78xx_net *dev = netdev_priv(netdev); 3072 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3073 unsigned long flags; 3074 3075 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 3076 3077 if (features & NETIF_F_RXCSUM) { 3078 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_; 3079 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_; 3080 } else { 3081 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_); 3082 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_); 3083 } 3084 3085 if (features & NETIF_F_HW_VLAN_CTAG_RX) 3086 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_; 3087 else 3088 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_; 3089 3090 lan78xx_update_vlan_filter(pdata, netdev, features); 3091 3092 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 3093 3094 return lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3095 } 3096 3097 static int lan78xx_write_vlan_table(struct lan78xx_net *dev) 3098 { 3099 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3100 3101 return lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0, 3102 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table); 3103 } 3104 3105 static void lan78xx_deferred_vlan_write(struct work_struct *param) 3106 { 3107 struct lan78xx_priv *pdata = 3108 container_of(param, struct lan78xx_priv, set_vlan); 3109 3110 lan78xx_write_vlan_table(pdata->dev); 3111 } 3112 3113 static int lan78xx_vlan_rx_add_vid(struct net_device *netdev, 3114 __be16 proto, u16 vid) 3115 { 3116 struct lan78xx_net *dev = netdev_priv(netdev); 3117 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3118 u16 vid_bit_index; 3119 u16 vid_dword_index; 3120 3121 vid_dword_index = (vid >> 5) & 0x7F; 3122 vid_bit_index = vid & 0x1F; 3123 3124 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index); 3125 3126 /* defer register writes to a sleepable context */ 3127 schedule_work(&pdata->set_vlan); 3128 3129 return 0; 3130 } 3131 3132 static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev, 3133 __be16 proto, u16 vid) 3134 { 3135 struct lan78xx_net *dev = netdev_priv(netdev); 3136 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3137 u16 vid_bit_index; 3138 u16 vid_dword_index; 3139 3140 vid_dword_index = (vid >> 5) & 0x7F; 3141 vid_bit_index = vid & 0x1F; 3142 3143 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index); 3144 3145 /* defer register writes to a sleepable context */ 3146 schedule_work(&pdata->set_vlan); 3147 3148 return 0; 3149 } 3150 3151 static int lan78xx_init_ltm(struct lan78xx_net *dev) 3152 { 3153 u32 regs[6] = { 0 }; 3154 int ret; 3155 u32 buf; 3156 3157 /* LAN7850 is USB 2.0 and does not support LTM */ 3158 if (dev->chipid == ID_REV_CHIP_ID_7850_) 3159 return 0; 3160 3161 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 3162 if (ret < 0) 3163 goto init_ltm_failed; 3164 3165 if (buf & USB_CFG1_LTM_ENABLE_) { 3166 u8 temp[2]; 3167 /* Get values from EEPROM first */ 3168 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) { 3169 if (temp[0] == 24) { 3170 ret = lan78xx_read_raw_eeprom(dev, 3171 temp[1] * 2, 3172 24, 3173 (u8 *)regs); 3174 if (ret < 0) 3175 return ret; 3176 } 3177 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) { 3178 if (temp[0] == 24) { 3179 ret = lan78xx_read_raw_otp(dev, 3180 temp[1] * 2, 3181 24, 3182 (u8 *)regs); 3183 if (ret < 0) 3184 return ret; 3185 } 3186 } 3187 } 3188 3189 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 3190 if (ret < 0) 3191 goto init_ltm_failed; 3192 3193 ret = lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 3194 if (ret < 0) 3195 goto init_ltm_failed; 3196 3197 ret = lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 3198 if (ret < 0) 3199 goto init_ltm_failed; 3200 3201 ret = lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 3202 if (ret < 0) 3203 goto init_ltm_failed; 3204 3205 ret = lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 3206 if (ret < 0) 3207 goto init_ltm_failed; 3208 3209 ret = lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 3210 if (ret < 0) 3211 goto init_ltm_failed; 3212 3213 return 0; 3214 3215 init_ltm_failed: 3216 netdev_err(dev->net, "Failed to init LTM with error %pe\n", ERR_PTR(ret)); 3217 return ret; 3218 } 3219 3220 static int lan78xx_urb_config_init(struct lan78xx_net *dev) 3221 { 3222 int result = 0; 3223 3224 switch (dev->udev->speed) { 3225 case USB_SPEED_SUPER: 3226 dev->rx_urb_size = RX_SS_URB_SIZE; 3227 dev->tx_urb_size = TX_SS_URB_SIZE; 3228 dev->n_rx_urbs = RX_SS_URB_NUM; 3229 dev->n_tx_urbs = TX_SS_URB_NUM; 3230 dev->bulk_in_delay = SS_BULK_IN_DELAY; 3231 dev->burst_cap = SS_BURST_CAP_SIZE / SS_USB_PKT_SIZE; 3232 break; 3233 case USB_SPEED_HIGH: 3234 dev->rx_urb_size = RX_HS_URB_SIZE; 3235 dev->tx_urb_size = TX_HS_URB_SIZE; 3236 dev->n_rx_urbs = RX_HS_URB_NUM; 3237 dev->n_tx_urbs = TX_HS_URB_NUM; 3238 dev->bulk_in_delay = HS_BULK_IN_DELAY; 3239 dev->burst_cap = HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 3240 break; 3241 case USB_SPEED_FULL: 3242 dev->rx_urb_size = RX_FS_URB_SIZE; 3243 dev->tx_urb_size = TX_FS_URB_SIZE; 3244 dev->n_rx_urbs = RX_FS_URB_NUM; 3245 dev->n_tx_urbs = TX_FS_URB_NUM; 3246 dev->bulk_in_delay = FS_BULK_IN_DELAY; 3247 dev->burst_cap = FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 3248 break; 3249 default: 3250 netdev_warn(dev->net, "USB bus speed not supported\n"); 3251 result = -EIO; 3252 break; 3253 } 3254 3255 return result; 3256 } 3257 3258 static int lan78xx_reset(struct lan78xx_net *dev) 3259 { 3260 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3261 unsigned long timeout; 3262 int ret; 3263 u32 buf; 3264 3265 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3266 if (ret < 0) 3267 return ret; 3268 3269 buf |= HW_CFG_LRST_; 3270 3271 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3272 if (ret < 0) 3273 return ret; 3274 3275 timeout = jiffies + HZ; 3276 do { 3277 mdelay(1); 3278 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3279 if (ret < 0) 3280 return ret; 3281 3282 if (time_after(jiffies, timeout)) { 3283 netdev_warn(dev->net, 3284 "timeout on completion of LiteReset"); 3285 ret = -ETIMEDOUT; 3286 return ret; 3287 } 3288 } while (buf & HW_CFG_LRST_); 3289 3290 /* save DEVID for later usage */ 3291 ret = lan78xx_read_reg(dev, ID_REV, &buf); 3292 if (ret < 0) 3293 return ret; 3294 3295 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16; 3296 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_; 3297 3298 ret = lan78xx_init_mac_address(dev); 3299 if (ret < 0) 3300 return ret; 3301 3302 /* Respond to the IN token with a NAK */ 3303 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3304 if (ret < 0) 3305 return ret; 3306 3307 buf |= USB_CFG_BIR_; 3308 3309 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3310 if (ret < 0) 3311 return ret; 3312 3313 /* Init LTM */ 3314 ret = lan78xx_init_ltm(dev); 3315 if (ret < 0) 3316 return ret; 3317 3318 ret = lan78xx_write_reg(dev, BURST_CAP, dev->burst_cap); 3319 if (ret < 0) 3320 return ret; 3321 3322 ret = lan78xx_write_reg(dev, BULK_IN_DLY, dev->bulk_in_delay); 3323 if (ret < 0) 3324 return ret; 3325 3326 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 3327 if (ret < 0) 3328 return ret; 3329 3330 buf |= HW_CFG_MEF_; 3331 buf |= HW_CFG_CLK125_EN_; 3332 buf |= HW_CFG_REFCLK25_EN_; 3333 3334 ret = lan78xx_write_reg(dev, HW_CFG, buf); 3335 if (ret < 0) 3336 return ret; 3337 3338 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 3339 if (ret < 0) 3340 return ret; 3341 3342 buf |= USB_CFG_BCE_; 3343 3344 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 3345 if (ret < 0) 3346 return ret; 3347 3348 /* set FIFO sizes */ 3349 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 3350 3351 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf); 3352 if (ret < 0) 3353 return ret; 3354 3355 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 3356 3357 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf); 3358 if (ret < 0) 3359 return ret; 3360 3361 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 3362 if (ret < 0) 3363 return ret; 3364 3365 ret = lan78xx_write_reg(dev, FLOW, 0); 3366 if (ret < 0) 3367 return ret; 3368 3369 ret = lan78xx_write_reg(dev, FCT_FLOW, 0); 3370 if (ret < 0) 3371 return ret; 3372 3373 /* Don't need rfe_ctl_lock during initialisation */ 3374 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 3375 if (ret < 0) 3376 return ret; 3377 3378 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_; 3379 3380 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 3381 if (ret < 0) 3382 return ret; 3383 3384 /* Enable or disable checksum offload engines */ 3385 ret = lan78xx_set_features(dev->net, dev->net->features); 3386 if (ret < 0) 3387 return ret; 3388 3389 lan78xx_set_multicast(dev->net); 3390 3391 /* reset PHY */ 3392 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3393 if (ret < 0) 3394 return ret; 3395 3396 buf |= PMT_CTL_PHY_RST_; 3397 3398 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 3399 if (ret < 0) 3400 return ret; 3401 3402 timeout = jiffies + HZ; 3403 do { 3404 mdelay(1); 3405 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3406 if (ret < 0) 3407 return ret; 3408 3409 if (time_after(jiffies, timeout)) { 3410 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 3411 ret = -ETIMEDOUT; 3412 return ret; 3413 } 3414 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_)); 3415 3416 ret = lan78xx_read_reg(dev, MAC_CR, &buf); 3417 if (ret < 0) 3418 return ret; 3419 3420 buf &= ~(MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_ | MAC_CR_EEE_EN_); 3421 3422 /* LAN7801 only has RGMII mode */ 3423 if (dev->chipid == ID_REV_CHIP_ID_7801_) 3424 buf &= ~MAC_CR_GMII_EN_; 3425 3426 ret = lan78xx_write_reg(dev, MAC_CR, buf); 3427 if (ret < 0) 3428 return ret; 3429 3430 ret = lan78xx_set_rx_max_frame_length(dev, 3431 RX_MAX_FRAME_LEN(dev->net->mtu)); 3432 3433 return ret; 3434 } 3435 3436 static void lan78xx_init_stats(struct lan78xx_net *dev) 3437 { 3438 u32 *p; 3439 int i; 3440 3441 /* initialize for stats update 3442 * some counters are 20bits and some are 32bits 3443 */ 3444 p = (u32 *)&dev->stats.rollover_max; 3445 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++) 3446 p[i] = 0xFFFFF; 3447 3448 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF; 3449 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF; 3450 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF; 3451 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF; 3452 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF; 3453 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF; 3454 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF; 3455 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF; 3456 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF; 3457 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF; 3458 3459 set_bit(EVENT_STAT_UPDATE, &dev->flags); 3460 } 3461 3462 static int lan78xx_open(struct net_device *net) 3463 { 3464 struct lan78xx_net *dev = netdev_priv(net); 3465 int ret; 3466 3467 netif_dbg(dev, ifup, dev->net, "open device"); 3468 3469 ret = usb_autopm_get_interface(dev->intf); 3470 if (ret < 0) 3471 return ret; 3472 3473 mutex_lock(&dev->dev_mutex); 3474 3475 lan78xx_init_stats(dev); 3476 3477 napi_enable(&dev->napi); 3478 3479 set_bit(EVENT_DEV_OPEN, &dev->flags); 3480 3481 /* for Link Check */ 3482 if (dev->urb_intr) { 3483 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 3484 if (ret < 0) { 3485 netif_err(dev, ifup, dev->net, 3486 "intr submit %d\n", ret); 3487 goto done; 3488 } 3489 } 3490 3491 phylink_start(dev->phylink); 3492 3493 done: 3494 mutex_unlock(&dev->dev_mutex); 3495 3496 if (ret < 0) 3497 usb_autopm_put_interface(dev->intf); 3498 3499 return ret; 3500 } 3501 3502 static void lan78xx_terminate_urbs(struct lan78xx_net *dev) 3503 { 3504 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup); 3505 DECLARE_WAITQUEUE(wait, current); 3506 int temp; 3507 3508 /* ensure there are no more active urbs */ 3509 add_wait_queue(&unlink_wakeup, &wait); 3510 set_current_state(TASK_UNINTERRUPTIBLE); 3511 dev->wait = &unlink_wakeup; 3512 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq); 3513 3514 /* maybe wait for deletions to finish. */ 3515 while (!skb_queue_empty(&dev->rxq) || 3516 !skb_queue_empty(&dev->txq)) { 3517 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS)); 3518 set_current_state(TASK_UNINTERRUPTIBLE); 3519 netif_dbg(dev, ifdown, dev->net, 3520 "waited for %d urb completions", temp); 3521 } 3522 set_current_state(TASK_RUNNING); 3523 dev->wait = NULL; 3524 remove_wait_queue(&unlink_wakeup, &wait); 3525 3526 /* empty Rx done, Rx overflow and Tx pend queues 3527 */ 3528 while (!skb_queue_empty(&dev->rxq_done)) { 3529 struct sk_buff *skb = skb_dequeue(&dev->rxq_done); 3530 3531 lan78xx_release_rx_buf(dev, skb); 3532 } 3533 3534 skb_queue_purge(&dev->rxq_overflow); 3535 skb_queue_purge(&dev->txq_pend); 3536 } 3537 3538 static int lan78xx_stop(struct net_device *net) 3539 { 3540 struct lan78xx_net *dev = netdev_priv(net); 3541 3542 netif_dbg(dev, ifup, dev->net, "stop device"); 3543 3544 mutex_lock(&dev->dev_mutex); 3545 3546 if (timer_pending(&dev->stat_monitor)) 3547 timer_delete_sync(&dev->stat_monitor); 3548 3549 clear_bit(EVENT_DEV_OPEN, &dev->flags); 3550 napi_disable(&dev->napi); 3551 3552 lan78xx_terminate_urbs(dev); 3553 3554 netif_info(dev, ifdown, dev->net, 3555 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n", 3556 net->stats.rx_packets, net->stats.tx_packets, 3557 net->stats.rx_errors, net->stats.tx_errors); 3558 3559 phylink_stop(dev->phylink); 3560 3561 usb_kill_urb(dev->urb_intr); 3562 3563 /* deferred work (task, timer, softirq) must also stop. 3564 * can't flush_scheduled_work() until we drop rtnl (later), 3565 * else workers could deadlock; so make workers a NOP. 3566 */ 3567 clear_bit(EVENT_TX_HALT, &dev->flags); 3568 clear_bit(EVENT_RX_HALT, &dev->flags); 3569 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 3570 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 3571 3572 cancel_delayed_work_sync(&dev->wq); 3573 3574 usb_autopm_put_interface(dev->intf); 3575 3576 mutex_unlock(&dev->dev_mutex); 3577 3578 return 0; 3579 } 3580 3581 static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb, 3582 struct sk_buff_head *list, enum skb_state state) 3583 { 3584 unsigned long flags; 3585 enum skb_state old_state; 3586 struct skb_data *entry = (struct skb_data *)skb->cb; 3587 3588 spin_lock_irqsave(&list->lock, flags); 3589 old_state = entry->state; 3590 entry->state = state; 3591 3592 __skb_unlink(skb, list); 3593 spin_unlock(&list->lock); 3594 spin_lock(&dev->rxq_done.lock); 3595 3596 __skb_queue_tail(&dev->rxq_done, skb); 3597 if (skb_queue_len(&dev->rxq_done) == 1) 3598 napi_schedule(&dev->napi); 3599 3600 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 3601 3602 return old_state; 3603 } 3604 3605 static void tx_complete(struct urb *urb) 3606 { 3607 struct sk_buff *skb = (struct sk_buff *)urb->context; 3608 struct skb_data *entry = (struct skb_data *)skb->cb; 3609 struct lan78xx_net *dev = entry->dev; 3610 3611 if (urb->status == 0) { 3612 dev->net->stats.tx_packets += entry->num_of_packet; 3613 dev->net->stats.tx_bytes += entry->length; 3614 } else { 3615 dev->net->stats.tx_errors += entry->num_of_packet; 3616 3617 switch (urb->status) { 3618 case -EPIPE: 3619 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 3620 break; 3621 3622 /* software-driven interface shutdown */ 3623 case -ECONNRESET: 3624 case -ESHUTDOWN: 3625 netif_dbg(dev, tx_err, dev->net, 3626 "tx err interface gone %d\n", 3627 entry->urb->status); 3628 break; 3629 3630 case -EPROTO: 3631 case -ETIME: 3632 case -EILSEQ: 3633 netif_stop_queue(dev->net); 3634 netif_dbg(dev, tx_err, dev->net, 3635 "tx err queue stopped %d\n", 3636 entry->urb->status); 3637 break; 3638 default: 3639 netif_dbg(dev, tx_err, dev->net, 3640 "unknown tx err %d\n", 3641 entry->urb->status); 3642 break; 3643 } 3644 } 3645 3646 usb_autopm_put_interface_async(dev->intf); 3647 3648 skb_unlink(skb, &dev->txq); 3649 3650 lan78xx_release_tx_buf(dev, skb); 3651 3652 /* Re-schedule NAPI if Tx data pending but no URBs in progress. 3653 */ 3654 if (skb_queue_empty(&dev->txq) && 3655 !skb_queue_empty(&dev->txq_pend)) 3656 napi_schedule(&dev->napi); 3657 } 3658 3659 static void lan78xx_queue_skb(struct sk_buff_head *list, 3660 struct sk_buff *newsk, enum skb_state state) 3661 { 3662 struct skb_data *entry = (struct skb_data *)newsk->cb; 3663 3664 __skb_queue_tail(list, newsk); 3665 entry->state = state; 3666 } 3667 3668 static unsigned int lan78xx_tx_urb_space(struct lan78xx_net *dev) 3669 { 3670 return skb_queue_len(&dev->txq_free) * dev->tx_urb_size; 3671 } 3672 3673 static unsigned int lan78xx_tx_pend_data_len(struct lan78xx_net *dev) 3674 { 3675 return dev->tx_pend_data_len; 3676 } 3677 3678 static void lan78xx_tx_pend_skb_add(struct lan78xx_net *dev, 3679 struct sk_buff *skb, 3680 unsigned int *tx_pend_data_len) 3681 { 3682 unsigned long flags; 3683 3684 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3685 3686 __skb_queue_tail(&dev->txq_pend, skb); 3687 3688 dev->tx_pend_data_len += skb->len; 3689 *tx_pend_data_len = dev->tx_pend_data_len; 3690 3691 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3692 } 3693 3694 static void lan78xx_tx_pend_skb_head_add(struct lan78xx_net *dev, 3695 struct sk_buff *skb, 3696 unsigned int *tx_pend_data_len) 3697 { 3698 unsigned long flags; 3699 3700 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3701 3702 __skb_queue_head(&dev->txq_pend, skb); 3703 3704 dev->tx_pend_data_len += skb->len; 3705 *tx_pend_data_len = dev->tx_pend_data_len; 3706 3707 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3708 } 3709 3710 static void lan78xx_tx_pend_skb_get(struct lan78xx_net *dev, 3711 struct sk_buff **skb, 3712 unsigned int *tx_pend_data_len) 3713 { 3714 unsigned long flags; 3715 3716 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3717 3718 *skb = __skb_dequeue(&dev->txq_pend); 3719 if (*skb) 3720 dev->tx_pend_data_len -= (*skb)->len; 3721 *tx_pend_data_len = dev->tx_pend_data_len; 3722 3723 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3724 } 3725 3726 static netdev_tx_t 3727 lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net) 3728 { 3729 struct lan78xx_net *dev = netdev_priv(net); 3730 unsigned int tx_pend_data_len; 3731 3732 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) 3733 schedule_delayed_work(&dev->wq, 0); 3734 3735 skb_tx_timestamp(skb); 3736 3737 lan78xx_tx_pend_skb_add(dev, skb, &tx_pend_data_len); 3738 3739 /* Set up a Tx URB if none is in progress */ 3740 3741 if (skb_queue_empty(&dev->txq)) 3742 napi_schedule(&dev->napi); 3743 3744 /* Stop stack Tx queue if we have enough data to fill 3745 * all the free Tx URBs. 3746 */ 3747 if (tx_pend_data_len > lan78xx_tx_urb_space(dev)) { 3748 netif_stop_queue(net); 3749 3750 netif_dbg(dev, hw, dev->net, "tx data len: %u, urb space %u", 3751 tx_pend_data_len, lan78xx_tx_urb_space(dev)); 3752 3753 /* Kick off transmission of pending data */ 3754 3755 if (!skb_queue_empty(&dev->txq_free)) 3756 napi_schedule(&dev->napi); 3757 } 3758 3759 return NETDEV_TX_OK; 3760 } 3761 3762 static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf) 3763 { 3764 struct lan78xx_priv *pdata = NULL; 3765 int ret; 3766 int i; 3767 3768 dev->data[0] = (unsigned long) kzalloc_obj(*pdata); 3769 3770 pdata = (struct lan78xx_priv *)(dev->data[0]); 3771 if (!pdata) { 3772 netdev_warn(dev->net, "Unable to allocate lan78xx_priv"); 3773 return -ENOMEM; 3774 } 3775 3776 pdata->dev = dev; 3777 3778 spin_lock_init(&pdata->rfe_ctl_lock); 3779 mutex_init(&pdata->dataport_mutex); 3780 3781 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write); 3782 3783 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++) 3784 pdata->vlan_table[i] = 0; 3785 3786 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write); 3787 3788 dev->net->features = 0; 3789 3790 if (DEFAULT_TX_CSUM_ENABLE) 3791 dev->net->features |= NETIF_F_HW_CSUM; 3792 3793 if (DEFAULT_RX_CSUM_ENABLE) 3794 dev->net->features |= NETIF_F_RXCSUM; 3795 3796 if (DEFAULT_TSO_CSUM_ENABLE) 3797 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG; 3798 3799 if (DEFAULT_VLAN_RX_OFFLOAD) 3800 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX; 3801 3802 if (DEFAULT_VLAN_FILTER_ENABLE) 3803 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3804 3805 dev->net->hw_features = dev->net->features; 3806 3807 ret = lan78xx_setup_irq_domain(dev); 3808 if (ret < 0) { 3809 netdev_warn(dev->net, 3810 "lan78xx_setup_irq_domain() failed : %d", ret); 3811 goto out1; 3812 } 3813 3814 /* Init all registers */ 3815 ret = lan78xx_reset(dev); 3816 if (ret) { 3817 netdev_warn(dev->net, "Registers INIT FAILED...."); 3818 goto out2; 3819 } 3820 3821 ret = lan78xx_mdio_init(dev); 3822 if (ret) { 3823 netdev_warn(dev->net, "MDIO INIT FAILED....."); 3824 goto out2; 3825 } 3826 3827 dev->net->flags |= IFF_MULTICAST; 3828 3829 pdata->wol = WAKE_MAGIC; 3830 3831 return ret; 3832 3833 out2: 3834 lan78xx_remove_irq_domain(dev); 3835 3836 out1: 3837 netdev_warn(dev->net, "Bind routine FAILED"); 3838 cancel_work_sync(&pdata->set_multicast); 3839 cancel_work_sync(&pdata->set_vlan); 3840 kfree(pdata); 3841 return ret; 3842 } 3843 3844 static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf) 3845 { 3846 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3847 3848 lan78xx_remove_irq_domain(dev); 3849 3850 lan78xx_remove_mdio(dev); 3851 3852 if (pdata) { 3853 cancel_work_sync(&pdata->set_multicast); 3854 cancel_work_sync(&pdata->set_vlan); 3855 netif_dbg(dev, ifdown, dev->net, "free pdata"); 3856 kfree(pdata); 3857 pdata = NULL; 3858 dev->data[0] = 0; 3859 } 3860 } 3861 3862 static void lan78xx_rx_csum_offload(struct lan78xx_net *dev, 3863 struct sk_buff *skb, 3864 u32 rx_cmd_a, u32 rx_cmd_b) 3865 { 3866 /* HW Checksum offload appears to be flawed if used when not stripping 3867 * VLAN headers. Drop back to S/W checksums under these conditions. 3868 */ 3869 if (!(dev->net->features & NETIF_F_RXCSUM) || 3870 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) || 3871 unlikely(rx_cmd_a & RX_CMD_A_CSE_MASK_) || 3872 ((rx_cmd_a & RX_CMD_A_FVTG_) && 3873 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) { 3874 skb->ip_summed = CHECKSUM_NONE; 3875 } else { 3876 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_)); 3877 skb->ip_summed = CHECKSUM_COMPLETE; 3878 } 3879 } 3880 3881 static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev, 3882 struct sk_buff *skb, 3883 u32 rx_cmd_a, u32 rx_cmd_b) 3884 { 3885 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) && 3886 (rx_cmd_a & RX_CMD_A_FVTG_)) 3887 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 3888 (rx_cmd_b & 0xffff)); 3889 } 3890 3891 static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb) 3892 { 3893 dev->net->stats.rx_packets++; 3894 dev->net->stats.rx_bytes += skb->len; 3895 3896 skb->protocol = eth_type_trans(skb, dev->net); 3897 3898 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n", 3899 skb->len + sizeof(struct ethhdr), skb->protocol); 3900 memset(skb->cb, 0, sizeof(struct skb_data)); 3901 3902 if (skb_defer_rx_timestamp(skb)) 3903 return; 3904 3905 napi_gro_receive(&dev->napi, skb); 3906 } 3907 3908 static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb, 3909 int budget, int *work_done) 3910 { 3911 if (skb->len < RX_SKB_MIN_LEN) 3912 return 0; 3913 3914 /* Extract frames from the URB buffer and pass each one to 3915 * the stack in a new NAPI SKB. 3916 */ 3917 while (skb->len > 0) { 3918 u32 rx_cmd_a, rx_cmd_b, align_count, size; 3919 u16 rx_cmd_c; 3920 unsigned char *packet; 3921 3922 rx_cmd_a = get_unaligned_le32(skb->data); 3923 skb_pull(skb, sizeof(rx_cmd_a)); 3924 3925 rx_cmd_b = get_unaligned_le32(skb->data); 3926 skb_pull(skb, sizeof(rx_cmd_b)); 3927 3928 rx_cmd_c = get_unaligned_le16(skb->data); 3929 skb_pull(skb, sizeof(rx_cmd_c)); 3930 3931 packet = skb->data; 3932 3933 /* get the packet length */ 3934 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 3935 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 3936 3937 if (unlikely(size > skb->len)) { 3938 netif_dbg(dev, rx_err, dev->net, 3939 "size err rx_cmd_a=0x%08x\n", 3940 rx_cmd_a); 3941 return 0; 3942 } 3943 3944 if (unlikely(rx_cmd_a & RX_CMD_A_RED_) && 3945 (rx_cmd_a & RX_CMD_A_RX_HARD_ERRS_MASK_)) { 3946 netif_dbg(dev, rx_err, dev->net, 3947 "Error rx_cmd_a=0x%08x", rx_cmd_a); 3948 } else { 3949 u32 frame_len; 3950 struct sk_buff *skb2; 3951 3952 if (unlikely(size < ETH_FCS_LEN)) { 3953 netif_dbg(dev, rx_err, dev->net, 3954 "size err rx_cmd_a=0x%08x\n", 3955 rx_cmd_a); 3956 return 0; 3957 } 3958 3959 frame_len = size - ETH_FCS_LEN; 3960 3961 skb2 = napi_alloc_skb(&dev->napi, frame_len); 3962 if (!skb2) 3963 return 0; 3964 3965 memcpy(skb2->data, packet, frame_len); 3966 3967 skb_put(skb2, frame_len); 3968 3969 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3970 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3971 3972 /* Processing of the URB buffer must complete once 3973 * it has started. If the NAPI work budget is exhausted 3974 * while frames remain they are added to the overflow 3975 * queue for delivery in the next NAPI polling cycle. 3976 */ 3977 if (*work_done < budget) { 3978 lan78xx_skb_return(dev, skb2); 3979 ++(*work_done); 3980 } else { 3981 skb_queue_tail(&dev->rxq_overflow, skb2); 3982 } 3983 } 3984 3985 skb_pull(skb, size); 3986 3987 /* skip padding bytes before the next frame starts */ 3988 if (skb->len) 3989 skb_pull(skb, align_count); 3990 } 3991 3992 return 1; 3993 } 3994 3995 static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb, 3996 int budget, int *work_done) 3997 { 3998 if (!lan78xx_rx(dev, skb, budget, work_done)) { 3999 netif_dbg(dev, rx_err, dev->net, "drop\n"); 4000 dev->net->stats.rx_errors++; 4001 } 4002 } 4003 4004 static void rx_complete(struct urb *urb) 4005 { 4006 struct sk_buff *skb = (struct sk_buff *)urb->context; 4007 struct skb_data *entry = (struct skb_data *)skb->cb; 4008 struct lan78xx_net *dev = entry->dev; 4009 int urb_status = urb->status; 4010 enum skb_state state; 4011 4012 netif_dbg(dev, rx_status, dev->net, 4013 "rx done: status %d", urb->status); 4014 4015 skb_put(skb, urb->actual_length); 4016 state = rx_done; 4017 4018 if (urb != entry->urb) 4019 netif_warn(dev, rx_err, dev->net, "URB pointer mismatch"); 4020 4021 switch (urb_status) { 4022 case 0: 4023 if (skb->len < RX_SKB_MIN_LEN) { 4024 state = rx_cleanup; 4025 dev->net->stats.rx_errors++; 4026 dev->net->stats.rx_length_errors++; 4027 netif_dbg(dev, rx_err, dev->net, 4028 "rx length %d\n", skb->len); 4029 } 4030 usb_mark_last_busy(dev->udev); 4031 break; 4032 case -EPIPE: 4033 dev->net->stats.rx_errors++; 4034 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4035 fallthrough; 4036 case -ECONNRESET: /* async unlink */ 4037 case -ESHUTDOWN: /* hardware gone */ 4038 netif_dbg(dev, ifdown, dev->net, 4039 "rx shutdown, code %d\n", urb_status); 4040 state = rx_cleanup; 4041 break; 4042 case -EPROTO: 4043 case -ETIME: 4044 case -EILSEQ: 4045 dev->net->stats.rx_errors++; 4046 state = rx_cleanup; 4047 break; 4048 4049 /* data overrun ... flush fifo? */ 4050 case -EOVERFLOW: 4051 dev->net->stats.rx_over_errors++; 4052 fallthrough; 4053 4054 default: 4055 state = rx_cleanup; 4056 dev->net->stats.rx_errors++; 4057 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); 4058 break; 4059 } 4060 4061 state = defer_bh(dev, skb, &dev->rxq, state); 4062 } 4063 4064 static int rx_submit(struct lan78xx_net *dev, struct sk_buff *skb, gfp_t flags) 4065 { 4066 struct skb_data *entry = (struct skb_data *)skb->cb; 4067 size_t size = dev->rx_urb_size; 4068 struct urb *urb = entry->urb; 4069 unsigned long lockflags; 4070 int ret = 0; 4071 4072 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in, 4073 skb->data, size, rx_complete, skb); 4074 4075 spin_lock_irqsave(&dev->rxq.lock, lockflags); 4076 4077 if (netif_device_present(dev->net) && 4078 netif_running(dev->net) && 4079 !test_bit(EVENT_RX_HALT, &dev->flags) && 4080 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4081 ret = usb_submit_urb(urb, flags); 4082 switch (ret) { 4083 case 0: 4084 lan78xx_queue_skb(&dev->rxq, skb, rx_start); 4085 break; 4086 case -EPIPE: 4087 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 4088 break; 4089 case -ENODEV: 4090 case -ENOENT: 4091 netif_dbg(dev, ifdown, dev->net, "device gone\n"); 4092 netif_device_detach(dev->net); 4093 break; 4094 case -EHOSTUNREACH: 4095 ret = -ENOLINK; 4096 napi_schedule(&dev->napi); 4097 break; 4098 default: 4099 netif_dbg(dev, rx_err, dev->net, 4100 "rx submit, %d\n", ret); 4101 napi_schedule(&dev->napi); 4102 break; 4103 } 4104 } else { 4105 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); 4106 ret = -ENOLINK; 4107 } 4108 spin_unlock_irqrestore(&dev->rxq.lock, lockflags); 4109 4110 if (ret) 4111 lan78xx_release_rx_buf(dev, skb); 4112 4113 return ret; 4114 } 4115 4116 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev) 4117 { 4118 struct sk_buff *rx_buf; 4119 4120 /* Ensure the maximum number of Rx URBs is submitted 4121 */ 4122 while ((rx_buf = lan78xx_get_rx_buf(dev)) != NULL) { 4123 if (rx_submit(dev, rx_buf, GFP_ATOMIC) != 0) 4124 break; 4125 } 4126 } 4127 4128 static void lan78xx_rx_urb_resubmit(struct lan78xx_net *dev, 4129 struct sk_buff *rx_buf) 4130 { 4131 /* reset SKB data pointers */ 4132 4133 rx_buf->data = rx_buf->head; 4134 skb_reset_tail_pointer(rx_buf); 4135 rx_buf->len = 0; 4136 rx_buf->data_len = 0; 4137 4138 rx_submit(dev, rx_buf, GFP_ATOMIC); 4139 } 4140 4141 static void lan78xx_fill_tx_cmd_words(struct sk_buff *skb, u8 *buffer) 4142 { 4143 u32 tx_cmd_a; 4144 u32 tx_cmd_b; 4145 4146 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_; 4147 4148 if (skb->ip_summed == CHECKSUM_PARTIAL) 4149 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_; 4150 4151 tx_cmd_b = 0; 4152 if (skb_is_gso(skb)) { 4153 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_); 4154 4155 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_; 4156 4157 tx_cmd_a |= TX_CMD_A_LSO_; 4158 } 4159 4160 if (skb_vlan_tag_present(skb)) { 4161 tx_cmd_a |= TX_CMD_A_IVTG_; 4162 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_; 4163 } 4164 4165 put_unaligned_le32(tx_cmd_a, buffer); 4166 put_unaligned_le32(tx_cmd_b, buffer + 4); 4167 } 4168 4169 static struct skb_data *lan78xx_tx_buf_fill(struct lan78xx_net *dev, 4170 struct sk_buff *tx_buf) 4171 { 4172 struct skb_data *entry = (struct skb_data *)tx_buf->cb; 4173 int remain = dev->tx_urb_size; 4174 u8 *tx_data = tx_buf->data; 4175 u32 urb_len = 0; 4176 4177 entry->num_of_packet = 0; 4178 entry->length = 0; 4179 4180 /* Work through the pending SKBs and copy the data of each SKB into 4181 * the URB buffer if there room for all the SKB data. 4182 * 4183 * There must be at least DST+SRC+TYPE in the SKB (with padding enabled) 4184 */ 4185 while (remain >= TX_SKB_MIN_LEN) { 4186 unsigned int pending_bytes; 4187 unsigned int align_bytes; 4188 struct sk_buff *skb; 4189 unsigned int len; 4190 4191 lan78xx_tx_pend_skb_get(dev, &skb, &pending_bytes); 4192 4193 if (!skb) 4194 break; 4195 4196 align_bytes = (TX_ALIGNMENT - (urb_len % TX_ALIGNMENT)) % 4197 TX_ALIGNMENT; 4198 len = align_bytes + TX_CMD_LEN + skb->len; 4199 if (len > remain) { 4200 lan78xx_tx_pend_skb_head_add(dev, skb, &pending_bytes); 4201 break; 4202 } 4203 4204 tx_data += align_bytes; 4205 4206 lan78xx_fill_tx_cmd_words(skb, tx_data); 4207 tx_data += TX_CMD_LEN; 4208 4209 len = skb->len; 4210 if (skb_copy_bits(skb, 0, tx_data, len) < 0) { 4211 struct net_device_stats *stats = &dev->net->stats; 4212 4213 stats->tx_dropped++; 4214 dev_kfree_skb_any(skb); 4215 tx_data -= TX_CMD_LEN; 4216 continue; 4217 } 4218 4219 tx_data += len; 4220 entry->length += max_t(unsigned int, len, ETH_ZLEN); 4221 entry->num_of_packet += skb_shinfo(skb)->gso_segs ?: 1; 4222 4223 dev_kfree_skb_any(skb); 4224 4225 urb_len = (u32)(tx_data - (u8 *)tx_buf->data); 4226 4227 remain = dev->tx_urb_size - urb_len; 4228 } 4229 4230 skb_put(tx_buf, urb_len); 4231 4232 return entry; 4233 } 4234 4235 static void lan78xx_tx_bh(struct lan78xx_net *dev) 4236 { 4237 int ret; 4238 4239 /* Start the stack Tx queue if it was stopped 4240 */ 4241 netif_tx_lock(dev->net); 4242 if (netif_queue_stopped(dev->net)) { 4243 if (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev)) 4244 netif_wake_queue(dev->net); 4245 } 4246 netif_tx_unlock(dev->net); 4247 4248 /* Go through the Tx pending queue and set up URBs to transfer 4249 * the data to the device. Stop if no more pending data or URBs, 4250 * or if an error occurs when a URB is submitted. 4251 */ 4252 do { 4253 struct skb_data *entry; 4254 struct sk_buff *tx_buf; 4255 unsigned long flags; 4256 4257 if (skb_queue_empty(&dev->txq_pend)) 4258 break; 4259 4260 tx_buf = lan78xx_get_tx_buf(dev); 4261 if (!tx_buf) 4262 break; 4263 4264 entry = lan78xx_tx_buf_fill(dev, tx_buf); 4265 4266 spin_lock_irqsave(&dev->txq.lock, flags); 4267 ret = usb_autopm_get_interface_async(dev->intf); 4268 if (ret < 0) { 4269 spin_unlock_irqrestore(&dev->txq.lock, flags); 4270 goto out; 4271 } 4272 4273 usb_fill_bulk_urb(entry->urb, dev->udev, dev->pipe_out, 4274 tx_buf->data, tx_buf->len, tx_complete, 4275 tx_buf); 4276 4277 if (tx_buf->len % dev->maxpacket == 0) { 4278 /* send USB_ZERO_PACKET */ 4279 entry->urb->transfer_flags |= URB_ZERO_PACKET; 4280 } 4281 4282 #ifdef CONFIG_PM 4283 /* if device is asleep stop outgoing packet processing */ 4284 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4285 usb_anchor_urb(entry->urb, &dev->deferred); 4286 netif_stop_queue(dev->net); 4287 spin_unlock_irqrestore(&dev->txq.lock, flags); 4288 netdev_dbg(dev->net, 4289 "Delaying transmission for resumption\n"); 4290 return; 4291 } 4292 #endif 4293 ret = usb_submit_urb(entry->urb, GFP_ATOMIC); 4294 switch (ret) { 4295 case 0: 4296 netif_trans_update(dev->net); 4297 lan78xx_queue_skb(&dev->txq, tx_buf, tx_start); 4298 break; 4299 case -EPIPE: 4300 netif_stop_queue(dev->net); 4301 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 4302 usb_autopm_put_interface_async(dev->intf); 4303 break; 4304 case -ENODEV: 4305 case -ENOENT: 4306 netif_dbg(dev, tx_err, dev->net, 4307 "tx submit urb err %d (disconnected?)", ret); 4308 netif_device_detach(dev->net); 4309 break; 4310 default: 4311 usb_autopm_put_interface_async(dev->intf); 4312 netif_dbg(dev, tx_err, dev->net, 4313 "tx submit urb err %d\n", ret); 4314 break; 4315 } 4316 4317 spin_unlock_irqrestore(&dev->txq.lock, flags); 4318 4319 if (ret) { 4320 netdev_warn(dev->net, "failed to tx urb %d\n", ret); 4321 out: 4322 dev->net->stats.tx_dropped += entry->num_of_packet; 4323 lan78xx_release_tx_buf(dev, tx_buf); 4324 } 4325 } while (ret == 0); 4326 } 4327 4328 static int lan78xx_bh(struct lan78xx_net *dev, int budget) 4329 { 4330 struct sk_buff_head done; 4331 struct sk_buff *rx_buf; 4332 struct skb_data *entry; 4333 unsigned long flags; 4334 int work_done = 0; 4335 4336 /* Pass frames received in the last NAPI cycle before 4337 * working on newly completed URBs. 4338 */ 4339 while (!skb_queue_empty(&dev->rxq_overflow)) { 4340 lan78xx_skb_return(dev, skb_dequeue(&dev->rxq_overflow)); 4341 ++work_done; 4342 } 4343 4344 /* Take a snapshot of the done queue and move items to a 4345 * temporary queue. Rx URB completions will continue to add 4346 * to the done queue. 4347 */ 4348 __skb_queue_head_init(&done); 4349 4350 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4351 skb_queue_splice_init(&dev->rxq_done, &done); 4352 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4353 4354 /* Extract receive frames from completed URBs and 4355 * pass them to the stack. Re-submit each completed URB. 4356 */ 4357 while ((work_done < budget) && 4358 (rx_buf = __skb_dequeue(&done))) { 4359 entry = (struct skb_data *)(rx_buf->cb); 4360 switch (entry->state) { 4361 case rx_done: 4362 rx_process(dev, rx_buf, budget, &work_done); 4363 break; 4364 case rx_cleanup: 4365 break; 4366 default: 4367 netdev_dbg(dev->net, "rx buf state %d\n", 4368 entry->state); 4369 break; 4370 } 4371 4372 lan78xx_rx_urb_resubmit(dev, rx_buf); 4373 } 4374 4375 /* If budget was consumed before processing all the URBs put them 4376 * back on the front of the done queue. They will be first to be 4377 * processed in the next NAPI cycle. 4378 */ 4379 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4380 skb_queue_splice(&done, &dev->rxq_done); 4381 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4382 4383 if (netif_device_present(dev->net) && netif_running(dev->net)) { 4384 /* reset update timer delta */ 4385 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) { 4386 dev->delta = 1; 4387 mod_timer(&dev->stat_monitor, 4388 jiffies + STAT_UPDATE_TIMER); 4389 } 4390 4391 /* Submit all free Rx URBs */ 4392 4393 if (!test_bit(EVENT_RX_HALT, &dev->flags)) 4394 lan78xx_rx_urb_submit_all(dev); 4395 4396 /* Submit new Tx URBs */ 4397 4398 lan78xx_tx_bh(dev); 4399 } 4400 4401 return work_done; 4402 } 4403 4404 static int lan78xx_poll(struct napi_struct *napi, int budget) 4405 { 4406 struct lan78xx_net *dev = container_of(napi, struct lan78xx_net, napi); 4407 int result = budget; 4408 int work_done; 4409 4410 /* Don't do any work if the device is suspended */ 4411 4412 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4413 napi_complete_done(napi, 0); 4414 return 0; 4415 } 4416 4417 /* Process completed URBs and submit new URBs */ 4418 4419 work_done = lan78xx_bh(dev, budget); 4420 4421 if (work_done < budget) { 4422 napi_complete_done(napi, work_done); 4423 4424 /* Start a new polling cycle if data was received or 4425 * data is waiting to be transmitted. 4426 */ 4427 if (!skb_queue_empty(&dev->rxq_done)) { 4428 napi_schedule(napi); 4429 } else if (netif_carrier_ok(dev->net)) { 4430 if (skb_queue_empty(&dev->txq) && 4431 !skb_queue_empty(&dev->txq_pend)) { 4432 napi_schedule(napi); 4433 } else { 4434 netif_tx_lock(dev->net); 4435 if (netif_queue_stopped(dev->net)) { 4436 netif_wake_queue(dev->net); 4437 napi_schedule(napi); 4438 } 4439 netif_tx_unlock(dev->net); 4440 } 4441 } 4442 result = work_done; 4443 } 4444 4445 return result; 4446 } 4447 4448 static void lan78xx_delayedwork(struct work_struct *work) 4449 { 4450 int status; 4451 struct lan78xx_net *dev; 4452 4453 dev = container_of(work, struct lan78xx_net, wq.work); 4454 4455 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 4456 return; 4457 4458 if (usb_autopm_get_interface(dev->intf) < 0) 4459 return; 4460 4461 if (test_bit(EVENT_TX_HALT, &dev->flags)) { 4462 unlink_urbs(dev, &dev->txq); 4463 4464 status = usb_clear_halt(dev->udev, dev->pipe_out); 4465 if (status < 0 && 4466 status != -EPIPE && 4467 status != -ESHUTDOWN) { 4468 if (netif_msg_tx_err(dev)) 4469 netdev_err(dev->net, 4470 "can't clear tx halt, status %d\n", 4471 status); 4472 } else { 4473 clear_bit(EVENT_TX_HALT, &dev->flags); 4474 if (status != -ESHUTDOWN) 4475 netif_wake_queue(dev->net); 4476 } 4477 } 4478 4479 if (test_bit(EVENT_RX_HALT, &dev->flags)) { 4480 unlink_urbs(dev, &dev->rxq); 4481 status = usb_clear_halt(dev->udev, dev->pipe_in); 4482 if (status < 0 && 4483 status != -EPIPE && 4484 status != -ESHUTDOWN) { 4485 if (netif_msg_rx_err(dev)) 4486 netdev_err(dev->net, 4487 "can't clear rx halt, status %d\n", 4488 status); 4489 } else { 4490 clear_bit(EVENT_RX_HALT, &dev->flags); 4491 napi_schedule(&dev->napi); 4492 } 4493 } 4494 4495 if (test_bit(EVENT_PHY_INT_ACK, &dev->flags)) { 4496 int ret = 0; 4497 4498 clear_bit(EVENT_PHY_INT_ACK, &dev->flags); 4499 ret = lan78xx_phy_int_ack(dev); 4500 if (ret) 4501 netdev_info(dev->net, "PHY INT ack failed (%pe)\n", 4502 ERR_PTR(ret)); 4503 } 4504 4505 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) { 4506 lan78xx_update_stats(dev); 4507 4508 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 4509 4510 mod_timer(&dev->stat_monitor, 4511 jiffies + (STAT_UPDATE_TIMER * dev->delta)); 4512 4513 dev->delta = min((dev->delta * 2), 50); 4514 } 4515 4516 usb_autopm_put_interface(dev->intf); 4517 } 4518 4519 static void intr_complete(struct urb *urb) 4520 { 4521 struct lan78xx_net *dev = urb->context; 4522 int status = urb->status; 4523 4524 switch (status) { 4525 /* success */ 4526 case 0: 4527 lan78xx_status(dev, urb); 4528 break; 4529 4530 /* software-driven interface shutdown */ 4531 case -ENOENT: /* urb killed */ 4532 case -ENODEV: /* hardware gone */ 4533 case -ESHUTDOWN: /* hardware gone */ 4534 netif_dbg(dev, ifdown, dev->net, 4535 "intr shutdown, code %d\n", status); 4536 return; 4537 4538 /* NOTE: not throttling like RX/TX, since this endpoint 4539 * already polls infrequently 4540 */ 4541 default: 4542 netdev_dbg(dev->net, "intr status %d\n", status); 4543 break; 4544 } 4545 4546 if (!netif_device_present(dev->net) || 4547 !netif_running(dev->net)) { 4548 netdev_warn(dev->net, "not submitting new status URB"); 4549 return; 4550 } 4551 4552 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length); 4553 status = usb_submit_urb(urb, GFP_ATOMIC); 4554 4555 switch (status) { 4556 case 0: 4557 break; 4558 case -ENODEV: 4559 case -ENOENT: 4560 netif_dbg(dev, timer, dev->net, 4561 "intr resubmit %d (disconnect?)", status); 4562 netif_device_detach(dev->net); 4563 break; 4564 default: 4565 netif_err(dev, timer, dev->net, 4566 "intr resubmit --> %d\n", status); 4567 break; 4568 } 4569 } 4570 4571 static void lan78xx_disconnect(struct usb_interface *intf) 4572 { 4573 struct lan78xx_net *dev; 4574 struct net_device *net; 4575 4576 dev = usb_get_intfdata(intf); 4577 usb_set_intfdata(intf, NULL); 4578 if (!dev) 4579 return; 4580 4581 net = dev->net; 4582 4583 rtnl_lock(); 4584 phylink_stop(dev->phylink); 4585 phylink_disconnect_phy(dev->phylink); 4586 rtnl_unlock(); 4587 4588 unregister_netdev(net); 4589 4590 timer_shutdown_sync(&dev->stat_monitor); 4591 set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4592 cancel_delayed_work_sync(&dev->wq); 4593 4594 phylink_destroy(dev->phylink); 4595 4596 usb_scuttle_anchored_urbs(&dev->deferred); 4597 4598 lan78xx_unbind(dev, intf); 4599 4600 lan78xx_free_tx_resources(dev); 4601 lan78xx_free_rx_resources(dev); 4602 4603 usb_kill_urb(dev->urb_intr); 4604 usb_free_urb(dev->urb_intr); 4605 4606 free_netdev(net); 4607 } 4608 4609 static void lan78xx_tx_timeout(struct net_device *net, unsigned int txqueue) 4610 { 4611 struct lan78xx_net *dev = netdev_priv(net); 4612 4613 unlink_urbs(dev, &dev->txq); 4614 napi_schedule(&dev->napi); 4615 } 4616 4617 static netdev_features_t lan78xx_features_check(struct sk_buff *skb, 4618 struct net_device *netdev, 4619 netdev_features_t features) 4620 { 4621 struct lan78xx_net *dev = netdev_priv(netdev); 4622 4623 if (skb->len > LAN78XX_TSO_SIZE(dev)) 4624 features &= ~NETIF_F_GSO_MASK; 4625 4626 features = vlan_features_check(skb, features); 4627 features = vxlan_features_check(skb, features); 4628 4629 return features; 4630 } 4631 4632 static const struct net_device_ops lan78xx_netdev_ops = { 4633 .ndo_open = lan78xx_open, 4634 .ndo_stop = lan78xx_stop, 4635 .ndo_start_xmit = lan78xx_start_xmit, 4636 .ndo_tx_timeout = lan78xx_tx_timeout, 4637 .ndo_change_mtu = lan78xx_change_mtu, 4638 .ndo_set_mac_address = lan78xx_set_mac_addr, 4639 .ndo_validate_addr = eth_validate_addr, 4640 .ndo_eth_ioctl = phy_do_ioctl_running, 4641 .ndo_set_rx_mode = lan78xx_set_multicast, 4642 .ndo_set_features = lan78xx_set_features, 4643 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid, 4644 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid, 4645 .ndo_features_check = lan78xx_features_check, 4646 }; 4647 4648 static void lan78xx_stat_monitor(struct timer_list *t) 4649 { 4650 struct lan78xx_net *dev = timer_container_of(dev, t, stat_monitor); 4651 4652 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE); 4653 } 4654 4655 static int lan78xx_probe(struct usb_interface *intf, 4656 const struct usb_device_id *id) 4657 { 4658 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr; 4659 struct lan78xx_net *dev; 4660 struct net_device *netdev; 4661 struct usb_device *udev; 4662 int ret; 4663 unsigned int maxp; 4664 unsigned int period; 4665 u8 *buf = NULL; 4666 4667 udev = interface_to_usbdev(intf); 4668 4669 netdev = alloc_etherdev(sizeof(struct lan78xx_net)); 4670 if (!netdev) { 4671 dev_err(&intf->dev, "Error: OOM\n"); 4672 return -ENOMEM; 4673 } 4674 4675 SET_NETDEV_DEV(netdev, &intf->dev); 4676 4677 dev = netdev_priv(netdev); 4678 dev->udev = udev; 4679 dev->intf = intf; 4680 dev->net = netdev; 4681 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV 4682 | NETIF_MSG_PROBE | NETIF_MSG_LINK); 4683 4684 skb_queue_head_init(&dev->rxq); 4685 skb_queue_head_init(&dev->txq); 4686 skb_queue_head_init(&dev->rxq_done); 4687 skb_queue_head_init(&dev->txq_pend); 4688 skb_queue_head_init(&dev->rxq_overflow); 4689 mutex_init(&dev->mdiobus_mutex); 4690 mutex_init(&dev->dev_mutex); 4691 4692 ret = lan78xx_urb_config_init(dev); 4693 if (ret < 0) 4694 goto out2; 4695 4696 ret = lan78xx_alloc_tx_resources(dev); 4697 if (ret < 0) 4698 goto out2; 4699 4700 ret = lan78xx_alloc_rx_resources(dev); 4701 if (ret < 0) 4702 goto out3; 4703 4704 /* MTU range: 68 - 9000 */ 4705 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE; 4706 4707 netif_set_tso_max_size(netdev, LAN78XX_TSO_SIZE(dev)); 4708 4709 netif_napi_add(netdev, &dev->napi, lan78xx_poll); 4710 4711 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork); 4712 init_usb_anchor(&dev->deferred); 4713 4714 netdev->netdev_ops = &lan78xx_netdev_ops; 4715 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES; 4716 netdev->ethtool_ops = &lan78xx_ethtool_ops; 4717 4718 dev->delta = 1; 4719 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0); 4720 4721 mutex_init(&dev->stats.access_lock); 4722 4723 if (intf->cur_altsetting->desc.bNumEndpoints < 3) { 4724 ret = -ENODEV; 4725 goto out4; 4726 } 4727 4728 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE); 4729 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in); 4730 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) { 4731 ret = -ENODEV; 4732 goto out4; 4733 } 4734 4735 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE); 4736 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out); 4737 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) { 4738 ret = -ENODEV; 4739 goto out4; 4740 } 4741 4742 ep_intr = &intf->cur_altsetting->endpoint[2]; 4743 if (!usb_endpoint_is_int_in(&ep_intr->desc)) { 4744 ret = -ENODEV; 4745 goto out4; 4746 } 4747 4748 dev->pipe_intr = usb_rcvintpipe(dev->udev, 4749 usb_endpoint_num(&ep_intr->desc)); 4750 4751 ret = lan78xx_bind(dev, intf); 4752 if (ret < 0) 4753 goto out4; 4754 4755 period = ep_intr->desc.bInterval; 4756 maxp = usb_maxpacket(dev->udev, dev->pipe_intr); 4757 4758 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL); 4759 if (!dev->urb_intr) { 4760 ret = -ENOMEM; 4761 goto out5; 4762 } 4763 4764 buf = kmalloc(maxp, GFP_KERNEL); 4765 if (!buf) { 4766 ret = -ENOMEM; 4767 goto free_urbs; 4768 } 4769 4770 usb_fill_int_urb(dev->urb_intr, dev->udev, 4771 dev->pipe_intr, buf, maxp, 4772 intr_complete, dev, period); 4773 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER; 4774 4775 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out); 4776 4777 /* Reject broken descriptors. */ 4778 if (dev->maxpacket == 0) { 4779 ret = -ENODEV; 4780 goto free_urbs; 4781 } 4782 4783 /* driver requires remote-wakeup capability during autosuspend. */ 4784 intf->needs_remote_wakeup = 1; 4785 4786 ret = lan78xx_phy_init(dev); 4787 if (ret < 0) 4788 goto free_urbs; 4789 4790 ret = register_netdev(netdev); 4791 if (ret != 0) { 4792 netif_err(dev, probe, netdev, "couldn't register the device\n"); 4793 goto phy_uninit; 4794 } 4795 4796 usb_set_intfdata(intf, dev); 4797 4798 ret = device_set_wakeup_enable(&udev->dev, true); 4799 4800 /* Default delay of 2sec has more overhead than advantage. 4801 * Set to 10sec as default. 4802 */ 4803 pm_runtime_set_autosuspend_delay(&udev->dev, 4804 DEFAULT_AUTOSUSPEND_DELAY); 4805 4806 return 0; 4807 4808 phy_uninit: 4809 lan78xx_phy_uninit(dev); 4810 free_urbs: 4811 usb_free_urb(dev->urb_intr); 4812 out5: 4813 lan78xx_unbind(dev, intf); 4814 out4: 4815 netif_napi_del(&dev->napi); 4816 lan78xx_free_rx_resources(dev); 4817 out3: 4818 lan78xx_free_tx_resources(dev); 4819 out2: 4820 free_netdev(netdev); 4821 4822 return ret; 4823 } 4824 4825 static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len) 4826 { 4827 const u16 crc16poly = 0x8005; 4828 int i; 4829 u16 bit, crc, msb; 4830 u8 data; 4831 4832 crc = 0xFFFF; 4833 for (i = 0; i < len; i++) { 4834 data = *buf++; 4835 for (bit = 0; bit < 8; bit++) { 4836 msb = crc >> 15; 4837 crc <<= 1; 4838 4839 if (msb ^ (u16)(data & 1)) { 4840 crc ^= crc16poly; 4841 crc |= (u16)0x0001U; 4842 } 4843 data >>= 1; 4844 } 4845 } 4846 4847 return crc; 4848 } 4849 4850 static int lan78xx_set_auto_suspend(struct lan78xx_net *dev) 4851 { 4852 u32 buf; 4853 int ret; 4854 4855 ret = lan78xx_stop_tx_path(dev); 4856 if (ret < 0) 4857 return ret; 4858 4859 ret = lan78xx_stop_rx_path(dev); 4860 if (ret < 0) 4861 return ret; 4862 4863 /* auto suspend (selective suspend) */ 4864 4865 ret = lan78xx_write_reg(dev, WUCSR, 0); 4866 if (ret < 0) 4867 return ret; 4868 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4869 if (ret < 0) 4870 return ret; 4871 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4872 if (ret < 0) 4873 return ret; 4874 4875 /* set goodframe wakeup */ 4876 4877 ret = lan78xx_read_reg(dev, WUCSR, &buf); 4878 if (ret < 0) 4879 return ret; 4880 4881 buf |= WUCSR_RFE_WAKE_EN_; 4882 buf |= WUCSR_STORE_WAKE_; 4883 4884 ret = lan78xx_write_reg(dev, WUCSR, buf); 4885 if (ret < 0) 4886 return ret; 4887 4888 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4889 if (ret < 0) 4890 return ret; 4891 4892 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 4893 buf |= PMT_CTL_RES_CLR_WKP_STS_; 4894 buf |= PMT_CTL_PHY_WAKE_EN_; 4895 buf |= PMT_CTL_WOL_EN_; 4896 buf &= ~PMT_CTL_SUS_MODE_MASK_; 4897 buf |= PMT_CTL_SUS_MODE_3_; 4898 4899 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4900 if (ret < 0) 4901 return ret; 4902 4903 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4904 if (ret < 0) 4905 return ret; 4906 4907 buf |= PMT_CTL_WUPS_MASK_; 4908 4909 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4910 if (ret < 0) 4911 return ret; 4912 4913 ret = lan78xx_start_rx_path(dev); 4914 4915 return ret; 4916 } 4917 4918 static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol) 4919 { 4920 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 4921 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 4922 const u8 arp_type[2] = { 0x08, 0x06 }; 4923 u32 temp_pmt_ctl; 4924 int mask_index; 4925 u32 temp_wucsr; 4926 u32 buf; 4927 u16 crc; 4928 int ret; 4929 4930 ret = lan78xx_stop_tx_path(dev); 4931 if (ret < 0) 4932 return ret; 4933 ret = lan78xx_stop_rx_path(dev); 4934 if (ret < 0) 4935 return ret; 4936 4937 ret = lan78xx_write_reg(dev, WUCSR, 0); 4938 if (ret < 0) 4939 return ret; 4940 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4941 if (ret < 0) 4942 return ret; 4943 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4944 if (ret < 0) 4945 return ret; 4946 4947 temp_wucsr = 0; 4948 4949 temp_pmt_ctl = 0; 4950 4951 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl); 4952 if (ret < 0) 4953 return ret; 4954 4955 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_; 4956 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_; 4957 4958 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++) { 4959 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0); 4960 if (ret < 0) 4961 return ret; 4962 } 4963 4964 mask_index = 0; 4965 if (wol & WAKE_PHY) { 4966 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_; 4967 4968 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4969 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4970 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4971 } 4972 if (wol & WAKE_MAGIC) { 4973 temp_wucsr |= WUCSR_MPEN_; 4974 4975 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4976 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4977 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_; 4978 } 4979 if (wol & WAKE_BCAST) { 4980 temp_wucsr |= WUCSR_BCST_EN_; 4981 4982 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4983 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4984 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4985 } 4986 if (wol & WAKE_MCAST) { 4987 temp_wucsr |= WUCSR_WAKE_EN_; 4988 4989 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */ 4990 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3); 4991 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4992 WUF_CFGX_EN_ | 4993 WUF_CFGX_TYPE_MCAST_ | 4994 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4995 (crc & WUF_CFGX_CRC16_MASK_)); 4996 if (ret < 0) 4997 return ret; 4998 4999 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7); 5000 if (ret < 0) 5001 return ret; 5002 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5003 if (ret < 0) 5004 return ret; 5005 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5006 if (ret < 0) 5007 return ret; 5008 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5009 if (ret < 0) 5010 return ret; 5011 5012 mask_index++; 5013 5014 /* for IPv6 Multicast */ 5015 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2); 5016 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5017 WUF_CFGX_EN_ | 5018 WUF_CFGX_TYPE_MCAST_ | 5019 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5020 (crc & WUF_CFGX_CRC16_MASK_)); 5021 if (ret < 0) 5022 return ret; 5023 5024 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3); 5025 if (ret < 0) 5026 return ret; 5027 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5028 if (ret < 0) 5029 return ret; 5030 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5031 if (ret < 0) 5032 return ret; 5033 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5034 if (ret < 0) 5035 return ret; 5036 5037 mask_index++; 5038 5039 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5040 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5041 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5042 } 5043 if (wol & WAKE_UCAST) { 5044 temp_wucsr |= WUCSR_PFDA_EN_; 5045 5046 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5047 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5048 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5049 } 5050 if (wol & WAKE_ARP) { 5051 temp_wucsr |= WUCSR_WAKE_EN_; 5052 5053 /* set WUF_CFG & WUF_MASK 5054 * for packettype (offset 12,13) = ARP (0x0806) 5055 */ 5056 crc = lan78xx_wakeframe_crc16(arp_type, 2); 5057 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 5058 WUF_CFGX_EN_ | 5059 WUF_CFGX_TYPE_ALL_ | 5060 (0 << WUF_CFGX_OFFSET_SHIFT_) | 5061 (crc & WUF_CFGX_CRC16_MASK_)); 5062 if (ret < 0) 5063 return ret; 5064 5065 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000); 5066 if (ret < 0) 5067 return ret; 5068 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 5069 if (ret < 0) 5070 return ret; 5071 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 5072 if (ret < 0) 5073 return ret; 5074 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 5075 if (ret < 0) 5076 return ret; 5077 5078 mask_index++; 5079 5080 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5081 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5082 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5083 } 5084 5085 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr); 5086 if (ret < 0) 5087 return ret; 5088 5089 /* when multiple WOL bits are set */ 5090 if (hweight_long((unsigned long)wol) > 1) { 5091 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 5092 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 5093 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 5094 } 5095 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl); 5096 if (ret < 0) 5097 return ret; 5098 5099 /* clear WUPS */ 5100 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5101 if (ret < 0) 5102 return ret; 5103 5104 buf |= PMT_CTL_WUPS_MASK_; 5105 5106 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5107 if (ret < 0) 5108 return ret; 5109 5110 ret = lan78xx_start_rx_path(dev); 5111 5112 return ret; 5113 } 5114 5115 static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message) 5116 { 5117 struct lan78xx_net *dev = usb_get_intfdata(intf); 5118 bool dev_open; 5119 int ret; 5120 5121 mutex_lock(&dev->dev_mutex); 5122 5123 netif_dbg(dev, ifdown, dev->net, 5124 "suspending: pm event %#x", message.event); 5125 5126 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5127 5128 if (dev_open) { 5129 spin_lock_irq(&dev->txq.lock); 5130 /* don't autosuspend while transmitting */ 5131 if ((skb_queue_len(&dev->txq) || 5132 skb_queue_len(&dev->txq_pend)) && 5133 PMSG_IS_AUTO(message)) { 5134 spin_unlock_irq(&dev->txq.lock); 5135 ret = -EBUSY; 5136 goto out; 5137 } else { 5138 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5139 spin_unlock_irq(&dev->txq.lock); 5140 } 5141 5142 rtnl_lock(); 5143 phylink_suspend(dev->phylink, false); 5144 rtnl_unlock(); 5145 5146 /* stop RX */ 5147 ret = lan78xx_stop_rx_path(dev); 5148 if (ret < 0) 5149 goto out; 5150 5151 ret = lan78xx_flush_rx_fifo(dev); 5152 if (ret < 0) 5153 goto out; 5154 5155 /* stop Tx */ 5156 ret = lan78xx_stop_tx_path(dev); 5157 if (ret < 0) 5158 goto out; 5159 5160 /* empty out the Rx and Tx queues */ 5161 netif_device_detach(dev->net); 5162 lan78xx_terminate_urbs(dev); 5163 usb_kill_urb(dev->urb_intr); 5164 5165 /* reattach */ 5166 netif_device_attach(dev->net); 5167 5168 timer_delete(&dev->stat_monitor); 5169 5170 if (PMSG_IS_AUTO(message)) { 5171 ret = lan78xx_set_auto_suspend(dev); 5172 if (ret < 0) 5173 goto out; 5174 } else { 5175 struct lan78xx_priv *pdata; 5176 5177 pdata = (struct lan78xx_priv *)(dev->data[0]); 5178 netif_carrier_off(dev->net); 5179 ret = lan78xx_set_suspend(dev, pdata->wol); 5180 if (ret < 0) 5181 goto out; 5182 } 5183 } else { 5184 /* Interface is down; don't allow WOL and PHY 5185 * events to wake up the host 5186 */ 5187 u32 buf; 5188 5189 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 5190 5191 ret = lan78xx_write_reg(dev, WUCSR, 0); 5192 if (ret < 0) 5193 goto out; 5194 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5195 if (ret < 0) 5196 goto out; 5197 5198 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5199 if (ret < 0) 5200 goto out; 5201 5202 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 5203 buf |= PMT_CTL_RES_CLR_WKP_STS_; 5204 buf &= ~PMT_CTL_SUS_MODE_MASK_; 5205 buf |= PMT_CTL_SUS_MODE_3_; 5206 5207 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5208 if (ret < 0) 5209 goto out; 5210 5211 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 5212 if (ret < 0) 5213 goto out; 5214 5215 buf |= PMT_CTL_WUPS_MASK_; 5216 5217 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 5218 if (ret < 0) 5219 goto out; 5220 } 5221 5222 ret = 0; 5223 out: 5224 mutex_unlock(&dev->dev_mutex); 5225 5226 return ret; 5227 } 5228 5229 static bool lan78xx_submit_deferred_urbs(struct lan78xx_net *dev) 5230 { 5231 bool pipe_halted = false; 5232 struct urb *urb; 5233 5234 while ((urb = usb_get_from_anchor(&dev->deferred))) { 5235 struct sk_buff *skb = urb->context; 5236 int ret; 5237 5238 if (!netif_device_present(dev->net) || 5239 !netif_carrier_ok(dev->net) || 5240 pipe_halted) { 5241 lan78xx_release_tx_buf(dev, skb); 5242 continue; 5243 } 5244 5245 ret = usb_submit_urb(urb, GFP_ATOMIC); 5246 5247 if (ret == 0) { 5248 netif_trans_update(dev->net); 5249 lan78xx_queue_skb(&dev->txq, skb, tx_start); 5250 } else { 5251 if (ret == -EPIPE) { 5252 netif_stop_queue(dev->net); 5253 pipe_halted = true; 5254 } else if (ret == -ENODEV) { 5255 netif_device_detach(dev->net); 5256 } 5257 5258 lan78xx_release_tx_buf(dev, skb); 5259 } 5260 } 5261 5262 return pipe_halted; 5263 } 5264 5265 static int lan78xx_resume(struct usb_interface *intf) 5266 { 5267 struct lan78xx_net *dev = usb_get_intfdata(intf); 5268 bool dev_open; 5269 int ret; 5270 5271 mutex_lock(&dev->dev_mutex); 5272 5273 netif_dbg(dev, ifup, dev->net, "resuming device"); 5274 5275 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 5276 5277 if (dev_open) { 5278 bool pipe_halted = false; 5279 5280 ret = lan78xx_flush_tx_fifo(dev); 5281 if (ret < 0) 5282 goto out; 5283 5284 if (dev->urb_intr) { 5285 int ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 5286 5287 if (ret < 0) { 5288 if (ret == -ENODEV) 5289 netif_device_detach(dev->net); 5290 netdev_warn(dev->net, "Failed to submit intr URB"); 5291 } 5292 } 5293 5294 spin_lock_irq(&dev->txq.lock); 5295 5296 if (netif_device_present(dev->net)) { 5297 pipe_halted = lan78xx_submit_deferred_urbs(dev); 5298 5299 if (pipe_halted) 5300 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 5301 } 5302 5303 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5304 5305 spin_unlock_irq(&dev->txq.lock); 5306 5307 if (!pipe_halted && 5308 netif_device_present(dev->net) && 5309 (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev))) 5310 netif_start_queue(dev->net); 5311 5312 ret = lan78xx_start_tx_path(dev); 5313 if (ret < 0) 5314 goto out; 5315 5316 napi_schedule(&dev->napi); 5317 5318 if (!timer_pending(&dev->stat_monitor)) { 5319 dev->delta = 1; 5320 mod_timer(&dev->stat_monitor, 5321 jiffies + STAT_UPDATE_TIMER); 5322 } 5323 5324 } else { 5325 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 5326 } 5327 5328 ret = lan78xx_write_reg(dev, WUCSR2, 0); 5329 if (ret < 0) 5330 goto out; 5331 ret = lan78xx_write_reg(dev, WUCSR, 0); 5332 if (ret < 0) 5333 goto out; 5334 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 5335 if (ret < 0) 5336 goto out; 5337 5338 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ | 5339 WUCSR2_ARP_RCD_ | 5340 WUCSR2_IPV6_TCPSYN_RCD_ | 5341 WUCSR2_IPV4_TCPSYN_RCD_); 5342 if (ret < 0) 5343 goto out; 5344 5345 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ | 5346 WUCSR_EEE_RX_WAKE_ | 5347 WUCSR_PFDA_FR_ | 5348 WUCSR_RFE_WAKE_FR_ | 5349 WUCSR_WUFR_ | 5350 WUCSR_MPR_ | 5351 WUCSR_BCST_FR_); 5352 if (ret < 0) 5353 goto out; 5354 5355 ret = 0; 5356 out: 5357 mutex_unlock(&dev->dev_mutex); 5358 5359 return ret; 5360 } 5361 5362 static int lan78xx_reset_resume(struct usb_interface *intf) 5363 { 5364 struct lan78xx_net *dev = usb_get_intfdata(intf); 5365 int ret; 5366 5367 netif_dbg(dev, ifup, dev->net, "(reset) resuming device"); 5368 5369 ret = lan78xx_reset(dev); 5370 if (ret < 0) 5371 return ret; 5372 5373 ret = lan78xx_resume(intf); 5374 if (ret < 0) 5375 return ret; 5376 5377 rtnl_lock(); 5378 phylink_resume(dev->phylink); 5379 rtnl_unlock(); 5380 5381 return 0; 5382 } 5383 5384 static const struct usb_device_id products[] = { 5385 { 5386 /* LAN7800 USB Gigabit Ethernet Device */ 5387 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID), 5388 }, 5389 { 5390 /* LAN7850 USB Gigabit Ethernet Device */ 5391 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID), 5392 }, 5393 { 5394 /* LAN7801 USB Gigabit Ethernet Device */ 5395 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID), 5396 }, 5397 { 5398 /* ATM2-AF USB Gigabit Ethernet Device */ 5399 USB_DEVICE(AT29M2AF_USB_VENDOR_ID, AT29M2AF_USB_PRODUCT_ID), 5400 }, 5401 {}, 5402 }; 5403 MODULE_DEVICE_TABLE(usb, products); 5404 5405 static struct usb_driver lan78xx_driver = { 5406 .name = DRIVER_NAME, 5407 .id_table = products, 5408 .probe = lan78xx_probe, 5409 .disconnect = lan78xx_disconnect, 5410 .suspend = lan78xx_suspend, 5411 .resume = lan78xx_resume, 5412 .reset_resume = lan78xx_reset_resume, 5413 .supports_autosuspend = 1, 5414 .disable_hub_initiated_lpm = 1, 5415 }; 5416 5417 module_usb_driver(lan78xx_driver); 5418 5419 MODULE_AUTHOR(DRIVER_AUTHOR); 5420 MODULE_DESCRIPTION(DRIVER_DESC); 5421 MODULE_LICENSE("GPL"); 5422