1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Copyright (C) 2015 Microchip Technology 4 */ 5 #include <linux/module.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/ethtool.h> 9 #include <linux/usb.h> 10 #include <linux/crc32.h> 11 #include <linux/signal.h> 12 #include <linux/slab.h> 13 #include <linux/if_vlan.h> 14 #include <linux/uaccess.h> 15 #include <linux/linkmode.h> 16 #include <linux/list.h> 17 #include <linux/ip.h> 18 #include <linux/ipv6.h> 19 #include <linux/mdio.h> 20 #include <linux/phy.h> 21 #include <net/ip6_checksum.h> 22 #include <net/vxlan.h> 23 #include <linux/interrupt.h> 24 #include <linux/irqdomain.h> 25 #include <linux/irq.h> 26 #include <linux/irqchip/chained_irq.h> 27 #include <linux/microchipphy.h> 28 #include <linux/phy_fixed.h> 29 #include <linux/of_mdio.h> 30 #include <linux/of_net.h> 31 #include "lan78xx.h" 32 33 #define DRIVER_AUTHOR "WOOJUNG HUH <woojung.huh@microchip.com>" 34 #define DRIVER_DESC "LAN78XX USB 3.0 Gigabit Ethernet Devices" 35 #define DRIVER_NAME "lan78xx" 36 37 #define TX_TIMEOUT_JIFFIES (5 * HZ) 38 #define THROTTLE_JIFFIES (HZ / 8) 39 #define UNLINK_TIMEOUT_MS 3 40 41 #define RX_MAX_QUEUE_MEMORY (60 * 1518) 42 43 #define SS_USB_PKT_SIZE (1024) 44 #define HS_USB_PKT_SIZE (512) 45 #define FS_USB_PKT_SIZE (64) 46 47 #define MAX_RX_FIFO_SIZE (12 * 1024) 48 #define MAX_TX_FIFO_SIZE (12 * 1024) 49 50 #define FLOW_THRESHOLD(n) ((((n) + 511) / 512) & 0x7F) 51 #define FLOW_CTRL_THRESHOLD(on, off) ((FLOW_THRESHOLD(on) << 0) | \ 52 (FLOW_THRESHOLD(off) << 8)) 53 54 /* Flow control turned on when Rx FIFO level rises above this level (bytes) */ 55 #define FLOW_ON_SS 9216 56 #define FLOW_ON_HS 8704 57 58 /* Flow control turned off when Rx FIFO level falls below this level (bytes) */ 59 #define FLOW_OFF_SS 4096 60 #define FLOW_OFF_HS 1024 61 62 #define DEFAULT_BURST_CAP_SIZE (MAX_TX_FIFO_SIZE) 63 #define DEFAULT_BULK_IN_DELAY (0x0800) 64 #define MAX_SINGLE_PACKET_SIZE (9000) 65 #define DEFAULT_TX_CSUM_ENABLE (true) 66 #define DEFAULT_RX_CSUM_ENABLE (true) 67 #define DEFAULT_TSO_CSUM_ENABLE (true) 68 #define DEFAULT_VLAN_FILTER_ENABLE (true) 69 #define DEFAULT_VLAN_RX_OFFLOAD (true) 70 #define TX_ALIGNMENT (4) 71 #define RXW_PADDING 2 72 73 #define LAN78XX_USB_VENDOR_ID (0x0424) 74 #define LAN7800_USB_PRODUCT_ID (0x7800) 75 #define LAN7850_USB_PRODUCT_ID (0x7850) 76 #define LAN7801_USB_PRODUCT_ID (0x7801) 77 #define LAN78XX_EEPROM_MAGIC (0x78A5) 78 #define LAN78XX_OTP_MAGIC (0x78F3) 79 #define AT29M2AF_USB_VENDOR_ID (0x07C9) 80 #define AT29M2AF_USB_PRODUCT_ID (0x0012) 81 82 #define MII_READ 1 83 #define MII_WRITE 0 84 85 #define EEPROM_INDICATOR (0xA5) 86 #define EEPROM_MAC_OFFSET (0x01) 87 #define MAX_EEPROM_SIZE 512 88 #define OTP_INDICATOR_1 (0xF3) 89 #define OTP_INDICATOR_2 (0xF7) 90 91 #define WAKE_ALL (WAKE_PHY | WAKE_UCAST | \ 92 WAKE_MCAST | WAKE_BCAST | \ 93 WAKE_ARP | WAKE_MAGIC) 94 95 #define TX_URB_NUM 10 96 #define TX_SS_URB_NUM TX_URB_NUM 97 #define TX_HS_URB_NUM TX_URB_NUM 98 #define TX_FS_URB_NUM TX_URB_NUM 99 100 /* A single URB buffer must be large enough to hold a complete jumbo packet 101 */ 102 #define TX_SS_URB_SIZE (32 * 1024) 103 #define TX_HS_URB_SIZE (16 * 1024) 104 #define TX_FS_URB_SIZE (10 * 1024) 105 106 #define RX_SS_URB_NUM 30 107 #define RX_HS_URB_NUM 10 108 #define RX_FS_URB_NUM 10 109 #define RX_SS_URB_SIZE TX_SS_URB_SIZE 110 #define RX_HS_URB_SIZE TX_HS_URB_SIZE 111 #define RX_FS_URB_SIZE TX_FS_URB_SIZE 112 113 #define SS_BURST_CAP_SIZE RX_SS_URB_SIZE 114 #define SS_BULK_IN_DELAY 0x2000 115 #define HS_BURST_CAP_SIZE RX_HS_URB_SIZE 116 #define HS_BULK_IN_DELAY 0x2000 117 #define FS_BURST_CAP_SIZE RX_FS_URB_SIZE 118 #define FS_BULK_IN_DELAY 0x2000 119 120 #define TX_CMD_LEN 8 121 #define TX_SKB_MIN_LEN (TX_CMD_LEN + ETH_HLEN) 122 #define LAN78XX_TSO_SIZE(dev) ((dev)->tx_urb_size - TX_SKB_MIN_LEN) 123 124 #define RX_CMD_LEN 10 125 #define RX_SKB_MIN_LEN (RX_CMD_LEN + ETH_HLEN) 126 #define RX_MAX_FRAME_LEN(mtu) ((mtu) + ETH_HLEN + VLAN_HLEN) 127 128 /* USB related defines */ 129 #define BULK_IN_PIPE 1 130 #define BULK_OUT_PIPE 2 131 132 /* default autosuspend delay (mSec)*/ 133 #define DEFAULT_AUTOSUSPEND_DELAY (10 * 1000) 134 135 /* statistic update interval (mSec) */ 136 #define STAT_UPDATE_TIMER (1 * 1000) 137 138 /* time to wait for MAC or FCT to stop (jiffies) */ 139 #define HW_DISABLE_TIMEOUT (HZ / 10) 140 141 /* time to wait between polling MAC or FCT state (ms) */ 142 #define HW_DISABLE_DELAY_MS 1 143 144 /* defines interrupts from interrupt EP */ 145 #define MAX_INT_EP (32) 146 #define INT_EP_INTEP (31) 147 #define INT_EP_OTP_WR_DONE (28) 148 #define INT_EP_EEE_TX_LPI_START (26) 149 #define INT_EP_EEE_TX_LPI_STOP (25) 150 #define INT_EP_EEE_RX_LPI (24) 151 #define INT_EP_MAC_RESET_TIMEOUT (23) 152 #define INT_EP_RDFO (22) 153 #define INT_EP_TXE (21) 154 #define INT_EP_USB_STATUS (20) 155 #define INT_EP_TX_DIS (19) 156 #define INT_EP_RX_DIS (18) 157 #define INT_EP_PHY (17) 158 #define INT_EP_DP (16) 159 #define INT_EP_MAC_ERR (15) 160 #define INT_EP_TDFU (14) 161 #define INT_EP_TDFO (13) 162 #define INT_EP_UTX (12) 163 #define INT_EP_GPIO_11 (11) 164 #define INT_EP_GPIO_10 (10) 165 #define INT_EP_GPIO_9 (9) 166 #define INT_EP_GPIO_8 (8) 167 #define INT_EP_GPIO_7 (7) 168 #define INT_EP_GPIO_6 (6) 169 #define INT_EP_GPIO_5 (5) 170 #define INT_EP_GPIO_4 (4) 171 #define INT_EP_GPIO_3 (3) 172 #define INT_EP_GPIO_2 (2) 173 #define INT_EP_GPIO_1 (1) 174 #define INT_EP_GPIO_0 (0) 175 176 static const char lan78xx_gstrings[][ETH_GSTRING_LEN] = { 177 "RX FCS Errors", 178 "RX Alignment Errors", 179 "Rx Fragment Errors", 180 "RX Jabber Errors", 181 "RX Undersize Frame Errors", 182 "RX Oversize Frame Errors", 183 "RX Dropped Frames", 184 "RX Unicast Byte Count", 185 "RX Broadcast Byte Count", 186 "RX Multicast Byte Count", 187 "RX Unicast Frames", 188 "RX Broadcast Frames", 189 "RX Multicast Frames", 190 "RX Pause Frames", 191 "RX 64 Byte Frames", 192 "RX 65 - 127 Byte Frames", 193 "RX 128 - 255 Byte Frames", 194 "RX 256 - 511 Bytes Frames", 195 "RX 512 - 1023 Byte Frames", 196 "RX 1024 - 1518 Byte Frames", 197 "RX Greater 1518 Byte Frames", 198 "EEE RX LPI Transitions", 199 "EEE RX LPI Time", 200 "TX FCS Errors", 201 "TX Excess Deferral Errors", 202 "TX Carrier Errors", 203 "TX Bad Byte Count", 204 "TX Single Collisions", 205 "TX Multiple Collisions", 206 "TX Excessive Collision", 207 "TX Late Collisions", 208 "TX Unicast Byte Count", 209 "TX Broadcast Byte Count", 210 "TX Multicast Byte Count", 211 "TX Unicast Frames", 212 "TX Broadcast Frames", 213 "TX Multicast Frames", 214 "TX Pause Frames", 215 "TX 64 Byte Frames", 216 "TX 65 - 127 Byte Frames", 217 "TX 128 - 255 Byte Frames", 218 "TX 256 - 511 Bytes Frames", 219 "TX 512 - 1023 Byte Frames", 220 "TX 1024 - 1518 Byte Frames", 221 "TX Greater 1518 Byte Frames", 222 "EEE TX LPI Transitions", 223 "EEE TX LPI Time", 224 }; 225 226 struct lan78xx_statstage { 227 u32 rx_fcs_errors; 228 u32 rx_alignment_errors; 229 u32 rx_fragment_errors; 230 u32 rx_jabber_errors; 231 u32 rx_undersize_frame_errors; 232 u32 rx_oversize_frame_errors; 233 u32 rx_dropped_frames; 234 u32 rx_unicast_byte_count; 235 u32 rx_broadcast_byte_count; 236 u32 rx_multicast_byte_count; 237 u32 rx_unicast_frames; 238 u32 rx_broadcast_frames; 239 u32 rx_multicast_frames; 240 u32 rx_pause_frames; 241 u32 rx_64_byte_frames; 242 u32 rx_65_127_byte_frames; 243 u32 rx_128_255_byte_frames; 244 u32 rx_256_511_bytes_frames; 245 u32 rx_512_1023_byte_frames; 246 u32 rx_1024_1518_byte_frames; 247 u32 rx_greater_1518_byte_frames; 248 u32 eee_rx_lpi_transitions; 249 u32 eee_rx_lpi_time; 250 u32 tx_fcs_errors; 251 u32 tx_excess_deferral_errors; 252 u32 tx_carrier_errors; 253 u32 tx_bad_byte_count; 254 u32 tx_single_collisions; 255 u32 tx_multiple_collisions; 256 u32 tx_excessive_collision; 257 u32 tx_late_collisions; 258 u32 tx_unicast_byte_count; 259 u32 tx_broadcast_byte_count; 260 u32 tx_multicast_byte_count; 261 u32 tx_unicast_frames; 262 u32 tx_broadcast_frames; 263 u32 tx_multicast_frames; 264 u32 tx_pause_frames; 265 u32 tx_64_byte_frames; 266 u32 tx_65_127_byte_frames; 267 u32 tx_128_255_byte_frames; 268 u32 tx_256_511_bytes_frames; 269 u32 tx_512_1023_byte_frames; 270 u32 tx_1024_1518_byte_frames; 271 u32 tx_greater_1518_byte_frames; 272 u32 eee_tx_lpi_transitions; 273 u32 eee_tx_lpi_time; 274 }; 275 276 struct lan78xx_statstage64 { 277 u64 rx_fcs_errors; 278 u64 rx_alignment_errors; 279 u64 rx_fragment_errors; 280 u64 rx_jabber_errors; 281 u64 rx_undersize_frame_errors; 282 u64 rx_oversize_frame_errors; 283 u64 rx_dropped_frames; 284 u64 rx_unicast_byte_count; 285 u64 rx_broadcast_byte_count; 286 u64 rx_multicast_byte_count; 287 u64 rx_unicast_frames; 288 u64 rx_broadcast_frames; 289 u64 rx_multicast_frames; 290 u64 rx_pause_frames; 291 u64 rx_64_byte_frames; 292 u64 rx_65_127_byte_frames; 293 u64 rx_128_255_byte_frames; 294 u64 rx_256_511_bytes_frames; 295 u64 rx_512_1023_byte_frames; 296 u64 rx_1024_1518_byte_frames; 297 u64 rx_greater_1518_byte_frames; 298 u64 eee_rx_lpi_transitions; 299 u64 eee_rx_lpi_time; 300 u64 tx_fcs_errors; 301 u64 tx_excess_deferral_errors; 302 u64 tx_carrier_errors; 303 u64 tx_bad_byte_count; 304 u64 tx_single_collisions; 305 u64 tx_multiple_collisions; 306 u64 tx_excessive_collision; 307 u64 tx_late_collisions; 308 u64 tx_unicast_byte_count; 309 u64 tx_broadcast_byte_count; 310 u64 tx_multicast_byte_count; 311 u64 tx_unicast_frames; 312 u64 tx_broadcast_frames; 313 u64 tx_multicast_frames; 314 u64 tx_pause_frames; 315 u64 tx_64_byte_frames; 316 u64 tx_65_127_byte_frames; 317 u64 tx_128_255_byte_frames; 318 u64 tx_256_511_bytes_frames; 319 u64 tx_512_1023_byte_frames; 320 u64 tx_1024_1518_byte_frames; 321 u64 tx_greater_1518_byte_frames; 322 u64 eee_tx_lpi_transitions; 323 u64 eee_tx_lpi_time; 324 }; 325 326 static u32 lan78xx_regs[] = { 327 ID_REV, 328 INT_STS, 329 HW_CFG, 330 PMT_CTL, 331 E2P_CMD, 332 E2P_DATA, 333 USB_STATUS, 334 VLAN_TYPE, 335 MAC_CR, 336 MAC_RX, 337 MAC_TX, 338 FLOW, 339 ERR_STS, 340 MII_ACC, 341 MII_DATA, 342 EEE_TX_LPI_REQ_DLY, 343 EEE_TW_TX_SYS, 344 EEE_TX_LPI_REM_DLY, 345 WUCSR 346 }; 347 348 #define PHY_REG_SIZE (32 * sizeof(u32)) 349 350 struct lan78xx_net; 351 352 struct lan78xx_priv { 353 struct lan78xx_net *dev; 354 u32 rfe_ctl; 355 u32 mchash_table[DP_SEL_VHF_HASH_LEN]; /* multicast hash table */ 356 u32 pfilter_table[NUM_OF_MAF][2]; /* perfect filter table */ 357 u32 vlan_table[DP_SEL_VHF_VLAN_LEN]; 358 struct mutex dataport_mutex; /* for dataport access */ 359 spinlock_t rfe_ctl_lock; /* for rfe register access */ 360 struct work_struct set_multicast; 361 struct work_struct set_vlan; 362 u32 wol; 363 }; 364 365 enum skb_state { 366 illegal = 0, 367 tx_start, 368 tx_done, 369 rx_start, 370 rx_done, 371 rx_cleanup, 372 unlink_start 373 }; 374 375 struct skb_data { /* skb->cb is one of these */ 376 struct urb *urb; 377 struct lan78xx_net *dev; 378 enum skb_state state; 379 size_t length; 380 int num_of_packet; 381 }; 382 383 #define EVENT_TX_HALT 0 384 #define EVENT_RX_HALT 1 385 #define EVENT_RX_MEMORY 2 386 #define EVENT_STS_SPLIT 3 387 #define EVENT_LINK_RESET 4 388 #define EVENT_RX_PAUSED 5 389 #define EVENT_DEV_WAKING 6 390 #define EVENT_DEV_ASLEEP 7 391 #define EVENT_DEV_OPEN 8 392 #define EVENT_STAT_UPDATE 9 393 #define EVENT_DEV_DISCONNECT 10 394 395 struct statstage { 396 struct mutex access_lock; /* for stats access */ 397 struct lan78xx_statstage saved; 398 struct lan78xx_statstage rollover_count; 399 struct lan78xx_statstage rollover_max; 400 struct lan78xx_statstage64 curr_stat; 401 }; 402 403 struct irq_domain_data { 404 struct irq_domain *irqdomain; 405 unsigned int phyirq; 406 struct irq_chip *irqchip; 407 irq_flow_handler_t irq_handler; 408 u32 irqenable; 409 struct mutex irq_lock; /* for irq bus access */ 410 }; 411 412 struct lan78xx_net { 413 struct net_device *net; 414 struct usb_device *udev; 415 struct usb_interface *intf; 416 void *driver_priv; 417 418 unsigned int tx_pend_data_len; 419 size_t n_tx_urbs; 420 size_t n_rx_urbs; 421 size_t tx_urb_size; 422 size_t rx_urb_size; 423 424 struct sk_buff_head rxq_free; 425 struct sk_buff_head rxq; 426 struct sk_buff_head rxq_done; 427 struct sk_buff_head rxq_overflow; 428 struct sk_buff_head txq_free; 429 struct sk_buff_head txq; 430 struct sk_buff_head txq_pend; 431 432 struct napi_struct napi; 433 434 struct delayed_work wq; 435 436 int msg_enable; 437 438 struct urb *urb_intr; 439 struct usb_anchor deferred; 440 441 struct mutex dev_mutex; /* serialise open/stop wrt suspend/resume */ 442 struct mutex phy_mutex; /* for phy access */ 443 unsigned int pipe_in, pipe_out, pipe_intr; 444 445 unsigned int bulk_in_delay; 446 unsigned int burst_cap; 447 448 unsigned long flags; 449 450 wait_queue_head_t *wait; 451 unsigned char suspend_count; 452 453 unsigned int maxpacket; 454 struct timer_list stat_monitor; 455 456 unsigned long data[5]; 457 458 int link_on; 459 u8 mdix_ctrl; 460 461 u32 chipid; 462 u32 chiprev; 463 struct mii_bus *mdiobus; 464 phy_interface_t interface; 465 466 int fc_autoneg; 467 u8 fc_request_control; 468 469 int delta; 470 struct statstage stats; 471 472 struct irq_domain_data domain_data; 473 }; 474 475 /* define external phy id */ 476 #define PHY_LAN8835 (0x0007C130) 477 #define PHY_KSZ9031RNX (0x00221620) 478 479 /* use ethtool to change the level for any given device */ 480 static int msg_level = -1; 481 module_param(msg_level, int, 0); 482 MODULE_PARM_DESC(msg_level, "Override default message level"); 483 484 static struct sk_buff *lan78xx_get_buf(struct sk_buff_head *buf_pool) 485 { 486 if (skb_queue_empty(buf_pool)) 487 return NULL; 488 489 return skb_dequeue(buf_pool); 490 } 491 492 static void lan78xx_release_buf(struct sk_buff_head *buf_pool, 493 struct sk_buff *buf) 494 { 495 buf->data = buf->head; 496 skb_reset_tail_pointer(buf); 497 498 buf->len = 0; 499 buf->data_len = 0; 500 501 skb_queue_tail(buf_pool, buf); 502 } 503 504 static void lan78xx_free_buf_pool(struct sk_buff_head *buf_pool) 505 { 506 struct skb_data *entry; 507 struct sk_buff *buf; 508 509 while (!skb_queue_empty(buf_pool)) { 510 buf = skb_dequeue(buf_pool); 511 if (buf) { 512 entry = (struct skb_data *)buf->cb; 513 usb_free_urb(entry->urb); 514 dev_kfree_skb_any(buf); 515 } 516 } 517 } 518 519 static int lan78xx_alloc_buf_pool(struct sk_buff_head *buf_pool, 520 size_t n_urbs, size_t urb_size, 521 struct lan78xx_net *dev) 522 { 523 struct skb_data *entry; 524 struct sk_buff *buf; 525 struct urb *urb; 526 int i; 527 528 skb_queue_head_init(buf_pool); 529 530 for (i = 0; i < n_urbs; i++) { 531 buf = alloc_skb(urb_size, GFP_ATOMIC); 532 if (!buf) 533 goto error; 534 535 if (skb_linearize(buf) != 0) { 536 dev_kfree_skb_any(buf); 537 goto error; 538 } 539 540 urb = usb_alloc_urb(0, GFP_ATOMIC); 541 if (!urb) { 542 dev_kfree_skb_any(buf); 543 goto error; 544 } 545 546 entry = (struct skb_data *)buf->cb; 547 entry->urb = urb; 548 entry->dev = dev; 549 entry->length = 0; 550 entry->num_of_packet = 0; 551 552 skb_queue_tail(buf_pool, buf); 553 } 554 555 return 0; 556 557 error: 558 lan78xx_free_buf_pool(buf_pool); 559 560 return -ENOMEM; 561 } 562 563 static struct sk_buff *lan78xx_get_rx_buf(struct lan78xx_net *dev) 564 { 565 return lan78xx_get_buf(&dev->rxq_free); 566 } 567 568 static void lan78xx_release_rx_buf(struct lan78xx_net *dev, 569 struct sk_buff *rx_buf) 570 { 571 lan78xx_release_buf(&dev->rxq_free, rx_buf); 572 } 573 574 static void lan78xx_free_rx_resources(struct lan78xx_net *dev) 575 { 576 lan78xx_free_buf_pool(&dev->rxq_free); 577 } 578 579 static int lan78xx_alloc_rx_resources(struct lan78xx_net *dev) 580 { 581 return lan78xx_alloc_buf_pool(&dev->rxq_free, 582 dev->n_rx_urbs, dev->rx_urb_size, dev); 583 } 584 585 static struct sk_buff *lan78xx_get_tx_buf(struct lan78xx_net *dev) 586 { 587 return lan78xx_get_buf(&dev->txq_free); 588 } 589 590 static void lan78xx_release_tx_buf(struct lan78xx_net *dev, 591 struct sk_buff *tx_buf) 592 { 593 lan78xx_release_buf(&dev->txq_free, tx_buf); 594 } 595 596 static void lan78xx_free_tx_resources(struct lan78xx_net *dev) 597 { 598 lan78xx_free_buf_pool(&dev->txq_free); 599 } 600 601 static int lan78xx_alloc_tx_resources(struct lan78xx_net *dev) 602 { 603 return lan78xx_alloc_buf_pool(&dev->txq_free, 604 dev->n_tx_urbs, dev->tx_urb_size, dev); 605 } 606 607 static int lan78xx_read_reg(struct lan78xx_net *dev, u32 index, u32 *data) 608 { 609 u32 *buf; 610 int ret; 611 612 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 613 return -ENODEV; 614 615 buf = kmalloc(sizeof(u32), GFP_KERNEL); 616 if (!buf) 617 return -ENOMEM; 618 619 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 620 USB_VENDOR_REQUEST_READ_REGISTER, 621 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 622 0, index, buf, 4, USB_CTRL_GET_TIMEOUT); 623 if (likely(ret >= 0)) { 624 le32_to_cpus(buf); 625 *data = *buf; 626 } else if (net_ratelimit()) { 627 netdev_warn(dev->net, 628 "Failed to read register index 0x%08x. ret = %d", 629 index, ret); 630 } 631 632 kfree(buf); 633 634 return ret; 635 } 636 637 static int lan78xx_write_reg(struct lan78xx_net *dev, u32 index, u32 data) 638 { 639 u32 *buf; 640 int ret; 641 642 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 643 return -ENODEV; 644 645 buf = kmalloc(sizeof(u32), GFP_KERNEL); 646 if (!buf) 647 return -ENOMEM; 648 649 *buf = data; 650 cpu_to_le32s(buf); 651 652 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 653 USB_VENDOR_REQUEST_WRITE_REGISTER, 654 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 655 0, index, buf, 4, USB_CTRL_SET_TIMEOUT); 656 if (unlikely(ret < 0) && 657 net_ratelimit()) { 658 netdev_warn(dev->net, 659 "Failed to write register index 0x%08x. ret = %d", 660 index, ret); 661 } 662 663 kfree(buf); 664 665 return ret; 666 } 667 668 static int lan78xx_update_reg(struct lan78xx_net *dev, u32 reg, u32 mask, 669 u32 data) 670 { 671 int ret; 672 u32 buf; 673 674 ret = lan78xx_read_reg(dev, reg, &buf); 675 if (ret < 0) 676 return ret; 677 678 buf &= ~mask; 679 buf |= (mask & data); 680 681 ret = lan78xx_write_reg(dev, reg, buf); 682 if (ret < 0) 683 return ret; 684 685 return 0; 686 } 687 688 static int lan78xx_read_stats(struct lan78xx_net *dev, 689 struct lan78xx_statstage *data) 690 { 691 int ret = 0; 692 int i; 693 struct lan78xx_statstage *stats; 694 u32 *src; 695 u32 *dst; 696 697 stats = kmalloc(sizeof(*stats), GFP_KERNEL); 698 if (!stats) 699 return -ENOMEM; 700 701 ret = usb_control_msg(dev->udev, 702 usb_rcvctrlpipe(dev->udev, 0), 703 USB_VENDOR_REQUEST_GET_STATS, 704 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 705 0, 706 0, 707 (void *)stats, 708 sizeof(*stats), 709 USB_CTRL_SET_TIMEOUT); 710 if (likely(ret >= 0)) { 711 src = (u32 *)stats; 712 dst = (u32 *)data; 713 for (i = 0; i < sizeof(*stats) / sizeof(u32); i++) { 714 le32_to_cpus(&src[i]); 715 dst[i] = src[i]; 716 } 717 } else { 718 netdev_warn(dev->net, 719 "Failed to read stat ret = %d", ret); 720 } 721 722 kfree(stats); 723 724 return ret; 725 } 726 727 #define check_counter_rollover(struct1, dev_stats, member) \ 728 do { \ 729 if ((struct1)->member < (dev_stats).saved.member) \ 730 (dev_stats).rollover_count.member++; \ 731 } while (0) 732 733 static void lan78xx_check_stat_rollover(struct lan78xx_net *dev, 734 struct lan78xx_statstage *stats) 735 { 736 check_counter_rollover(stats, dev->stats, rx_fcs_errors); 737 check_counter_rollover(stats, dev->stats, rx_alignment_errors); 738 check_counter_rollover(stats, dev->stats, rx_fragment_errors); 739 check_counter_rollover(stats, dev->stats, rx_jabber_errors); 740 check_counter_rollover(stats, dev->stats, rx_undersize_frame_errors); 741 check_counter_rollover(stats, dev->stats, rx_oversize_frame_errors); 742 check_counter_rollover(stats, dev->stats, rx_dropped_frames); 743 check_counter_rollover(stats, dev->stats, rx_unicast_byte_count); 744 check_counter_rollover(stats, dev->stats, rx_broadcast_byte_count); 745 check_counter_rollover(stats, dev->stats, rx_multicast_byte_count); 746 check_counter_rollover(stats, dev->stats, rx_unicast_frames); 747 check_counter_rollover(stats, dev->stats, rx_broadcast_frames); 748 check_counter_rollover(stats, dev->stats, rx_multicast_frames); 749 check_counter_rollover(stats, dev->stats, rx_pause_frames); 750 check_counter_rollover(stats, dev->stats, rx_64_byte_frames); 751 check_counter_rollover(stats, dev->stats, rx_65_127_byte_frames); 752 check_counter_rollover(stats, dev->stats, rx_128_255_byte_frames); 753 check_counter_rollover(stats, dev->stats, rx_256_511_bytes_frames); 754 check_counter_rollover(stats, dev->stats, rx_512_1023_byte_frames); 755 check_counter_rollover(stats, dev->stats, rx_1024_1518_byte_frames); 756 check_counter_rollover(stats, dev->stats, rx_greater_1518_byte_frames); 757 check_counter_rollover(stats, dev->stats, eee_rx_lpi_transitions); 758 check_counter_rollover(stats, dev->stats, eee_rx_lpi_time); 759 check_counter_rollover(stats, dev->stats, tx_fcs_errors); 760 check_counter_rollover(stats, dev->stats, tx_excess_deferral_errors); 761 check_counter_rollover(stats, dev->stats, tx_carrier_errors); 762 check_counter_rollover(stats, dev->stats, tx_bad_byte_count); 763 check_counter_rollover(stats, dev->stats, tx_single_collisions); 764 check_counter_rollover(stats, dev->stats, tx_multiple_collisions); 765 check_counter_rollover(stats, dev->stats, tx_excessive_collision); 766 check_counter_rollover(stats, dev->stats, tx_late_collisions); 767 check_counter_rollover(stats, dev->stats, tx_unicast_byte_count); 768 check_counter_rollover(stats, dev->stats, tx_broadcast_byte_count); 769 check_counter_rollover(stats, dev->stats, tx_multicast_byte_count); 770 check_counter_rollover(stats, dev->stats, tx_unicast_frames); 771 check_counter_rollover(stats, dev->stats, tx_broadcast_frames); 772 check_counter_rollover(stats, dev->stats, tx_multicast_frames); 773 check_counter_rollover(stats, dev->stats, tx_pause_frames); 774 check_counter_rollover(stats, dev->stats, tx_64_byte_frames); 775 check_counter_rollover(stats, dev->stats, tx_65_127_byte_frames); 776 check_counter_rollover(stats, dev->stats, tx_128_255_byte_frames); 777 check_counter_rollover(stats, dev->stats, tx_256_511_bytes_frames); 778 check_counter_rollover(stats, dev->stats, tx_512_1023_byte_frames); 779 check_counter_rollover(stats, dev->stats, tx_1024_1518_byte_frames); 780 check_counter_rollover(stats, dev->stats, tx_greater_1518_byte_frames); 781 check_counter_rollover(stats, dev->stats, eee_tx_lpi_transitions); 782 check_counter_rollover(stats, dev->stats, eee_tx_lpi_time); 783 784 memcpy(&dev->stats.saved, stats, sizeof(struct lan78xx_statstage)); 785 } 786 787 static void lan78xx_update_stats(struct lan78xx_net *dev) 788 { 789 u32 *p, *count, *max; 790 u64 *data; 791 int i; 792 struct lan78xx_statstage lan78xx_stats; 793 794 if (usb_autopm_get_interface(dev->intf) < 0) 795 return; 796 797 p = (u32 *)&lan78xx_stats; 798 count = (u32 *)&dev->stats.rollover_count; 799 max = (u32 *)&dev->stats.rollover_max; 800 data = (u64 *)&dev->stats.curr_stat; 801 802 mutex_lock(&dev->stats.access_lock); 803 804 if (lan78xx_read_stats(dev, &lan78xx_stats) > 0) 805 lan78xx_check_stat_rollover(dev, &lan78xx_stats); 806 807 for (i = 0; i < (sizeof(lan78xx_stats) / (sizeof(u32))); i++) 808 data[i] = (u64)p[i] + ((u64)count[i] * ((u64)max[i] + 1)); 809 810 mutex_unlock(&dev->stats.access_lock); 811 812 usb_autopm_put_interface(dev->intf); 813 } 814 815 /* Loop until the read is completed with timeout called with phy_mutex held */ 816 static int lan78xx_phy_wait_not_busy(struct lan78xx_net *dev) 817 { 818 unsigned long start_time = jiffies; 819 u32 val; 820 int ret; 821 822 do { 823 ret = lan78xx_read_reg(dev, MII_ACC, &val); 824 if (unlikely(ret < 0)) 825 return -EIO; 826 827 if (!(val & MII_ACC_MII_BUSY_)) 828 return 0; 829 } while (!time_after(jiffies, start_time + HZ)); 830 831 return -EIO; 832 } 833 834 static inline u32 mii_access(int id, int index, int read) 835 { 836 u32 ret; 837 838 ret = ((u32)id << MII_ACC_PHY_ADDR_SHIFT_) & MII_ACC_PHY_ADDR_MASK_; 839 ret |= ((u32)index << MII_ACC_MIIRINDA_SHIFT_) & MII_ACC_MIIRINDA_MASK_; 840 if (read) 841 ret |= MII_ACC_MII_READ_; 842 else 843 ret |= MII_ACC_MII_WRITE_; 844 ret |= MII_ACC_MII_BUSY_; 845 846 return ret; 847 } 848 849 static int lan78xx_wait_eeprom(struct lan78xx_net *dev) 850 { 851 unsigned long start_time = jiffies; 852 u32 val; 853 int ret; 854 855 do { 856 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 857 if (unlikely(ret < 0)) 858 return -EIO; 859 860 if (!(val & E2P_CMD_EPC_BUSY_) || 861 (val & E2P_CMD_EPC_TIMEOUT_)) 862 break; 863 usleep_range(40, 100); 864 } while (!time_after(jiffies, start_time + HZ)); 865 866 if (val & (E2P_CMD_EPC_TIMEOUT_ | E2P_CMD_EPC_BUSY_)) { 867 netdev_warn(dev->net, "EEPROM read operation timeout"); 868 return -EIO; 869 } 870 871 return 0; 872 } 873 874 static int lan78xx_eeprom_confirm_not_busy(struct lan78xx_net *dev) 875 { 876 unsigned long start_time = jiffies; 877 u32 val; 878 int ret; 879 880 do { 881 ret = lan78xx_read_reg(dev, E2P_CMD, &val); 882 if (unlikely(ret < 0)) 883 return -EIO; 884 885 if (!(val & E2P_CMD_EPC_BUSY_)) 886 return 0; 887 888 usleep_range(40, 100); 889 } while (!time_after(jiffies, start_time + HZ)); 890 891 netdev_warn(dev->net, "EEPROM is busy"); 892 return -EIO; 893 } 894 895 static int lan78xx_read_raw_eeprom(struct lan78xx_net *dev, u32 offset, 896 u32 length, u8 *data) 897 { 898 u32 val; 899 u32 saved; 900 int i, ret; 901 int retval; 902 903 /* depends on chip, some EEPROM pins are muxed with LED function. 904 * disable & restore LED function to access EEPROM. 905 */ 906 ret = lan78xx_read_reg(dev, HW_CFG, &val); 907 saved = val; 908 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 909 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 910 ret = lan78xx_write_reg(dev, HW_CFG, val); 911 } 912 913 retval = lan78xx_eeprom_confirm_not_busy(dev); 914 if (retval) 915 return retval; 916 917 for (i = 0; i < length; i++) { 918 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_READ_; 919 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 920 ret = lan78xx_write_reg(dev, E2P_CMD, val); 921 if (unlikely(ret < 0)) { 922 retval = -EIO; 923 goto exit; 924 } 925 926 retval = lan78xx_wait_eeprom(dev); 927 if (retval < 0) 928 goto exit; 929 930 ret = lan78xx_read_reg(dev, E2P_DATA, &val); 931 if (unlikely(ret < 0)) { 932 retval = -EIO; 933 goto exit; 934 } 935 936 data[i] = val & 0xFF; 937 offset++; 938 } 939 940 retval = 0; 941 exit: 942 if (dev->chipid == ID_REV_CHIP_ID_7800_) 943 ret = lan78xx_write_reg(dev, HW_CFG, saved); 944 945 return retval; 946 } 947 948 static int lan78xx_read_eeprom(struct lan78xx_net *dev, u32 offset, 949 u32 length, u8 *data) 950 { 951 u8 sig; 952 int ret; 953 954 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 955 if ((ret == 0) && (sig == EEPROM_INDICATOR)) 956 ret = lan78xx_read_raw_eeprom(dev, offset, length, data); 957 else 958 ret = -EINVAL; 959 960 return ret; 961 } 962 963 static int lan78xx_write_raw_eeprom(struct lan78xx_net *dev, u32 offset, 964 u32 length, u8 *data) 965 { 966 u32 val; 967 u32 saved; 968 int i, ret; 969 int retval; 970 971 /* depends on chip, some EEPROM pins are muxed with LED function. 972 * disable & restore LED function to access EEPROM. 973 */ 974 ret = lan78xx_read_reg(dev, HW_CFG, &val); 975 saved = val; 976 if (dev->chipid == ID_REV_CHIP_ID_7800_) { 977 val &= ~(HW_CFG_LED1_EN_ | HW_CFG_LED0_EN_); 978 ret = lan78xx_write_reg(dev, HW_CFG, val); 979 } 980 981 retval = lan78xx_eeprom_confirm_not_busy(dev); 982 if (retval) 983 goto exit; 984 985 /* Issue write/erase enable command */ 986 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_EWEN_; 987 ret = lan78xx_write_reg(dev, E2P_CMD, val); 988 if (unlikely(ret < 0)) { 989 retval = -EIO; 990 goto exit; 991 } 992 993 retval = lan78xx_wait_eeprom(dev); 994 if (retval < 0) 995 goto exit; 996 997 for (i = 0; i < length; i++) { 998 /* Fill data register */ 999 val = data[i]; 1000 ret = lan78xx_write_reg(dev, E2P_DATA, val); 1001 if (ret < 0) { 1002 retval = -EIO; 1003 goto exit; 1004 } 1005 1006 /* Send "write" command */ 1007 val = E2P_CMD_EPC_BUSY_ | E2P_CMD_EPC_CMD_WRITE_; 1008 val |= (offset & E2P_CMD_EPC_ADDR_MASK_); 1009 ret = lan78xx_write_reg(dev, E2P_CMD, val); 1010 if (ret < 0) { 1011 retval = -EIO; 1012 goto exit; 1013 } 1014 1015 retval = lan78xx_wait_eeprom(dev); 1016 if (retval < 0) 1017 goto exit; 1018 1019 offset++; 1020 } 1021 1022 retval = 0; 1023 exit: 1024 if (dev->chipid == ID_REV_CHIP_ID_7800_) 1025 ret = lan78xx_write_reg(dev, HW_CFG, saved); 1026 1027 return retval; 1028 } 1029 1030 static int lan78xx_read_raw_otp(struct lan78xx_net *dev, u32 offset, 1031 u32 length, u8 *data) 1032 { 1033 int i; 1034 u32 buf; 1035 unsigned long timeout; 1036 1037 lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1038 1039 if (buf & OTP_PWR_DN_PWRDN_N_) { 1040 /* clear it and wait to be cleared */ 1041 lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1042 1043 timeout = jiffies + HZ; 1044 do { 1045 usleep_range(1, 10); 1046 lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1047 if (time_after(jiffies, timeout)) { 1048 netdev_warn(dev->net, 1049 "timeout on OTP_PWR_DN"); 1050 return -EIO; 1051 } 1052 } while (buf & OTP_PWR_DN_PWRDN_N_); 1053 } 1054 1055 for (i = 0; i < length; i++) { 1056 lan78xx_write_reg(dev, OTP_ADDR1, 1057 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1058 lan78xx_write_reg(dev, OTP_ADDR2, 1059 ((offset + i) & OTP_ADDR2_10_3)); 1060 1061 lan78xx_write_reg(dev, OTP_FUNC_CMD, OTP_FUNC_CMD_READ_); 1062 lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1063 1064 timeout = jiffies + HZ; 1065 do { 1066 udelay(1); 1067 lan78xx_read_reg(dev, OTP_STATUS, &buf); 1068 if (time_after(jiffies, timeout)) { 1069 netdev_warn(dev->net, 1070 "timeout on OTP_STATUS"); 1071 return -EIO; 1072 } 1073 } while (buf & OTP_STATUS_BUSY_); 1074 1075 lan78xx_read_reg(dev, OTP_RD_DATA, &buf); 1076 1077 data[i] = (u8)(buf & 0xFF); 1078 } 1079 1080 return 0; 1081 } 1082 1083 static int lan78xx_write_raw_otp(struct lan78xx_net *dev, u32 offset, 1084 u32 length, u8 *data) 1085 { 1086 int i; 1087 u32 buf; 1088 unsigned long timeout; 1089 1090 lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1091 1092 if (buf & OTP_PWR_DN_PWRDN_N_) { 1093 /* clear it and wait to be cleared */ 1094 lan78xx_write_reg(dev, OTP_PWR_DN, 0); 1095 1096 timeout = jiffies + HZ; 1097 do { 1098 udelay(1); 1099 lan78xx_read_reg(dev, OTP_PWR_DN, &buf); 1100 if (time_after(jiffies, timeout)) { 1101 netdev_warn(dev->net, 1102 "timeout on OTP_PWR_DN completion"); 1103 return -EIO; 1104 } 1105 } while (buf & OTP_PWR_DN_PWRDN_N_); 1106 } 1107 1108 /* set to BYTE program mode */ 1109 lan78xx_write_reg(dev, OTP_PRGM_MODE, OTP_PRGM_MODE_BYTE_); 1110 1111 for (i = 0; i < length; i++) { 1112 lan78xx_write_reg(dev, OTP_ADDR1, 1113 ((offset + i) >> 8) & OTP_ADDR1_15_11); 1114 lan78xx_write_reg(dev, OTP_ADDR2, 1115 ((offset + i) & OTP_ADDR2_10_3)); 1116 lan78xx_write_reg(dev, OTP_PRGM_DATA, data[i]); 1117 lan78xx_write_reg(dev, OTP_TST_CMD, OTP_TST_CMD_PRGVRFY_); 1118 lan78xx_write_reg(dev, OTP_CMD_GO, OTP_CMD_GO_GO_); 1119 1120 timeout = jiffies + HZ; 1121 do { 1122 udelay(1); 1123 lan78xx_read_reg(dev, OTP_STATUS, &buf); 1124 if (time_after(jiffies, timeout)) { 1125 netdev_warn(dev->net, 1126 "Timeout on OTP_STATUS completion"); 1127 return -EIO; 1128 } 1129 } while (buf & OTP_STATUS_BUSY_); 1130 } 1131 1132 return 0; 1133 } 1134 1135 static int lan78xx_read_otp(struct lan78xx_net *dev, u32 offset, 1136 u32 length, u8 *data) 1137 { 1138 u8 sig; 1139 int ret; 1140 1141 ret = lan78xx_read_raw_otp(dev, 0, 1, &sig); 1142 1143 if (ret == 0) { 1144 if (sig == OTP_INDICATOR_2) 1145 offset += 0x100; 1146 else if (sig != OTP_INDICATOR_1) 1147 ret = -EINVAL; 1148 if (!ret) 1149 ret = lan78xx_read_raw_otp(dev, offset, length, data); 1150 } 1151 1152 return ret; 1153 } 1154 1155 static int lan78xx_dataport_wait_not_busy(struct lan78xx_net *dev) 1156 { 1157 int i, ret; 1158 1159 for (i = 0; i < 100; i++) { 1160 u32 dp_sel; 1161 1162 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1163 if (unlikely(ret < 0)) 1164 return -EIO; 1165 1166 if (dp_sel & DP_SEL_DPRDY_) 1167 return 0; 1168 1169 usleep_range(40, 100); 1170 } 1171 1172 netdev_warn(dev->net, "%s timed out", __func__); 1173 1174 return -EIO; 1175 } 1176 1177 static int lan78xx_dataport_write(struct lan78xx_net *dev, u32 ram_select, 1178 u32 addr, u32 length, u32 *buf) 1179 { 1180 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1181 u32 dp_sel; 1182 int i, ret; 1183 1184 if (usb_autopm_get_interface(dev->intf) < 0) 1185 return 0; 1186 1187 mutex_lock(&pdata->dataport_mutex); 1188 1189 ret = lan78xx_dataport_wait_not_busy(dev); 1190 if (ret < 0) 1191 goto done; 1192 1193 ret = lan78xx_read_reg(dev, DP_SEL, &dp_sel); 1194 1195 dp_sel &= ~DP_SEL_RSEL_MASK_; 1196 dp_sel |= ram_select; 1197 ret = lan78xx_write_reg(dev, DP_SEL, dp_sel); 1198 1199 for (i = 0; i < length; i++) { 1200 ret = lan78xx_write_reg(dev, DP_ADDR, addr + i); 1201 1202 ret = lan78xx_write_reg(dev, DP_DATA, buf[i]); 1203 1204 ret = lan78xx_write_reg(dev, DP_CMD, DP_CMD_WRITE_); 1205 1206 ret = lan78xx_dataport_wait_not_busy(dev); 1207 if (ret < 0) 1208 goto done; 1209 } 1210 1211 done: 1212 mutex_unlock(&pdata->dataport_mutex); 1213 usb_autopm_put_interface(dev->intf); 1214 1215 return ret; 1216 } 1217 1218 static void lan78xx_set_addr_filter(struct lan78xx_priv *pdata, 1219 int index, u8 addr[ETH_ALEN]) 1220 { 1221 u32 temp; 1222 1223 if ((pdata) && (index > 0) && (index < NUM_OF_MAF)) { 1224 temp = addr[3]; 1225 temp = addr[2] | (temp << 8); 1226 temp = addr[1] | (temp << 8); 1227 temp = addr[0] | (temp << 8); 1228 pdata->pfilter_table[index][1] = temp; 1229 temp = addr[5]; 1230 temp = addr[4] | (temp << 8); 1231 temp |= MAF_HI_VALID_ | MAF_HI_TYPE_DST_; 1232 pdata->pfilter_table[index][0] = temp; 1233 } 1234 } 1235 1236 /* returns hash bit number for given MAC address */ 1237 static inline u32 lan78xx_hash(char addr[ETH_ALEN]) 1238 { 1239 return (ether_crc(ETH_ALEN, addr) >> 23) & 0x1ff; 1240 } 1241 1242 static void lan78xx_deferred_multicast_write(struct work_struct *param) 1243 { 1244 struct lan78xx_priv *pdata = 1245 container_of(param, struct lan78xx_priv, set_multicast); 1246 struct lan78xx_net *dev = pdata->dev; 1247 int i; 1248 1249 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", 1250 pdata->rfe_ctl); 1251 1252 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, DP_SEL_VHF_VLAN_LEN, 1253 DP_SEL_VHF_HASH_LEN, pdata->mchash_table); 1254 1255 for (i = 1; i < NUM_OF_MAF; i++) { 1256 lan78xx_write_reg(dev, MAF_HI(i), 0); 1257 lan78xx_write_reg(dev, MAF_LO(i), 1258 pdata->pfilter_table[i][1]); 1259 lan78xx_write_reg(dev, MAF_HI(i), 1260 pdata->pfilter_table[i][0]); 1261 } 1262 1263 lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 1264 } 1265 1266 static void lan78xx_set_multicast(struct net_device *netdev) 1267 { 1268 struct lan78xx_net *dev = netdev_priv(netdev); 1269 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1270 unsigned long flags; 1271 int i; 1272 1273 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 1274 1275 pdata->rfe_ctl &= ~(RFE_CTL_UCAST_EN_ | RFE_CTL_MCAST_EN_ | 1276 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1277 1278 for (i = 0; i < DP_SEL_VHF_HASH_LEN; i++) 1279 pdata->mchash_table[i] = 0; 1280 1281 /* pfilter_table[0] has own HW address */ 1282 for (i = 1; i < NUM_OF_MAF; i++) { 1283 pdata->pfilter_table[i][0] = 0; 1284 pdata->pfilter_table[i][1] = 0; 1285 } 1286 1287 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_; 1288 1289 if (dev->net->flags & IFF_PROMISC) { 1290 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled"); 1291 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_ | RFE_CTL_UCAST_EN_; 1292 } else { 1293 if (dev->net->flags & IFF_ALLMULTI) { 1294 netif_dbg(dev, drv, dev->net, 1295 "receive all multicast enabled"); 1296 pdata->rfe_ctl |= RFE_CTL_MCAST_EN_; 1297 } 1298 } 1299 1300 if (netdev_mc_count(dev->net)) { 1301 struct netdev_hw_addr *ha; 1302 int i; 1303 1304 netif_dbg(dev, drv, dev->net, "receive multicast hash filter"); 1305 1306 pdata->rfe_ctl |= RFE_CTL_DA_PERFECT_; 1307 1308 i = 1; 1309 netdev_for_each_mc_addr(ha, netdev) { 1310 /* set first 32 into Perfect Filter */ 1311 if (i < 33) { 1312 lan78xx_set_addr_filter(pdata, i, ha->addr); 1313 } else { 1314 u32 bitnum = lan78xx_hash(ha->addr); 1315 1316 pdata->mchash_table[bitnum / 32] |= 1317 (1 << (bitnum % 32)); 1318 pdata->rfe_ctl |= RFE_CTL_MCAST_HASH_; 1319 } 1320 i++; 1321 } 1322 } 1323 1324 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 1325 1326 /* defer register writes to a sleepable context */ 1327 schedule_work(&pdata->set_multicast); 1328 } 1329 1330 static int lan78xx_update_flowcontrol(struct lan78xx_net *dev, u8 duplex, 1331 u16 lcladv, u16 rmtadv) 1332 { 1333 u32 flow = 0, fct_flow = 0; 1334 u8 cap; 1335 1336 if (dev->fc_autoneg) 1337 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 1338 else 1339 cap = dev->fc_request_control; 1340 1341 if (cap & FLOW_CTRL_TX) 1342 flow |= (FLOW_CR_TX_FCEN_ | 0xFFFF); 1343 1344 if (cap & FLOW_CTRL_RX) 1345 flow |= FLOW_CR_RX_FCEN_; 1346 1347 if (dev->udev->speed == USB_SPEED_SUPER) 1348 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_SS, FLOW_OFF_SS); 1349 else if (dev->udev->speed == USB_SPEED_HIGH) 1350 fct_flow = FLOW_CTRL_THRESHOLD(FLOW_ON_HS, FLOW_OFF_HS); 1351 1352 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s", 1353 (cap & FLOW_CTRL_RX ? "enabled" : "disabled"), 1354 (cap & FLOW_CTRL_TX ? "enabled" : "disabled")); 1355 1356 lan78xx_write_reg(dev, FCT_FLOW, fct_flow); 1357 1358 /* threshold value should be set before enabling flow */ 1359 lan78xx_write_reg(dev, FLOW, flow); 1360 1361 return 0; 1362 } 1363 1364 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev); 1365 1366 static int lan78xx_mac_reset(struct lan78xx_net *dev) 1367 { 1368 unsigned long start_time = jiffies; 1369 u32 val; 1370 int ret; 1371 1372 mutex_lock(&dev->phy_mutex); 1373 1374 /* Resetting the device while there is activity on the MDIO 1375 * bus can result in the MAC interface locking up and not 1376 * completing register access transactions. 1377 */ 1378 ret = lan78xx_phy_wait_not_busy(dev); 1379 if (ret < 0) 1380 goto done; 1381 1382 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1383 if (ret < 0) 1384 goto done; 1385 1386 val |= MAC_CR_RST_; 1387 ret = lan78xx_write_reg(dev, MAC_CR, val); 1388 if (ret < 0) 1389 goto done; 1390 1391 /* Wait for the reset to complete before allowing any further 1392 * MAC register accesses otherwise the MAC may lock up. 1393 */ 1394 do { 1395 ret = lan78xx_read_reg(dev, MAC_CR, &val); 1396 if (ret < 0) 1397 goto done; 1398 1399 if (!(val & MAC_CR_RST_)) { 1400 ret = 0; 1401 goto done; 1402 } 1403 } while (!time_after(jiffies, start_time + HZ)); 1404 1405 ret = -ETIMEDOUT; 1406 done: 1407 mutex_unlock(&dev->phy_mutex); 1408 1409 return ret; 1410 } 1411 1412 static int lan78xx_link_reset(struct lan78xx_net *dev) 1413 { 1414 struct phy_device *phydev = dev->net->phydev; 1415 struct ethtool_link_ksettings ecmd; 1416 int ladv, radv, ret, link; 1417 u32 buf; 1418 1419 /* clear LAN78xx interrupt status */ 1420 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_PHY_INT_); 1421 if (unlikely(ret < 0)) 1422 return ret; 1423 1424 mutex_lock(&phydev->lock); 1425 phy_read_status(phydev); 1426 link = phydev->link; 1427 mutex_unlock(&phydev->lock); 1428 1429 if (!link && dev->link_on) { 1430 dev->link_on = false; 1431 1432 /* reset MAC */ 1433 ret = lan78xx_mac_reset(dev); 1434 if (ret < 0) 1435 return ret; 1436 1437 del_timer(&dev->stat_monitor); 1438 } else if (link && !dev->link_on) { 1439 dev->link_on = true; 1440 1441 phy_ethtool_ksettings_get(phydev, &ecmd); 1442 1443 if (dev->udev->speed == USB_SPEED_SUPER) { 1444 if (ecmd.base.speed == 1000) { 1445 /* disable U2 */ 1446 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1447 if (ret < 0) 1448 return ret; 1449 buf &= ~USB_CFG1_DEV_U2_INIT_EN_; 1450 ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1451 if (ret < 0) 1452 return ret; 1453 /* enable U1 */ 1454 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1455 if (ret < 0) 1456 return ret; 1457 buf |= USB_CFG1_DEV_U1_INIT_EN_; 1458 ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1459 if (ret < 0) 1460 return ret; 1461 } else { 1462 /* enable U1 & U2 */ 1463 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 1464 if (ret < 0) 1465 return ret; 1466 buf |= USB_CFG1_DEV_U2_INIT_EN_; 1467 buf |= USB_CFG1_DEV_U1_INIT_EN_; 1468 ret = lan78xx_write_reg(dev, USB_CFG1, buf); 1469 if (ret < 0) 1470 return ret; 1471 } 1472 } 1473 1474 ladv = phy_read(phydev, MII_ADVERTISE); 1475 if (ladv < 0) 1476 return ladv; 1477 1478 radv = phy_read(phydev, MII_LPA); 1479 if (radv < 0) 1480 return radv; 1481 1482 netif_dbg(dev, link, dev->net, 1483 "speed: %u duplex: %d anadv: 0x%04x anlpa: 0x%04x", 1484 ecmd.base.speed, ecmd.base.duplex, ladv, radv); 1485 1486 ret = lan78xx_update_flowcontrol(dev, ecmd.base.duplex, ladv, 1487 radv); 1488 if (ret < 0) 1489 return ret; 1490 1491 if (!timer_pending(&dev->stat_monitor)) { 1492 dev->delta = 1; 1493 mod_timer(&dev->stat_monitor, 1494 jiffies + STAT_UPDATE_TIMER); 1495 } 1496 1497 lan78xx_rx_urb_submit_all(dev); 1498 1499 local_bh_disable(); 1500 napi_schedule(&dev->napi); 1501 local_bh_enable(); 1502 } 1503 1504 return 0; 1505 } 1506 1507 /* some work can't be done in tasklets, so we use keventd 1508 * 1509 * NOTE: annoying asymmetry: if it's active, schedule_work() fails, 1510 * but tasklet_schedule() doesn't. hope the failure is rare. 1511 */ 1512 static void lan78xx_defer_kevent(struct lan78xx_net *dev, int work) 1513 { 1514 set_bit(work, &dev->flags); 1515 if (!schedule_delayed_work(&dev->wq, 0)) 1516 netdev_err(dev->net, "kevent %d may have been dropped\n", work); 1517 } 1518 1519 static void lan78xx_status(struct lan78xx_net *dev, struct urb *urb) 1520 { 1521 u32 intdata; 1522 1523 if (urb->actual_length != 4) { 1524 netdev_warn(dev->net, 1525 "unexpected urb length %d", urb->actual_length); 1526 return; 1527 } 1528 1529 intdata = get_unaligned_le32(urb->transfer_buffer); 1530 1531 if (intdata & INT_ENP_PHY_INT) { 1532 netif_dbg(dev, link, dev->net, "PHY INTR: 0x%08x\n", intdata); 1533 lan78xx_defer_kevent(dev, EVENT_LINK_RESET); 1534 1535 if (dev->domain_data.phyirq > 0) 1536 generic_handle_irq_safe(dev->domain_data.phyirq); 1537 } else { 1538 netdev_warn(dev->net, 1539 "unexpected interrupt: 0x%08x\n", intdata); 1540 } 1541 } 1542 1543 static int lan78xx_ethtool_get_eeprom_len(struct net_device *netdev) 1544 { 1545 return MAX_EEPROM_SIZE; 1546 } 1547 1548 static int lan78xx_ethtool_get_eeprom(struct net_device *netdev, 1549 struct ethtool_eeprom *ee, u8 *data) 1550 { 1551 struct lan78xx_net *dev = netdev_priv(netdev); 1552 int ret; 1553 1554 ret = usb_autopm_get_interface(dev->intf); 1555 if (ret) 1556 return ret; 1557 1558 ee->magic = LAN78XX_EEPROM_MAGIC; 1559 1560 ret = lan78xx_read_raw_eeprom(dev, ee->offset, ee->len, data); 1561 1562 usb_autopm_put_interface(dev->intf); 1563 1564 return ret; 1565 } 1566 1567 static int lan78xx_ethtool_set_eeprom(struct net_device *netdev, 1568 struct ethtool_eeprom *ee, u8 *data) 1569 { 1570 struct lan78xx_net *dev = netdev_priv(netdev); 1571 int ret; 1572 1573 ret = usb_autopm_get_interface(dev->intf); 1574 if (ret) 1575 return ret; 1576 1577 /* Invalid EEPROM_INDICATOR at offset zero will result in a failure 1578 * to load data from EEPROM 1579 */ 1580 if (ee->magic == LAN78XX_EEPROM_MAGIC) 1581 ret = lan78xx_write_raw_eeprom(dev, ee->offset, ee->len, data); 1582 else if ((ee->magic == LAN78XX_OTP_MAGIC) && 1583 (ee->offset == 0) && 1584 (ee->len == 512) && 1585 (data[0] == OTP_INDICATOR_1)) 1586 ret = lan78xx_write_raw_otp(dev, ee->offset, ee->len, data); 1587 1588 usb_autopm_put_interface(dev->intf); 1589 1590 return ret; 1591 } 1592 1593 static void lan78xx_get_strings(struct net_device *netdev, u32 stringset, 1594 u8 *data) 1595 { 1596 if (stringset == ETH_SS_STATS) 1597 memcpy(data, lan78xx_gstrings, sizeof(lan78xx_gstrings)); 1598 } 1599 1600 static int lan78xx_get_sset_count(struct net_device *netdev, int sset) 1601 { 1602 if (sset == ETH_SS_STATS) 1603 return ARRAY_SIZE(lan78xx_gstrings); 1604 else 1605 return -EOPNOTSUPP; 1606 } 1607 1608 static void lan78xx_get_stats(struct net_device *netdev, 1609 struct ethtool_stats *stats, u64 *data) 1610 { 1611 struct lan78xx_net *dev = netdev_priv(netdev); 1612 1613 lan78xx_update_stats(dev); 1614 1615 mutex_lock(&dev->stats.access_lock); 1616 memcpy(data, &dev->stats.curr_stat, sizeof(dev->stats.curr_stat)); 1617 mutex_unlock(&dev->stats.access_lock); 1618 } 1619 1620 static void lan78xx_get_wol(struct net_device *netdev, 1621 struct ethtool_wolinfo *wol) 1622 { 1623 struct lan78xx_net *dev = netdev_priv(netdev); 1624 int ret; 1625 u32 buf; 1626 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1627 1628 if (usb_autopm_get_interface(dev->intf) < 0) 1629 return; 1630 1631 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 1632 if (unlikely(ret < 0)) { 1633 wol->supported = 0; 1634 wol->wolopts = 0; 1635 } else { 1636 if (buf & USB_CFG_RMT_WKP_) { 1637 wol->supported = WAKE_ALL; 1638 wol->wolopts = pdata->wol; 1639 } else { 1640 wol->supported = 0; 1641 wol->wolopts = 0; 1642 } 1643 } 1644 1645 usb_autopm_put_interface(dev->intf); 1646 } 1647 1648 static int lan78xx_set_wol(struct net_device *netdev, 1649 struct ethtool_wolinfo *wol) 1650 { 1651 struct lan78xx_net *dev = netdev_priv(netdev); 1652 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 1653 int ret; 1654 1655 ret = usb_autopm_get_interface(dev->intf); 1656 if (ret < 0) 1657 return ret; 1658 1659 if (wol->wolopts & ~WAKE_ALL) 1660 return -EINVAL; 1661 1662 pdata->wol = wol->wolopts; 1663 1664 device_set_wakeup_enable(&dev->udev->dev, (bool)wol->wolopts); 1665 1666 phy_ethtool_set_wol(netdev->phydev, wol); 1667 1668 usb_autopm_put_interface(dev->intf); 1669 1670 return ret; 1671 } 1672 1673 static int lan78xx_get_eee(struct net_device *net, struct ethtool_keee *edata) 1674 { 1675 struct lan78xx_net *dev = netdev_priv(net); 1676 struct phy_device *phydev = net->phydev; 1677 int ret; 1678 u32 buf; 1679 1680 ret = usb_autopm_get_interface(dev->intf); 1681 if (ret < 0) 1682 return ret; 1683 1684 ret = phy_ethtool_get_eee(phydev, edata); 1685 if (ret < 0) 1686 goto exit; 1687 1688 ret = lan78xx_read_reg(dev, MAC_CR, &buf); 1689 if (buf & MAC_CR_EEE_EN_) { 1690 /* EEE_TX_LPI_REQ_DLY & tx_lpi_timer are same uSec unit */ 1691 ret = lan78xx_read_reg(dev, EEE_TX_LPI_REQ_DLY, &buf); 1692 edata->tx_lpi_timer = buf; 1693 } else { 1694 edata->tx_lpi_timer = 0; 1695 } 1696 1697 ret = 0; 1698 exit: 1699 usb_autopm_put_interface(dev->intf); 1700 1701 return ret; 1702 } 1703 1704 static int lan78xx_set_eee(struct net_device *net, struct ethtool_keee *edata) 1705 { 1706 struct lan78xx_net *dev = netdev_priv(net); 1707 int ret; 1708 u32 buf; 1709 1710 ret = usb_autopm_get_interface(dev->intf); 1711 if (ret < 0) 1712 return ret; 1713 1714 ret = phy_ethtool_set_eee(net->phydev, edata); 1715 if (ret < 0) 1716 goto out; 1717 1718 buf = (u32)edata->tx_lpi_timer; 1719 ret = lan78xx_write_reg(dev, EEE_TX_LPI_REQ_DLY, buf); 1720 out: 1721 usb_autopm_put_interface(dev->intf); 1722 1723 return ret; 1724 } 1725 1726 static u32 lan78xx_get_link(struct net_device *net) 1727 { 1728 u32 link; 1729 1730 mutex_lock(&net->phydev->lock); 1731 phy_read_status(net->phydev); 1732 link = net->phydev->link; 1733 mutex_unlock(&net->phydev->lock); 1734 1735 return link; 1736 } 1737 1738 static void lan78xx_get_drvinfo(struct net_device *net, 1739 struct ethtool_drvinfo *info) 1740 { 1741 struct lan78xx_net *dev = netdev_priv(net); 1742 1743 strscpy(info->driver, DRIVER_NAME, sizeof(info->driver)); 1744 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info)); 1745 } 1746 1747 static u32 lan78xx_get_msglevel(struct net_device *net) 1748 { 1749 struct lan78xx_net *dev = netdev_priv(net); 1750 1751 return dev->msg_enable; 1752 } 1753 1754 static void lan78xx_set_msglevel(struct net_device *net, u32 level) 1755 { 1756 struct lan78xx_net *dev = netdev_priv(net); 1757 1758 dev->msg_enable = level; 1759 } 1760 1761 static int lan78xx_get_link_ksettings(struct net_device *net, 1762 struct ethtool_link_ksettings *cmd) 1763 { 1764 struct lan78xx_net *dev = netdev_priv(net); 1765 struct phy_device *phydev = net->phydev; 1766 int ret; 1767 1768 ret = usb_autopm_get_interface(dev->intf); 1769 if (ret < 0) 1770 return ret; 1771 1772 phy_ethtool_ksettings_get(phydev, cmd); 1773 1774 usb_autopm_put_interface(dev->intf); 1775 1776 return ret; 1777 } 1778 1779 static int lan78xx_set_link_ksettings(struct net_device *net, 1780 const struct ethtool_link_ksettings *cmd) 1781 { 1782 struct lan78xx_net *dev = netdev_priv(net); 1783 struct phy_device *phydev = net->phydev; 1784 int ret = 0; 1785 int temp; 1786 1787 ret = usb_autopm_get_interface(dev->intf); 1788 if (ret < 0) 1789 return ret; 1790 1791 /* change speed & duplex */ 1792 ret = phy_ethtool_ksettings_set(phydev, cmd); 1793 1794 if (!cmd->base.autoneg) { 1795 /* force link down */ 1796 temp = phy_read(phydev, MII_BMCR); 1797 phy_write(phydev, MII_BMCR, temp | BMCR_LOOPBACK); 1798 mdelay(1); 1799 phy_write(phydev, MII_BMCR, temp); 1800 } 1801 1802 usb_autopm_put_interface(dev->intf); 1803 1804 return ret; 1805 } 1806 1807 static void lan78xx_get_pause(struct net_device *net, 1808 struct ethtool_pauseparam *pause) 1809 { 1810 struct lan78xx_net *dev = netdev_priv(net); 1811 struct phy_device *phydev = net->phydev; 1812 struct ethtool_link_ksettings ecmd; 1813 1814 phy_ethtool_ksettings_get(phydev, &ecmd); 1815 1816 pause->autoneg = dev->fc_autoneg; 1817 1818 if (dev->fc_request_control & FLOW_CTRL_TX) 1819 pause->tx_pause = 1; 1820 1821 if (dev->fc_request_control & FLOW_CTRL_RX) 1822 pause->rx_pause = 1; 1823 } 1824 1825 static int lan78xx_set_pause(struct net_device *net, 1826 struct ethtool_pauseparam *pause) 1827 { 1828 struct lan78xx_net *dev = netdev_priv(net); 1829 struct phy_device *phydev = net->phydev; 1830 struct ethtool_link_ksettings ecmd; 1831 int ret; 1832 1833 phy_ethtool_ksettings_get(phydev, &ecmd); 1834 1835 if (pause->autoneg && !ecmd.base.autoneg) { 1836 ret = -EINVAL; 1837 goto exit; 1838 } 1839 1840 dev->fc_request_control = 0; 1841 if (pause->rx_pause) 1842 dev->fc_request_control |= FLOW_CTRL_RX; 1843 1844 if (pause->tx_pause) 1845 dev->fc_request_control |= FLOW_CTRL_TX; 1846 1847 if (ecmd.base.autoneg) { 1848 __ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, }; 1849 u32 mii_adv; 1850 1851 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 1852 ecmd.link_modes.advertising); 1853 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 1854 ecmd.link_modes.advertising); 1855 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control); 1856 mii_adv_to_linkmode_adv_t(fc, mii_adv); 1857 linkmode_or(ecmd.link_modes.advertising, fc, 1858 ecmd.link_modes.advertising); 1859 1860 phy_ethtool_ksettings_set(phydev, &ecmd); 1861 } 1862 1863 dev->fc_autoneg = pause->autoneg; 1864 1865 ret = 0; 1866 exit: 1867 return ret; 1868 } 1869 1870 static int lan78xx_get_regs_len(struct net_device *netdev) 1871 { 1872 if (!netdev->phydev) 1873 return (sizeof(lan78xx_regs)); 1874 else 1875 return (sizeof(lan78xx_regs) + PHY_REG_SIZE); 1876 } 1877 1878 static void 1879 lan78xx_get_regs(struct net_device *netdev, struct ethtool_regs *regs, 1880 void *buf) 1881 { 1882 u32 *data = buf; 1883 int i, j; 1884 struct lan78xx_net *dev = netdev_priv(netdev); 1885 1886 /* Read Device/MAC registers */ 1887 for (i = 0; i < ARRAY_SIZE(lan78xx_regs); i++) 1888 lan78xx_read_reg(dev, lan78xx_regs[i], &data[i]); 1889 1890 if (!netdev->phydev) 1891 return; 1892 1893 /* Read PHY registers */ 1894 for (j = 0; j < 32; i++, j++) 1895 data[i] = phy_read(netdev->phydev, j); 1896 } 1897 1898 static const struct ethtool_ops lan78xx_ethtool_ops = { 1899 .get_link = lan78xx_get_link, 1900 .nway_reset = phy_ethtool_nway_reset, 1901 .get_drvinfo = lan78xx_get_drvinfo, 1902 .get_msglevel = lan78xx_get_msglevel, 1903 .set_msglevel = lan78xx_set_msglevel, 1904 .get_eeprom_len = lan78xx_ethtool_get_eeprom_len, 1905 .get_eeprom = lan78xx_ethtool_get_eeprom, 1906 .set_eeprom = lan78xx_ethtool_set_eeprom, 1907 .get_ethtool_stats = lan78xx_get_stats, 1908 .get_sset_count = lan78xx_get_sset_count, 1909 .get_strings = lan78xx_get_strings, 1910 .get_wol = lan78xx_get_wol, 1911 .set_wol = lan78xx_set_wol, 1912 .get_ts_info = ethtool_op_get_ts_info, 1913 .get_eee = lan78xx_get_eee, 1914 .set_eee = lan78xx_set_eee, 1915 .get_pauseparam = lan78xx_get_pause, 1916 .set_pauseparam = lan78xx_set_pause, 1917 .get_link_ksettings = lan78xx_get_link_ksettings, 1918 .set_link_ksettings = lan78xx_set_link_ksettings, 1919 .get_regs_len = lan78xx_get_regs_len, 1920 .get_regs = lan78xx_get_regs, 1921 }; 1922 1923 static void lan78xx_init_mac_address(struct lan78xx_net *dev) 1924 { 1925 u32 addr_lo, addr_hi; 1926 u8 addr[6]; 1927 1928 lan78xx_read_reg(dev, RX_ADDRL, &addr_lo); 1929 lan78xx_read_reg(dev, RX_ADDRH, &addr_hi); 1930 1931 addr[0] = addr_lo & 0xFF; 1932 addr[1] = (addr_lo >> 8) & 0xFF; 1933 addr[2] = (addr_lo >> 16) & 0xFF; 1934 addr[3] = (addr_lo >> 24) & 0xFF; 1935 addr[4] = addr_hi & 0xFF; 1936 addr[5] = (addr_hi >> 8) & 0xFF; 1937 1938 if (!is_valid_ether_addr(addr)) { 1939 if (!eth_platform_get_mac_address(&dev->udev->dev, addr)) { 1940 /* valid address present in Device Tree */ 1941 netif_dbg(dev, ifup, dev->net, 1942 "MAC address read from Device Tree"); 1943 } else if (((lan78xx_read_eeprom(dev, EEPROM_MAC_OFFSET, 1944 ETH_ALEN, addr) == 0) || 1945 (lan78xx_read_otp(dev, EEPROM_MAC_OFFSET, 1946 ETH_ALEN, addr) == 0)) && 1947 is_valid_ether_addr(addr)) { 1948 /* eeprom values are valid so use them */ 1949 netif_dbg(dev, ifup, dev->net, 1950 "MAC address read from EEPROM"); 1951 } else { 1952 /* generate random MAC */ 1953 eth_random_addr(addr); 1954 netif_dbg(dev, ifup, dev->net, 1955 "MAC address set to random addr"); 1956 } 1957 1958 addr_lo = addr[0] | (addr[1] << 8) | 1959 (addr[2] << 16) | (addr[3] << 24); 1960 addr_hi = addr[4] | (addr[5] << 8); 1961 1962 lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 1963 lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 1964 } 1965 1966 lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 1967 lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 1968 1969 eth_hw_addr_set(dev->net, addr); 1970 } 1971 1972 /* MDIO read and write wrappers for phylib */ 1973 static int lan78xx_mdiobus_read(struct mii_bus *bus, int phy_id, int idx) 1974 { 1975 struct lan78xx_net *dev = bus->priv; 1976 u32 val, addr; 1977 int ret; 1978 1979 ret = usb_autopm_get_interface(dev->intf); 1980 if (ret < 0) 1981 return ret; 1982 1983 mutex_lock(&dev->phy_mutex); 1984 1985 /* confirm MII not busy */ 1986 ret = lan78xx_phy_wait_not_busy(dev); 1987 if (ret < 0) 1988 goto done; 1989 1990 /* set the address, index & direction (read from PHY) */ 1991 addr = mii_access(phy_id, idx, MII_READ); 1992 ret = lan78xx_write_reg(dev, MII_ACC, addr); 1993 1994 ret = lan78xx_phy_wait_not_busy(dev); 1995 if (ret < 0) 1996 goto done; 1997 1998 ret = lan78xx_read_reg(dev, MII_DATA, &val); 1999 2000 ret = (int)(val & 0xFFFF); 2001 2002 done: 2003 mutex_unlock(&dev->phy_mutex); 2004 usb_autopm_put_interface(dev->intf); 2005 2006 return ret; 2007 } 2008 2009 static int lan78xx_mdiobus_write(struct mii_bus *bus, int phy_id, int idx, 2010 u16 regval) 2011 { 2012 struct lan78xx_net *dev = bus->priv; 2013 u32 val, addr; 2014 int ret; 2015 2016 ret = usb_autopm_get_interface(dev->intf); 2017 if (ret < 0) 2018 return ret; 2019 2020 mutex_lock(&dev->phy_mutex); 2021 2022 /* confirm MII not busy */ 2023 ret = lan78xx_phy_wait_not_busy(dev); 2024 if (ret < 0) 2025 goto done; 2026 2027 val = (u32)regval; 2028 ret = lan78xx_write_reg(dev, MII_DATA, val); 2029 2030 /* set the address, index & direction (write to PHY) */ 2031 addr = mii_access(phy_id, idx, MII_WRITE); 2032 ret = lan78xx_write_reg(dev, MII_ACC, addr); 2033 2034 ret = lan78xx_phy_wait_not_busy(dev); 2035 if (ret < 0) 2036 goto done; 2037 2038 done: 2039 mutex_unlock(&dev->phy_mutex); 2040 usb_autopm_put_interface(dev->intf); 2041 return 0; 2042 } 2043 2044 static int lan78xx_mdio_init(struct lan78xx_net *dev) 2045 { 2046 struct device_node *node; 2047 int ret; 2048 2049 dev->mdiobus = mdiobus_alloc(); 2050 if (!dev->mdiobus) { 2051 netdev_err(dev->net, "can't allocate MDIO bus\n"); 2052 return -ENOMEM; 2053 } 2054 2055 dev->mdiobus->priv = (void *)dev; 2056 dev->mdiobus->read = lan78xx_mdiobus_read; 2057 dev->mdiobus->write = lan78xx_mdiobus_write; 2058 dev->mdiobus->name = "lan78xx-mdiobus"; 2059 dev->mdiobus->parent = &dev->udev->dev; 2060 2061 snprintf(dev->mdiobus->id, MII_BUS_ID_SIZE, "usb-%03d:%03d", 2062 dev->udev->bus->busnum, dev->udev->devnum); 2063 2064 switch (dev->chipid) { 2065 case ID_REV_CHIP_ID_7800_: 2066 case ID_REV_CHIP_ID_7850_: 2067 /* set to internal PHY id */ 2068 dev->mdiobus->phy_mask = ~(1 << 1); 2069 break; 2070 case ID_REV_CHIP_ID_7801_: 2071 /* scan thru PHYAD[2..0] */ 2072 dev->mdiobus->phy_mask = ~(0xFF); 2073 break; 2074 } 2075 2076 node = of_get_child_by_name(dev->udev->dev.of_node, "mdio"); 2077 ret = of_mdiobus_register(dev->mdiobus, node); 2078 of_node_put(node); 2079 if (ret) { 2080 netdev_err(dev->net, "can't register MDIO bus\n"); 2081 goto exit1; 2082 } 2083 2084 netdev_dbg(dev->net, "registered mdiobus bus %s\n", dev->mdiobus->id); 2085 return 0; 2086 exit1: 2087 mdiobus_free(dev->mdiobus); 2088 return ret; 2089 } 2090 2091 static void lan78xx_remove_mdio(struct lan78xx_net *dev) 2092 { 2093 mdiobus_unregister(dev->mdiobus); 2094 mdiobus_free(dev->mdiobus); 2095 } 2096 2097 static void lan78xx_link_status_change(struct net_device *net) 2098 { 2099 struct lan78xx_net *dev = netdev_priv(net); 2100 struct phy_device *phydev = net->phydev; 2101 u32 data; 2102 int ret; 2103 2104 ret = lan78xx_read_reg(dev, MAC_CR, &data); 2105 if (ret < 0) 2106 return; 2107 2108 if (phydev->enable_tx_lpi) 2109 data |= MAC_CR_EEE_EN_; 2110 else 2111 data &= ~MAC_CR_EEE_EN_; 2112 lan78xx_write_reg(dev, MAC_CR, data); 2113 2114 phy_print_status(phydev); 2115 } 2116 2117 static int irq_map(struct irq_domain *d, unsigned int irq, 2118 irq_hw_number_t hwirq) 2119 { 2120 struct irq_domain_data *data = d->host_data; 2121 2122 irq_set_chip_data(irq, data); 2123 irq_set_chip_and_handler(irq, data->irqchip, data->irq_handler); 2124 irq_set_noprobe(irq); 2125 2126 return 0; 2127 } 2128 2129 static void irq_unmap(struct irq_domain *d, unsigned int irq) 2130 { 2131 irq_set_chip_and_handler(irq, NULL, NULL); 2132 irq_set_chip_data(irq, NULL); 2133 } 2134 2135 static const struct irq_domain_ops chip_domain_ops = { 2136 .map = irq_map, 2137 .unmap = irq_unmap, 2138 }; 2139 2140 static void lan78xx_irq_mask(struct irq_data *irqd) 2141 { 2142 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2143 2144 data->irqenable &= ~BIT(irqd_to_hwirq(irqd)); 2145 } 2146 2147 static void lan78xx_irq_unmask(struct irq_data *irqd) 2148 { 2149 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2150 2151 data->irqenable |= BIT(irqd_to_hwirq(irqd)); 2152 } 2153 2154 static void lan78xx_irq_bus_lock(struct irq_data *irqd) 2155 { 2156 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2157 2158 mutex_lock(&data->irq_lock); 2159 } 2160 2161 static void lan78xx_irq_bus_sync_unlock(struct irq_data *irqd) 2162 { 2163 struct irq_domain_data *data = irq_data_get_irq_chip_data(irqd); 2164 struct lan78xx_net *dev = 2165 container_of(data, struct lan78xx_net, domain_data); 2166 u32 buf; 2167 2168 /* call register access here because irq_bus_lock & irq_bus_sync_unlock 2169 * are only two callbacks executed in non-atomic contex. 2170 */ 2171 lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2172 if (buf != data->irqenable) 2173 lan78xx_write_reg(dev, INT_EP_CTL, data->irqenable); 2174 2175 mutex_unlock(&data->irq_lock); 2176 } 2177 2178 static struct irq_chip lan78xx_irqchip = { 2179 .name = "lan78xx-irqs", 2180 .irq_mask = lan78xx_irq_mask, 2181 .irq_unmask = lan78xx_irq_unmask, 2182 .irq_bus_lock = lan78xx_irq_bus_lock, 2183 .irq_bus_sync_unlock = lan78xx_irq_bus_sync_unlock, 2184 }; 2185 2186 static int lan78xx_setup_irq_domain(struct lan78xx_net *dev) 2187 { 2188 struct device_node *of_node; 2189 struct irq_domain *irqdomain; 2190 unsigned int irqmap = 0; 2191 u32 buf; 2192 int ret = 0; 2193 2194 of_node = dev->udev->dev.parent->of_node; 2195 2196 mutex_init(&dev->domain_data.irq_lock); 2197 2198 lan78xx_read_reg(dev, INT_EP_CTL, &buf); 2199 dev->domain_data.irqenable = buf; 2200 2201 dev->domain_data.irqchip = &lan78xx_irqchip; 2202 dev->domain_data.irq_handler = handle_simple_irq; 2203 2204 irqdomain = irq_domain_add_simple(of_node, MAX_INT_EP, 0, 2205 &chip_domain_ops, &dev->domain_data); 2206 if (irqdomain) { 2207 /* create mapping for PHY interrupt */ 2208 irqmap = irq_create_mapping(irqdomain, INT_EP_PHY); 2209 if (!irqmap) { 2210 irq_domain_remove(irqdomain); 2211 2212 irqdomain = NULL; 2213 ret = -EINVAL; 2214 } 2215 } else { 2216 ret = -EINVAL; 2217 } 2218 2219 dev->domain_data.irqdomain = irqdomain; 2220 dev->domain_data.phyirq = irqmap; 2221 2222 return ret; 2223 } 2224 2225 static void lan78xx_remove_irq_domain(struct lan78xx_net *dev) 2226 { 2227 if (dev->domain_data.phyirq > 0) { 2228 irq_dispose_mapping(dev->domain_data.phyirq); 2229 2230 if (dev->domain_data.irqdomain) 2231 irq_domain_remove(dev->domain_data.irqdomain); 2232 } 2233 dev->domain_data.phyirq = 0; 2234 dev->domain_data.irqdomain = NULL; 2235 } 2236 2237 static int lan8835_fixup(struct phy_device *phydev) 2238 { 2239 int buf; 2240 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev); 2241 2242 /* LED2/PME_N/IRQ_N/RGMII_ID pin to IRQ_N mode */ 2243 buf = phy_read_mmd(phydev, MDIO_MMD_PCS, 0x8010); 2244 buf &= ~0x1800; 2245 buf |= 0x0800; 2246 phy_write_mmd(phydev, MDIO_MMD_PCS, 0x8010, buf); 2247 2248 /* RGMII MAC TXC Delay Enable */ 2249 lan78xx_write_reg(dev, MAC_RGMII_ID, 2250 MAC_RGMII_ID_TXC_DELAY_EN_); 2251 2252 /* RGMII TX DLL Tune Adjust */ 2253 lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2254 2255 dev->interface = PHY_INTERFACE_MODE_RGMII_TXID; 2256 2257 return 1; 2258 } 2259 2260 static int ksz9031rnx_fixup(struct phy_device *phydev) 2261 { 2262 struct lan78xx_net *dev = netdev_priv(phydev->attached_dev); 2263 2264 /* Micrel9301RNX PHY configuration */ 2265 /* RGMII Control Signal Pad Skew */ 2266 phy_write_mmd(phydev, MDIO_MMD_WIS, 4, 0x0077); 2267 /* RGMII RX Data Pad Skew */ 2268 phy_write_mmd(phydev, MDIO_MMD_WIS, 5, 0x7777); 2269 /* RGMII RX Clock Pad Skew */ 2270 phy_write_mmd(phydev, MDIO_MMD_WIS, 8, 0x1FF); 2271 2272 dev->interface = PHY_INTERFACE_MODE_RGMII_RXID; 2273 2274 return 1; 2275 } 2276 2277 static struct phy_device *lan7801_phy_init(struct lan78xx_net *dev) 2278 { 2279 u32 buf; 2280 int ret; 2281 struct fixed_phy_status fphy_status = { 2282 .link = 1, 2283 .speed = SPEED_1000, 2284 .duplex = DUPLEX_FULL, 2285 }; 2286 struct phy_device *phydev; 2287 2288 phydev = phy_find_first(dev->mdiobus); 2289 if (!phydev) { 2290 netdev_dbg(dev->net, "PHY Not Found!! Registering Fixed PHY\n"); 2291 phydev = fixed_phy_register(PHY_POLL, &fphy_status, NULL); 2292 if (IS_ERR(phydev)) { 2293 netdev_err(dev->net, "No PHY/fixed_PHY found\n"); 2294 return NULL; 2295 } 2296 netdev_dbg(dev->net, "Registered FIXED PHY\n"); 2297 dev->interface = PHY_INTERFACE_MODE_RGMII; 2298 ret = lan78xx_write_reg(dev, MAC_RGMII_ID, 2299 MAC_RGMII_ID_TXC_DELAY_EN_); 2300 ret = lan78xx_write_reg(dev, RGMII_TX_BYP_DLL, 0x3D00); 2301 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 2302 buf |= HW_CFG_CLK125_EN_; 2303 buf |= HW_CFG_REFCLK25_EN_; 2304 ret = lan78xx_write_reg(dev, HW_CFG, buf); 2305 } else { 2306 if (!phydev->drv) { 2307 netdev_err(dev->net, "no PHY driver found\n"); 2308 return NULL; 2309 } 2310 dev->interface = PHY_INTERFACE_MODE_RGMII; 2311 /* external PHY fixup for KSZ9031RNX */ 2312 ret = phy_register_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0, 2313 ksz9031rnx_fixup); 2314 if (ret < 0) { 2315 netdev_err(dev->net, "Failed to register fixup for PHY_KSZ9031RNX\n"); 2316 return NULL; 2317 } 2318 /* external PHY fixup for LAN8835 */ 2319 ret = phy_register_fixup_for_uid(PHY_LAN8835, 0xfffffff0, 2320 lan8835_fixup); 2321 if (ret < 0) { 2322 netdev_err(dev->net, "Failed to register fixup for PHY_LAN8835\n"); 2323 return NULL; 2324 } 2325 /* add more external PHY fixup here if needed */ 2326 2327 phydev->is_internal = false; 2328 } 2329 return phydev; 2330 } 2331 2332 static int lan78xx_phy_init(struct lan78xx_net *dev) 2333 { 2334 __ETHTOOL_DECLARE_LINK_MODE_MASK(fc) = { 0, }; 2335 int ret; 2336 u32 mii_adv; 2337 struct phy_device *phydev; 2338 2339 switch (dev->chipid) { 2340 case ID_REV_CHIP_ID_7801_: 2341 phydev = lan7801_phy_init(dev); 2342 if (!phydev) { 2343 netdev_err(dev->net, "lan7801: PHY Init Failed"); 2344 return -EIO; 2345 } 2346 break; 2347 2348 case ID_REV_CHIP_ID_7800_: 2349 case ID_REV_CHIP_ID_7850_: 2350 phydev = phy_find_first(dev->mdiobus); 2351 if (!phydev) { 2352 netdev_err(dev->net, "no PHY found\n"); 2353 return -EIO; 2354 } 2355 phydev->is_internal = true; 2356 dev->interface = PHY_INTERFACE_MODE_GMII; 2357 break; 2358 2359 default: 2360 netdev_err(dev->net, "Unknown CHIP ID found\n"); 2361 return -EIO; 2362 } 2363 2364 /* if phyirq is not set, use polling mode in phylib */ 2365 if (dev->domain_data.phyirq > 0) 2366 phydev->irq = dev->domain_data.phyirq; 2367 else 2368 phydev->irq = PHY_POLL; 2369 netdev_dbg(dev->net, "phydev->irq = %d\n", phydev->irq); 2370 2371 /* set to AUTOMDIX */ 2372 phydev->mdix = ETH_TP_MDI_AUTO; 2373 2374 ret = phy_connect_direct(dev->net, phydev, 2375 lan78xx_link_status_change, 2376 dev->interface); 2377 if (ret) { 2378 netdev_err(dev->net, "can't attach PHY to %s\n", 2379 dev->mdiobus->id); 2380 if (dev->chipid == ID_REV_CHIP_ID_7801_) { 2381 if (phy_is_pseudo_fixed_link(phydev)) { 2382 fixed_phy_unregister(phydev); 2383 } else { 2384 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 2385 0xfffffff0); 2386 phy_unregister_fixup_for_uid(PHY_LAN8835, 2387 0xfffffff0); 2388 } 2389 } 2390 return -EIO; 2391 } 2392 2393 /* MAC doesn't support 1000T Half */ 2394 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 2395 2396 /* support both flow controls */ 2397 dev->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 2398 linkmode_clear_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2399 phydev->advertising); 2400 linkmode_clear_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2401 phydev->advertising); 2402 mii_adv = (u32)mii_advertise_flowctrl(dev->fc_request_control); 2403 mii_adv_to_linkmode_adv_t(fc, mii_adv); 2404 linkmode_or(phydev->advertising, fc, phydev->advertising); 2405 2406 phy_support_eee(phydev); 2407 2408 if (phydev->mdio.dev.of_node) { 2409 u32 reg; 2410 int len; 2411 2412 len = of_property_count_elems_of_size(phydev->mdio.dev.of_node, 2413 "microchip,led-modes", 2414 sizeof(u32)); 2415 if (len >= 0) { 2416 /* Ensure the appropriate LEDs are enabled */ 2417 lan78xx_read_reg(dev, HW_CFG, ®); 2418 reg &= ~(HW_CFG_LED0_EN_ | 2419 HW_CFG_LED1_EN_ | 2420 HW_CFG_LED2_EN_ | 2421 HW_CFG_LED3_EN_); 2422 reg |= (len > 0) * HW_CFG_LED0_EN_ | 2423 (len > 1) * HW_CFG_LED1_EN_ | 2424 (len > 2) * HW_CFG_LED2_EN_ | 2425 (len > 3) * HW_CFG_LED3_EN_; 2426 lan78xx_write_reg(dev, HW_CFG, reg); 2427 } 2428 } 2429 2430 genphy_config_aneg(phydev); 2431 2432 dev->fc_autoneg = phydev->autoneg; 2433 2434 return 0; 2435 } 2436 2437 static int lan78xx_set_rx_max_frame_length(struct lan78xx_net *dev, int size) 2438 { 2439 u32 buf; 2440 bool rxenabled; 2441 2442 lan78xx_read_reg(dev, MAC_RX, &buf); 2443 2444 rxenabled = ((buf & MAC_RX_RXEN_) != 0); 2445 2446 if (rxenabled) { 2447 buf &= ~MAC_RX_RXEN_; 2448 lan78xx_write_reg(dev, MAC_RX, buf); 2449 } 2450 2451 /* add 4 to size for FCS */ 2452 buf &= ~MAC_RX_MAX_SIZE_MASK_; 2453 buf |= (((size + 4) << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 2454 2455 lan78xx_write_reg(dev, MAC_RX, buf); 2456 2457 if (rxenabled) { 2458 buf |= MAC_RX_RXEN_; 2459 lan78xx_write_reg(dev, MAC_RX, buf); 2460 } 2461 2462 return 0; 2463 } 2464 2465 static int unlink_urbs(struct lan78xx_net *dev, struct sk_buff_head *q) 2466 { 2467 struct sk_buff *skb; 2468 unsigned long flags; 2469 int count = 0; 2470 2471 spin_lock_irqsave(&q->lock, flags); 2472 while (!skb_queue_empty(q)) { 2473 struct skb_data *entry; 2474 struct urb *urb; 2475 int ret; 2476 2477 skb_queue_walk(q, skb) { 2478 entry = (struct skb_data *)skb->cb; 2479 if (entry->state != unlink_start) 2480 goto found; 2481 } 2482 break; 2483 found: 2484 entry->state = unlink_start; 2485 urb = entry->urb; 2486 2487 /* Get reference count of the URB to avoid it to be 2488 * freed during usb_unlink_urb, which may trigger 2489 * use-after-free problem inside usb_unlink_urb since 2490 * usb_unlink_urb is always racing with .complete 2491 * handler(include defer_bh). 2492 */ 2493 usb_get_urb(urb); 2494 spin_unlock_irqrestore(&q->lock, flags); 2495 /* during some PM-driven resume scenarios, 2496 * these (async) unlinks complete immediately 2497 */ 2498 ret = usb_unlink_urb(urb); 2499 if (ret != -EINPROGRESS && ret != 0) 2500 netdev_dbg(dev->net, "unlink urb err, %d\n", ret); 2501 else 2502 count++; 2503 usb_put_urb(urb); 2504 spin_lock_irqsave(&q->lock, flags); 2505 } 2506 spin_unlock_irqrestore(&q->lock, flags); 2507 return count; 2508 } 2509 2510 static int lan78xx_change_mtu(struct net_device *netdev, int new_mtu) 2511 { 2512 struct lan78xx_net *dev = netdev_priv(netdev); 2513 int max_frame_len = RX_MAX_FRAME_LEN(new_mtu); 2514 int ret; 2515 2516 /* no second zero-length packet read wanted after mtu-sized packets */ 2517 if ((max_frame_len % dev->maxpacket) == 0) 2518 return -EDOM; 2519 2520 ret = usb_autopm_get_interface(dev->intf); 2521 if (ret < 0) 2522 return ret; 2523 2524 ret = lan78xx_set_rx_max_frame_length(dev, max_frame_len); 2525 if (!ret) 2526 WRITE_ONCE(netdev->mtu, new_mtu); 2527 2528 usb_autopm_put_interface(dev->intf); 2529 2530 return ret; 2531 } 2532 2533 static int lan78xx_set_mac_addr(struct net_device *netdev, void *p) 2534 { 2535 struct lan78xx_net *dev = netdev_priv(netdev); 2536 struct sockaddr *addr = p; 2537 u32 addr_lo, addr_hi; 2538 2539 if (netif_running(netdev)) 2540 return -EBUSY; 2541 2542 if (!is_valid_ether_addr(addr->sa_data)) 2543 return -EADDRNOTAVAIL; 2544 2545 eth_hw_addr_set(netdev, addr->sa_data); 2546 2547 addr_lo = netdev->dev_addr[0] | 2548 netdev->dev_addr[1] << 8 | 2549 netdev->dev_addr[2] << 16 | 2550 netdev->dev_addr[3] << 24; 2551 addr_hi = netdev->dev_addr[4] | 2552 netdev->dev_addr[5] << 8; 2553 2554 lan78xx_write_reg(dev, RX_ADDRL, addr_lo); 2555 lan78xx_write_reg(dev, RX_ADDRH, addr_hi); 2556 2557 /* Added to support MAC address changes */ 2558 lan78xx_write_reg(dev, MAF_LO(0), addr_lo); 2559 lan78xx_write_reg(dev, MAF_HI(0), addr_hi | MAF_HI_VALID_); 2560 2561 return 0; 2562 } 2563 2564 /* Enable or disable Rx checksum offload engine */ 2565 static int lan78xx_set_features(struct net_device *netdev, 2566 netdev_features_t features) 2567 { 2568 struct lan78xx_net *dev = netdev_priv(netdev); 2569 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 2570 unsigned long flags; 2571 2572 spin_lock_irqsave(&pdata->rfe_ctl_lock, flags); 2573 2574 if (features & NETIF_F_RXCSUM) { 2575 pdata->rfe_ctl |= RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_; 2576 pdata->rfe_ctl |= RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_; 2577 } else { 2578 pdata->rfe_ctl &= ~(RFE_CTL_TCPUDP_COE_ | RFE_CTL_IP_COE_); 2579 pdata->rfe_ctl &= ~(RFE_CTL_ICMP_COE_ | RFE_CTL_IGMP_COE_); 2580 } 2581 2582 if (features & NETIF_F_HW_VLAN_CTAG_RX) 2583 pdata->rfe_ctl |= RFE_CTL_VLAN_STRIP_; 2584 else 2585 pdata->rfe_ctl &= ~RFE_CTL_VLAN_STRIP_; 2586 2587 if (features & NETIF_F_HW_VLAN_CTAG_FILTER) 2588 pdata->rfe_ctl |= RFE_CTL_VLAN_FILTER_; 2589 else 2590 pdata->rfe_ctl &= ~RFE_CTL_VLAN_FILTER_; 2591 2592 spin_unlock_irqrestore(&pdata->rfe_ctl_lock, flags); 2593 2594 lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 2595 2596 return 0; 2597 } 2598 2599 static void lan78xx_deferred_vlan_write(struct work_struct *param) 2600 { 2601 struct lan78xx_priv *pdata = 2602 container_of(param, struct lan78xx_priv, set_vlan); 2603 struct lan78xx_net *dev = pdata->dev; 2604 2605 lan78xx_dataport_write(dev, DP_SEL_RSEL_VLAN_DA_, 0, 2606 DP_SEL_VHF_VLAN_LEN, pdata->vlan_table); 2607 } 2608 2609 static int lan78xx_vlan_rx_add_vid(struct net_device *netdev, 2610 __be16 proto, u16 vid) 2611 { 2612 struct lan78xx_net *dev = netdev_priv(netdev); 2613 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 2614 u16 vid_bit_index; 2615 u16 vid_dword_index; 2616 2617 vid_dword_index = (vid >> 5) & 0x7F; 2618 vid_bit_index = vid & 0x1F; 2619 2620 pdata->vlan_table[vid_dword_index] |= (1 << vid_bit_index); 2621 2622 /* defer register writes to a sleepable context */ 2623 schedule_work(&pdata->set_vlan); 2624 2625 return 0; 2626 } 2627 2628 static int lan78xx_vlan_rx_kill_vid(struct net_device *netdev, 2629 __be16 proto, u16 vid) 2630 { 2631 struct lan78xx_net *dev = netdev_priv(netdev); 2632 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 2633 u16 vid_bit_index; 2634 u16 vid_dword_index; 2635 2636 vid_dword_index = (vid >> 5) & 0x7F; 2637 vid_bit_index = vid & 0x1F; 2638 2639 pdata->vlan_table[vid_dword_index] &= ~(1 << vid_bit_index); 2640 2641 /* defer register writes to a sleepable context */ 2642 schedule_work(&pdata->set_vlan); 2643 2644 return 0; 2645 } 2646 2647 static void lan78xx_init_ltm(struct lan78xx_net *dev) 2648 { 2649 int ret; 2650 u32 buf; 2651 u32 regs[6] = { 0 }; 2652 2653 ret = lan78xx_read_reg(dev, USB_CFG1, &buf); 2654 if (buf & USB_CFG1_LTM_ENABLE_) { 2655 u8 temp[2]; 2656 /* Get values from EEPROM first */ 2657 if (lan78xx_read_eeprom(dev, 0x3F, 2, temp) == 0) { 2658 if (temp[0] == 24) { 2659 ret = lan78xx_read_raw_eeprom(dev, 2660 temp[1] * 2, 2661 24, 2662 (u8 *)regs); 2663 if (ret < 0) 2664 return; 2665 } 2666 } else if (lan78xx_read_otp(dev, 0x3F, 2, temp) == 0) { 2667 if (temp[0] == 24) { 2668 ret = lan78xx_read_raw_otp(dev, 2669 temp[1] * 2, 2670 24, 2671 (u8 *)regs); 2672 if (ret < 0) 2673 return; 2674 } 2675 } 2676 } 2677 2678 lan78xx_write_reg(dev, LTM_BELT_IDLE0, regs[0]); 2679 lan78xx_write_reg(dev, LTM_BELT_IDLE1, regs[1]); 2680 lan78xx_write_reg(dev, LTM_BELT_ACT0, regs[2]); 2681 lan78xx_write_reg(dev, LTM_BELT_ACT1, regs[3]); 2682 lan78xx_write_reg(dev, LTM_INACTIVE0, regs[4]); 2683 lan78xx_write_reg(dev, LTM_INACTIVE1, regs[5]); 2684 } 2685 2686 static int lan78xx_urb_config_init(struct lan78xx_net *dev) 2687 { 2688 int result = 0; 2689 2690 switch (dev->udev->speed) { 2691 case USB_SPEED_SUPER: 2692 dev->rx_urb_size = RX_SS_URB_SIZE; 2693 dev->tx_urb_size = TX_SS_URB_SIZE; 2694 dev->n_rx_urbs = RX_SS_URB_NUM; 2695 dev->n_tx_urbs = TX_SS_URB_NUM; 2696 dev->bulk_in_delay = SS_BULK_IN_DELAY; 2697 dev->burst_cap = SS_BURST_CAP_SIZE / SS_USB_PKT_SIZE; 2698 break; 2699 case USB_SPEED_HIGH: 2700 dev->rx_urb_size = RX_HS_URB_SIZE; 2701 dev->tx_urb_size = TX_HS_URB_SIZE; 2702 dev->n_rx_urbs = RX_HS_URB_NUM; 2703 dev->n_tx_urbs = TX_HS_URB_NUM; 2704 dev->bulk_in_delay = HS_BULK_IN_DELAY; 2705 dev->burst_cap = HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 2706 break; 2707 case USB_SPEED_FULL: 2708 dev->rx_urb_size = RX_FS_URB_SIZE; 2709 dev->tx_urb_size = TX_FS_URB_SIZE; 2710 dev->n_rx_urbs = RX_FS_URB_NUM; 2711 dev->n_tx_urbs = TX_FS_URB_NUM; 2712 dev->bulk_in_delay = FS_BULK_IN_DELAY; 2713 dev->burst_cap = FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 2714 break; 2715 default: 2716 netdev_warn(dev->net, "USB bus speed not supported\n"); 2717 result = -EIO; 2718 break; 2719 } 2720 2721 return result; 2722 } 2723 2724 static int lan78xx_start_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enable) 2725 { 2726 return lan78xx_update_reg(dev, reg, hw_enable, hw_enable); 2727 } 2728 2729 static int lan78xx_stop_hw(struct lan78xx_net *dev, u32 reg, u32 hw_enabled, 2730 u32 hw_disabled) 2731 { 2732 unsigned long timeout; 2733 bool stopped = true; 2734 int ret; 2735 u32 buf; 2736 2737 /* Stop the h/w block (if not already stopped) */ 2738 2739 ret = lan78xx_read_reg(dev, reg, &buf); 2740 if (ret < 0) 2741 return ret; 2742 2743 if (buf & hw_enabled) { 2744 buf &= ~hw_enabled; 2745 2746 ret = lan78xx_write_reg(dev, reg, buf); 2747 if (ret < 0) 2748 return ret; 2749 2750 stopped = false; 2751 timeout = jiffies + HW_DISABLE_TIMEOUT; 2752 do { 2753 ret = lan78xx_read_reg(dev, reg, &buf); 2754 if (ret < 0) 2755 return ret; 2756 2757 if (buf & hw_disabled) 2758 stopped = true; 2759 else 2760 msleep(HW_DISABLE_DELAY_MS); 2761 } while (!stopped && !time_after(jiffies, timeout)); 2762 } 2763 2764 ret = stopped ? 0 : -ETIME; 2765 2766 return ret; 2767 } 2768 2769 static int lan78xx_flush_fifo(struct lan78xx_net *dev, u32 reg, u32 fifo_flush) 2770 { 2771 return lan78xx_update_reg(dev, reg, fifo_flush, fifo_flush); 2772 } 2773 2774 static int lan78xx_start_tx_path(struct lan78xx_net *dev) 2775 { 2776 int ret; 2777 2778 netif_dbg(dev, drv, dev->net, "start tx path"); 2779 2780 /* Start the MAC transmitter */ 2781 2782 ret = lan78xx_start_hw(dev, MAC_TX, MAC_TX_TXEN_); 2783 if (ret < 0) 2784 return ret; 2785 2786 /* Start the Tx FIFO */ 2787 2788 ret = lan78xx_start_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_); 2789 if (ret < 0) 2790 return ret; 2791 2792 return 0; 2793 } 2794 2795 static int lan78xx_stop_tx_path(struct lan78xx_net *dev) 2796 { 2797 int ret; 2798 2799 netif_dbg(dev, drv, dev->net, "stop tx path"); 2800 2801 /* Stop the Tx FIFO */ 2802 2803 ret = lan78xx_stop_hw(dev, FCT_TX_CTL, FCT_TX_CTL_EN_, FCT_TX_CTL_DIS_); 2804 if (ret < 0) 2805 return ret; 2806 2807 /* Stop the MAC transmitter */ 2808 2809 ret = lan78xx_stop_hw(dev, MAC_TX, MAC_TX_TXEN_, MAC_TX_TXD_); 2810 if (ret < 0) 2811 return ret; 2812 2813 return 0; 2814 } 2815 2816 /* The caller must ensure the Tx path is stopped before calling 2817 * lan78xx_flush_tx_fifo(). 2818 */ 2819 static int lan78xx_flush_tx_fifo(struct lan78xx_net *dev) 2820 { 2821 return lan78xx_flush_fifo(dev, FCT_TX_CTL, FCT_TX_CTL_RST_); 2822 } 2823 2824 static int lan78xx_start_rx_path(struct lan78xx_net *dev) 2825 { 2826 int ret; 2827 2828 netif_dbg(dev, drv, dev->net, "start rx path"); 2829 2830 /* Start the Rx FIFO */ 2831 2832 ret = lan78xx_start_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_); 2833 if (ret < 0) 2834 return ret; 2835 2836 /* Start the MAC receiver*/ 2837 2838 ret = lan78xx_start_hw(dev, MAC_RX, MAC_RX_RXEN_); 2839 if (ret < 0) 2840 return ret; 2841 2842 return 0; 2843 } 2844 2845 static int lan78xx_stop_rx_path(struct lan78xx_net *dev) 2846 { 2847 int ret; 2848 2849 netif_dbg(dev, drv, dev->net, "stop rx path"); 2850 2851 /* Stop the MAC receiver */ 2852 2853 ret = lan78xx_stop_hw(dev, MAC_RX, MAC_RX_RXEN_, MAC_RX_RXD_); 2854 if (ret < 0) 2855 return ret; 2856 2857 /* Stop the Rx FIFO */ 2858 2859 ret = lan78xx_stop_hw(dev, FCT_RX_CTL, FCT_RX_CTL_EN_, FCT_RX_CTL_DIS_); 2860 if (ret < 0) 2861 return ret; 2862 2863 return 0; 2864 } 2865 2866 /* The caller must ensure the Rx path is stopped before calling 2867 * lan78xx_flush_rx_fifo(). 2868 */ 2869 static int lan78xx_flush_rx_fifo(struct lan78xx_net *dev) 2870 { 2871 return lan78xx_flush_fifo(dev, FCT_RX_CTL, FCT_RX_CTL_RST_); 2872 } 2873 2874 static int lan78xx_reset(struct lan78xx_net *dev) 2875 { 2876 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 2877 unsigned long timeout; 2878 int ret; 2879 u32 buf; 2880 u8 sig; 2881 2882 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 2883 if (ret < 0) 2884 return ret; 2885 2886 buf |= HW_CFG_LRST_; 2887 2888 ret = lan78xx_write_reg(dev, HW_CFG, buf); 2889 if (ret < 0) 2890 return ret; 2891 2892 timeout = jiffies + HZ; 2893 do { 2894 mdelay(1); 2895 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 2896 if (ret < 0) 2897 return ret; 2898 2899 if (time_after(jiffies, timeout)) { 2900 netdev_warn(dev->net, 2901 "timeout on completion of LiteReset"); 2902 ret = -ETIMEDOUT; 2903 return ret; 2904 } 2905 } while (buf & HW_CFG_LRST_); 2906 2907 lan78xx_init_mac_address(dev); 2908 2909 /* save DEVID for later usage */ 2910 ret = lan78xx_read_reg(dev, ID_REV, &buf); 2911 if (ret < 0) 2912 return ret; 2913 2914 dev->chipid = (buf & ID_REV_CHIP_ID_MASK_) >> 16; 2915 dev->chiprev = buf & ID_REV_CHIP_REV_MASK_; 2916 2917 /* Respond to the IN token with a NAK */ 2918 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 2919 if (ret < 0) 2920 return ret; 2921 2922 buf |= USB_CFG_BIR_; 2923 2924 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 2925 if (ret < 0) 2926 return ret; 2927 2928 /* Init LTM */ 2929 lan78xx_init_ltm(dev); 2930 2931 ret = lan78xx_write_reg(dev, BURST_CAP, dev->burst_cap); 2932 if (ret < 0) 2933 return ret; 2934 2935 ret = lan78xx_write_reg(dev, BULK_IN_DLY, dev->bulk_in_delay); 2936 if (ret < 0) 2937 return ret; 2938 2939 ret = lan78xx_read_reg(dev, HW_CFG, &buf); 2940 if (ret < 0) 2941 return ret; 2942 2943 buf |= HW_CFG_MEF_; 2944 2945 ret = lan78xx_write_reg(dev, HW_CFG, buf); 2946 if (ret < 0) 2947 return ret; 2948 2949 ret = lan78xx_read_reg(dev, USB_CFG0, &buf); 2950 if (ret < 0) 2951 return ret; 2952 2953 buf |= USB_CFG_BCE_; 2954 2955 ret = lan78xx_write_reg(dev, USB_CFG0, buf); 2956 if (ret < 0) 2957 return ret; 2958 2959 /* set FIFO sizes */ 2960 buf = (MAX_RX_FIFO_SIZE - 512) / 512; 2961 2962 ret = lan78xx_write_reg(dev, FCT_RX_FIFO_END, buf); 2963 if (ret < 0) 2964 return ret; 2965 2966 buf = (MAX_TX_FIFO_SIZE - 512) / 512; 2967 2968 ret = lan78xx_write_reg(dev, FCT_TX_FIFO_END, buf); 2969 if (ret < 0) 2970 return ret; 2971 2972 ret = lan78xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); 2973 if (ret < 0) 2974 return ret; 2975 2976 ret = lan78xx_write_reg(dev, FLOW, 0); 2977 if (ret < 0) 2978 return ret; 2979 2980 ret = lan78xx_write_reg(dev, FCT_FLOW, 0); 2981 if (ret < 0) 2982 return ret; 2983 2984 /* Don't need rfe_ctl_lock during initialisation */ 2985 ret = lan78xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); 2986 if (ret < 0) 2987 return ret; 2988 2989 pdata->rfe_ctl |= RFE_CTL_BCAST_EN_ | RFE_CTL_DA_PERFECT_; 2990 2991 ret = lan78xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); 2992 if (ret < 0) 2993 return ret; 2994 2995 /* Enable or disable checksum offload engines */ 2996 ret = lan78xx_set_features(dev->net, dev->net->features); 2997 if (ret < 0) 2998 return ret; 2999 3000 lan78xx_set_multicast(dev->net); 3001 3002 /* reset PHY */ 3003 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3004 if (ret < 0) 3005 return ret; 3006 3007 buf |= PMT_CTL_PHY_RST_; 3008 3009 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 3010 if (ret < 0) 3011 return ret; 3012 3013 timeout = jiffies + HZ; 3014 do { 3015 mdelay(1); 3016 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 3017 if (ret < 0) 3018 return ret; 3019 3020 if (time_after(jiffies, timeout)) { 3021 netdev_warn(dev->net, "timeout waiting for PHY Reset"); 3022 ret = -ETIMEDOUT; 3023 return ret; 3024 } 3025 } while ((buf & PMT_CTL_PHY_RST_) || !(buf & PMT_CTL_READY_)); 3026 3027 ret = lan78xx_read_reg(dev, MAC_CR, &buf); 3028 if (ret < 0) 3029 return ret; 3030 3031 /* LAN7801 only has RGMII mode */ 3032 if (dev->chipid == ID_REV_CHIP_ID_7801_) 3033 buf &= ~MAC_CR_GMII_EN_; 3034 3035 if (dev->chipid == ID_REV_CHIP_ID_7800_ || 3036 dev->chipid == ID_REV_CHIP_ID_7850_) { 3037 ret = lan78xx_read_raw_eeprom(dev, 0, 1, &sig); 3038 if (!ret && sig != EEPROM_INDICATOR) { 3039 /* Implies there is no external eeprom. Set mac speed */ 3040 netdev_info(dev->net, "No External EEPROM. Setting MAC Speed\n"); 3041 buf |= MAC_CR_AUTO_DUPLEX_ | MAC_CR_AUTO_SPEED_; 3042 } 3043 } 3044 ret = lan78xx_write_reg(dev, MAC_CR, buf); 3045 if (ret < 0) 3046 return ret; 3047 3048 ret = lan78xx_set_rx_max_frame_length(dev, 3049 RX_MAX_FRAME_LEN(dev->net->mtu)); 3050 3051 return ret; 3052 } 3053 3054 static void lan78xx_init_stats(struct lan78xx_net *dev) 3055 { 3056 u32 *p; 3057 int i; 3058 3059 /* initialize for stats update 3060 * some counters are 20bits and some are 32bits 3061 */ 3062 p = (u32 *)&dev->stats.rollover_max; 3063 for (i = 0; i < (sizeof(dev->stats.rollover_max) / (sizeof(u32))); i++) 3064 p[i] = 0xFFFFF; 3065 3066 dev->stats.rollover_max.rx_unicast_byte_count = 0xFFFFFFFF; 3067 dev->stats.rollover_max.rx_broadcast_byte_count = 0xFFFFFFFF; 3068 dev->stats.rollover_max.rx_multicast_byte_count = 0xFFFFFFFF; 3069 dev->stats.rollover_max.eee_rx_lpi_transitions = 0xFFFFFFFF; 3070 dev->stats.rollover_max.eee_rx_lpi_time = 0xFFFFFFFF; 3071 dev->stats.rollover_max.tx_unicast_byte_count = 0xFFFFFFFF; 3072 dev->stats.rollover_max.tx_broadcast_byte_count = 0xFFFFFFFF; 3073 dev->stats.rollover_max.tx_multicast_byte_count = 0xFFFFFFFF; 3074 dev->stats.rollover_max.eee_tx_lpi_transitions = 0xFFFFFFFF; 3075 dev->stats.rollover_max.eee_tx_lpi_time = 0xFFFFFFFF; 3076 3077 set_bit(EVENT_STAT_UPDATE, &dev->flags); 3078 } 3079 3080 static int lan78xx_open(struct net_device *net) 3081 { 3082 struct lan78xx_net *dev = netdev_priv(net); 3083 int ret; 3084 3085 netif_dbg(dev, ifup, dev->net, "open device"); 3086 3087 ret = usb_autopm_get_interface(dev->intf); 3088 if (ret < 0) 3089 return ret; 3090 3091 mutex_lock(&dev->dev_mutex); 3092 3093 phy_start(net->phydev); 3094 3095 netif_dbg(dev, ifup, dev->net, "phy initialised successfully"); 3096 3097 /* for Link Check */ 3098 if (dev->urb_intr) { 3099 ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 3100 if (ret < 0) { 3101 netif_err(dev, ifup, dev->net, 3102 "intr submit %d\n", ret); 3103 goto done; 3104 } 3105 } 3106 3107 ret = lan78xx_flush_rx_fifo(dev); 3108 if (ret < 0) 3109 goto done; 3110 ret = lan78xx_flush_tx_fifo(dev); 3111 if (ret < 0) 3112 goto done; 3113 3114 ret = lan78xx_start_tx_path(dev); 3115 if (ret < 0) 3116 goto done; 3117 ret = lan78xx_start_rx_path(dev); 3118 if (ret < 0) 3119 goto done; 3120 3121 lan78xx_init_stats(dev); 3122 3123 set_bit(EVENT_DEV_OPEN, &dev->flags); 3124 3125 netif_start_queue(net); 3126 3127 dev->link_on = false; 3128 3129 napi_enable(&dev->napi); 3130 3131 lan78xx_defer_kevent(dev, EVENT_LINK_RESET); 3132 done: 3133 mutex_unlock(&dev->dev_mutex); 3134 3135 if (ret < 0) 3136 usb_autopm_put_interface(dev->intf); 3137 3138 return ret; 3139 } 3140 3141 static void lan78xx_terminate_urbs(struct lan78xx_net *dev) 3142 { 3143 DECLARE_WAIT_QUEUE_HEAD_ONSTACK(unlink_wakeup); 3144 DECLARE_WAITQUEUE(wait, current); 3145 int temp; 3146 3147 /* ensure there are no more active urbs */ 3148 add_wait_queue(&unlink_wakeup, &wait); 3149 set_current_state(TASK_UNINTERRUPTIBLE); 3150 dev->wait = &unlink_wakeup; 3151 temp = unlink_urbs(dev, &dev->txq) + unlink_urbs(dev, &dev->rxq); 3152 3153 /* maybe wait for deletions to finish. */ 3154 while (!skb_queue_empty(&dev->rxq) || 3155 !skb_queue_empty(&dev->txq)) { 3156 schedule_timeout(msecs_to_jiffies(UNLINK_TIMEOUT_MS)); 3157 set_current_state(TASK_UNINTERRUPTIBLE); 3158 netif_dbg(dev, ifdown, dev->net, 3159 "waited for %d urb completions", temp); 3160 } 3161 set_current_state(TASK_RUNNING); 3162 dev->wait = NULL; 3163 remove_wait_queue(&unlink_wakeup, &wait); 3164 3165 /* empty Rx done, Rx overflow and Tx pend queues 3166 */ 3167 while (!skb_queue_empty(&dev->rxq_done)) { 3168 struct sk_buff *skb = skb_dequeue(&dev->rxq_done); 3169 3170 lan78xx_release_rx_buf(dev, skb); 3171 } 3172 3173 skb_queue_purge(&dev->rxq_overflow); 3174 skb_queue_purge(&dev->txq_pend); 3175 } 3176 3177 static int lan78xx_stop(struct net_device *net) 3178 { 3179 struct lan78xx_net *dev = netdev_priv(net); 3180 3181 netif_dbg(dev, ifup, dev->net, "stop device"); 3182 3183 mutex_lock(&dev->dev_mutex); 3184 3185 if (timer_pending(&dev->stat_monitor)) 3186 del_timer_sync(&dev->stat_monitor); 3187 3188 clear_bit(EVENT_DEV_OPEN, &dev->flags); 3189 netif_stop_queue(net); 3190 napi_disable(&dev->napi); 3191 3192 lan78xx_terminate_urbs(dev); 3193 3194 netif_info(dev, ifdown, dev->net, 3195 "stop stats: rx/tx %lu/%lu, errs %lu/%lu\n", 3196 net->stats.rx_packets, net->stats.tx_packets, 3197 net->stats.rx_errors, net->stats.tx_errors); 3198 3199 /* ignore errors that occur stopping the Tx and Rx data paths */ 3200 lan78xx_stop_tx_path(dev); 3201 lan78xx_stop_rx_path(dev); 3202 3203 if (net->phydev) 3204 phy_stop(net->phydev); 3205 3206 usb_kill_urb(dev->urb_intr); 3207 3208 /* deferred work (task, timer, softirq) must also stop. 3209 * can't flush_scheduled_work() until we drop rtnl (later), 3210 * else workers could deadlock; so make workers a NOP. 3211 */ 3212 clear_bit(EVENT_TX_HALT, &dev->flags); 3213 clear_bit(EVENT_RX_HALT, &dev->flags); 3214 clear_bit(EVENT_LINK_RESET, &dev->flags); 3215 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 3216 3217 cancel_delayed_work_sync(&dev->wq); 3218 3219 usb_autopm_put_interface(dev->intf); 3220 3221 mutex_unlock(&dev->dev_mutex); 3222 3223 return 0; 3224 } 3225 3226 static enum skb_state defer_bh(struct lan78xx_net *dev, struct sk_buff *skb, 3227 struct sk_buff_head *list, enum skb_state state) 3228 { 3229 unsigned long flags; 3230 enum skb_state old_state; 3231 struct skb_data *entry = (struct skb_data *)skb->cb; 3232 3233 spin_lock_irqsave(&list->lock, flags); 3234 old_state = entry->state; 3235 entry->state = state; 3236 3237 __skb_unlink(skb, list); 3238 spin_unlock(&list->lock); 3239 spin_lock(&dev->rxq_done.lock); 3240 3241 __skb_queue_tail(&dev->rxq_done, skb); 3242 if (skb_queue_len(&dev->rxq_done) == 1) 3243 napi_schedule(&dev->napi); 3244 3245 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 3246 3247 return old_state; 3248 } 3249 3250 static void tx_complete(struct urb *urb) 3251 { 3252 struct sk_buff *skb = (struct sk_buff *)urb->context; 3253 struct skb_data *entry = (struct skb_data *)skb->cb; 3254 struct lan78xx_net *dev = entry->dev; 3255 3256 if (urb->status == 0) { 3257 dev->net->stats.tx_packets += entry->num_of_packet; 3258 dev->net->stats.tx_bytes += entry->length; 3259 } else { 3260 dev->net->stats.tx_errors += entry->num_of_packet; 3261 3262 switch (urb->status) { 3263 case -EPIPE: 3264 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 3265 break; 3266 3267 /* software-driven interface shutdown */ 3268 case -ECONNRESET: 3269 case -ESHUTDOWN: 3270 netif_dbg(dev, tx_err, dev->net, 3271 "tx err interface gone %d\n", 3272 entry->urb->status); 3273 break; 3274 3275 case -EPROTO: 3276 case -ETIME: 3277 case -EILSEQ: 3278 netif_stop_queue(dev->net); 3279 netif_dbg(dev, tx_err, dev->net, 3280 "tx err queue stopped %d\n", 3281 entry->urb->status); 3282 break; 3283 default: 3284 netif_dbg(dev, tx_err, dev->net, 3285 "unknown tx err %d\n", 3286 entry->urb->status); 3287 break; 3288 } 3289 } 3290 3291 usb_autopm_put_interface_async(dev->intf); 3292 3293 skb_unlink(skb, &dev->txq); 3294 3295 lan78xx_release_tx_buf(dev, skb); 3296 3297 /* Re-schedule NAPI if Tx data pending but no URBs in progress. 3298 */ 3299 if (skb_queue_empty(&dev->txq) && 3300 !skb_queue_empty(&dev->txq_pend)) 3301 napi_schedule(&dev->napi); 3302 } 3303 3304 static void lan78xx_queue_skb(struct sk_buff_head *list, 3305 struct sk_buff *newsk, enum skb_state state) 3306 { 3307 struct skb_data *entry = (struct skb_data *)newsk->cb; 3308 3309 __skb_queue_tail(list, newsk); 3310 entry->state = state; 3311 } 3312 3313 static unsigned int lan78xx_tx_urb_space(struct lan78xx_net *dev) 3314 { 3315 return skb_queue_len(&dev->txq_free) * dev->tx_urb_size; 3316 } 3317 3318 static unsigned int lan78xx_tx_pend_data_len(struct lan78xx_net *dev) 3319 { 3320 return dev->tx_pend_data_len; 3321 } 3322 3323 static void lan78xx_tx_pend_skb_add(struct lan78xx_net *dev, 3324 struct sk_buff *skb, 3325 unsigned int *tx_pend_data_len) 3326 { 3327 unsigned long flags; 3328 3329 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3330 3331 __skb_queue_tail(&dev->txq_pend, skb); 3332 3333 dev->tx_pend_data_len += skb->len; 3334 *tx_pend_data_len = dev->tx_pend_data_len; 3335 3336 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3337 } 3338 3339 static void lan78xx_tx_pend_skb_head_add(struct lan78xx_net *dev, 3340 struct sk_buff *skb, 3341 unsigned int *tx_pend_data_len) 3342 { 3343 unsigned long flags; 3344 3345 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3346 3347 __skb_queue_head(&dev->txq_pend, skb); 3348 3349 dev->tx_pend_data_len += skb->len; 3350 *tx_pend_data_len = dev->tx_pend_data_len; 3351 3352 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3353 } 3354 3355 static void lan78xx_tx_pend_skb_get(struct lan78xx_net *dev, 3356 struct sk_buff **skb, 3357 unsigned int *tx_pend_data_len) 3358 { 3359 unsigned long flags; 3360 3361 spin_lock_irqsave(&dev->txq_pend.lock, flags); 3362 3363 *skb = __skb_dequeue(&dev->txq_pend); 3364 if (*skb) 3365 dev->tx_pend_data_len -= (*skb)->len; 3366 *tx_pend_data_len = dev->tx_pend_data_len; 3367 3368 spin_unlock_irqrestore(&dev->txq_pend.lock, flags); 3369 } 3370 3371 static netdev_tx_t 3372 lan78xx_start_xmit(struct sk_buff *skb, struct net_device *net) 3373 { 3374 struct lan78xx_net *dev = netdev_priv(net); 3375 unsigned int tx_pend_data_len; 3376 3377 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) 3378 schedule_delayed_work(&dev->wq, 0); 3379 3380 skb_tx_timestamp(skb); 3381 3382 lan78xx_tx_pend_skb_add(dev, skb, &tx_pend_data_len); 3383 3384 /* Set up a Tx URB if none is in progress */ 3385 3386 if (skb_queue_empty(&dev->txq)) 3387 napi_schedule(&dev->napi); 3388 3389 /* Stop stack Tx queue if we have enough data to fill 3390 * all the free Tx URBs. 3391 */ 3392 if (tx_pend_data_len > lan78xx_tx_urb_space(dev)) { 3393 netif_stop_queue(net); 3394 3395 netif_dbg(dev, hw, dev->net, "tx data len: %u, urb space %u", 3396 tx_pend_data_len, lan78xx_tx_urb_space(dev)); 3397 3398 /* Kick off transmission of pending data */ 3399 3400 if (!skb_queue_empty(&dev->txq_free)) 3401 napi_schedule(&dev->napi); 3402 } 3403 3404 return NETDEV_TX_OK; 3405 } 3406 3407 static int lan78xx_bind(struct lan78xx_net *dev, struct usb_interface *intf) 3408 { 3409 struct lan78xx_priv *pdata = NULL; 3410 int ret; 3411 int i; 3412 3413 dev->data[0] = (unsigned long)kzalloc(sizeof(*pdata), GFP_KERNEL); 3414 3415 pdata = (struct lan78xx_priv *)(dev->data[0]); 3416 if (!pdata) { 3417 netdev_warn(dev->net, "Unable to allocate lan78xx_priv"); 3418 return -ENOMEM; 3419 } 3420 3421 pdata->dev = dev; 3422 3423 spin_lock_init(&pdata->rfe_ctl_lock); 3424 mutex_init(&pdata->dataport_mutex); 3425 3426 INIT_WORK(&pdata->set_multicast, lan78xx_deferred_multicast_write); 3427 3428 for (i = 0; i < DP_SEL_VHF_VLAN_LEN; i++) 3429 pdata->vlan_table[i] = 0; 3430 3431 INIT_WORK(&pdata->set_vlan, lan78xx_deferred_vlan_write); 3432 3433 dev->net->features = 0; 3434 3435 if (DEFAULT_TX_CSUM_ENABLE) 3436 dev->net->features |= NETIF_F_HW_CSUM; 3437 3438 if (DEFAULT_RX_CSUM_ENABLE) 3439 dev->net->features |= NETIF_F_RXCSUM; 3440 3441 if (DEFAULT_TSO_CSUM_ENABLE) 3442 dev->net->features |= NETIF_F_TSO | NETIF_F_TSO6 | NETIF_F_SG; 3443 3444 if (DEFAULT_VLAN_RX_OFFLOAD) 3445 dev->net->features |= NETIF_F_HW_VLAN_CTAG_RX; 3446 3447 if (DEFAULT_VLAN_FILTER_ENABLE) 3448 dev->net->features |= NETIF_F_HW_VLAN_CTAG_FILTER; 3449 3450 dev->net->hw_features = dev->net->features; 3451 3452 ret = lan78xx_setup_irq_domain(dev); 3453 if (ret < 0) { 3454 netdev_warn(dev->net, 3455 "lan78xx_setup_irq_domain() failed : %d", ret); 3456 goto out1; 3457 } 3458 3459 /* Init all registers */ 3460 ret = lan78xx_reset(dev); 3461 if (ret) { 3462 netdev_warn(dev->net, "Registers INIT FAILED...."); 3463 goto out2; 3464 } 3465 3466 ret = lan78xx_mdio_init(dev); 3467 if (ret) { 3468 netdev_warn(dev->net, "MDIO INIT FAILED....."); 3469 goto out2; 3470 } 3471 3472 dev->net->flags |= IFF_MULTICAST; 3473 3474 pdata->wol = WAKE_MAGIC; 3475 3476 return ret; 3477 3478 out2: 3479 lan78xx_remove_irq_domain(dev); 3480 3481 out1: 3482 netdev_warn(dev->net, "Bind routine FAILED"); 3483 cancel_work_sync(&pdata->set_multicast); 3484 cancel_work_sync(&pdata->set_vlan); 3485 kfree(pdata); 3486 return ret; 3487 } 3488 3489 static void lan78xx_unbind(struct lan78xx_net *dev, struct usb_interface *intf) 3490 { 3491 struct lan78xx_priv *pdata = (struct lan78xx_priv *)(dev->data[0]); 3492 3493 lan78xx_remove_irq_domain(dev); 3494 3495 lan78xx_remove_mdio(dev); 3496 3497 if (pdata) { 3498 cancel_work_sync(&pdata->set_multicast); 3499 cancel_work_sync(&pdata->set_vlan); 3500 netif_dbg(dev, ifdown, dev->net, "free pdata"); 3501 kfree(pdata); 3502 pdata = NULL; 3503 dev->data[0] = 0; 3504 } 3505 } 3506 3507 static void lan78xx_rx_csum_offload(struct lan78xx_net *dev, 3508 struct sk_buff *skb, 3509 u32 rx_cmd_a, u32 rx_cmd_b) 3510 { 3511 /* HW Checksum offload appears to be flawed if used when not stripping 3512 * VLAN headers. Drop back to S/W checksums under these conditions. 3513 */ 3514 if (!(dev->net->features & NETIF_F_RXCSUM) || 3515 unlikely(rx_cmd_a & RX_CMD_A_ICSM_) || 3516 ((rx_cmd_a & RX_CMD_A_FVTG_) && 3517 !(dev->net->features & NETIF_F_HW_VLAN_CTAG_RX))) { 3518 skb->ip_summed = CHECKSUM_NONE; 3519 } else { 3520 skb->csum = ntohs((u16)(rx_cmd_b >> RX_CMD_B_CSUM_SHIFT_)); 3521 skb->ip_summed = CHECKSUM_COMPLETE; 3522 } 3523 } 3524 3525 static void lan78xx_rx_vlan_offload(struct lan78xx_net *dev, 3526 struct sk_buff *skb, 3527 u32 rx_cmd_a, u32 rx_cmd_b) 3528 { 3529 if ((dev->net->features & NETIF_F_HW_VLAN_CTAG_RX) && 3530 (rx_cmd_a & RX_CMD_A_FVTG_)) 3531 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 3532 (rx_cmd_b & 0xffff)); 3533 } 3534 3535 static void lan78xx_skb_return(struct lan78xx_net *dev, struct sk_buff *skb) 3536 { 3537 dev->net->stats.rx_packets++; 3538 dev->net->stats.rx_bytes += skb->len; 3539 3540 skb->protocol = eth_type_trans(skb, dev->net); 3541 3542 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n", 3543 skb->len + sizeof(struct ethhdr), skb->protocol); 3544 memset(skb->cb, 0, sizeof(struct skb_data)); 3545 3546 if (skb_defer_rx_timestamp(skb)) 3547 return; 3548 3549 napi_gro_receive(&dev->napi, skb); 3550 } 3551 3552 static int lan78xx_rx(struct lan78xx_net *dev, struct sk_buff *skb, 3553 int budget, int *work_done) 3554 { 3555 if (skb->len < RX_SKB_MIN_LEN) 3556 return 0; 3557 3558 /* Extract frames from the URB buffer and pass each one to 3559 * the stack in a new NAPI SKB. 3560 */ 3561 while (skb->len > 0) { 3562 u32 rx_cmd_a, rx_cmd_b, align_count, size; 3563 u16 rx_cmd_c; 3564 unsigned char *packet; 3565 3566 rx_cmd_a = get_unaligned_le32(skb->data); 3567 skb_pull(skb, sizeof(rx_cmd_a)); 3568 3569 rx_cmd_b = get_unaligned_le32(skb->data); 3570 skb_pull(skb, sizeof(rx_cmd_b)); 3571 3572 rx_cmd_c = get_unaligned_le16(skb->data); 3573 skb_pull(skb, sizeof(rx_cmd_c)); 3574 3575 packet = skb->data; 3576 3577 /* get the packet length */ 3578 size = (rx_cmd_a & RX_CMD_A_LEN_MASK_); 3579 align_count = (4 - ((size + RXW_PADDING) % 4)) % 4; 3580 3581 if (unlikely(size > skb->len)) { 3582 netif_dbg(dev, rx_err, dev->net, 3583 "size err rx_cmd_a=0x%08x\n", 3584 rx_cmd_a); 3585 return 0; 3586 } 3587 3588 if (unlikely(rx_cmd_a & RX_CMD_A_RED_)) { 3589 netif_dbg(dev, rx_err, dev->net, 3590 "Error rx_cmd_a=0x%08x", rx_cmd_a); 3591 } else { 3592 u32 frame_len; 3593 struct sk_buff *skb2; 3594 3595 if (unlikely(size < ETH_FCS_LEN)) { 3596 netif_dbg(dev, rx_err, dev->net, 3597 "size err rx_cmd_a=0x%08x\n", 3598 rx_cmd_a); 3599 return 0; 3600 } 3601 3602 frame_len = size - ETH_FCS_LEN; 3603 3604 skb2 = napi_alloc_skb(&dev->napi, frame_len); 3605 if (!skb2) 3606 return 0; 3607 3608 memcpy(skb2->data, packet, frame_len); 3609 3610 skb_put(skb2, frame_len); 3611 3612 lan78xx_rx_csum_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3613 lan78xx_rx_vlan_offload(dev, skb2, rx_cmd_a, rx_cmd_b); 3614 3615 /* Processing of the URB buffer must complete once 3616 * it has started. If the NAPI work budget is exhausted 3617 * while frames remain they are added to the overflow 3618 * queue for delivery in the next NAPI polling cycle. 3619 */ 3620 if (*work_done < budget) { 3621 lan78xx_skb_return(dev, skb2); 3622 ++(*work_done); 3623 } else { 3624 skb_queue_tail(&dev->rxq_overflow, skb2); 3625 } 3626 } 3627 3628 skb_pull(skb, size); 3629 3630 /* skip padding bytes before the next frame starts */ 3631 if (skb->len) 3632 skb_pull(skb, align_count); 3633 } 3634 3635 return 1; 3636 } 3637 3638 static inline void rx_process(struct lan78xx_net *dev, struct sk_buff *skb, 3639 int budget, int *work_done) 3640 { 3641 if (!lan78xx_rx(dev, skb, budget, work_done)) { 3642 netif_dbg(dev, rx_err, dev->net, "drop\n"); 3643 dev->net->stats.rx_errors++; 3644 } 3645 } 3646 3647 static void rx_complete(struct urb *urb) 3648 { 3649 struct sk_buff *skb = (struct sk_buff *)urb->context; 3650 struct skb_data *entry = (struct skb_data *)skb->cb; 3651 struct lan78xx_net *dev = entry->dev; 3652 int urb_status = urb->status; 3653 enum skb_state state; 3654 3655 netif_dbg(dev, rx_status, dev->net, 3656 "rx done: status %d", urb->status); 3657 3658 skb_put(skb, urb->actual_length); 3659 state = rx_done; 3660 3661 if (urb != entry->urb) 3662 netif_warn(dev, rx_err, dev->net, "URB pointer mismatch"); 3663 3664 switch (urb_status) { 3665 case 0: 3666 if (skb->len < RX_SKB_MIN_LEN) { 3667 state = rx_cleanup; 3668 dev->net->stats.rx_errors++; 3669 dev->net->stats.rx_length_errors++; 3670 netif_dbg(dev, rx_err, dev->net, 3671 "rx length %d\n", skb->len); 3672 } 3673 usb_mark_last_busy(dev->udev); 3674 break; 3675 case -EPIPE: 3676 dev->net->stats.rx_errors++; 3677 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 3678 fallthrough; 3679 case -ECONNRESET: /* async unlink */ 3680 case -ESHUTDOWN: /* hardware gone */ 3681 netif_dbg(dev, ifdown, dev->net, 3682 "rx shutdown, code %d\n", urb_status); 3683 state = rx_cleanup; 3684 break; 3685 case -EPROTO: 3686 case -ETIME: 3687 case -EILSEQ: 3688 dev->net->stats.rx_errors++; 3689 state = rx_cleanup; 3690 break; 3691 3692 /* data overrun ... flush fifo? */ 3693 case -EOVERFLOW: 3694 dev->net->stats.rx_over_errors++; 3695 fallthrough; 3696 3697 default: 3698 state = rx_cleanup; 3699 dev->net->stats.rx_errors++; 3700 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); 3701 break; 3702 } 3703 3704 state = defer_bh(dev, skb, &dev->rxq, state); 3705 } 3706 3707 static int rx_submit(struct lan78xx_net *dev, struct sk_buff *skb, gfp_t flags) 3708 { 3709 struct skb_data *entry = (struct skb_data *)skb->cb; 3710 size_t size = dev->rx_urb_size; 3711 struct urb *urb = entry->urb; 3712 unsigned long lockflags; 3713 int ret = 0; 3714 3715 usb_fill_bulk_urb(urb, dev->udev, dev->pipe_in, 3716 skb->data, size, rx_complete, skb); 3717 3718 spin_lock_irqsave(&dev->rxq.lock, lockflags); 3719 3720 if (netif_device_present(dev->net) && 3721 netif_running(dev->net) && 3722 !test_bit(EVENT_RX_HALT, &dev->flags) && 3723 !test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 3724 ret = usb_submit_urb(urb, flags); 3725 switch (ret) { 3726 case 0: 3727 lan78xx_queue_skb(&dev->rxq, skb, rx_start); 3728 break; 3729 case -EPIPE: 3730 lan78xx_defer_kevent(dev, EVENT_RX_HALT); 3731 break; 3732 case -ENODEV: 3733 case -ENOENT: 3734 netif_dbg(dev, ifdown, dev->net, "device gone\n"); 3735 netif_device_detach(dev->net); 3736 break; 3737 case -EHOSTUNREACH: 3738 ret = -ENOLINK; 3739 napi_schedule(&dev->napi); 3740 break; 3741 default: 3742 netif_dbg(dev, rx_err, dev->net, 3743 "rx submit, %d\n", ret); 3744 napi_schedule(&dev->napi); 3745 break; 3746 } 3747 } else { 3748 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); 3749 ret = -ENOLINK; 3750 } 3751 spin_unlock_irqrestore(&dev->rxq.lock, lockflags); 3752 3753 if (ret) 3754 lan78xx_release_rx_buf(dev, skb); 3755 3756 return ret; 3757 } 3758 3759 static void lan78xx_rx_urb_submit_all(struct lan78xx_net *dev) 3760 { 3761 struct sk_buff *rx_buf; 3762 3763 /* Ensure the maximum number of Rx URBs is submitted 3764 */ 3765 while ((rx_buf = lan78xx_get_rx_buf(dev)) != NULL) { 3766 if (rx_submit(dev, rx_buf, GFP_ATOMIC) != 0) 3767 break; 3768 } 3769 } 3770 3771 static void lan78xx_rx_urb_resubmit(struct lan78xx_net *dev, 3772 struct sk_buff *rx_buf) 3773 { 3774 /* reset SKB data pointers */ 3775 3776 rx_buf->data = rx_buf->head; 3777 skb_reset_tail_pointer(rx_buf); 3778 rx_buf->len = 0; 3779 rx_buf->data_len = 0; 3780 3781 rx_submit(dev, rx_buf, GFP_ATOMIC); 3782 } 3783 3784 static void lan78xx_fill_tx_cmd_words(struct sk_buff *skb, u8 *buffer) 3785 { 3786 u32 tx_cmd_a; 3787 u32 tx_cmd_b; 3788 3789 tx_cmd_a = (u32)(skb->len & TX_CMD_A_LEN_MASK_) | TX_CMD_A_FCS_; 3790 3791 if (skb->ip_summed == CHECKSUM_PARTIAL) 3792 tx_cmd_a |= TX_CMD_A_IPE_ | TX_CMD_A_TPE_; 3793 3794 tx_cmd_b = 0; 3795 if (skb_is_gso(skb)) { 3796 u16 mss = max(skb_shinfo(skb)->gso_size, TX_CMD_B_MSS_MIN_); 3797 3798 tx_cmd_b = (mss << TX_CMD_B_MSS_SHIFT_) & TX_CMD_B_MSS_MASK_; 3799 3800 tx_cmd_a |= TX_CMD_A_LSO_; 3801 } 3802 3803 if (skb_vlan_tag_present(skb)) { 3804 tx_cmd_a |= TX_CMD_A_IVTG_; 3805 tx_cmd_b |= skb_vlan_tag_get(skb) & TX_CMD_B_VTAG_MASK_; 3806 } 3807 3808 put_unaligned_le32(tx_cmd_a, buffer); 3809 put_unaligned_le32(tx_cmd_b, buffer + 4); 3810 } 3811 3812 static struct skb_data *lan78xx_tx_buf_fill(struct lan78xx_net *dev, 3813 struct sk_buff *tx_buf) 3814 { 3815 struct skb_data *entry = (struct skb_data *)tx_buf->cb; 3816 int remain = dev->tx_urb_size; 3817 u8 *tx_data = tx_buf->data; 3818 u32 urb_len = 0; 3819 3820 entry->num_of_packet = 0; 3821 entry->length = 0; 3822 3823 /* Work through the pending SKBs and copy the data of each SKB into 3824 * the URB buffer if there room for all the SKB data. 3825 * 3826 * There must be at least DST+SRC+TYPE in the SKB (with padding enabled) 3827 */ 3828 while (remain >= TX_SKB_MIN_LEN) { 3829 unsigned int pending_bytes; 3830 unsigned int align_bytes; 3831 struct sk_buff *skb; 3832 unsigned int len; 3833 3834 lan78xx_tx_pend_skb_get(dev, &skb, &pending_bytes); 3835 3836 if (!skb) 3837 break; 3838 3839 align_bytes = (TX_ALIGNMENT - (urb_len % TX_ALIGNMENT)) % 3840 TX_ALIGNMENT; 3841 len = align_bytes + TX_CMD_LEN + skb->len; 3842 if (len > remain) { 3843 lan78xx_tx_pend_skb_head_add(dev, skb, &pending_bytes); 3844 break; 3845 } 3846 3847 tx_data += align_bytes; 3848 3849 lan78xx_fill_tx_cmd_words(skb, tx_data); 3850 tx_data += TX_CMD_LEN; 3851 3852 len = skb->len; 3853 if (skb_copy_bits(skb, 0, tx_data, len) < 0) { 3854 struct net_device_stats *stats = &dev->net->stats; 3855 3856 stats->tx_dropped++; 3857 dev_kfree_skb_any(skb); 3858 tx_data -= TX_CMD_LEN; 3859 continue; 3860 } 3861 3862 tx_data += len; 3863 entry->length += len; 3864 entry->num_of_packet += skb_shinfo(skb)->gso_segs ?: 1; 3865 3866 dev_kfree_skb_any(skb); 3867 3868 urb_len = (u32)(tx_data - (u8 *)tx_buf->data); 3869 3870 remain = dev->tx_urb_size - urb_len; 3871 } 3872 3873 skb_put(tx_buf, urb_len); 3874 3875 return entry; 3876 } 3877 3878 static void lan78xx_tx_bh(struct lan78xx_net *dev) 3879 { 3880 int ret; 3881 3882 /* Start the stack Tx queue if it was stopped 3883 */ 3884 netif_tx_lock(dev->net); 3885 if (netif_queue_stopped(dev->net)) { 3886 if (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev)) 3887 netif_wake_queue(dev->net); 3888 } 3889 netif_tx_unlock(dev->net); 3890 3891 /* Go through the Tx pending queue and set up URBs to transfer 3892 * the data to the device. Stop if no more pending data or URBs, 3893 * or if an error occurs when a URB is submitted. 3894 */ 3895 do { 3896 struct skb_data *entry; 3897 struct sk_buff *tx_buf; 3898 unsigned long flags; 3899 3900 if (skb_queue_empty(&dev->txq_pend)) 3901 break; 3902 3903 tx_buf = lan78xx_get_tx_buf(dev); 3904 if (!tx_buf) 3905 break; 3906 3907 entry = lan78xx_tx_buf_fill(dev, tx_buf); 3908 3909 spin_lock_irqsave(&dev->txq.lock, flags); 3910 ret = usb_autopm_get_interface_async(dev->intf); 3911 if (ret < 0) { 3912 spin_unlock_irqrestore(&dev->txq.lock, flags); 3913 goto out; 3914 } 3915 3916 usb_fill_bulk_urb(entry->urb, dev->udev, dev->pipe_out, 3917 tx_buf->data, tx_buf->len, tx_complete, 3918 tx_buf); 3919 3920 if (tx_buf->len % dev->maxpacket == 0) { 3921 /* send USB_ZERO_PACKET */ 3922 entry->urb->transfer_flags |= URB_ZERO_PACKET; 3923 } 3924 3925 #ifdef CONFIG_PM 3926 /* if device is asleep stop outgoing packet processing */ 3927 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 3928 usb_anchor_urb(entry->urb, &dev->deferred); 3929 netif_stop_queue(dev->net); 3930 spin_unlock_irqrestore(&dev->txq.lock, flags); 3931 netdev_dbg(dev->net, 3932 "Delaying transmission for resumption\n"); 3933 return; 3934 } 3935 #endif 3936 ret = usb_submit_urb(entry->urb, GFP_ATOMIC); 3937 switch (ret) { 3938 case 0: 3939 netif_trans_update(dev->net); 3940 lan78xx_queue_skb(&dev->txq, tx_buf, tx_start); 3941 break; 3942 case -EPIPE: 3943 netif_stop_queue(dev->net); 3944 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 3945 usb_autopm_put_interface_async(dev->intf); 3946 break; 3947 case -ENODEV: 3948 case -ENOENT: 3949 netif_dbg(dev, tx_err, dev->net, 3950 "tx submit urb err %d (disconnected?)", ret); 3951 netif_device_detach(dev->net); 3952 break; 3953 default: 3954 usb_autopm_put_interface_async(dev->intf); 3955 netif_dbg(dev, tx_err, dev->net, 3956 "tx submit urb err %d\n", ret); 3957 break; 3958 } 3959 3960 spin_unlock_irqrestore(&dev->txq.lock, flags); 3961 3962 if (ret) { 3963 netdev_warn(dev->net, "failed to tx urb %d\n", ret); 3964 out: 3965 dev->net->stats.tx_dropped += entry->num_of_packet; 3966 lan78xx_release_tx_buf(dev, tx_buf); 3967 } 3968 } while (ret == 0); 3969 } 3970 3971 static int lan78xx_bh(struct lan78xx_net *dev, int budget) 3972 { 3973 struct sk_buff_head done; 3974 struct sk_buff *rx_buf; 3975 struct skb_data *entry; 3976 unsigned long flags; 3977 int work_done = 0; 3978 3979 /* Pass frames received in the last NAPI cycle before 3980 * working on newly completed URBs. 3981 */ 3982 while (!skb_queue_empty(&dev->rxq_overflow)) { 3983 lan78xx_skb_return(dev, skb_dequeue(&dev->rxq_overflow)); 3984 ++work_done; 3985 } 3986 3987 /* Take a snapshot of the done queue and move items to a 3988 * temporary queue. Rx URB completions will continue to add 3989 * to the done queue. 3990 */ 3991 __skb_queue_head_init(&done); 3992 3993 spin_lock_irqsave(&dev->rxq_done.lock, flags); 3994 skb_queue_splice_init(&dev->rxq_done, &done); 3995 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 3996 3997 /* Extract receive frames from completed URBs and 3998 * pass them to the stack. Re-submit each completed URB. 3999 */ 4000 while ((work_done < budget) && 4001 (rx_buf = __skb_dequeue(&done))) { 4002 entry = (struct skb_data *)(rx_buf->cb); 4003 switch (entry->state) { 4004 case rx_done: 4005 rx_process(dev, rx_buf, budget, &work_done); 4006 break; 4007 case rx_cleanup: 4008 break; 4009 default: 4010 netdev_dbg(dev->net, "rx buf state %d\n", 4011 entry->state); 4012 break; 4013 } 4014 4015 lan78xx_rx_urb_resubmit(dev, rx_buf); 4016 } 4017 4018 /* If budget was consumed before processing all the URBs put them 4019 * back on the front of the done queue. They will be first to be 4020 * processed in the next NAPI cycle. 4021 */ 4022 spin_lock_irqsave(&dev->rxq_done.lock, flags); 4023 skb_queue_splice(&done, &dev->rxq_done); 4024 spin_unlock_irqrestore(&dev->rxq_done.lock, flags); 4025 4026 if (netif_device_present(dev->net) && netif_running(dev->net)) { 4027 /* reset update timer delta */ 4028 if (timer_pending(&dev->stat_monitor) && (dev->delta != 1)) { 4029 dev->delta = 1; 4030 mod_timer(&dev->stat_monitor, 4031 jiffies + STAT_UPDATE_TIMER); 4032 } 4033 4034 /* Submit all free Rx URBs */ 4035 4036 if (!test_bit(EVENT_RX_HALT, &dev->flags)) 4037 lan78xx_rx_urb_submit_all(dev); 4038 4039 /* Submit new Tx URBs */ 4040 4041 lan78xx_tx_bh(dev); 4042 } 4043 4044 return work_done; 4045 } 4046 4047 static int lan78xx_poll(struct napi_struct *napi, int budget) 4048 { 4049 struct lan78xx_net *dev = container_of(napi, struct lan78xx_net, napi); 4050 int result = budget; 4051 int work_done; 4052 4053 /* Don't do any work if the device is suspended */ 4054 4055 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { 4056 napi_complete_done(napi, 0); 4057 return 0; 4058 } 4059 4060 /* Process completed URBs and submit new URBs */ 4061 4062 work_done = lan78xx_bh(dev, budget); 4063 4064 if (work_done < budget) { 4065 napi_complete_done(napi, work_done); 4066 4067 /* Start a new polling cycle if data was received or 4068 * data is waiting to be transmitted. 4069 */ 4070 if (!skb_queue_empty(&dev->rxq_done)) { 4071 napi_schedule(napi); 4072 } else if (netif_carrier_ok(dev->net)) { 4073 if (skb_queue_empty(&dev->txq) && 4074 !skb_queue_empty(&dev->txq_pend)) { 4075 napi_schedule(napi); 4076 } else { 4077 netif_tx_lock(dev->net); 4078 if (netif_queue_stopped(dev->net)) { 4079 netif_wake_queue(dev->net); 4080 napi_schedule(napi); 4081 } 4082 netif_tx_unlock(dev->net); 4083 } 4084 } 4085 result = work_done; 4086 } 4087 4088 return result; 4089 } 4090 4091 static void lan78xx_delayedwork(struct work_struct *work) 4092 { 4093 int status; 4094 struct lan78xx_net *dev; 4095 4096 dev = container_of(work, struct lan78xx_net, wq.work); 4097 4098 if (test_bit(EVENT_DEV_DISCONNECT, &dev->flags)) 4099 return; 4100 4101 if (usb_autopm_get_interface(dev->intf) < 0) 4102 return; 4103 4104 if (test_bit(EVENT_TX_HALT, &dev->flags)) { 4105 unlink_urbs(dev, &dev->txq); 4106 4107 status = usb_clear_halt(dev->udev, dev->pipe_out); 4108 if (status < 0 && 4109 status != -EPIPE && 4110 status != -ESHUTDOWN) { 4111 if (netif_msg_tx_err(dev)) 4112 netdev_err(dev->net, 4113 "can't clear tx halt, status %d\n", 4114 status); 4115 } else { 4116 clear_bit(EVENT_TX_HALT, &dev->flags); 4117 if (status != -ESHUTDOWN) 4118 netif_wake_queue(dev->net); 4119 } 4120 } 4121 4122 if (test_bit(EVENT_RX_HALT, &dev->flags)) { 4123 unlink_urbs(dev, &dev->rxq); 4124 status = usb_clear_halt(dev->udev, dev->pipe_in); 4125 if (status < 0 && 4126 status != -EPIPE && 4127 status != -ESHUTDOWN) { 4128 if (netif_msg_rx_err(dev)) 4129 netdev_err(dev->net, 4130 "can't clear rx halt, status %d\n", 4131 status); 4132 } else { 4133 clear_bit(EVENT_RX_HALT, &dev->flags); 4134 napi_schedule(&dev->napi); 4135 } 4136 } 4137 4138 if (test_bit(EVENT_LINK_RESET, &dev->flags)) { 4139 int ret = 0; 4140 4141 clear_bit(EVENT_LINK_RESET, &dev->flags); 4142 if (lan78xx_link_reset(dev) < 0) { 4143 netdev_info(dev->net, "link reset failed (%d)\n", 4144 ret); 4145 } 4146 } 4147 4148 if (test_bit(EVENT_STAT_UPDATE, &dev->flags)) { 4149 lan78xx_update_stats(dev); 4150 4151 clear_bit(EVENT_STAT_UPDATE, &dev->flags); 4152 4153 mod_timer(&dev->stat_monitor, 4154 jiffies + (STAT_UPDATE_TIMER * dev->delta)); 4155 4156 dev->delta = min((dev->delta * 2), 50); 4157 } 4158 4159 usb_autopm_put_interface(dev->intf); 4160 } 4161 4162 static void intr_complete(struct urb *urb) 4163 { 4164 struct lan78xx_net *dev = urb->context; 4165 int status = urb->status; 4166 4167 switch (status) { 4168 /* success */ 4169 case 0: 4170 lan78xx_status(dev, urb); 4171 break; 4172 4173 /* software-driven interface shutdown */ 4174 case -ENOENT: /* urb killed */ 4175 case -ENODEV: /* hardware gone */ 4176 case -ESHUTDOWN: /* hardware gone */ 4177 netif_dbg(dev, ifdown, dev->net, 4178 "intr shutdown, code %d\n", status); 4179 return; 4180 4181 /* NOTE: not throttling like RX/TX, since this endpoint 4182 * already polls infrequently 4183 */ 4184 default: 4185 netdev_dbg(dev->net, "intr status %d\n", status); 4186 break; 4187 } 4188 4189 if (!netif_device_present(dev->net) || 4190 !netif_running(dev->net)) { 4191 netdev_warn(dev->net, "not submitting new status URB"); 4192 return; 4193 } 4194 4195 memset(urb->transfer_buffer, 0, urb->transfer_buffer_length); 4196 status = usb_submit_urb(urb, GFP_ATOMIC); 4197 4198 switch (status) { 4199 case 0: 4200 break; 4201 case -ENODEV: 4202 case -ENOENT: 4203 netif_dbg(dev, timer, dev->net, 4204 "intr resubmit %d (disconnect?)", status); 4205 netif_device_detach(dev->net); 4206 break; 4207 default: 4208 netif_err(dev, timer, dev->net, 4209 "intr resubmit --> %d\n", status); 4210 break; 4211 } 4212 } 4213 4214 static void lan78xx_disconnect(struct usb_interface *intf) 4215 { 4216 struct lan78xx_net *dev; 4217 struct usb_device *udev; 4218 struct net_device *net; 4219 struct phy_device *phydev; 4220 4221 dev = usb_get_intfdata(intf); 4222 usb_set_intfdata(intf, NULL); 4223 if (!dev) 4224 return; 4225 4226 netif_napi_del(&dev->napi); 4227 4228 udev = interface_to_usbdev(intf); 4229 net = dev->net; 4230 4231 unregister_netdev(net); 4232 4233 timer_shutdown_sync(&dev->stat_monitor); 4234 set_bit(EVENT_DEV_DISCONNECT, &dev->flags); 4235 cancel_delayed_work_sync(&dev->wq); 4236 4237 phydev = net->phydev; 4238 4239 phy_unregister_fixup_for_uid(PHY_KSZ9031RNX, 0xfffffff0); 4240 phy_unregister_fixup_for_uid(PHY_LAN8835, 0xfffffff0); 4241 4242 phy_disconnect(net->phydev); 4243 4244 if (phy_is_pseudo_fixed_link(phydev)) 4245 fixed_phy_unregister(phydev); 4246 4247 usb_scuttle_anchored_urbs(&dev->deferred); 4248 4249 lan78xx_unbind(dev, intf); 4250 4251 lan78xx_free_tx_resources(dev); 4252 lan78xx_free_rx_resources(dev); 4253 4254 usb_kill_urb(dev->urb_intr); 4255 usb_free_urb(dev->urb_intr); 4256 4257 free_netdev(net); 4258 usb_put_dev(udev); 4259 } 4260 4261 static void lan78xx_tx_timeout(struct net_device *net, unsigned int txqueue) 4262 { 4263 struct lan78xx_net *dev = netdev_priv(net); 4264 4265 unlink_urbs(dev, &dev->txq); 4266 napi_schedule(&dev->napi); 4267 } 4268 4269 static netdev_features_t lan78xx_features_check(struct sk_buff *skb, 4270 struct net_device *netdev, 4271 netdev_features_t features) 4272 { 4273 struct lan78xx_net *dev = netdev_priv(netdev); 4274 4275 if (skb->len > LAN78XX_TSO_SIZE(dev)) 4276 features &= ~NETIF_F_GSO_MASK; 4277 4278 features = vlan_features_check(skb, features); 4279 features = vxlan_features_check(skb, features); 4280 4281 return features; 4282 } 4283 4284 static const struct net_device_ops lan78xx_netdev_ops = { 4285 .ndo_open = lan78xx_open, 4286 .ndo_stop = lan78xx_stop, 4287 .ndo_start_xmit = lan78xx_start_xmit, 4288 .ndo_tx_timeout = lan78xx_tx_timeout, 4289 .ndo_change_mtu = lan78xx_change_mtu, 4290 .ndo_set_mac_address = lan78xx_set_mac_addr, 4291 .ndo_validate_addr = eth_validate_addr, 4292 .ndo_eth_ioctl = phy_do_ioctl_running, 4293 .ndo_set_rx_mode = lan78xx_set_multicast, 4294 .ndo_set_features = lan78xx_set_features, 4295 .ndo_vlan_rx_add_vid = lan78xx_vlan_rx_add_vid, 4296 .ndo_vlan_rx_kill_vid = lan78xx_vlan_rx_kill_vid, 4297 .ndo_features_check = lan78xx_features_check, 4298 }; 4299 4300 static void lan78xx_stat_monitor(struct timer_list *t) 4301 { 4302 struct lan78xx_net *dev = from_timer(dev, t, stat_monitor); 4303 4304 lan78xx_defer_kevent(dev, EVENT_STAT_UPDATE); 4305 } 4306 4307 static int lan78xx_probe(struct usb_interface *intf, 4308 const struct usb_device_id *id) 4309 { 4310 struct usb_host_endpoint *ep_blkin, *ep_blkout, *ep_intr; 4311 struct lan78xx_net *dev; 4312 struct net_device *netdev; 4313 struct usb_device *udev; 4314 int ret; 4315 unsigned int maxp; 4316 unsigned int period; 4317 u8 *buf = NULL; 4318 4319 udev = interface_to_usbdev(intf); 4320 udev = usb_get_dev(udev); 4321 4322 netdev = alloc_etherdev(sizeof(struct lan78xx_net)); 4323 if (!netdev) { 4324 dev_err(&intf->dev, "Error: OOM\n"); 4325 ret = -ENOMEM; 4326 goto out1; 4327 } 4328 4329 /* netdev_printk() needs this */ 4330 SET_NETDEV_DEV(netdev, &intf->dev); 4331 4332 dev = netdev_priv(netdev); 4333 dev->udev = udev; 4334 dev->intf = intf; 4335 dev->net = netdev; 4336 dev->msg_enable = netif_msg_init(msg_level, NETIF_MSG_DRV 4337 | NETIF_MSG_PROBE | NETIF_MSG_LINK); 4338 4339 skb_queue_head_init(&dev->rxq); 4340 skb_queue_head_init(&dev->txq); 4341 skb_queue_head_init(&dev->rxq_done); 4342 skb_queue_head_init(&dev->txq_pend); 4343 skb_queue_head_init(&dev->rxq_overflow); 4344 mutex_init(&dev->phy_mutex); 4345 mutex_init(&dev->dev_mutex); 4346 4347 ret = lan78xx_urb_config_init(dev); 4348 if (ret < 0) 4349 goto out2; 4350 4351 ret = lan78xx_alloc_tx_resources(dev); 4352 if (ret < 0) 4353 goto out2; 4354 4355 ret = lan78xx_alloc_rx_resources(dev); 4356 if (ret < 0) 4357 goto out3; 4358 4359 /* MTU range: 68 - 9000 */ 4360 netdev->max_mtu = MAX_SINGLE_PACKET_SIZE; 4361 4362 netif_set_tso_max_size(netdev, LAN78XX_TSO_SIZE(dev)); 4363 4364 netif_napi_add(netdev, &dev->napi, lan78xx_poll); 4365 4366 INIT_DELAYED_WORK(&dev->wq, lan78xx_delayedwork); 4367 init_usb_anchor(&dev->deferred); 4368 4369 netdev->netdev_ops = &lan78xx_netdev_ops; 4370 netdev->watchdog_timeo = TX_TIMEOUT_JIFFIES; 4371 netdev->ethtool_ops = &lan78xx_ethtool_ops; 4372 4373 dev->delta = 1; 4374 timer_setup(&dev->stat_monitor, lan78xx_stat_monitor, 0); 4375 4376 mutex_init(&dev->stats.access_lock); 4377 4378 if (intf->cur_altsetting->desc.bNumEndpoints < 3) { 4379 ret = -ENODEV; 4380 goto out4; 4381 } 4382 4383 dev->pipe_in = usb_rcvbulkpipe(udev, BULK_IN_PIPE); 4384 ep_blkin = usb_pipe_endpoint(udev, dev->pipe_in); 4385 if (!ep_blkin || !usb_endpoint_is_bulk_in(&ep_blkin->desc)) { 4386 ret = -ENODEV; 4387 goto out4; 4388 } 4389 4390 dev->pipe_out = usb_sndbulkpipe(udev, BULK_OUT_PIPE); 4391 ep_blkout = usb_pipe_endpoint(udev, dev->pipe_out); 4392 if (!ep_blkout || !usb_endpoint_is_bulk_out(&ep_blkout->desc)) { 4393 ret = -ENODEV; 4394 goto out4; 4395 } 4396 4397 ep_intr = &intf->cur_altsetting->endpoint[2]; 4398 if (!usb_endpoint_is_int_in(&ep_intr->desc)) { 4399 ret = -ENODEV; 4400 goto out4; 4401 } 4402 4403 dev->pipe_intr = usb_rcvintpipe(dev->udev, 4404 usb_endpoint_num(&ep_intr->desc)); 4405 4406 ret = lan78xx_bind(dev, intf); 4407 if (ret < 0) 4408 goto out4; 4409 4410 period = ep_intr->desc.bInterval; 4411 maxp = usb_maxpacket(dev->udev, dev->pipe_intr); 4412 buf = kmalloc(maxp, GFP_KERNEL); 4413 if (!buf) { 4414 ret = -ENOMEM; 4415 goto out5; 4416 } 4417 4418 dev->urb_intr = usb_alloc_urb(0, GFP_KERNEL); 4419 if (!dev->urb_intr) { 4420 ret = -ENOMEM; 4421 goto out6; 4422 } else { 4423 usb_fill_int_urb(dev->urb_intr, dev->udev, 4424 dev->pipe_intr, buf, maxp, 4425 intr_complete, dev, period); 4426 dev->urb_intr->transfer_flags |= URB_FREE_BUFFER; 4427 } 4428 4429 dev->maxpacket = usb_maxpacket(dev->udev, dev->pipe_out); 4430 4431 /* Reject broken descriptors. */ 4432 if (dev->maxpacket == 0) { 4433 ret = -ENODEV; 4434 goto out6; 4435 } 4436 4437 /* driver requires remote-wakeup capability during autosuspend. */ 4438 intf->needs_remote_wakeup = 1; 4439 4440 ret = lan78xx_phy_init(dev); 4441 if (ret < 0) 4442 goto out7; 4443 4444 ret = register_netdev(netdev); 4445 if (ret != 0) { 4446 netif_err(dev, probe, netdev, "couldn't register the device\n"); 4447 goto out8; 4448 } 4449 4450 usb_set_intfdata(intf, dev); 4451 4452 ret = device_set_wakeup_enable(&udev->dev, true); 4453 4454 /* Default delay of 2sec has more overhead than advantage. 4455 * Set to 10sec as default. 4456 */ 4457 pm_runtime_set_autosuspend_delay(&udev->dev, 4458 DEFAULT_AUTOSUSPEND_DELAY); 4459 4460 return 0; 4461 4462 out8: 4463 phy_disconnect(netdev->phydev); 4464 out7: 4465 usb_free_urb(dev->urb_intr); 4466 out6: 4467 kfree(buf); 4468 out5: 4469 lan78xx_unbind(dev, intf); 4470 out4: 4471 netif_napi_del(&dev->napi); 4472 lan78xx_free_rx_resources(dev); 4473 out3: 4474 lan78xx_free_tx_resources(dev); 4475 out2: 4476 free_netdev(netdev); 4477 out1: 4478 usb_put_dev(udev); 4479 4480 return ret; 4481 } 4482 4483 static u16 lan78xx_wakeframe_crc16(const u8 *buf, int len) 4484 { 4485 const u16 crc16poly = 0x8005; 4486 int i; 4487 u16 bit, crc, msb; 4488 u8 data; 4489 4490 crc = 0xFFFF; 4491 for (i = 0; i < len; i++) { 4492 data = *buf++; 4493 for (bit = 0; bit < 8; bit++) { 4494 msb = crc >> 15; 4495 crc <<= 1; 4496 4497 if (msb ^ (u16)(data & 1)) { 4498 crc ^= crc16poly; 4499 crc |= (u16)0x0001U; 4500 } 4501 data >>= 1; 4502 } 4503 } 4504 4505 return crc; 4506 } 4507 4508 static int lan78xx_set_auto_suspend(struct lan78xx_net *dev) 4509 { 4510 u32 buf; 4511 int ret; 4512 4513 ret = lan78xx_stop_tx_path(dev); 4514 if (ret < 0) 4515 return ret; 4516 4517 ret = lan78xx_stop_rx_path(dev); 4518 if (ret < 0) 4519 return ret; 4520 4521 /* auto suspend (selective suspend) */ 4522 4523 ret = lan78xx_write_reg(dev, WUCSR, 0); 4524 if (ret < 0) 4525 return ret; 4526 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4527 if (ret < 0) 4528 return ret; 4529 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4530 if (ret < 0) 4531 return ret; 4532 4533 /* set goodframe wakeup */ 4534 4535 ret = lan78xx_read_reg(dev, WUCSR, &buf); 4536 if (ret < 0) 4537 return ret; 4538 4539 buf |= WUCSR_RFE_WAKE_EN_; 4540 buf |= WUCSR_STORE_WAKE_; 4541 4542 ret = lan78xx_write_reg(dev, WUCSR, buf); 4543 if (ret < 0) 4544 return ret; 4545 4546 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4547 if (ret < 0) 4548 return ret; 4549 4550 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 4551 buf |= PMT_CTL_RES_CLR_WKP_STS_; 4552 buf |= PMT_CTL_PHY_WAKE_EN_; 4553 buf |= PMT_CTL_WOL_EN_; 4554 buf &= ~PMT_CTL_SUS_MODE_MASK_; 4555 buf |= PMT_CTL_SUS_MODE_3_; 4556 4557 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4558 if (ret < 0) 4559 return ret; 4560 4561 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4562 if (ret < 0) 4563 return ret; 4564 4565 buf |= PMT_CTL_WUPS_MASK_; 4566 4567 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4568 if (ret < 0) 4569 return ret; 4570 4571 ret = lan78xx_start_rx_path(dev); 4572 4573 return ret; 4574 } 4575 4576 static int lan78xx_set_suspend(struct lan78xx_net *dev, u32 wol) 4577 { 4578 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 4579 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 4580 const u8 arp_type[2] = { 0x08, 0x06 }; 4581 u32 temp_pmt_ctl; 4582 int mask_index; 4583 u32 temp_wucsr; 4584 u32 buf; 4585 u16 crc; 4586 int ret; 4587 4588 ret = lan78xx_stop_tx_path(dev); 4589 if (ret < 0) 4590 return ret; 4591 ret = lan78xx_stop_rx_path(dev); 4592 if (ret < 0) 4593 return ret; 4594 4595 ret = lan78xx_write_reg(dev, WUCSR, 0); 4596 if (ret < 0) 4597 return ret; 4598 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4599 if (ret < 0) 4600 return ret; 4601 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4602 if (ret < 0) 4603 return ret; 4604 4605 temp_wucsr = 0; 4606 4607 temp_pmt_ctl = 0; 4608 4609 ret = lan78xx_read_reg(dev, PMT_CTL, &temp_pmt_ctl); 4610 if (ret < 0) 4611 return ret; 4612 4613 temp_pmt_ctl &= ~PMT_CTL_RES_CLR_WKP_EN_; 4614 temp_pmt_ctl |= PMT_CTL_RES_CLR_WKP_STS_; 4615 4616 for (mask_index = 0; mask_index < NUM_OF_WUF_CFG; mask_index++) { 4617 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 0); 4618 if (ret < 0) 4619 return ret; 4620 } 4621 4622 mask_index = 0; 4623 if (wol & WAKE_PHY) { 4624 temp_pmt_ctl |= PMT_CTL_PHY_WAKE_EN_; 4625 4626 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4627 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4628 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4629 } 4630 if (wol & WAKE_MAGIC) { 4631 temp_wucsr |= WUCSR_MPEN_; 4632 4633 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4634 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4635 temp_pmt_ctl |= PMT_CTL_SUS_MODE_3_; 4636 } 4637 if (wol & WAKE_BCAST) { 4638 temp_wucsr |= WUCSR_BCST_EN_; 4639 4640 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4641 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4642 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4643 } 4644 if (wol & WAKE_MCAST) { 4645 temp_wucsr |= WUCSR_WAKE_EN_; 4646 4647 /* set WUF_CFG & WUF_MASK for IPv4 Multicast */ 4648 crc = lan78xx_wakeframe_crc16(ipv4_multicast, 3); 4649 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4650 WUF_CFGX_EN_ | 4651 WUF_CFGX_TYPE_MCAST_ | 4652 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4653 (crc & WUF_CFGX_CRC16_MASK_)); 4654 if (ret < 0) 4655 return ret; 4656 4657 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 7); 4658 if (ret < 0) 4659 return ret; 4660 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 4661 if (ret < 0) 4662 return ret; 4663 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 4664 if (ret < 0) 4665 return ret; 4666 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 4667 if (ret < 0) 4668 return ret; 4669 4670 mask_index++; 4671 4672 /* for IPv6 Multicast */ 4673 crc = lan78xx_wakeframe_crc16(ipv6_multicast, 2); 4674 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4675 WUF_CFGX_EN_ | 4676 WUF_CFGX_TYPE_MCAST_ | 4677 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4678 (crc & WUF_CFGX_CRC16_MASK_)); 4679 if (ret < 0) 4680 return ret; 4681 4682 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 3); 4683 if (ret < 0) 4684 return ret; 4685 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 4686 if (ret < 0) 4687 return ret; 4688 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 4689 if (ret < 0) 4690 return ret; 4691 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 4692 if (ret < 0) 4693 return ret; 4694 4695 mask_index++; 4696 4697 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4698 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4699 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4700 } 4701 if (wol & WAKE_UCAST) { 4702 temp_wucsr |= WUCSR_PFDA_EN_; 4703 4704 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4705 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4706 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4707 } 4708 if (wol & WAKE_ARP) { 4709 temp_wucsr |= WUCSR_WAKE_EN_; 4710 4711 /* set WUF_CFG & WUF_MASK 4712 * for packettype (offset 12,13) = ARP (0x0806) 4713 */ 4714 crc = lan78xx_wakeframe_crc16(arp_type, 2); 4715 ret = lan78xx_write_reg(dev, WUF_CFG(mask_index), 4716 WUF_CFGX_EN_ | 4717 WUF_CFGX_TYPE_ALL_ | 4718 (0 << WUF_CFGX_OFFSET_SHIFT_) | 4719 (crc & WUF_CFGX_CRC16_MASK_)); 4720 if (ret < 0) 4721 return ret; 4722 4723 ret = lan78xx_write_reg(dev, WUF_MASK0(mask_index), 0x3000); 4724 if (ret < 0) 4725 return ret; 4726 ret = lan78xx_write_reg(dev, WUF_MASK1(mask_index), 0); 4727 if (ret < 0) 4728 return ret; 4729 ret = lan78xx_write_reg(dev, WUF_MASK2(mask_index), 0); 4730 if (ret < 0) 4731 return ret; 4732 ret = lan78xx_write_reg(dev, WUF_MASK3(mask_index), 0); 4733 if (ret < 0) 4734 return ret; 4735 4736 mask_index++; 4737 4738 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4739 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4740 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4741 } 4742 4743 ret = lan78xx_write_reg(dev, WUCSR, temp_wucsr); 4744 if (ret < 0) 4745 return ret; 4746 4747 /* when multiple WOL bits are set */ 4748 if (hweight_long((unsigned long)wol) > 1) { 4749 temp_pmt_ctl |= PMT_CTL_WOL_EN_; 4750 temp_pmt_ctl &= ~PMT_CTL_SUS_MODE_MASK_; 4751 temp_pmt_ctl |= PMT_CTL_SUS_MODE_0_; 4752 } 4753 ret = lan78xx_write_reg(dev, PMT_CTL, temp_pmt_ctl); 4754 if (ret < 0) 4755 return ret; 4756 4757 /* clear WUPS */ 4758 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4759 if (ret < 0) 4760 return ret; 4761 4762 buf |= PMT_CTL_WUPS_MASK_; 4763 4764 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4765 if (ret < 0) 4766 return ret; 4767 4768 ret = lan78xx_start_rx_path(dev); 4769 4770 return ret; 4771 } 4772 4773 static int lan78xx_suspend(struct usb_interface *intf, pm_message_t message) 4774 { 4775 struct lan78xx_net *dev = usb_get_intfdata(intf); 4776 bool dev_open; 4777 int ret; 4778 4779 mutex_lock(&dev->dev_mutex); 4780 4781 netif_dbg(dev, ifdown, dev->net, 4782 "suspending: pm event %#x", message.event); 4783 4784 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 4785 4786 if (dev_open) { 4787 spin_lock_irq(&dev->txq.lock); 4788 /* don't autosuspend while transmitting */ 4789 if ((skb_queue_len(&dev->txq) || 4790 skb_queue_len(&dev->txq_pend)) && 4791 PMSG_IS_AUTO(message)) { 4792 spin_unlock_irq(&dev->txq.lock); 4793 ret = -EBUSY; 4794 goto out; 4795 } else { 4796 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 4797 spin_unlock_irq(&dev->txq.lock); 4798 } 4799 4800 /* stop RX */ 4801 ret = lan78xx_stop_rx_path(dev); 4802 if (ret < 0) 4803 goto out; 4804 4805 ret = lan78xx_flush_rx_fifo(dev); 4806 if (ret < 0) 4807 goto out; 4808 4809 /* stop Tx */ 4810 ret = lan78xx_stop_tx_path(dev); 4811 if (ret < 0) 4812 goto out; 4813 4814 /* empty out the Rx and Tx queues */ 4815 netif_device_detach(dev->net); 4816 lan78xx_terminate_urbs(dev); 4817 usb_kill_urb(dev->urb_intr); 4818 4819 /* reattach */ 4820 netif_device_attach(dev->net); 4821 4822 del_timer(&dev->stat_monitor); 4823 4824 if (PMSG_IS_AUTO(message)) { 4825 ret = lan78xx_set_auto_suspend(dev); 4826 if (ret < 0) 4827 goto out; 4828 } else { 4829 struct lan78xx_priv *pdata; 4830 4831 pdata = (struct lan78xx_priv *)(dev->data[0]); 4832 netif_carrier_off(dev->net); 4833 ret = lan78xx_set_suspend(dev, pdata->wol); 4834 if (ret < 0) 4835 goto out; 4836 } 4837 } else { 4838 /* Interface is down; don't allow WOL and PHY 4839 * events to wake up the host 4840 */ 4841 u32 buf; 4842 4843 set_bit(EVENT_DEV_ASLEEP, &dev->flags); 4844 4845 ret = lan78xx_write_reg(dev, WUCSR, 0); 4846 if (ret < 0) 4847 goto out; 4848 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4849 if (ret < 0) 4850 goto out; 4851 4852 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4853 if (ret < 0) 4854 goto out; 4855 4856 buf &= ~PMT_CTL_RES_CLR_WKP_EN_; 4857 buf |= PMT_CTL_RES_CLR_WKP_STS_; 4858 buf &= ~PMT_CTL_SUS_MODE_MASK_; 4859 buf |= PMT_CTL_SUS_MODE_3_; 4860 4861 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4862 if (ret < 0) 4863 goto out; 4864 4865 ret = lan78xx_read_reg(dev, PMT_CTL, &buf); 4866 if (ret < 0) 4867 goto out; 4868 4869 buf |= PMT_CTL_WUPS_MASK_; 4870 4871 ret = lan78xx_write_reg(dev, PMT_CTL, buf); 4872 if (ret < 0) 4873 goto out; 4874 } 4875 4876 ret = 0; 4877 out: 4878 mutex_unlock(&dev->dev_mutex); 4879 4880 return ret; 4881 } 4882 4883 static bool lan78xx_submit_deferred_urbs(struct lan78xx_net *dev) 4884 { 4885 bool pipe_halted = false; 4886 struct urb *urb; 4887 4888 while ((urb = usb_get_from_anchor(&dev->deferred))) { 4889 struct sk_buff *skb = urb->context; 4890 int ret; 4891 4892 if (!netif_device_present(dev->net) || 4893 !netif_carrier_ok(dev->net) || 4894 pipe_halted) { 4895 lan78xx_release_tx_buf(dev, skb); 4896 continue; 4897 } 4898 4899 ret = usb_submit_urb(urb, GFP_ATOMIC); 4900 4901 if (ret == 0) { 4902 netif_trans_update(dev->net); 4903 lan78xx_queue_skb(&dev->txq, skb, tx_start); 4904 } else { 4905 if (ret == -EPIPE) { 4906 netif_stop_queue(dev->net); 4907 pipe_halted = true; 4908 } else if (ret == -ENODEV) { 4909 netif_device_detach(dev->net); 4910 } 4911 4912 lan78xx_release_tx_buf(dev, skb); 4913 } 4914 } 4915 4916 return pipe_halted; 4917 } 4918 4919 static int lan78xx_resume(struct usb_interface *intf) 4920 { 4921 struct lan78xx_net *dev = usb_get_intfdata(intf); 4922 bool dev_open; 4923 int ret; 4924 4925 mutex_lock(&dev->dev_mutex); 4926 4927 netif_dbg(dev, ifup, dev->net, "resuming device"); 4928 4929 dev_open = test_bit(EVENT_DEV_OPEN, &dev->flags); 4930 4931 if (dev_open) { 4932 bool pipe_halted = false; 4933 4934 ret = lan78xx_flush_tx_fifo(dev); 4935 if (ret < 0) 4936 goto out; 4937 4938 if (dev->urb_intr) { 4939 int ret = usb_submit_urb(dev->urb_intr, GFP_KERNEL); 4940 4941 if (ret < 0) { 4942 if (ret == -ENODEV) 4943 netif_device_detach(dev->net); 4944 netdev_warn(dev->net, "Failed to submit intr URB"); 4945 } 4946 } 4947 4948 spin_lock_irq(&dev->txq.lock); 4949 4950 if (netif_device_present(dev->net)) { 4951 pipe_halted = lan78xx_submit_deferred_urbs(dev); 4952 4953 if (pipe_halted) 4954 lan78xx_defer_kevent(dev, EVENT_TX_HALT); 4955 } 4956 4957 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 4958 4959 spin_unlock_irq(&dev->txq.lock); 4960 4961 if (!pipe_halted && 4962 netif_device_present(dev->net) && 4963 (lan78xx_tx_pend_data_len(dev) < lan78xx_tx_urb_space(dev))) 4964 netif_start_queue(dev->net); 4965 4966 ret = lan78xx_start_tx_path(dev); 4967 if (ret < 0) 4968 goto out; 4969 4970 napi_schedule(&dev->napi); 4971 4972 if (!timer_pending(&dev->stat_monitor)) { 4973 dev->delta = 1; 4974 mod_timer(&dev->stat_monitor, 4975 jiffies + STAT_UPDATE_TIMER); 4976 } 4977 4978 } else { 4979 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); 4980 } 4981 4982 ret = lan78xx_write_reg(dev, WUCSR2, 0); 4983 if (ret < 0) 4984 goto out; 4985 ret = lan78xx_write_reg(dev, WUCSR, 0); 4986 if (ret < 0) 4987 goto out; 4988 ret = lan78xx_write_reg(dev, WK_SRC, 0xFFF1FF1FUL); 4989 if (ret < 0) 4990 goto out; 4991 4992 ret = lan78xx_write_reg(dev, WUCSR2, WUCSR2_NS_RCD_ | 4993 WUCSR2_ARP_RCD_ | 4994 WUCSR2_IPV6_TCPSYN_RCD_ | 4995 WUCSR2_IPV4_TCPSYN_RCD_); 4996 if (ret < 0) 4997 goto out; 4998 4999 ret = lan78xx_write_reg(dev, WUCSR, WUCSR_EEE_TX_WAKE_ | 5000 WUCSR_EEE_RX_WAKE_ | 5001 WUCSR_PFDA_FR_ | 5002 WUCSR_RFE_WAKE_FR_ | 5003 WUCSR_WUFR_ | 5004 WUCSR_MPR_ | 5005 WUCSR_BCST_FR_); 5006 if (ret < 0) 5007 goto out; 5008 5009 ret = 0; 5010 out: 5011 mutex_unlock(&dev->dev_mutex); 5012 5013 return ret; 5014 } 5015 5016 static int lan78xx_reset_resume(struct usb_interface *intf) 5017 { 5018 struct lan78xx_net *dev = usb_get_intfdata(intf); 5019 int ret; 5020 5021 netif_dbg(dev, ifup, dev->net, "(reset) resuming device"); 5022 5023 ret = lan78xx_reset(dev); 5024 if (ret < 0) 5025 return ret; 5026 5027 phy_start(dev->net->phydev); 5028 5029 ret = lan78xx_resume(intf); 5030 5031 return ret; 5032 } 5033 5034 static const struct usb_device_id products[] = { 5035 { 5036 /* LAN7800 USB Gigabit Ethernet Device */ 5037 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7800_USB_PRODUCT_ID), 5038 }, 5039 { 5040 /* LAN7850 USB Gigabit Ethernet Device */ 5041 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7850_USB_PRODUCT_ID), 5042 }, 5043 { 5044 /* LAN7801 USB Gigabit Ethernet Device */ 5045 USB_DEVICE(LAN78XX_USB_VENDOR_ID, LAN7801_USB_PRODUCT_ID), 5046 }, 5047 { 5048 /* ATM2-AF USB Gigabit Ethernet Device */ 5049 USB_DEVICE(AT29M2AF_USB_VENDOR_ID, AT29M2AF_USB_PRODUCT_ID), 5050 }, 5051 {}, 5052 }; 5053 MODULE_DEVICE_TABLE(usb, products); 5054 5055 static struct usb_driver lan78xx_driver = { 5056 .name = DRIVER_NAME, 5057 .id_table = products, 5058 .probe = lan78xx_probe, 5059 .disconnect = lan78xx_disconnect, 5060 .suspend = lan78xx_suspend, 5061 .resume = lan78xx_resume, 5062 .reset_resume = lan78xx_reset_resume, 5063 .supports_autosuspend = 1, 5064 .disable_hub_initiated_lpm = 1, 5065 }; 5066 5067 module_usb_driver(lan78xx_driver); 5068 5069 MODULE_AUTHOR(DRIVER_AUTHOR); 5070 MODULE_DESCRIPTION(DRIVER_DESC); 5071 MODULE_LICENSE("GPL"); 5072