xref: /linux/drivers/net/usb/ax88179_178a.c (revision 1553a1c48281243359a9529a10ddb551f3b967ab)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * ASIX AX88179/178A USB 3.0/2.0 to Gigabit Ethernet Devices
4  *
5  * Copyright (C) 2011-2013 ASIX
6  */
7 
8 #include <linux/module.h>
9 #include <linux/etherdevice.h>
10 #include <linux/mii.h>
11 #include <linux/usb.h>
12 #include <linux/crc32.h>
13 #include <linux/usb/usbnet.h>
14 #include <uapi/linux/mdio.h>
15 #include <linux/mdio.h>
16 
17 #define AX88179_PHY_ID				0x03
18 #define AX_EEPROM_LEN				0x100
19 #define AX88179_EEPROM_MAGIC			0x17900b95
20 #define AX_MCAST_FLTSIZE			8
21 #define AX_MAX_MCAST				64
22 #define AX_INT_PPLS_LINK			((u32)BIT(16))
23 #define AX_RXHDR_L4_TYPE_MASK			0x1c
24 #define AX_RXHDR_L4_TYPE_UDP			4
25 #define AX_RXHDR_L4_TYPE_TCP			16
26 #define AX_RXHDR_L3CSUM_ERR			2
27 #define AX_RXHDR_L4CSUM_ERR			1
28 #define AX_RXHDR_CRC_ERR			((u32)BIT(29))
29 #define AX_RXHDR_DROP_ERR			((u32)BIT(31))
30 #define AX_ACCESS_MAC				0x01
31 #define AX_ACCESS_PHY				0x02
32 #define AX_ACCESS_EEPROM			0x04
33 #define AX_ACCESS_EFUS				0x05
34 #define AX_RELOAD_EEPROM_EFUSE			0x06
35 #define AX_PAUSE_WATERLVL_HIGH			0x54
36 #define AX_PAUSE_WATERLVL_LOW			0x55
37 
38 #define PHYSICAL_LINK_STATUS			0x02
39 	#define	AX_USB_SS		0x04
40 	#define	AX_USB_HS		0x02
41 
42 #define GENERAL_STATUS				0x03
43 /* Check AX88179 version. UA1:Bit2 = 0,  UA2:Bit2 = 1 */
44 	#define	AX_SECLD		0x04
45 
46 #define AX_SROM_ADDR				0x07
47 #define AX_SROM_CMD				0x0a
48 	#define EEP_RD			0x04
49 	#define EEP_BUSY		0x10
50 
51 #define AX_SROM_DATA_LOW			0x08
52 #define AX_SROM_DATA_HIGH			0x09
53 
54 #define AX_RX_CTL				0x0b
55 	#define AX_RX_CTL_DROPCRCERR	0x0100
56 	#define AX_RX_CTL_IPE		0x0200
57 	#define AX_RX_CTL_START		0x0080
58 	#define AX_RX_CTL_AP		0x0020
59 	#define AX_RX_CTL_AM		0x0010
60 	#define AX_RX_CTL_AB		0x0008
61 	#define AX_RX_CTL_AMALL		0x0002
62 	#define AX_RX_CTL_PRO		0x0001
63 	#define AX_RX_CTL_STOP		0x0000
64 
65 #define AX_NODE_ID				0x10
66 #define AX_MULFLTARY				0x16
67 
68 #define AX_MEDIUM_STATUS_MODE			0x22
69 	#define AX_MEDIUM_GIGAMODE	0x01
70 	#define AX_MEDIUM_FULL_DUPLEX	0x02
71 	#define AX_MEDIUM_EN_125MHZ	0x08
72 	#define AX_MEDIUM_RXFLOW_CTRLEN	0x10
73 	#define AX_MEDIUM_TXFLOW_CTRLEN	0x20
74 	#define AX_MEDIUM_RECEIVE_EN	0x100
75 	#define AX_MEDIUM_PS		0x200
76 	#define AX_MEDIUM_JUMBO_EN	0x8040
77 
78 #define AX_MONITOR_MOD				0x24
79 	#define AX_MONITOR_MODE_RWLC	0x02
80 	#define AX_MONITOR_MODE_RWMP	0x04
81 	#define AX_MONITOR_MODE_PMEPOL	0x20
82 	#define AX_MONITOR_MODE_PMETYPE	0x40
83 
84 #define AX_GPIO_CTRL				0x25
85 	#define AX_GPIO_CTRL_GPIO3EN	0x80
86 	#define AX_GPIO_CTRL_GPIO2EN	0x40
87 	#define AX_GPIO_CTRL_GPIO1EN	0x20
88 
89 #define AX_PHYPWR_RSTCTL			0x26
90 	#define AX_PHYPWR_RSTCTL_BZ	0x0010
91 	#define AX_PHYPWR_RSTCTL_IPRL	0x0020
92 	#define AX_PHYPWR_RSTCTL_AT	0x1000
93 
94 #define AX_RX_BULKIN_QCTRL			0x2e
95 #define AX_CLK_SELECT				0x33
96 	#define AX_CLK_SELECT_BCS	0x01
97 	#define AX_CLK_SELECT_ACS	0x02
98 	#define AX_CLK_SELECT_ULR	0x08
99 
100 #define AX_RXCOE_CTL				0x34
101 	#define AX_RXCOE_IP		0x01
102 	#define AX_RXCOE_TCP		0x02
103 	#define AX_RXCOE_UDP		0x04
104 	#define AX_RXCOE_TCPV6		0x20
105 	#define AX_RXCOE_UDPV6		0x40
106 
107 #define AX_TXCOE_CTL				0x35
108 	#define AX_TXCOE_IP		0x01
109 	#define AX_TXCOE_TCP		0x02
110 	#define AX_TXCOE_UDP		0x04
111 	#define AX_TXCOE_TCPV6		0x20
112 	#define AX_TXCOE_UDPV6		0x40
113 
114 #define AX_LEDCTRL				0x73
115 
116 #define GMII_PHY_PHYSR				0x11
117 	#define GMII_PHY_PHYSR_SMASK	0xc000
118 	#define GMII_PHY_PHYSR_GIGA	0x8000
119 	#define GMII_PHY_PHYSR_100	0x4000
120 	#define GMII_PHY_PHYSR_FULL	0x2000
121 	#define GMII_PHY_PHYSR_LINK	0x400
122 
123 #define GMII_LED_ACT				0x1a
124 	#define	GMII_LED_ACTIVE_MASK	0xff8f
125 	#define	GMII_LED0_ACTIVE	BIT(4)
126 	#define	GMII_LED1_ACTIVE	BIT(5)
127 	#define	GMII_LED2_ACTIVE	BIT(6)
128 
129 #define GMII_LED_LINK				0x1c
130 	#define	GMII_LED_LINK_MASK	0xf888
131 	#define	GMII_LED0_LINK_10	BIT(0)
132 	#define	GMII_LED0_LINK_100	BIT(1)
133 	#define	GMII_LED0_LINK_1000	BIT(2)
134 	#define	GMII_LED1_LINK_10	BIT(4)
135 	#define	GMII_LED1_LINK_100	BIT(5)
136 	#define	GMII_LED1_LINK_1000	BIT(6)
137 	#define	GMII_LED2_LINK_10	BIT(8)
138 	#define	GMII_LED2_LINK_100	BIT(9)
139 	#define	GMII_LED2_LINK_1000	BIT(10)
140 	#define	LED0_ACTIVE		BIT(0)
141 	#define	LED0_LINK_10		BIT(1)
142 	#define	LED0_LINK_100		BIT(2)
143 	#define	LED0_LINK_1000		BIT(3)
144 	#define	LED0_FD			BIT(4)
145 	#define	LED0_USB3_MASK		0x001f
146 	#define	LED1_ACTIVE		BIT(5)
147 	#define	LED1_LINK_10		BIT(6)
148 	#define	LED1_LINK_100		BIT(7)
149 	#define	LED1_LINK_1000		BIT(8)
150 	#define	LED1_FD			BIT(9)
151 	#define	LED1_USB3_MASK		0x03e0
152 	#define	LED2_ACTIVE		BIT(10)
153 	#define	LED2_LINK_1000		BIT(13)
154 	#define	LED2_LINK_100		BIT(12)
155 	#define	LED2_LINK_10		BIT(11)
156 	#define	LED2_FD			BIT(14)
157 	#define	LED_VALID		BIT(15)
158 	#define	LED2_USB3_MASK		0x7c00
159 
160 #define GMII_PHYPAGE				0x1e
161 #define GMII_PHY_PAGE_SELECT			0x1f
162 	#define GMII_PHY_PGSEL_EXT	0x0007
163 	#define GMII_PHY_PGSEL_PAGE0	0x0000
164 	#define GMII_PHY_PGSEL_PAGE3	0x0003
165 	#define GMII_PHY_PGSEL_PAGE5	0x0005
166 
167 static int ax88179_reset(struct usbnet *dev);
168 
169 struct ax88179_data {
170 	u8  eee_enabled;
171 	u8  eee_active;
172 	u16 rxctl;
173 	u8 in_pm;
174 	u32 wol_supported;
175 	u32 wolopts;
176 	u8 disconnecting;
177 };
178 
179 struct ax88179_int_data {
180 	__le32 intdata1;
181 	__le32 intdata2;
182 };
183 
184 static const struct {
185 	unsigned char ctrl, timer_l, timer_h, size, ifg;
186 } AX88179_BULKIN_SIZE[] =	{
187 	{7, 0x4f, 0,	0x12, 0xff},
188 	{7, 0x20, 3,	0x16, 0xff},
189 	{7, 0xae, 7,	0x18, 0xff},
190 	{7, 0xcc, 0x4c, 0x18, 8},
191 };
192 
193 static void ax88179_set_pm_mode(struct usbnet *dev, bool pm_mode)
194 {
195 	struct ax88179_data *ax179_data = dev->driver_priv;
196 
197 	ax179_data->in_pm = pm_mode;
198 }
199 
200 static int ax88179_in_pm(struct usbnet *dev)
201 {
202 	struct ax88179_data *ax179_data = dev->driver_priv;
203 
204 	return ax179_data->in_pm;
205 }
206 
207 static int __ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
208 			      u16 size, void *data)
209 {
210 	int ret;
211 	int (*fn)(struct usbnet *, u8, u8, u16, u16, void *, u16);
212 	struct ax88179_data *ax179_data = dev->driver_priv;
213 
214 	BUG_ON(!dev);
215 
216 	if (!ax88179_in_pm(dev))
217 		fn = usbnet_read_cmd;
218 	else
219 		fn = usbnet_read_cmd_nopm;
220 
221 	ret = fn(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
222 		 value, index, data, size);
223 
224 	if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
225 		netdev_warn(dev->net, "Failed to read reg index 0x%04x: %d\n",
226 			    index, ret);
227 
228 	return ret;
229 }
230 
231 static int __ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
232 			       u16 size, const void *data)
233 {
234 	int ret;
235 	int (*fn)(struct usbnet *, u8, u8, u16, u16, const void *, u16);
236 	struct ax88179_data *ax179_data = dev->driver_priv;
237 
238 	BUG_ON(!dev);
239 
240 	if (!ax88179_in_pm(dev))
241 		fn = usbnet_write_cmd;
242 	else
243 		fn = usbnet_write_cmd_nopm;
244 
245 	ret = fn(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
246 		 value, index, data, size);
247 
248 	if (unlikely((ret < 0) && !(ret == -ENODEV && ax179_data->disconnecting)))
249 		netdev_warn(dev->net, "Failed to write reg index 0x%04x: %d\n",
250 			    index, ret);
251 
252 	return ret;
253 }
254 
255 static void ax88179_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
256 				    u16 index, u16 size, void *data)
257 {
258 	u16 buf;
259 
260 	if (2 == size) {
261 		buf = *((u16 *)data);
262 		cpu_to_le16s(&buf);
263 		usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
264 				       USB_RECIP_DEVICE, value, index, &buf,
265 				       size);
266 	} else {
267 		usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
268 				       USB_RECIP_DEVICE, value, index, data,
269 				       size);
270 	}
271 }
272 
273 static int ax88179_read_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
274 			    u16 size, void *data)
275 {
276 	int ret;
277 
278 	if (2 == size) {
279 		u16 buf = 0;
280 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
281 		le16_to_cpus(&buf);
282 		*((u16 *)data) = buf;
283 	} else if (4 == size) {
284 		u32 buf = 0;
285 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, &buf);
286 		le32_to_cpus(&buf);
287 		*((u32 *)data) = buf;
288 	} else {
289 		ret = __ax88179_read_cmd(dev, cmd, value, index, size, data);
290 	}
291 
292 	return ret;
293 }
294 
295 static int ax88179_write_cmd(struct usbnet *dev, u8 cmd, u16 value, u16 index,
296 			     u16 size, const void *data)
297 {
298 	int ret;
299 
300 	if (2 == size) {
301 		u16 buf;
302 		buf = *((u16 *)data);
303 		cpu_to_le16s(&buf);
304 		ret = __ax88179_write_cmd(dev, cmd, value, index,
305 					  size, &buf);
306 	} else {
307 		ret = __ax88179_write_cmd(dev, cmd, value, index,
308 					  size, data);
309 	}
310 
311 	return ret;
312 }
313 
314 static void ax88179_status(struct usbnet *dev, struct urb *urb)
315 {
316 	struct ax88179_int_data *event;
317 	u32 link;
318 
319 	if (urb->actual_length < 8)
320 		return;
321 
322 	event = urb->transfer_buffer;
323 	le32_to_cpus((void *)&event->intdata1);
324 
325 	link = (((__force u32)event->intdata1) & AX_INT_PPLS_LINK) >> 16;
326 
327 	if (netif_carrier_ok(dev->net) != link) {
328 		usbnet_link_change(dev, link, 1);
329 		netdev_info(dev->net, "ax88179 - Link status is: %d\n", link);
330 	}
331 }
332 
333 static int ax88179_mdio_read(struct net_device *netdev, int phy_id, int loc)
334 {
335 	struct usbnet *dev = netdev_priv(netdev);
336 	u16 res;
337 
338 	ax88179_read_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
339 	return res;
340 }
341 
342 static void ax88179_mdio_write(struct net_device *netdev, int phy_id, int loc,
343 			       int val)
344 {
345 	struct usbnet *dev = netdev_priv(netdev);
346 	u16 res = (u16) val;
347 
348 	ax88179_write_cmd(dev, AX_ACCESS_PHY, phy_id, (__u16)loc, 2, &res);
349 }
350 
351 static inline int ax88179_phy_mmd_indirect(struct usbnet *dev, u16 prtad,
352 					   u16 devad)
353 {
354 	u16 tmp16;
355 	int ret;
356 
357 	tmp16 = devad;
358 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
359 				MII_MMD_CTRL, 2, &tmp16);
360 
361 	tmp16 = prtad;
362 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
363 				MII_MMD_DATA, 2, &tmp16);
364 
365 	tmp16 = devad | MII_MMD_CTRL_NOINCR;
366 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
367 				MII_MMD_CTRL, 2, &tmp16);
368 
369 	return ret;
370 }
371 
372 static int
373 ax88179_phy_read_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad)
374 {
375 	int ret;
376 	u16 tmp16;
377 
378 	ax88179_phy_mmd_indirect(dev, prtad, devad);
379 
380 	ret = ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
381 			       MII_MMD_DATA, 2, &tmp16);
382 	if (ret < 0)
383 		return ret;
384 
385 	return tmp16;
386 }
387 
388 static int
389 ax88179_phy_write_mmd_indirect(struct usbnet *dev, u16 prtad, u16 devad,
390 			       u16 data)
391 {
392 	int ret;
393 
394 	ax88179_phy_mmd_indirect(dev, prtad, devad);
395 
396 	ret = ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
397 				MII_MMD_DATA, 2, &data);
398 
399 	if (ret < 0)
400 		return ret;
401 
402 	return 0;
403 }
404 
405 static int ax88179_suspend(struct usb_interface *intf, pm_message_t message)
406 {
407 	struct usbnet *dev = usb_get_intfdata(intf);
408 	struct ax88179_data *priv = dev->driver_priv;
409 	u16 tmp16;
410 	u8 tmp8;
411 
412 	ax88179_set_pm_mode(dev, true);
413 
414 	usbnet_suspend(intf, message);
415 
416 	/* Enable WoL */
417 	if (priv->wolopts) {
418 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
419 				 1, 1, &tmp8);
420 		if (priv->wolopts & WAKE_PHY)
421 			tmp8 |= AX_MONITOR_MODE_RWLC;
422 		if (priv->wolopts & WAKE_MAGIC)
423 			tmp8 |= AX_MONITOR_MODE_RWMP;
424 
425 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
426 				  1, 1, &tmp8);
427 	}
428 
429 	/* Disable RX path */
430 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
431 			 2, 2, &tmp16);
432 	tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
433 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
434 			  2, 2, &tmp16);
435 
436 	/* Force bulk-in zero length */
437 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
438 			 2, 2, &tmp16);
439 
440 	tmp16 |= AX_PHYPWR_RSTCTL_BZ | AX_PHYPWR_RSTCTL_IPRL;
441 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL,
442 			  2, 2, &tmp16);
443 
444 	/* change clock */
445 	tmp8 = 0;
446 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
447 
448 	/* Configure RX control register => stop operation */
449 	tmp16 = AX_RX_CTL_STOP;
450 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
451 
452 	ax88179_set_pm_mode(dev, false);
453 
454 	return 0;
455 }
456 
457 /* This function is used to enable the autodetach function. */
458 /* This function is determined by offset 0x43 of EEPROM */
459 static int ax88179_auto_detach(struct usbnet *dev)
460 {
461 	u16 tmp16;
462 	u8 tmp8;
463 
464 	if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x43, 1, 2, &tmp16) < 0)
465 		return 0;
466 
467 	if ((tmp16 == 0xFFFF) || (!(tmp16 & 0x0100)))
468 		return 0;
469 
470 	/* Enable Auto Detach bit */
471 	tmp8 = 0;
472 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
473 	tmp8 |= AX_CLK_SELECT_ULR;
474 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp8);
475 
476 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
477 	tmp16 |= AX_PHYPWR_RSTCTL_AT;
478 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
479 
480 	return 0;
481 }
482 
483 static int ax88179_resume(struct usb_interface *intf)
484 {
485 	struct usbnet *dev = usb_get_intfdata(intf);
486 
487 	ax88179_set_pm_mode(dev, true);
488 
489 	usbnet_link_change(dev, 0, 0);
490 
491 	ax88179_reset(dev);
492 
493 	ax88179_set_pm_mode(dev, false);
494 
495 	return usbnet_resume(intf);
496 }
497 
498 static void ax88179_disconnect(struct usb_interface *intf)
499 {
500 	struct usbnet *dev = usb_get_intfdata(intf);
501 	struct ax88179_data *ax179_data;
502 
503 	if (!dev)
504 		return;
505 
506 	ax179_data = dev->driver_priv;
507 	ax179_data->disconnecting = 1;
508 
509 	usbnet_disconnect(intf);
510 }
511 
512 static void
513 ax88179_get_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
514 {
515 	struct usbnet *dev = netdev_priv(net);
516 	struct ax88179_data *priv = dev->driver_priv;
517 
518 	wolinfo->supported = priv->wol_supported;
519 	wolinfo->wolopts = priv->wolopts;
520 }
521 
522 static int
523 ax88179_set_wol(struct net_device *net, struct ethtool_wolinfo *wolinfo)
524 {
525 	struct usbnet *dev = netdev_priv(net);
526 	struct ax88179_data *priv = dev->driver_priv;
527 
528 	if (wolinfo->wolopts & ~(priv->wol_supported))
529 		return -EINVAL;
530 
531 	priv->wolopts = wolinfo->wolopts;
532 
533 	return 0;
534 }
535 
536 static int ax88179_get_eeprom_len(struct net_device *net)
537 {
538 	return AX_EEPROM_LEN;
539 }
540 
541 static int
542 ax88179_get_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
543 		   u8 *data)
544 {
545 	struct usbnet *dev = netdev_priv(net);
546 	u16 *eeprom_buff;
547 	int first_word, last_word;
548 	int i, ret;
549 
550 	if (eeprom->len == 0)
551 		return -EINVAL;
552 
553 	eeprom->magic = AX88179_EEPROM_MAGIC;
554 
555 	first_word = eeprom->offset >> 1;
556 	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
557 	eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
558 				    GFP_KERNEL);
559 	if (!eeprom_buff)
560 		return -ENOMEM;
561 
562 	/* ax88179/178A returns 2 bytes from eeprom on read */
563 	for (i = first_word; i <= last_word; i++) {
564 		ret = __ax88179_read_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
565 					 &eeprom_buff[i - first_word]);
566 		if (ret < 0) {
567 			kfree(eeprom_buff);
568 			return -EIO;
569 		}
570 	}
571 
572 	memcpy(data, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
573 	kfree(eeprom_buff);
574 	return 0;
575 }
576 
577 static int
578 ax88179_set_eeprom(struct net_device *net, struct ethtool_eeprom *eeprom,
579 		   u8 *data)
580 {
581 	struct usbnet *dev = netdev_priv(net);
582 	u16 *eeprom_buff;
583 	int first_word;
584 	int last_word;
585 	int ret;
586 	int i;
587 
588 	netdev_dbg(net, "write EEPROM len %d, offset %d, magic 0x%x\n",
589 		   eeprom->len, eeprom->offset, eeprom->magic);
590 
591 	if (eeprom->len == 0)
592 		return -EINVAL;
593 
594 	if (eeprom->magic != AX88179_EEPROM_MAGIC)
595 		return -EINVAL;
596 
597 	first_word = eeprom->offset >> 1;
598 	last_word = (eeprom->offset + eeprom->len - 1) >> 1;
599 
600 	eeprom_buff = kmalloc_array(last_word - first_word + 1, sizeof(u16),
601 				    GFP_KERNEL);
602 	if (!eeprom_buff)
603 		return -ENOMEM;
604 
605 	/* align data to 16 bit boundaries, read the missing data from
606 	   the EEPROM */
607 	if (eeprom->offset & 1) {
608 		ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, first_word, 1, 2,
609 				       &eeprom_buff[0]);
610 		if (ret < 0) {
611 			netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", first_word);
612 			goto free;
613 		}
614 	}
615 
616 	if ((eeprom->offset + eeprom->len) & 1) {
617 		ret = ax88179_read_cmd(dev, AX_ACCESS_EEPROM, last_word, 1, 2,
618 				       &eeprom_buff[last_word - first_word]);
619 		if (ret < 0) {
620 			netdev_err(net, "Failed to read EEPROM at offset 0x%02x.\n", last_word);
621 			goto free;
622 		}
623 	}
624 
625 	memcpy((u8 *)eeprom_buff + (eeprom->offset & 1), data, eeprom->len);
626 
627 	for (i = first_word; i <= last_word; i++) {
628 		netdev_dbg(net, "write to EEPROM at offset 0x%02x, data 0x%04x\n",
629 			   i, eeprom_buff[i - first_word]);
630 		ret = ax88179_write_cmd(dev, AX_ACCESS_EEPROM, i, 1, 2,
631 					&eeprom_buff[i - first_word]);
632 		if (ret < 0) {
633 			netdev_err(net, "Failed to write EEPROM at offset 0x%02x.\n", i);
634 			goto free;
635 		}
636 		msleep(20);
637 	}
638 
639 	/* reload EEPROM data */
640 	ret = ax88179_write_cmd(dev, AX_RELOAD_EEPROM_EFUSE, 0x0000, 0, 0, NULL);
641 	if (ret < 0) {
642 		netdev_err(net, "Failed to reload EEPROM data\n");
643 		goto free;
644 	}
645 
646 	ret = 0;
647 free:
648 	kfree(eeprom_buff);
649 	return ret;
650 }
651 
652 static int ax88179_get_link_ksettings(struct net_device *net,
653 				      struct ethtool_link_ksettings *cmd)
654 {
655 	struct usbnet *dev = netdev_priv(net);
656 
657 	mii_ethtool_get_link_ksettings(&dev->mii, cmd);
658 
659 	return 0;
660 }
661 
662 static int ax88179_set_link_ksettings(struct net_device *net,
663 				      const struct ethtool_link_ksettings *cmd)
664 {
665 	struct usbnet *dev = netdev_priv(net);
666 	return mii_ethtool_set_link_ksettings(&dev->mii, cmd);
667 }
668 
669 static int
670 ax88179_ethtool_get_eee(struct usbnet *dev, struct ethtool_keee *data)
671 {
672 	int val;
673 
674 	/* Get Supported EEE */
675 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_PCS_EEE_ABLE,
676 					    MDIO_MMD_PCS);
677 	if (val < 0)
678 		return val;
679 	mii_eee_cap1_mod_linkmode_t(data->supported, val);
680 
681 	/* Get advertisement EEE */
682 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_ADV,
683 					    MDIO_MMD_AN);
684 	if (val < 0)
685 		return val;
686 	mii_eee_cap1_mod_linkmode_t(data->advertised, val);
687 
688 	/* Get LP advertisement EEE */
689 	val = ax88179_phy_read_mmd_indirect(dev, MDIO_AN_EEE_LPABLE,
690 					    MDIO_MMD_AN);
691 	if (val < 0)
692 		return val;
693 	mii_eee_cap1_mod_linkmode_t(data->lp_advertised, val);
694 
695 	return 0;
696 }
697 
698 static int
699 ax88179_ethtool_set_eee(struct usbnet *dev, struct ethtool_keee *data)
700 {
701 	u16 tmp16 = linkmode_to_mii_eee_cap1_t(data->advertised);
702 
703 	return ax88179_phy_write_mmd_indirect(dev, MDIO_AN_EEE_ADV,
704 					      MDIO_MMD_AN, tmp16);
705 }
706 
707 static int ax88179_chk_eee(struct usbnet *dev)
708 {
709 	struct ethtool_cmd ecmd = { .cmd = ETHTOOL_GSET };
710 	struct ax88179_data *priv = dev->driver_priv;
711 
712 	mii_ethtool_gset(&dev->mii, &ecmd);
713 
714 	if (ecmd.duplex & DUPLEX_FULL) {
715 		int eee_lp, eee_cap, eee_adv;
716 		u32 lp, cap, adv, supported = 0;
717 
718 		eee_cap = ax88179_phy_read_mmd_indirect(dev,
719 							MDIO_PCS_EEE_ABLE,
720 							MDIO_MMD_PCS);
721 		if (eee_cap < 0) {
722 			priv->eee_active = 0;
723 			return false;
724 		}
725 
726 		cap = mmd_eee_cap_to_ethtool_sup_t(eee_cap);
727 		if (!cap) {
728 			priv->eee_active = 0;
729 			return false;
730 		}
731 
732 		eee_lp = ax88179_phy_read_mmd_indirect(dev,
733 						       MDIO_AN_EEE_LPABLE,
734 						       MDIO_MMD_AN);
735 		if (eee_lp < 0) {
736 			priv->eee_active = 0;
737 			return false;
738 		}
739 
740 		eee_adv = ax88179_phy_read_mmd_indirect(dev,
741 							MDIO_AN_EEE_ADV,
742 							MDIO_MMD_AN);
743 
744 		if (eee_adv < 0) {
745 			priv->eee_active = 0;
746 			return false;
747 		}
748 
749 		adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
750 		lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
751 		supported = (ecmd.speed == SPEED_1000) ?
752 			     SUPPORTED_1000baseT_Full :
753 			     SUPPORTED_100baseT_Full;
754 
755 		if (!(lp & adv & supported)) {
756 			priv->eee_active = 0;
757 			return false;
758 		}
759 
760 		priv->eee_active = 1;
761 		return true;
762 	}
763 
764 	priv->eee_active = 0;
765 	return false;
766 }
767 
768 static void ax88179_disable_eee(struct usbnet *dev)
769 {
770 	u16 tmp16;
771 
772 	tmp16 = GMII_PHY_PGSEL_PAGE3;
773 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
774 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
775 
776 	tmp16 = 0x3246;
777 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
778 			  MII_PHYADDR, 2, &tmp16);
779 
780 	tmp16 = GMII_PHY_PGSEL_PAGE0;
781 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
782 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
783 }
784 
785 static void ax88179_enable_eee(struct usbnet *dev)
786 {
787 	u16 tmp16;
788 
789 	tmp16 = GMII_PHY_PGSEL_PAGE3;
790 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
791 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
792 
793 	tmp16 = 0x3247;
794 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
795 			  MII_PHYADDR, 2, &tmp16);
796 
797 	tmp16 = GMII_PHY_PGSEL_PAGE5;
798 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
799 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
800 
801 	tmp16 = 0x0680;
802 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
803 			  MII_BMSR, 2, &tmp16);
804 
805 	tmp16 = GMII_PHY_PGSEL_PAGE0;
806 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
807 			  GMII_PHY_PAGE_SELECT, 2, &tmp16);
808 }
809 
810 static int ax88179_get_eee(struct net_device *net, struct ethtool_keee *edata)
811 {
812 	struct usbnet *dev = netdev_priv(net);
813 	struct ax88179_data *priv = dev->driver_priv;
814 
815 	edata->eee_enabled = priv->eee_enabled;
816 	edata->eee_active = priv->eee_active;
817 
818 	return ax88179_ethtool_get_eee(dev, edata);
819 }
820 
821 static int ax88179_set_eee(struct net_device *net, struct ethtool_keee *edata)
822 {
823 	struct usbnet *dev = netdev_priv(net);
824 	struct ax88179_data *priv = dev->driver_priv;
825 	int ret;
826 
827 	priv->eee_enabled = edata->eee_enabled;
828 	if (!priv->eee_enabled) {
829 		ax88179_disable_eee(dev);
830 	} else {
831 		priv->eee_enabled = ax88179_chk_eee(dev);
832 		if (!priv->eee_enabled)
833 			return -EOPNOTSUPP;
834 
835 		ax88179_enable_eee(dev);
836 	}
837 
838 	ret = ax88179_ethtool_set_eee(dev, edata);
839 	if (ret)
840 		return ret;
841 
842 	mii_nway_restart(&dev->mii);
843 
844 	usbnet_link_change(dev, 0, 0);
845 
846 	return ret;
847 }
848 
849 static int ax88179_ioctl(struct net_device *net, struct ifreq *rq, int cmd)
850 {
851 	struct usbnet *dev = netdev_priv(net);
852 	return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL);
853 }
854 
855 static const struct ethtool_ops ax88179_ethtool_ops = {
856 	.get_link		= ethtool_op_get_link,
857 	.get_msglevel		= usbnet_get_msglevel,
858 	.set_msglevel		= usbnet_set_msglevel,
859 	.get_wol		= ax88179_get_wol,
860 	.set_wol		= ax88179_set_wol,
861 	.get_eeprom_len		= ax88179_get_eeprom_len,
862 	.get_eeprom		= ax88179_get_eeprom,
863 	.set_eeprom		= ax88179_set_eeprom,
864 	.get_eee		= ax88179_get_eee,
865 	.set_eee		= ax88179_set_eee,
866 	.nway_reset		= usbnet_nway_reset,
867 	.get_link_ksettings	= ax88179_get_link_ksettings,
868 	.set_link_ksettings	= ax88179_set_link_ksettings,
869 	.get_ts_info		= ethtool_op_get_ts_info,
870 };
871 
872 static void ax88179_set_multicast(struct net_device *net)
873 {
874 	struct usbnet *dev = netdev_priv(net);
875 	struct ax88179_data *data = dev->driver_priv;
876 	u8 *m_filter = ((u8 *)dev->data);
877 
878 	data->rxctl = (AX_RX_CTL_START | AX_RX_CTL_AB | AX_RX_CTL_IPE);
879 
880 	if (net->flags & IFF_PROMISC) {
881 		data->rxctl |= AX_RX_CTL_PRO;
882 	} else if (net->flags & IFF_ALLMULTI ||
883 		   netdev_mc_count(net) > AX_MAX_MCAST) {
884 		data->rxctl |= AX_RX_CTL_AMALL;
885 	} else if (netdev_mc_empty(net)) {
886 		/* just broadcast and directed */
887 	} else {
888 		/* We use dev->data for our 8 byte filter buffer
889 		 * to avoid allocating memory that is tricky to free later
890 		 */
891 		u32 crc_bits;
892 		struct netdev_hw_addr *ha;
893 
894 		memset(m_filter, 0, AX_MCAST_FLTSIZE);
895 
896 		netdev_for_each_mc_addr(ha, net) {
897 			crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
898 			*(m_filter + (crc_bits >> 3)) |= (1 << (crc_bits & 7));
899 		}
900 
901 		ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_MULFLTARY,
902 					AX_MCAST_FLTSIZE, AX_MCAST_FLTSIZE,
903 					m_filter);
904 
905 		data->rxctl |= AX_RX_CTL_AM;
906 	}
907 
908 	ax88179_write_cmd_async(dev, AX_ACCESS_MAC, AX_RX_CTL,
909 				2, 2, &data->rxctl);
910 }
911 
912 static int
913 ax88179_set_features(struct net_device *net, netdev_features_t features)
914 {
915 	u8 tmp;
916 	struct usbnet *dev = netdev_priv(net);
917 	netdev_features_t changed = net->features ^ features;
918 
919 	if (changed & NETIF_F_IP_CSUM) {
920 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
921 		tmp ^= AX_TXCOE_TCP | AX_TXCOE_UDP;
922 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
923 	}
924 
925 	if (changed & NETIF_F_IPV6_CSUM) {
926 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
927 		tmp ^= AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
928 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, &tmp);
929 	}
930 
931 	if (changed & NETIF_F_RXCSUM) {
932 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
933 		tmp ^= AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
934 		       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
935 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, &tmp);
936 	}
937 
938 	return 0;
939 }
940 
941 static int ax88179_change_mtu(struct net_device *net, int new_mtu)
942 {
943 	struct usbnet *dev = netdev_priv(net);
944 	u16 tmp16;
945 
946 	net->mtu = new_mtu;
947 	dev->hard_mtu = net->mtu + net->hard_header_len;
948 
949 	if (net->mtu > 1500) {
950 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
951 				 2, 2, &tmp16);
952 		tmp16 |= AX_MEDIUM_JUMBO_EN;
953 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
954 				  2, 2, &tmp16);
955 	} else {
956 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
957 				 2, 2, &tmp16);
958 		tmp16 &= ~AX_MEDIUM_JUMBO_EN;
959 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
960 				  2, 2, &tmp16);
961 	}
962 
963 	/* max qlen depend on hard_mtu and rx_urb_size */
964 	usbnet_update_max_qlen(dev);
965 
966 	return 0;
967 }
968 
969 static int ax88179_set_mac_addr(struct net_device *net, void *p)
970 {
971 	struct usbnet *dev = netdev_priv(net);
972 	struct sockaddr *addr = p;
973 	int ret;
974 
975 	if (netif_running(net))
976 		return -EBUSY;
977 	if (!is_valid_ether_addr(addr->sa_data))
978 		return -EADDRNOTAVAIL;
979 
980 	eth_hw_addr_set(net, addr->sa_data);
981 
982 	/* Set the MAC address */
983 	ret = ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
984 				 ETH_ALEN, net->dev_addr);
985 	if (ret < 0)
986 		return ret;
987 
988 	return 0;
989 }
990 
991 static const struct net_device_ops ax88179_netdev_ops = {
992 	.ndo_open		= usbnet_open,
993 	.ndo_stop		= usbnet_stop,
994 	.ndo_start_xmit		= usbnet_start_xmit,
995 	.ndo_tx_timeout		= usbnet_tx_timeout,
996 	.ndo_get_stats64	= dev_get_tstats64,
997 	.ndo_change_mtu		= ax88179_change_mtu,
998 	.ndo_set_mac_address	= ax88179_set_mac_addr,
999 	.ndo_validate_addr	= eth_validate_addr,
1000 	.ndo_eth_ioctl		= ax88179_ioctl,
1001 	.ndo_set_rx_mode	= ax88179_set_multicast,
1002 	.ndo_set_features	= ax88179_set_features,
1003 };
1004 
1005 static int ax88179_check_eeprom(struct usbnet *dev)
1006 {
1007 	u8 i, buf, eeprom[20];
1008 	u16 csum, delay = HZ / 10;
1009 	unsigned long jtimeout;
1010 
1011 	/* Read EEPROM content */
1012 	for (i = 0; i < 6; i++) {
1013 		buf = i;
1014 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1015 				      1, 1, &buf) < 0)
1016 			return -EINVAL;
1017 
1018 		buf = EEP_RD;
1019 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1020 				      1, 1, &buf) < 0)
1021 			return -EINVAL;
1022 
1023 		jtimeout = jiffies + delay;
1024 		do {
1025 			ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1026 					 1, 1, &buf);
1027 
1028 			if (time_after(jiffies, jtimeout))
1029 				return -EINVAL;
1030 
1031 		} while (buf & EEP_BUSY);
1032 
1033 		__ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1034 				   2, 2, &eeprom[i * 2]);
1035 
1036 		if ((i == 0) && (eeprom[0] == 0xFF))
1037 			return -EINVAL;
1038 	}
1039 
1040 	csum = eeprom[6] + eeprom[7] + eeprom[8] + eeprom[9];
1041 	csum = (csum >> 8) + (csum & 0xff);
1042 	if ((csum + eeprom[10]) != 0xff)
1043 		return -EINVAL;
1044 
1045 	return 0;
1046 }
1047 
1048 static int ax88179_check_efuse(struct usbnet *dev, u16 *ledmode)
1049 {
1050 	u8	i;
1051 	u8	efuse[64];
1052 	u16	csum = 0;
1053 
1054 	if (ax88179_read_cmd(dev, AX_ACCESS_EFUS, 0, 64, 64, efuse) < 0)
1055 		return -EINVAL;
1056 
1057 	if (*efuse == 0xFF)
1058 		return -EINVAL;
1059 
1060 	for (i = 0; i < 64; i++)
1061 		csum = csum + efuse[i];
1062 
1063 	while (csum > 255)
1064 		csum = (csum & 0x00FF) + ((csum >> 8) & 0x00FF);
1065 
1066 	if (csum != 0xFF)
1067 		return -EINVAL;
1068 
1069 	*ledmode = (efuse[51] << 8) | efuse[52];
1070 
1071 	return 0;
1072 }
1073 
1074 static int ax88179_convert_old_led(struct usbnet *dev, u16 *ledvalue)
1075 {
1076 	u16 led;
1077 
1078 	/* Loaded the old eFuse LED Mode */
1079 	if (ax88179_read_cmd(dev, AX_ACCESS_EEPROM, 0x3C, 1, 2, &led) < 0)
1080 		return -EINVAL;
1081 
1082 	led >>= 8;
1083 	switch (led) {
1084 	case 0xFF:
1085 		led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1086 		      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1087 		      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1088 		break;
1089 	case 0xFE:
1090 		led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 | LED_VALID;
1091 		break;
1092 	case 0xFD:
1093 		led = LED0_ACTIVE | LED1_LINK_1000 | LED2_LINK_100 |
1094 		      LED2_LINK_10 | LED_VALID;
1095 		break;
1096 	case 0xFC:
1097 		led = LED0_ACTIVE | LED1_ACTIVE | LED1_LINK_1000 | LED2_ACTIVE |
1098 		      LED2_LINK_100 | LED2_LINK_10 | LED_VALID;
1099 		break;
1100 	default:
1101 		led = LED0_ACTIVE | LED1_LINK_10 | LED1_LINK_100 |
1102 		      LED1_LINK_1000 | LED2_ACTIVE | LED2_LINK_10 |
1103 		      LED2_LINK_100 | LED2_LINK_1000 | LED_VALID;
1104 		break;
1105 	}
1106 
1107 	*ledvalue = led;
1108 
1109 	return 0;
1110 }
1111 
1112 static int ax88179_led_setting(struct usbnet *dev)
1113 {
1114 	u8 ledfd, value = 0;
1115 	u16 tmp, ledact, ledlink, ledvalue = 0, delay = HZ / 10;
1116 	unsigned long jtimeout;
1117 
1118 	/* Check AX88179 version. UA1 or UA2*/
1119 	ax88179_read_cmd(dev, AX_ACCESS_MAC, GENERAL_STATUS, 1, 1, &value);
1120 
1121 	if (!(value & AX_SECLD)) {	/* UA1 */
1122 		value = AX_GPIO_CTRL_GPIO3EN | AX_GPIO_CTRL_GPIO2EN |
1123 			AX_GPIO_CTRL_GPIO1EN;
1124 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_GPIO_CTRL,
1125 				      1, 1, &value) < 0)
1126 			return -EINVAL;
1127 	}
1128 
1129 	/* Check EEPROM */
1130 	if (!ax88179_check_eeprom(dev)) {
1131 		value = 0x42;
1132 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_ADDR,
1133 				      1, 1, &value) < 0)
1134 			return -EINVAL;
1135 
1136 		value = EEP_RD;
1137 		if (ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1138 				      1, 1, &value) < 0)
1139 			return -EINVAL;
1140 
1141 		jtimeout = jiffies + delay;
1142 		do {
1143 			ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_CMD,
1144 					 1, 1, &value);
1145 
1146 			if (time_after(jiffies, jtimeout))
1147 				return -EINVAL;
1148 
1149 		} while (value & EEP_BUSY);
1150 
1151 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_HIGH,
1152 				 1, 1, &value);
1153 		ledvalue = (value << 8);
1154 
1155 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_SROM_DATA_LOW,
1156 				 1, 1, &value);
1157 		ledvalue |= value;
1158 
1159 		/* load internal ROM for defaule setting */
1160 		if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1161 			ax88179_convert_old_led(dev, &ledvalue);
1162 
1163 	} else if (!ax88179_check_efuse(dev, &ledvalue)) {
1164 		if ((ledvalue == 0xFFFF) || ((ledvalue & LED_VALID) == 0))
1165 			ax88179_convert_old_led(dev, &ledvalue);
1166 	} else {
1167 		ax88179_convert_old_led(dev, &ledvalue);
1168 	}
1169 
1170 	tmp = GMII_PHY_PGSEL_EXT;
1171 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1172 			  GMII_PHY_PAGE_SELECT, 2, &tmp);
1173 
1174 	tmp = 0x2c;
1175 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1176 			  GMII_PHYPAGE, 2, &tmp);
1177 
1178 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1179 			 GMII_LED_ACT, 2, &ledact);
1180 
1181 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1182 			 GMII_LED_LINK, 2, &ledlink);
1183 
1184 	ledact &= GMII_LED_ACTIVE_MASK;
1185 	ledlink &= GMII_LED_LINK_MASK;
1186 
1187 	if (ledvalue & LED0_ACTIVE)
1188 		ledact |= GMII_LED0_ACTIVE;
1189 
1190 	if (ledvalue & LED1_ACTIVE)
1191 		ledact |= GMII_LED1_ACTIVE;
1192 
1193 	if (ledvalue & LED2_ACTIVE)
1194 		ledact |= GMII_LED2_ACTIVE;
1195 
1196 	if (ledvalue & LED0_LINK_10)
1197 		ledlink |= GMII_LED0_LINK_10;
1198 
1199 	if (ledvalue & LED1_LINK_10)
1200 		ledlink |= GMII_LED1_LINK_10;
1201 
1202 	if (ledvalue & LED2_LINK_10)
1203 		ledlink |= GMII_LED2_LINK_10;
1204 
1205 	if (ledvalue & LED0_LINK_100)
1206 		ledlink |= GMII_LED0_LINK_100;
1207 
1208 	if (ledvalue & LED1_LINK_100)
1209 		ledlink |= GMII_LED1_LINK_100;
1210 
1211 	if (ledvalue & LED2_LINK_100)
1212 		ledlink |= GMII_LED2_LINK_100;
1213 
1214 	if (ledvalue & LED0_LINK_1000)
1215 		ledlink |= GMII_LED0_LINK_1000;
1216 
1217 	if (ledvalue & LED1_LINK_1000)
1218 		ledlink |= GMII_LED1_LINK_1000;
1219 
1220 	if (ledvalue & LED2_LINK_1000)
1221 		ledlink |= GMII_LED2_LINK_1000;
1222 
1223 	tmp = ledact;
1224 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1225 			  GMII_LED_ACT, 2, &tmp);
1226 
1227 	tmp = ledlink;
1228 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1229 			  GMII_LED_LINK, 2, &tmp);
1230 
1231 	tmp = GMII_PHY_PGSEL_PAGE0;
1232 	ax88179_write_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1233 			  GMII_PHY_PAGE_SELECT, 2, &tmp);
1234 
1235 	/* LED full duplex setting */
1236 	ledfd = 0;
1237 	if (ledvalue & LED0_FD)
1238 		ledfd |= 0x01;
1239 	else if ((ledvalue & LED0_USB3_MASK) == 0)
1240 		ledfd |= 0x02;
1241 
1242 	if (ledvalue & LED1_FD)
1243 		ledfd |= 0x04;
1244 	else if ((ledvalue & LED1_USB3_MASK) == 0)
1245 		ledfd |= 0x08;
1246 
1247 	if (ledvalue & LED2_FD)
1248 		ledfd |= 0x10;
1249 	else if ((ledvalue & LED2_USB3_MASK) == 0)
1250 		ledfd |= 0x20;
1251 
1252 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_LEDCTRL, 1, 1, &ledfd);
1253 
1254 	return 0;
1255 }
1256 
1257 static void ax88179_get_mac_addr(struct usbnet *dev)
1258 {
1259 	u8 mac[ETH_ALEN];
1260 
1261 	memset(mac, 0, sizeof(mac));
1262 
1263 	/* Maybe the boot loader passed the MAC address via device tree */
1264 	if (!eth_platform_get_mac_address(&dev->udev->dev, mac)) {
1265 		netif_dbg(dev, ifup, dev->net,
1266 			  "MAC address read from device tree");
1267 	} else {
1268 		ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN,
1269 				 ETH_ALEN, mac);
1270 		netif_dbg(dev, ifup, dev->net,
1271 			  "MAC address read from ASIX chip");
1272 	}
1273 
1274 	if (is_valid_ether_addr(mac)) {
1275 		eth_hw_addr_set(dev->net, mac);
1276 	} else {
1277 		netdev_info(dev->net, "invalid MAC address, using random\n");
1278 		eth_hw_addr_random(dev->net);
1279 	}
1280 
1281 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_NODE_ID, ETH_ALEN, ETH_ALEN,
1282 			  dev->net->dev_addr);
1283 }
1284 
1285 static int ax88179_bind(struct usbnet *dev, struct usb_interface *intf)
1286 {
1287 	struct ax88179_data *ax179_data;
1288 
1289 	usbnet_get_endpoints(dev, intf);
1290 
1291 	ax179_data = kzalloc(sizeof(*ax179_data), GFP_KERNEL);
1292 	if (!ax179_data)
1293 		return -ENOMEM;
1294 
1295 	dev->driver_priv = ax179_data;
1296 
1297 	dev->net->netdev_ops = &ax88179_netdev_ops;
1298 	dev->net->ethtool_ops = &ax88179_ethtool_ops;
1299 	dev->net->needed_headroom = 8;
1300 	dev->net->max_mtu = 4088;
1301 
1302 	/* Initialize MII structure */
1303 	dev->mii.dev = dev->net;
1304 	dev->mii.mdio_read = ax88179_mdio_read;
1305 	dev->mii.mdio_write = ax88179_mdio_write;
1306 	dev->mii.phy_id_mask = 0xff;
1307 	dev->mii.reg_num_mask = 0xff;
1308 	dev->mii.phy_id = 0x03;
1309 	dev->mii.supports_gmii = 1;
1310 
1311 	dev->net->features |= NETIF_F_SG | NETIF_F_IP_CSUM |
1312 			      NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | NETIF_F_TSO;
1313 
1314 	dev->net->hw_features |= dev->net->features;
1315 
1316 	netif_set_tso_max_size(dev->net, 16384);
1317 
1318 	return 0;
1319 }
1320 
1321 static void ax88179_unbind(struct usbnet *dev, struct usb_interface *intf)
1322 {
1323 	struct ax88179_data *ax179_data = dev->driver_priv;
1324 	u16 tmp16;
1325 
1326 	/* Configure RX control register => stop operation */
1327 	tmp16 = AX_RX_CTL_STOP;
1328 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &tmp16);
1329 
1330 	tmp16 = 0;
1331 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, &tmp16);
1332 
1333 	/* Power down ethernet PHY */
1334 	tmp16 = 0;
1335 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, &tmp16);
1336 
1337 	kfree(ax179_data);
1338 }
1339 
1340 static void
1341 ax88179_rx_checksum(struct sk_buff *skb, u32 *pkt_hdr)
1342 {
1343 	skb->ip_summed = CHECKSUM_NONE;
1344 
1345 	/* checksum error bit is set */
1346 	if ((*pkt_hdr & AX_RXHDR_L3CSUM_ERR) ||
1347 	    (*pkt_hdr & AX_RXHDR_L4CSUM_ERR))
1348 		return;
1349 
1350 	/* It must be a TCP or UDP packet with a valid checksum */
1351 	if (((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_TCP) ||
1352 	    ((*pkt_hdr & AX_RXHDR_L4_TYPE_MASK) == AX_RXHDR_L4_TYPE_UDP))
1353 		skb->ip_summed = CHECKSUM_UNNECESSARY;
1354 }
1355 
1356 static int ax88179_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
1357 {
1358 	struct sk_buff *ax_skb;
1359 	int pkt_cnt;
1360 	u32 rx_hdr;
1361 	u16 hdr_off;
1362 	u32 *pkt_hdr;
1363 
1364 	/* At the end of the SKB, there's a header telling us how many packets
1365 	 * are bundled into this buffer and where we can find an array of
1366 	 * per-packet metadata (which contains elements encoded into u16).
1367 	 */
1368 
1369 	/* SKB contents for current firmware:
1370 	 *   <packet 1> <padding>
1371 	 *   ...
1372 	 *   <packet N> <padding>
1373 	 *   <per-packet metadata entry 1> <dummy header>
1374 	 *   ...
1375 	 *   <per-packet metadata entry N> <dummy header>
1376 	 *   <padding2> <rx_hdr>
1377 	 *
1378 	 * where:
1379 	 *   <packet N> contains pkt_len bytes:
1380 	 *		2 bytes of IP alignment pseudo header
1381 	 *		packet received
1382 	 *   <per-packet metadata entry N> contains 4 bytes:
1383 	 *		pkt_len and fields AX_RXHDR_*
1384 	 *   <padding>	0-7 bytes to terminate at
1385 	 *		8 bytes boundary (64-bit).
1386 	 *   <padding2> 4 bytes to make rx_hdr terminate at
1387 	 *		8 bytes boundary (64-bit)
1388 	 *   <dummy-header> contains 4 bytes:
1389 	 *		pkt_len=0 and AX_RXHDR_DROP_ERR
1390 	 *   <rx-hdr>	contains 4 bytes:
1391 	 *		pkt_cnt and hdr_off (offset of
1392 	 *		  <per-packet metadata entry 1>)
1393 	 *
1394 	 * pkt_cnt is number of entrys in the per-packet metadata.
1395 	 * In current firmware there is 2 entrys per packet.
1396 	 * The first points to the packet and the
1397 	 *  second is a dummy header.
1398 	 * This was done probably to align fields in 64-bit and
1399 	 *  maintain compatibility with old firmware.
1400 	 * This code assumes that <dummy header> and <padding2> are
1401 	 *  optional.
1402 	 */
1403 
1404 	if (skb->len < 4)
1405 		return 0;
1406 	skb_trim(skb, skb->len - 4);
1407 	rx_hdr = get_unaligned_le32(skb_tail_pointer(skb));
1408 	pkt_cnt = (u16)rx_hdr;
1409 	hdr_off = (u16)(rx_hdr >> 16);
1410 
1411 	if (pkt_cnt == 0)
1412 		return 0;
1413 
1414 	/* Make sure that the bounds of the metadata array are inside the SKB
1415 	 * (and in front of the counter at the end).
1416 	 */
1417 	if (pkt_cnt * 4 + hdr_off > skb->len)
1418 		return 0;
1419 	pkt_hdr = (u32 *)(skb->data + hdr_off);
1420 
1421 	/* Packets must not overlap the metadata array */
1422 	skb_trim(skb, hdr_off);
1423 
1424 	for (; pkt_cnt > 0; pkt_cnt--, pkt_hdr++) {
1425 		u16 pkt_len_plus_padd;
1426 		u16 pkt_len;
1427 
1428 		le32_to_cpus(pkt_hdr);
1429 		pkt_len = (*pkt_hdr >> 16) & 0x1fff;
1430 		pkt_len_plus_padd = (pkt_len + 7) & 0xfff8;
1431 
1432 		/* Skip dummy header used for alignment
1433 		 */
1434 		if (pkt_len == 0)
1435 			continue;
1436 
1437 		if (pkt_len_plus_padd > skb->len)
1438 			return 0;
1439 
1440 		/* Check CRC or runt packet */
1441 		if ((*pkt_hdr & (AX_RXHDR_CRC_ERR | AX_RXHDR_DROP_ERR)) ||
1442 		    pkt_len < 2 + ETH_HLEN) {
1443 			dev->net->stats.rx_errors++;
1444 			skb_pull(skb, pkt_len_plus_padd);
1445 			continue;
1446 		}
1447 
1448 		/* last packet */
1449 		if (pkt_len_plus_padd == skb->len) {
1450 			skb_trim(skb, pkt_len);
1451 
1452 			/* Skip IP alignment pseudo header */
1453 			skb_pull(skb, 2);
1454 
1455 			skb->truesize = SKB_TRUESIZE(pkt_len_plus_padd);
1456 			ax88179_rx_checksum(skb, pkt_hdr);
1457 			return 1;
1458 		}
1459 
1460 		ax_skb = skb_clone(skb, GFP_ATOMIC);
1461 		if (!ax_skb)
1462 			return 0;
1463 		skb_trim(ax_skb, pkt_len);
1464 
1465 		/* Skip IP alignment pseudo header */
1466 		skb_pull(ax_skb, 2);
1467 
1468 		skb->truesize = pkt_len_plus_padd +
1469 				SKB_DATA_ALIGN(sizeof(struct sk_buff));
1470 		ax88179_rx_checksum(ax_skb, pkt_hdr);
1471 		usbnet_skb_return(dev, ax_skb);
1472 
1473 		skb_pull(skb, pkt_len_plus_padd);
1474 	}
1475 
1476 	return 0;
1477 }
1478 
1479 static struct sk_buff *
1480 ax88179_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
1481 {
1482 	u32 tx_hdr1, tx_hdr2;
1483 	int frame_size = dev->maxpacket;
1484 	int headroom;
1485 	void *ptr;
1486 
1487 	tx_hdr1 = skb->len;
1488 	tx_hdr2 = skb_shinfo(skb)->gso_size; /* Set TSO mss */
1489 	if (((skb->len + 8) % frame_size) == 0)
1490 		tx_hdr2 |= 0x80008000;	/* Enable padding */
1491 
1492 	headroom = skb_headroom(skb) - 8;
1493 
1494 	if ((dev->net->features & NETIF_F_SG) && skb_linearize(skb))
1495 		return NULL;
1496 
1497 	if ((skb_header_cloned(skb) || headroom < 0) &&
1498 	    pskb_expand_head(skb, headroom < 0 ? 8 : 0, 0, GFP_ATOMIC)) {
1499 		dev_kfree_skb_any(skb);
1500 		return NULL;
1501 	}
1502 
1503 	ptr = skb_push(skb, 8);
1504 	put_unaligned_le32(tx_hdr1, ptr);
1505 	put_unaligned_le32(tx_hdr2, ptr + 4);
1506 
1507 	usbnet_set_skb_tx_stats(skb, (skb_shinfo(skb)->gso_segs ?: 1), 0);
1508 
1509 	return skb;
1510 }
1511 
1512 static int ax88179_link_reset(struct usbnet *dev)
1513 {
1514 	struct ax88179_data *ax179_data = dev->driver_priv;
1515 	u8 tmp[5], link_sts;
1516 	u16 mode, tmp16, delay = HZ / 10;
1517 	u32 tmp32 = 0x40000000;
1518 	unsigned long jtimeout;
1519 
1520 	jtimeout = jiffies + delay;
1521 	while (tmp32 & 0x40000000) {
1522 		mode = 0;
1523 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, &mode);
1524 		ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2,
1525 				  &ax179_data->rxctl);
1526 
1527 		/*link up, check the usb device control TX FIFO full or empty*/
1528 		ax88179_read_cmd(dev, 0x81, 0x8c, 0, 4, &tmp32);
1529 
1530 		if (time_after(jiffies, jtimeout))
1531 			return 0;
1532 	}
1533 
1534 	mode = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1535 	       AX_MEDIUM_RXFLOW_CTRLEN;
1536 
1537 	ax88179_read_cmd(dev, AX_ACCESS_MAC, PHYSICAL_LINK_STATUS,
1538 			 1, 1, &link_sts);
1539 
1540 	ax88179_read_cmd(dev, AX_ACCESS_PHY, AX88179_PHY_ID,
1541 			 GMII_PHY_PHYSR, 2, &tmp16);
1542 
1543 	if (!(tmp16 & GMII_PHY_PHYSR_LINK)) {
1544 		return 0;
1545 	} else if (GMII_PHY_PHYSR_GIGA == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1546 		mode |= AX_MEDIUM_GIGAMODE | AX_MEDIUM_EN_125MHZ;
1547 		if (dev->net->mtu > 1500)
1548 			mode |= AX_MEDIUM_JUMBO_EN;
1549 
1550 		if (link_sts & AX_USB_SS)
1551 			memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1552 		else if (link_sts & AX_USB_HS)
1553 			memcpy(tmp, &AX88179_BULKIN_SIZE[1], 5);
1554 		else
1555 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1556 	} else if (GMII_PHY_PHYSR_100 == (tmp16 & GMII_PHY_PHYSR_SMASK)) {
1557 		mode |= AX_MEDIUM_PS;
1558 
1559 		if (link_sts & (AX_USB_SS | AX_USB_HS))
1560 			memcpy(tmp, &AX88179_BULKIN_SIZE[2], 5);
1561 		else
1562 			memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1563 	} else {
1564 		memcpy(tmp, &AX88179_BULKIN_SIZE[3], 5);
1565 	}
1566 
1567 	/* RX bulk configuration */
1568 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1569 
1570 	dev->rx_urb_size = (1024 * (tmp[3] + 2));
1571 
1572 	if (tmp16 & GMII_PHY_PHYSR_FULL)
1573 		mode |= AX_MEDIUM_FULL_DUPLEX;
1574 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1575 			  2, 2, &mode);
1576 
1577 	ax179_data->eee_enabled = ax88179_chk_eee(dev);
1578 
1579 	netif_carrier_on(dev->net);
1580 
1581 	return 0;
1582 }
1583 
1584 static int ax88179_reset(struct usbnet *dev)
1585 {
1586 	u8 buf[5];
1587 	u16 *tmp16;
1588 	u8 *tmp;
1589 	struct ax88179_data *ax179_data = dev->driver_priv;
1590 	struct ethtool_keee eee_data;
1591 
1592 	tmp16 = (u16 *)buf;
1593 	tmp = (u8 *)buf;
1594 
1595 	/* Power up ethernet PHY */
1596 	*tmp16 = 0;
1597 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1598 
1599 	*tmp16 = AX_PHYPWR_RSTCTL_IPRL;
1600 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PHYPWR_RSTCTL, 2, 2, tmp16);
1601 	msleep(500);
1602 
1603 	*tmp = AX_CLK_SELECT_ACS | AX_CLK_SELECT_BCS;
1604 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_CLK_SELECT, 1, 1, tmp);
1605 	msleep(200);
1606 
1607 	/* Ethernet PHY Auto Detach*/
1608 	ax88179_auto_detach(dev);
1609 
1610 	/* Read MAC address from DTB or asix chip */
1611 	ax88179_get_mac_addr(dev);
1612 	memcpy(dev->net->perm_addr, dev->net->dev_addr, ETH_ALEN);
1613 
1614 	/* RX bulk configuration */
1615 	memcpy(tmp, &AX88179_BULKIN_SIZE[0], 5);
1616 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_BULKIN_QCTRL, 5, 5, tmp);
1617 
1618 	dev->rx_urb_size = 1024 * 20;
1619 
1620 	*tmp = 0x34;
1621 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_LOW, 1, 1, tmp);
1622 
1623 	*tmp = 0x52;
1624 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_PAUSE_WATERLVL_HIGH,
1625 			  1, 1, tmp);
1626 
1627 	/* Enable checksum offload */
1628 	*tmp = AX_RXCOE_IP | AX_RXCOE_TCP | AX_RXCOE_UDP |
1629 	       AX_RXCOE_TCPV6 | AX_RXCOE_UDPV6;
1630 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RXCOE_CTL, 1, 1, tmp);
1631 
1632 	*tmp = AX_TXCOE_IP | AX_TXCOE_TCP | AX_TXCOE_UDP |
1633 	       AX_TXCOE_TCPV6 | AX_TXCOE_UDPV6;
1634 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_TXCOE_CTL, 1, 1, tmp);
1635 
1636 	/* Configure RX control register => start operation */
1637 	*tmp16 = AX_RX_CTL_DROPCRCERR | AX_RX_CTL_IPE | AX_RX_CTL_START |
1638 		 AX_RX_CTL_AP | AX_RX_CTL_AMALL | AX_RX_CTL_AB;
1639 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_RX_CTL, 2, 2, tmp16);
1640 
1641 	*tmp = AX_MONITOR_MODE_PMETYPE | AX_MONITOR_MODE_PMEPOL |
1642 	       AX_MONITOR_MODE_RWMP;
1643 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD, 1, 1, tmp);
1644 
1645 	/* Configure default medium type => giga */
1646 	*tmp16 = AX_MEDIUM_RECEIVE_EN | AX_MEDIUM_TXFLOW_CTRLEN |
1647 		 AX_MEDIUM_RXFLOW_CTRLEN | AX_MEDIUM_FULL_DUPLEX |
1648 		 AX_MEDIUM_GIGAMODE;
1649 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1650 			  2, 2, tmp16);
1651 
1652 	/* Check if WoL is supported */
1653 	ax179_data->wol_supported = 0;
1654 	if (ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MONITOR_MOD,
1655 			     1, 1, &tmp) > 0)
1656 		ax179_data->wol_supported = WAKE_MAGIC | WAKE_PHY;
1657 
1658 	ax88179_led_setting(dev);
1659 
1660 	ax179_data->eee_enabled = 0;
1661 	ax179_data->eee_active = 0;
1662 
1663 	ax88179_disable_eee(dev);
1664 
1665 	ax88179_ethtool_get_eee(dev, &eee_data);
1666 	linkmode_zero(eee_data.advertised);
1667 	ax88179_ethtool_set_eee(dev, &eee_data);
1668 
1669 	/* Restart autoneg */
1670 	mii_nway_restart(&dev->mii);
1671 
1672 	usbnet_link_change(dev, 0, 0);
1673 
1674 	return 0;
1675 }
1676 
1677 static int ax88179_stop(struct usbnet *dev)
1678 {
1679 	u16 tmp16;
1680 
1681 	ax88179_read_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1682 			 2, 2, &tmp16);
1683 	tmp16 &= ~AX_MEDIUM_RECEIVE_EN;
1684 	ax88179_write_cmd(dev, AX_ACCESS_MAC, AX_MEDIUM_STATUS_MODE,
1685 			  2, 2, &tmp16);
1686 
1687 	return 0;
1688 }
1689 
1690 static const struct driver_info ax88179_info = {
1691 	.description = "ASIX AX88179 USB 3.0 Gigabit Ethernet",
1692 	.bind = ax88179_bind,
1693 	.unbind = ax88179_unbind,
1694 	.status = ax88179_status,
1695 	.link_reset = ax88179_link_reset,
1696 	.reset = ax88179_reset,
1697 	.stop = ax88179_stop,
1698 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1699 	.rx_fixup = ax88179_rx_fixup,
1700 	.tx_fixup = ax88179_tx_fixup,
1701 };
1702 
1703 static const struct driver_info ax88178a_info = {
1704 	.description = "ASIX AX88178A USB 2.0 Gigabit Ethernet",
1705 	.bind = ax88179_bind,
1706 	.unbind = ax88179_unbind,
1707 	.status = ax88179_status,
1708 	.link_reset = ax88179_link_reset,
1709 	.reset = ax88179_reset,
1710 	.stop = ax88179_stop,
1711 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1712 	.rx_fixup = ax88179_rx_fixup,
1713 	.tx_fixup = ax88179_tx_fixup,
1714 };
1715 
1716 static const struct driver_info cypress_GX3_info = {
1717 	.description = "Cypress GX3 SuperSpeed to Gigabit Ethernet Controller",
1718 	.bind = ax88179_bind,
1719 	.unbind = ax88179_unbind,
1720 	.status = ax88179_status,
1721 	.link_reset = ax88179_link_reset,
1722 	.reset = ax88179_reset,
1723 	.stop = ax88179_stop,
1724 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1725 	.rx_fixup = ax88179_rx_fixup,
1726 	.tx_fixup = ax88179_tx_fixup,
1727 };
1728 
1729 static const struct driver_info dlink_dub1312_info = {
1730 	.description = "D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter",
1731 	.bind = ax88179_bind,
1732 	.unbind = ax88179_unbind,
1733 	.status = ax88179_status,
1734 	.link_reset = ax88179_link_reset,
1735 	.reset = ax88179_reset,
1736 	.stop = ax88179_stop,
1737 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1738 	.rx_fixup = ax88179_rx_fixup,
1739 	.tx_fixup = ax88179_tx_fixup,
1740 };
1741 
1742 static const struct driver_info sitecom_info = {
1743 	.description = "Sitecom USB 3.0 to Gigabit Adapter",
1744 	.bind = ax88179_bind,
1745 	.unbind = ax88179_unbind,
1746 	.status = ax88179_status,
1747 	.link_reset = ax88179_link_reset,
1748 	.reset = ax88179_reset,
1749 	.stop = ax88179_stop,
1750 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1751 	.rx_fixup = ax88179_rx_fixup,
1752 	.tx_fixup = ax88179_tx_fixup,
1753 };
1754 
1755 static const struct driver_info samsung_info = {
1756 	.description = "Samsung USB Ethernet Adapter",
1757 	.bind = ax88179_bind,
1758 	.unbind = ax88179_unbind,
1759 	.status = ax88179_status,
1760 	.link_reset = ax88179_link_reset,
1761 	.reset = ax88179_reset,
1762 	.stop = ax88179_stop,
1763 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1764 	.rx_fixup = ax88179_rx_fixup,
1765 	.tx_fixup = ax88179_tx_fixup,
1766 };
1767 
1768 static const struct driver_info lenovo_info = {
1769 	.description = "Lenovo OneLinkDock Gigabit LAN",
1770 	.bind = ax88179_bind,
1771 	.unbind = ax88179_unbind,
1772 	.status = ax88179_status,
1773 	.link_reset = ax88179_link_reset,
1774 	.reset = ax88179_reset,
1775 	.stop = ax88179_stop,
1776 	.flags = FLAG_ETHER | FLAG_FRAMING_AX,
1777 	.rx_fixup = ax88179_rx_fixup,
1778 	.tx_fixup = ax88179_tx_fixup,
1779 };
1780 
1781 static const struct driver_info belkin_info = {
1782 	.description = "Belkin USB Ethernet Adapter",
1783 	.bind	= ax88179_bind,
1784 	.unbind = ax88179_unbind,
1785 	.status = ax88179_status,
1786 	.link_reset = ax88179_link_reset,
1787 	.reset	= ax88179_reset,
1788 	.stop	= ax88179_stop,
1789 	.flags	= FLAG_ETHER | FLAG_FRAMING_AX,
1790 	.rx_fixup = ax88179_rx_fixup,
1791 	.tx_fixup = ax88179_tx_fixup,
1792 };
1793 
1794 static const struct driver_info toshiba_info = {
1795 	.description = "Toshiba USB Ethernet Adapter",
1796 	.bind	= ax88179_bind,
1797 	.unbind = ax88179_unbind,
1798 	.status = ax88179_status,
1799 	.link_reset = ax88179_link_reset,
1800 	.reset	= ax88179_reset,
1801 	.stop = ax88179_stop,
1802 	.flags	= FLAG_ETHER | FLAG_FRAMING_AX,
1803 	.rx_fixup = ax88179_rx_fixup,
1804 	.tx_fixup = ax88179_tx_fixup,
1805 };
1806 
1807 static const struct driver_info mct_info = {
1808 	.description = "MCT USB 3.0 Gigabit Ethernet Adapter",
1809 	.bind	= ax88179_bind,
1810 	.unbind	= ax88179_unbind,
1811 	.status	= ax88179_status,
1812 	.link_reset = ax88179_link_reset,
1813 	.reset	= ax88179_reset,
1814 	.stop	= ax88179_stop,
1815 	.flags	= FLAG_ETHER | FLAG_FRAMING_AX,
1816 	.rx_fixup = ax88179_rx_fixup,
1817 	.tx_fixup = ax88179_tx_fixup,
1818 };
1819 
1820 static const struct driver_info at_umc2000_info = {
1821 	.description = "AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1822 	.bind   = ax88179_bind,
1823 	.unbind = ax88179_unbind,
1824 	.status = ax88179_status,
1825 	.link_reset = ax88179_link_reset,
1826 	.reset  = ax88179_reset,
1827 	.stop   = ax88179_stop,
1828 	.flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1829 	.rx_fixup = ax88179_rx_fixup,
1830 	.tx_fixup = ax88179_tx_fixup,
1831 };
1832 
1833 static const struct driver_info at_umc200_info = {
1834 	.description = "AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter",
1835 	.bind   = ax88179_bind,
1836 	.unbind = ax88179_unbind,
1837 	.status = ax88179_status,
1838 	.link_reset = ax88179_link_reset,
1839 	.reset  = ax88179_reset,
1840 	.stop   = ax88179_stop,
1841 	.flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1842 	.rx_fixup = ax88179_rx_fixup,
1843 	.tx_fixup = ax88179_tx_fixup,
1844 };
1845 
1846 static const struct driver_info at_umc2000sp_info = {
1847 	.description = "AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter",
1848 	.bind   = ax88179_bind,
1849 	.unbind = ax88179_unbind,
1850 	.status = ax88179_status,
1851 	.link_reset = ax88179_link_reset,
1852 	.reset  = ax88179_reset,
1853 	.stop   = ax88179_stop,
1854 	.flags  = FLAG_ETHER | FLAG_FRAMING_AX,
1855 	.rx_fixup = ax88179_rx_fixup,
1856 	.tx_fixup = ax88179_tx_fixup,
1857 };
1858 
1859 static const struct usb_device_id products[] = {
1860 {
1861 	/* ASIX AX88179 10/100/1000 */
1862 	USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x1790, 0xff, 0xff, 0),
1863 	.driver_info = (unsigned long)&ax88179_info,
1864 }, {
1865 	/* ASIX AX88178A 10/100/1000 */
1866 	USB_DEVICE_AND_INTERFACE_INFO(0x0b95, 0x178a, 0xff, 0xff, 0),
1867 	.driver_info = (unsigned long)&ax88178a_info,
1868 }, {
1869 	/* Cypress GX3 SuperSpeed to Gigabit Ethernet Bridge Controller */
1870 	USB_DEVICE_AND_INTERFACE_INFO(0x04b4, 0x3610, 0xff, 0xff, 0),
1871 	.driver_info = (unsigned long)&cypress_GX3_info,
1872 }, {
1873 	/* D-Link DUB-1312 USB 3.0 to Gigabit Ethernet Adapter */
1874 	USB_DEVICE_AND_INTERFACE_INFO(0x2001, 0x4a00, 0xff, 0xff, 0),
1875 	.driver_info = (unsigned long)&dlink_dub1312_info,
1876 }, {
1877 	/* Sitecom USB 3.0 to Gigabit Adapter */
1878 	USB_DEVICE_AND_INTERFACE_INFO(0x0df6, 0x0072, 0xff, 0xff, 0),
1879 	.driver_info = (unsigned long)&sitecom_info,
1880 }, {
1881 	/* Samsung USB Ethernet Adapter */
1882 	USB_DEVICE_AND_INTERFACE_INFO(0x04e8, 0xa100, 0xff, 0xff, 0),
1883 	.driver_info = (unsigned long)&samsung_info,
1884 }, {
1885 	/* Lenovo OneLinkDock Gigabit LAN */
1886 	USB_DEVICE_AND_INTERFACE_INFO(0x17ef, 0x304b, 0xff, 0xff, 0),
1887 	.driver_info = (unsigned long)&lenovo_info,
1888 }, {
1889 	/* Belkin B2B128 USB 3.0 Hub + Gigabit Ethernet Adapter */
1890 	USB_DEVICE_AND_INTERFACE_INFO(0x050d, 0x0128, 0xff, 0xff, 0),
1891 	.driver_info = (unsigned long)&belkin_info,
1892 }, {
1893 	/* Toshiba USB 3.0 GBit Ethernet Adapter */
1894 	USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x0a13, 0xff, 0xff, 0),
1895 	.driver_info = (unsigned long)&toshiba_info,
1896 }, {
1897 	/* Magic Control Technology U3-A9003 USB 3.0 Gigabit Ethernet Adapter */
1898 	USB_DEVICE_AND_INTERFACE_INFO(0x0711, 0x0179, 0xff, 0xff, 0),
1899 	.driver_info = (unsigned long)&mct_info,
1900 }, {
1901 	/* Allied Telesis AT-UMC2000 USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1902 	USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000e, 0xff, 0xff, 0),
1903 	.driver_info = (unsigned long)&at_umc2000_info,
1904 }, {
1905 	/* Allied Telesis AT-UMC200 USB 3.0/USB 3.1 Gen 1 to Fast Ethernet Adapter */
1906 	USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x000f, 0xff, 0xff, 0),
1907 	.driver_info = (unsigned long)&at_umc200_info,
1908 }, {
1909 	/* Allied Telesis AT-UMC2000/SP USB 3.0/USB 3.1 Gen 1 to Gigabit Ethernet Adapter */
1910 	USB_DEVICE_AND_INTERFACE_INFO(0x07c9, 0x0010, 0xff, 0xff, 0),
1911 	.driver_info = (unsigned long)&at_umc2000sp_info,
1912 },
1913 	{ },
1914 };
1915 MODULE_DEVICE_TABLE(usb, products);
1916 
1917 static struct usb_driver ax88179_178a_driver = {
1918 	.name =		"ax88179_178a",
1919 	.id_table =	products,
1920 	.probe =	usbnet_probe,
1921 	.suspend =	ax88179_suspend,
1922 	.resume =	ax88179_resume,
1923 	.reset_resume =	ax88179_resume,
1924 	.disconnect =	ax88179_disconnect,
1925 	.supports_autosuspend = 1,
1926 	.disable_hub_initiated_lpm = 1,
1927 };
1928 
1929 module_usb_driver(ax88179_178a_driver);
1930 
1931 MODULE_DESCRIPTION("ASIX AX88179/178A based USB 3.0/2.0 Gigabit Ethernet Devices");
1932 MODULE_LICENSE("GPL");
1933