1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for the TI TPS23881 PoE PSE Controller driver (I2C bus) 4 * 5 * Copyright (c) 2023 Bootlin, Kory Maincent <kory.maincent@bootlin.com> 6 */ 7 8 #include <linux/bitfield.h> 9 #include <linux/delay.h> 10 #include <linux/firmware.h> 11 #include <linux/i2c.h> 12 #include <linux/module.h> 13 #include <linux/of.h> 14 #include <linux/platform_device.h> 15 #include <linux/pse-pd/pse.h> 16 17 #define TPS23881_MAX_CHANS 8 18 19 #define TPS23881_REG_PW_STATUS 0x10 20 #define TPS23881_REG_OP_MODE 0x12 21 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa 22 #define TPS23881_REG_DIS_EN 0x13 23 #define TPS23881_REG_DET_CLA_EN 0x14 24 #define TPS23881_REG_GEN_MASK 0x17 25 #define TPS23881_REG_NBITACC BIT(5) 26 #define TPS23881_REG_PW_EN 0x19 27 #define TPS23881_REG_PORT_MAP 0x26 28 #define TPS23881_REG_PORT_POWER 0x29 29 #define TPS23881_REG_POEPLUS 0x40 30 #define TPS23881_REG_TPON BIT(0) 31 #define TPS23881_REG_FWREV 0x41 32 #define TPS23881_REG_DEVID 0x43 33 #define TPS23881_REG_DEVID_MASK 0xF0 34 #define TPS23881_DEVICE_ID 0x02 35 #define TPS23881_REG_SRAM_CTRL 0x60 36 #define TPS23881_REG_SRAM_DATA 0x61 37 38 struct tps23881_port_desc { 39 u8 chan[2]; 40 bool is_4p; 41 }; 42 43 struct tps23881_priv { 44 struct i2c_client *client; 45 struct pse_controller_dev pcdev; 46 struct device_node *np; 47 struct tps23881_port_desc port[TPS23881_MAX_CHANS]; 48 }; 49 50 static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev) 51 { 52 return container_of(pcdev, struct tps23881_priv, pcdev); 53 } 54 55 static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id) 56 { 57 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 58 struct i2c_client *client = priv->client; 59 u8 chan; 60 u16 val; 61 int ret; 62 63 if (id >= TPS23881_MAX_CHANS) 64 return -ERANGE; 65 66 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 67 if (ret < 0) 68 return ret; 69 70 chan = priv->port[id].chan[0]; 71 if (chan < 4) 72 val = (u16)(ret | BIT(chan)); 73 else 74 val = (u16)(ret | BIT(chan + 4)); 75 76 if (priv->port[id].is_4p) { 77 chan = priv->port[id].chan[1]; 78 if (chan < 4) 79 val |= BIT(chan); 80 else 81 val |= BIT(chan + 4); 82 } 83 84 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); 85 if (ret) 86 return ret; 87 88 return 0; 89 } 90 91 static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id) 92 { 93 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 94 struct i2c_client *client = priv->client; 95 u8 chan; 96 u16 val; 97 int ret; 98 99 if (id >= TPS23881_MAX_CHANS) 100 return -ERANGE; 101 102 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 103 if (ret < 0) 104 return ret; 105 106 chan = priv->port[id].chan[0]; 107 if (chan < 4) 108 val = (u16)(ret | BIT(chan + 4)); 109 else 110 val = (u16)(ret | BIT(chan + 8)); 111 112 if (priv->port[id].is_4p) { 113 chan = priv->port[id].chan[1]; 114 if (chan < 4) 115 val |= BIT(chan + 4); 116 else 117 val |= BIT(chan + 8); 118 } 119 120 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); 121 if (ret) 122 return ret; 123 124 return 0; 125 } 126 127 static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) 128 { 129 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 130 struct i2c_client *client = priv->client; 131 bool enabled; 132 u8 chan; 133 int ret; 134 135 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 136 if (ret < 0) 137 return ret; 138 139 chan = priv->port[id].chan[0]; 140 if (chan < 4) 141 enabled = ret & BIT(chan); 142 else 143 enabled = ret & BIT(chan + 4); 144 145 if (priv->port[id].is_4p) { 146 chan = priv->port[id].chan[1]; 147 if (chan < 4) 148 enabled &= !!(ret & BIT(chan)); 149 else 150 enabled &= !!(ret & BIT(chan + 4)); 151 } 152 153 /* Return enabled status only if both channel are on this state */ 154 return enabled; 155 } 156 157 static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, 158 unsigned long id, 159 struct netlink_ext_ack *extack, 160 struct pse_control_status *status) 161 { 162 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 163 struct i2c_client *client = priv->client; 164 bool enabled, delivering; 165 u8 chan; 166 int ret; 167 168 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 169 if (ret < 0) 170 return ret; 171 172 chan = priv->port[id].chan[0]; 173 if (chan < 4) { 174 enabled = ret & BIT(chan); 175 delivering = ret & BIT(chan + 4); 176 } else { 177 enabled = ret & BIT(chan + 4); 178 delivering = ret & BIT(chan + 8); 179 } 180 181 if (priv->port[id].is_4p) { 182 chan = priv->port[id].chan[1]; 183 if (chan < 4) { 184 enabled &= !!(ret & BIT(chan)); 185 delivering &= !!(ret & BIT(chan + 4)); 186 } else { 187 enabled &= !!(ret & BIT(chan + 4)); 188 delivering &= !!(ret & BIT(chan + 8)); 189 } 190 } 191 192 /* Return delivering status only if both channel are on this state */ 193 if (delivering) 194 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING; 195 else 196 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED; 197 198 /* Return enabled status only if both channel are on this state */ 199 if (enabled) 200 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; 201 else 202 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; 203 204 return 0; 205 } 206 207 /* Parse managers subnode into a array of device node */ 208 static int 209 tps23881_get_of_channels(struct tps23881_priv *priv, 210 struct device_node *chan_node[TPS23881_MAX_CHANS]) 211 { 212 struct device_node *channels_node, *node; 213 int i, ret; 214 215 if (!priv->np) 216 return -EINVAL; 217 218 channels_node = of_find_node_by_name(priv->np, "channels"); 219 if (!channels_node) 220 return -EINVAL; 221 222 for_each_child_of_node(channels_node, node) { 223 u32 chan_id; 224 225 if (!of_node_name_eq(node, "channel")) 226 continue; 227 228 ret = of_property_read_u32(node, "reg", &chan_id); 229 if (ret) { 230 ret = -EINVAL; 231 goto out; 232 } 233 234 if (chan_id >= TPS23881_MAX_CHANS || chan_node[chan_id]) { 235 dev_err(&priv->client->dev, 236 "wrong number of port (%d)\n", chan_id); 237 ret = -EINVAL; 238 goto out; 239 } 240 241 of_node_get(node); 242 chan_node[chan_id] = node; 243 } 244 245 of_node_put(channels_node); 246 return 0; 247 248 out: 249 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 250 of_node_put(chan_node[i]); 251 chan_node[i] = NULL; 252 } 253 254 of_node_put(node); 255 of_node_put(channels_node); 256 return ret; 257 } 258 259 struct tps23881_port_matrix { 260 u8 pi_id; 261 u8 lgcl_chan[2]; 262 u8 hw_chan[2]; 263 bool is_4p; 264 bool exist; 265 }; 266 267 static int 268 tps23881_match_channel(const struct pse_pi_pairset *pairset, 269 struct device_node *chan_node[TPS23881_MAX_CHANS]) 270 { 271 int i; 272 273 /* Look on every channels */ 274 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 275 if (pairset->np == chan_node[i]) 276 return i; 277 } 278 279 return -ENODEV; 280 } 281 282 static bool 283 tps23881_is_chan_free(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 284 int chan) 285 { 286 int i; 287 288 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 289 if (port_matrix[i].exist && 290 (port_matrix[i].hw_chan[0] == chan || 291 port_matrix[i].hw_chan[1] == chan)) 292 return false; 293 } 294 295 return true; 296 } 297 298 /* Fill port matrix with the matching channels */ 299 static int 300 tps23881_match_port_matrix(struct pse_pi *pi, int pi_id, 301 struct device_node *chan_node[TPS23881_MAX_CHANS], 302 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 303 { 304 int ret; 305 306 if (!pi->pairset[0].np) 307 return 0; 308 309 ret = tps23881_match_channel(&pi->pairset[0], chan_node); 310 if (ret < 0) 311 return ret; 312 313 if (!tps23881_is_chan_free(port_matrix, ret)) { 314 pr_err("tps23881: channel %d already used\n", ret); 315 return -ENODEV; 316 } 317 318 port_matrix[pi_id].hw_chan[0] = ret; 319 port_matrix[pi_id].exist = true; 320 321 if (!pi->pairset[1].np) 322 return 0; 323 324 ret = tps23881_match_channel(&pi->pairset[1], chan_node); 325 if (ret < 0) 326 return ret; 327 328 if (!tps23881_is_chan_free(port_matrix, ret)) { 329 pr_err("tps23881: channel %d already used\n", ret); 330 return -ENODEV; 331 } 332 333 if (port_matrix[pi_id].hw_chan[0] / 4 != ret / 4) { 334 pr_err("tps23881: 4-pair PSE can only be set within the same 4 ports group"); 335 return -ENODEV; 336 } 337 338 port_matrix[pi_id].hw_chan[1] = ret; 339 port_matrix[pi_id].is_4p = true; 340 341 return 0; 342 } 343 344 static int 345 tps23881_get_unused_chan(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 346 int port_cnt) 347 { 348 bool used; 349 int i, j; 350 351 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 352 used = false; 353 354 for (j = 0; j < port_cnt; j++) { 355 if (port_matrix[j].hw_chan[0] == i) { 356 used = true; 357 break; 358 } 359 360 if (port_matrix[j].is_4p && 361 port_matrix[j].hw_chan[1] == i) { 362 used = true; 363 break; 364 } 365 } 366 367 if (!used) 368 return i; 369 } 370 371 return -ENODEV; 372 } 373 374 /* Sort the port matrix to following particular hardware ports matrix 375 * specification of the tps23881. The device has two 4-ports groups and 376 * each 4-pair powered device has to be configured to use two consecutive 377 * logical channel in each 4 ports group (1 and 2 or 3 and 4). Also the 378 * hardware matrix has to be fully configured even with unused chan to be 379 * valid. 380 */ 381 static int 382 tps23881_sort_port_matrix(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 383 { 384 struct tps23881_port_matrix tmp_port_matrix[TPS23881_MAX_CHANS] = {0}; 385 int i, ret, port_cnt = 0, cnt_4ch_grp1 = 0, cnt_4ch_grp2 = 4; 386 387 /* Configure 4p port matrix */ 388 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 389 int *cnt; 390 391 if (!port_matrix[i].exist || !port_matrix[i].is_4p) 392 continue; 393 394 if (port_matrix[i].hw_chan[0] < 4) 395 cnt = &cnt_4ch_grp1; 396 else 397 cnt = &cnt_4ch_grp2; 398 399 tmp_port_matrix[port_cnt].exist = true; 400 tmp_port_matrix[port_cnt].is_4p = true; 401 tmp_port_matrix[port_cnt].pi_id = i; 402 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0]; 403 tmp_port_matrix[port_cnt].hw_chan[1] = port_matrix[i].hw_chan[1]; 404 405 /* 4-pair ports have to be configured with consecutive 406 * logical channels 0 and 1, 2 and 3. 407 */ 408 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++; 409 tmp_port_matrix[port_cnt].lgcl_chan[1] = (*cnt)++; 410 411 port_cnt++; 412 } 413 414 /* Configure 2p port matrix */ 415 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 416 int *cnt; 417 418 if (!port_matrix[i].exist || port_matrix[i].is_4p) 419 continue; 420 421 if (port_matrix[i].hw_chan[0] < 4) 422 cnt = &cnt_4ch_grp1; 423 else 424 cnt = &cnt_4ch_grp2; 425 426 tmp_port_matrix[port_cnt].exist = true; 427 tmp_port_matrix[port_cnt].pi_id = i; 428 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++; 429 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0]; 430 431 port_cnt++; 432 } 433 434 /* Complete the rest of the first 4 port group matrix even if 435 * channels are unused 436 */ 437 while (cnt_4ch_grp1 < 4) { 438 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt); 439 if (ret < 0) { 440 pr_err("tps23881: port matrix issue, no chan available\n"); 441 return ret; 442 } 443 444 if (port_cnt >= TPS23881_MAX_CHANS) { 445 pr_err("tps23881: wrong number of channels\n"); 446 return -ENODEV; 447 } 448 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp1; 449 tmp_port_matrix[port_cnt].hw_chan[0] = ret; 450 cnt_4ch_grp1++; 451 port_cnt++; 452 } 453 454 /* Complete the rest of the second 4 port group matrix even if 455 * channels are unused 456 */ 457 while (cnt_4ch_grp2 < 8) { 458 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt); 459 if (ret < 0) { 460 pr_err("tps23881: port matrix issue, no chan available\n"); 461 return -ENODEV; 462 } 463 464 if (port_cnt >= TPS23881_MAX_CHANS) { 465 pr_err("tps23881: wrong number of channels\n"); 466 return -ENODEV; 467 } 468 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp2; 469 tmp_port_matrix[port_cnt].hw_chan[0] = ret; 470 cnt_4ch_grp2++; 471 port_cnt++; 472 } 473 474 memcpy(port_matrix, tmp_port_matrix, sizeof(tmp_port_matrix)); 475 476 return port_cnt; 477 } 478 479 /* Write port matrix to the hardware port matrix and the software port 480 * matrix. 481 */ 482 static int 483 tps23881_write_port_matrix(struct tps23881_priv *priv, 484 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 485 int port_cnt) 486 { 487 struct i2c_client *client = priv->client; 488 u8 pi_id, lgcl_chan, hw_chan; 489 u16 val = 0; 490 int i, ret; 491 492 for (i = 0; i < port_cnt; i++) { 493 pi_id = port_matrix[i].pi_id; 494 lgcl_chan = port_matrix[i].lgcl_chan[0]; 495 hw_chan = port_matrix[i].hw_chan[0] % 4; 496 497 /* Set software port matrix for existing ports */ 498 if (port_matrix[i].exist) 499 priv->port[pi_id].chan[0] = lgcl_chan; 500 501 /* Set hardware port matrix for all ports */ 502 val |= hw_chan << (lgcl_chan * 2); 503 504 if (!port_matrix[i].is_4p) 505 continue; 506 507 lgcl_chan = port_matrix[i].lgcl_chan[1]; 508 hw_chan = port_matrix[i].hw_chan[1] % 4; 509 510 /* Set software port matrix for existing ports */ 511 if (port_matrix[i].exist) { 512 priv->port[pi_id].is_4p = true; 513 priv->port[pi_id].chan[1] = lgcl_chan; 514 } 515 516 /* Set hardware port matrix for all ports */ 517 val |= hw_chan << (lgcl_chan * 2); 518 } 519 520 /* Write hardware ports matrix */ 521 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val); 522 if (ret) 523 return ret; 524 525 return 0; 526 } 527 528 static int 529 tps23881_set_ports_conf(struct tps23881_priv *priv, 530 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 531 { 532 struct i2c_client *client = priv->client; 533 int i, ret; 534 u16 val; 535 536 /* Set operating mode */ 537 ret = i2c_smbus_write_word_data(client, TPS23881_REG_OP_MODE, 538 TPS23881_OP_MODE_SEMIAUTO); 539 if (ret) 540 return ret; 541 542 /* Disable DC disconnect */ 543 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DIS_EN, 0x0); 544 if (ret) 545 return ret; 546 547 /* Set port power allocation */ 548 val = 0; 549 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 550 if (!port_matrix[i].exist) 551 continue; 552 553 if (port_matrix[i].is_4p) 554 val |= 0xf << ((port_matrix[i].lgcl_chan[0] / 2) * 4); 555 else 556 val |= 0x3 << ((port_matrix[i].lgcl_chan[0] / 2) * 4); 557 } 558 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_POWER, val); 559 if (ret) 560 return ret; 561 562 /* Enable detection and classification */ 563 val = 0; 564 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 565 if (!port_matrix[i].exist) 566 continue; 567 568 val |= BIT(port_matrix[i].lgcl_chan[0]) | 569 BIT(port_matrix[i].lgcl_chan[0] + 4); 570 if (port_matrix[i].is_4p) 571 val |= BIT(port_matrix[i].lgcl_chan[1]) | 572 BIT(port_matrix[i].lgcl_chan[1] + 4); 573 } 574 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val); 575 if (ret) 576 return ret; 577 578 return 0; 579 } 580 581 static int 582 tps23881_set_ports_matrix(struct tps23881_priv *priv, 583 struct device_node *chan_node[TPS23881_MAX_CHANS]) 584 { 585 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS] = {0}; 586 int i, ret; 587 588 /* Update with values for every PSE PIs */ 589 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 590 ret = tps23881_match_port_matrix(&priv->pcdev.pi[i], i, 591 chan_node, port_matrix); 592 if (ret) 593 return ret; 594 } 595 596 ret = tps23881_sort_port_matrix(port_matrix); 597 if (ret < 0) 598 return ret; 599 600 ret = tps23881_write_port_matrix(priv, port_matrix, ret); 601 if (ret) 602 return ret; 603 604 ret = tps23881_set_ports_conf(priv, port_matrix); 605 if (ret) 606 return ret; 607 608 return 0; 609 } 610 611 static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev) 612 { 613 struct device_node *chan_node[TPS23881_MAX_CHANS] = {NULL}; 614 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 615 int ret, i; 616 617 ret = tps23881_get_of_channels(priv, chan_node); 618 if (ret < 0) { 619 dev_warn(&priv->client->dev, 620 "Unable to parse port-matrix, default matrix will be used\n"); 621 return 0; 622 } 623 624 ret = tps23881_set_ports_matrix(priv, chan_node); 625 626 for (i = 0; i < TPS23881_MAX_CHANS; i++) 627 of_node_put(chan_node[i]); 628 629 return ret; 630 } 631 632 static const struct pse_controller_ops tps23881_ops = { 633 .setup_pi_matrix = tps23881_setup_pi_matrix, 634 .pi_enable = tps23881_pi_enable, 635 .pi_disable = tps23881_pi_disable, 636 .pi_is_enabled = tps23881_pi_is_enabled, 637 .ethtool_get_status = tps23881_ethtool_get_status, 638 }; 639 640 static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin"; 641 static const char fw_sram_name[] = "ti/tps23881/tps23881-sram-14.bin"; 642 643 struct tps23881_fw_conf { 644 u8 reg; 645 u8 val; 646 }; 647 648 static const struct tps23881_fw_conf tps23881_fw_parity_conf[] = { 649 {.reg = 0x60, .val = 0x01}, 650 {.reg = 0x62, .val = 0x00}, 651 {.reg = 0x63, .val = 0x80}, 652 {.reg = 0x60, .val = 0xC4}, 653 {.reg = 0x1D, .val = 0xBC}, 654 {.reg = 0xD7, .val = 0x02}, 655 {.reg = 0x91, .val = 0x00}, 656 {.reg = 0x90, .val = 0x00}, 657 {.reg = 0xD7, .val = 0x00}, 658 {.reg = 0x1D, .val = 0x00}, 659 { /* sentinel */ } 660 }; 661 662 static const struct tps23881_fw_conf tps23881_fw_sram_conf[] = { 663 {.reg = 0x60, .val = 0xC5}, 664 {.reg = 0x62, .val = 0x00}, 665 {.reg = 0x63, .val = 0x80}, 666 {.reg = 0x60, .val = 0xC0}, 667 {.reg = 0x1D, .val = 0xBC}, 668 {.reg = 0xD7, .val = 0x02}, 669 {.reg = 0x91, .val = 0x00}, 670 {.reg = 0x90, .val = 0x00}, 671 {.reg = 0xD7, .val = 0x00}, 672 {.reg = 0x1D, .val = 0x00}, 673 { /* sentinel */ } 674 }; 675 676 static int tps23881_flash_sram_fw_part(struct i2c_client *client, 677 const char *fw_name, 678 const struct tps23881_fw_conf *fw_conf) 679 { 680 const struct firmware *fw = NULL; 681 int i, ret; 682 683 ret = request_firmware(&fw, fw_name, &client->dev); 684 if (ret) 685 return ret; 686 687 dev_dbg(&client->dev, "Flashing %s\n", fw_name); 688 689 /* Prepare device for RAM download */ 690 while (fw_conf->reg) { 691 ret = i2c_smbus_write_byte_data(client, fw_conf->reg, 692 fw_conf->val); 693 if (ret) 694 goto out; 695 696 fw_conf++; 697 } 698 699 /* Flash the firmware file */ 700 for (i = 0; i < fw->size; i++) { 701 ret = i2c_smbus_write_byte_data(client, 702 TPS23881_REG_SRAM_DATA, 703 fw->data[i]); 704 if (ret) 705 goto out; 706 } 707 708 out: 709 release_firmware(fw); 710 return ret; 711 } 712 713 static int tps23881_flash_sram_fw(struct i2c_client *client) 714 { 715 int ret; 716 717 ret = tps23881_flash_sram_fw_part(client, fw_parity_name, 718 tps23881_fw_parity_conf); 719 if (ret) 720 return ret; 721 722 ret = tps23881_flash_sram_fw_part(client, fw_sram_name, 723 tps23881_fw_sram_conf); 724 if (ret) 725 return ret; 726 727 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_SRAM_CTRL, 0x18); 728 if (ret) 729 return ret; 730 731 mdelay(12); 732 733 return 0; 734 } 735 736 static int tps23881_i2c_probe(struct i2c_client *client) 737 { 738 struct device *dev = &client->dev; 739 struct tps23881_priv *priv; 740 int ret; 741 u8 val; 742 743 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 744 dev_err(dev, "i2c check functionality failed\n"); 745 return -ENXIO; 746 } 747 748 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 749 if (!priv) 750 return -ENOMEM; 751 752 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_DEVID); 753 if (ret < 0) 754 return ret; 755 756 if (FIELD_GET(TPS23881_REG_DEVID_MASK, ret) != TPS23881_DEVICE_ID) { 757 dev_err(dev, "Wrong device ID\n"); 758 return -ENXIO; 759 } 760 761 ret = tps23881_flash_sram_fw(client); 762 if (ret < 0) 763 return ret; 764 765 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FWREV); 766 if (ret < 0) 767 return ret; 768 769 dev_info(&client->dev, "Firmware revision 0x%x\n", ret); 770 771 /* Set configuration B, 16 bit access on a single device address */ 772 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_GEN_MASK); 773 if (ret < 0) 774 return ret; 775 776 val = ret | TPS23881_REG_NBITACC; 777 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_GEN_MASK, val); 778 if (ret) 779 return ret; 780 781 priv->client = client; 782 i2c_set_clientdata(client, priv); 783 priv->np = dev->of_node; 784 785 priv->pcdev.owner = THIS_MODULE; 786 priv->pcdev.ops = &tps23881_ops; 787 priv->pcdev.dev = dev; 788 priv->pcdev.types = ETHTOOL_PSE_C33; 789 priv->pcdev.nr_lines = TPS23881_MAX_CHANS; 790 ret = devm_pse_controller_register(dev, &priv->pcdev); 791 if (ret) { 792 return dev_err_probe(dev, ret, 793 "failed to register PSE controller\n"); 794 } 795 796 return ret; 797 } 798 799 static const struct i2c_device_id tps23881_id[] = { 800 { "tps23881" }, 801 { } 802 }; 803 MODULE_DEVICE_TABLE(i2c, tps23881_id); 804 805 static const struct of_device_id tps23881_of_match[] = { 806 { .compatible = "ti,tps23881", }, 807 { }, 808 }; 809 MODULE_DEVICE_TABLE(of, tps23881_of_match); 810 811 static struct i2c_driver tps23881_driver = { 812 .probe = tps23881_i2c_probe, 813 .id_table = tps23881_id, 814 .driver = { 815 .name = "tps23881", 816 .of_match_table = tps23881_of_match, 817 }, 818 }; 819 module_i2c_driver(tps23881_driver); 820 821 MODULE_AUTHOR("Kory Maincent <kory.maincent@bootlin.com>"); 822 MODULE_DESCRIPTION("TI TPS23881 PoE PSE Controller driver"); 823 MODULE_LICENSE("GPL"); 824