1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for the TI TPS23881 PoE PSE Controller driver (I2C bus) 4 * 5 * Copyright (c) 2023 Bootlin, Kory Maincent <kory.maincent@bootlin.com> 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/firmware.h> 10 #include <linux/i2c.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/platform_device.h> 14 #include <linux/pse-pd/pse.h> 15 16 #define TPS23881_MAX_CHANS 8 17 18 #define TPS23881_REG_PW_STATUS 0x10 19 #define TPS23881_REG_OP_MODE 0x12 20 #define TPS23881_OP_MODE_SEMIAUTO 0xaaaa 21 #define TPS23881_REG_DIS_EN 0x13 22 #define TPS23881_REG_DET_CLA_EN 0x14 23 #define TPS23881_REG_GEN_MASK 0x17 24 #define TPS23881_REG_NBITACC BIT(5) 25 #define TPS23881_REG_PW_EN 0x19 26 #define TPS23881_REG_PORT_MAP 0x26 27 #define TPS23881_REG_PORT_POWER 0x29 28 #define TPS23881_REG_POEPLUS 0x40 29 #define TPS23881_REG_TPON BIT(0) 30 #define TPS23881_REG_FWREV 0x41 31 #define TPS23881_REG_DEVID 0x43 32 #define TPS23881_REG_SRAM_CTRL 0x60 33 #define TPS23881_REG_SRAM_DATA 0x61 34 35 struct tps23881_port_desc { 36 u8 chan[2]; 37 bool is_4p; 38 }; 39 40 struct tps23881_priv { 41 struct i2c_client *client; 42 struct pse_controller_dev pcdev; 43 struct device_node *np; 44 struct tps23881_port_desc port[TPS23881_MAX_CHANS]; 45 }; 46 47 static struct tps23881_priv *to_tps23881_priv(struct pse_controller_dev *pcdev) 48 { 49 return container_of(pcdev, struct tps23881_priv, pcdev); 50 } 51 52 static int tps23881_pi_enable(struct pse_controller_dev *pcdev, int id) 53 { 54 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 55 struct i2c_client *client = priv->client; 56 u8 chan; 57 u16 val; 58 int ret; 59 60 if (id >= TPS23881_MAX_CHANS) 61 return -ERANGE; 62 63 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 64 if (ret < 0) 65 return ret; 66 67 chan = priv->port[id].chan[0]; 68 if (chan < 4) 69 val = (u16)(ret | BIT(chan)); 70 else 71 val = (u16)(ret | BIT(chan + 4)); 72 73 if (priv->port[id].is_4p) { 74 chan = priv->port[id].chan[1]; 75 if (chan < 4) 76 val |= BIT(chan); 77 else 78 val |= BIT(chan + 4); 79 } 80 81 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); 82 if (ret) 83 return ret; 84 85 return 0; 86 } 87 88 static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id) 89 { 90 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 91 struct i2c_client *client = priv->client; 92 u8 chan; 93 u16 val; 94 int ret; 95 96 if (id >= TPS23881_MAX_CHANS) 97 return -ERANGE; 98 99 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 100 if (ret < 0) 101 return ret; 102 103 chan = priv->port[id].chan[0]; 104 if (chan < 4) 105 val = (u16)(ret | BIT(chan + 4)); 106 else 107 val = (u16)(ret | BIT(chan + 8)); 108 109 if (priv->port[id].is_4p) { 110 chan = priv->port[id].chan[1]; 111 if (chan < 4) 112 val |= BIT(chan + 4); 113 else 114 val |= BIT(chan + 8); 115 } 116 117 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val); 118 if (ret) 119 return ret; 120 121 return 0; 122 } 123 124 static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id) 125 { 126 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 127 struct i2c_client *client = priv->client; 128 bool enabled; 129 u8 chan; 130 int ret; 131 132 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 133 if (ret < 0) 134 return ret; 135 136 chan = priv->port[id].chan[0]; 137 if (chan < 4) 138 enabled = ret & BIT(chan); 139 else 140 enabled = ret & BIT(chan + 4); 141 142 if (priv->port[id].is_4p) { 143 chan = priv->port[id].chan[1]; 144 if (chan < 4) 145 enabled &= !!(ret & BIT(chan)); 146 else 147 enabled &= !!(ret & BIT(chan + 4)); 148 } 149 150 /* Return enabled status only if both channel are on this state */ 151 return enabled; 152 } 153 154 static int tps23881_ethtool_get_status(struct pse_controller_dev *pcdev, 155 unsigned long id, 156 struct netlink_ext_ack *extack, 157 struct pse_control_status *status) 158 { 159 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 160 struct i2c_client *client = priv->client; 161 bool enabled, delivering; 162 u8 chan; 163 int ret; 164 165 ret = i2c_smbus_read_word_data(client, TPS23881_REG_PW_STATUS); 166 if (ret < 0) 167 return ret; 168 169 chan = priv->port[id].chan[0]; 170 if (chan < 4) { 171 enabled = ret & BIT(chan); 172 delivering = ret & BIT(chan + 4); 173 } else { 174 enabled = ret & BIT(chan + 4); 175 delivering = ret & BIT(chan + 8); 176 } 177 178 if (priv->port[id].is_4p) { 179 chan = priv->port[id].chan[1]; 180 if (chan < 4) { 181 enabled &= !!(ret & BIT(chan)); 182 delivering &= !!(ret & BIT(chan + 4)); 183 } else { 184 enabled &= !!(ret & BIT(chan + 4)); 185 delivering &= !!(ret & BIT(chan + 8)); 186 } 187 } 188 189 /* Return delivering status only if both channel are on this state */ 190 if (delivering) 191 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING; 192 else 193 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED; 194 195 /* Return enabled status only if both channel are on this state */ 196 if (enabled) 197 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; 198 else 199 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; 200 201 return 0; 202 } 203 204 /* Parse managers subnode into a array of device node */ 205 static int 206 tps23881_get_of_channels(struct tps23881_priv *priv, 207 struct device_node *chan_node[TPS23881_MAX_CHANS]) 208 { 209 struct device_node *channels_node, *node; 210 int i, ret; 211 212 if (!priv->np) 213 return -EINVAL; 214 215 channels_node = of_find_node_by_name(priv->np, "channels"); 216 if (!channels_node) 217 return -EINVAL; 218 219 for_each_child_of_node(channels_node, node) { 220 u32 chan_id; 221 222 if (!of_node_name_eq(node, "channel")) 223 continue; 224 225 ret = of_property_read_u32(node, "reg", &chan_id); 226 if (ret) { 227 ret = -EINVAL; 228 goto out; 229 } 230 231 if (chan_id >= TPS23881_MAX_CHANS || chan_node[chan_id]) { 232 dev_err(&priv->client->dev, 233 "wrong number of port (%d)\n", chan_id); 234 ret = -EINVAL; 235 goto out; 236 } 237 238 of_node_get(node); 239 chan_node[chan_id] = node; 240 } 241 242 of_node_put(channels_node); 243 return 0; 244 245 out: 246 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 247 of_node_put(chan_node[i]); 248 chan_node[i] = NULL; 249 } 250 251 of_node_put(node); 252 of_node_put(channels_node); 253 return ret; 254 } 255 256 struct tps23881_port_matrix { 257 u8 pi_id; 258 u8 lgcl_chan[2]; 259 u8 hw_chan[2]; 260 bool is_4p; 261 bool exist; 262 }; 263 264 static int 265 tps23881_match_channel(const struct pse_pi_pairset *pairset, 266 struct device_node *chan_node[TPS23881_MAX_CHANS]) 267 { 268 int i; 269 270 /* Look on every channels */ 271 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 272 if (pairset->np == chan_node[i]) 273 return i; 274 } 275 276 return -ENODEV; 277 } 278 279 static bool 280 tps23881_is_chan_free(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 281 int chan) 282 { 283 int i; 284 285 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 286 if (port_matrix[i].exist && 287 (port_matrix[i].hw_chan[0] == chan || 288 port_matrix[i].hw_chan[1] == chan)) 289 return false; 290 } 291 292 return true; 293 } 294 295 /* Fill port matrix with the matching channels */ 296 static int 297 tps23881_match_port_matrix(struct pse_pi *pi, int pi_id, 298 struct device_node *chan_node[TPS23881_MAX_CHANS], 299 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 300 { 301 int ret; 302 303 if (!pi->pairset[0].np) 304 return 0; 305 306 ret = tps23881_match_channel(&pi->pairset[0], chan_node); 307 if (ret < 0) 308 return ret; 309 310 if (!tps23881_is_chan_free(port_matrix, ret)) { 311 pr_err("tps23881: channel %d already used\n", ret); 312 return -ENODEV; 313 } 314 315 port_matrix[pi_id].hw_chan[0] = ret; 316 port_matrix[pi_id].exist = true; 317 318 if (!pi->pairset[1].np) 319 return 0; 320 321 ret = tps23881_match_channel(&pi->pairset[1], chan_node); 322 if (ret < 0) 323 return ret; 324 325 if (!tps23881_is_chan_free(port_matrix, ret)) { 326 pr_err("tps23881: channel %d already used\n", ret); 327 return -ENODEV; 328 } 329 330 if (port_matrix[pi_id].hw_chan[0] / 4 != ret / 4) { 331 pr_err("tps23881: 4-pair PSE can only be set within the same 4 ports group"); 332 return -ENODEV; 333 } 334 335 port_matrix[pi_id].hw_chan[1] = ret; 336 port_matrix[pi_id].is_4p = true; 337 338 return 0; 339 } 340 341 static int 342 tps23881_get_unused_chan(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 343 int port_cnt) 344 { 345 bool used; 346 int i, j; 347 348 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 349 used = false; 350 351 for (j = 0; j < port_cnt; j++) { 352 if (port_matrix[j].hw_chan[0] == i) { 353 used = true; 354 break; 355 } 356 357 if (port_matrix[j].is_4p && 358 port_matrix[j].hw_chan[1] == i) { 359 used = true; 360 break; 361 } 362 } 363 364 if (!used) 365 return i; 366 } 367 368 return -ENODEV; 369 } 370 371 /* Sort the port matrix to following particular hardware ports matrix 372 * specification of the tps23881. The device has two 4-ports groups and 373 * each 4-pair powered device has to be configured to use two consecutive 374 * logical channel in each 4 ports group (1 and 2 or 3 and 4). Also the 375 * hardware matrix has to be fully configured even with unused chan to be 376 * valid. 377 */ 378 static int 379 tps23881_sort_port_matrix(struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 380 { 381 struct tps23881_port_matrix tmp_port_matrix[TPS23881_MAX_CHANS] = {0}; 382 int i, ret, port_cnt = 0, cnt_4ch_grp1 = 0, cnt_4ch_grp2 = 4; 383 384 /* Configure 4p port matrix */ 385 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 386 int *cnt; 387 388 if (!port_matrix[i].exist || !port_matrix[i].is_4p) 389 continue; 390 391 if (port_matrix[i].hw_chan[0] < 4) 392 cnt = &cnt_4ch_grp1; 393 else 394 cnt = &cnt_4ch_grp2; 395 396 tmp_port_matrix[port_cnt].exist = true; 397 tmp_port_matrix[port_cnt].is_4p = true; 398 tmp_port_matrix[port_cnt].pi_id = i; 399 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0]; 400 tmp_port_matrix[port_cnt].hw_chan[1] = port_matrix[i].hw_chan[1]; 401 402 /* 4-pair ports have to be configured with consecutive 403 * logical channels 0 and 1, 2 and 3. 404 */ 405 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++; 406 tmp_port_matrix[port_cnt].lgcl_chan[1] = (*cnt)++; 407 408 port_cnt++; 409 } 410 411 /* Configure 2p port matrix */ 412 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 413 int *cnt; 414 415 if (!port_matrix[i].exist || port_matrix[i].is_4p) 416 continue; 417 418 if (port_matrix[i].hw_chan[0] < 4) 419 cnt = &cnt_4ch_grp1; 420 else 421 cnt = &cnt_4ch_grp2; 422 423 tmp_port_matrix[port_cnt].exist = true; 424 tmp_port_matrix[port_cnt].pi_id = i; 425 tmp_port_matrix[port_cnt].lgcl_chan[0] = (*cnt)++; 426 tmp_port_matrix[port_cnt].hw_chan[0] = port_matrix[i].hw_chan[0]; 427 428 port_cnt++; 429 } 430 431 /* Complete the rest of the first 4 port group matrix even if 432 * channels are unused 433 */ 434 while (cnt_4ch_grp1 < 4) { 435 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt); 436 if (ret < 0) { 437 pr_err("tps23881: port matrix issue, no chan available\n"); 438 return ret; 439 } 440 441 if (port_cnt >= TPS23881_MAX_CHANS) { 442 pr_err("tps23881: wrong number of channels\n"); 443 return -ENODEV; 444 } 445 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp1; 446 tmp_port_matrix[port_cnt].hw_chan[0] = ret; 447 cnt_4ch_grp1++; 448 port_cnt++; 449 } 450 451 /* Complete the rest of the second 4 port group matrix even if 452 * channels are unused 453 */ 454 while (cnt_4ch_grp2 < 8) { 455 ret = tps23881_get_unused_chan(tmp_port_matrix, port_cnt); 456 if (ret < 0) { 457 pr_err("tps23881: port matrix issue, no chan available\n"); 458 return -ENODEV; 459 } 460 461 if (port_cnt >= TPS23881_MAX_CHANS) { 462 pr_err("tps23881: wrong number of channels\n"); 463 return -ENODEV; 464 } 465 tmp_port_matrix[port_cnt].lgcl_chan[0] = cnt_4ch_grp2; 466 tmp_port_matrix[port_cnt].hw_chan[0] = ret; 467 cnt_4ch_grp2++; 468 port_cnt++; 469 } 470 471 memcpy(port_matrix, tmp_port_matrix, sizeof(tmp_port_matrix)); 472 473 return port_cnt; 474 } 475 476 /* Write port matrix to the hardware port matrix and the software port 477 * matrix. 478 */ 479 static int 480 tps23881_write_port_matrix(struct tps23881_priv *priv, 481 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS], 482 int port_cnt) 483 { 484 struct i2c_client *client = priv->client; 485 u8 pi_id, lgcl_chan, hw_chan; 486 u16 val = 0; 487 int i, ret; 488 489 for (i = 0; i < port_cnt; i++) { 490 pi_id = port_matrix[i].pi_id; 491 lgcl_chan = port_matrix[i].lgcl_chan[0]; 492 hw_chan = port_matrix[i].hw_chan[0] % 4; 493 494 /* Set software port matrix for existing ports */ 495 if (port_matrix[i].exist) 496 priv->port[pi_id].chan[0] = lgcl_chan; 497 498 /* Set hardware port matrix for all ports */ 499 val |= hw_chan << (lgcl_chan * 2); 500 501 if (!port_matrix[i].is_4p) 502 continue; 503 504 lgcl_chan = port_matrix[i].lgcl_chan[1]; 505 hw_chan = port_matrix[i].hw_chan[1] % 4; 506 507 /* Set software port matrix for existing ports */ 508 if (port_matrix[i].exist) { 509 priv->port[pi_id].is_4p = true; 510 priv->port[pi_id].chan[1] = lgcl_chan; 511 } 512 513 /* Set hardware port matrix for all ports */ 514 val |= hw_chan << (lgcl_chan * 2); 515 } 516 517 /* Write hardware ports matrix */ 518 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_MAP, val); 519 if (ret) 520 return ret; 521 522 return 0; 523 } 524 525 static int 526 tps23881_set_ports_conf(struct tps23881_priv *priv, 527 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS]) 528 { 529 struct i2c_client *client = priv->client; 530 int i, ret; 531 u16 val; 532 533 /* Set operating mode */ 534 ret = i2c_smbus_write_word_data(client, TPS23881_REG_OP_MODE, 535 TPS23881_OP_MODE_SEMIAUTO); 536 if (ret) 537 return ret; 538 539 /* Disable DC disconnect */ 540 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DIS_EN, 0x0); 541 if (ret) 542 return ret; 543 544 /* Set port power allocation */ 545 val = 0; 546 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 547 if (!port_matrix[i].exist) 548 continue; 549 550 if (port_matrix[i].is_4p) 551 val |= 0xf << ((port_matrix[i].lgcl_chan[0] / 2) * 4); 552 else 553 val |= 0x3 << ((port_matrix[i].lgcl_chan[0] / 2) * 4); 554 } 555 ret = i2c_smbus_write_word_data(client, TPS23881_REG_PORT_POWER, val); 556 if (ret) 557 return ret; 558 559 /* Enable detection and classification */ 560 val = 0; 561 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 562 if (!port_matrix[i].exist) 563 continue; 564 565 val |= BIT(port_matrix[i].lgcl_chan[0]) | 566 BIT(port_matrix[i].lgcl_chan[0] + 4); 567 if (port_matrix[i].is_4p) 568 val |= BIT(port_matrix[i].lgcl_chan[1]) | 569 BIT(port_matrix[i].lgcl_chan[1] + 4); 570 } 571 ret = i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val); 572 if (ret) 573 return ret; 574 575 return 0; 576 } 577 578 static int 579 tps23881_set_ports_matrix(struct tps23881_priv *priv, 580 struct device_node *chan_node[TPS23881_MAX_CHANS]) 581 { 582 struct tps23881_port_matrix port_matrix[TPS23881_MAX_CHANS] = {0}; 583 int i, ret; 584 585 /* Update with values for every PSE PIs */ 586 for (i = 0; i < TPS23881_MAX_CHANS; i++) { 587 ret = tps23881_match_port_matrix(&priv->pcdev.pi[i], i, 588 chan_node, port_matrix); 589 if (ret) 590 return ret; 591 } 592 593 ret = tps23881_sort_port_matrix(port_matrix); 594 if (ret < 0) 595 return ret; 596 597 ret = tps23881_write_port_matrix(priv, port_matrix, ret); 598 if (ret) 599 return ret; 600 601 ret = tps23881_set_ports_conf(priv, port_matrix); 602 if (ret) 603 return ret; 604 605 return 0; 606 } 607 608 static int tps23881_setup_pi_matrix(struct pse_controller_dev *pcdev) 609 { 610 struct device_node *chan_node[TPS23881_MAX_CHANS] = {NULL}; 611 struct tps23881_priv *priv = to_tps23881_priv(pcdev); 612 int ret, i; 613 614 ret = tps23881_get_of_channels(priv, chan_node); 615 if (ret < 0) { 616 dev_warn(&priv->client->dev, 617 "Unable to parse port-matrix, default matrix will be used\n"); 618 return 0; 619 } 620 621 ret = tps23881_set_ports_matrix(priv, chan_node); 622 623 for (i = 0; i < TPS23881_MAX_CHANS; i++) 624 of_node_put(chan_node[i]); 625 626 return ret; 627 } 628 629 static const struct pse_controller_ops tps23881_ops = { 630 .setup_pi_matrix = tps23881_setup_pi_matrix, 631 .pi_enable = tps23881_pi_enable, 632 .pi_disable = tps23881_pi_disable, 633 .pi_is_enabled = tps23881_pi_is_enabled, 634 .ethtool_get_status = tps23881_ethtool_get_status, 635 }; 636 637 static const char fw_parity_name[] = "ti/tps23881/tps23881-parity-14.bin"; 638 static const char fw_sram_name[] = "ti/tps23881/tps23881-sram-14.bin"; 639 640 struct tps23881_fw_conf { 641 u8 reg; 642 u8 val; 643 }; 644 645 static const struct tps23881_fw_conf tps23881_fw_parity_conf[] = { 646 {.reg = 0x60, .val = 0x01}, 647 {.reg = 0x62, .val = 0x00}, 648 {.reg = 0x63, .val = 0x80}, 649 {.reg = 0x60, .val = 0xC4}, 650 {.reg = 0x1D, .val = 0xBC}, 651 {.reg = 0xD7, .val = 0x02}, 652 {.reg = 0x91, .val = 0x00}, 653 {.reg = 0x90, .val = 0x00}, 654 {.reg = 0xD7, .val = 0x00}, 655 {.reg = 0x1D, .val = 0x00}, 656 { /* sentinel */ } 657 }; 658 659 static const struct tps23881_fw_conf tps23881_fw_sram_conf[] = { 660 {.reg = 0x60, .val = 0xC5}, 661 {.reg = 0x62, .val = 0x00}, 662 {.reg = 0x63, .val = 0x80}, 663 {.reg = 0x60, .val = 0xC0}, 664 {.reg = 0x1D, .val = 0xBC}, 665 {.reg = 0xD7, .val = 0x02}, 666 {.reg = 0x91, .val = 0x00}, 667 {.reg = 0x90, .val = 0x00}, 668 {.reg = 0xD7, .val = 0x00}, 669 {.reg = 0x1D, .val = 0x00}, 670 { /* sentinel */ } 671 }; 672 673 static int tps23881_flash_sram_fw_part(struct i2c_client *client, 674 const char *fw_name, 675 const struct tps23881_fw_conf *fw_conf) 676 { 677 const struct firmware *fw = NULL; 678 int i, ret; 679 680 ret = request_firmware(&fw, fw_name, &client->dev); 681 if (ret) 682 return ret; 683 684 dev_dbg(&client->dev, "Flashing %s\n", fw_name); 685 686 /* Prepare device for RAM download */ 687 while (fw_conf->reg) { 688 ret = i2c_smbus_write_byte_data(client, fw_conf->reg, 689 fw_conf->val); 690 if (ret) 691 goto out; 692 693 fw_conf++; 694 } 695 696 /* Flash the firmware file */ 697 for (i = 0; i < fw->size; i++) { 698 ret = i2c_smbus_write_byte_data(client, 699 TPS23881_REG_SRAM_DATA, 700 fw->data[i]); 701 if (ret) 702 goto out; 703 } 704 705 out: 706 release_firmware(fw); 707 return ret; 708 } 709 710 static int tps23881_flash_sram_fw(struct i2c_client *client) 711 { 712 int ret; 713 714 ret = tps23881_flash_sram_fw_part(client, fw_parity_name, 715 tps23881_fw_parity_conf); 716 if (ret) 717 return ret; 718 719 ret = tps23881_flash_sram_fw_part(client, fw_sram_name, 720 tps23881_fw_sram_conf); 721 if (ret) 722 return ret; 723 724 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_SRAM_CTRL, 0x18); 725 if (ret) 726 return ret; 727 728 mdelay(12); 729 730 return 0; 731 } 732 733 static int tps23881_i2c_probe(struct i2c_client *client) 734 { 735 struct device *dev = &client->dev; 736 struct tps23881_priv *priv; 737 int ret; 738 u8 val; 739 740 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 741 dev_err(dev, "i2c check functionality failed\n"); 742 return -ENXIO; 743 } 744 745 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 746 if (!priv) 747 return -ENOMEM; 748 749 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_DEVID); 750 if (ret < 0) 751 return ret; 752 753 if (ret != 0x22) { 754 dev_err(dev, "Wrong device ID\n"); 755 return -ENXIO; 756 } 757 758 ret = tps23881_flash_sram_fw(client); 759 if (ret < 0) 760 return ret; 761 762 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_FWREV); 763 if (ret < 0) 764 return ret; 765 766 dev_info(&client->dev, "Firmware revision 0x%x\n", ret); 767 768 /* Set configuration B, 16 bit access on a single device address */ 769 ret = i2c_smbus_read_byte_data(client, TPS23881_REG_GEN_MASK); 770 if (ret < 0) 771 return ret; 772 773 val = ret | TPS23881_REG_NBITACC; 774 ret = i2c_smbus_write_byte_data(client, TPS23881_REG_GEN_MASK, val); 775 if (ret) 776 return ret; 777 778 priv->client = client; 779 i2c_set_clientdata(client, priv); 780 priv->np = dev->of_node; 781 782 priv->pcdev.owner = THIS_MODULE; 783 priv->pcdev.ops = &tps23881_ops; 784 priv->pcdev.dev = dev; 785 priv->pcdev.types = ETHTOOL_PSE_C33; 786 priv->pcdev.nr_lines = TPS23881_MAX_CHANS; 787 ret = devm_pse_controller_register(dev, &priv->pcdev); 788 if (ret) { 789 return dev_err_probe(dev, ret, 790 "failed to register PSE controller\n"); 791 } 792 793 return ret; 794 } 795 796 static const struct i2c_device_id tps23881_id[] = { 797 { "tps23881", 0 }, 798 { }, 799 }; 800 MODULE_DEVICE_TABLE(i2c, tps23881_id); 801 802 static const struct of_device_id tps23881_of_match[] = { 803 { .compatible = "ti,tps23881", }, 804 { }, 805 }; 806 MODULE_DEVICE_TABLE(of, tps23881_of_match); 807 808 static struct i2c_driver tps23881_driver = { 809 .probe = tps23881_i2c_probe, 810 .id_table = tps23881_id, 811 .driver = { 812 .name = "tps23881", 813 .of_match_table = tps23881_of_match, 814 }, 815 }; 816 module_i2c_driver(tps23881_driver); 817 818 MODULE_AUTHOR("Kory Maincent <kory.maincent@bootlin.com>"); 819 MODULE_DESCRIPTION("TI TPS23881 PoE PSE Controller driver"); 820 MODULE_LICENSE("GPL"); 821