1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // Framework for Ethernet Power Sourcing Equipment 4 // 5 // Copyright (c) 2022 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 6 // 7 8 #include <linux/device.h> 9 #include <linux/ethtool.h> 10 #include <linux/ethtool_netlink.h> 11 #include <linux/of.h> 12 #include <linux/phy.h> 13 #include <linux/pse-pd/pse.h> 14 #include <linux/regulator/driver.h> 15 #include <linux/regulator/machine.h> 16 #include <linux/rtnetlink.h> 17 #include <net/net_trackers.h> 18 19 static DEFINE_MUTEX(pse_list_mutex); 20 static LIST_HEAD(pse_controller_list); 21 22 /** 23 * struct pse_control - a PSE control 24 * @pcdev: a pointer to the PSE controller device 25 * this PSE control belongs to 26 * @ps: PSE PI supply of the PSE control 27 * @list: list entry for the pcdev's PSE controller list 28 * @id: ID of the PSE line in the PSE controller device 29 * @refcnt: Number of gets of this pse_control 30 * @attached_phydev: PHY device pointer attached by the PSE control 31 */ 32 struct pse_control { 33 struct pse_controller_dev *pcdev; 34 struct regulator *ps; 35 struct list_head list; 36 unsigned int id; 37 struct kref refcnt; 38 struct phy_device *attached_phydev; 39 }; 40 41 static int of_load_single_pse_pi_pairset(struct device_node *node, 42 struct pse_pi *pi, 43 int pairset_num) 44 { 45 struct device_node *pairset_np; 46 const char *name; 47 int ret; 48 49 ret = of_property_read_string_index(node, "pairset-names", 50 pairset_num, &name); 51 if (ret) 52 return ret; 53 54 if (!strcmp(name, "alternative-a")) { 55 pi->pairset[pairset_num].pinout = ALTERNATIVE_A; 56 } else if (!strcmp(name, "alternative-b")) { 57 pi->pairset[pairset_num].pinout = ALTERNATIVE_B; 58 } else { 59 pr_err("pse: wrong pairset-names value %s (%pOF)\n", 60 name, node); 61 return -EINVAL; 62 } 63 64 pairset_np = of_parse_phandle(node, "pairsets", pairset_num); 65 if (!pairset_np) 66 return -ENODEV; 67 68 pi->pairset[pairset_num].np = pairset_np; 69 70 return 0; 71 } 72 73 /** 74 * of_load_pse_pi_pairsets - load PSE PI pairsets pinout and polarity 75 * @node: a pointer of the device node 76 * @pi: a pointer of the PSE PI to fill 77 * @npairsets: the number of pairsets (1 or 2) used by the PI 78 * 79 * Return: 0 on success and failure value on error 80 */ 81 static int of_load_pse_pi_pairsets(struct device_node *node, 82 struct pse_pi *pi, 83 int npairsets) 84 { 85 int i, ret; 86 87 ret = of_property_count_strings(node, "pairset-names"); 88 if (ret != npairsets) { 89 pr_err("pse: amount of pairsets and pairset-names is not equal %d != %d (%pOF)\n", 90 npairsets, ret, node); 91 return -EINVAL; 92 } 93 94 for (i = 0; i < npairsets; i++) { 95 ret = of_load_single_pse_pi_pairset(node, pi, i); 96 if (ret) 97 goto out; 98 } 99 100 if (npairsets == 2 && 101 pi->pairset[0].pinout == pi->pairset[1].pinout) { 102 pr_err("pse: two PI pairsets can not have identical pinout (%pOF)", 103 node); 104 ret = -EINVAL; 105 } 106 107 out: 108 /* If an error appears, release all the pairset device node kref */ 109 if (ret) { 110 of_node_put(pi->pairset[0].np); 111 pi->pairset[0].np = NULL; 112 of_node_put(pi->pairset[1].np); 113 pi->pairset[1].np = NULL; 114 } 115 116 return ret; 117 } 118 119 static void pse_release_pis(struct pse_controller_dev *pcdev) 120 { 121 int i; 122 123 for (i = 0; i < pcdev->nr_lines; i++) { 124 of_node_put(pcdev->pi[i].pairset[0].np); 125 of_node_put(pcdev->pi[i].pairset[1].np); 126 of_node_put(pcdev->pi[i].np); 127 } 128 kfree(pcdev->pi); 129 } 130 131 /** 132 * of_load_pse_pis - load all the PSE PIs 133 * @pcdev: a pointer to the PSE controller device 134 * 135 * Return: 0 on success and failure value on error 136 */ 137 static int of_load_pse_pis(struct pse_controller_dev *pcdev) 138 { 139 struct device_node *np = pcdev->dev->of_node; 140 struct device_node *node, *pis; 141 int ret; 142 143 if (!np) 144 return -ENODEV; 145 146 pcdev->pi = kcalloc(pcdev->nr_lines, sizeof(*pcdev->pi), GFP_KERNEL); 147 if (!pcdev->pi) 148 return -ENOMEM; 149 150 pis = of_get_child_by_name(np, "pse-pis"); 151 if (!pis) { 152 /* no description of PSE PIs */ 153 pcdev->no_of_pse_pi = true; 154 return 0; 155 } 156 157 for_each_child_of_node(pis, node) { 158 struct pse_pi pi = {0}; 159 u32 id; 160 161 if (!of_node_name_eq(node, "pse-pi")) 162 continue; 163 164 ret = of_property_read_u32(node, "reg", &id); 165 if (ret) { 166 dev_err(pcdev->dev, 167 "can't get reg property for node '%pOF'", 168 node); 169 goto out; 170 } 171 172 if (id >= pcdev->nr_lines) { 173 dev_err(pcdev->dev, 174 "reg value (%u) is out of range (%u) (%pOF)\n", 175 id, pcdev->nr_lines, node); 176 ret = -EINVAL; 177 goto out; 178 } 179 180 if (pcdev->pi[id].np) { 181 dev_err(pcdev->dev, 182 "other node with same reg value was already registered. %pOF : %pOF\n", 183 pcdev->pi[id].np, node); 184 ret = -EINVAL; 185 goto out; 186 } 187 188 ret = of_count_phandle_with_args(node, "pairsets", NULL); 189 /* npairsets is limited to value one or two */ 190 if (ret == 1 || ret == 2) { 191 ret = of_load_pse_pi_pairsets(node, &pi, ret); 192 if (ret) 193 goto out; 194 } else if (ret != ENOENT) { 195 dev_err(pcdev->dev, 196 "error: wrong number of pairsets. Should be 1 or 2, got %d (%pOF)\n", 197 ret, node); 198 ret = -EINVAL; 199 goto out; 200 } 201 202 of_node_get(node); 203 pi.np = node; 204 memcpy(&pcdev->pi[id], &pi, sizeof(pi)); 205 } 206 207 of_node_put(pis); 208 return 0; 209 210 out: 211 pse_release_pis(pcdev); 212 of_node_put(node); 213 of_node_put(pis); 214 return ret; 215 } 216 217 /** 218 * pse_control_find_net_by_id - Find net attached to the pse control id 219 * @pcdev: a pointer to the PSE 220 * @id: index of the PSE control 221 * 222 * Return: pse_control pointer or NULL. The device returned has had a 223 * reference added and the pointer is safe until the user calls 224 * pse_control_put() to indicate they have finished with it. 225 */ 226 static struct pse_control * 227 pse_control_find_by_id(struct pse_controller_dev *pcdev, int id) 228 { 229 struct pse_control *psec; 230 231 mutex_lock(&pse_list_mutex); 232 list_for_each_entry(psec, &pcdev->pse_control_head, list) { 233 if (psec->id == id) { 234 kref_get(&psec->refcnt); 235 mutex_unlock(&pse_list_mutex); 236 return psec; 237 } 238 } 239 mutex_unlock(&pse_list_mutex); 240 return NULL; 241 } 242 243 /** 244 * pse_control_get_netdev - Return netdev associated to a PSE control 245 * @psec: PSE control pointer 246 * 247 * Return: netdev pointer or NULL 248 */ 249 static struct net_device *pse_control_get_netdev(struct pse_control *psec) 250 { 251 ASSERT_RTNL(); 252 253 if (!psec || !psec->attached_phydev) 254 return NULL; 255 256 return psec->attached_phydev->attached_dev; 257 } 258 259 static int pse_pi_is_enabled(struct regulator_dev *rdev) 260 { 261 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 262 struct pse_admin_state admin_state = {0}; 263 const struct pse_controller_ops *ops; 264 int id, ret; 265 266 ops = pcdev->ops; 267 if (!ops->pi_get_admin_state) 268 return -EOPNOTSUPP; 269 270 id = rdev_get_id(rdev); 271 mutex_lock(&pcdev->lock); 272 ret = ops->pi_get_admin_state(pcdev, id, &admin_state); 273 if (ret) 274 goto out; 275 276 if (admin_state.podl_admin_state == ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED || 277 admin_state.c33_admin_state == ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED) 278 ret = 1; 279 280 out: 281 mutex_unlock(&pcdev->lock); 282 283 return ret; 284 } 285 286 static int pse_pi_enable(struct regulator_dev *rdev) 287 { 288 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 289 const struct pse_controller_ops *ops; 290 int id, ret; 291 292 ops = pcdev->ops; 293 if (!ops->pi_enable) 294 return -EOPNOTSUPP; 295 296 id = rdev_get_id(rdev); 297 mutex_lock(&pcdev->lock); 298 ret = ops->pi_enable(pcdev, id); 299 if (!ret) 300 pcdev->pi[id].admin_state_enabled = 1; 301 mutex_unlock(&pcdev->lock); 302 303 return ret; 304 } 305 306 static int pse_pi_disable(struct regulator_dev *rdev) 307 { 308 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 309 const struct pse_controller_ops *ops; 310 int id, ret; 311 312 ops = pcdev->ops; 313 if (!ops->pi_disable) 314 return -EOPNOTSUPP; 315 316 id = rdev_get_id(rdev); 317 mutex_lock(&pcdev->lock); 318 ret = ops->pi_disable(pcdev, id); 319 if (!ret) 320 pcdev->pi[id].admin_state_enabled = 0; 321 mutex_unlock(&pcdev->lock); 322 323 return ret; 324 } 325 326 static int _pse_pi_get_voltage(struct regulator_dev *rdev) 327 { 328 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 329 const struct pse_controller_ops *ops; 330 int id; 331 332 ops = pcdev->ops; 333 if (!ops->pi_get_voltage) 334 return -EOPNOTSUPP; 335 336 id = rdev_get_id(rdev); 337 return ops->pi_get_voltage(pcdev, id); 338 } 339 340 static int pse_pi_get_voltage(struct regulator_dev *rdev) 341 { 342 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 343 int ret; 344 345 mutex_lock(&pcdev->lock); 346 ret = _pse_pi_get_voltage(rdev); 347 mutex_unlock(&pcdev->lock); 348 349 return ret; 350 } 351 352 static int pse_pi_get_current_limit(struct regulator_dev *rdev) 353 { 354 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 355 const struct pse_controller_ops *ops; 356 int id, uV, mW, ret; 357 s64 tmp_64; 358 359 ops = pcdev->ops; 360 id = rdev_get_id(rdev); 361 if (!ops->pi_get_pw_limit || !ops->pi_get_voltage) 362 return -EOPNOTSUPP; 363 364 mutex_lock(&pcdev->lock); 365 ret = ops->pi_get_pw_limit(pcdev, id); 366 if (ret < 0) 367 goto out; 368 mW = ret; 369 370 ret = _pse_pi_get_voltage(rdev); 371 if (!ret) { 372 dev_err(pcdev->dev, "Voltage null\n"); 373 ret = -ERANGE; 374 goto out; 375 } 376 if (ret < 0) 377 goto out; 378 uV = ret; 379 380 tmp_64 = mW; 381 tmp_64 *= 1000000000ull; 382 /* uA = mW * 1000000000 / uV */ 383 ret = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); 384 385 out: 386 mutex_unlock(&pcdev->lock); 387 return ret; 388 } 389 390 static int pse_pi_set_current_limit(struct regulator_dev *rdev, int min_uA, 391 int max_uA) 392 { 393 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 394 const struct pse_controller_ops *ops; 395 int id, mW, ret; 396 s64 tmp_64; 397 398 ops = pcdev->ops; 399 if (!ops->pi_set_pw_limit || !ops->pi_get_voltage) 400 return -EOPNOTSUPP; 401 402 if (max_uA > MAX_PI_CURRENT) 403 return -ERANGE; 404 405 id = rdev_get_id(rdev); 406 mutex_lock(&pcdev->lock); 407 ret = _pse_pi_get_voltage(rdev); 408 if (!ret) { 409 dev_err(pcdev->dev, "Voltage null\n"); 410 ret = -ERANGE; 411 goto out; 412 } 413 if (ret < 0) 414 goto out; 415 416 tmp_64 = ret; 417 tmp_64 *= max_uA; 418 /* mW = uA * uV / 1000000000 */ 419 mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); 420 ret = ops->pi_set_pw_limit(pcdev, id, mW); 421 out: 422 mutex_unlock(&pcdev->lock); 423 424 return ret; 425 } 426 427 static const struct regulator_ops pse_pi_ops = { 428 .is_enabled = pse_pi_is_enabled, 429 .enable = pse_pi_enable, 430 .disable = pse_pi_disable, 431 .get_voltage = pse_pi_get_voltage, 432 .get_current_limit = pse_pi_get_current_limit, 433 .set_current_limit = pse_pi_set_current_limit, 434 }; 435 436 static int 437 devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev, 438 char *name, int id) 439 { 440 struct regulator_init_data *rinit_data; 441 struct regulator_config rconfig = {0}; 442 struct regulator_desc *rdesc; 443 struct regulator_dev *rdev; 444 445 rinit_data = devm_kzalloc(pcdev->dev, sizeof(*rinit_data), 446 GFP_KERNEL); 447 if (!rinit_data) 448 return -ENOMEM; 449 450 rdesc = devm_kzalloc(pcdev->dev, sizeof(*rdesc), GFP_KERNEL); 451 if (!rdesc) 452 return -ENOMEM; 453 454 /* Regulator descriptor id have to be the same as its associated 455 * PSE PI id for the well functioning of the PSE controls. 456 */ 457 rdesc->id = id; 458 rdesc->name = name; 459 rdesc->type = REGULATOR_VOLTAGE; 460 rdesc->ops = &pse_pi_ops; 461 rdesc->owner = pcdev->owner; 462 463 rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; 464 465 if (pcdev->ops->pi_set_pw_limit) 466 rinit_data->constraints.valid_ops_mask |= 467 REGULATOR_CHANGE_CURRENT; 468 469 rinit_data->supply_regulator = "vpwr"; 470 471 rconfig.dev = pcdev->dev; 472 rconfig.driver_data = pcdev; 473 rconfig.init_data = rinit_data; 474 rconfig.of_node = pcdev->pi[id].np; 475 476 rdev = devm_regulator_register(pcdev->dev, rdesc, &rconfig); 477 if (IS_ERR(rdev)) { 478 dev_err_probe(pcdev->dev, PTR_ERR(rdev), 479 "Failed to register regulator\n"); 480 return PTR_ERR(rdev); 481 } 482 483 pcdev->pi[id].rdev = rdev; 484 485 return 0; 486 } 487 488 /** 489 * pse_controller_register - register a PSE controller device 490 * @pcdev: a pointer to the initialized PSE controller device 491 * 492 * Return: 0 on success and failure value on error 493 */ 494 int pse_controller_register(struct pse_controller_dev *pcdev) 495 { 496 size_t reg_name_len; 497 int ret, i; 498 499 mutex_init(&pcdev->lock); 500 INIT_LIST_HEAD(&pcdev->pse_control_head); 501 502 if (!pcdev->nr_lines) 503 pcdev->nr_lines = 1; 504 505 if (!pcdev->ops->pi_get_admin_state || 506 !pcdev->ops->pi_get_pw_status) { 507 dev_err(pcdev->dev, 508 "Mandatory status report callbacks are missing"); 509 return -EINVAL; 510 } 511 512 ret = of_load_pse_pis(pcdev); 513 if (ret) 514 return ret; 515 516 if (pcdev->ops->setup_pi_matrix) { 517 ret = pcdev->ops->setup_pi_matrix(pcdev); 518 if (ret) 519 return ret; 520 } 521 522 /* Each regulator name len is pcdev dev name + 7 char + 523 * int max digit number (10) + 1 524 */ 525 reg_name_len = strlen(dev_name(pcdev->dev)) + 18; 526 527 /* Register PI regulators */ 528 for (i = 0; i < pcdev->nr_lines; i++) { 529 char *reg_name; 530 531 /* Do not register regulator for PIs not described */ 532 if (!pcdev->no_of_pse_pi && !pcdev->pi[i].np) 533 continue; 534 535 reg_name = devm_kzalloc(pcdev->dev, reg_name_len, GFP_KERNEL); 536 if (!reg_name) 537 return -ENOMEM; 538 539 snprintf(reg_name, reg_name_len, "pse-%s_pi%d", 540 dev_name(pcdev->dev), i); 541 542 ret = devm_pse_pi_regulator_register(pcdev, reg_name, i); 543 if (ret) 544 return ret; 545 } 546 547 mutex_lock(&pse_list_mutex); 548 list_add(&pcdev->list, &pse_controller_list); 549 mutex_unlock(&pse_list_mutex); 550 551 return 0; 552 } 553 EXPORT_SYMBOL_GPL(pse_controller_register); 554 555 /** 556 * pse_controller_unregister - unregister a PSE controller device 557 * @pcdev: a pointer to the PSE controller device 558 */ 559 void pse_controller_unregister(struct pse_controller_dev *pcdev) 560 { 561 pse_release_pis(pcdev); 562 mutex_lock(&pse_list_mutex); 563 list_del(&pcdev->list); 564 mutex_unlock(&pse_list_mutex); 565 } 566 EXPORT_SYMBOL_GPL(pse_controller_unregister); 567 568 static void devm_pse_controller_release(struct device *dev, void *res) 569 { 570 pse_controller_unregister(*(struct pse_controller_dev **)res); 571 } 572 573 /** 574 * devm_pse_controller_register - resource managed pse_controller_register() 575 * @dev: device that is registering this PSE controller 576 * @pcdev: a pointer to the initialized PSE controller device 577 * 578 * Managed pse_controller_register(). For PSE controllers registered by 579 * this function, pse_controller_unregister() is automatically called on 580 * driver detach. See pse_controller_register() for more information. 581 * 582 * Return: 0 on success and failure value on error 583 */ 584 int devm_pse_controller_register(struct device *dev, 585 struct pse_controller_dev *pcdev) 586 { 587 struct pse_controller_dev **pcdevp; 588 int ret; 589 590 pcdevp = devres_alloc(devm_pse_controller_release, sizeof(*pcdevp), 591 GFP_KERNEL); 592 if (!pcdevp) 593 return -ENOMEM; 594 595 ret = pse_controller_register(pcdev); 596 if (ret) { 597 devres_free(pcdevp); 598 return ret; 599 } 600 601 *pcdevp = pcdev; 602 devres_add(dev, pcdevp); 603 604 return 0; 605 } 606 EXPORT_SYMBOL_GPL(devm_pse_controller_register); 607 608 struct pse_irq { 609 struct pse_controller_dev *pcdev; 610 struct pse_irq_desc desc; 611 unsigned long *notifs; 612 }; 613 614 /** 615 * pse_to_regulator_notifs - Convert PSE notifications to Regulator 616 * notifications 617 * @notifs: PSE notifications 618 * 619 * Return: Regulator notifications 620 */ 621 static unsigned long pse_to_regulator_notifs(unsigned long notifs) 622 { 623 unsigned long rnotifs = 0; 624 625 if (notifs & ETHTOOL_PSE_EVENT_OVER_CURRENT) 626 rnotifs |= REGULATOR_EVENT_OVER_CURRENT; 627 if (notifs & ETHTOOL_PSE_EVENT_OVER_TEMP) 628 rnotifs |= REGULATOR_EVENT_OVER_TEMP; 629 630 return rnotifs; 631 } 632 633 /** 634 * pse_isr - IRQ handler for PSE 635 * @irq: irq number 636 * @data: pointer to user interrupt structure 637 * 638 * Return: irqreturn_t - status of IRQ 639 */ 640 static irqreturn_t pse_isr(int irq, void *data) 641 { 642 struct pse_controller_dev *pcdev; 643 unsigned long notifs_mask = 0; 644 struct pse_irq_desc *desc; 645 struct pse_irq *h = data; 646 int ret, i; 647 648 desc = &h->desc; 649 pcdev = h->pcdev; 650 651 /* Clear notifs mask */ 652 memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); 653 mutex_lock(&pcdev->lock); 654 ret = desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); 655 mutex_unlock(&pcdev->lock); 656 if (ret || !notifs_mask) 657 return IRQ_NONE; 658 659 for_each_set_bit(i, ¬ifs_mask, pcdev->nr_lines) { 660 unsigned long notifs, rnotifs; 661 struct net_device *netdev; 662 struct pse_control *psec; 663 664 /* Do nothing PI not described */ 665 if (!pcdev->pi[i].rdev) 666 continue; 667 668 notifs = h->notifs[i]; 669 dev_dbg(h->pcdev->dev, 670 "Sending PSE notification EVT 0x%lx\n", notifs); 671 672 psec = pse_control_find_by_id(pcdev, i); 673 rtnl_lock(); 674 netdev = pse_control_get_netdev(psec); 675 if (netdev) 676 ethnl_pse_send_ntf(netdev, notifs); 677 rtnl_unlock(); 678 pse_control_put(psec); 679 680 rnotifs = pse_to_regulator_notifs(notifs); 681 regulator_notifier_call_chain(pcdev->pi[i].rdev, rnotifs, 682 NULL); 683 } 684 685 return IRQ_HANDLED; 686 } 687 688 /** 689 * devm_pse_irq_helper - Register IRQ based PSE event notifier 690 * @pcdev: a pointer to the PSE 691 * @irq: the irq value to be passed to request_irq 692 * @irq_flags: the flags to be passed to request_irq 693 * @d: PSE interrupt description 694 * 695 * Return: 0 on success and errno on failure 696 */ 697 int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, 698 int irq_flags, const struct pse_irq_desc *d) 699 { 700 struct device *dev = pcdev->dev; 701 size_t irq_name_len; 702 struct pse_irq *h; 703 char *irq_name; 704 int ret; 705 706 if (!d || !d->map_event || !d->name) 707 return -EINVAL; 708 709 h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); 710 if (!h) 711 return -ENOMEM; 712 713 h->pcdev = pcdev; 714 h->desc = *d; 715 716 /* IRQ name len is pcdev dev name + 5 char + irq desc name + 1 */ 717 irq_name_len = strlen(dev_name(pcdev->dev)) + 5 + strlen(d->name) + 1; 718 irq_name = devm_kzalloc(dev, irq_name_len, GFP_KERNEL); 719 if (!irq_name) 720 return -ENOMEM; 721 722 snprintf(irq_name, irq_name_len, "pse-%s:%s", dev_name(pcdev->dev), 723 d->name); 724 725 h->notifs = devm_kcalloc(dev, pcdev->nr_lines, 726 sizeof(*h->notifs), GFP_KERNEL); 727 if (!h->notifs) 728 return -ENOMEM; 729 730 ret = devm_request_threaded_irq(dev, irq, NULL, pse_isr, 731 IRQF_ONESHOT | irq_flags, 732 irq_name, h); 733 if (ret) 734 dev_err(pcdev->dev, "Failed to request IRQ %d\n", irq); 735 736 pcdev->irq = irq; 737 return ret; 738 } 739 EXPORT_SYMBOL_GPL(devm_pse_irq_helper); 740 741 /* PSE control section */ 742 743 static void __pse_control_release(struct kref *kref) 744 { 745 struct pse_control *psec = container_of(kref, struct pse_control, 746 refcnt); 747 748 lockdep_assert_held(&pse_list_mutex); 749 750 if (psec->pcdev->pi[psec->id].admin_state_enabled) 751 regulator_disable(psec->ps); 752 devm_regulator_put(psec->ps); 753 754 module_put(psec->pcdev->owner); 755 756 list_del(&psec->list); 757 kfree(psec); 758 } 759 760 static void __pse_control_put_internal(struct pse_control *psec) 761 { 762 lockdep_assert_held(&pse_list_mutex); 763 764 kref_put(&psec->refcnt, __pse_control_release); 765 } 766 767 /** 768 * pse_control_put - free the PSE control 769 * @psec: PSE control pointer 770 */ 771 void pse_control_put(struct pse_control *psec) 772 { 773 if (IS_ERR_OR_NULL(psec)) 774 return; 775 776 mutex_lock(&pse_list_mutex); 777 __pse_control_put_internal(psec); 778 mutex_unlock(&pse_list_mutex); 779 } 780 EXPORT_SYMBOL_GPL(pse_control_put); 781 782 static struct pse_control * 783 pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index, 784 struct phy_device *phydev) 785 { 786 struct pse_control *psec; 787 int ret; 788 789 lockdep_assert_held(&pse_list_mutex); 790 791 list_for_each_entry(psec, &pcdev->pse_control_head, list) { 792 if (psec->id == index) { 793 kref_get(&psec->refcnt); 794 return psec; 795 } 796 } 797 798 psec = kzalloc(sizeof(*psec), GFP_KERNEL); 799 if (!psec) 800 return ERR_PTR(-ENOMEM); 801 802 if (!try_module_get(pcdev->owner)) { 803 ret = -ENODEV; 804 goto free_psec; 805 } 806 807 psec->ps = devm_regulator_get_exclusive(pcdev->dev, 808 rdev_get_name(pcdev->pi[index].rdev)); 809 if (IS_ERR(psec->ps)) { 810 ret = PTR_ERR(psec->ps); 811 goto put_module; 812 } 813 814 ret = regulator_is_enabled(psec->ps); 815 if (ret < 0) 816 goto regulator_put; 817 818 pcdev->pi[index].admin_state_enabled = ret; 819 820 psec->pcdev = pcdev; 821 list_add(&psec->list, &pcdev->pse_control_head); 822 psec->id = index; 823 psec->attached_phydev = phydev; 824 kref_init(&psec->refcnt); 825 826 return psec; 827 828 regulator_put: 829 devm_regulator_put(psec->ps); 830 put_module: 831 module_put(pcdev->owner); 832 free_psec: 833 kfree(psec); 834 835 return ERR_PTR(ret); 836 } 837 838 /** 839 * of_pse_match_pi - Find the PSE PI id matching the device node phandle 840 * @pcdev: a pointer to the PSE controller device 841 * @np: a pointer to the device node 842 * 843 * Return: id of the PSE PI, -EINVAL if not found 844 */ 845 static int of_pse_match_pi(struct pse_controller_dev *pcdev, 846 struct device_node *np) 847 { 848 int i; 849 850 for (i = 0; i < pcdev->nr_lines; i++) { 851 if (pcdev->pi[i].np == np) 852 return i; 853 } 854 855 return -EINVAL; 856 } 857 858 /** 859 * psec_id_xlate - translate pse_spec to the PSE line number according 860 * to the number of pse-cells in case of no pse_pi node 861 * @pcdev: a pointer to the PSE controller device 862 * @pse_spec: PSE line specifier as found in the device tree 863 * 864 * Return: 0 if #pse-cells = <0>. Return PSE line number otherwise. 865 */ 866 static int psec_id_xlate(struct pse_controller_dev *pcdev, 867 const struct of_phandle_args *pse_spec) 868 { 869 if (!pcdev->of_pse_n_cells) 870 return 0; 871 872 if (pcdev->of_pse_n_cells > 1 || 873 pse_spec->args[0] >= pcdev->nr_lines) 874 return -EINVAL; 875 876 return pse_spec->args[0]; 877 } 878 879 struct pse_control *of_pse_control_get(struct device_node *node, 880 struct phy_device *phydev) 881 { 882 struct pse_controller_dev *r, *pcdev; 883 struct of_phandle_args args; 884 struct pse_control *psec; 885 int psec_id; 886 int ret; 887 888 if (!node) 889 return ERR_PTR(-EINVAL); 890 891 ret = of_parse_phandle_with_args(node, "pses", "#pse-cells", 0, &args); 892 if (ret) 893 return ERR_PTR(ret); 894 895 mutex_lock(&pse_list_mutex); 896 pcdev = NULL; 897 list_for_each_entry(r, &pse_controller_list, list) { 898 if (!r->no_of_pse_pi) { 899 ret = of_pse_match_pi(r, args.np); 900 if (ret >= 0) { 901 pcdev = r; 902 psec_id = ret; 903 break; 904 } 905 } else if (args.np == r->dev->of_node) { 906 pcdev = r; 907 break; 908 } 909 } 910 911 if (!pcdev) { 912 psec = ERR_PTR(-EPROBE_DEFER); 913 goto out; 914 } 915 916 if (WARN_ON(args.args_count != pcdev->of_pse_n_cells)) { 917 psec = ERR_PTR(-EINVAL); 918 goto out; 919 } 920 921 if (pcdev->no_of_pse_pi) { 922 psec_id = psec_id_xlate(pcdev, &args); 923 if (psec_id < 0) { 924 psec = ERR_PTR(psec_id); 925 goto out; 926 } 927 } 928 929 /* pse_list_mutex also protects the pcdev's pse_control list */ 930 psec = pse_control_get_internal(pcdev, psec_id, phydev); 931 932 out: 933 mutex_unlock(&pse_list_mutex); 934 of_node_put(args.np); 935 936 return psec; 937 } 938 EXPORT_SYMBOL_GPL(of_pse_control_get); 939 940 /** 941 * pse_ethtool_get_status - get status of PSE control 942 * @psec: PSE control pointer 943 * @extack: extack for reporting useful error messages 944 * @status: struct to store PSE status 945 * 946 * Return: 0 on success and failure value on error 947 */ 948 int pse_ethtool_get_status(struct pse_control *psec, 949 struct netlink_ext_ack *extack, 950 struct ethtool_pse_control_status *status) 951 { 952 struct pse_admin_state admin_state = {0}; 953 struct pse_pw_status pw_status = {0}; 954 const struct pse_controller_ops *ops; 955 struct pse_controller_dev *pcdev; 956 int ret; 957 958 pcdev = psec->pcdev; 959 ops = pcdev->ops; 960 mutex_lock(&pcdev->lock); 961 ret = ops->pi_get_admin_state(pcdev, psec->id, &admin_state); 962 if (ret) 963 goto out; 964 status->podl_admin_state = admin_state.podl_admin_state; 965 status->c33_admin_state = admin_state.c33_admin_state; 966 967 ret = ops->pi_get_pw_status(pcdev, psec->id, &pw_status); 968 if (ret) 969 goto out; 970 status->podl_pw_status = pw_status.podl_pw_status; 971 status->c33_pw_status = pw_status.c33_pw_status; 972 973 if (ops->pi_get_ext_state) { 974 struct pse_ext_state_info ext_state_info = {0}; 975 976 ret = ops->pi_get_ext_state(pcdev, psec->id, 977 &ext_state_info); 978 if (ret) 979 goto out; 980 981 memcpy(&status->c33_ext_state_info, 982 &ext_state_info.c33_ext_state_info, 983 sizeof(status->c33_ext_state_info)); 984 } 985 986 if (ops->pi_get_pw_class) { 987 ret = ops->pi_get_pw_class(pcdev, psec->id); 988 if (ret < 0) 989 goto out; 990 991 status->c33_pw_class = ret; 992 } 993 994 if (ops->pi_get_actual_pw) { 995 ret = ops->pi_get_actual_pw(pcdev, psec->id); 996 if (ret < 0) 997 goto out; 998 999 status->c33_actual_pw = ret; 1000 } 1001 1002 if (ops->pi_get_pw_limit) { 1003 ret = ops->pi_get_pw_limit(pcdev, psec->id); 1004 if (ret < 0) 1005 goto out; 1006 1007 status->c33_avail_pw_limit = ret; 1008 } 1009 1010 if (ops->pi_get_pw_limit_ranges) { 1011 struct pse_pw_limit_ranges pw_limit_ranges = {0}; 1012 1013 ret = ops->pi_get_pw_limit_ranges(pcdev, psec->id, 1014 &pw_limit_ranges); 1015 if (ret < 0) 1016 goto out; 1017 1018 status->c33_pw_limit_ranges = 1019 pw_limit_ranges.c33_pw_limit_ranges; 1020 status->c33_pw_limit_nb_ranges = ret; 1021 } 1022 out: 1023 mutex_unlock(&psec->pcdev->lock); 1024 return ret; 1025 } 1026 EXPORT_SYMBOL_GPL(pse_ethtool_get_status); 1027 1028 static int pse_ethtool_c33_set_config(struct pse_control *psec, 1029 const struct pse_control_config *config) 1030 { 1031 int err = 0; 1032 1033 /* Look at admin_state_enabled status to not call regulator_enable 1034 * or regulator_disable twice creating a regulator counter mismatch 1035 */ 1036 switch (config->c33_admin_control) { 1037 case ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED: 1038 /* We could have mismatch between admin_state_enabled and 1039 * state reported by regulator_is_enabled. This can occur when 1040 * the PI is forcibly turn off by the controller. Call 1041 * regulator_disable on that case to fix the counters state. 1042 */ 1043 if (psec->pcdev->pi[psec->id].admin_state_enabled && 1044 !regulator_is_enabled(psec->ps)) { 1045 err = regulator_disable(psec->ps); 1046 if (err) 1047 break; 1048 } 1049 if (!psec->pcdev->pi[psec->id].admin_state_enabled) 1050 err = regulator_enable(psec->ps); 1051 break; 1052 case ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED: 1053 if (psec->pcdev->pi[psec->id].admin_state_enabled) 1054 err = regulator_disable(psec->ps); 1055 break; 1056 default: 1057 err = -EOPNOTSUPP; 1058 } 1059 1060 return err; 1061 } 1062 1063 static int pse_ethtool_podl_set_config(struct pse_control *psec, 1064 const struct pse_control_config *config) 1065 { 1066 int err = 0; 1067 1068 /* Look at admin_state_enabled status to not call regulator_enable 1069 * or regulator_disable twice creating a regulator counter mismatch 1070 */ 1071 switch (config->podl_admin_control) { 1072 case ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED: 1073 if (!psec->pcdev->pi[psec->id].admin_state_enabled) 1074 err = regulator_enable(psec->ps); 1075 break; 1076 case ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED: 1077 if (psec->pcdev->pi[psec->id].admin_state_enabled) 1078 err = regulator_disable(psec->ps); 1079 break; 1080 default: 1081 err = -EOPNOTSUPP; 1082 } 1083 1084 return err; 1085 } 1086 1087 /** 1088 * pse_ethtool_set_config - set PSE control configuration 1089 * @psec: PSE control pointer 1090 * @extack: extack for reporting useful error messages 1091 * @config: Configuration of the test to run 1092 * 1093 * Return: 0 on success and failure value on error 1094 */ 1095 int pse_ethtool_set_config(struct pse_control *psec, 1096 struct netlink_ext_ack *extack, 1097 const struct pse_control_config *config) 1098 { 1099 int err = 0; 1100 1101 if (pse_has_c33(psec) && config->c33_admin_control) { 1102 err = pse_ethtool_c33_set_config(psec, config); 1103 if (err) 1104 return err; 1105 } 1106 1107 if (pse_has_podl(psec) && config->podl_admin_control) 1108 err = pse_ethtool_podl_set_config(psec, config); 1109 1110 return err; 1111 } 1112 EXPORT_SYMBOL_GPL(pse_ethtool_set_config); 1113 1114 /** 1115 * pse_ethtool_set_pw_limit - set PSE control power limit 1116 * @psec: PSE control pointer 1117 * @extack: extack for reporting useful error messages 1118 * @pw_limit: power limit value in mW 1119 * 1120 * Return: 0 on success and failure value on error 1121 */ 1122 int pse_ethtool_set_pw_limit(struct pse_control *psec, 1123 struct netlink_ext_ack *extack, 1124 const unsigned int pw_limit) 1125 { 1126 int uV, uA, ret; 1127 s64 tmp_64; 1128 1129 if (pw_limit > MAX_PI_PW) 1130 return -ERANGE; 1131 1132 ret = regulator_get_voltage(psec->ps); 1133 if (!ret) { 1134 NL_SET_ERR_MSG(extack, 1135 "Can't calculate the current, PSE voltage read is 0"); 1136 return -ERANGE; 1137 } 1138 if (ret < 0) { 1139 NL_SET_ERR_MSG(extack, 1140 "Error reading PSE voltage"); 1141 return ret; 1142 } 1143 uV = ret; 1144 1145 tmp_64 = pw_limit; 1146 tmp_64 *= 1000000000ull; 1147 /* uA = mW * 1000000000 / uV */ 1148 uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); 1149 1150 return regulator_set_current_limit(psec->ps, 0, uA); 1151 } 1152 EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); 1153 1154 bool pse_has_podl(struct pse_control *psec) 1155 { 1156 return psec->pcdev->types & ETHTOOL_PSE_PODL; 1157 } 1158 EXPORT_SYMBOL_GPL(pse_has_podl); 1159 1160 bool pse_has_c33(struct pse_control *psec) 1161 { 1162 return psec->pcdev->types & ETHTOOL_PSE_C33; 1163 } 1164 EXPORT_SYMBOL_GPL(pse_has_c33); 1165