1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // Framework for Ethernet Power Sourcing Equipment 4 // 5 // Copyright (c) 2022 Pengutronix, Oleksij Rempel <kernel@pengutronix.de> 6 // 7 8 #include <linux/device.h> 9 #include <linux/ethtool.h> 10 #include <linux/ethtool_netlink.h> 11 #include <linux/of.h> 12 #include <linux/phy.h> 13 #include <linux/pse-pd/pse.h> 14 #include <linux/regulator/driver.h> 15 #include <linux/regulator/machine.h> 16 #include <linux/rtnetlink.h> 17 #include <net/net_trackers.h> 18 19 #define PSE_PW_D_LIMIT INT_MAX 20 21 static DEFINE_MUTEX(pse_list_mutex); 22 static LIST_HEAD(pse_controller_list); 23 static DEFINE_XARRAY_ALLOC(pse_pw_d_map); 24 static DEFINE_MUTEX(pse_pw_d_mutex); 25 26 /** 27 * struct pse_control - a PSE control 28 * @pcdev: a pointer to the PSE controller device 29 * this PSE control belongs to 30 * @ps: PSE PI supply of the PSE control 31 * @list: list entry for the pcdev's PSE controller list 32 * @id: ID of the PSE line in the PSE controller device 33 * @refcnt: Number of gets of this pse_control 34 * @attached_phydev: PHY device pointer attached by the PSE control 35 */ 36 struct pse_control { 37 struct pse_controller_dev *pcdev; 38 struct regulator *ps; 39 struct list_head list; 40 unsigned int id; 41 struct kref refcnt; 42 struct phy_device *attached_phydev; 43 }; 44 45 /** 46 * struct pse_power_domain - a PSE power domain 47 * @id: ID of the power domain 48 * @supply: Power supply the Power Domain 49 * @refcnt: Number of gets of this pse_power_domain 50 */ 51 struct pse_power_domain { 52 int id; 53 struct regulator *supply; 54 struct kref refcnt; 55 }; 56 57 static int of_load_single_pse_pi_pairset(struct device_node *node, 58 struct pse_pi *pi, 59 int pairset_num) 60 { 61 struct device_node *pairset_np; 62 const char *name; 63 int ret; 64 65 ret = of_property_read_string_index(node, "pairset-names", 66 pairset_num, &name); 67 if (ret) 68 return ret; 69 70 if (!strcmp(name, "alternative-a")) { 71 pi->pairset[pairset_num].pinout = ALTERNATIVE_A; 72 } else if (!strcmp(name, "alternative-b")) { 73 pi->pairset[pairset_num].pinout = ALTERNATIVE_B; 74 } else { 75 pr_err("pse: wrong pairset-names value %s (%pOF)\n", 76 name, node); 77 return -EINVAL; 78 } 79 80 pairset_np = of_parse_phandle(node, "pairsets", pairset_num); 81 if (!pairset_np) 82 return -ENODEV; 83 84 pi->pairset[pairset_num].np = pairset_np; 85 86 return 0; 87 } 88 89 /** 90 * of_load_pse_pi_pairsets - load PSE PI pairsets pinout and polarity 91 * @node: a pointer of the device node 92 * @pi: a pointer of the PSE PI to fill 93 * @npairsets: the number of pairsets (1 or 2) used by the PI 94 * 95 * Return: 0 on success and failure value on error 96 */ 97 static int of_load_pse_pi_pairsets(struct device_node *node, 98 struct pse_pi *pi, 99 int npairsets) 100 { 101 int i, ret; 102 103 ret = of_property_count_strings(node, "pairset-names"); 104 if (ret != npairsets) { 105 pr_err("pse: amount of pairsets and pairset-names is not equal %d != %d (%pOF)\n", 106 npairsets, ret, node); 107 return -EINVAL; 108 } 109 110 for (i = 0; i < npairsets; i++) { 111 ret = of_load_single_pse_pi_pairset(node, pi, i); 112 if (ret) 113 goto out; 114 } 115 116 if (npairsets == 2 && 117 pi->pairset[0].pinout == pi->pairset[1].pinout) { 118 pr_err("pse: two PI pairsets can not have identical pinout (%pOF)", 119 node); 120 ret = -EINVAL; 121 } 122 123 out: 124 /* If an error appears, release all the pairset device node kref */ 125 if (ret) { 126 of_node_put(pi->pairset[0].np); 127 pi->pairset[0].np = NULL; 128 of_node_put(pi->pairset[1].np); 129 pi->pairset[1].np = NULL; 130 } 131 132 return ret; 133 } 134 135 static void pse_release_pis(struct pse_controller_dev *pcdev) 136 { 137 int i; 138 139 for (i = 0; i < pcdev->nr_lines; i++) { 140 of_node_put(pcdev->pi[i].pairset[0].np); 141 of_node_put(pcdev->pi[i].pairset[1].np); 142 of_node_put(pcdev->pi[i].np); 143 } 144 kfree(pcdev->pi); 145 } 146 147 /** 148 * of_load_pse_pis - load all the PSE PIs 149 * @pcdev: a pointer to the PSE controller device 150 * 151 * Return: 0 on success and failure value on error 152 */ 153 static int of_load_pse_pis(struct pse_controller_dev *pcdev) 154 { 155 struct device_node *np = pcdev->dev->of_node; 156 struct device_node *node, *pis; 157 int ret; 158 159 if (!np) 160 return -ENODEV; 161 162 pcdev->pi = kcalloc(pcdev->nr_lines, sizeof(*pcdev->pi), GFP_KERNEL); 163 if (!pcdev->pi) 164 return -ENOMEM; 165 166 pis = of_get_child_by_name(np, "pse-pis"); 167 if (!pis) { 168 /* no description of PSE PIs */ 169 pcdev->no_of_pse_pi = true; 170 return 0; 171 } 172 173 for_each_child_of_node(pis, node) { 174 struct pse_pi pi = {0}; 175 u32 id; 176 177 if (!of_node_name_eq(node, "pse-pi")) 178 continue; 179 180 ret = of_property_read_u32(node, "reg", &id); 181 if (ret) { 182 dev_err(pcdev->dev, 183 "can't get reg property for node '%pOF'", 184 node); 185 goto out; 186 } 187 188 if (id >= pcdev->nr_lines) { 189 dev_err(pcdev->dev, 190 "reg value (%u) is out of range (%u) (%pOF)\n", 191 id, pcdev->nr_lines, node); 192 ret = -EINVAL; 193 goto out; 194 } 195 196 if (pcdev->pi[id].np) { 197 dev_err(pcdev->dev, 198 "other node with same reg value was already registered. %pOF : %pOF\n", 199 pcdev->pi[id].np, node); 200 ret = -EINVAL; 201 goto out; 202 } 203 204 ret = of_count_phandle_with_args(node, "pairsets", NULL); 205 /* npairsets is limited to value one or two */ 206 if (ret == 1 || ret == 2) { 207 ret = of_load_pse_pi_pairsets(node, &pi, ret); 208 if (ret) 209 goto out; 210 } else if (ret != ENOENT) { 211 dev_err(pcdev->dev, 212 "error: wrong number of pairsets. Should be 1 or 2, got %d (%pOF)\n", 213 ret, node); 214 ret = -EINVAL; 215 goto out; 216 } 217 218 of_node_get(node); 219 pi.np = node; 220 memcpy(&pcdev->pi[id], &pi, sizeof(pi)); 221 } 222 223 of_node_put(pis); 224 return 0; 225 226 out: 227 pse_release_pis(pcdev); 228 of_node_put(node); 229 of_node_put(pis); 230 return ret; 231 } 232 233 /** 234 * pse_control_find_net_by_id - Find net attached to the pse control id 235 * @pcdev: a pointer to the PSE 236 * @id: index of the PSE control 237 * 238 * Return: pse_control pointer or NULL. The device returned has had a 239 * reference added and the pointer is safe until the user calls 240 * pse_control_put() to indicate they have finished with it. 241 */ 242 static struct pse_control * 243 pse_control_find_by_id(struct pse_controller_dev *pcdev, int id) 244 { 245 struct pse_control *psec; 246 247 mutex_lock(&pse_list_mutex); 248 list_for_each_entry(psec, &pcdev->pse_control_head, list) { 249 if (psec->id == id) { 250 kref_get(&psec->refcnt); 251 mutex_unlock(&pse_list_mutex); 252 return psec; 253 } 254 } 255 mutex_unlock(&pse_list_mutex); 256 return NULL; 257 } 258 259 /** 260 * pse_control_get_netdev - Return netdev associated to a PSE control 261 * @psec: PSE control pointer 262 * 263 * Return: netdev pointer or NULL 264 */ 265 static struct net_device *pse_control_get_netdev(struct pse_control *psec) 266 { 267 ASSERT_RTNL(); 268 269 if (!psec || !psec->attached_phydev) 270 return NULL; 271 272 return psec->attached_phydev->attached_dev; 273 } 274 275 static int pse_pi_is_enabled(struct regulator_dev *rdev) 276 { 277 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 278 struct pse_admin_state admin_state = {0}; 279 const struct pse_controller_ops *ops; 280 int id, ret; 281 282 ops = pcdev->ops; 283 if (!ops->pi_get_admin_state) 284 return -EOPNOTSUPP; 285 286 id = rdev_get_id(rdev); 287 mutex_lock(&pcdev->lock); 288 ret = ops->pi_get_admin_state(pcdev, id, &admin_state); 289 if (ret) 290 goto out; 291 292 if (admin_state.podl_admin_state == ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED || 293 admin_state.c33_admin_state == ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED) 294 ret = 1; 295 296 out: 297 mutex_unlock(&pcdev->lock); 298 299 return ret; 300 } 301 302 static int pse_pi_enable(struct regulator_dev *rdev) 303 { 304 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 305 const struct pse_controller_ops *ops; 306 int id, ret; 307 308 ops = pcdev->ops; 309 if (!ops->pi_enable) 310 return -EOPNOTSUPP; 311 312 id = rdev_get_id(rdev); 313 mutex_lock(&pcdev->lock); 314 ret = ops->pi_enable(pcdev, id); 315 if (!ret) 316 pcdev->pi[id].admin_state_enabled = 1; 317 mutex_unlock(&pcdev->lock); 318 319 return ret; 320 } 321 322 static int pse_pi_disable(struct regulator_dev *rdev) 323 { 324 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 325 const struct pse_controller_ops *ops; 326 int id, ret; 327 328 ops = pcdev->ops; 329 if (!ops->pi_disable) 330 return -EOPNOTSUPP; 331 332 id = rdev_get_id(rdev); 333 mutex_lock(&pcdev->lock); 334 ret = ops->pi_disable(pcdev, id); 335 if (!ret) 336 pcdev->pi[id].admin_state_enabled = 0; 337 mutex_unlock(&pcdev->lock); 338 339 return ret; 340 } 341 342 static int _pse_pi_get_voltage(struct regulator_dev *rdev) 343 { 344 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 345 const struct pse_controller_ops *ops; 346 int id; 347 348 ops = pcdev->ops; 349 if (!ops->pi_get_voltage) 350 return -EOPNOTSUPP; 351 352 id = rdev_get_id(rdev); 353 return ops->pi_get_voltage(pcdev, id); 354 } 355 356 static int pse_pi_get_voltage(struct regulator_dev *rdev) 357 { 358 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 359 int ret; 360 361 mutex_lock(&pcdev->lock); 362 ret = _pse_pi_get_voltage(rdev); 363 mutex_unlock(&pcdev->lock); 364 365 return ret; 366 } 367 368 static int pse_pi_get_current_limit(struct regulator_dev *rdev) 369 { 370 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 371 const struct pse_controller_ops *ops; 372 int id, uV, mW, ret; 373 s64 tmp_64; 374 375 ops = pcdev->ops; 376 id = rdev_get_id(rdev); 377 if (!ops->pi_get_pw_limit || !ops->pi_get_voltage) 378 return -EOPNOTSUPP; 379 380 mutex_lock(&pcdev->lock); 381 ret = ops->pi_get_pw_limit(pcdev, id); 382 if (ret < 0) 383 goto out; 384 mW = ret; 385 386 ret = _pse_pi_get_voltage(rdev); 387 if (!ret) { 388 dev_err(pcdev->dev, "Voltage null\n"); 389 ret = -ERANGE; 390 goto out; 391 } 392 if (ret < 0) 393 goto out; 394 uV = ret; 395 396 tmp_64 = mW; 397 tmp_64 *= 1000000000ull; 398 /* uA = mW * 1000000000 / uV */ 399 ret = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); 400 401 out: 402 mutex_unlock(&pcdev->lock); 403 return ret; 404 } 405 406 static int pse_pi_set_current_limit(struct regulator_dev *rdev, int min_uA, 407 int max_uA) 408 { 409 struct pse_controller_dev *pcdev = rdev_get_drvdata(rdev); 410 const struct pse_controller_ops *ops; 411 int id, mW, ret; 412 s64 tmp_64; 413 414 ops = pcdev->ops; 415 if (!ops->pi_set_pw_limit || !ops->pi_get_voltage) 416 return -EOPNOTSUPP; 417 418 if (max_uA > MAX_PI_CURRENT) 419 return -ERANGE; 420 421 id = rdev_get_id(rdev); 422 mutex_lock(&pcdev->lock); 423 ret = _pse_pi_get_voltage(rdev); 424 if (!ret) { 425 dev_err(pcdev->dev, "Voltage null\n"); 426 ret = -ERANGE; 427 goto out; 428 } 429 if (ret < 0) 430 goto out; 431 432 tmp_64 = ret; 433 tmp_64 *= max_uA; 434 /* mW = uA * uV / 1000000000 */ 435 mW = DIV_ROUND_CLOSEST_ULL(tmp_64, 1000000000); 436 ret = ops->pi_set_pw_limit(pcdev, id, mW); 437 out: 438 mutex_unlock(&pcdev->lock); 439 440 return ret; 441 } 442 443 static const struct regulator_ops pse_pi_ops = { 444 .is_enabled = pse_pi_is_enabled, 445 .enable = pse_pi_enable, 446 .disable = pse_pi_disable, 447 .get_voltage = pse_pi_get_voltage, 448 .get_current_limit = pse_pi_get_current_limit, 449 .set_current_limit = pse_pi_set_current_limit, 450 }; 451 452 static int 453 devm_pse_pi_regulator_register(struct pse_controller_dev *pcdev, 454 char *name, int id) 455 { 456 struct regulator_init_data *rinit_data; 457 struct regulator_config rconfig = {0}; 458 struct regulator_desc *rdesc; 459 struct regulator_dev *rdev; 460 461 rinit_data = devm_kzalloc(pcdev->dev, sizeof(*rinit_data), 462 GFP_KERNEL); 463 if (!rinit_data) 464 return -ENOMEM; 465 466 rdesc = devm_kzalloc(pcdev->dev, sizeof(*rdesc), GFP_KERNEL); 467 if (!rdesc) 468 return -ENOMEM; 469 470 /* Regulator descriptor id have to be the same as its associated 471 * PSE PI id for the well functioning of the PSE controls. 472 */ 473 rdesc->id = id; 474 rdesc->name = name; 475 rdesc->type = REGULATOR_VOLTAGE; 476 rdesc->ops = &pse_pi_ops; 477 rdesc->owner = pcdev->owner; 478 479 rinit_data->constraints.valid_ops_mask = REGULATOR_CHANGE_STATUS; 480 481 if (pcdev->ops->pi_set_pw_limit) 482 rinit_data->constraints.valid_ops_mask |= 483 REGULATOR_CHANGE_CURRENT; 484 485 rinit_data->supply_regulator = "vpwr"; 486 487 rconfig.dev = pcdev->dev; 488 rconfig.driver_data = pcdev; 489 rconfig.init_data = rinit_data; 490 rconfig.of_node = pcdev->pi[id].np; 491 492 rdev = devm_regulator_register(pcdev->dev, rdesc, &rconfig); 493 if (IS_ERR(rdev)) { 494 dev_err_probe(pcdev->dev, PTR_ERR(rdev), 495 "Failed to register regulator\n"); 496 return PTR_ERR(rdev); 497 } 498 499 pcdev->pi[id].rdev = rdev; 500 501 return 0; 502 } 503 504 static void __pse_pw_d_release(struct kref *kref) 505 { 506 struct pse_power_domain *pw_d = container_of(kref, 507 struct pse_power_domain, 508 refcnt); 509 510 regulator_put(pw_d->supply); 511 xa_erase(&pse_pw_d_map, pw_d->id); 512 mutex_unlock(&pse_pw_d_mutex); 513 } 514 515 /** 516 * pse_flush_pw_ds - flush all PSE power domains of a PSE 517 * @pcdev: a pointer to the initialized PSE controller device 518 */ 519 static void pse_flush_pw_ds(struct pse_controller_dev *pcdev) 520 { 521 struct pse_power_domain *pw_d; 522 int i; 523 524 for (i = 0; i < pcdev->nr_lines; i++) { 525 if (!pcdev->pi[i].pw_d) 526 continue; 527 528 pw_d = xa_load(&pse_pw_d_map, pcdev->pi[i].pw_d->id); 529 if (!pw_d) 530 continue; 531 532 kref_put_mutex(&pw_d->refcnt, __pse_pw_d_release, 533 &pse_pw_d_mutex); 534 } 535 } 536 537 /** 538 * devm_pse_alloc_pw_d - allocate a new PSE power domain for a device 539 * @dev: device that is registering this PSE power domain 540 * 541 * Return: Pointer to the newly allocated PSE power domain or error pointers 542 */ 543 static struct pse_power_domain *devm_pse_alloc_pw_d(struct device *dev) 544 { 545 struct pse_power_domain *pw_d; 546 int index, ret; 547 548 pw_d = devm_kzalloc(dev, sizeof(*pw_d), GFP_KERNEL); 549 if (!pw_d) 550 return ERR_PTR(-ENOMEM); 551 552 ret = xa_alloc(&pse_pw_d_map, &index, pw_d, XA_LIMIT(1, PSE_PW_D_LIMIT), 553 GFP_KERNEL); 554 if (ret) 555 return ERR_PTR(ret); 556 557 kref_init(&pw_d->refcnt); 558 pw_d->id = index; 559 return pw_d; 560 } 561 562 /** 563 * pse_register_pw_ds - register the PSE power domains for a PSE 564 * @pcdev: a pointer to the PSE controller device 565 * 566 * Return: 0 on success and failure value on error 567 */ 568 static int pse_register_pw_ds(struct pse_controller_dev *pcdev) 569 { 570 int i, ret = 0; 571 572 mutex_lock(&pse_pw_d_mutex); 573 for (i = 0; i < pcdev->nr_lines; i++) { 574 struct regulator_dev *rdev = pcdev->pi[i].rdev; 575 struct pse_power_domain *pw_d; 576 struct regulator *supply; 577 bool present = false; 578 unsigned long index; 579 580 /* No regulator or regulator parent supply registered. 581 * We need a regulator parent to register a PSE power domain 582 */ 583 if (!rdev || !rdev->supply) 584 continue; 585 586 xa_for_each(&pse_pw_d_map, index, pw_d) { 587 /* Power supply already registered as a PSE power 588 * domain. 589 */ 590 if (regulator_is_equal(pw_d->supply, rdev->supply)) { 591 present = true; 592 pcdev->pi[i].pw_d = pw_d; 593 break; 594 } 595 } 596 if (present) { 597 kref_get(&pw_d->refcnt); 598 continue; 599 } 600 601 pw_d = devm_pse_alloc_pw_d(pcdev->dev); 602 if (IS_ERR(pw_d)) { 603 ret = PTR_ERR(pw_d); 604 goto out; 605 } 606 607 supply = regulator_get(&rdev->dev, rdev->supply_name); 608 if (IS_ERR(supply)) { 609 xa_erase(&pse_pw_d_map, pw_d->id); 610 ret = PTR_ERR(supply); 611 goto out; 612 } 613 614 pw_d->supply = supply; 615 pcdev->pi[i].pw_d = pw_d; 616 } 617 618 out: 619 mutex_unlock(&pse_pw_d_mutex); 620 return ret; 621 } 622 623 /** 624 * pse_controller_register - register a PSE controller device 625 * @pcdev: a pointer to the initialized PSE controller device 626 * 627 * Return: 0 on success and failure value on error 628 */ 629 int pse_controller_register(struct pse_controller_dev *pcdev) 630 { 631 size_t reg_name_len; 632 int ret, i; 633 634 mutex_init(&pcdev->lock); 635 INIT_LIST_HEAD(&pcdev->pse_control_head); 636 637 if (!pcdev->nr_lines) 638 pcdev->nr_lines = 1; 639 640 if (!pcdev->ops->pi_get_admin_state || 641 !pcdev->ops->pi_get_pw_status) { 642 dev_err(pcdev->dev, 643 "Mandatory status report callbacks are missing"); 644 return -EINVAL; 645 } 646 647 ret = of_load_pse_pis(pcdev); 648 if (ret) 649 return ret; 650 651 if (pcdev->ops->setup_pi_matrix) { 652 ret = pcdev->ops->setup_pi_matrix(pcdev); 653 if (ret) 654 return ret; 655 } 656 657 /* Each regulator name len is pcdev dev name + 7 char + 658 * int max digit number (10) + 1 659 */ 660 reg_name_len = strlen(dev_name(pcdev->dev)) + 18; 661 662 /* Register PI regulators */ 663 for (i = 0; i < pcdev->nr_lines; i++) { 664 char *reg_name; 665 666 /* Do not register regulator for PIs not described */ 667 if (!pcdev->no_of_pse_pi && !pcdev->pi[i].np) 668 continue; 669 670 reg_name = devm_kzalloc(pcdev->dev, reg_name_len, GFP_KERNEL); 671 if (!reg_name) 672 return -ENOMEM; 673 674 snprintf(reg_name, reg_name_len, "pse-%s_pi%d", 675 dev_name(pcdev->dev), i); 676 677 ret = devm_pse_pi_regulator_register(pcdev, reg_name, i); 678 if (ret) 679 return ret; 680 } 681 682 ret = pse_register_pw_ds(pcdev); 683 if (ret) 684 return ret; 685 686 mutex_lock(&pse_list_mutex); 687 list_add(&pcdev->list, &pse_controller_list); 688 mutex_unlock(&pse_list_mutex); 689 690 return 0; 691 } 692 EXPORT_SYMBOL_GPL(pse_controller_register); 693 694 /** 695 * pse_controller_unregister - unregister a PSE controller device 696 * @pcdev: a pointer to the PSE controller device 697 */ 698 void pse_controller_unregister(struct pse_controller_dev *pcdev) 699 { 700 pse_flush_pw_ds(pcdev); 701 pse_release_pis(pcdev); 702 mutex_lock(&pse_list_mutex); 703 list_del(&pcdev->list); 704 mutex_unlock(&pse_list_mutex); 705 } 706 EXPORT_SYMBOL_GPL(pse_controller_unregister); 707 708 static void devm_pse_controller_release(struct device *dev, void *res) 709 { 710 pse_controller_unregister(*(struct pse_controller_dev **)res); 711 } 712 713 /** 714 * devm_pse_controller_register - resource managed pse_controller_register() 715 * @dev: device that is registering this PSE controller 716 * @pcdev: a pointer to the initialized PSE controller device 717 * 718 * Managed pse_controller_register(). For PSE controllers registered by 719 * this function, pse_controller_unregister() is automatically called on 720 * driver detach. See pse_controller_register() for more information. 721 * 722 * Return: 0 on success and failure value on error 723 */ 724 int devm_pse_controller_register(struct device *dev, 725 struct pse_controller_dev *pcdev) 726 { 727 struct pse_controller_dev **pcdevp; 728 int ret; 729 730 pcdevp = devres_alloc(devm_pse_controller_release, sizeof(*pcdevp), 731 GFP_KERNEL); 732 if (!pcdevp) 733 return -ENOMEM; 734 735 ret = pse_controller_register(pcdev); 736 if (ret) { 737 devres_free(pcdevp); 738 return ret; 739 } 740 741 *pcdevp = pcdev; 742 devres_add(dev, pcdevp); 743 744 return 0; 745 } 746 EXPORT_SYMBOL_GPL(devm_pse_controller_register); 747 748 struct pse_irq { 749 struct pse_controller_dev *pcdev; 750 struct pse_irq_desc desc; 751 unsigned long *notifs; 752 }; 753 754 /** 755 * pse_to_regulator_notifs - Convert PSE notifications to Regulator 756 * notifications 757 * @notifs: PSE notifications 758 * 759 * Return: Regulator notifications 760 */ 761 static unsigned long pse_to_regulator_notifs(unsigned long notifs) 762 { 763 unsigned long rnotifs = 0; 764 765 if (notifs & ETHTOOL_PSE_EVENT_OVER_CURRENT) 766 rnotifs |= REGULATOR_EVENT_OVER_CURRENT; 767 if (notifs & ETHTOOL_PSE_EVENT_OVER_TEMP) 768 rnotifs |= REGULATOR_EVENT_OVER_TEMP; 769 770 return rnotifs; 771 } 772 773 /** 774 * pse_isr - IRQ handler for PSE 775 * @irq: irq number 776 * @data: pointer to user interrupt structure 777 * 778 * Return: irqreturn_t - status of IRQ 779 */ 780 static irqreturn_t pse_isr(int irq, void *data) 781 { 782 struct pse_controller_dev *pcdev; 783 unsigned long notifs_mask = 0; 784 struct pse_irq_desc *desc; 785 struct pse_irq *h = data; 786 int ret, i; 787 788 desc = &h->desc; 789 pcdev = h->pcdev; 790 791 /* Clear notifs mask */ 792 memset(h->notifs, 0, pcdev->nr_lines * sizeof(*h->notifs)); 793 mutex_lock(&pcdev->lock); 794 ret = desc->map_event(irq, pcdev, h->notifs, ¬ifs_mask); 795 mutex_unlock(&pcdev->lock); 796 if (ret || !notifs_mask) 797 return IRQ_NONE; 798 799 for_each_set_bit(i, ¬ifs_mask, pcdev->nr_lines) { 800 unsigned long notifs, rnotifs; 801 struct net_device *netdev; 802 struct pse_control *psec; 803 804 /* Do nothing PI not described */ 805 if (!pcdev->pi[i].rdev) 806 continue; 807 808 notifs = h->notifs[i]; 809 dev_dbg(h->pcdev->dev, 810 "Sending PSE notification EVT 0x%lx\n", notifs); 811 812 psec = pse_control_find_by_id(pcdev, i); 813 rtnl_lock(); 814 netdev = pse_control_get_netdev(psec); 815 if (netdev) 816 ethnl_pse_send_ntf(netdev, notifs); 817 rtnl_unlock(); 818 pse_control_put(psec); 819 820 rnotifs = pse_to_regulator_notifs(notifs); 821 regulator_notifier_call_chain(pcdev->pi[i].rdev, rnotifs, 822 NULL); 823 } 824 825 return IRQ_HANDLED; 826 } 827 828 /** 829 * devm_pse_irq_helper - Register IRQ based PSE event notifier 830 * @pcdev: a pointer to the PSE 831 * @irq: the irq value to be passed to request_irq 832 * @irq_flags: the flags to be passed to request_irq 833 * @d: PSE interrupt description 834 * 835 * Return: 0 on success and errno on failure 836 */ 837 int devm_pse_irq_helper(struct pse_controller_dev *pcdev, int irq, 838 int irq_flags, const struct pse_irq_desc *d) 839 { 840 struct device *dev = pcdev->dev; 841 size_t irq_name_len; 842 struct pse_irq *h; 843 char *irq_name; 844 int ret; 845 846 if (!d || !d->map_event || !d->name) 847 return -EINVAL; 848 849 h = devm_kzalloc(dev, sizeof(*h), GFP_KERNEL); 850 if (!h) 851 return -ENOMEM; 852 853 h->pcdev = pcdev; 854 h->desc = *d; 855 856 /* IRQ name len is pcdev dev name + 5 char + irq desc name + 1 */ 857 irq_name_len = strlen(dev_name(pcdev->dev)) + 5 + strlen(d->name) + 1; 858 irq_name = devm_kzalloc(dev, irq_name_len, GFP_KERNEL); 859 if (!irq_name) 860 return -ENOMEM; 861 862 snprintf(irq_name, irq_name_len, "pse-%s:%s", dev_name(pcdev->dev), 863 d->name); 864 865 h->notifs = devm_kcalloc(dev, pcdev->nr_lines, 866 sizeof(*h->notifs), GFP_KERNEL); 867 if (!h->notifs) 868 return -ENOMEM; 869 870 ret = devm_request_threaded_irq(dev, irq, NULL, pse_isr, 871 IRQF_ONESHOT | irq_flags, 872 irq_name, h); 873 if (ret) 874 dev_err(pcdev->dev, "Failed to request IRQ %d\n", irq); 875 876 pcdev->irq = irq; 877 return ret; 878 } 879 EXPORT_SYMBOL_GPL(devm_pse_irq_helper); 880 881 /* PSE control section */ 882 883 static void __pse_control_release(struct kref *kref) 884 { 885 struct pse_control *psec = container_of(kref, struct pse_control, 886 refcnt); 887 888 lockdep_assert_held(&pse_list_mutex); 889 890 if (psec->pcdev->pi[psec->id].admin_state_enabled) 891 regulator_disable(psec->ps); 892 devm_regulator_put(psec->ps); 893 894 module_put(psec->pcdev->owner); 895 896 list_del(&psec->list); 897 kfree(psec); 898 } 899 900 static void __pse_control_put_internal(struct pse_control *psec) 901 { 902 lockdep_assert_held(&pse_list_mutex); 903 904 kref_put(&psec->refcnt, __pse_control_release); 905 } 906 907 /** 908 * pse_control_put - free the PSE control 909 * @psec: PSE control pointer 910 */ 911 void pse_control_put(struct pse_control *psec) 912 { 913 if (IS_ERR_OR_NULL(psec)) 914 return; 915 916 mutex_lock(&pse_list_mutex); 917 __pse_control_put_internal(psec); 918 mutex_unlock(&pse_list_mutex); 919 } 920 EXPORT_SYMBOL_GPL(pse_control_put); 921 922 static struct pse_control * 923 pse_control_get_internal(struct pse_controller_dev *pcdev, unsigned int index, 924 struct phy_device *phydev) 925 { 926 struct pse_control *psec; 927 int ret; 928 929 lockdep_assert_held(&pse_list_mutex); 930 931 list_for_each_entry(psec, &pcdev->pse_control_head, list) { 932 if (psec->id == index) { 933 kref_get(&psec->refcnt); 934 return psec; 935 } 936 } 937 938 psec = kzalloc(sizeof(*psec), GFP_KERNEL); 939 if (!psec) 940 return ERR_PTR(-ENOMEM); 941 942 if (!try_module_get(pcdev->owner)) { 943 ret = -ENODEV; 944 goto free_psec; 945 } 946 947 psec->ps = devm_regulator_get_exclusive(pcdev->dev, 948 rdev_get_name(pcdev->pi[index].rdev)); 949 if (IS_ERR(psec->ps)) { 950 ret = PTR_ERR(psec->ps); 951 goto put_module; 952 } 953 954 ret = regulator_is_enabled(psec->ps); 955 if (ret < 0) 956 goto regulator_put; 957 958 pcdev->pi[index].admin_state_enabled = ret; 959 960 psec->pcdev = pcdev; 961 list_add(&psec->list, &pcdev->pse_control_head); 962 psec->id = index; 963 psec->attached_phydev = phydev; 964 kref_init(&psec->refcnt); 965 966 return psec; 967 968 regulator_put: 969 devm_regulator_put(psec->ps); 970 put_module: 971 module_put(pcdev->owner); 972 free_psec: 973 kfree(psec); 974 975 return ERR_PTR(ret); 976 } 977 978 /** 979 * of_pse_match_pi - Find the PSE PI id matching the device node phandle 980 * @pcdev: a pointer to the PSE controller device 981 * @np: a pointer to the device node 982 * 983 * Return: id of the PSE PI, -EINVAL if not found 984 */ 985 static int of_pse_match_pi(struct pse_controller_dev *pcdev, 986 struct device_node *np) 987 { 988 int i; 989 990 for (i = 0; i < pcdev->nr_lines; i++) { 991 if (pcdev->pi[i].np == np) 992 return i; 993 } 994 995 return -EINVAL; 996 } 997 998 /** 999 * psec_id_xlate - translate pse_spec to the PSE line number according 1000 * to the number of pse-cells in case of no pse_pi node 1001 * @pcdev: a pointer to the PSE controller device 1002 * @pse_spec: PSE line specifier as found in the device tree 1003 * 1004 * Return: 0 if #pse-cells = <0>. Return PSE line number otherwise. 1005 */ 1006 static int psec_id_xlate(struct pse_controller_dev *pcdev, 1007 const struct of_phandle_args *pse_spec) 1008 { 1009 if (!pcdev->of_pse_n_cells) 1010 return 0; 1011 1012 if (pcdev->of_pse_n_cells > 1 || 1013 pse_spec->args[0] >= pcdev->nr_lines) 1014 return -EINVAL; 1015 1016 return pse_spec->args[0]; 1017 } 1018 1019 struct pse_control *of_pse_control_get(struct device_node *node, 1020 struct phy_device *phydev) 1021 { 1022 struct pse_controller_dev *r, *pcdev; 1023 struct of_phandle_args args; 1024 struct pse_control *psec; 1025 int psec_id; 1026 int ret; 1027 1028 if (!node) 1029 return ERR_PTR(-EINVAL); 1030 1031 ret = of_parse_phandle_with_args(node, "pses", "#pse-cells", 0, &args); 1032 if (ret) 1033 return ERR_PTR(ret); 1034 1035 mutex_lock(&pse_list_mutex); 1036 pcdev = NULL; 1037 list_for_each_entry(r, &pse_controller_list, list) { 1038 if (!r->no_of_pse_pi) { 1039 ret = of_pse_match_pi(r, args.np); 1040 if (ret >= 0) { 1041 pcdev = r; 1042 psec_id = ret; 1043 break; 1044 } 1045 } else if (args.np == r->dev->of_node) { 1046 pcdev = r; 1047 break; 1048 } 1049 } 1050 1051 if (!pcdev) { 1052 psec = ERR_PTR(-EPROBE_DEFER); 1053 goto out; 1054 } 1055 1056 if (WARN_ON(args.args_count != pcdev->of_pse_n_cells)) { 1057 psec = ERR_PTR(-EINVAL); 1058 goto out; 1059 } 1060 1061 if (pcdev->no_of_pse_pi) { 1062 psec_id = psec_id_xlate(pcdev, &args); 1063 if (psec_id < 0) { 1064 psec = ERR_PTR(psec_id); 1065 goto out; 1066 } 1067 } 1068 1069 /* pse_list_mutex also protects the pcdev's pse_control list */ 1070 psec = pse_control_get_internal(pcdev, psec_id, phydev); 1071 1072 out: 1073 mutex_unlock(&pse_list_mutex); 1074 of_node_put(args.np); 1075 1076 return psec; 1077 } 1078 EXPORT_SYMBOL_GPL(of_pse_control_get); 1079 1080 /** 1081 * pse_ethtool_get_status - get status of PSE control 1082 * @psec: PSE control pointer 1083 * @extack: extack for reporting useful error messages 1084 * @status: struct to store PSE status 1085 * 1086 * Return: 0 on success and failure value on error 1087 */ 1088 int pse_ethtool_get_status(struct pse_control *psec, 1089 struct netlink_ext_ack *extack, 1090 struct ethtool_pse_control_status *status) 1091 { 1092 struct pse_admin_state admin_state = {0}; 1093 struct pse_pw_status pw_status = {0}; 1094 const struct pse_controller_ops *ops; 1095 struct pse_controller_dev *pcdev; 1096 int ret; 1097 1098 pcdev = psec->pcdev; 1099 ops = pcdev->ops; 1100 mutex_lock(&pcdev->lock); 1101 ret = ops->pi_get_admin_state(pcdev, psec->id, &admin_state); 1102 if (ret) 1103 goto out; 1104 status->podl_admin_state = admin_state.podl_admin_state; 1105 status->c33_admin_state = admin_state.c33_admin_state; 1106 1107 ret = ops->pi_get_pw_status(pcdev, psec->id, &pw_status); 1108 if (ret) 1109 goto out; 1110 status->podl_pw_status = pw_status.podl_pw_status; 1111 status->c33_pw_status = pw_status.c33_pw_status; 1112 1113 if (ops->pi_get_ext_state) { 1114 struct pse_ext_state_info ext_state_info = {0}; 1115 1116 ret = ops->pi_get_ext_state(pcdev, psec->id, 1117 &ext_state_info); 1118 if (ret) 1119 goto out; 1120 1121 memcpy(&status->c33_ext_state_info, 1122 &ext_state_info.c33_ext_state_info, 1123 sizeof(status->c33_ext_state_info)); 1124 } 1125 1126 if (ops->pi_get_pw_class) { 1127 ret = ops->pi_get_pw_class(pcdev, psec->id); 1128 if (ret < 0) 1129 goto out; 1130 1131 status->c33_pw_class = ret; 1132 } 1133 1134 if (ops->pi_get_actual_pw) { 1135 ret = ops->pi_get_actual_pw(pcdev, psec->id); 1136 if (ret < 0) 1137 goto out; 1138 1139 status->c33_actual_pw = ret; 1140 } 1141 1142 if (ops->pi_get_pw_limit) { 1143 ret = ops->pi_get_pw_limit(pcdev, psec->id); 1144 if (ret < 0) 1145 goto out; 1146 1147 status->c33_avail_pw_limit = ret; 1148 } 1149 1150 if (ops->pi_get_pw_limit_ranges) { 1151 struct pse_pw_limit_ranges pw_limit_ranges = {0}; 1152 1153 ret = ops->pi_get_pw_limit_ranges(pcdev, psec->id, 1154 &pw_limit_ranges); 1155 if (ret < 0) 1156 goto out; 1157 1158 status->c33_pw_limit_ranges = 1159 pw_limit_ranges.c33_pw_limit_ranges; 1160 status->c33_pw_limit_nb_ranges = ret; 1161 } 1162 out: 1163 mutex_unlock(&psec->pcdev->lock); 1164 return ret; 1165 } 1166 EXPORT_SYMBOL_GPL(pse_ethtool_get_status); 1167 1168 static int pse_ethtool_c33_set_config(struct pse_control *psec, 1169 const struct pse_control_config *config) 1170 { 1171 int err = 0; 1172 1173 /* Look at admin_state_enabled status to not call regulator_enable 1174 * or regulator_disable twice creating a regulator counter mismatch 1175 */ 1176 switch (config->c33_admin_control) { 1177 case ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED: 1178 /* We could have mismatch between admin_state_enabled and 1179 * state reported by regulator_is_enabled. This can occur when 1180 * the PI is forcibly turn off by the controller. Call 1181 * regulator_disable on that case to fix the counters state. 1182 */ 1183 if (psec->pcdev->pi[psec->id].admin_state_enabled && 1184 !regulator_is_enabled(psec->ps)) { 1185 err = regulator_disable(psec->ps); 1186 if (err) 1187 break; 1188 } 1189 if (!psec->pcdev->pi[psec->id].admin_state_enabled) 1190 err = regulator_enable(psec->ps); 1191 break; 1192 case ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED: 1193 if (psec->pcdev->pi[psec->id].admin_state_enabled) 1194 err = regulator_disable(psec->ps); 1195 break; 1196 default: 1197 err = -EOPNOTSUPP; 1198 } 1199 1200 return err; 1201 } 1202 1203 static int pse_ethtool_podl_set_config(struct pse_control *psec, 1204 const struct pse_control_config *config) 1205 { 1206 int err = 0; 1207 1208 /* Look at admin_state_enabled status to not call regulator_enable 1209 * or regulator_disable twice creating a regulator counter mismatch 1210 */ 1211 switch (config->podl_admin_control) { 1212 case ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED: 1213 if (!psec->pcdev->pi[psec->id].admin_state_enabled) 1214 err = regulator_enable(psec->ps); 1215 break; 1216 case ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED: 1217 if (psec->pcdev->pi[psec->id].admin_state_enabled) 1218 err = regulator_disable(psec->ps); 1219 break; 1220 default: 1221 err = -EOPNOTSUPP; 1222 } 1223 1224 return err; 1225 } 1226 1227 /** 1228 * pse_ethtool_set_config - set PSE control configuration 1229 * @psec: PSE control pointer 1230 * @extack: extack for reporting useful error messages 1231 * @config: Configuration of the test to run 1232 * 1233 * Return: 0 on success and failure value on error 1234 */ 1235 int pse_ethtool_set_config(struct pse_control *psec, 1236 struct netlink_ext_ack *extack, 1237 const struct pse_control_config *config) 1238 { 1239 int err = 0; 1240 1241 if (pse_has_c33(psec) && config->c33_admin_control) { 1242 err = pse_ethtool_c33_set_config(psec, config); 1243 if (err) 1244 return err; 1245 } 1246 1247 if (pse_has_podl(psec) && config->podl_admin_control) 1248 err = pse_ethtool_podl_set_config(psec, config); 1249 1250 return err; 1251 } 1252 EXPORT_SYMBOL_GPL(pse_ethtool_set_config); 1253 1254 /** 1255 * pse_ethtool_set_pw_limit - set PSE control power limit 1256 * @psec: PSE control pointer 1257 * @extack: extack for reporting useful error messages 1258 * @pw_limit: power limit value in mW 1259 * 1260 * Return: 0 on success and failure value on error 1261 */ 1262 int pse_ethtool_set_pw_limit(struct pse_control *psec, 1263 struct netlink_ext_ack *extack, 1264 const unsigned int pw_limit) 1265 { 1266 int uV, uA, ret; 1267 s64 tmp_64; 1268 1269 if (pw_limit > MAX_PI_PW) 1270 return -ERANGE; 1271 1272 ret = regulator_get_voltage(psec->ps); 1273 if (!ret) { 1274 NL_SET_ERR_MSG(extack, 1275 "Can't calculate the current, PSE voltage read is 0"); 1276 return -ERANGE; 1277 } 1278 if (ret < 0) { 1279 NL_SET_ERR_MSG(extack, 1280 "Error reading PSE voltage"); 1281 return ret; 1282 } 1283 uV = ret; 1284 1285 tmp_64 = pw_limit; 1286 tmp_64 *= 1000000000ull; 1287 /* uA = mW * 1000000000 / uV */ 1288 uA = DIV_ROUND_CLOSEST_ULL(tmp_64, uV); 1289 1290 return regulator_set_current_limit(psec->ps, 0, uA); 1291 } 1292 EXPORT_SYMBOL_GPL(pse_ethtool_set_pw_limit); 1293 1294 bool pse_has_podl(struct pse_control *psec) 1295 { 1296 return psec->pcdev->types & ETHTOOL_PSE_PODL; 1297 } 1298 EXPORT_SYMBOL_GPL(pse_has_podl); 1299 1300 bool pse_has_c33(struct pse_control *psec) 1301 { 1302 return psec->pcdev->types & ETHTOOL_PSE_C33; 1303 } 1304 EXPORT_SYMBOL_GPL(pse_has_c33); 1305