1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Driver for the Microchip PD692X0 PoE PSE Controller driver (I2C bus) 4 * 5 * Copyright (c) 2023 Bootlin, Kory Maincent <kory.maincent@bootlin.com> 6 */ 7 8 #include <linux/delay.h> 9 #include <linux/firmware.h> 10 #include <linux/i2c.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/platform_device.h> 14 #include <linux/pse-pd/pse.h> 15 16 #define PD692X0_PSE_NAME "pd692x0_pse" 17 18 #define PD692X0_MAX_PIS 48 19 #define PD692X0_MAX_MANAGERS 12 20 #define PD692X0_MAX_MANAGER_PORTS 8 21 #define PD692X0_MAX_HW_PORTS (PD692X0_MAX_MANAGERS * PD692X0_MAX_MANAGER_PORTS) 22 23 #define PD69200_BT_PROD_VER 24 24 #define PD69210_BT_PROD_VER 26 25 #define PD69220_BT_PROD_VER 29 26 27 #define PD692X0_FW_MAJ_VER 3 28 #define PD692X0_FW_MIN_VER 5 29 #define PD692X0_FW_PATCH_VER 5 30 31 enum pd692x0_fw_state { 32 PD692X0_FW_UNKNOWN, 33 PD692X0_FW_OK, 34 PD692X0_FW_BROKEN, 35 PD692X0_FW_NEED_UPDATE, 36 PD692X0_FW_PREPARE, 37 PD692X0_FW_WRITE, 38 PD692X0_FW_COMPLETE, 39 }; 40 41 struct pd692x0_msg { 42 u8 key; 43 u8 echo; 44 u8 sub[3]; 45 u8 data[8]; 46 __be16 chksum; 47 } __packed; 48 49 struct pd692x0_msg_ver { 50 u8 prod; 51 u8 maj_sw_ver; 52 u8 min_sw_ver; 53 u8 pa_sw_ver; 54 u8 param; 55 u8 build; 56 }; 57 58 enum { 59 PD692X0_KEY_CMD, 60 PD692X0_KEY_PRG, 61 PD692X0_KEY_REQ, 62 PD692X0_KEY_TLM, 63 PD692X0_KEY_TEST, 64 PD692X0_KEY_REPORT = 0x52 65 }; 66 67 enum { 68 PD692X0_MSG_RESET, 69 PD692X0_MSG_GET_SYS_STATUS, 70 PD692X0_MSG_GET_SW_VER, 71 PD692X0_MSG_SET_TMP_PORT_MATRIX, 72 PD692X0_MSG_PRG_PORT_MATRIX, 73 PD692X0_MSG_SET_PORT_PARAM, 74 PD692X0_MSG_GET_PORT_STATUS, 75 PD692X0_MSG_DOWNLOAD_CMD, 76 77 /* add new message above here */ 78 PD692X0_MSG_CNT 79 }; 80 81 struct pd692x0_priv { 82 struct i2c_client *client; 83 struct pse_controller_dev pcdev; 84 struct device_node *np; 85 86 enum pd692x0_fw_state fw_state; 87 struct fw_upload *fwl; 88 bool cancel_request; 89 90 u8 msg_id; 91 bool last_cmd_key; 92 unsigned long last_cmd_key_time; 93 94 enum ethtool_c33_pse_admin_state admin_state[PD692X0_MAX_PIS]; 95 }; 96 97 /* Template list of communication messages. The non-null bytes defined here 98 * constitute the fixed portion of the messages. The remaining bytes will 99 * be configured later within the functions. Refer to the "PD692x0 BT Serial 100 * Communication Protocol User Guide" for comprehensive details on messages 101 * content. 102 */ 103 static const struct pd692x0_msg pd692x0_msg_template_list[PD692X0_MSG_CNT] = { 104 [PD692X0_MSG_RESET] = { 105 .key = PD692X0_KEY_CMD, 106 .sub = {0x07, 0x55, 0x00}, 107 .data = {0x55, 0x00, 0x55, 0x4e, 108 0x4e, 0x4e, 0x4e, 0x4e}, 109 }, 110 [PD692X0_MSG_GET_SYS_STATUS] = { 111 .key = PD692X0_KEY_REQ, 112 .sub = {0x07, 0xd0, 0x4e}, 113 .data = {0x4e, 0x4e, 0x4e, 0x4e, 114 0x4e, 0x4e, 0x4e, 0x4e}, 115 }, 116 [PD692X0_MSG_GET_SW_VER] = { 117 .key = PD692X0_KEY_REQ, 118 .sub = {0x07, 0x1e, 0x21}, 119 .data = {0x4e, 0x4e, 0x4e, 0x4e, 120 0x4e, 0x4e, 0x4e, 0x4e}, 121 }, 122 [PD692X0_MSG_SET_TMP_PORT_MATRIX] = { 123 .key = PD692X0_KEY_CMD, 124 .sub = {0x05, 0x43}, 125 .data = { 0, 0x4e, 0x4e, 0x4e, 126 0x4e, 0x4e, 0x4e, 0x4e}, 127 }, 128 [PD692X0_MSG_PRG_PORT_MATRIX] = { 129 .key = PD692X0_KEY_CMD, 130 .sub = {0x07, 0x43, 0x4e}, 131 .data = {0x4e, 0x4e, 0x4e, 0x4e, 132 0x4e, 0x4e, 0x4e, 0x4e}, 133 }, 134 [PD692X0_MSG_SET_PORT_PARAM] = { 135 .key = PD692X0_KEY_CMD, 136 .sub = {0x05, 0xc0}, 137 .data = { 0, 0xff, 0xff, 0xff, 138 0x4e, 0x4e, 0x4e, 0x4e}, 139 }, 140 [PD692X0_MSG_GET_PORT_STATUS] = { 141 .key = PD692X0_KEY_REQ, 142 .sub = {0x05, 0xc1}, 143 .data = {0x4e, 0x4e, 0x4e, 0x4e, 144 0x4e, 0x4e, 0x4e, 0x4e}, 145 }, 146 [PD692X0_MSG_DOWNLOAD_CMD] = { 147 .key = PD692X0_KEY_PRG, 148 .sub = {0xff, 0x99, 0x15}, 149 .data = {0x16, 0x16, 0x99, 0x4e, 150 0x4e, 0x4e, 0x4e, 0x4e}, 151 }, 152 }; 153 154 static u8 pd692x0_build_msg(struct pd692x0_msg *msg, u8 echo) 155 { 156 u8 *data = (u8 *)msg; 157 u16 chksum = 0; 158 int i; 159 160 msg->echo = echo++; 161 if (echo == 0xff) 162 echo = 0; 163 164 for (i = 0; i < sizeof(*msg) - sizeof(msg->chksum); i++) 165 chksum += data[i]; 166 167 msg->chksum = cpu_to_be16(chksum); 168 169 return echo; 170 } 171 172 static int pd692x0_send_msg(struct pd692x0_priv *priv, struct pd692x0_msg *msg) 173 { 174 const struct i2c_client *client = priv->client; 175 int ret; 176 177 if (msg->key == PD692X0_KEY_CMD && priv->last_cmd_key) { 178 int cmd_msleep; 179 180 cmd_msleep = 30 - jiffies_to_msecs(jiffies - priv->last_cmd_key_time); 181 if (cmd_msleep > 0) 182 msleep(cmd_msleep); 183 } 184 185 /* Add echo and checksum bytes to the message */ 186 priv->msg_id = pd692x0_build_msg(msg, priv->msg_id); 187 188 ret = i2c_master_send(client, (u8 *)msg, sizeof(*msg)); 189 if (ret != sizeof(*msg)) 190 return -EIO; 191 192 return 0; 193 } 194 195 static int pd692x0_reset(struct pd692x0_priv *priv) 196 { 197 const struct i2c_client *client = priv->client; 198 struct pd692x0_msg msg, buf = {0}; 199 int ret; 200 201 msg = pd692x0_msg_template_list[PD692X0_MSG_RESET]; 202 ret = pd692x0_send_msg(priv, &msg); 203 if (ret) { 204 dev_err(&client->dev, 205 "Failed to reset the controller (%pe)\n", ERR_PTR(ret)); 206 return ret; 207 } 208 209 msleep(30); 210 211 ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf)); 212 if (ret != sizeof(buf)) 213 return ret < 0 ? ret : -EIO; 214 215 /* Is the reply a successful report message */ 216 if (buf.key != PD692X0_KEY_REPORT || buf.sub[0] || buf.sub[1]) 217 return -EIO; 218 219 msleep(300); 220 221 ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf)); 222 if (ret != sizeof(buf)) 223 return ret < 0 ? ret : -EIO; 224 225 /* Is the boot status without error */ 226 if (buf.key != 0x03 || buf.echo != 0xff || buf.sub[0] & 0x1) { 227 dev_err(&client->dev, "PSE controller error\n"); 228 return -EIO; 229 } 230 231 return 0; 232 } 233 234 static bool pd692x0_try_recv_msg(const struct i2c_client *client, 235 struct pd692x0_msg *msg, 236 struct pd692x0_msg *buf) 237 { 238 /* Wait 30ms before readback as mandated by the protocol */ 239 msleep(30); 240 241 memset(buf, 0, sizeof(*buf)); 242 i2c_master_recv(client, (u8 *)buf, sizeof(*buf)); 243 if (buf->key) 244 return 0; 245 246 msleep(100); 247 248 memset(buf, 0, sizeof(*buf)); 249 i2c_master_recv(client, (u8 *)buf, sizeof(*buf)); 250 if (buf->key) 251 return 0; 252 253 return 1; 254 } 255 256 /* Implementation of I2C communication, specifically addressing scenarios 257 * involving communication loss. Refer to the "Synchronization During 258 * Communication Loss" section in the Communication Protocol document for 259 * further details. 260 */ 261 static int pd692x0_recv_msg(struct pd692x0_priv *priv, 262 struct pd692x0_msg *msg, 263 struct pd692x0_msg *buf) 264 { 265 const struct i2c_client *client = priv->client; 266 int ret; 267 268 ret = pd692x0_try_recv_msg(client, msg, buf); 269 if (!ret) 270 goto out_success; 271 272 dev_warn(&client->dev, 273 "Communication lost, rtnl is locked until communication is back!"); 274 275 ret = pd692x0_send_msg(priv, msg); 276 if (ret) 277 return ret; 278 279 ret = pd692x0_try_recv_msg(client, msg, buf); 280 if (!ret) 281 goto out_success2; 282 283 msleep(10000); 284 285 ret = pd692x0_send_msg(priv, msg); 286 if (ret) 287 return ret; 288 289 ret = pd692x0_try_recv_msg(client, msg, buf); 290 if (!ret) 291 goto out_success2; 292 293 return pd692x0_reset(priv); 294 295 out_success2: 296 dev_warn(&client->dev, "Communication is back, rtnl is unlocked!"); 297 out_success: 298 if (msg->key == PD692X0_KEY_CMD) { 299 priv->last_cmd_key = true; 300 priv->last_cmd_key_time = jiffies; 301 } else { 302 priv->last_cmd_key = false; 303 } 304 305 return 0; 306 } 307 308 static int pd692x0_sendrecv_msg(struct pd692x0_priv *priv, 309 struct pd692x0_msg *msg, 310 struct pd692x0_msg *buf) 311 { 312 struct device *dev = &priv->client->dev; 313 int ret; 314 315 ret = pd692x0_send_msg(priv, msg); 316 if (ret) 317 return ret; 318 319 ret = pd692x0_recv_msg(priv, msg, buf); 320 if (ret) 321 return ret; 322 323 if (msg->echo != buf->echo) { 324 dev_err(dev, 325 "Wrong match in message ID, expect %d received %d.\n", 326 msg->echo, buf->echo); 327 return -EIO; 328 } 329 330 /* If the reply is a report message is it successful */ 331 if (buf->key == PD692X0_KEY_REPORT && 332 (buf->sub[0] || buf->sub[1])) { 333 return -EIO; 334 } 335 336 return 0; 337 } 338 339 static struct pd692x0_priv *to_pd692x0_priv(struct pse_controller_dev *pcdev) 340 { 341 return container_of(pcdev, struct pd692x0_priv, pcdev); 342 } 343 344 static int pd692x0_fw_unavailable(struct pd692x0_priv *priv) 345 { 346 switch (priv->fw_state) { 347 case PD692X0_FW_OK: 348 return 0; 349 case PD692X0_FW_PREPARE: 350 case PD692X0_FW_WRITE: 351 case PD692X0_FW_COMPLETE: 352 dev_err(&priv->client->dev, "Firmware update in progress!\n"); 353 return -EBUSY; 354 case PD692X0_FW_BROKEN: 355 case PD692X0_FW_NEED_UPDATE: 356 default: 357 dev_err(&priv->client->dev, 358 "Firmware issue. Please update it!\n"); 359 return -EOPNOTSUPP; 360 } 361 } 362 363 static int pd692x0_pi_enable(struct pse_controller_dev *pcdev, int id) 364 { 365 struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); 366 struct pd692x0_msg msg, buf = {0}; 367 int ret; 368 369 ret = pd692x0_fw_unavailable(priv); 370 if (ret) 371 return ret; 372 373 if (priv->admin_state[id] == ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED) 374 return 0; 375 376 msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; 377 msg.data[0] = 0x1; 378 msg.sub[2] = id; 379 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 380 if (ret < 0) 381 return ret; 382 383 priv->admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; 384 385 return 0; 386 } 387 388 static int pd692x0_pi_disable(struct pse_controller_dev *pcdev, int id) 389 { 390 struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); 391 struct pd692x0_msg msg, buf = {0}; 392 int ret; 393 394 ret = pd692x0_fw_unavailable(priv); 395 if (ret) 396 return ret; 397 398 if (priv->admin_state[id] == ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED) 399 return 0; 400 401 msg = pd692x0_msg_template_list[PD692X0_MSG_SET_PORT_PARAM]; 402 msg.data[0] = 0x0; 403 msg.sub[2] = id; 404 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 405 if (ret < 0) 406 return ret; 407 408 priv->admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; 409 410 return 0; 411 } 412 413 static int pd692x0_pi_is_enabled(struct pse_controller_dev *pcdev, int id) 414 { 415 struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); 416 struct pd692x0_msg msg, buf = {0}; 417 int ret; 418 419 ret = pd692x0_fw_unavailable(priv); 420 if (ret) 421 return ret; 422 423 msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS]; 424 msg.sub[2] = id; 425 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 426 if (ret < 0) 427 return ret; 428 429 if (buf.sub[1]) { 430 priv->admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; 431 return 1; 432 } else { 433 priv->admin_state[id] = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; 434 return 0; 435 } 436 } 437 438 static int pd692x0_ethtool_get_status(struct pse_controller_dev *pcdev, 439 unsigned long id, 440 struct netlink_ext_ack *extack, 441 struct pse_control_status *status) 442 { 443 struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); 444 struct pd692x0_msg msg, buf = {0}; 445 int ret; 446 447 ret = pd692x0_fw_unavailable(priv); 448 if (ret) 449 return ret; 450 451 msg = pd692x0_msg_template_list[PD692X0_MSG_GET_PORT_STATUS]; 452 msg.sub[2] = id; 453 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 454 if (ret < 0) 455 return ret; 456 457 /* Compare Port Status (Communication Protocol Document par. 7.1) */ 458 if ((buf.sub[0] & 0xf0) == 0x80 || (buf.sub[0] & 0xf0) == 0x90) 459 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DELIVERING; 460 else if (buf.sub[0] == 0x1b || buf.sub[0] == 0x22) 461 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_SEARCHING; 462 else if (buf.sub[0] == 0x12) 463 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_FAULT; 464 else 465 status->c33_pw_status = ETHTOOL_C33_PSE_PW_D_STATUS_DISABLED; 466 467 if (buf.sub[1]) 468 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_ENABLED; 469 else 470 status->c33_admin_state = ETHTOOL_C33_PSE_ADMIN_STATE_DISABLED; 471 472 priv->admin_state[id] = status->c33_admin_state; 473 474 return 0; 475 } 476 477 static struct pd692x0_msg_ver pd692x0_get_sw_version(struct pd692x0_priv *priv) 478 { 479 struct device *dev = &priv->client->dev; 480 struct pd692x0_msg msg, buf = {0}; 481 struct pd692x0_msg_ver ver = {0}; 482 int ret; 483 484 msg = pd692x0_msg_template_list[PD692X0_MSG_GET_SW_VER]; 485 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 486 if (ret < 0) { 487 dev_err(dev, "Failed to get PSE version (%pe)\n", ERR_PTR(ret)); 488 return ver; 489 } 490 491 /* Extract version from the message */ 492 ver.prod = buf.sub[2]; 493 ver.maj_sw_ver = (buf.data[0] << 8 | buf.data[1]) / 100; 494 ver.min_sw_ver = ((buf.data[0] << 8 | buf.data[1]) / 10) % 10; 495 ver.pa_sw_ver = (buf.data[0] << 8 | buf.data[1]) % 10; 496 ver.param = buf.data[2]; 497 ver.build = buf.data[3]; 498 499 return ver; 500 } 501 502 struct pd692x0_manager { 503 struct device_node *port_node[PD692X0_MAX_MANAGER_PORTS]; 504 int nports; 505 }; 506 507 struct pd692x0_matrix { 508 u8 hw_port_a; 509 u8 hw_port_b; 510 }; 511 512 static int 513 pd692x0_of_get_ports_manager(struct pd692x0_priv *priv, 514 struct pd692x0_manager *manager, 515 struct device_node *np) 516 { 517 struct device_node *node; 518 int ret, nports, i; 519 520 nports = 0; 521 for_each_child_of_node(np, node) { 522 u32 port; 523 524 if (!of_node_name_eq(node, "port")) 525 continue; 526 527 ret = of_property_read_u32(node, "reg", &port); 528 if (ret) 529 goto out; 530 531 if (port >= PD692X0_MAX_MANAGER_PORTS || port != nports) { 532 dev_err(&priv->client->dev, 533 "wrong number or order of manager ports (%d)\n", 534 port); 535 ret = -EINVAL; 536 goto out; 537 } 538 539 of_node_get(node); 540 manager->port_node[port] = node; 541 nports++; 542 } 543 544 manager->nports = nports; 545 return 0; 546 547 out: 548 for (i = 0; i < nports; i++) { 549 of_node_put(manager->port_node[i]); 550 manager->port_node[i] = NULL; 551 } 552 of_node_put(node); 553 return ret; 554 } 555 556 static int 557 pd692x0_of_get_managers(struct pd692x0_priv *priv, 558 struct pd692x0_manager manager[PD692X0_MAX_MANAGERS]) 559 { 560 struct device_node *managers_node, *node; 561 int ret, nmanagers, i, j; 562 563 if (!priv->np) 564 return -EINVAL; 565 566 nmanagers = 0; 567 managers_node = of_get_child_by_name(priv->np, "managers"); 568 if (!managers_node) 569 return -EINVAL; 570 571 for_each_child_of_node(managers_node, node) { 572 u32 manager_id; 573 574 if (!of_node_name_eq(node, "manager")) 575 continue; 576 577 ret = of_property_read_u32(node, "reg", &manager_id); 578 if (ret) 579 goto out; 580 581 if (manager_id >= PD692X0_MAX_MANAGERS || 582 manager_id != nmanagers) { 583 dev_err(&priv->client->dev, 584 "wrong number or order of managers (%d)\n", 585 manager_id); 586 ret = -EINVAL; 587 goto out; 588 } 589 590 ret = pd692x0_of_get_ports_manager(priv, &manager[manager_id], 591 node); 592 if (ret) 593 goto out; 594 595 nmanagers++; 596 } 597 598 of_node_put(managers_node); 599 return nmanagers; 600 601 out: 602 for (i = 0; i < nmanagers; i++) { 603 for (j = 0; j < manager[i].nports; j++) { 604 of_node_put(manager[i].port_node[j]); 605 manager[i].port_node[j] = NULL; 606 } 607 } 608 609 of_node_put(node); 610 of_node_put(managers_node); 611 return ret; 612 } 613 614 static int 615 pd692x0_set_port_matrix(const struct pse_pi_pairset *pairset, 616 const struct pd692x0_manager *manager, 617 int nmanagers, struct pd692x0_matrix *port_matrix) 618 { 619 int i, j, port_cnt; 620 bool found = false; 621 622 if (!pairset->np) 623 return 0; 624 625 /* Look on every managers */ 626 port_cnt = 0; 627 for (i = 0; i < nmanagers; i++) { 628 /* Look on every ports of the manager */ 629 for (j = 0; j < manager[i].nports; j++) { 630 if (pairset->np == manager[i].port_node[j]) { 631 found = true; 632 break; 633 } 634 } 635 port_cnt += j; 636 637 if (found) 638 break; 639 } 640 641 if (!found) 642 return -ENODEV; 643 644 if (pairset->pinout == ALTERNATIVE_A) 645 port_matrix->hw_port_a = port_cnt; 646 else if (pairset->pinout == ALTERNATIVE_B) 647 port_matrix->hw_port_b = port_cnt; 648 649 return 0; 650 } 651 652 static int 653 pd692x0_set_ports_matrix(struct pd692x0_priv *priv, 654 const struct pd692x0_manager *manager, 655 int nmanagers, 656 struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS]) 657 { 658 struct pse_controller_dev *pcdev = &priv->pcdev; 659 int i, ret; 660 661 /* Init Matrix */ 662 for (i = 0; i < PD692X0_MAX_PIS; i++) { 663 port_matrix[i].hw_port_a = 0xff; 664 port_matrix[i].hw_port_b = 0xff; 665 } 666 667 /* Update with values for every PSE PIs */ 668 for (i = 0; i < pcdev->nr_lines; i++) { 669 ret = pd692x0_set_port_matrix(&pcdev->pi[i].pairset[0], 670 manager, nmanagers, 671 &port_matrix[i]); 672 if (ret) { 673 dev_err(&priv->client->dev, 674 "unable to configure pi %d pairset 0", i); 675 return ret; 676 } 677 678 ret = pd692x0_set_port_matrix(&pcdev->pi[i].pairset[1], 679 manager, nmanagers, 680 &port_matrix[i]); 681 if (ret) { 682 dev_err(&priv->client->dev, 683 "unable to configure pi %d pairset 1", i); 684 return ret; 685 } 686 } 687 688 return 0; 689 } 690 691 static int 692 pd692x0_write_ports_matrix(struct pd692x0_priv *priv, 693 const struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS]) 694 { 695 struct pd692x0_msg msg, buf; 696 int ret, i; 697 698 /* Write temporary Matrix */ 699 msg = pd692x0_msg_template_list[PD692X0_MSG_SET_TMP_PORT_MATRIX]; 700 for (i = 0; i < PD692X0_MAX_PIS; i++) { 701 msg.sub[2] = i; 702 msg.data[0] = port_matrix[i].hw_port_b; 703 msg.data[1] = port_matrix[i].hw_port_a; 704 705 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 706 if (ret < 0) 707 return ret; 708 } 709 710 /* Program Matrix */ 711 msg = pd692x0_msg_template_list[PD692X0_MSG_PRG_PORT_MATRIX]; 712 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 713 if (ret < 0) 714 return ret; 715 716 return 0; 717 } 718 719 static int pd692x0_setup_pi_matrix(struct pse_controller_dev *pcdev) 720 { 721 struct pd692x0_manager manager[PD692X0_MAX_MANAGERS] = {0}; 722 struct pd692x0_priv *priv = to_pd692x0_priv(pcdev); 723 struct pd692x0_matrix port_matrix[PD692X0_MAX_PIS]; 724 int ret, i, j, nmanagers; 725 726 /* Should we flash the port matrix */ 727 if (priv->fw_state != PD692X0_FW_OK && 728 priv->fw_state != PD692X0_FW_COMPLETE) 729 return 0; 730 731 ret = pd692x0_of_get_managers(priv, manager); 732 if (ret < 0) 733 return ret; 734 735 nmanagers = ret; 736 ret = pd692x0_set_ports_matrix(priv, manager, nmanagers, port_matrix); 737 if (ret) 738 goto out; 739 740 ret = pd692x0_write_ports_matrix(priv, port_matrix); 741 if (ret) 742 goto out; 743 744 out: 745 for (i = 0; i < nmanagers; i++) { 746 for (j = 0; j < manager[i].nports; j++) 747 of_node_put(manager[i].port_node[j]); 748 } 749 return ret; 750 } 751 752 static const struct pse_controller_ops pd692x0_ops = { 753 .setup_pi_matrix = pd692x0_setup_pi_matrix, 754 .ethtool_get_status = pd692x0_ethtool_get_status, 755 .pi_enable = pd692x0_pi_enable, 756 .pi_disable = pd692x0_pi_disable, 757 .pi_is_enabled = pd692x0_pi_is_enabled, 758 }; 759 760 #define PD692X0_FW_LINE_MAX_SZ 0xff 761 static int pd692x0_fw_get_next_line(const u8 *data, 762 char *line, size_t size) 763 { 764 size_t line_size; 765 int i; 766 767 line_size = min_t(size_t, size, PD692X0_FW_LINE_MAX_SZ); 768 769 memset(line, 0, PD692X0_FW_LINE_MAX_SZ); 770 for (i = 0; i < line_size - 1; i++) { 771 if (*data == '\r' && *(data + 1) == '\n') { 772 line[i] = '\r'; 773 line[i + 1] = '\n'; 774 return i + 2; 775 } 776 line[i] = *data; 777 data++; 778 } 779 780 return -EIO; 781 } 782 783 static enum fw_upload_err 784 pd692x0_fw_recv_resp(const struct i2c_client *client, unsigned long ms_timeout, 785 const char *msg_ok, unsigned int msg_size) 786 { 787 /* Maximum controller response size */ 788 char fw_msg_buf[5] = {0}; 789 unsigned long timeout; 790 int ret; 791 792 if (msg_size > sizeof(fw_msg_buf)) 793 return FW_UPLOAD_ERR_RW_ERROR; 794 795 /* Read until we get something */ 796 timeout = msecs_to_jiffies(ms_timeout) + jiffies; 797 while (true) { 798 if (time_is_before_jiffies(timeout)) 799 return FW_UPLOAD_ERR_TIMEOUT; 800 801 ret = i2c_master_recv(client, fw_msg_buf, 1); 802 if (ret < 0 || *fw_msg_buf == 0) { 803 usleep_range(1000, 2000); 804 continue; 805 } else { 806 break; 807 } 808 } 809 810 /* Read remaining characters */ 811 ret = i2c_master_recv(client, fw_msg_buf + 1, msg_size - 1); 812 if (strncmp(fw_msg_buf, msg_ok, msg_size)) { 813 dev_err(&client->dev, 814 "Wrong FW download process answer (%*pE)\n", 815 msg_size, fw_msg_buf); 816 return FW_UPLOAD_ERR_HW_ERROR; 817 } 818 819 return FW_UPLOAD_ERR_NONE; 820 } 821 822 static int pd692x0_fw_write_line(const struct i2c_client *client, 823 const char line[PD692X0_FW_LINE_MAX_SZ], 824 const bool last_line) 825 { 826 int ret; 827 828 while (*line != 0) { 829 ret = i2c_master_send(client, line, 1); 830 if (ret < 0) 831 return FW_UPLOAD_ERR_RW_ERROR; 832 line++; 833 } 834 835 if (last_line) { 836 ret = pd692x0_fw_recv_resp(client, 100, "TP\r\n", 837 sizeof("TP\r\n") - 1); 838 if (ret) 839 return ret; 840 } else { 841 ret = pd692x0_fw_recv_resp(client, 100, "T*\r\n", 842 sizeof("T*\r\n") - 1); 843 if (ret) 844 return ret; 845 } 846 847 return FW_UPLOAD_ERR_NONE; 848 } 849 850 static enum fw_upload_err pd692x0_fw_reset(const struct i2c_client *client) 851 { 852 const struct pd692x0_msg zero = {0}; 853 struct pd692x0_msg buf = {0}; 854 unsigned long timeout; 855 char cmd[] = "RST"; 856 int ret; 857 858 ret = i2c_master_send(client, cmd, strlen(cmd)); 859 if (ret < 0) { 860 dev_err(&client->dev, 861 "Failed to reset the controller (%pe)\n", 862 ERR_PTR(ret)); 863 return ret; 864 } 865 866 timeout = msecs_to_jiffies(10000) + jiffies; 867 while (true) { 868 if (time_is_before_jiffies(timeout)) 869 return FW_UPLOAD_ERR_TIMEOUT; 870 871 ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf)); 872 if (ret < 0 || 873 !memcmp(&buf, &zero, sizeof(buf))) 874 usleep_range(1000, 2000); 875 else 876 break; 877 } 878 879 /* Is the reply a successful report message */ 880 if (buf.key != PD692X0_KEY_TLM || buf.echo != 0xff || 881 buf.sub[0] & 0x01) { 882 dev_err(&client->dev, "PSE controller error\n"); 883 return FW_UPLOAD_ERR_HW_ERROR; 884 } 885 886 /* Is the firmware operational */ 887 if (buf.sub[0] & 0x02) { 888 dev_err(&client->dev, 889 "PSE firmware error. Please update it.\n"); 890 return FW_UPLOAD_ERR_HW_ERROR; 891 } 892 893 return FW_UPLOAD_ERR_NONE; 894 } 895 896 static enum fw_upload_err pd692x0_fw_prepare(struct fw_upload *fwl, 897 const u8 *data, u32 size) 898 { 899 struct pd692x0_priv *priv = fwl->dd_handle; 900 const struct i2c_client *client = priv->client; 901 enum pd692x0_fw_state last_fw_state; 902 int ret; 903 904 priv->cancel_request = false; 905 last_fw_state = priv->fw_state; 906 907 priv->fw_state = PD692X0_FW_PREPARE; 908 909 /* Enter program mode */ 910 if (last_fw_state == PD692X0_FW_BROKEN) { 911 const char *msg = "ENTR"; 912 const char *c; 913 914 c = msg; 915 do { 916 ret = i2c_master_send(client, c, 1); 917 if (ret < 0) 918 return FW_UPLOAD_ERR_RW_ERROR; 919 if (*(c + 1)) 920 usleep_range(10000, 20000); 921 } while (*(++c)); 922 } else { 923 struct pd692x0_msg msg, buf; 924 925 msg = pd692x0_msg_template_list[PD692X0_MSG_DOWNLOAD_CMD]; 926 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 927 if (ret < 0) { 928 dev_err(&client->dev, 929 "Failed to enter programming mode (%pe)\n", 930 ERR_PTR(ret)); 931 return FW_UPLOAD_ERR_RW_ERROR; 932 } 933 } 934 935 ret = pd692x0_fw_recv_resp(client, 100, "TPE\r\n", sizeof("TPE\r\n") - 1); 936 if (ret) 937 goto err_out; 938 939 if (priv->cancel_request) { 940 ret = FW_UPLOAD_ERR_CANCELED; 941 goto err_out; 942 } 943 944 return FW_UPLOAD_ERR_NONE; 945 946 err_out: 947 pd692x0_fw_reset(priv->client); 948 priv->fw_state = last_fw_state; 949 return ret; 950 } 951 952 static enum fw_upload_err pd692x0_fw_write(struct fw_upload *fwl, 953 const u8 *data, u32 offset, 954 u32 size, u32 *written) 955 { 956 struct pd692x0_priv *priv = fwl->dd_handle; 957 char line[PD692X0_FW_LINE_MAX_SZ]; 958 const struct i2c_client *client; 959 int ret, i; 960 char cmd; 961 962 client = priv->client; 963 priv->fw_state = PD692X0_FW_WRITE; 964 965 /* Erase */ 966 cmd = 'E'; 967 ret = i2c_master_send(client, &cmd, 1); 968 if (ret < 0) { 969 dev_err(&client->dev, 970 "Failed to boot programming mode (%pe)\n", 971 ERR_PTR(ret)); 972 return FW_UPLOAD_ERR_RW_ERROR; 973 } 974 975 ret = pd692x0_fw_recv_resp(client, 100, "TOE\r\n", sizeof("TOE\r\n") - 1); 976 if (ret) 977 return ret; 978 979 ret = pd692x0_fw_recv_resp(client, 5000, "TE\r\n", sizeof("TE\r\n") - 1); 980 if (ret) 981 dev_warn(&client->dev, 982 "Failed to erase internal memory, however still try to write Firmware\n"); 983 984 ret = pd692x0_fw_recv_resp(client, 100, "TPE\r\n", sizeof("TPE\r\n") - 1); 985 if (ret) 986 dev_warn(&client->dev, 987 "Failed to erase internal memory, however still try to write Firmware\n"); 988 989 if (priv->cancel_request) 990 return FW_UPLOAD_ERR_CANCELED; 991 992 /* Program */ 993 cmd = 'P'; 994 ret = i2c_master_send(client, &cmd, sizeof(char)); 995 if (ret < 0) { 996 dev_err(&client->dev, 997 "Failed to boot programming mode (%pe)\n", 998 ERR_PTR(ret)); 999 return ret; 1000 } 1001 1002 ret = pd692x0_fw_recv_resp(client, 100, "TOP\r\n", sizeof("TOP\r\n") - 1); 1003 if (ret) 1004 return ret; 1005 1006 i = 0; 1007 while (i < size) { 1008 ret = pd692x0_fw_get_next_line(data, line, size - i); 1009 if (ret < 0) { 1010 ret = FW_UPLOAD_ERR_FW_INVALID; 1011 goto err; 1012 } 1013 1014 i += ret; 1015 data += ret; 1016 if (line[0] == 'S' && line[1] == '0') { 1017 continue; 1018 } else if (line[0] == 'S' && line[1] == '7') { 1019 ret = pd692x0_fw_write_line(client, line, true); 1020 if (ret) 1021 goto err; 1022 } else { 1023 ret = pd692x0_fw_write_line(client, line, false); 1024 if (ret) 1025 goto err; 1026 } 1027 1028 if (priv->cancel_request) { 1029 ret = FW_UPLOAD_ERR_CANCELED; 1030 goto err; 1031 } 1032 } 1033 *written = i; 1034 1035 msleep(400); 1036 1037 return FW_UPLOAD_ERR_NONE; 1038 1039 err: 1040 strscpy_pad(line, "S7\r\n", sizeof(line)); 1041 pd692x0_fw_write_line(client, line, true); 1042 return ret; 1043 } 1044 1045 static enum fw_upload_err pd692x0_fw_poll_complete(struct fw_upload *fwl) 1046 { 1047 struct pd692x0_priv *priv = fwl->dd_handle; 1048 const struct i2c_client *client = priv->client; 1049 struct pd692x0_msg_ver ver; 1050 int ret; 1051 1052 priv->fw_state = PD692X0_FW_COMPLETE; 1053 1054 ret = pd692x0_fw_reset(client); 1055 if (ret) 1056 return ret; 1057 1058 ver = pd692x0_get_sw_version(priv); 1059 if (ver.maj_sw_ver < PD692X0_FW_MAJ_VER) { 1060 dev_err(&client->dev, 1061 "Too old firmware version. Please update it\n"); 1062 priv->fw_state = PD692X0_FW_NEED_UPDATE; 1063 return FW_UPLOAD_ERR_FW_INVALID; 1064 } 1065 1066 ret = pd692x0_setup_pi_matrix(&priv->pcdev); 1067 if (ret < 0) { 1068 dev_err(&client->dev, "Error configuring ports matrix (%pe)\n", 1069 ERR_PTR(ret)); 1070 priv->fw_state = PD692X0_FW_NEED_UPDATE; 1071 return FW_UPLOAD_ERR_HW_ERROR; 1072 } 1073 1074 priv->fw_state = PD692X0_FW_OK; 1075 return FW_UPLOAD_ERR_NONE; 1076 } 1077 1078 static void pd692x0_fw_cancel(struct fw_upload *fwl) 1079 { 1080 struct pd692x0_priv *priv = fwl->dd_handle; 1081 1082 priv->cancel_request = true; 1083 } 1084 1085 static void pd692x0_fw_cleanup(struct fw_upload *fwl) 1086 { 1087 struct pd692x0_priv *priv = fwl->dd_handle; 1088 1089 switch (priv->fw_state) { 1090 case PD692X0_FW_WRITE: 1091 pd692x0_fw_reset(priv->client); 1092 fallthrough; 1093 case PD692X0_FW_COMPLETE: 1094 priv->fw_state = PD692X0_FW_BROKEN; 1095 break; 1096 default: 1097 break; 1098 } 1099 } 1100 1101 static const struct fw_upload_ops pd692x0_fw_ops = { 1102 .prepare = pd692x0_fw_prepare, 1103 .write = pd692x0_fw_write, 1104 .poll_complete = pd692x0_fw_poll_complete, 1105 .cancel = pd692x0_fw_cancel, 1106 .cleanup = pd692x0_fw_cleanup, 1107 }; 1108 1109 static int pd692x0_i2c_probe(struct i2c_client *client) 1110 { 1111 struct pd692x0_msg msg, buf = {0}, zero = {0}; 1112 struct device *dev = &client->dev; 1113 struct pd692x0_msg_ver ver; 1114 struct pd692x0_priv *priv; 1115 struct fw_upload *fwl; 1116 int ret; 1117 1118 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 1119 dev_err(dev, "i2c check functionality failed\n"); 1120 return -ENXIO; 1121 } 1122 1123 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 1124 if (!priv) 1125 return -ENOMEM; 1126 1127 priv->client = client; 1128 i2c_set_clientdata(client, priv); 1129 1130 ret = i2c_master_recv(client, (u8 *)&buf, sizeof(buf)); 1131 if (ret != sizeof(buf)) { 1132 dev_err(dev, "Failed to get device status\n"); 1133 return -EIO; 1134 } 1135 1136 /* Probe has been already run and the status dumped */ 1137 if (!memcmp(&buf, &zero, sizeof(buf))) { 1138 /* Ask again the controller status */ 1139 msg = pd692x0_msg_template_list[PD692X0_MSG_GET_SYS_STATUS]; 1140 ret = pd692x0_sendrecv_msg(priv, &msg, &buf); 1141 if (ret < 0) { 1142 dev_err(dev, "Failed to get device status\n"); 1143 return ret; 1144 } 1145 } 1146 1147 if (buf.key != 0x03 || buf.sub[0] & 0x01) { 1148 dev_err(dev, "PSE controller error\n"); 1149 return -EIO; 1150 } 1151 if (buf.sub[0] & 0x02) { 1152 dev_err(dev, "PSE firmware error. Please update it.\n"); 1153 priv->fw_state = PD692X0_FW_BROKEN; 1154 } else { 1155 ver = pd692x0_get_sw_version(priv); 1156 dev_info(&client->dev, "Software version %d.%02d.%d.%d\n", 1157 ver.prod, ver.maj_sw_ver, ver.min_sw_ver, 1158 ver.pa_sw_ver); 1159 1160 if (ver.maj_sw_ver < PD692X0_FW_MAJ_VER) { 1161 dev_err(dev, "Too old firmware version. Please update it\n"); 1162 priv->fw_state = PD692X0_FW_NEED_UPDATE; 1163 } else { 1164 priv->fw_state = PD692X0_FW_OK; 1165 } 1166 } 1167 1168 priv->np = dev->of_node; 1169 priv->pcdev.nr_lines = PD692X0_MAX_PIS; 1170 priv->pcdev.owner = THIS_MODULE; 1171 priv->pcdev.ops = &pd692x0_ops; 1172 priv->pcdev.dev = dev; 1173 priv->pcdev.types = ETHTOOL_PSE_C33; 1174 ret = devm_pse_controller_register(dev, &priv->pcdev); 1175 if (ret) 1176 return dev_err_probe(dev, ret, 1177 "failed to register PSE controller\n"); 1178 1179 fwl = firmware_upload_register(THIS_MODULE, dev, dev_name(dev), 1180 &pd692x0_fw_ops, priv); 1181 if (IS_ERR(fwl)) 1182 return dev_err_probe(dev, PTR_ERR(fwl), 1183 "failed to register to the Firmware Upload API\n"); 1184 priv->fwl = fwl; 1185 1186 return 0; 1187 } 1188 1189 static void pd692x0_i2c_remove(struct i2c_client *client) 1190 { 1191 struct pd692x0_priv *priv = i2c_get_clientdata(client); 1192 1193 firmware_upload_unregister(priv->fwl); 1194 } 1195 1196 static const struct i2c_device_id pd692x0_id[] = { 1197 { PD692X0_PSE_NAME, 0 }, 1198 { }, 1199 }; 1200 MODULE_DEVICE_TABLE(i2c, pd692x0_id); 1201 1202 static const struct of_device_id pd692x0_of_match[] = { 1203 { .compatible = "microchip,pd69200", }, 1204 { .compatible = "microchip,pd69210", }, 1205 { .compatible = "microchip,pd69220", }, 1206 { }, 1207 }; 1208 MODULE_DEVICE_TABLE(of, pd692x0_of_match); 1209 1210 static struct i2c_driver pd692x0_driver = { 1211 .probe = pd692x0_i2c_probe, 1212 .remove = pd692x0_i2c_remove, 1213 .id_table = pd692x0_id, 1214 .driver = { 1215 .name = PD692X0_PSE_NAME, 1216 .of_match_table = pd692x0_of_match, 1217 }, 1218 }; 1219 module_i2c_driver(pd692x0_driver); 1220 1221 MODULE_AUTHOR("Kory Maincent <kory.maincent@bootlin.com>"); 1222 MODULE_DESCRIPTION("Microchip PD692x0 PoE PSE Controller driver"); 1223 MODULE_LICENSE("GPL"); 1224