xref: /linux/drivers/net/phy/vitesse.c (revision 0d456bad36d42d16022be045c8a53ddbb59ee478)
1 /*
2  * Driver for Vitesse PHYs
3  *
4  * Author: Kriston Carson
5  *
6  * Copyright (c) 2005, 2009 Freescale Semiconductor, Inc.
7  *
8  * This program is free software; you can redistribute  it and/or modify it
9  * under  the terms of  the GNU General  Public License as published by the
10  * Free Software Foundation;  either version 2 of the  License, or (at your
11  * option) any later version.
12  *
13  */
14 
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/mii.h>
18 #include <linux/ethtool.h>
19 #include <linux/phy.h>
20 
21 /* Vitesse Extended Control Register 1 */
22 #define MII_VSC8244_EXT_CON1           0x17
23 #define MII_VSC8244_EXTCON1_INIT       0x0000
24 #define MII_VSC8244_EXTCON1_TX_SKEW_MASK	0x0c00
25 #define MII_VSC8244_EXTCON1_RX_SKEW_MASK	0x0300
26 #define MII_VSC8244_EXTCON1_TX_SKEW	0x0800
27 #define MII_VSC8244_EXTCON1_RX_SKEW	0x0200
28 
29 /* Vitesse Interrupt Mask Register */
30 #define MII_VSC8244_IMASK		0x19
31 #define MII_VSC8244_IMASK_IEN		0x8000
32 #define MII_VSC8244_IMASK_SPEED		0x4000
33 #define MII_VSC8244_IMASK_LINK		0x2000
34 #define MII_VSC8244_IMASK_DUPLEX	0x1000
35 #define MII_VSC8244_IMASK_MASK		0xf000
36 
37 #define MII_VSC8221_IMASK_MASK		0xa000
38 
39 /* Vitesse Interrupt Status Register */
40 #define MII_VSC8244_ISTAT		0x1a
41 #define MII_VSC8244_ISTAT_STATUS	0x8000
42 #define MII_VSC8244_ISTAT_SPEED		0x4000
43 #define MII_VSC8244_ISTAT_LINK		0x2000
44 #define MII_VSC8244_ISTAT_DUPLEX	0x1000
45 
46 /* Vitesse Auxiliary Control/Status Register */
47 #define MII_VSC8244_AUX_CONSTAT        	0x1c
48 #define MII_VSC8244_AUXCONSTAT_INIT    	0x0000
49 #define MII_VSC8244_AUXCONSTAT_DUPLEX  	0x0020
50 #define MII_VSC8244_AUXCONSTAT_SPEED   	0x0018
51 #define MII_VSC8244_AUXCONSTAT_GBIT    	0x0010
52 #define MII_VSC8244_AUXCONSTAT_100     	0x0008
53 
54 #define MII_VSC8221_AUXCONSTAT_INIT	0x0004 /* need to set this bit? */
55 #define MII_VSC8221_AUXCONSTAT_RESERVED	0x0004
56 
57 #define PHY_ID_VSC8244			0x000fc6c0
58 #define PHY_ID_VSC8221			0x000fc550
59 
60 MODULE_DESCRIPTION("Vitesse PHY driver");
61 MODULE_AUTHOR("Kriston Carson");
62 MODULE_LICENSE("GPL");
63 
64 int vsc824x_add_skew(struct phy_device *phydev)
65 {
66 	int err;
67 	int extcon;
68 
69 	extcon = phy_read(phydev, MII_VSC8244_EXT_CON1);
70 
71 	if (extcon < 0)
72 		return extcon;
73 
74 	extcon &= ~(MII_VSC8244_EXTCON1_TX_SKEW_MASK |
75 			MII_VSC8244_EXTCON1_RX_SKEW_MASK);
76 
77 	extcon |= (MII_VSC8244_EXTCON1_TX_SKEW |
78 			MII_VSC8244_EXTCON1_RX_SKEW);
79 
80 	err = phy_write(phydev, MII_VSC8244_EXT_CON1, extcon);
81 
82 	return err;
83 }
84 EXPORT_SYMBOL(vsc824x_add_skew);
85 
86 static int vsc824x_config_init(struct phy_device *phydev)
87 {
88 	int err;
89 
90 	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
91 			MII_VSC8244_AUXCONSTAT_INIT);
92 	if (err < 0)
93 		return err;
94 
95 	if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
96 		err = vsc824x_add_skew(phydev);
97 
98 	return err;
99 }
100 
101 static int vsc824x_ack_interrupt(struct phy_device *phydev)
102 {
103 	int err = 0;
104 
105 	/*
106 	 * Don't bother to ACK the interrupts if interrupts
107 	 * are disabled.  The 824x cannot clear the interrupts
108 	 * if they are disabled.
109 	 */
110 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
111 		err = phy_read(phydev, MII_VSC8244_ISTAT);
112 
113 	return (err < 0) ? err : 0;
114 }
115 
116 static int vsc82xx_config_intr(struct phy_device *phydev)
117 {
118 	int err;
119 
120 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
121 		err = phy_write(phydev, MII_VSC8244_IMASK,
122 			phydev->drv->phy_id == PHY_ID_VSC8244 ?
123 				MII_VSC8244_IMASK_MASK :
124 				MII_VSC8221_IMASK_MASK);
125 	else {
126 		/*
127 		 * The Vitesse PHY cannot clear the interrupt
128 		 * once it has disabled them, so we clear them first
129 		 */
130 		err = phy_read(phydev, MII_VSC8244_ISTAT);
131 
132 		if (err < 0)
133 			return err;
134 
135 		err = phy_write(phydev, MII_VSC8244_IMASK, 0);
136 	}
137 
138 	return err;
139 }
140 
141 static int vsc8221_config_init(struct phy_device *phydev)
142 {
143 	int err;
144 
145 	err = phy_write(phydev, MII_VSC8244_AUX_CONSTAT,
146 			MII_VSC8221_AUXCONSTAT_INIT);
147 	return err;
148 
149 	/* Perhaps we should set EXT_CON1 based on the interface?
150 	   Options are 802.3Z SerDes or SGMII */
151 }
152 
153 /* Vitesse 824x */
154 static struct phy_driver vsc82xx_driver[] = {
155 {
156 	.phy_id		= PHY_ID_VSC8244,
157 	.name		= "Vitesse VSC8244",
158 	.phy_id_mask	= 0x000fffc0,
159 	.features	= PHY_GBIT_FEATURES,
160 	.flags		= PHY_HAS_INTERRUPT,
161 	.config_init	= &vsc824x_config_init,
162 	.config_aneg	= &genphy_config_aneg,
163 	.read_status	= &genphy_read_status,
164 	.ack_interrupt	= &vsc824x_ack_interrupt,
165 	.config_intr	= &vsc82xx_config_intr,
166 	.driver		= { .owner = THIS_MODULE,},
167 }, {
168 	/* Vitesse 8221 */
169 	.phy_id		= PHY_ID_VSC8221,
170 	.phy_id_mask	= 0x000ffff0,
171 	.name		= "Vitesse VSC8221",
172 	.features	= PHY_GBIT_FEATURES,
173 	.flags		= PHY_HAS_INTERRUPT,
174 	.config_init	= &vsc8221_config_init,
175 	.config_aneg	= &genphy_config_aneg,
176 	.read_status	= &genphy_read_status,
177 	.ack_interrupt	= &vsc824x_ack_interrupt,
178 	.config_intr	= &vsc82xx_config_intr,
179 	.driver		= { .owner = THIS_MODULE,},
180 } };
181 
182 static int __init vsc82xx_init(void)
183 {
184 	return phy_drivers_register(vsc82xx_driver,
185 		ARRAY_SIZE(vsc82xx_driver));
186 }
187 
188 static void __exit vsc82xx_exit(void)
189 {
190 	return phy_drivers_unregister(vsc82xx_driver,
191 		ARRAY_SIZE(vsc82xx_driver));
192 }
193 
194 module_init(vsc82xx_init);
195 module_exit(vsc82xx_exit);
196 
197 static struct mdio_device_id __maybe_unused vitesse_tbl[] = {
198 	{ PHY_ID_VSC8244, 0x000fffc0 },
199 	{ PHY_ID_VSC8221, 0x000ffff0 },
200 	{ }
201 };
202 
203 MODULE_DEVICE_TABLE(mdio, vitesse_tbl);
204