xref: /linux/drivers/net/phy/smsc.c (revision 99ce286d2d30a31eba4171036bc3f32eeb59e5f3)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * drivers/net/phy/smsc.c
4  *
5  * Driver for SMSC PHYs
6  *
7  * Author: Herbert Valerio Riedel
8  *
9  * Copyright (c) 2006 Herbert Valerio Riedel <hvr@gnu.org>
10  *
11  * Support added for SMSC LAN8187 and LAN8700 by steve.glendinning@shawell.net
12  *
13  */
14 
15 #include <linux/clk.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/mii.h>
19 #include <linux/ethtool.h>
20 #include <linux/of.h>
21 #include <linux/phy.h>
22 #include <linux/netdevice.h>
23 #include <linux/smscphy.h>
24 
25 /* Vendor-specific PHY Definitions */
26 /* EDPD NLP / crossover time configuration */
27 #define PHY_EDPD_CONFIG			16
28 #define PHY_EDPD_CONFIG_EXT_CROSSOVER_	0x0001
29 
30 /* Control/Status Indication Register */
31 #define SPECIAL_CTRL_STS		27
32 #define SPECIAL_CTRL_STS_OVRRD_AMDIX_	0x8000
33 #define SPECIAL_CTRL_STS_AMDIX_ENABLE_	0x4000
34 #define SPECIAL_CTRL_STS_AMDIX_STATE_	0x2000
35 
36 struct smsc_hw_stat {
37 	const char *string;
38 	u8 reg;
39 	u8 bits;
40 };
41 
42 static struct smsc_hw_stat smsc_hw_stats[] = {
43 	{ "phy_symbol_errors", 26, 16},
44 };
45 
46 struct smsc_phy_priv {
47 	bool energy_enable;
48 };
49 
50 static int smsc_phy_ack_interrupt(struct phy_device *phydev)
51 {
52 	int rc = phy_read(phydev, MII_LAN83C185_ISF);
53 
54 	return rc < 0 ? rc : 0;
55 }
56 
57 static int smsc_phy_config_intr(struct phy_device *phydev)
58 {
59 	int rc;
60 
61 	if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
62 		rc = smsc_phy_ack_interrupt(phydev);
63 		if (rc)
64 			return rc;
65 
66 		rc = phy_write(phydev, MII_LAN83C185_IM,
67 			       MII_LAN83C185_ISF_INT_PHYLIB_EVENTS);
68 	} else {
69 		rc = phy_write(phydev, MII_LAN83C185_IM, 0);
70 		if (rc)
71 			return rc;
72 
73 		rc = smsc_phy_ack_interrupt(phydev);
74 	}
75 
76 	return rc < 0 ? rc : 0;
77 }
78 
79 static irqreturn_t smsc_phy_handle_interrupt(struct phy_device *phydev)
80 {
81 	int irq_status;
82 
83 	irq_status = phy_read(phydev, MII_LAN83C185_ISF);
84 	if (irq_status < 0) {
85 		if (irq_status != -ENODEV)
86 			phy_error(phydev);
87 
88 		return IRQ_NONE;
89 	}
90 
91 	if (!(irq_status & MII_LAN83C185_ISF_INT_PHYLIB_EVENTS))
92 		return IRQ_NONE;
93 
94 	phy_trigger_machine(phydev);
95 
96 	return IRQ_HANDLED;
97 }
98 
99 static int smsc_phy_config_init(struct phy_device *phydev)
100 {
101 	struct smsc_phy_priv *priv = phydev->priv;
102 
103 	if (!priv->energy_enable || phydev->irq != PHY_POLL)
104 		return 0;
105 
106 	/* Enable energy detect power down mode */
107 	return phy_set_bits(phydev, MII_LAN83C185_CTRL_STATUS,
108 			    MII_LAN83C185_EDPWRDOWN);
109 }
110 
111 static int smsc_phy_reset(struct phy_device *phydev)
112 {
113 	int rc = phy_read(phydev, MII_LAN83C185_SPECIAL_MODES);
114 	if (rc < 0)
115 		return rc;
116 
117 	/* If the SMSC PHY is in power down mode, then set it
118 	 * in all capable mode before using it.
119 	 */
120 	if ((rc & MII_LAN83C185_MODE_MASK) == MII_LAN83C185_MODE_POWERDOWN) {
121 		/* set "all capable" mode */
122 		rc |= MII_LAN83C185_MODE_ALL;
123 		phy_write(phydev, MII_LAN83C185_SPECIAL_MODES, rc);
124 	}
125 
126 	/* reset the phy */
127 	return genphy_soft_reset(phydev);
128 }
129 
130 static int lan87xx_config_aneg(struct phy_device *phydev)
131 {
132 	int rc;
133 	int val;
134 
135 	switch (phydev->mdix_ctrl) {
136 	case ETH_TP_MDI:
137 		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_;
138 		break;
139 	case ETH_TP_MDI_X:
140 		val = SPECIAL_CTRL_STS_OVRRD_AMDIX_ |
141 			SPECIAL_CTRL_STS_AMDIX_STATE_;
142 		break;
143 	case ETH_TP_MDI_AUTO:
144 		val = SPECIAL_CTRL_STS_AMDIX_ENABLE_;
145 		break;
146 	default:
147 		return genphy_config_aneg(phydev);
148 	}
149 
150 	rc = phy_read(phydev, SPECIAL_CTRL_STS);
151 	if (rc < 0)
152 		return rc;
153 
154 	rc &= ~(SPECIAL_CTRL_STS_OVRRD_AMDIX_ |
155 		SPECIAL_CTRL_STS_AMDIX_ENABLE_ |
156 		SPECIAL_CTRL_STS_AMDIX_STATE_);
157 	rc |= val;
158 	phy_write(phydev, SPECIAL_CTRL_STS, rc);
159 
160 	phydev->mdix = phydev->mdix_ctrl;
161 	return genphy_config_aneg(phydev);
162 }
163 
164 static int lan95xx_config_aneg_ext(struct phy_device *phydev)
165 {
166 	if (phydev->phy_id == 0x0007c0f0) { /* LAN9500A or LAN9505A */
167 		/* Extend Manual AutoMDIX timer */
168 		int rc = phy_set_bits(phydev, PHY_EDPD_CONFIG,
169 				      PHY_EDPD_CONFIG_EXT_CROSSOVER_);
170 
171 		if (rc < 0)
172 			return rc;
173 	}
174 
175 	return lan87xx_config_aneg(phydev);
176 }
177 
178 /*
179  * The LAN87xx suffers from rare absence of the ENERGYON-bit when Ethernet cable
180  * plugs in while LAN87xx is in Energy Detect Power-Down mode. This leads to
181  * unstable detection of plugging in Ethernet cable.
182  * This workaround disables Energy Detect Power-Down mode and waiting for
183  * response on link pulses to detect presence of plugged Ethernet cable.
184  * The Energy Detect Power-Down mode is enabled again in the end of procedure to
185  * save approximately 220 mW of power if cable is unplugged.
186  * The workaround is only applicable to poll mode. Energy Detect Power-Down may
187  * not be used in interrupt mode lest link change detection becomes unreliable.
188  */
189 static int lan87xx_read_status(struct phy_device *phydev)
190 {
191 	struct smsc_phy_priv *priv = phydev->priv;
192 
193 	int err = genphy_read_status(phydev);
194 
195 	if (!phydev->link && priv->energy_enable && phydev->irq == PHY_POLL) {
196 		/* Disable EDPD to wake up PHY */
197 		int rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
198 		if (rc < 0)
199 			return rc;
200 
201 		rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
202 			       rc & ~MII_LAN83C185_EDPWRDOWN);
203 		if (rc < 0)
204 			return rc;
205 
206 		/* Wait max 640 ms to detect energy and the timeout is not
207 		 * an actual error.
208 		 */
209 		read_poll_timeout(phy_read, rc,
210 				  rc & MII_LAN83C185_ENERGYON || rc < 0,
211 				  10000, 640000, true, phydev,
212 				  MII_LAN83C185_CTRL_STATUS);
213 		if (rc < 0)
214 			return rc;
215 
216 		/* Re-enable EDPD */
217 		rc = phy_read(phydev, MII_LAN83C185_CTRL_STATUS);
218 		if (rc < 0)
219 			return rc;
220 
221 		rc = phy_write(phydev, MII_LAN83C185_CTRL_STATUS,
222 			       rc | MII_LAN83C185_EDPWRDOWN);
223 		if (rc < 0)
224 			return rc;
225 	}
226 
227 	return err;
228 }
229 
230 static int smsc_get_sset_count(struct phy_device *phydev)
231 {
232 	return ARRAY_SIZE(smsc_hw_stats);
233 }
234 
235 static void smsc_get_strings(struct phy_device *phydev, u8 *data)
236 {
237 	int i;
238 
239 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++) {
240 		strncpy(data + i * ETH_GSTRING_LEN,
241 		       smsc_hw_stats[i].string, ETH_GSTRING_LEN);
242 	}
243 }
244 
245 static u64 smsc_get_stat(struct phy_device *phydev, int i)
246 {
247 	struct smsc_hw_stat stat = smsc_hw_stats[i];
248 	int val;
249 	u64 ret;
250 
251 	val = phy_read(phydev, stat.reg);
252 	if (val < 0)
253 		ret = U64_MAX;
254 	else
255 		ret = val;
256 
257 	return ret;
258 }
259 
260 static void smsc_get_stats(struct phy_device *phydev,
261 			   struct ethtool_stats *stats, u64 *data)
262 {
263 	int i;
264 
265 	for (i = 0; i < ARRAY_SIZE(smsc_hw_stats); i++)
266 		data[i] = smsc_get_stat(phydev, i);
267 }
268 
269 static int smsc_phy_probe(struct phy_device *phydev)
270 {
271 	struct device *dev = &phydev->mdio.dev;
272 	struct device_node *of_node = dev->of_node;
273 	struct smsc_phy_priv *priv;
274 	struct clk *refclk;
275 
276 	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
277 	if (!priv)
278 		return -ENOMEM;
279 
280 	priv->energy_enable = true;
281 
282 	if (of_property_read_bool(of_node, "smsc,disable-energy-detect"))
283 		priv->energy_enable = false;
284 
285 	phydev->priv = priv;
286 
287 	/* Make clk optional to keep DTB backward compatibility. */
288 	refclk = devm_clk_get_optional_enabled(dev, NULL);
289 	if (IS_ERR(refclk))
290 		return dev_err_probe(dev, PTR_ERR(refclk),
291 				     "Failed to request clock\n");
292 
293 	return clk_set_rate(refclk, 50 * 1000 * 1000);
294 }
295 
296 static struct phy_driver smsc_phy_driver[] = {
297 {
298 	.phy_id		= 0x0007c0a0, /* OUI=0x00800f, Model#=0x0a */
299 	.phy_id_mask	= 0xfffffff0,
300 	.name		= "SMSC LAN83C185",
301 
302 	/* PHY_BASIC_FEATURES */
303 
304 	.probe		= smsc_phy_probe,
305 
306 	/* basic functions */
307 	.config_init	= smsc_phy_config_init,
308 	.soft_reset	= smsc_phy_reset,
309 
310 	/* IRQ related */
311 	.config_intr	= smsc_phy_config_intr,
312 	.handle_interrupt = smsc_phy_handle_interrupt,
313 
314 	.suspend	= genphy_suspend,
315 	.resume		= genphy_resume,
316 }, {
317 	.phy_id		= 0x0007c0b0, /* OUI=0x00800f, Model#=0x0b */
318 	.phy_id_mask	= 0xfffffff0,
319 	.name		= "SMSC LAN8187",
320 
321 	/* PHY_BASIC_FEATURES */
322 
323 	.probe		= smsc_phy_probe,
324 
325 	/* basic functions */
326 	.config_init	= smsc_phy_config_init,
327 	.soft_reset	= smsc_phy_reset,
328 
329 	/* IRQ related */
330 	.config_intr	= smsc_phy_config_intr,
331 	.handle_interrupt = smsc_phy_handle_interrupt,
332 
333 	/* Statistics */
334 	.get_sset_count = smsc_get_sset_count,
335 	.get_strings	= smsc_get_strings,
336 	.get_stats	= smsc_get_stats,
337 
338 	.suspend	= genphy_suspend,
339 	.resume		= genphy_resume,
340 }, {
341 	/* This covers internal PHY (phy_id: 0x0007C0C3) for
342 	 * LAN9500 (PID: 0x9500), LAN9514 (PID: 0xec00), LAN9505 (PID: 0x9505)
343 	 */
344 	.phy_id		= 0x0007c0c0, /* OUI=0x00800f, Model#=0x0c */
345 	.phy_id_mask	= 0xfffffff0,
346 	.name		= "SMSC LAN8700",
347 
348 	/* PHY_BASIC_FEATURES */
349 
350 	.probe		= smsc_phy_probe,
351 
352 	/* basic functions */
353 	.read_status	= lan87xx_read_status,
354 	.config_init	= smsc_phy_config_init,
355 	.soft_reset	= smsc_phy_reset,
356 	.config_aneg	= lan87xx_config_aneg,
357 
358 	/* IRQ related */
359 	.config_intr	= smsc_phy_config_intr,
360 	.handle_interrupt = smsc_phy_handle_interrupt,
361 
362 	/* Statistics */
363 	.get_sset_count = smsc_get_sset_count,
364 	.get_strings	= smsc_get_strings,
365 	.get_stats	= smsc_get_stats,
366 
367 	.suspend	= genphy_suspend,
368 	.resume		= genphy_resume,
369 }, {
370 	.phy_id		= 0x0007c0d0, /* OUI=0x00800f, Model#=0x0d */
371 	.phy_id_mask	= 0xfffffff0,
372 	.name		= "SMSC LAN911x Internal PHY",
373 
374 	/* PHY_BASIC_FEATURES */
375 
376 	.probe		= smsc_phy_probe,
377 
378 	/* IRQ related */
379 	.config_intr	= smsc_phy_config_intr,
380 	.handle_interrupt = smsc_phy_handle_interrupt,
381 
382 	.suspend	= genphy_suspend,
383 	.resume		= genphy_resume,
384 }, {
385 	/* This covers internal PHY (phy_id: 0x0007C0F0) for
386 	 * LAN9500A (PID: 0x9E00), LAN9505A (PID: 0x9E01)
387 	 */
388 	.phy_id		= 0x0007c0f0, /* OUI=0x00800f, Model#=0x0f */
389 	.phy_id_mask	= 0xfffffff0,
390 	.name		= "SMSC LAN8710/LAN8720",
391 
392 	/* PHY_BASIC_FEATURES */
393 
394 	.probe		= smsc_phy_probe,
395 
396 	/* basic functions */
397 	.read_status	= lan87xx_read_status,
398 	.config_init	= smsc_phy_config_init,
399 	.soft_reset	= smsc_phy_reset,
400 	.config_aneg	= lan95xx_config_aneg_ext,
401 
402 	/* IRQ related */
403 	.config_intr	= smsc_phy_config_intr,
404 	.handle_interrupt = smsc_phy_handle_interrupt,
405 
406 	/* Statistics */
407 	.get_sset_count = smsc_get_sset_count,
408 	.get_strings	= smsc_get_strings,
409 	.get_stats	= smsc_get_stats,
410 
411 	.suspend	= genphy_suspend,
412 	.resume		= genphy_resume,
413 }, {
414 	.phy_id		= 0x0007c110,
415 	.phy_id_mask	= 0xfffffff0,
416 	.name		= "SMSC LAN8740",
417 
418 	/* PHY_BASIC_FEATURES */
419 	.flags		= PHY_RST_AFTER_CLK_EN,
420 
421 	.probe		= smsc_phy_probe,
422 
423 	/* basic functions */
424 	.read_status	= lan87xx_read_status,
425 	.config_init	= smsc_phy_config_init,
426 	.soft_reset	= smsc_phy_reset,
427 
428 	/* IRQ related */
429 	.config_intr	= smsc_phy_config_intr,
430 	.handle_interrupt = smsc_phy_handle_interrupt,
431 
432 	/* Statistics */
433 	.get_sset_count = smsc_get_sset_count,
434 	.get_strings	= smsc_get_strings,
435 	.get_stats	= smsc_get_stats,
436 
437 	.suspend	= genphy_suspend,
438 	.resume		= genphy_resume,
439 }, {
440 	.phy_id		= 0x0007c130,	/* 0x0007c130 and 0x0007c131 */
441 	/* This mask (0xfffffff2) is to differentiate from
442 	 * LAN88xx (phy_id 0x0007c132)
443 	 * and allows future phy_id revisions.
444 	 */
445 	.phy_id_mask	= 0xfffffff2,
446 	.name		= "Microchip LAN8742",
447 
448 	/* PHY_BASIC_FEATURES */
449 	.flags		= PHY_RST_AFTER_CLK_EN,
450 
451 	.probe		= smsc_phy_probe,
452 
453 	/* basic functions */
454 	.read_status	= lan87xx_read_status,
455 	.config_init	= smsc_phy_config_init,
456 	.soft_reset	= smsc_phy_reset,
457 
458 	/* IRQ related */
459 	.config_intr	= smsc_phy_config_intr,
460 	.handle_interrupt = smsc_phy_handle_interrupt,
461 
462 	/* Statistics */
463 	.get_sset_count = smsc_get_sset_count,
464 	.get_strings	= smsc_get_strings,
465 	.get_stats	= smsc_get_stats,
466 
467 	.suspend	= genphy_suspend,
468 	.resume		= genphy_resume,
469 } };
470 
471 module_phy_driver(smsc_phy_driver);
472 
473 MODULE_DESCRIPTION("SMSC PHY driver");
474 MODULE_AUTHOR("Herbert Valerio Riedel");
475 MODULE_LICENSE("GPL");
476 
477 static struct mdio_device_id __maybe_unused smsc_tbl[] = {
478 	{ 0x0007c0a0, 0xfffffff0 },
479 	{ 0x0007c0b0, 0xfffffff0 },
480 	{ 0x0007c0c0, 0xfffffff0 },
481 	{ 0x0007c0d0, 0xfffffff0 },
482 	{ 0x0007c0f0, 0xfffffff0 },
483 	{ 0x0007c110, 0xfffffff0 },
484 	{ 0x0007c130, 0xfffffff2 },
485 	{ }
486 };
487 
488 MODULE_DEVICE_TABLE(mdio, smsc_tbl);
489