xref: /linux/drivers/net/phy/phylink.c (revision fc1ca3348a74a1afaa7ffebc2b2f2cc149e11278)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * phylink models the MAC to optional PHY connection, supporting
4  * technologies such as SFP cages where the PHY is hot-pluggable.
5  *
6  * Copyright (C) 2015 Russell King
7  */
8 #include <linux/acpi.h>
9 #include <linux/ethtool.h>
10 #include <linux/export.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/netdevice.h>
13 #include <linux/of.h>
14 #include <linux/of_mdio.h>
15 #include <linux/phy.h>
16 #include <linux/phy_fixed.h>
17 #include <linux/phylink.h>
18 #include <linux/rtnetlink.h>
19 #include <linux/spinlock.h>
20 #include <linux/timer.h>
21 #include <linux/workqueue.h>
22 
23 #include "sfp.h"
24 #include "swphy.h"
25 
26 #define SUPPORTED_INTERFACES \
27 	(SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \
28 	 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane)
29 #define ADVERTISED_INTERFACES \
30 	(ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \
31 	 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane)
32 
33 enum {
34 	PHYLINK_DISABLE_STOPPED,
35 	PHYLINK_DISABLE_LINK,
36 	PHYLINK_DISABLE_MAC_WOL,
37 };
38 
39 /**
40  * struct phylink - internal data type for phylink
41  */
42 struct phylink {
43 	/* private: */
44 	struct net_device *netdev;
45 	const struct phylink_mac_ops *mac_ops;
46 	const struct phylink_pcs_ops *pcs_ops;
47 	struct phylink_config *config;
48 	struct phylink_pcs *pcs;
49 	struct device *dev;
50 	unsigned int old_link_state:1;
51 
52 	unsigned long phylink_disable_state; /* bitmask of disables */
53 	struct phy_device *phydev;
54 	phy_interface_t link_interface;	/* PHY_INTERFACE_xxx */
55 	u8 cfg_link_an_mode;		/* MLO_AN_xxx */
56 	u8 cur_link_an_mode;
57 	u8 link_port;			/* The current non-phy ethtool port */
58 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
59 
60 	/* The link configuration settings */
61 	struct phylink_link_state link_config;
62 
63 	/* The current settings */
64 	phy_interface_t cur_interface;
65 
66 	struct gpio_desc *link_gpio;
67 	unsigned int link_irq;
68 	struct timer_list link_poll;
69 	void (*get_fixed_state)(struct net_device *dev,
70 				struct phylink_link_state *s);
71 
72 	struct mutex state_mutex;
73 	struct phylink_link_state phy_state;
74 	struct work_struct resolve;
75 
76 	bool mac_link_dropped;
77 
78 	struct sfp_bus *sfp_bus;
79 	bool sfp_may_have_phy;
80 	__ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support);
81 	u8 sfp_port;
82 };
83 
84 #define phylink_printk(level, pl, fmt, ...) \
85 	do { \
86 		if ((pl)->config->type == PHYLINK_NETDEV) \
87 			netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \
88 		else if ((pl)->config->type == PHYLINK_DEV) \
89 			dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \
90 	} while (0)
91 
92 #define phylink_err(pl, fmt, ...) \
93 	phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__)
94 #define phylink_warn(pl, fmt, ...) \
95 	phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__)
96 #define phylink_info(pl, fmt, ...) \
97 	phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__)
98 #if defined(CONFIG_DYNAMIC_DEBUG)
99 #define phylink_dbg(pl, fmt, ...) \
100 do {									\
101 	if ((pl)->config->type == PHYLINK_NETDEV)			\
102 		netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__);		\
103 	else if ((pl)->config->type == PHYLINK_DEV)			\
104 		dev_dbg((pl)->dev, fmt, ##__VA_ARGS__);			\
105 } while (0)
106 #elif defined(DEBUG)
107 #define phylink_dbg(pl, fmt, ...)					\
108 	phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__)
109 #else
110 #define phylink_dbg(pl, fmt, ...)					\
111 ({									\
112 	if (0)								\
113 		phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__);	\
114 })
115 #endif
116 
117 /**
118  * phylink_set_port_modes() - set the port type modes in the ethtool mask
119  * @mask: ethtool link mode mask
120  *
121  * Sets all the port type modes in the ethtool mask.  MAC drivers should
122  * use this in their 'validate' callback.
123  */
124 void phylink_set_port_modes(unsigned long *mask)
125 {
126 	phylink_set(mask, TP);
127 	phylink_set(mask, AUI);
128 	phylink_set(mask, MII);
129 	phylink_set(mask, FIBRE);
130 	phylink_set(mask, BNC);
131 	phylink_set(mask, Backplane);
132 }
133 EXPORT_SYMBOL_GPL(phylink_set_port_modes);
134 
135 void phylink_set_10g_modes(unsigned long *mask)
136 {
137 	phylink_set(mask, 10000baseT_Full);
138 	phylink_set(mask, 10000baseCR_Full);
139 	phylink_set(mask, 10000baseSR_Full);
140 	phylink_set(mask, 10000baseLR_Full);
141 	phylink_set(mask, 10000baseLRM_Full);
142 	phylink_set(mask, 10000baseER_Full);
143 }
144 EXPORT_SYMBOL_GPL(phylink_set_10g_modes);
145 
146 static int phylink_is_empty_linkmode(const unsigned long *linkmode)
147 {
148 	__ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, };
149 
150 	phylink_set_port_modes(tmp);
151 	phylink_set(tmp, Autoneg);
152 	phylink_set(tmp, Pause);
153 	phylink_set(tmp, Asym_Pause);
154 
155 	return linkmode_subset(linkmode, tmp);
156 }
157 
158 static const char *phylink_an_mode_str(unsigned int mode)
159 {
160 	static const char *modestr[] = {
161 		[MLO_AN_PHY] = "phy",
162 		[MLO_AN_FIXED] = "fixed",
163 		[MLO_AN_INBAND] = "inband",
164 	};
165 
166 	return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown";
167 }
168 
169 static void phylink_caps_to_linkmodes(unsigned long *linkmodes,
170 				      unsigned long caps)
171 {
172 	if (caps & MAC_SYM_PAUSE)
173 		__set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes);
174 
175 	if (caps & MAC_ASYM_PAUSE)
176 		__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes);
177 
178 	if (caps & MAC_10HD)
179 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes);
180 
181 	if (caps & MAC_10FD)
182 		__set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes);
183 
184 	if (caps & MAC_100HD) {
185 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes);
186 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes);
187 	}
188 
189 	if (caps & MAC_100FD) {
190 		__set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes);
191 		__set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes);
192 		__set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes);
193 	}
194 
195 	if (caps & MAC_1000HD)
196 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes);
197 
198 	if (caps & MAC_1000FD) {
199 		__set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes);
200 		__set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes);
201 		__set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes);
202 		__set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes);
203 	}
204 
205 	if (caps & MAC_2500FD) {
206 		__set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes);
207 		__set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes);
208 	}
209 
210 	if (caps & MAC_5000FD)
211 		__set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes);
212 
213 	if (caps & MAC_10000FD) {
214 		__set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes);
215 		__set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes);
216 		__set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes);
217 		__set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes);
218 		__set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes);
219 		__set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes);
220 		__set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes);
221 		__set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes);
222 		__set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes);
223 	}
224 
225 	if (caps & MAC_25000FD) {
226 		__set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes);
227 		__set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes);
228 		__set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes);
229 	}
230 
231 	if (caps & MAC_40000FD) {
232 		__set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes);
233 		__set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes);
234 		__set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes);
235 		__set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes);
236 	}
237 
238 	if (caps & MAC_50000FD) {
239 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes);
240 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes);
241 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes);
242 		__set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes);
243 		__set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes);
244 		__set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes);
245 		__set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT,
246 			  linkmodes);
247 		__set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes);
248 	}
249 
250 	if (caps & MAC_56000FD) {
251 		__set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes);
252 		__set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes);
253 		__set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes);
254 		__set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes);
255 	}
256 
257 	if (caps & MAC_100000FD) {
258 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes);
259 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes);
260 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes);
261 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT,
262 			  linkmodes);
263 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes);
264 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes);
265 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes);
266 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT,
267 			  linkmodes);
268 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes);
269 		__set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes);
270 		__set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes);
271 		__set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT,
272 			  linkmodes);
273 		__set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes);
274 		__set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes);
275 	}
276 
277 	if (caps & MAC_200000FD) {
278 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes);
279 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes);
280 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT,
281 			  linkmodes);
282 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes);
283 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes);
284 		__set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes);
285 		__set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes);
286 		__set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT,
287 			  linkmodes);
288 		__set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes);
289 		__set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes);
290 	}
291 
292 	if (caps & MAC_400000FD) {
293 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes);
294 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes);
295 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT,
296 			  linkmodes);
297 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes);
298 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes);
299 		__set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes);
300 		__set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes);
301 		__set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT,
302 			  linkmodes);
303 		__set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes);
304 		__set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes);
305 	}
306 }
307 
308 /**
309  * phylink_get_linkmodes() - get acceptable link modes
310  * @linkmodes: ethtool linkmode mask (must be already initialised)
311  * @interface: phy interface mode defined by &typedef phy_interface_t
312  * @mac_capabilities: bitmask of MAC capabilities
313  *
314  * Set all possible pause, speed and duplex linkmodes in @linkmodes that
315  * are supported by the @interface mode and @mac_capabilities. @linkmodes
316  * must have been initialised previously.
317  */
318 void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface,
319 			   unsigned long mac_capabilities)
320 {
321 	unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE;
322 
323 	switch (interface) {
324 	case PHY_INTERFACE_MODE_USXGMII:
325 		caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD;
326 		fallthrough;
327 
328 	case PHY_INTERFACE_MODE_RGMII_TXID:
329 	case PHY_INTERFACE_MODE_RGMII_RXID:
330 	case PHY_INTERFACE_MODE_RGMII_ID:
331 	case PHY_INTERFACE_MODE_RGMII:
332 	case PHY_INTERFACE_MODE_QSGMII:
333 	case PHY_INTERFACE_MODE_SGMII:
334 	case PHY_INTERFACE_MODE_GMII:
335 		caps |= MAC_1000HD | MAC_1000FD;
336 		fallthrough;
337 
338 	case PHY_INTERFACE_MODE_REVRMII:
339 	case PHY_INTERFACE_MODE_RMII:
340 	case PHY_INTERFACE_MODE_SMII:
341 	case PHY_INTERFACE_MODE_REVMII:
342 	case PHY_INTERFACE_MODE_MII:
343 		caps |= MAC_10HD | MAC_10FD;
344 		fallthrough;
345 
346 	case PHY_INTERFACE_MODE_100BASEX:
347 		caps |= MAC_100HD | MAC_100FD;
348 		break;
349 
350 	case PHY_INTERFACE_MODE_TBI:
351 	case PHY_INTERFACE_MODE_MOCA:
352 	case PHY_INTERFACE_MODE_RTBI:
353 	case PHY_INTERFACE_MODE_1000BASEX:
354 		caps |= MAC_1000HD;
355 		fallthrough;
356 	case PHY_INTERFACE_MODE_TRGMII:
357 		caps |= MAC_1000FD;
358 		break;
359 
360 	case PHY_INTERFACE_MODE_2500BASEX:
361 		caps |= MAC_2500FD;
362 		break;
363 
364 	case PHY_INTERFACE_MODE_5GBASER:
365 		caps |= MAC_5000FD;
366 		break;
367 
368 	case PHY_INTERFACE_MODE_XGMII:
369 	case PHY_INTERFACE_MODE_RXAUI:
370 	case PHY_INTERFACE_MODE_XAUI:
371 	case PHY_INTERFACE_MODE_10GBASER:
372 	case PHY_INTERFACE_MODE_10GKR:
373 		caps |= MAC_10000FD;
374 		break;
375 
376 	case PHY_INTERFACE_MODE_25GBASER:
377 		caps |= MAC_25000FD;
378 		break;
379 
380 	case PHY_INTERFACE_MODE_XLGMII:
381 		caps |= MAC_40000FD;
382 		break;
383 
384 	case PHY_INTERFACE_MODE_INTERNAL:
385 		caps |= ~0;
386 		break;
387 
388 	case PHY_INTERFACE_MODE_NA:
389 	case PHY_INTERFACE_MODE_MAX:
390 		break;
391 	}
392 
393 	phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities);
394 }
395 EXPORT_SYMBOL_GPL(phylink_get_linkmodes);
396 
397 /**
398  * phylink_generic_validate() - generic validate() callback implementation
399  * @config: a pointer to a &struct phylink_config.
400  * @supported: ethtool bitmask for supported link modes.
401  * @state: a pointer to a &struct phylink_link_state.
402  *
403  * Generic implementation of the validate() callback that MAC drivers can
404  * use when they pass the range of supported interfaces and MAC capabilities.
405  * This makes use of phylink_get_linkmodes().
406  */
407 void phylink_generic_validate(struct phylink_config *config,
408 			      unsigned long *supported,
409 			      struct phylink_link_state *state)
410 {
411 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
412 
413 	phylink_set_port_modes(mask);
414 	phylink_set(mask, Autoneg);
415 	phylink_get_linkmodes(mask, state->interface, config->mac_capabilities);
416 
417 	linkmode_and(supported, supported, mask);
418 	linkmode_and(state->advertising, state->advertising, mask);
419 }
420 EXPORT_SYMBOL_GPL(phylink_generic_validate);
421 
422 static int phylink_validate_any(struct phylink *pl, unsigned long *supported,
423 				struct phylink_link_state *state)
424 {
425 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, };
426 	__ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, };
427 	__ETHTOOL_DECLARE_LINK_MODE_MASK(s);
428 	struct phylink_link_state t;
429 	int intf;
430 
431 	for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) {
432 		if (test_bit(intf, pl->config->supported_interfaces)) {
433 			linkmode_copy(s, supported);
434 
435 			t = *state;
436 			t.interface = intf;
437 			pl->mac_ops->validate(pl->config, s, &t);
438 			linkmode_or(all_s, all_s, s);
439 			linkmode_or(all_adv, all_adv, t.advertising);
440 		}
441 	}
442 
443 	linkmode_copy(supported, all_s);
444 	linkmode_copy(state->advertising, all_adv);
445 
446 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
447 }
448 
449 static int phylink_validate(struct phylink *pl, unsigned long *supported,
450 			    struct phylink_link_state *state)
451 {
452 	if (!phy_interface_empty(pl->config->supported_interfaces)) {
453 		if (state->interface == PHY_INTERFACE_MODE_NA)
454 			return phylink_validate_any(pl, supported, state);
455 
456 		if (!test_bit(state->interface,
457 			      pl->config->supported_interfaces))
458 			return -EINVAL;
459 	}
460 
461 	pl->mac_ops->validate(pl->config, supported, state);
462 
463 	return phylink_is_empty_linkmode(supported) ? -EINVAL : 0;
464 }
465 
466 static int phylink_parse_fixedlink(struct phylink *pl,
467 				   struct fwnode_handle *fwnode)
468 {
469 	struct fwnode_handle *fixed_node;
470 	const struct phy_setting *s;
471 	struct gpio_desc *desc;
472 	u32 speed;
473 	int ret;
474 
475 	fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link");
476 	if (fixed_node) {
477 		ret = fwnode_property_read_u32(fixed_node, "speed", &speed);
478 
479 		pl->link_config.speed = speed;
480 		pl->link_config.duplex = DUPLEX_HALF;
481 
482 		if (fwnode_property_read_bool(fixed_node, "full-duplex"))
483 			pl->link_config.duplex = DUPLEX_FULL;
484 
485 		/* We treat the "pause" and "asym-pause" terminology as
486 		 * defining the link partner's ability.
487 		 */
488 		if (fwnode_property_read_bool(fixed_node, "pause"))
489 			__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
490 				  pl->link_config.lp_advertising);
491 		if (fwnode_property_read_bool(fixed_node, "asym-pause"))
492 			__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
493 				  pl->link_config.lp_advertising);
494 
495 		if (ret == 0) {
496 			desc = fwnode_gpiod_get_index(fixed_node, "link", 0,
497 						      GPIOD_IN, "?");
498 
499 			if (!IS_ERR(desc))
500 				pl->link_gpio = desc;
501 			else if (desc == ERR_PTR(-EPROBE_DEFER))
502 				ret = -EPROBE_DEFER;
503 		}
504 		fwnode_handle_put(fixed_node);
505 
506 		if (ret)
507 			return ret;
508 	} else {
509 		u32 prop[5];
510 
511 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
512 						     NULL, 0);
513 		if (ret != ARRAY_SIZE(prop)) {
514 			phylink_err(pl, "broken fixed-link?\n");
515 			return -EINVAL;
516 		}
517 
518 		ret = fwnode_property_read_u32_array(fwnode, "fixed-link",
519 						     prop, ARRAY_SIZE(prop));
520 		if (!ret) {
521 			pl->link_config.duplex = prop[1] ?
522 						DUPLEX_FULL : DUPLEX_HALF;
523 			pl->link_config.speed = prop[2];
524 			if (prop[3])
525 				__set_bit(ETHTOOL_LINK_MODE_Pause_BIT,
526 					  pl->link_config.lp_advertising);
527 			if (prop[4])
528 				__set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
529 					  pl->link_config.lp_advertising);
530 		}
531 	}
532 
533 	if (pl->link_config.speed > SPEED_1000 &&
534 	    pl->link_config.duplex != DUPLEX_FULL)
535 		phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n",
536 			     pl->link_config.speed);
537 
538 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
539 	linkmode_copy(pl->link_config.advertising, pl->supported);
540 	phylink_validate(pl, pl->supported, &pl->link_config);
541 
542 	s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex,
543 			       pl->supported, true);
544 	linkmode_zero(pl->supported);
545 	phylink_set(pl->supported, MII);
546 	phylink_set(pl->supported, Pause);
547 	phylink_set(pl->supported, Asym_Pause);
548 	phylink_set(pl->supported, Autoneg);
549 	if (s) {
550 		__set_bit(s->bit, pl->supported);
551 		__set_bit(s->bit, pl->link_config.lp_advertising);
552 	} else {
553 		phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n",
554 			     pl->link_config.duplex == DUPLEX_FULL ? "full" : "half",
555 			     pl->link_config.speed);
556 	}
557 
558 	linkmode_and(pl->link_config.advertising, pl->link_config.advertising,
559 		     pl->supported);
560 
561 	pl->link_config.link = 1;
562 	pl->link_config.an_complete = 1;
563 
564 	return 0;
565 }
566 
567 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode)
568 {
569 	struct fwnode_handle *dn;
570 	const char *managed;
571 
572 	dn = fwnode_get_named_child_node(fwnode, "fixed-link");
573 	if (dn || fwnode_property_present(fwnode, "fixed-link"))
574 		pl->cfg_link_an_mode = MLO_AN_FIXED;
575 	fwnode_handle_put(dn);
576 
577 	if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 &&
578 	     strcmp(managed, "in-band-status") == 0) ||
579 	    pl->config->ovr_an_inband) {
580 		if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
581 			phylink_err(pl,
582 				    "can't use both fixed-link and in-band-status\n");
583 			return -EINVAL;
584 		}
585 
586 		linkmode_zero(pl->supported);
587 		phylink_set(pl->supported, MII);
588 		phylink_set(pl->supported, Autoneg);
589 		phylink_set(pl->supported, Asym_Pause);
590 		phylink_set(pl->supported, Pause);
591 		pl->link_config.an_enabled = true;
592 		pl->cfg_link_an_mode = MLO_AN_INBAND;
593 
594 		switch (pl->link_config.interface) {
595 		case PHY_INTERFACE_MODE_SGMII:
596 		case PHY_INTERFACE_MODE_QSGMII:
597 			phylink_set(pl->supported, 10baseT_Half);
598 			phylink_set(pl->supported, 10baseT_Full);
599 			phylink_set(pl->supported, 100baseT_Half);
600 			phylink_set(pl->supported, 100baseT_Full);
601 			phylink_set(pl->supported, 1000baseT_Half);
602 			phylink_set(pl->supported, 1000baseT_Full);
603 			break;
604 
605 		case PHY_INTERFACE_MODE_1000BASEX:
606 			phylink_set(pl->supported, 1000baseX_Full);
607 			break;
608 
609 		case PHY_INTERFACE_MODE_2500BASEX:
610 			phylink_set(pl->supported, 2500baseX_Full);
611 			break;
612 
613 		case PHY_INTERFACE_MODE_5GBASER:
614 			phylink_set(pl->supported, 5000baseT_Full);
615 			break;
616 
617 		case PHY_INTERFACE_MODE_25GBASER:
618 			phylink_set(pl->supported, 25000baseCR_Full);
619 			phylink_set(pl->supported, 25000baseKR_Full);
620 			phylink_set(pl->supported, 25000baseSR_Full);
621 			fallthrough;
622 		case PHY_INTERFACE_MODE_USXGMII:
623 		case PHY_INTERFACE_MODE_10GKR:
624 		case PHY_INTERFACE_MODE_10GBASER:
625 			phylink_set(pl->supported, 10baseT_Half);
626 			phylink_set(pl->supported, 10baseT_Full);
627 			phylink_set(pl->supported, 100baseT_Half);
628 			phylink_set(pl->supported, 100baseT_Full);
629 			phylink_set(pl->supported, 1000baseT_Half);
630 			phylink_set(pl->supported, 1000baseT_Full);
631 			phylink_set(pl->supported, 1000baseX_Full);
632 			phylink_set(pl->supported, 1000baseKX_Full);
633 			phylink_set(pl->supported, 2500baseT_Full);
634 			phylink_set(pl->supported, 2500baseX_Full);
635 			phylink_set(pl->supported, 5000baseT_Full);
636 			phylink_set(pl->supported, 10000baseT_Full);
637 			phylink_set(pl->supported, 10000baseKR_Full);
638 			phylink_set(pl->supported, 10000baseKX4_Full);
639 			phylink_set(pl->supported, 10000baseCR_Full);
640 			phylink_set(pl->supported, 10000baseSR_Full);
641 			phylink_set(pl->supported, 10000baseLR_Full);
642 			phylink_set(pl->supported, 10000baseLRM_Full);
643 			phylink_set(pl->supported, 10000baseER_Full);
644 			break;
645 
646 		case PHY_INTERFACE_MODE_XLGMII:
647 			phylink_set(pl->supported, 25000baseCR_Full);
648 			phylink_set(pl->supported, 25000baseKR_Full);
649 			phylink_set(pl->supported, 25000baseSR_Full);
650 			phylink_set(pl->supported, 40000baseKR4_Full);
651 			phylink_set(pl->supported, 40000baseCR4_Full);
652 			phylink_set(pl->supported, 40000baseSR4_Full);
653 			phylink_set(pl->supported, 40000baseLR4_Full);
654 			phylink_set(pl->supported, 50000baseCR2_Full);
655 			phylink_set(pl->supported, 50000baseKR2_Full);
656 			phylink_set(pl->supported, 50000baseSR2_Full);
657 			phylink_set(pl->supported, 50000baseKR_Full);
658 			phylink_set(pl->supported, 50000baseSR_Full);
659 			phylink_set(pl->supported, 50000baseCR_Full);
660 			phylink_set(pl->supported, 50000baseLR_ER_FR_Full);
661 			phylink_set(pl->supported, 50000baseDR_Full);
662 			phylink_set(pl->supported, 100000baseKR4_Full);
663 			phylink_set(pl->supported, 100000baseSR4_Full);
664 			phylink_set(pl->supported, 100000baseCR4_Full);
665 			phylink_set(pl->supported, 100000baseLR4_ER4_Full);
666 			phylink_set(pl->supported, 100000baseKR2_Full);
667 			phylink_set(pl->supported, 100000baseSR2_Full);
668 			phylink_set(pl->supported, 100000baseCR2_Full);
669 			phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full);
670 			phylink_set(pl->supported, 100000baseDR2_Full);
671 			break;
672 
673 		default:
674 			phylink_err(pl,
675 				    "incorrect link mode %s for in-band status\n",
676 				    phy_modes(pl->link_config.interface));
677 			return -EINVAL;
678 		}
679 
680 		linkmode_copy(pl->link_config.advertising, pl->supported);
681 
682 		if (phylink_validate(pl, pl->supported, &pl->link_config)) {
683 			phylink_err(pl,
684 				    "failed to validate link configuration for in-band status\n");
685 			return -EINVAL;
686 		}
687 
688 		/* Check if MAC/PCS also supports Autoneg. */
689 		pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg);
690 	}
691 
692 	return 0;
693 }
694 
695 static void phylink_apply_manual_flow(struct phylink *pl,
696 				      struct phylink_link_state *state)
697 {
698 	/* If autoneg is disabled, pause AN is also disabled */
699 	if (!state->an_enabled)
700 		state->pause &= ~MLO_PAUSE_AN;
701 
702 	/* Manual configuration of pause modes */
703 	if (!(pl->link_config.pause & MLO_PAUSE_AN))
704 		state->pause = pl->link_config.pause;
705 }
706 
707 static void phylink_resolve_flow(struct phylink_link_state *state)
708 {
709 	bool tx_pause, rx_pause;
710 
711 	state->pause = MLO_PAUSE_NONE;
712 	if (state->duplex == DUPLEX_FULL) {
713 		linkmode_resolve_pause(state->advertising,
714 				       state->lp_advertising,
715 				       &tx_pause, &rx_pause);
716 		if (tx_pause)
717 			state->pause |= MLO_PAUSE_TX;
718 		if (rx_pause)
719 			state->pause |= MLO_PAUSE_RX;
720 	}
721 }
722 
723 static void phylink_mac_config(struct phylink *pl,
724 			       const struct phylink_link_state *state)
725 {
726 	phylink_dbg(pl,
727 		    "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n",
728 		    __func__, phylink_an_mode_str(pl->cur_link_an_mode),
729 		    phy_modes(state->interface),
730 		    phy_speed_to_str(state->speed),
731 		    phy_duplex_to_str(state->duplex),
732 		    __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising,
733 		    state->pause, state->link, state->an_enabled);
734 
735 	pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state);
736 }
737 
738 static void phylink_mac_pcs_an_restart(struct phylink *pl)
739 {
740 	if (pl->link_config.an_enabled &&
741 	    phy_interface_mode_is_8023z(pl->link_config.interface) &&
742 	    phylink_autoneg_inband(pl->cur_link_an_mode)) {
743 		if (pl->pcs_ops)
744 			pl->pcs_ops->pcs_an_restart(pl->pcs);
745 		else
746 			pl->mac_ops->mac_an_restart(pl->config);
747 	}
748 }
749 
750 static void phylink_major_config(struct phylink *pl, bool restart,
751 				  const struct phylink_link_state *state)
752 {
753 	int err;
754 
755 	phylink_dbg(pl, "major config %s\n", phy_modes(state->interface));
756 
757 	if (pl->mac_ops->mac_prepare) {
758 		err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode,
759 					       state->interface);
760 		if (err < 0) {
761 			phylink_err(pl, "mac_prepare failed: %pe\n",
762 				    ERR_PTR(err));
763 			return;
764 		}
765 	}
766 
767 	phylink_mac_config(pl, state);
768 
769 	if (pl->pcs_ops) {
770 		err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
771 					      state->interface,
772 					      state->advertising,
773 					      !!(pl->link_config.pause &
774 						 MLO_PAUSE_AN));
775 		if (err < 0)
776 			phylink_err(pl, "pcs_config failed: %pe\n",
777 				    ERR_PTR(err));
778 		if (err > 0)
779 			restart = true;
780 	}
781 	if (restart)
782 		phylink_mac_pcs_an_restart(pl);
783 
784 	if (pl->mac_ops->mac_finish) {
785 		err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode,
786 					      state->interface);
787 		if (err < 0)
788 			phylink_err(pl, "mac_finish failed: %pe\n",
789 				    ERR_PTR(err));
790 	}
791 }
792 
793 /*
794  * Reconfigure for a change of inband advertisement.
795  * If we have a separate PCS, we only need to call its pcs_config() method,
796  * and then restart AN if it indicates something changed. Otherwise, we do
797  * the full MAC reconfiguration.
798  */
799 static int phylink_change_inband_advert(struct phylink *pl)
800 {
801 	int ret;
802 
803 	if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state))
804 		return 0;
805 
806 	if (!pl->pcs_ops) {
807 		/* Legacy method */
808 		phylink_mac_config(pl, &pl->link_config);
809 		phylink_mac_pcs_an_restart(pl);
810 		return 0;
811 	}
812 
813 	phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__,
814 		    phylink_an_mode_str(pl->cur_link_an_mode),
815 		    phy_modes(pl->link_config.interface),
816 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising,
817 		    pl->link_config.pause);
818 
819 	/* Modern PCS-based method; update the advert at the PCS, and
820 	 * restart negotiation if the pcs_config() helper indicates that
821 	 * the programmed advertisement has changed.
822 	 */
823 	ret = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode,
824 				      pl->link_config.interface,
825 				      pl->link_config.advertising,
826 				      !!(pl->link_config.pause & MLO_PAUSE_AN));
827 	if (ret < 0)
828 		return ret;
829 
830 	if (ret > 0)
831 		phylink_mac_pcs_an_restart(pl);
832 
833 	return 0;
834 }
835 
836 static void phylink_mac_pcs_get_state(struct phylink *pl,
837 				      struct phylink_link_state *state)
838 {
839 	linkmode_copy(state->advertising, pl->link_config.advertising);
840 	linkmode_zero(state->lp_advertising);
841 	state->interface = pl->link_config.interface;
842 	state->an_enabled = pl->link_config.an_enabled;
843 	if  (state->an_enabled) {
844 		state->speed = SPEED_UNKNOWN;
845 		state->duplex = DUPLEX_UNKNOWN;
846 		state->pause = MLO_PAUSE_NONE;
847 	} else {
848 		state->speed =  pl->link_config.speed;
849 		state->duplex = pl->link_config.duplex;
850 		state->pause = pl->link_config.pause;
851 	}
852 	state->an_complete = 0;
853 	state->link = 1;
854 
855 	if (pl->pcs_ops)
856 		pl->pcs_ops->pcs_get_state(pl->pcs, state);
857 	else if (pl->mac_ops->mac_pcs_get_state)
858 		pl->mac_ops->mac_pcs_get_state(pl->config, state);
859 	else
860 		state->link = 0;
861 }
862 
863 /* The fixed state is... fixed except for the link state,
864  * which may be determined by a GPIO or a callback.
865  */
866 static void phylink_get_fixed_state(struct phylink *pl,
867 				    struct phylink_link_state *state)
868 {
869 	*state = pl->link_config;
870 	if (pl->config->get_fixed_state)
871 		pl->config->get_fixed_state(pl->config, state);
872 	else if (pl->link_gpio)
873 		state->link = !!gpiod_get_value_cansleep(pl->link_gpio);
874 
875 	phylink_resolve_flow(state);
876 }
877 
878 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart)
879 {
880 	struct phylink_link_state link_state;
881 
882 	switch (pl->cur_link_an_mode) {
883 	case MLO_AN_PHY:
884 		link_state = pl->phy_state;
885 		break;
886 
887 	case MLO_AN_FIXED:
888 		phylink_get_fixed_state(pl, &link_state);
889 		break;
890 
891 	case MLO_AN_INBAND:
892 		link_state = pl->link_config;
893 		if (link_state.interface == PHY_INTERFACE_MODE_SGMII)
894 			link_state.pause = MLO_PAUSE_NONE;
895 		break;
896 
897 	default: /* can't happen */
898 		return;
899 	}
900 
901 	link_state.link = false;
902 
903 	phylink_apply_manual_flow(pl, &link_state);
904 	phylink_major_config(pl, force_restart, &link_state);
905 }
906 
907 static const char *phylink_pause_to_str(int pause)
908 {
909 	switch (pause & MLO_PAUSE_TXRX_MASK) {
910 	case MLO_PAUSE_TX | MLO_PAUSE_RX:
911 		return "rx/tx";
912 	case MLO_PAUSE_TX:
913 		return "tx";
914 	case MLO_PAUSE_RX:
915 		return "rx";
916 	default:
917 		return "off";
918 	}
919 }
920 
921 static void phylink_link_up(struct phylink *pl,
922 			    struct phylink_link_state link_state)
923 {
924 	struct net_device *ndev = pl->netdev;
925 
926 	pl->cur_interface = link_state.interface;
927 
928 	if (pl->pcs_ops && pl->pcs_ops->pcs_link_up)
929 		pl->pcs_ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode,
930 					 pl->cur_interface,
931 					 link_state.speed, link_state.duplex);
932 
933 	pl->mac_ops->mac_link_up(pl->config, pl->phydev,
934 				 pl->cur_link_an_mode, pl->cur_interface,
935 				 link_state.speed, link_state.duplex,
936 				 !!(link_state.pause & MLO_PAUSE_TX),
937 				 !!(link_state.pause & MLO_PAUSE_RX));
938 
939 	if (ndev)
940 		netif_carrier_on(ndev);
941 
942 	phylink_info(pl,
943 		     "Link is Up - %s/%s - flow control %s\n",
944 		     phy_speed_to_str(link_state.speed),
945 		     phy_duplex_to_str(link_state.duplex),
946 		     phylink_pause_to_str(link_state.pause));
947 }
948 
949 static void phylink_link_down(struct phylink *pl)
950 {
951 	struct net_device *ndev = pl->netdev;
952 
953 	if (ndev)
954 		netif_carrier_off(ndev);
955 	pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode,
956 				   pl->cur_interface);
957 	phylink_info(pl, "Link is Down\n");
958 }
959 
960 static void phylink_resolve(struct work_struct *w)
961 {
962 	struct phylink *pl = container_of(w, struct phylink, resolve);
963 	struct phylink_link_state link_state;
964 	struct net_device *ndev = pl->netdev;
965 	bool mac_config = false;
966 	bool cur_link_state;
967 
968 	mutex_lock(&pl->state_mutex);
969 	if (pl->netdev)
970 		cur_link_state = netif_carrier_ok(ndev);
971 	else
972 		cur_link_state = pl->old_link_state;
973 
974 	if (pl->phylink_disable_state) {
975 		pl->mac_link_dropped = false;
976 		link_state.link = false;
977 	} else if (pl->mac_link_dropped) {
978 		link_state.link = false;
979 	} else {
980 		switch (pl->cur_link_an_mode) {
981 		case MLO_AN_PHY:
982 			link_state = pl->phy_state;
983 			phylink_apply_manual_flow(pl, &link_state);
984 			mac_config = link_state.link;
985 			break;
986 
987 		case MLO_AN_FIXED:
988 			phylink_get_fixed_state(pl, &link_state);
989 			mac_config = link_state.link;
990 			break;
991 
992 		case MLO_AN_INBAND:
993 			phylink_mac_pcs_get_state(pl, &link_state);
994 
995 			/* If we have a phy, the "up" state is the union of
996 			 * both the PHY and the MAC
997 			 */
998 			if (pl->phydev)
999 				link_state.link &= pl->phy_state.link;
1000 
1001 			/* Only update if the PHY link is up */
1002 			if (pl->phydev && pl->phy_state.link) {
1003 				link_state.interface = pl->phy_state.interface;
1004 
1005 				/* If we have a PHY, we need to update with
1006 				 * the PHY flow control bits.
1007 				 */
1008 				link_state.pause = pl->phy_state.pause;
1009 				mac_config = true;
1010 			}
1011 			phylink_apply_manual_flow(pl, &link_state);
1012 			break;
1013 		}
1014 	}
1015 
1016 	if (mac_config) {
1017 		if (link_state.interface != pl->link_config.interface) {
1018 			/* The interface has changed, force the link down and
1019 			 * then reconfigure.
1020 			 */
1021 			if (cur_link_state) {
1022 				phylink_link_down(pl);
1023 				cur_link_state = false;
1024 			}
1025 			phylink_major_config(pl, false, &link_state);
1026 			pl->link_config.interface = link_state.interface;
1027 		} else if (!pl->pcs_ops) {
1028 			/* The interface remains unchanged, only the speed,
1029 			 * duplex or pause settings have changed. Call the
1030 			 * old mac_config() method to configure the MAC/PCS
1031 			 * only if we do not have a PCS installed (an
1032 			 * unconverted user.)
1033 			 */
1034 			phylink_mac_config(pl, &link_state);
1035 		}
1036 	}
1037 
1038 	if (link_state.link != cur_link_state) {
1039 		pl->old_link_state = link_state.link;
1040 		if (!link_state.link)
1041 			phylink_link_down(pl);
1042 		else
1043 			phylink_link_up(pl, link_state);
1044 	}
1045 	if (!link_state.link && pl->mac_link_dropped) {
1046 		pl->mac_link_dropped = false;
1047 		queue_work(system_power_efficient_wq, &pl->resolve);
1048 	}
1049 	mutex_unlock(&pl->state_mutex);
1050 }
1051 
1052 static void phylink_run_resolve(struct phylink *pl)
1053 {
1054 	if (!pl->phylink_disable_state)
1055 		queue_work(system_power_efficient_wq, &pl->resolve);
1056 }
1057 
1058 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit)
1059 {
1060 	unsigned long state = pl->phylink_disable_state;
1061 
1062 	set_bit(bit, &pl->phylink_disable_state);
1063 	if (state == 0) {
1064 		queue_work(system_power_efficient_wq, &pl->resolve);
1065 		flush_work(&pl->resolve);
1066 	}
1067 }
1068 
1069 static void phylink_fixed_poll(struct timer_list *t)
1070 {
1071 	struct phylink *pl = container_of(t, struct phylink, link_poll);
1072 
1073 	mod_timer(t, jiffies + HZ);
1074 
1075 	phylink_run_resolve(pl);
1076 }
1077 
1078 static const struct sfp_upstream_ops sfp_phylink_ops;
1079 
1080 static int phylink_register_sfp(struct phylink *pl,
1081 				struct fwnode_handle *fwnode)
1082 {
1083 	struct sfp_bus *bus;
1084 	int ret;
1085 
1086 	if (!fwnode)
1087 		return 0;
1088 
1089 	bus = sfp_bus_find_fwnode(fwnode);
1090 	if (IS_ERR(bus)) {
1091 		ret = PTR_ERR(bus);
1092 		phylink_err(pl, "unable to attach SFP bus: %d\n", ret);
1093 		return ret;
1094 	}
1095 
1096 	pl->sfp_bus = bus;
1097 
1098 	ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops);
1099 	sfp_bus_put(bus);
1100 
1101 	return ret;
1102 }
1103 
1104 /**
1105  * phylink_create() - create a phylink instance
1106  * @config: a pointer to the target &struct phylink_config
1107  * @fwnode: a pointer to a &struct fwnode_handle describing the network
1108  *	interface
1109  * @iface: the desired link mode defined by &typedef phy_interface_t
1110  * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC.
1111  *
1112  * Create a new phylink instance, and parse the link parameters found in @np.
1113  * This will parse in-band modes, fixed-link or SFP configuration.
1114  *
1115  * Note: the rtnl lock must not be held when calling this function.
1116  *
1117  * Returns a pointer to a &struct phylink, or an error-pointer value. Users
1118  * must use IS_ERR() to check for errors from this function.
1119  */
1120 struct phylink *phylink_create(struct phylink_config *config,
1121 			       struct fwnode_handle *fwnode,
1122 			       phy_interface_t iface,
1123 			       const struct phylink_mac_ops *mac_ops)
1124 {
1125 	struct phylink *pl;
1126 	int ret;
1127 
1128 	pl = kzalloc(sizeof(*pl), GFP_KERNEL);
1129 	if (!pl)
1130 		return ERR_PTR(-ENOMEM);
1131 
1132 	mutex_init(&pl->state_mutex);
1133 	INIT_WORK(&pl->resolve, phylink_resolve);
1134 
1135 	pl->config = config;
1136 	if (config->type == PHYLINK_NETDEV) {
1137 		pl->netdev = to_net_dev(config->dev);
1138 	} else if (config->type == PHYLINK_DEV) {
1139 		pl->dev = config->dev;
1140 	} else {
1141 		kfree(pl);
1142 		return ERR_PTR(-EINVAL);
1143 	}
1144 
1145 	pl->phy_state.interface = iface;
1146 	pl->link_interface = iface;
1147 	if (iface == PHY_INTERFACE_MODE_MOCA)
1148 		pl->link_port = PORT_BNC;
1149 	else
1150 		pl->link_port = PORT_MII;
1151 	pl->link_config.interface = iface;
1152 	pl->link_config.pause = MLO_PAUSE_AN;
1153 	pl->link_config.speed = SPEED_UNKNOWN;
1154 	pl->link_config.duplex = DUPLEX_UNKNOWN;
1155 	pl->link_config.an_enabled = true;
1156 	pl->mac_ops = mac_ops;
1157 	__set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1158 	timer_setup(&pl->link_poll, phylink_fixed_poll, 0);
1159 
1160 	bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS);
1161 	linkmode_copy(pl->link_config.advertising, pl->supported);
1162 	phylink_validate(pl, pl->supported, &pl->link_config);
1163 
1164 	ret = phylink_parse_mode(pl, fwnode);
1165 	if (ret < 0) {
1166 		kfree(pl);
1167 		return ERR_PTR(ret);
1168 	}
1169 
1170 	if (pl->cfg_link_an_mode == MLO_AN_FIXED) {
1171 		ret = phylink_parse_fixedlink(pl, fwnode);
1172 		if (ret < 0) {
1173 			kfree(pl);
1174 			return ERR_PTR(ret);
1175 		}
1176 	}
1177 
1178 	pl->cur_link_an_mode = pl->cfg_link_an_mode;
1179 
1180 	ret = phylink_register_sfp(pl, fwnode);
1181 	if (ret < 0) {
1182 		kfree(pl);
1183 		return ERR_PTR(ret);
1184 	}
1185 
1186 	return pl;
1187 }
1188 EXPORT_SYMBOL_GPL(phylink_create);
1189 
1190 /**
1191  * phylink_set_pcs() - set the current PCS for phylink to use
1192  * @pl: a pointer to a &struct phylink returned from phylink_create()
1193  * @pcs: a pointer to the &struct phylink_pcs
1194  *
1195  * Bind the MAC PCS to phylink.  This may be called after phylink_create(),
1196  * in mac_prepare() or mac_config() methods if it is desired to dynamically
1197  * change the PCS.
1198  *
1199  * Please note that there are behavioural changes with the mac_config()
1200  * callback if a PCS is present (denoting a newer setup) so removing a PCS
1201  * is not supported, and if a PCS is going to be used, it must be registered
1202  * by calling phylink_set_pcs() at the latest in the first mac_config() call.
1203  */
1204 void phylink_set_pcs(struct phylink *pl, struct phylink_pcs *pcs)
1205 {
1206 	pl->pcs = pcs;
1207 	pl->pcs_ops = pcs->ops;
1208 }
1209 EXPORT_SYMBOL_GPL(phylink_set_pcs);
1210 
1211 /**
1212  * phylink_destroy() - cleanup and destroy the phylink instance
1213  * @pl: a pointer to a &struct phylink returned from phylink_create()
1214  *
1215  * Destroy a phylink instance. Any PHY that has been attached must have been
1216  * cleaned up via phylink_disconnect_phy() prior to calling this function.
1217  *
1218  * Note: the rtnl lock must not be held when calling this function.
1219  */
1220 void phylink_destroy(struct phylink *pl)
1221 {
1222 	sfp_bus_del_upstream(pl->sfp_bus);
1223 	if (pl->link_gpio)
1224 		gpiod_put(pl->link_gpio);
1225 
1226 	cancel_work_sync(&pl->resolve);
1227 	kfree(pl);
1228 }
1229 EXPORT_SYMBOL_GPL(phylink_destroy);
1230 
1231 static void phylink_phy_change(struct phy_device *phydev, bool up)
1232 {
1233 	struct phylink *pl = phydev->phylink;
1234 	bool tx_pause, rx_pause;
1235 
1236 	phy_get_pause(phydev, &tx_pause, &rx_pause);
1237 
1238 	mutex_lock(&pl->state_mutex);
1239 	pl->phy_state.speed = phydev->speed;
1240 	pl->phy_state.duplex = phydev->duplex;
1241 	pl->phy_state.pause = MLO_PAUSE_NONE;
1242 	if (tx_pause)
1243 		pl->phy_state.pause |= MLO_PAUSE_TX;
1244 	if (rx_pause)
1245 		pl->phy_state.pause |= MLO_PAUSE_RX;
1246 	pl->phy_state.interface = phydev->interface;
1247 	pl->phy_state.link = up;
1248 	mutex_unlock(&pl->state_mutex);
1249 
1250 	phylink_run_resolve(pl);
1251 
1252 	phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down",
1253 		    phy_modes(phydev->interface),
1254 		    phy_speed_to_str(phydev->speed),
1255 		    phy_duplex_to_str(phydev->duplex),
1256 		    phylink_pause_to_str(pl->phy_state.pause));
1257 }
1258 
1259 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy,
1260 			       phy_interface_t interface)
1261 {
1262 	struct phylink_link_state config;
1263 	__ETHTOOL_DECLARE_LINK_MODE_MASK(supported);
1264 	char *irq_str;
1265 	int ret;
1266 
1267 	/*
1268 	 * This is the new way of dealing with flow control for PHYs,
1269 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
1270 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
1271 	 * using our validate call to the MAC, we rely upon the MAC
1272 	 * clearing the bits from both supported and advertising fields.
1273 	 */
1274 	phy_support_asym_pause(phy);
1275 
1276 	memset(&config, 0, sizeof(config));
1277 	linkmode_copy(supported, phy->supported);
1278 	linkmode_copy(config.advertising, phy->advertising);
1279 
1280 	/* Clause 45 PHYs switch their Serdes lane between several different
1281 	 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G
1282 	 * speeds. We really need to know which interface modes the PHY and
1283 	 * MAC supports to properly work out which linkmodes can be supported.
1284 	 */
1285 	if (phy->is_c45 &&
1286 	    interface != PHY_INTERFACE_MODE_RXAUI &&
1287 	    interface != PHY_INTERFACE_MODE_XAUI &&
1288 	    interface != PHY_INTERFACE_MODE_USXGMII)
1289 		config.interface = PHY_INTERFACE_MODE_NA;
1290 	else
1291 		config.interface = interface;
1292 
1293 	ret = phylink_validate(pl, supported, &config);
1294 	if (ret) {
1295 		phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %d\n",
1296 			     phy_modes(config.interface),
1297 			     __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported,
1298 			     __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising,
1299 			     ret);
1300 		return ret;
1301 	}
1302 
1303 	phy->phylink = pl;
1304 	phy->phy_link_change = phylink_phy_change;
1305 
1306 	irq_str = phy_attached_info_irq(phy);
1307 	phylink_info(pl,
1308 		     "PHY [%s] driver [%s] (irq=%s)\n",
1309 		     dev_name(&phy->mdio.dev), phy->drv->name, irq_str);
1310 	kfree(irq_str);
1311 
1312 	mutex_lock(&phy->lock);
1313 	mutex_lock(&pl->state_mutex);
1314 	pl->phydev = phy;
1315 	pl->phy_state.interface = interface;
1316 	pl->phy_state.pause = MLO_PAUSE_NONE;
1317 	pl->phy_state.speed = SPEED_UNKNOWN;
1318 	pl->phy_state.duplex = DUPLEX_UNKNOWN;
1319 	linkmode_copy(pl->supported, supported);
1320 	linkmode_copy(pl->link_config.advertising, config.advertising);
1321 
1322 	/* Restrict the phy advertisement according to the MAC support. */
1323 	linkmode_copy(phy->advertising, config.advertising);
1324 	mutex_unlock(&pl->state_mutex);
1325 	mutex_unlock(&phy->lock);
1326 
1327 	phylink_dbg(pl,
1328 		    "phy: %s setting supported %*pb advertising %*pb\n",
1329 		    phy_modes(interface),
1330 		    __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported,
1331 		    __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising);
1332 
1333 	if (phy_interrupt_is_valid(phy))
1334 		phy_request_interrupt(phy);
1335 
1336 	return 0;
1337 }
1338 
1339 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy,
1340 			      phy_interface_t interface)
1341 {
1342 	if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED ||
1343 		    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1344 		     phy_interface_mode_is_8023z(interface))))
1345 		return -EINVAL;
1346 
1347 	if (pl->phydev)
1348 		return -EBUSY;
1349 
1350 	return phy_attach_direct(pl->netdev, phy, 0, interface);
1351 }
1352 
1353 /**
1354  * phylink_connect_phy() - connect a PHY to the phylink instance
1355  * @pl: a pointer to a &struct phylink returned from phylink_create()
1356  * @phy: a pointer to a &struct phy_device.
1357  *
1358  * Connect @phy to the phylink instance specified by @pl by calling
1359  * phy_attach_direct(). Configure the @phy according to the MAC driver's
1360  * capabilities, start the PHYLIB state machine and enable any interrupts
1361  * that the PHY supports.
1362  *
1363  * This updates the phylink's ethtool supported and advertising link mode
1364  * masks.
1365  *
1366  * Returns 0 on success or a negative errno.
1367  */
1368 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy)
1369 {
1370 	int ret;
1371 
1372 	/* Use PHY device/driver interface */
1373 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1374 		pl->link_interface = phy->interface;
1375 		pl->link_config.interface = pl->link_interface;
1376 	}
1377 
1378 	ret = phylink_attach_phy(pl, phy, pl->link_interface);
1379 	if (ret < 0)
1380 		return ret;
1381 
1382 	ret = phylink_bringup_phy(pl, phy, pl->link_config.interface);
1383 	if (ret)
1384 		phy_detach(phy);
1385 
1386 	return ret;
1387 }
1388 EXPORT_SYMBOL_GPL(phylink_connect_phy);
1389 
1390 /**
1391  * phylink_of_phy_connect() - connect the PHY specified in the DT mode.
1392  * @pl: a pointer to a &struct phylink returned from phylink_create()
1393  * @dn: a pointer to a &struct device_node.
1394  * @flags: PHY-specific flags to communicate to the PHY device driver
1395  *
1396  * Connect the phy specified in the device node @dn to the phylink instance
1397  * specified by @pl. Actions specified in phylink_connect_phy() will be
1398  * performed.
1399  *
1400  * Returns 0 on success or a negative errno.
1401  */
1402 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn,
1403 			   u32 flags)
1404 {
1405 	return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags);
1406 }
1407 EXPORT_SYMBOL_GPL(phylink_of_phy_connect);
1408 
1409 /**
1410  * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode.
1411  * @pl: a pointer to a &struct phylink returned from phylink_create()
1412  * @fwnode: a pointer to a &struct fwnode_handle.
1413  * @flags: PHY-specific flags to communicate to the PHY device driver
1414  *
1415  * Connect the phy specified @fwnode to the phylink instance specified
1416  * by @pl.
1417  *
1418  * Returns 0 on success or a negative errno.
1419  */
1420 int phylink_fwnode_phy_connect(struct phylink *pl,
1421 			       struct fwnode_handle *fwnode,
1422 			       u32 flags)
1423 {
1424 	struct fwnode_handle *phy_fwnode;
1425 	struct phy_device *phy_dev;
1426 	int ret;
1427 
1428 	/* Fixed links and 802.3z are handled without needing a PHY */
1429 	if (pl->cfg_link_an_mode == MLO_AN_FIXED ||
1430 	    (pl->cfg_link_an_mode == MLO_AN_INBAND &&
1431 	     phy_interface_mode_is_8023z(pl->link_interface)))
1432 		return 0;
1433 
1434 	phy_fwnode = fwnode_get_phy_node(fwnode);
1435 	if (IS_ERR(phy_fwnode)) {
1436 		if (pl->cfg_link_an_mode == MLO_AN_PHY)
1437 			return -ENODEV;
1438 		return 0;
1439 	}
1440 
1441 	phy_dev = fwnode_phy_find_device(phy_fwnode);
1442 	/* We're done with the phy_node handle */
1443 	fwnode_handle_put(phy_fwnode);
1444 	if (!phy_dev)
1445 		return -ENODEV;
1446 
1447 	/* Use PHY device/driver interface */
1448 	if (pl->link_interface == PHY_INTERFACE_MODE_NA) {
1449 		pl->link_interface = phy_dev->interface;
1450 		pl->link_config.interface = pl->link_interface;
1451 	}
1452 
1453 	ret = phy_attach_direct(pl->netdev, phy_dev, flags,
1454 				pl->link_interface);
1455 	if (ret) {
1456 		phy_device_free(phy_dev);
1457 		return ret;
1458 	}
1459 
1460 	ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface);
1461 	if (ret)
1462 		phy_detach(phy_dev);
1463 
1464 	return ret;
1465 }
1466 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect);
1467 
1468 /**
1469  * phylink_disconnect_phy() - disconnect any PHY attached to the phylink
1470  *   instance.
1471  * @pl: a pointer to a &struct phylink returned from phylink_create()
1472  *
1473  * Disconnect any current PHY from the phylink instance described by @pl.
1474  */
1475 void phylink_disconnect_phy(struct phylink *pl)
1476 {
1477 	struct phy_device *phy;
1478 
1479 	ASSERT_RTNL();
1480 
1481 	phy = pl->phydev;
1482 	if (phy) {
1483 		mutex_lock(&phy->lock);
1484 		mutex_lock(&pl->state_mutex);
1485 		pl->phydev = NULL;
1486 		mutex_unlock(&pl->state_mutex);
1487 		mutex_unlock(&phy->lock);
1488 		flush_work(&pl->resolve);
1489 
1490 		phy_disconnect(phy);
1491 	}
1492 }
1493 EXPORT_SYMBOL_GPL(phylink_disconnect_phy);
1494 
1495 /**
1496  * phylink_mac_change() - notify phylink of a change in MAC state
1497  * @pl: a pointer to a &struct phylink returned from phylink_create()
1498  * @up: indicates whether the link is currently up.
1499  *
1500  * The MAC driver should call this driver when the state of its link
1501  * changes (eg, link failure, new negotiation results, etc.)
1502  */
1503 void phylink_mac_change(struct phylink *pl, bool up)
1504 {
1505 	if (!up)
1506 		pl->mac_link_dropped = true;
1507 	phylink_run_resolve(pl);
1508 	phylink_dbg(pl, "mac link %s\n", up ? "up" : "down");
1509 }
1510 EXPORT_SYMBOL_GPL(phylink_mac_change);
1511 
1512 static irqreturn_t phylink_link_handler(int irq, void *data)
1513 {
1514 	struct phylink *pl = data;
1515 
1516 	phylink_run_resolve(pl);
1517 
1518 	return IRQ_HANDLED;
1519 }
1520 
1521 /**
1522  * phylink_start() - start a phylink instance
1523  * @pl: a pointer to a &struct phylink returned from phylink_create()
1524  *
1525  * Start the phylink instance specified by @pl, configuring the MAC for the
1526  * desired link mode(s) and negotiation style. This should be called from the
1527  * network device driver's &struct net_device_ops ndo_open() method.
1528  */
1529 void phylink_start(struct phylink *pl)
1530 {
1531 	bool poll = false;
1532 
1533 	ASSERT_RTNL();
1534 
1535 	phylink_info(pl, "configuring for %s/%s link mode\n",
1536 		     phylink_an_mode_str(pl->cur_link_an_mode),
1537 		     phy_modes(pl->link_config.interface));
1538 
1539 	/* Always set the carrier off */
1540 	if (pl->netdev)
1541 		netif_carrier_off(pl->netdev);
1542 
1543 	/* Apply the link configuration to the MAC when starting. This allows
1544 	 * a fixed-link to start with the correct parameters, and also
1545 	 * ensures that we set the appropriate advertisement for Serdes links.
1546 	 *
1547 	 * Restart autonegotiation if using 802.3z to ensure that the link
1548 	 * parameters are properly negotiated.  This is necessary for DSA
1549 	 * switches using 802.3z negotiation to ensure they see our modes.
1550 	 */
1551 	phylink_mac_initial_config(pl, true);
1552 
1553 	clear_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state);
1554 	phylink_run_resolve(pl);
1555 
1556 	if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) {
1557 		int irq = gpiod_to_irq(pl->link_gpio);
1558 
1559 		if (irq > 0) {
1560 			if (!request_irq(irq, phylink_link_handler,
1561 					 IRQF_TRIGGER_RISING |
1562 					 IRQF_TRIGGER_FALLING,
1563 					 "netdev link", pl))
1564 				pl->link_irq = irq;
1565 			else
1566 				irq = 0;
1567 		}
1568 		if (irq <= 0)
1569 			poll = true;
1570 	}
1571 
1572 	switch (pl->cfg_link_an_mode) {
1573 	case MLO_AN_FIXED:
1574 		poll |= pl->config->poll_fixed_state;
1575 		break;
1576 	case MLO_AN_INBAND:
1577 		poll |= pl->config->pcs_poll;
1578 		if (pl->pcs)
1579 			poll |= pl->pcs->poll;
1580 		break;
1581 	}
1582 	if (poll)
1583 		mod_timer(&pl->link_poll, jiffies + HZ);
1584 	if (pl->phydev)
1585 		phy_start(pl->phydev);
1586 	if (pl->sfp_bus)
1587 		sfp_upstream_start(pl->sfp_bus);
1588 }
1589 EXPORT_SYMBOL_GPL(phylink_start);
1590 
1591 /**
1592  * phylink_stop() - stop a phylink instance
1593  * @pl: a pointer to a &struct phylink returned from phylink_create()
1594  *
1595  * Stop the phylink instance specified by @pl. This should be called from the
1596  * network device driver's &struct net_device_ops ndo_stop() method.  The
1597  * network device's carrier state should not be changed prior to calling this
1598  * function.
1599  *
1600  * This will synchronously bring down the link if the link is not already
1601  * down (in other words, it will trigger a mac_link_down() method call.)
1602  */
1603 void phylink_stop(struct phylink *pl)
1604 {
1605 	ASSERT_RTNL();
1606 
1607 	if (pl->sfp_bus)
1608 		sfp_upstream_stop(pl->sfp_bus);
1609 	if (pl->phydev)
1610 		phy_stop(pl->phydev);
1611 	del_timer_sync(&pl->link_poll);
1612 	if (pl->link_irq) {
1613 		free_irq(pl->link_irq, pl);
1614 		pl->link_irq = 0;
1615 	}
1616 
1617 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED);
1618 }
1619 EXPORT_SYMBOL_GPL(phylink_stop);
1620 
1621 /**
1622  * phylink_suspend() - handle a network device suspend event
1623  * @pl: a pointer to a &struct phylink returned from phylink_create()
1624  * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan
1625  *
1626  * Handle a network device suspend event. There are several cases:
1627  * - If Wake-on-Lan is not active, we can bring down the link between
1628  *   the MAC and PHY by calling phylink_stop().
1629  * - If Wake-on-Lan is active, and being handled only by the PHY, we
1630  *   can also bring down the link between the MAC and PHY.
1631  * - If Wake-on-Lan is active, but being handled by the MAC, the MAC
1632  *   still needs to receive packets, so we can not bring the link down.
1633  */
1634 void phylink_suspend(struct phylink *pl, bool mac_wol)
1635 {
1636 	ASSERT_RTNL();
1637 
1638 	if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) {
1639 		/* Wake-on-Lan enabled, MAC handling */
1640 		mutex_lock(&pl->state_mutex);
1641 
1642 		/* Stop the resolver bringing the link up */
1643 		__set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
1644 
1645 		/* Disable the carrier, to prevent transmit timeouts,
1646 		 * but one would hope all packets have been sent. This
1647 		 * also means phylink_resolve() will do nothing.
1648 		 */
1649 		if (pl->netdev)
1650 			netif_carrier_off(pl->netdev);
1651 		else
1652 			pl->old_link_state = false;
1653 
1654 		/* We do not call mac_link_down() here as we want the
1655 		 * link to remain up to receive the WoL packets.
1656 		 */
1657 		mutex_unlock(&pl->state_mutex);
1658 	} else {
1659 		phylink_stop(pl);
1660 	}
1661 }
1662 EXPORT_SYMBOL_GPL(phylink_suspend);
1663 
1664 /**
1665  * phylink_resume() - handle a network device resume event
1666  * @pl: a pointer to a &struct phylink returned from phylink_create()
1667  *
1668  * Undo the effects of phylink_suspend(), returning the link to an
1669  * operational state.
1670  */
1671 void phylink_resume(struct phylink *pl)
1672 {
1673 	ASSERT_RTNL();
1674 
1675 	if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) {
1676 		/* Wake-on-Lan enabled, MAC handling */
1677 
1678 		/* Call mac_link_down() so we keep the overall state balanced.
1679 		 * Do this under the state_mutex lock for consistency. This
1680 		 * will cause a "Link Down" message to be printed during
1681 		 * resume, which is harmless - the true link state will be
1682 		 * printed when we run a resolve.
1683 		 */
1684 		mutex_lock(&pl->state_mutex);
1685 		phylink_link_down(pl);
1686 		mutex_unlock(&pl->state_mutex);
1687 
1688 		/* Re-apply the link parameters so that all the settings get
1689 		 * restored to the MAC.
1690 		 */
1691 		phylink_mac_initial_config(pl, true);
1692 
1693 		/* Re-enable and re-resolve the link parameters */
1694 		clear_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state);
1695 		phylink_run_resolve(pl);
1696 	} else {
1697 		phylink_start(pl);
1698 	}
1699 }
1700 EXPORT_SYMBOL_GPL(phylink_resume);
1701 
1702 /**
1703  * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY
1704  * @pl: a pointer to a &struct phylink returned from phylink_create()
1705  * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters
1706  *
1707  * Read the wake on lan parameters from the PHY attached to the phylink
1708  * instance specified by @pl. If no PHY is currently attached, report no
1709  * support for wake on lan.
1710  */
1711 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1712 {
1713 	ASSERT_RTNL();
1714 
1715 	wol->supported = 0;
1716 	wol->wolopts = 0;
1717 
1718 	if (pl->phydev)
1719 		phy_ethtool_get_wol(pl->phydev, wol);
1720 }
1721 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol);
1722 
1723 /**
1724  * phylink_ethtool_set_wol() - set wake on lan parameters
1725  * @pl: a pointer to a &struct phylink returned from phylink_create()
1726  * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters
1727  *
1728  * Set the wake on lan parameters for the PHY attached to the phylink
1729  * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP
1730  * error.
1731  *
1732  * Returns zero on success or negative errno code.
1733  */
1734 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol)
1735 {
1736 	int ret = -EOPNOTSUPP;
1737 
1738 	ASSERT_RTNL();
1739 
1740 	if (pl->phydev)
1741 		ret = phy_ethtool_set_wol(pl->phydev, wol);
1742 
1743 	return ret;
1744 }
1745 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol);
1746 
1747 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b)
1748 {
1749 	__ETHTOOL_DECLARE_LINK_MODE_MASK(mask);
1750 
1751 	linkmode_zero(mask);
1752 	phylink_set_port_modes(mask);
1753 
1754 	linkmode_and(dst, dst, mask);
1755 	linkmode_or(dst, dst, b);
1756 }
1757 
1758 static void phylink_get_ksettings(const struct phylink_link_state *state,
1759 				  struct ethtool_link_ksettings *kset)
1760 {
1761 	phylink_merge_link_mode(kset->link_modes.advertising, state->advertising);
1762 	linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising);
1763 	kset->base.speed = state->speed;
1764 	kset->base.duplex = state->duplex;
1765 	kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE :
1766 				AUTONEG_DISABLE;
1767 }
1768 
1769 /**
1770  * phylink_ethtool_ksettings_get() - get the current link settings
1771  * @pl: a pointer to a &struct phylink returned from phylink_create()
1772  * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings
1773  *
1774  * Read the current link settings for the phylink instance specified by @pl.
1775  * This will be the link settings read from the MAC, PHY or fixed link
1776  * settings depending on the current negotiation mode.
1777  */
1778 int phylink_ethtool_ksettings_get(struct phylink *pl,
1779 				  struct ethtool_link_ksettings *kset)
1780 {
1781 	struct phylink_link_state link_state;
1782 
1783 	ASSERT_RTNL();
1784 
1785 	if (pl->phydev)
1786 		phy_ethtool_ksettings_get(pl->phydev, kset);
1787 	else
1788 		kset->base.port = pl->link_port;
1789 
1790 	linkmode_copy(kset->link_modes.supported, pl->supported);
1791 
1792 	switch (pl->cur_link_an_mode) {
1793 	case MLO_AN_FIXED:
1794 		/* We are using fixed settings. Report these as the
1795 		 * current link settings - and note that these also
1796 		 * represent the supported speeds/duplex/pause modes.
1797 		 */
1798 		phylink_get_fixed_state(pl, &link_state);
1799 		phylink_get_ksettings(&link_state, kset);
1800 		break;
1801 
1802 	case MLO_AN_INBAND:
1803 		/* If there is a phy attached, then use the reported
1804 		 * settings from the phy with no modification.
1805 		 */
1806 		if (pl->phydev)
1807 			break;
1808 
1809 		phylink_mac_pcs_get_state(pl, &link_state);
1810 
1811 		/* The MAC is reporting the link results from its own PCS
1812 		 * layer via in-band status. Report these as the current
1813 		 * link settings.
1814 		 */
1815 		phylink_get_ksettings(&link_state, kset);
1816 		break;
1817 	}
1818 
1819 	return 0;
1820 }
1821 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get);
1822 
1823 /**
1824  * phylink_ethtool_ksettings_set() - set the link settings
1825  * @pl: a pointer to a &struct phylink returned from phylink_create()
1826  * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes
1827  */
1828 int phylink_ethtool_ksettings_set(struct phylink *pl,
1829 				  const struct ethtool_link_ksettings *kset)
1830 {
1831 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
1832 	struct phylink_link_state config;
1833 	const struct phy_setting *s;
1834 
1835 	ASSERT_RTNL();
1836 
1837 	if (pl->phydev) {
1838 		/* We can rely on phylib for this update; we also do not need
1839 		 * to update the pl->link_config settings:
1840 		 * - the configuration returned via ksettings_get() will come
1841 		 *   from phylib whenever a PHY is present.
1842 		 * - link_config.interface will be updated by the PHY calling
1843 		 *   back via phylink_phy_change() and a subsequent resolve.
1844 		 * - initial link configuration for PHY mode comes from the
1845 		 *   last phy state updated via phylink_phy_change().
1846 		 * - other configuration changes (e.g. pause modes) are
1847 		 *   performed directly via phylib.
1848 		 * - if in in-band mode with a PHY, the link configuration
1849 		 *   is passed on the link from the PHY, and all of
1850 		 *   link_config.{speed,duplex,an_enabled,pause} are not used.
1851 		 * - the only possible use would be link_config.advertising
1852 		 *   pause modes when in 1000base-X mode with a PHY, but in
1853 		 *   the presence of a PHY, this should not be changed as that
1854 		 *   should be determined from the media side advertisement.
1855 		 */
1856 		return phy_ethtool_ksettings_set(pl->phydev, kset);
1857 	}
1858 
1859 	config = pl->link_config;
1860 
1861 	/* Mask out unsupported advertisements */
1862 	linkmode_and(config.advertising, kset->link_modes.advertising,
1863 		     pl->supported);
1864 
1865 	/* FIXME: should we reject autoneg if phy/mac does not support it? */
1866 	switch (kset->base.autoneg) {
1867 	case AUTONEG_DISABLE:
1868 		/* Autonegotiation disabled, select a suitable speed and
1869 		 * duplex.
1870 		 */
1871 		s = phy_lookup_setting(kset->base.speed, kset->base.duplex,
1872 				       pl->supported, false);
1873 		if (!s)
1874 			return -EINVAL;
1875 
1876 		/* If we have a fixed link, refuse to change link parameters.
1877 		 * If the link parameters match, accept them but do nothing.
1878 		 */
1879 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1880 			if (s->speed != pl->link_config.speed ||
1881 			    s->duplex != pl->link_config.duplex)
1882 				return -EINVAL;
1883 			return 0;
1884 		}
1885 
1886 		config.speed = s->speed;
1887 		config.duplex = s->duplex;
1888 		break;
1889 
1890 	case AUTONEG_ENABLE:
1891 		/* If we have a fixed link, allow autonegotiation (since that
1892 		 * is our default case) but do not allow the advertisement to
1893 		 * be changed. If the advertisement matches, simply return.
1894 		 */
1895 		if (pl->cur_link_an_mode == MLO_AN_FIXED) {
1896 			if (!linkmode_equal(config.advertising,
1897 					    pl->link_config.advertising))
1898 				return -EINVAL;
1899 			return 0;
1900 		}
1901 
1902 		config.speed = SPEED_UNKNOWN;
1903 		config.duplex = DUPLEX_UNKNOWN;
1904 		break;
1905 
1906 	default:
1907 		return -EINVAL;
1908 	}
1909 
1910 	/* We have ruled out the case with a PHY attached, and the
1911 	 * fixed-link cases.  All that is left are in-band links.
1912 	 */
1913 	config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE;
1914 	linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising,
1915 			 config.an_enabled);
1916 
1917 	/* If this link is with an SFP, ensure that changes to advertised modes
1918 	 * also cause the associated interface to be selected such that the
1919 	 * link can be configured correctly.
1920 	 */
1921 	if (pl->sfp_bus) {
1922 		config.interface = sfp_select_interface(pl->sfp_bus,
1923 							config.advertising);
1924 		if (config.interface == PHY_INTERFACE_MODE_NA) {
1925 			phylink_err(pl,
1926 				    "selection of interface failed, advertisement %*pb\n",
1927 				    __ETHTOOL_LINK_MODE_MASK_NBITS,
1928 				    config.advertising);
1929 			return -EINVAL;
1930 		}
1931 
1932 		/* Revalidate with the selected interface */
1933 		linkmode_copy(support, pl->supported);
1934 		if (phylink_validate(pl, support, &config)) {
1935 			phylink_err(pl, "validation of %s/%s with support %*pb failed\n",
1936 				    phylink_an_mode_str(pl->cur_link_an_mode),
1937 				    phy_modes(config.interface),
1938 				    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
1939 			return -EINVAL;
1940 		}
1941 	} else {
1942 		/* Validate without changing the current supported mask. */
1943 		linkmode_copy(support, pl->supported);
1944 		if (phylink_validate(pl, support, &config))
1945 			return -EINVAL;
1946 	}
1947 
1948 	/* If autonegotiation is enabled, we must have an advertisement */
1949 	if (config.an_enabled && phylink_is_empty_linkmode(config.advertising))
1950 		return -EINVAL;
1951 
1952 	mutex_lock(&pl->state_mutex);
1953 	pl->link_config.speed = config.speed;
1954 	pl->link_config.duplex = config.duplex;
1955 	pl->link_config.an_enabled = config.an_enabled;
1956 
1957 	if (pl->link_config.interface != config.interface) {
1958 		/* The interface changed, e.g. 1000base-X <-> 2500base-X */
1959 		/* We need to force the link down, then change the interface */
1960 		if (pl->old_link_state) {
1961 			phylink_link_down(pl);
1962 			pl->old_link_state = false;
1963 		}
1964 		if (!test_bit(PHYLINK_DISABLE_STOPPED,
1965 			      &pl->phylink_disable_state))
1966 			phylink_major_config(pl, false, &config);
1967 		pl->link_config.interface = config.interface;
1968 		linkmode_copy(pl->link_config.advertising, config.advertising);
1969 	} else if (!linkmode_equal(pl->link_config.advertising,
1970 				   config.advertising)) {
1971 		linkmode_copy(pl->link_config.advertising, config.advertising);
1972 		phylink_change_inband_advert(pl);
1973 	}
1974 	mutex_unlock(&pl->state_mutex);
1975 
1976 	return 0;
1977 }
1978 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set);
1979 
1980 /**
1981  * phylink_ethtool_nway_reset() - restart negotiation
1982  * @pl: a pointer to a &struct phylink returned from phylink_create()
1983  *
1984  * Restart negotiation for the phylink instance specified by @pl. This will
1985  * cause any attached phy to restart negotiation with the link partner, and
1986  * if the MAC is in a BaseX mode, the MAC will also be requested to restart
1987  * negotiation.
1988  *
1989  * Returns zero on success, or negative error code.
1990  */
1991 int phylink_ethtool_nway_reset(struct phylink *pl)
1992 {
1993 	int ret = 0;
1994 
1995 	ASSERT_RTNL();
1996 
1997 	if (pl->phydev)
1998 		ret = phy_restart_aneg(pl->phydev);
1999 	phylink_mac_pcs_an_restart(pl);
2000 
2001 	return ret;
2002 }
2003 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset);
2004 
2005 /**
2006  * phylink_ethtool_get_pauseparam() - get the current pause parameters
2007  * @pl: a pointer to a &struct phylink returned from phylink_create()
2008  * @pause: a pointer to a &struct ethtool_pauseparam
2009  */
2010 void phylink_ethtool_get_pauseparam(struct phylink *pl,
2011 				    struct ethtool_pauseparam *pause)
2012 {
2013 	ASSERT_RTNL();
2014 
2015 	pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN);
2016 	pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX);
2017 	pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX);
2018 }
2019 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam);
2020 
2021 /**
2022  * phylink_ethtool_set_pauseparam() - set the current pause parameters
2023  * @pl: a pointer to a &struct phylink returned from phylink_create()
2024  * @pause: a pointer to a &struct ethtool_pauseparam
2025  */
2026 int phylink_ethtool_set_pauseparam(struct phylink *pl,
2027 				   struct ethtool_pauseparam *pause)
2028 {
2029 	struct phylink_link_state *config = &pl->link_config;
2030 	bool manual_changed;
2031 	int pause_state;
2032 
2033 	ASSERT_RTNL();
2034 
2035 	if (pl->cur_link_an_mode == MLO_AN_FIXED)
2036 		return -EOPNOTSUPP;
2037 
2038 	if (!phylink_test(pl->supported, Pause) &&
2039 	    !phylink_test(pl->supported, Asym_Pause))
2040 		return -EOPNOTSUPP;
2041 
2042 	if (!phylink_test(pl->supported, Asym_Pause) &&
2043 	    pause->rx_pause != pause->tx_pause)
2044 		return -EINVAL;
2045 
2046 	pause_state = 0;
2047 	if (pause->autoneg)
2048 		pause_state |= MLO_PAUSE_AN;
2049 	if (pause->rx_pause)
2050 		pause_state |= MLO_PAUSE_RX;
2051 	if (pause->tx_pause)
2052 		pause_state |= MLO_PAUSE_TX;
2053 
2054 	mutex_lock(&pl->state_mutex);
2055 	/*
2056 	 * See the comments for linkmode_set_pause(), wrt the deficiencies
2057 	 * with the current implementation.  A solution to this issue would
2058 	 * be:
2059 	 * ethtool  Local device
2060 	 *  rx  tx  Pause AsymDir
2061 	 *  0   0   0     0
2062 	 *  1   0   1     1
2063 	 *  0   1   0     1
2064 	 *  1   1   1     1
2065 	 * and then use the ethtool rx/tx enablement status to mask the
2066 	 * rx/tx pause resolution.
2067 	 */
2068 	linkmode_set_pause(config->advertising, pause->tx_pause,
2069 			   pause->rx_pause);
2070 
2071 	manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN ||
2072 			 (!(pause_state & MLO_PAUSE_AN) &&
2073 			   (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK);
2074 
2075 	config->pause = pause_state;
2076 
2077 	/* Update our in-band advertisement, triggering a renegotiation if
2078 	 * the advertisement changed.
2079 	 */
2080 	if (!pl->phydev)
2081 		phylink_change_inband_advert(pl);
2082 
2083 	mutex_unlock(&pl->state_mutex);
2084 
2085 	/* If we have a PHY, a change of the pause frame advertisement will
2086 	 * cause phylib to renegotiate (if AN is enabled) which will in turn
2087 	 * call our phylink_phy_change() and trigger a resolve.  Note that
2088 	 * we can't hold our state mutex while calling phy_set_asym_pause().
2089 	 */
2090 	if (pl->phydev)
2091 		phy_set_asym_pause(pl->phydev, pause->rx_pause,
2092 				   pause->tx_pause);
2093 
2094 	/* If the manual pause settings changed, make sure we trigger a
2095 	 * resolve to update their state; we can not guarantee that the
2096 	 * link will cycle.
2097 	 */
2098 	if (manual_changed) {
2099 		pl->mac_link_dropped = true;
2100 		phylink_run_resolve(pl);
2101 	}
2102 
2103 	return 0;
2104 }
2105 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam);
2106 
2107 /**
2108  * phylink_get_eee_err() - read the energy efficient ethernet error
2109  *   counter
2110  * @pl: a pointer to a &struct phylink returned from phylink_create().
2111  *
2112  * Read the Energy Efficient Ethernet error counter from the PHY associated
2113  * with the phylink instance specified by @pl.
2114  *
2115  * Returns positive error counter value, or negative error code.
2116  */
2117 int phylink_get_eee_err(struct phylink *pl)
2118 {
2119 	int ret = 0;
2120 
2121 	ASSERT_RTNL();
2122 
2123 	if (pl->phydev)
2124 		ret = phy_get_eee_err(pl->phydev);
2125 
2126 	return ret;
2127 }
2128 EXPORT_SYMBOL_GPL(phylink_get_eee_err);
2129 
2130 /**
2131  * phylink_init_eee() - init and check the EEE features
2132  * @pl: a pointer to a &struct phylink returned from phylink_create()
2133  * @clk_stop_enable: allow PHY to stop receive clock
2134  *
2135  * Must be called either with RTNL held or within mac_link_up()
2136  */
2137 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable)
2138 {
2139 	int ret = -EOPNOTSUPP;
2140 
2141 	if (pl->phydev)
2142 		ret = phy_init_eee(pl->phydev, clk_stop_enable);
2143 
2144 	return ret;
2145 }
2146 EXPORT_SYMBOL_GPL(phylink_init_eee);
2147 
2148 /**
2149  * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters
2150  * @pl: a pointer to a &struct phylink returned from phylink_create()
2151  * @eee: a pointer to a &struct ethtool_eee for the read parameters
2152  */
2153 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee)
2154 {
2155 	int ret = -EOPNOTSUPP;
2156 
2157 	ASSERT_RTNL();
2158 
2159 	if (pl->phydev)
2160 		ret = phy_ethtool_get_eee(pl->phydev, eee);
2161 
2162 	return ret;
2163 }
2164 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee);
2165 
2166 /**
2167  * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters
2168  * @pl: a pointer to a &struct phylink returned from phylink_create()
2169  * @eee: a pointer to a &struct ethtool_eee for the desired parameters
2170  */
2171 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee)
2172 {
2173 	int ret = -EOPNOTSUPP;
2174 
2175 	ASSERT_RTNL();
2176 
2177 	if (pl->phydev)
2178 		ret = phy_ethtool_set_eee(pl->phydev, eee);
2179 
2180 	return ret;
2181 }
2182 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee);
2183 
2184 /* This emulates MII registers for a fixed-mode phy operating as per the
2185  * passed in state. "aneg" defines if we report negotiation is possible.
2186  *
2187  * FIXME: should deal with negotiation state too.
2188  */
2189 static int phylink_mii_emul_read(unsigned int reg,
2190 				 struct phylink_link_state *state)
2191 {
2192 	struct fixed_phy_status fs;
2193 	unsigned long *lpa = state->lp_advertising;
2194 	int val;
2195 
2196 	fs.link = state->link;
2197 	fs.speed = state->speed;
2198 	fs.duplex = state->duplex;
2199 	fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa);
2200 	fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa);
2201 
2202 	val = swphy_read_reg(reg, &fs);
2203 	if (reg == MII_BMSR) {
2204 		if (!state->an_complete)
2205 			val &= ~BMSR_ANEGCOMPLETE;
2206 	}
2207 	return val;
2208 }
2209 
2210 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id,
2211 			    unsigned int reg)
2212 {
2213 	struct phy_device *phydev = pl->phydev;
2214 	int prtad, devad;
2215 
2216 	if (mdio_phy_id_is_c45(phy_id)) {
2217 		prtad = mdio_phy_id_prtad(phy_id);
2218 		devad = mdio_phy_id_devad(phy_id);
2219 		devad = mdiobus_c45_addr(devad, reg);
2220 	} else if (phydev->is_c45) {
2221 		switch (reg) {
2222 		case MII_BMCR:
2223 		case MII_BMSR:
2224 		case MII_PHYSID1:
2225 		case MII_PHYSID2:
2226 			devad = __ffs(phydev->c45_ids.mmds_present);
2227 			break;
2228 		case MII_ADVERTISE:
2229 		case MII_LPA:
2230 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2231 				return -EINVAL;
2232 			devad = MDIO_MMD_AN;
2233 			if (reg == MII_ADVERTISE)
2234 				reg = MDIO_AN_ADVERTISE;
2235 			else
2236 				reg = MDIO_AN_LPA;
2237 			break;
2238 		default:
2239 			return -EINVAL;
2240 		}
2241 		prtad = phy_id;
2242 		devad = mdiobus_c45_addr(devad, reg);
2243 	} else {
2244 		prtad = phy_id;
2245 		devad = reg;
2246 	}
2247 	return mdiobus_read(pl->phydev->mdio.bus, prtad, devad);
2248 }
2249 
2250 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id,
2251 			     unsigned int reg, unsigned int val)
2252 {
2253 	struct phy_device *phydev = pl->phydev;
2254 	int prtad, devad;
2255 
2256 	if (mdio_phy_id_is_c45(phy_id)) {
2257 		prtad = mdio_phy_id_prtad(phy_id);
2258 		devad = mdio_phy_id_devad(phy_id);
2259 		devad = mdiobus_c45_addr(devad, reg);
2260 	} else if (phydev->is_c45) {
2261 		switch (reg) {
2262 		case MII_BMCR:
2263 		case MII_BMSR:
2264 		case MII_PHYSID1:
2265 		case MII_PHYSID2:
2266 			devad = __ffs(phydev->c45_ids.mmds_present);
2267 			break;
2268 		case MII_ADVERTISE:
2269 		case MII_LPA:
2270 			if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN))
2271 				return -EINVAL;
2272 			devad = MDIO_MMD_AN;
2273 			if (reg == MII_ADVERTISE)
2274 				reg = MDIO_AN_ADVERTISE;
2275 			else
2276 				reg = MDIO_AN_LPA;
2277 			break;
2278 		default:
2279 			return -EINVAL;
2280 		}
2281 		prtad = phy_id;
2282 		devad = mdiobus_c45_addr(devad, reg);
2283 	} else {
2284 		prtad = phy_id;
2285 		devad = reg;
2286 	}
2287 
2288 	return mdiobus_write(phydev->mdio.bus, prtad, devad, val);
2289 }
2290 
2291 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id,
2292 			    unsigned int reg)
2293 {
2294 	struct phylink_link_state state;
2295 	int val = 0xffff;
2296 
2297 	switch (pl->cur_link_an_mode) {
2298 	case MLO_AN_FIXED:
2299 		if (phy_id == 0) {
2300 			phylink_get_fixed_state(pl, &state);
2301 			val = phylink_mii_emul_read(reg, &state);
2302 		}
2303 		break;
2304 
2305 	case MLO_AN_PHY:
2306 		return -EOPNOTSUPP;
2307 
2308 	case MLO_AN_INBAND:
2309 		if (phy_id == 0) {
2310 			phylink_mac_pcs_get_state(pl, &state);
2311 			val = phylink_mii_emul_read(reg, &state);
2312 		}
2313 		break;
2314 	}
2315 
2316 	return val & 0xffff;
2317 }
2318 
2319 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id,
2320 			     unsigned int reg, unsigned int val)
2321 {
2322 	switch (pl->cur_link_an_mode) {
2323 	case MLO_AN_FIXED:
2324 		break;
2325 
2326 	case MLO_AN_PHY:
2327 		return -EOPNOTSUPP;
2328 
2329 	case MLO_AN_INBAND:
2330 		break;
2331 	}
2332 
2333 	return 0;
2334 }
2335 
2336 /**
2337  * phylink_mii_ioctl() - generic mii ioctl interface
2338  * @pl: a pointer to a &struct phylink returned from phylink_create()
2339  * @ifr: a pointer to a &struct ifreq for socket ioctls
2340  * @cmd: ioctl cmd to execute
2341  *
2342  * Perform the specified MII ioctl on the PHY attached to the phylink instance
2343  * specified by @pl. If no PHY is attached, emulate the presence of the PHY.
2344  *
2345  * Returns: zero on success or negative error code.
2346  *
2347  * %SIOCGMIIPHY:
2348  *  read register from the current PHY.
2349  * %SIOCGMIIREG:
2350  *  read register from the specified PHY.
2351  * %SIOCSMIIREG:
2352  *  set a register on the specified PHY.
2353  */
2354 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd)
2355 {
2356 	struct mii_ioctl_data *mii = if_mii(ifr);
2357 	int  ret;
2358 
2359 	ASSERT_RTNL();
2360 
2361 	if (pl->phydev) {
2362 		/* PHYs only exist for MLO_AN_PHY and SGMII */
2363 		switch (cmd) {
2364 		case SIOCGMIIPHY:
2365 			mii->phy_id = pl->phydev->mdio.addr;
2366 			fallthrough;
2367 
2368 		case SIOCGMIIREG:
2369 			ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num);
2370 			if (ret >= 0) {
2371 				mii->val_out = ret;
2372 				ret = 0;
2373 			}
2374 			break;
2375 
2376 		case SIOCSMIIREG:
2377 			ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num,
2378 						mii->val_in);
2379 			break;
2380 
2381 		default:
2382 			ret = phy_mii_ioctl(pl->phydev, ifr, cmd);
2383 			break;
2384 		}
2385 	} else {
2386 		switch (cmd) {
2387 		case SIOCGMIIPHY:
2388 			mii->phy_id = 0;
2389 			fallthrough;
2390 
2391 		case SIOCGMIIREG:
2392 			ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num);
2393 			if (ret >= 0) {
2394 				mii->val_out = ret;
2395 				ret = 0;
2396 			}
2397 			break;
2398 
2399 		case SIOCSMIIREG:
2400 			ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num,
2401 						mii->val_in);
2402 			break;
2403 
2404 		default:
2405 			ret = -EOPNOTSUPP;
2406 			break;
2407 		}
2408 	}
2409 
2410 	return ret;
2411 }
2412 EXPORT_SYMBOL_GPL(phylink_mii_ioctl);
2413 
2414 /**
2415  * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both
2416  *   link partners
2417  * @pl: a pointer to a &struct phylink returned from phylink_create()
2418  * @sync: perform action synchronously
2419  *
2420  * If we have a PHY that is not part of a SFP module, then set the speed
2421  * as described in the phy_speed_down() function. Please see this function
2422  * for a description of the @sync parameter.
2423  *
2424  * Returns zero if there is no PHY, otherwise as per phy_speed_down().
2425  */
2426 int phylink_speed_down(struct phylink *pl, bool sync)
2427 {
2428 	int ret = 0;
2429 
2430 	ASSERT_RTNL();
2431 
2432 	if (!pl->sfp_bus && pl->phydev)
2433 		ret = phy_speed_down(pl->phydev, sync);
2434 
2435 	return ret;
2436 }
2437 EXPORT_SYMBOL_GPL(phylink_speed_down);
2438 
2439 /**
2440  * phylink_speed_up() - restore the advertised speeds prior to the call to
2441  *   phylink_speed_down()
2442  * @pl: a pointer to a &struct phylink returned from phylink_create()
2443  *
2444  * If we have a PHY that is not part of a SFP module, then restore the
2445  * PHY speeds as per phy_speed_up().
2446  *
2447  * Returns zero if there is no PHY, otherwise as per phy_speed_up().
2448  */
2449 int phylink_speed_up(struct phylink *pl)
2450 {
2451 	int ret = 0;
2452 
2453 	ASSERT_RTNL();
2454 
2455 	if (!pl->sfp_bus && pl->phydev)
2456 		ret = phy_speed_up(pl->phydev);
2457 
2458 	return ret;
2459 }
2460 EXPORT_SYMBOL_GPL(phylink_speed_up);
2461 
2462 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus)
2463 {
2464 	struct phylink *pl = upstream;
2465 
2466 	pl->netdev->sfp_bus = bus;
2467 }
2468 
2469 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus)
2470 {
2471 	struct phylink *pl = upstream;
2472 
2473 	pl->netdev->sfp_bus = NULL;
2474 }
2475 
2476 static int phylink_sfp_config(struct phylink *pl, u8 mode,
2477 			      const unsigned long *supported,
2478 			      const unsigned long *advertising)
2479 {
2480 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support1);
2481 	__ETHTOOL_DECLARE_LINK_MODE_MASK(support);
2482 	struct phylink_link_state config;
2483 	phy_interface_t iface;
2484 	bool changed;
2485 	int ret;
2486 
2487 	linkmode_copy(support, supported);
2488 
2489 	memset(&config, 0, sizeof(config));
2490 	linkmode_copy(config.advertising, advertising);
2491 	config.interface = PHY_INTERFACE_MODE_NA;
2492 	config.speed = SPEED_UNKNOWN;
2493 	config.duplex = DUPLEX_UNKNOWN;
2494 	config.pause = MLO_PAUSE_AN;
2495 	config.an_enabled = pl->link_config.an_enabled;
2496 
2497 	/* Ignore errors if we're expecting a PHY to attach later */
2498 	ret = phylink_validate(pl, support, &config);
2499 	if (ret) {
2500 		phylink_err(pl, "validation with support %*pb failed: %d\n",
2501 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret);
2502 		return ret;
2503 	}
2504 
2505 	iface = sfp_select_interface(pl->sfp_bus, config.advertising);
2506 	if (iface == PHY_INTERFACE_MODE_NA) {
2507 		phylink_err(pl,
2508 			    "selection of interface failed, advertisement %*pb\n",
2509 			    __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising);
2510 		return -EINVAL;
2511 	}
2512 
2513 	config.interface = iface;
2514 	linkmode_copy(support1, support);
2515 	ret = phylink_validate(pl, support1, &config);
2516 	if (ret) {
2517 		phylink_err(pl, "validation of %s/%s with support %*pb failed: %d\n",
2518 			    phylink_an_mode_str(mode),
2519 			    phy_modes(config.interface),
2520 			    __ETHTOOL_LINK_MODE_MASK_NBITS, support, ret);
2521 		return ret;
2522 	}
2523 
2524 	phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n",
2525 		    phylink_an_mode_str(mode), phy_modes(config.interface),
2526 		    __ETHTOOL_LINK_MODE_MASK_NBITS, support);
2527 
2528 	if (phy_interface_mode_is_8023z(iface) && pl->phydev)
2529 		return -EINVAL;
2530 
2531 	changed = !linkmode_equal(pl->supported, support) ||
2532 		  !linkmode_equal(pl->link_config.advertising,
2533 				  config.advertising);
2534 	if (changed) {
2535 		linkmode_copy(pl->supported, support);
2536 		linkmode_copy(pl->link_config.advertising, config.advertising);
2537 	}
2538 
2539 	if (pl->cur_link_an_mode != mode ||
2540 	    pl->link_config.interface != config.interface) {
2541 		pl->link_config.interface = config.interface;
2542 		pl->cur_link_an_mode = mode;
2543 
2544 		changed = true;
2545 
2546 		phylink_info(pl, "switched to %s/%s link mode\n",
2547 			     phylink_an_mode_str(mode),
2548 			     phy_modes(config.interface));
2549 	}
2550 
2551 	pl->link_port = pl->sfp_port;
2552 
2553 	if (changed && !test_bit(PHYLINK_DISABLE_STOPPED,
2554 				 &pl->phylink_disable_state))
2555 		phylink_mac_initial_config(pl, false);
2556 
2557 	return ret;
2558 }
2559 
2560 static int phylink_sfp_module_insert(void *upstream,
2561 				     const struct sfp_eeprom_id *id)
2562 {
2563 	struct phylink *pl = upstream;
2564 	unsigned long *support = pl->sfp_support;
2565 
2566 	ASSERT_RTNL();
2567 
2568 	linkmode_zero(support);
2569 	sfp_parse_support(pl->sfp_bus, id, support);
2570 	pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support);
2571 
2572 	/* If this module may have a PHY connecting later, defer until later */
2573 	pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id);
2574 	if (pl->sfp_may_have_phy)
2575 		return 0;
2576 
2577 	return phylink_sfp_config(pl, MLO_AN_INBAND, support, support);
2578 }
2579 
2580 static int phylink_sfp_module_start(void *upstream)
2581 {
2582 	struct phylink *pl = upstream;
2583 
2584 	/* If this SFP module has a PHY, start the PHY now. */
2585 	if (pl->phydev) {
2586 		phy_start(pl->phydev);
2587 		return 0;
2588 	}
2589 
2590 	/* If the module may have a PHY but we didn't detect one we
2591 	 * need to configure the MAC here.
2592 	 */
2593 	if (!pl->sfp_may_have_phy)
2594 		return 0;
2595 
2596 	return phylink_sfp_config(pl, MLO_AN_INBAND,
2597 				  pl->sfp_support, pl->sfp_support);
2598 }
2599 
2600 static void phylink_sfp_module_stop(void *upstream)
2601 {
2602 	struct phylink *pl = upstream;
2603 
2604 	/* If this SFP module has a PHY, stop it. */
2605 	if (pl->phydev)
2606 		phy_stop(pl->phydev);
2607 }
2608 
2609 static void phylink_sfp_link_down(void *upstream)
2610 {
2611 	struct phylink *pl = upstream;
2612 
2613 	ASSERT_RTNL();
2614 
2615 	phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK);
2616 }
2617 
2618 static void phylink_sfp_link_up(void *upstream)
2619 {
2620 	struct phylink *pl = upstream;
2621 
2622 	ASSERT_RTNL();
2623 
2624 	clear_bit(PHYLINK_DISABLE_LINK, &pl->phylink_disable_state);
2625 	phylink_run_resolve(pl);
2626 }
2627 
2628 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII
2629  * or 802.3z control word, so inband will not work.
2630  */
2631 static bool phylink_phy_no_inband(struct phy_device *phy)
2632 {
2633 	return phy->is_c45 &&
2634 		(phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150;
2635 }
2636 
2637 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy)
2638 {
2639 	struct phylink *pl = upstream;
2640 	phy_interface_t interface;
2641 	u8 mode;
2642 	int ret;
2643 
2644 	/*
2645 	 * This is the new way of dealing with flow control for PHYs,
2646 	 * as described by Timur Tabi in commit 529ed1275263 ("net: phy:
2647 	 * phy drivers should not set SUPPORTED_[Asym_]Pause") except
2648 	 * using our validate call to the MAC, we rely upon the MAC
2649 	 * clearing the bits from both supported and advertising fields.
2650 	 */
2651 	phy_support_asym_pause(phy);
2652 
2653 	if (phylink_phy_no_inband(phy))
2654 		mode = MLO_AN_PHY;
2655 	else
2656 		mode = MLO_AN_INBAND;
2657 
2658 	/* Do the initial configuration */
2659 	ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising);
2660 	if (ret < 0)
2661 		return ret;
2662 
2663 	interface = pl->link_config.interface;
2664 	ret = phylink_attach_phy(pl, phy, interface);
2665 	if (ret < 0)
2666 		return ret;
2667 
2668 	ret = phylink_bringup_phy(pl, phy, interface);
2669 	if (ret)
2670 		phy_detach(phy);
2671 
2672 	return ret;
2673 }
2674 
2675 static void phylink_sfp_disconnect_phy(void *upstream)
2676 {
2677 	phylink_disconnect_phy(upstream);
2678 }
2679 
2680 static const struct sfp_upstream_ops sfp_phylink_ops = {
2681 	.attach = phylink_sfp_attach,
2682 	.detach = phylink_sfp_detach,
2683 	.module_insert = phylink_sfp_module_insert,
2684 	.module_start = phylink_sfp_module_start,
2685 	.module_stop = phylink_sfp_module_stop,
2686 	.link_up = phylink_sfp_link_up,
2687 	.link_down = phylink_sfp_link_down,
2688 	.connect_phy = phylink_sfp_connect_phy,
2689 	.disconnect_phy = phylink_sfp_disconnect_phy,
2690 };
2691 
2692 /* Helpers for MAC drivers */
2693 
2694 /**
2695  * phylink_helper_basex_speed() - 1000BaseX/2500BaseX helper
2696  * @state: a pointer to a &struct phylink_link_state
2697  *
2698  * Inspect the interface mode, advertising mask or forced speed and
2699  * decide whether to run at 2.5Gbit or 1Gbit appropriately, switching
2700  * the interface mode to suit.  @state->interface is appropriately
2701  * updated, and the advertising mask has the "other" baseX_Full flag
2702  * cleared.
2703  */
2704 void phylink_helper_basex_speed(struct phylink_link_state *state)
2705 {
2706 	if (phy_interface_mode_is_8023z(state->interface)) {
2707 		bool want_2500 = state->an_enabled ?
2708 			phylink_test(state->advertising, 2500baseX_Full) :
2709 			state->speed == SPEED_2500;
2710 
2711 		if (want_2500) {
2712 			phylink_clear(state->advertising, 1000baseX_Full);
2713 			state->interface = PHY_INTERFACE_MODE_2500BASEX;
2714 		} else {
2715 			phylink_clear(state->advertising, 2500baseX_Full);
2716 			state->interface = PHY_INTERFACE_MODE_1000BASEX;
2717 		}
2718 	}
2719 }
2720 EXPORT_SYMBOL_GPL(phylink_helper_basex_speed);
2721 
2722 static void phylink_decode_c37_word(struct phylink_link_state *state,
2723 				    uint16_t config_reg, int speed)
2724 {
2725 	bool tx_pause, rx_pause;
2726 	int fd_bit;
2727 
2728 	if (speed == SPEED_2500)
2729 		fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT;
2730 	else
2731 		fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT;
2732 
2733 	mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit);
2734 
2735 	if (linkmode_test_bit(fd_bit, state->advertising) &&
2736 	    linkmode_test_bit(fd_bit, state->lp_advertising)) {
2737 		state->speed = speed;
2738 		state->duplex = DUPLEX_FULL;
2739 	} else {
2740 		/* negotiation failure */
2741 		state->link = false;
2742 	}
2743 
2744 	linkmode_resolve_pause(state->advertising, state->lp_advertising,
2745 			       &tx_pause, &rx_pause);
2746 
2747 	if (tx_pause)
2748 		state->pause |= MLO_PAUSE_TX;
2749 	if (rx_pause)
2750 		state->pause |= MLO_PAUSE_RX;
2751 }
2752 
2753 static void phylink_decode_sgmii_word(struct phylink_link_state *state,
2754 				      uint16_t config_reg)
2755 {
2756 	if (!(config_reg & LPA_SGMII_LINK)) {
2757 		state->link = false;
2758 		return;
2759 	}
2760 
2761 	switch (config_reg & LPA_SGMII_SPD_MASK) {
2762 	case LPA_SGMII_10:
2763 		state->speed = SPEED_10;
2764 		break;
2765 	case LPA_SGMII_100:
2766 		state->speed = SPEED_100;
2767 		break;
2768 	case LPA_SGMII_1000:
2769 		state->speed = SPEED_1000;
2770 		break;
2771 	default:
2772 		state->link = false;
2773 		return;
2774 	}
2775 	if (config_reg & LPA_SGMII_FULL_DUPLEX)
2776 		state->duplex = DUPLEX_FULL;
2777 	else
2778 		state->duplex = DUPLEX_HALF;
2779 }
2780 
2781 /**
2782  * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS
2783  * @state: a pointer to a struct phylink_link_state.
2784  * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word
2785  *
2786  * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation
2787  * code word.  Decode the USXGMII code word and populate the corresponding fields
2788  * (speed, duplex) into the phylink_link_state structure.
2789  */
2790 void phylink_decode_usxgmii_word(struct phylink_link_state *state,
2791 				 uint16_t lpa)
2792 {
2793 	switch (lpa & MDIO_USXGMII_SPD_MASK) {
2794 	case MDIO_USXGMII_10:
2795 		state->speed = SPEED_10;
2796 		break;
2797 	case MDIO_USXGMII_100:
2798 		state->speed = SPEED_100;
2799 		break;
2800 	case MDIO_USXGMII_1000:
2801 		state->speed = SPEED_1000;
2802 		break;
2803 	case MDIO_USXGMII_2500:
2804 		state->speed = SPEED_2500;
2805 		break;
2806 	case MDIO_USXGMII_5000:
2807 		state->speed = SPEED_5000;
2808 		break;
2809 	case MDIO_USXGMII_10G:
2810 		state->speed = SPEED_10000;
2811 		break;
2812 	default:
2813 		state->link = false;
2814 		return;
2815 	}
2816 
2817 	if (lpa & MDIO_USXGMII_FULL_DUPLEX)
2818 		state->duplex = DUPLEX_FULL;
2819 	else
2820 		state->duplex = DUPLEX_HALF;
2821 }
2822 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word);
2823 
2824 /**
2825  * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers
2826  * @state: a pointer to a &struct phylink_link_state.
2827  * @bmsr: The value of the %MII_BMSR register
2828  * @lpa: The value of the %MII_LPA register
2829  *
2830  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2831  * clause 37 negotiation and/or SGMII control.
2832  *
2833  * Parse the Clause 37 or Cisco SGMII link partner negotiation word into
2834  * the phylink @state structure. This is suitable to be used for implementing
2835  * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if
2836  * accessing @bmsr and @lpa cannot be done with MDIO directly.
2837  */
2838 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state,
2839 				      u16 bmsr, u16 lpa)
2840 {
2841 	state->link = !!(bmsr & BMSR_LSTATUS);
2842 	state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE);
2843 	/* If there is no link or autonegotiation is disabled, the LP advertisement
2844 	 * data is not meaningful, so don't go any further.
2845 	 */
2846 	if (!state->link || !state->an_enabled)
2847 		return;
2848 
2849 	switch (state->interface) {
2850 	case PHY_INTERFACE_MODE_1000BASEX:
2851 		phylink_decode_c37_word(state, lpa, SPEED_1000);
2852 		break;
2853 
2854 	case PHY_INTERFACE_MODE_2500BASEX:
2855 		phylink_decode_c37_word(state, lpa, SPEED_2500);
2856 		break;
2857 
2858 	case PHY_INTERFACE_MODE_SGMII:
2859 	case PHY_INTERFACE_MODE_QSGMII:
2860 		phylink_decode_sgmii_word(state, lpa);
2861 		break;
2862 
2863 	default:
2864 		state->link = false;
2865 		break;
2866 	}
2867 }
2868 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state);
2869 
2870 /**
2871  * phylink_mii_c22_pcs_get_state() - read the MAC PCS state
2872  * @pcs: a pointer to a &struct mdio_device.
2873  * @state: a pointer to a &struct phylink_link_state.
2874  *
2875  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2876  * clause 37 negotiation and/or SGMII control.
2877  *
2878  * Read the MAC PCS state from the MII device configured in @config and
2879  * parse the Clause 37 or Cisco SGMII link partner negotiation word into
2880  * the phylink @state structure. This is suitable to be directly plugged
2881  * into the mac_pcs_get_state() member of the struct phylink_mac_ops
2882  * structure.
2883  */
2884 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs,
2885 				   struct phylink_link_state *state)
2886 {
2887 	int bmsr, lpa;
2888 
2889 	bmsr = mdiodev_read(pcs, MII_BMSR);
2890 	lpa = mdiodev_read(pcs, MII_LPA);
2891 	if (bmsr < 0 || lpa < 0) {
2892 		state->link = false;
2893 		return;
2894 	}
2895 
2896 	phylink_mii_c22_pcs_decode_state(state, bmsr, lpa);
2897 }
2898 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state);
2899 
2900 /**
2901  * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS
2902  *	advertisement
2903  * @interface: the PHY interface mode being configured
2904  * @advertising: the ethtool advertisement mask
2905  *
2906  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2907  * clause 37 negotiation and/or SGMII control.
2908  *
2909  * Encode the clause 37 PCS advertisement as specified by @interface and
2910  * @advertising.
2911  *
2912  * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed.
2913  */
2914 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface,
2915 					     const unsigned long *advertising)
2916 {
2917 	u16 adv;
2918 
2919 	switch (interface) {
2920 	case PHY_INTERFACE_MODE_1000BASEX:
2921 	case PHY_INTERFACE_MODE_2500BASEX:
2922 		adv = ADVERTISE_1000XFULL;
2923 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT,
2924 				      advertising))
2925 			adv |= ADVERTISE_1000XPAUSE;
2926 		if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT,
2927 				      advertising))
2928 			adv |= ADVERTISE_1000XPSE_ASYM;
2929 		return adv;
2930 	case PHY_INTERFACE_MODE_SGMII:
2931 		return 0x0001;
2932 	default:
2933 		/* Nothing to do for other modes */
2934 		return -EINVAL;
2935 	}
2936 }
2937 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement);
2938 
2939 /**
2940  * phylink_mii_c22_pcs_config() - configure clause 22 PCS
2941  * @pcs: a pointer to a &struct mdio_device.
2942  * @mode: link autonegotiation mode
2943  * @interface: the PHY interface mode being configured
2944  * @advertising: the ethtool advertisement mask
2945  *
2946  * Configure a Clause 22 PCS PHY with the appropriate negotiation
2947  * parameters for the @mode, @interface and @advertising parameters.
2948  * Returns negative error number on failure, zero if the advertisement
2949  * has not changed, or positive if there is a change.
2950  */
2951 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode,
2952 			       phy_interface_t interface,
2953 			       const unsigned long *advertising)
2954 {
2955 	bool changed = 0;
2956 	u16 bmcr;
2957 	int ret, adv;
2958 
2959 	adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising);
2960 	if (adv >= 0) {
2961 		ret = mdiobus_modify_changed(pcs->bus, pcs->addr,
2962 					     MII_ADVERTISE, 0xffff, adv);
2963 		if (ret < 0)
2964 			return ret;
2965 		changed = ret;
2966 	}
2967 
2968 	/* Ensure ISOLATE bit is disabled */
2969 	if (mode == MLO_AN_INBAND &&
2970 	    linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))
2971 		bmcr = BMCR_ANENABLE;
2972 	else
2973 		bmcr = 0;
2974 
2975 	ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr);
2976 	if (ret < 0)
2977 		return ret;
2978 
2979 	return changed;
2980 }
2981 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config);
2982 
2983 /**
2984  * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation
2985  * @pcs: a pointer to a &struct mdio_device.
2986  *
2987  * Helper for MAC PCS supporting the 802.3 clause 22 register set for
2988  * clause 37 negotiation.
2989  *
2990  * Restart the clause 37 negotiation with the link partner. This is
2991  * suitable to be directly plugged into the mac_pcs_get_state() member
2992  * of the struct phylink_mac_ops structure.
2993  */
2994 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs)
2995 {
2996 	int val = mdiodev_read(pcs, MII_BMCR);
2997 
2998 	if (val >= 0) {
2999 		val |= BMCR_ANRESTART;
3000 
3001 		mdiodev_write(pcs, MII_BMCR, val);
3002 	}
3003 }
3004 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart);
3005 
3006 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
3007 				   struct phylink_link_state *state)
3008 {
3009 	struct mii_bus *bus = pcs->bus;
3010 	int addr = pcs->addr;
3011 	int stat;
3012 
3013 	stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1);
3014 	if (stat < 0) {
3015 		state->link = false;
3016 		return;
3017 	}
3018 
3019 	state->link = !!(stat & MDIO_STAT1_LSTATUS);
3020 	if (!state->link)
3021 		return;
3022 
3023 	switch (state->interface) {
3024 	case PHY_INTERFACE_MODE_10GBASER:
3025 		state->speed = SPEED_10000;
3026 		state->duplex = DUPLEX_FULL;
3027 		break;
3028 
3029 	default:
3030 		break;
3031 	}
3032 }
3033 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state);
3034 
3035 MODULE_LICENSE("GPL v2");
3036