1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 case PHY_INTERFACE_MODE_10G_QXGMII: 235 return SPEED_2500; 236 237 case PHY_INTERFACE_MODE_5GBASER: 238 return SPEED_5000; 239 240 case PHY_INTERFACE_MODE_XGMII: 241 case PHY_INTERFACE_MODE_RXAUI: 242 case PHY_INTERFACE_MODE_XAUI: 243 case PHY_INTERFACE_MODE_10GBASER: 244 case PHY_INTERFACE_MODE_10GKR: 245 case PHY_INTERFACE_MODE_USXGMII: 246 return SPEED_10000; 247 248 case PHY_INTERFACE_MODE_25GBASER: 249 return SPEED_25000; 250 251 case PHY_INTERFACE_MODE_XLGMII: 252 return SPEED_40000; 253 254 case PHY_INTERFACE_MODE_INTERNAL: 255 case PHY_INTERFACE_MODE_NA: 256 case PHY_INTERFACE_MODE_MAX: 257 /* No idea! Garbage in, unknown out */ 258 return SPEED_UNKNOWN; 259 } 260 261 /* If we get here, someone forgot to add an interface mode above */ 262 WARN_ON_ONCE(1); 263 return SPEED_UNKNOWN; 264 } 265 266 /** 267 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 268 * @linkmodes: ethtool linkmode mask (must be already initialised) 269 * @caps: bitmask of MAC capabilities 270 * 271 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 272 * supported by the @caps. @linkmodes must have been initialised previously. 273 */ 274 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 275 unsigned long caps) 276 { 277 if (caps & MAC_SYM_PAUSE) 278 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 279 280 if (caps & MAC_ASYM_PAUSE) 281 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 282 283 if (caps & MAC_10HD) { 284 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 287 } 288 289 if (caps & MAC_10FD) { 290 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 293 } 294 295 if (caps & MAC_100HD) { 296 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 297 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 298 } 299 300 if (caps & MAC_100FD) { 301 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_1000HD) 307 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 308 309 if (caps & MAC_1000FD) { 310 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 314 } 315 316 if (caps & MAC_2500FD) { 317 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 318 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 319 } 320 321 if (caps & MAC_5000FD) 322 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 323 324 if (caps & MAC_10000FD) { 325 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 334 } 335 336 if (caps & MAC_25000FD) { 337 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 340 } 341 342 if (caps & MAC_40000FD) { 343 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 347 } 348 349 if (caps & MAC_50000FD) { 350 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 357 linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 359 } 360 361 if (caps & MAC_56000FD) { 362 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 366 } 367 368 if (caps & MAC_100000FD) { 369 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 373 linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 378 linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 383 linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 385 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 386 } 387 388 if (caps & MAC_200000FD) { 389 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 392 linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 397 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 398 linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 401 } 402 403 if (caps & MAC_400000FD) { 404 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 406 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 407 linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 412 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 413 linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 415 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 416 } 417 } 418 419 static struct { 420 unsigned long mask; 421 int speed; 422 unsigned int duplex; 423 } phylink_caps_params[] = { 424 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 425 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 426 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 427 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 428 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 429 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 430 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 431 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 432 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 433 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 434 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 435 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 436 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 437 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 438 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 439 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 440 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 441 }; 442 443 /** 444 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 445 * @config: pointer to a &struct phylink_config 446 * @max_speed: maximum speed 447 * 448 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 449 * Any further motifications of config.mac_capabilities will override this. 450 */ 451 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 452 { 453 int i; 454 455 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 456 phylink_caps_params[i].speed > max_speed; i++) 457 config->mac_capabilities &= ~phylink_caps_params[i].mask; 458 } 459 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 460 461 /** 462 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 463 * @speed: the speed to search for 464 * @duplex: the duplex to search for 465 * 466 * Find the mac capability for a given speed and duplex. 467 * 468 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 469 * there were no matches. 470 */ 471 static unsigned long phylink_cap_from_speed_duplex(int speed, 472 unsigned int duplex) 473 { 474 int i; 475 476 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 477 if (speed == phylink_caps_params[i].speed && 478 duplex == phylink_caps_params[i].duplex) 479 return phylink_caps_params[i].mask; 480 } 481 482 return 0; 483 } 484 485 /** 486 * phylink_get_capabilities() - get capabilities for a given MAC 487 * @interface: phy interface mode defined by &typedef phy_interface_t 488 * @mac_capabilities: bitmask of MAC capabilities 489 * @rate_matching: type of rate matching being performed 490 * 491 * Get the MAC capabilities that are supported by the @interface mode and 492 * @mac_capabilities. 493 */ 494 static unsigned long phylink_get_capabilities(phy_interface_t interface, 495 unsigned long mac_capabilities, 496 int rate_matching) 497 { 498 int max_speed = phylink_interface_max_speed(interface); 499 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 500 unsigned long matched_caps = 0; 501 502 switch (interface) { 503 case PHY_INTERFACE_MODE_USXGMII: 504 caps |= MAC_10000FD | MAC_5000FD; 505 fallthrough; 506 507 case PHY_INTERFACE_MODE_10G_QXGMII: 508 caps |= MAC_2500FD; 509 fallthrough; 510 511 case PHY_INTERFACE_MODE_RGMII_TXID: 512 case PHY_INTERFACE_MODE_RGMII_RXID: 513 case PHY_INTERFACE_MODE_RGMII_ID: 514 case PHY_INTERFACE_MODE_RGMII: 515 case PHY_INTERFACE_MODE_PSGMII: 516 case PHY_INTERFACE_MODE_QSGMII: 517 case PHY_INTERFACE_MODE_QUSGMII: 518 case PHY_INTERFACE_MODE_SGMII: 519 case PHY_INTERFACE_MODE_GMII: 520 caps |= MAC_1000HD | MAC_1000FD; 521 fallthrough; 522 523 case PHY_INTERFACE_MODE_REVRMII: 524 case PHY_INTERFACE_MODE_RMII: 525 case PHY_INTERFACE_MODE_SMII: 526 case PHY_INTERFACE_MODE_REVMII: 527 case PHY_INTERFACE_MODE_MII: 528 caps |= MAC_10HD | MAC_10FD; 529 fallthrough; 530 531 case PHY_INTERFACE_MODE_100BASEX: 532 caps |= MAC_100HD | MAC_100FD; 533 break; 534 535 case PHY_INTERFACE_MODE_TBI: 536 case PHY_INTERFACE_MODE_MOCA: 537 case PHY_INTERFACE_MODE_RTBI: 538 case PHY_INTERFACE_MODE_1000BASEX: 539 caps |= MAC_1000HD; 540 fallthrough; 541 case PHY_INTERFACE_MODE_1000BASEKX: 542 case PHY_INTERFACE_MODE_TRGMII: 543 caps |= MAC_1000FD; 544 break; 545 546 case PHY_INTERFACE_MODE_2500BASEX: 547 caps |= MAC_2500FD; 548 break; 549 550 case PHY_INTERFACE_MODE_5GBASER: 551 caps |= MAC_5000FD; 552 break; 553 554 case PHY_INTERFACE_MODE_XGMII: 555 case PHY_INTERFACE_MODE_RXAUI: 556 case PHY_INTERFACE_MODE_XAUI: 557 case PHY_INTERFACE_MODE_10GBASER: 558 case PHY_INTERFACE_MODE_10GKR: 559 caps |= MAC_10000FD; 560 break; 561 562 case PHY_INTERFACE_MODE_25GBASER: 563 caps |= MAC_25000FD; 564 break; 565 566 case PHY_INTERFACE_MODE_XLGMII: 567 caps |= MAC_40000FD; 568 break; 569 570 case PHY_INTERFACE_MODE_INTERNAL: 571 caps |= ~0; 572 break; 573 574 case PHY_INTERFACE_MODE_NA: 575 case PHY_INTERFACE_MODE_MAX: 576 break; 577 } 578 579 switch (rate_matching) { 580 case RATE_MATCH_OPEN_LOOP: 581 /* TODO */ 582 fallthrough; 583 case RATE_MATCH_NONE: 584 matched_caps = 0; 585 break; 586 case RATE_MATCH_PAUSE: { 587 /* The MAC must support asymmetric pause towards the local 588 * device for this. We could allow just symmetric pause, but 589 * then we might have to renegotiate if the link partner 590 * doesn't support pause. This is because there's no way to 591 * accept pause frames without transmitting them if we only 592 * support symmetric pause. 593 */ 594 if (!(mac_capabilities & MAC_SYM_PAUSE) || 595 !(mac_capabilities & MAC_ASYM_PAUSE)) 596 break; 597 598 /* We can't adapt if the MAC doesn't support the interface's 599 * max speed at full duplex. 600 */ 601 if (mac_capabilities & 602 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 603 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 604 break; 605 } 606 case RATE_MATCH_CRS: 607 /* The MAC must support half duplex at the interface's max 608 * speed. 609 */ 610 if (mac_capabilities & 611 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 612 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 613 matched_caps &= mac_capabilities; 614 } 615 break; 616 } 617 618 return (caps & mac_capabilities) | matched_caps; 619 } 620 621 /** 622 * phylink_validate_mask_caps() - Restrict link modes based on caps 623 * @supported: ethtool bitmask for supported link modes. 624 * @state: pointer to a &struct phylink_link_state. 625 * @mac_capabilities: bitmask of MAC capabilities 626 * 627 * Calculate the supported link modes based on @mac_capabilities, and restrict 628 * @supported and @state based on that. Use this function if your capabiliies 629 * aren't constant, such as if they vary depending on the interface. 630 */ 631 static void phylink_validate_mask_caps(unsigned long *supported, 632 struct phylink_link_state *state, 633 unsigned long mac_capabilities) 634 { 635 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 636 unsigned long caps; 637 638 phylink_set_port_modes(mask); 639 phylink_set(mask, Autoneg); 640 caps = phylink_get_capabilities(state->interface, mac_capabilities, 641 state->rate_matching); 642 phylink_caps_to_linkmodes(mask, caps); 643 644 linkmode_and(supported, supported, mask); 645 linkmode_and(state->advertising, state->advertising, mask); 646 } 647 648 static int phylink_validate_mac_and_pcs(struct phylink *pl, 649 unsigned long *supported, 650 struct phylink_link_state *state) 651 { 652 unsigned long capabilities; 653 struct phylink_pcs *pcs; 654 int ret; 655 656 /* Get the PCS for this interface mode */ 657 if (pl->using_mac_select_pcs) { 658 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 659 if (IS_ERR(pcs)) 660 return PTR_ERR(pcs); 661 } else { 662 pcs = pl->pcs; 663 } 664 665 if (pcs) { 666 /* The PCS, if present, must be setup before phylink_create() 667 * has been called. If the ops is not initialised, print an 668 * error and backtrace rather than oopsing the kernel. 669 */ 670 if (!pcs->ops) { 671 phylink_err(pl, "interface %s: uninitialised PCS\n", 672 phy_modes(state->interface)); 673 dump_stack(); 674 return -EINVAL; 675 } 676 677 /* Validate the link parameters with the PCS */ 678 if (pcs->ops->pcs_validate) { 679 ret = pcs->ops->pcs_validate(pcs, supported, state); 680 if (ret < 0 || phylink_is_empty_linkmode(supported)) 681 return -EINVAL; 682 683 /* Ensure the advertising mask is a subset of the 684 * supported mask. 685 */ 686 linkmode_and(state->advertising, state->advertising, 687 supported); 688 } 689 } 690 691 /* Then validate the link parameters with the MAC */ 692 if (pl->mac_ops->mac_get_caps) 693 capabilities = pl->mac_ops->mac_get_caps(pl->config, 694 state->interface); 695 else 696 capabilities = pl->config->mac_capabilities; 697 698 phylink_validate_mask_caps(supported, state, capabilities); 699 700 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 701 } 702 703 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 704 const unsigned long *supported, 705 const struct phylink_link_state *state, 706 phy_interface_t interface, 707 unsigned long *accum_supported, 708 unsigned long *accum_advertising) 709 { 710 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 711 struct phylink_link_state tmp_state; 712 713 linkmode_copy(tmp_supported, supported); 714 715 tmp_state = *state; 716 tmp_state.interface = interface; 717 718 if (phy) 719 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 720 721 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 722 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 723 interface, phy_modes(interface), 724 phy_rate_matching_to_str(tmp_state.rate_matching), 725 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 726 727 linkmode_or(accum_supported, accum_supported, tmp_supported); 728 linkmode_or(accum_advertising, accum_advertising, 729 tmp_state.advertising); 730 } 731 } 732 733 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 734 unsigned long *supported, 735 struct phylink_link_state *state, 736 const unsigned long *interfaces) 737 { 738 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 739 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 740 int interface; 741 742 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 743 phylink_validate_one(pl, phy, supported, state, interface, 744 all_s, all_adv); 745 746 linkmode_copy(supported, all_s); 747 linkmode_copy(state->advertising, all_adv); 748 749 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 750 } 751 752 static int phylink_validate(struct phylink *pl, unsigned long *supported, 753 struct phylink_link_state *state) 754 { 755 const unsigned long *interfaces = pl->config->supported_interfaces; 756 757 if (state->interface == PHY_INTERFACE_MODE_NA) 758 return phylink_validate_mask(pl, NULL, supported, state, 759 interfaces); 760 761 if (!test_bit(state->interface, interfaces)) 762 return -EINVAL; 763 764 return phylink_validate_mac_and_pcs(pl, supported, state); 765 } 766 767 static int phylink_parse_fixedlink(struct phylink *pl, 768 const struct fwnode_handle *fwnode) 769 { 770 struct fwnode_handle *fixed_node; 771 bool pause, asym_pause, autoneg; 772 const struct phy_setting *s; 773 struct gpio_desc *desc; 774 u32 speed; 775 int ret; 776 777 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 778 if (fixed_node) { 779 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 780 781 pl->link_config.speed = speed; 782 pl->link_config.duplex = DUPLEX_HALF; 783 784 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 785 pl->link_config.duplex = DUPLEX_FULL; 786 787 /* We treat the "pause" and "asym-pause" terminology as 788 * defining the link partner's ability. 789 */ 790 if (fwnode_property_read_bool(fixed_node, "pause")) 791 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 792 pl->link_config.lp_advertising); 793 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 794 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 795 pl->link_config.lp_advertising); 796 797 if (ret == 0) { 798 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 799 GPIOD_IN, "?"); 800 801 if (!IS_ERR(desc)) 802 pl->link_gpio = desc; 803 else if (desc == ERR_PTR(-EPROBE_DEFER)) 804 ret = -EPROBE_DEFER; 805 } 806 fwnode_handle_put(fixed_node); 807 808 if (ret) 809 return ret; 810 } else { 811 u32 prop[5]; 812 813 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 814 NULL, 0); 815 if (ret != ARRAY_SIZE(prop)) { 816 phylink_err(pl, "broken fixed-link?\n"); 817 return -EINVAL; 818 } 819 820 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 821 prop, ARRAY_SIZE(prop)); 822 if (!ret) { 823 pl->link_config.duplex = prop[1] ? 824 DUPLEX_FULL : DUPLEX_HALF; 825 pl->link_config.speed = prop[2]; 826 if (prop[3]) 827 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 828 pl->link_config.lp_advertising); 829 if (prop[4]) 830 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 831 pl->link_config.lp_advertising); 832 } 833 } 834 835 if (pl->link_config.speed > SPEED_1000 && 836 pl->link_config.duplex != DUPLEX_FULL) 837 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 838 pl->link_config.speed); 839 840 linkmode_fill(pl->supported); 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 phylink_validate(pl, pl->supported, &pl->link_config); 843 844 pause = phylink_test(pl->supported, Pause); 845 asym_pause = phylink_test(pl->supported, Asym_Pause); 846 autoneg = phylink_test(pl->supported, Autoneg); 847 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 848 pl->supported, true); 849 linkmode_zero(pl->supported); 850 phylink_set(pl->supported, MII); 851 852 if (pause) 853 phylink_set(pl->supported, Pause); 854 855 if (asym_pause) 856 phylink_set(pl->supported, Asym_Pause); 857 858 if (autoneg) 859 phylink_set(pl->supported, Autoneg); 860 861 if (s) { 862 __set_bit(s->bit, pl->supported); 863 __set_bit(s->bit, pl->link_config.lp_advertising); 864 } else { 865 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 866 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 867 pl->link_config.speed); 868 } 869 870 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 871 pl->supported); 872 873 pl->link_config.link = 1; 874 pl->link_config.an_complete = 1; 875 876 return 0; 877 } 878 879 static int phylink_parse_mode(struct phylink *pl, 880 const struct fwnode_handle *fwnode) 881 { 882 struct fwnode_handle *dn; 883 const char *managed; 884 unsigned long caps; 885 886 if (pl->config->default_an_inband) 887 pl->cfg_link_an_mode = MLO_AN_INBAND; 888 889 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 890 if (dn || fwnode_property_present(fwnode, "fixed-link")) 891 pl->cfg_link_an_mode = MLO_AN_FIXED; 892 fwnode_handle_put(dn); 893 894 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 895 strcmp(managed, "in-band-status") == 0)) { 896 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 897 phylink_err(pl, 898 "can't use both fixed-link and in-band-status\n"); 899 return -EINVAL; 900 } 901 902 pl->cfg_link_an_mode = MLO_AN_INBAND; 903 } 904 905 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 906 linkmode_zero(pl->supported); 907 phylink_set(pl->supported, MII); 908 phylink_set(pl->supported, Autoneg); 909 phylink_set(pl->supported, Asym_Pause); 910 phylink_set(pl->supported, Pause); 911 912 switch (pl->link_config.interface) { 913 case PHY_INTERFACE_MODE_SGMII: 914 case PHY_INTERFACE_MODE_PSGMII: 915 case PHY_INTERFACE_MODE_QSGMII: 916 case PHY_INTERFACE_MODE_QUSGMII: 917 case PHY_INTERFACE_MODE_RGMII: 918 case PHY_INTERFACE_MODE_RGMII_ID: 919 case PHY_INTERFACE_MODE_RGMII_RXID: 920 case PHY_INTERFACE_MODE_RGMII_TXID: 921 case PHY_INTERFACE_MODE_RTBI: 922 case PHY_INTERFACE_MODE_1000BASEX: 923 case PHY_INTERFACE_MODE_2500BASEX: 924 case PHY_INTERFACE_MODE_5GBASER: 925 case PHY_INTERFACE_MODE_25GBASER: 926 case PHY_INTERFACE_MODE_USXGMII: 927 case PHY_INTERFACE_MODE_10G_QXGMII: 928 case PHY_INTERFACE_MODE_10GKR: 929 case PHY_INTERFACE_MODE_10GBASER: 930 case PHY_INTERFACE_MODE_XLGMII: 931 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 932 caps = phylink_get_capabilities(pl->link_config.interface, caps, 933 RATE_MATCH_NONE); 934 phylink_caps_to_linkmodes(pl->supported, caps); 935 break; 936 937 default: 938 phylink_err(pl, 939 "incorrect link mode %s for in-band status\n", 940 phy_modes(pl->link_config.interface)); 941 return -EINVAL; 942 } 943 944 linkmode_copy(pl->link_config.advertising, pl->supported); 945 946 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 947 phylink_err(pl, 948 "failed to validate link configuration for in-band status\n"); 949 return -EINVAL; 950 } 951 } 952 953 return 0; 954 } 955 956 static void phylink_apply_manual_flow(struct phylink *pl, 957 struct phylink_link_state *state) 958 { 959 /* If autoneg is disabled, pause AN is also disabled */ 960 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 961 state->advertising)) 962 state->pause &= ~MLO_PAUSE_AN; 963 964 /* Manual configuration of pause modes */ 965 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 966 state->pause = pl->link_config.pause; 967 } 968 969 static void phylink_resolve_an_pause(struct phylink_link_state *state) 970 { 971 bool tx_pause, rx_pause; 972 973 if (state->duplex == DUPLEX_FULL) { 974 linkmode_resolve_pause(state->advertising, 975 state->lp_advertising, 976 &tx_pause, &rx_pause); 977 if (tx_pause) 978 state->pause |= MLO_PAUSE_TX; 979 if (rx_pause) 980 state->pause |= MLO_PAUSE_RX; 981 } 982 } 983 984 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 985 phy_interface_t interface) 986 { 987 if (pcs && pcs->ops->pcs_pre_config) 988 pcs->ops->pcs_pre_config(pcs, interface); 989 } 990 991 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 992 phy_interface_t interface) 993 { 994 int err = 0; 995 996 if (pcs && pcs->ops->pcs_post_config) 997 err = pcs->ops->pcs_post_config(pcs, interface); 998 999 return err; 1000 } 1001 1002 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1003 { 1004 if (pcs && pcs->ops->pcs_disable) 1005 pcs->ops->pcs_disable(pcs); 1006 } 1007 1008 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1009 { 1010 int err = 0; 1011 1012 if (pcs && pcs->ops->pcs_enable) 1013 err = pcs->ops->pcs_enable(pcs); 1014 1015 return err; 1016 } 1017 1018 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1019 const struct phylink_link_state *state, 1020 bool permit_pause_to_mac) 1021 { 1022 if (!pcs) 1023 return 0; 1024 1025 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1026 state->advertising, permit_pause_to_mac); 1027 } 1028 1029 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1030 phy_interface_t interface, int speed, 1031 int duplex) 1032 { 1033 if (pcs && pcs->ops->pcs_link_up) 1034 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1035 } 1036 1037 static void phylink_pcs_poll_stop(struct phylink *pl) 1038 { 1039 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1040 del_timer(&pl->link_poll); 1041 } 1042 1043 static void phylink_pcs_poll_start(struct phylink *pl) 1044 { 1045 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1046 mod_timer(&pl->link_poll, jiffies + HZ); 1047 } 1048 1049 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1050 { 1051 int ret = 0; 1052 1053 /* Signal to PCS driver that MAC requires RX clock for init */ 1054 if (pl->config->mac_requires_rxc) 1055 pcs->rxc_always_on = true; 1056 1057 if (pcs->ops->pcs_pre_init) 1058 ret = pcs->ops->pcs_pre_init(pcs); 1059 1060 return ret; 1061 } 1062 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1063 1064 static void phylink_mac_config(struct phylink *pl, 1065 const struct phylink_link_state *state) 1066 { 1067 struct phylink_link_state st = *state; 1068 1069 /* Stop drivers incorrectly using these */ 1070 linkmode_zero(st.lp_advertising); 1071 st.speed = SPEED_UNKNOWN; 1072 st.duplex = DUPLEX_UNKNOWN; 1073 st.an_complete = false; 1074 st.link = false; 1075 1076 phylink_dbg(pl, 1077 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1078 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1079 phy_modes(st.interface), 1080 phy_rate_matching_to_str(st.rate_matching), 1081 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1082 st.pause); 1083 1084 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1085 } 1086 1087 static void phylink_pcs_an_restart(struct phylink *pl) 1088 { 1089 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1090 pl->link_config.advertising) && 1091 phy_interface_mode_is_8023z(pl->link_config.interface) && 1092 phylink_autoneg_inband(pl->cur_link_an_mode)) 1093 pl->pcs->ops->pcs_an_restart(pl->pcs); 1094 } 1095 1096 /** 1097 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1098 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. 1099 * @interface: interface mode to be used 1100 * @advertising: adertisement ethtool link mode mask 1101 * 1102 * Determines the negotiation mode to be used by the PCS, and returns 1103 * one of: 1104 * 1105 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1106 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1107 * will be used. 1108 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1109 * disabled 1110 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1111 * 1112 * Note: this is for cases where the PCS itself is involved in negotiation 1113 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1114 */ 1115 static unsigned int phylink_pcs_neg_mode(unsigned int mode, 1116 phy_interface_t interface, 1117 const unsigned long *advertising) 1118 { 1119 unsigned int neg_mode; 1120 1121 switch (interface) { 1122 case PHY_INTERFACE_MODE_SGMII: 1123 case PHY_INTERFACE_MODE_QSGMII: 1124 case PHY_INTERFACE_MODE_QUSGMII: 1125 case PHY_INTERFACE_MODE_USXGMII: 1126 case PHY_INTERFACE_MODE_10G_QXGMII: 1127 /* These protocols are designed for use with a PHY which 1128 * communicates its negotiation result back to the MAC via 1129 * inband communication. Note: there exist PHYs that run 1130 * with SGMII but do not send the inband data. 1131 */ 1132 if (!phylink_autoneg_inband(mode)) 1133 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1134 else 1135 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1136 break; 1137 1138 case PHY_INTERFACE_MODE_1000BASEX: 1139 case PHY_INTERFACE_MODE_2500BASEX: 1140 /* 1000base-X is designed for use media-side for Fibre 1141 * connections, and thus the Autoneg bit needs to be 1142 * taken into account. We also do this for 2500base-X 1143 * as well, but drivers may not support this, so may 1144 * need to override this. 1145 */ 1146 if (!phylink_autoneg_inband(mode)) 1147 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1148 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1149 advertising)) 1150 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1151 else 1152 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1153 break; 1154 1155 default: 1156 neg_mode = PHYLINK_PCS_NEG_NONE; 1157 break; 1158 } 1159 1160 return neg_mode; 1161 } 1162 1163 static void phylink_major_config(struct phylink *pl, bool restart, 1164 const struct phylink_link_state *state) 1165 { 1166 struct phylink_pcs *pcs = NULL; 1167 bool pcs_changed = false; 1168 unsigned int rate_kbd; 1169 unsigned int neg_mode; 1170 int err; 1171 1172 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1173 1174 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1175 state->interface, 1176 state->advertising); 1177 1178 if (pl->using_mac_select_pcs) { 1179 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1180 if (IS_ERR(pcs)) { 1181 phylink_err(pl, 1182 "mac_select_pcs unexpectedly failed: %pe\n", 1183 pcs); 1184 return; 1185 } 1186 1187 pcs_changed = pcs && pl->pcs != pcs; 1188 } 1189 1190 phylink_pcs_poll_stop(pl); 1191 1192 if (pl->mac_ops->mac_prepare) { 1193 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1194 state->interface); 1195 if (err < 0) { 1196 phylink_err(pl, "mac_prepare failed: %pe\n", 1197 ERR_PTR(err)); 1198 return; 1199 } 1200 } 1201 1202 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1203 * for the change. 1204 */ 1205 if (pcs_changed) { 1206 phylink_pcs_disable(pl->pcs); 1207 1208 if (pl->pcs) 1209 pl->pcs->phylink = NULL; 1210 1211 pcs->phylink = pl; 1212 1213 pl->pcs = pcs; 1214 } 1215 1216 if (pl->pcs) 1217 phylink_pcs_pre_config(pl->pcs, state->interface); 1218 1219 phylink_mac_config(pl, state); 1220 1221 if (pl->pcs) 1222 phylink_pcs_post_config(pl->pcs, state->interface); 1223 1224 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1225 phylink_pcs_enable(pl->pcs); 1226 1227 neg_mode = pl->cur_link_an_mode; 1228 if (pl->pcs && pl->pcs->neg_mode) 1229 neg_mode = pl->pcs_neg_mode; 1230 1231 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1232 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1233 if (err < 0) 1234 phylink_err(pl, "pcs_config failed: %pe\n", 1235 ERR_PTR(err)); 1236 else if (err > 0) 1237 restart = true; 1238 1239 if (restart) 1240 phylink_pcs_an_restart(pl); 1241 1242 if (pl->mac_ops->mac_finish) { 1243 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1244 state->interface); 1245 if (err < 0) 1246 phylink_err(pl, "mac_finish failed: %pe\n", 1247 ERR_PTR(err)); 1248 } 1249 1250 if (pl->sfp_bus) { 1251 rate_kbd = phylink_interface_signal_rate(state->interface); 1252 if (rate_kbd) 1253 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1254 } 1255 1256 phylink_pcs_poll_start(pl); 1257 } 1258 1259 /* 1260 * Reconfigure for a change of inband advertisement. 1261 * If we have a separate PCS, we only need to call its pcs_config() method, 1262 * and then restart AN if it indicates something changed. Otherwise, we do 1263 * the full MAC reconfiguration. 1264 */ 1265 static int phylink_change_inband_advert(struct phylink *pl) 1266 { 1267 unsigned int neg_mode; 1268 int ret; 1269 1270 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1271 return 0; 1272 1273 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1274 phylink_an_mode_str(pl->cur_link_an_mode), 1275 phy_modes(pl->link_config.interface), 1276 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1277 pl->link_config.pause); 1278 1279 /* Recompute the PCS neg mode */ 1280 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1281 pl->link_config.interface, 1282 pl->link_config.advertising); 1283 1284 neg_mode = pl->cur_link_an_mode; 1285 if (pl->pcs->neg_mode) 1286 neg_mode = pl->pcs_neg_mode; 1287 1288 /* Modern PCS-based method; update the advert at the PCS, and 1289 * restart negotiation if the pcs_config() helper indicates that 1290 * the programmed advertisement has changed. 1291 */ 1292 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1293 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1294 if (ret < 0) 1295 return ret; 1296 1297 if (ret > 0) 1298 phylink_pcs_an_restart(pl); 1299 1300 return 0; 1301 } 1302 1303 static void phylink_mac_pcs_get_state(struct phylink *pl, 1304 struct phylink_link_state *state) 1305 { 1306 linkmode_copy(state->advertising, pl->link_config.advertising); 1307 linkmode_zero(state->lp_advertising); 1308 state->interface = pl->link_config.interface; 1309 state->rate_matching = pl->link_config.rate_matching; 1310 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1311 state->advertising)) { 1312 state->speed = SPEED_UNKNOWN; 1313 state->duplex = DUPLEX_UNKNOWN; 1314 state->pause = MLO_PAUSE_NONE; 1315 } else { 1316 state->speed = pl->link_config.speed; 1317 state->duplex = pl->link_config.duplex; 1318 state->pause = pl->link_config.pause; 1319 } 1320 state->an_complete = 0; 1321 state->link = 1; 1322 1323 if (pl->pcs) 1324 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1325 else 1326 state->link = 0; 1327 } 1328 1329 /* The fixed state is... fixed except for the link state, 1330 * which may be determined by a GPIO or a callback. 1331 */ 1332 static void phylink_get_fixed_state(struct phylink *pl, 1333 struct phylink_link_state *state) 1334 { 1335 *state = pl->link_config; 1336 if (pl->config->get_fixed_state) 1337 pl->config->get_fixed_state(pl->config, state); 1338 else if (pl->link_gpio) 1339 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1340 1341 state->pause = MLO_PAUSE_NONE; 1342 phylink_resolve_an_pause(state); 1343 } 1344 1345 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1346 { 1347 struct phylink_link_state link_state; 1348 1349 switch (pl->cur_link_an_mode) { 1350 case MLO_AN_PHY: 1351 link_state = pl->phy_state; 1352 break; 1353 1354 case MLO_AN_FIXED: 1355 phylink_get_fixed_state(pl, &link_state); 1356 break; 1357 1358 case MLO_AN_INBAND: 1359 link_state = pl->link_config; 1360 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1361 link_state.pause = MLO_PAUSE_NONE; 1362 break; 1363 1364 default: /* can't happen */ 1365 return; 1366 } 1367 1368 link_state.link = false; 1369 1370 phylink_apply_manual_flow(pl, &link_state); 1371 phylink_major_config(pl, force_restart, &link_state); 1372 } 1373 1374 static const char *phylink_pause_to_str(int pause) 1375 { 1376 switch (pause & MLO_PAUSE_TXRX_MASK) { 1377 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1378 return "rx/tx"; 1379 case MLO_PAUSE_TX: 1380 return "tx"; 1381 case MLO_PAUSE_RX: 1382 return "rx"; 1383 default: 1384 return "off"; 1385 } 1386 } 1387 1388 static void phylink_link_up(struct phylink *pl, 1389 struct phylink_link_state link_state) 1390 { 1391 struct net_device *ndev = pl->netdev; 1392 unsigned int neg_mode; 1393 int speed, duplex; 1394 bool rx_pause; 1395 1396 speed = link_state.speed; 1397 duplex = link_state.duplex; 1398 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1399 1400 switch (link_state.rate_matching) { 1401 case RATE_MATCH_PAUSE: 1402 /* The PHY is doing rate matchion from the media rate (in 1403 * the link_state) to the interface speed, and will send 1404 * pause frames to the MAC to limit its transmission speed. 1405 */ 1406 speed = phylink_interface_max_speed(link_state.interface); 1407 duplex = DUPLEX_FULL; 1408 rx_pause = true; 1409 break; 1410 1411 case RATE_MATCH_CRS: 1412 /* The PHY is doing rate matchion from the media rate (in 1413 * the link_state) to the interface speed, and will cause 1414 * collisions to the MAC to limit its transmission speed. 1415 */ 1416 speed = phylink_interface_max_speed(link_state.interface); 1417 duplex = DUPLEX_HALF; 1418 break; 1419 } 1420 1421 pl->cur_interface = link_state.interface; 1422 1423 neg_mode = pl->cur_link_an_mode; 1424 if (pl->pcs && pl->pcs->neg_mode) 1425 neg_mode = pl->pcs_neg_mode; 1426 1427 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1428 duplex); 1429 1430 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1431 pl->cur_interface, speed, duplex, 1432 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1433 1434 if (ndev) 1435 netif_carrier_on(ndev); 1436 1437 phylink_info(pl, 1438 "Link is Up - %s/%s - flow control %s\n", 1439 phy_speed_to_str(link_state.speed), 1440 phy_duplex_to_str(link_state.duplex), 1441 phylink_pause_to_str(link_state.pause)); 1442 } 1443 1444 static void phylink_link_down(struct phylink *pl) 1445 { 1446 struct net_device *ndev = pl->netdev; 1447 1448 if (ndev) 1449 netif_carrier_off(ndev); 1450 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1451 pl->cur_interface); 1452 phylink_info(pl, "Link is Down\n"); 1453 } 1454 1455 static void phylink_resolve(struct work_struct *w) 1456 { 1457 struct phylink *pl = container_of(w, struct phylink, resolve); 1458 struct phylink_link_state link_state; 1459 struct net_device *ndev = pl->netdev; 1460 bool mac_config = false; 1461 bool retrigger = false; 1462 bool cur_link_state; 1463 1464 mutex_lock(&pl->state_mutex); 1465 if (pl->netdev) 1466 cur_link_state = netif_carrier_ok(ndev); 1467 else 1468 cur_link_state = pl->old_link_state; 1469 1470 if (pl->phylink_disable_state) { 1471 pl->mac_link_dropped = false; 1472 link_state.link = false; 1473 } else if (pl->mac_link_dropped) { 1474 link_state.link = false; 1475 retrigger = true; 1476 } else { 1477 switch (pl->cur_link_an_mode) { 1478 case MLO_AN_PHY: 1479 link_state = pl->phy_state; 1480 phylink_apply_manual_flow(pl, &link_state); 1481 mac_config = link_state.link; 1482 break; 1483 1484 case MLO_AN_FIXED: 1485 phylink_get_fixed_state(pl, &link_state); 1486 mac_config = link_state.link; 1487 break; 1488 1489 case MLO_AN_INBAND: 1490 phylink_mac_pcs_get_state(pl, &link_state); 1491 1492 /* The PCS may have a latching link-fail indicator. 1493 * If the link was up, bring the link down and 1494 * re-trigger the resolve. Otherwise, re-read the 1495 * PCS state to get the current status of the link. 1496 */ 1497 if (!link_state.link) { 1498 if (cur_link_state) 1499 retrigger = true; 1500 else 1501 phylink_mac_pcs_get_state(pl, 1502 &link_state); 1503 } 1504 1505 /* If we have a phy, the "up" state is the union of 1506 * both the PHY and the MAC 1507 */ 1508 if (pl->phydev) 1509 link_state.link &= pl->phy_state.link; 1510 1511 /* Only update if the PHY link is up */ 1512 if (pl->phydev && pl->phy_state.link) { 1513 /* If the interface has changed, force a 1514 * link down event if the link isn't already 1515 * down, and re-resolve. 1516 */ 1517 if (link_state.interface != 1518 pl->phy_state.interface) { 1519 retrigger = true; 1520 link_state.link = false; 1521 } 1522 link_state.interface = pl->phy_state.interface; 1523 1524 /* If we are doing rate matching, then the 1525 * link speed/duplex comes from the PHY 1526 */ 1527 if (pl->phy_state.rate_matching) { 1528 link_state.rate_matching = 1529 pl->phy_state.rate_matching; 1530 link_state.speed = pl->phy_state.speed; 1531 link_state.duplex = 1532 pl->phy_state.duplex; 1533 } 1534 1535 /* If we have a PHY, we need to update with 1536 * the PHY flow control bits. 1537 */ 1538 link_state.pause = pl->phy_state.pause; 1539 mac_config = true; 1540 } 1541 phylink_apply_manual_flow(pl, &link_state); 1542 break; 1543 } 1544 } 1545 1546 if (mac_config) { 1547 if (link_state.interface != pl->link_config.interface) { 1548 /* The interface has changed, force the link down and 1549 * then reconfigure. 1550 */ 1551 if (cur_link_state) { 1552 phylink_link_down(pl); 1553 cur_link_state = false; 1554 } 1555 phylink_major_config(pl, false, &link_state); 1556 pl->link_config.interface = link_state.interface; 1557 } 1558 } 1559 1560 if (link_state.link != cur_link_state) { 1561 pl->old_link_state = link_state.link; 1562 if (!link_state.link) 1563 phylink_link_down(pl); 1564 else 1565 phylink_link_up(pl, link_state); 1566 } 1567 if (!link_state.link && retrigger) { 1568 pl->mac_link_dropped = false; 1569 queue_work(system_power_efficient_wq, &pl->resolve); 1570 } 1571 mutex_unlock(&pl->state_mutex); 1572 } 1573 1574 static void phylink_run_resolve(struct phylink *pl) 1575 { 1576 if (!pl->phylink_disable_state) 1577 queue_work(system_power_efficient_wq, &pl->resolve); 1578 } 1579 1580 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1581 { 1582 unsigned long state = pl->phylink_disable_state; 1583 1584 set_bit(bit, &pl->phylink_disable_state); 1585 if (state == 0) { 1586 queue_work(system_power_efficient_wq, &pl->resolve); 1587 flush_work(&pl->resolve); 1588 } 1589 } 1590 1591 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1592 { 1593 clear_bit(bit, &pl->phylink_disable_state); 1594 phylink_run_resolve(pl); 1595 } 1596 1597 static void phylink_fixed_poll(struct timer_list *t) 1598 { 1599 struct phylink *pl = container_of(t, struct phylink, link_poll); 1600 1601 mod_timer(t, jiffies + HZ); 1602 1603 phylink_run_resolve(pl); 1604 } 1605 1606 static const struct sfp_upstream_ops sfp_phylink_ops; 1607 1608 static int phylink_register_sfp(struct phylink *pl, 1609 const struct fwnode_handle *fwnode) 1610 { 1611 struct sfp_bus *bus; 1612 int ret; 1613 1614 if (!fwnode) 1615 return 0; 1616 1617 bus = sfp_bus_find_fwnode(fwnode); 1618 if (IS_ERR(bus)) { 1619 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1620 return PTR_ERR(bus); 1621 } 1622 1623 pl->sfp_bus = bus; 1624 1625 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1626 sfp_bus_put(bus); 1627 1628 return ret; 1629 } 1630 1631 /** 1632 * phylink_set_fixed_link() - set the fixed link 1633 * @pl: a pointer to a &struct phylink returned from phylink_create() 1634 * @state: a pointer to a struct phylink_link_state. 1635 * 1636 * This function is used when the link parameters are known and do not change, 1637 * making it suitable for certain types of network connections. 1638 * 1639 * Returns: zero on success or negative error code. 1640 */ 1641 int phylink_set_fixed_link(struct phylink *pl, 1642 const struct phylink_link_state *state) 1643 { 1644 const struct phy_setting *s; 1645 unsigned long *adv; 1646 1647 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1648 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1649 return -EINVAL; 1650 1651 s = phy_lookup_setting(state->speed, state->duplex, 1652 pl->supported, true); 1653 if (!s) 1654 return -EINVAL; 1655 1656 adv = pl->link_config.advertising; 1657 linkmode_zero(adv); 1658 linkmode_set_bit(s->bit, adv); 1659 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1660 1661 pl->link_config.speed = state->speed; 1662 pl->link_config.duplex = state->duplex; 1663 pl->link_config.link = 1; 1664 pl->link_config.an_complete = 1; 1665 1666 pl->cfg_link_an_mode = MLO_AN_FIXED; 1667 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1668 1669 return 0; 1670 } 1671 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1672 1673 /** 1674 * phylink_create() - create a phylink instance 1675 * @config: a pointer to the target &struct phylink_config 1676 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1677 * interface 1678 * @iface: the desired link mode defined by &typedef phy_interface_t 1679 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1680 * 1681 * Create a new phylink instance, and parse the link parameters found in @np. 1682 * This will parse in-band modes, fixed-link or SFP configuration. 1683 * 1684 * Note: the rtnl lock must not be held when calling this function. 1685 * 1686 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1687 * must use IS_ERR() to check for errors from this function. 1688 */ 1689 struct phylink *phylink_create(struct phylink_config *config, 1690 const struct fwnode_handle *fwnode, 1691 phy_interface_t iface, 1692 const struct phylink_mac_ops *mac_ops) 1693 { 1694 bool using_mac_select_pcs = false; 1695 struct phylink *pl; 1696 int ret; 1697 1698 /* Validate the supplied configuration */ 1699 if (phy_interface_empty(config->supported_interfaces)) { 1700 dev_err(config->dev, 1701 "phylink: error: empty supported_interfaces\n"); 1702 return ERR_PTR(-EINVAL); 1703 } 1704 1705 if (mac_ops->mac_select_pcs && 1706 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1707 ERR_PTR(-EOPNOTSUPP)) 1708 using_mac_select_pcs = true; 1709 1710 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1711 if (!pl) 1712 return ERR_PTR(-ENOMEM); 1713 1714 mutex_init(&pl->state_mutex); 1715 INIT_WORK(&pl->resolve, phylink_resolve); 1716 1717 pl->config = config; 1718 if (config->type == PHYLINK_NETDEV) { 1719 pl->netdev = to_net_dev(config->dev); 1720 netif_carrier_off(pl->netdev); 1721 } else if (config->type == PHYLINK_DEV) { 1722 pl->dev = config->dev; 1723 } else { 1724 kfree(pl); 1725 return ERR_PTR(-EINVAL); 1726 } 1727 1728 pl->using_mac_select_pcs = using_mac_select_pcs; 1729 pl->phy_state.interface = iface; 1730 pl->link_interface = iface; 1731 if (iface == PHY_INTERFACE_MODE_MOCA) 1732 pl->link_port = PORT_BNC; 1733 else 1734 pl->link_port = PORT_MII; 1735 pl->link_config.interface = iface; 1736 pl->link_config.pause = MLO_PAUSE_AN; 1737 pl->link_config.speed = SPEED_UNKNOWN; 1738 pl->link_config.duplex = DUPLEX_UNKNOWN; 1739 pl->pcs_state = PCS_STATE_DOWN; 1740 pl->mac_ops = mac_ops; 1741 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1742 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1743 1744 linkmode_fill(pl->supported); 1745 linkmode_copy(pl->link_config.advertising, pl->supported); 1746 phylink_validate(pl, pl->supported, &pl->link_config); 1747 1748 ret = phylink_parse_mode(pl, fwnode); 1749 if (ret < 0) { 1750 kfree(pl); 1751 return ERR_PTR(ret); 1752 } 1753 1754 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1755 ret = phylink_parse_fixedlink(pl, fwnode); 1756 if (ret < 0) { 1757 kfree(pl); 1758 return ERR_PTR(ret); 1759 } 1760 } 1761 1762 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1763 1764 ret = phylink_register_sfp(pl, fwnode); 1765 if (ret < 0) { 1766 kfree(pl); 1767 return ERR_PTR(ret); 1768 } 1769 1770 return pl; 1771 } 1772 EXPORT_SYMBOL_GPL(phylink_create); 1773 1774 /** 1775 * phylink_destroy() - cleanup and destroy the phylink instance 1776 * @pl: a pointer to a &struct phylink returned from phylink_create() 1777 * 1778 * Destroy a phylink instance. Any PHY that has been attached must have been 1779 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1780 * 1781 * Note: the rtnl lock must not be held when calling this function. 1782 */ 1783 void phylink_destroy(struct phylink *pl) 1784 { 1785 sfp_bus_del_upstream(pl->sfp_bus); 1786 if (pl->link_gpio) 1787 gpiod_put(pl->link_gpio); 1788 1789 cancel_work_sync(&pl->resolve); 1790 kfree(pl); 1791 } 1792 EXPORT_SYMBOL_GPL(phylink_destroy); 1793 1794 /** 1795 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1796 * @pl: a pointer to a &struct phylink returned from phylink_create() 1797 * 1798 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1799 * no PHY is needed. 1800 * 1801 * Returns true if phylink will be expecting a PHY. 1802 */ 1803 bool phylink_expects_phy(struct phylink *pl) 1804 { 1805 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1806 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1807 phy_interface_mode_is_8023z(pl->link_config.interface))) 1808 return false; 1809 return true; 1810 } 1811 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1812 1813 static void phylink_phy_change(struct phy_device *phydev, bool up) 1814 { 1815 struct phylink *pl = phydev->phylink; 1816 bool tx_pause, rx_pause; 1817 1818 phy_get_pause(phydev, &tx_pause, &rx_pause); 1819 1820 mutex_lock(&pl->state_mutex); 1821 pl->phy_state.speed = phydev->speed; 1822 pl->phy_state.duplex = phydev->duplex; 1823 pl->phy_state.rate_matching = phydev->rate_matching; 1824 pl->phy_state.pause = MLO_PAUSE_NONE; 1825 if (tx_pause) 1826 pl->phy_state.pause |= MLO_PAUSE_TX; 1827 if (rx_pause) 1828 pl->phy_state.pause |= MLO_PAUSE_RX; 1829 pl->phy_state.interface = phydev->interface; 1830 pl->phy_state.link = up; 1831 mutex_unlock(&pl->state_mutex); 1832 1833 phylink_run_resolve(pl); 1834 1835 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1836 phy_modes(phydev->interface), 1837 phy_speed_to_str(phydev->speed), 1838 phy_duplex_to_str(phydev->duplex), 1839 phy_rate_matching_to_str(phydev->rate_matching), 1840 phylink_pause_to_str(pl->phy_state.pause)); 1841 } 1842 1843 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1844 unsigned long *supported, 1845 struct phylink_link_state *state) 1846 { 1847 DECLARE_PHY_INTERFACE_MASK(interfaces); 1848 1849 /* If the PHY provides a bitmap of the interfaces it will be using 1850 * depending on the negotiated media speeds, use this to validate 1851 * which ethtool link modes can be used. 1852 */ 1853 if (!phy_interface_empty(phy->possible_interfaces)) { 1854 /* We only care about the union of the PHY's interfaces and 1855 * those which the host supports. 1856 */ 1857 phy_interface_and(interfaces, phy->possible_interfaces, 1858 pl->config->supported_interfaces); 1859 1860 if (phy_interface_empty(interfaces)) { 1861 phylink_err(pl, "PHY has no common interfaces\n"); 1862 return -EINVAL; 1863 } 1864 1865 if (phy_on_sfp(phy)) { 1866 /* If the PHY is on a SFP, limit the interfaces to 1867 * those that can be used with a SFP module. 1868 */ 1869 phy_interface_and(interfaces, interfaces, 1870 phylink_sfp_interfaces); 1871 1872 if (phy_interface_empty(interfaces)) { 1873 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1874 return -EINVAL; 1875 } 1876 } 1877 1878 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1879 phydev_name(phy), 1880 (int)PHY_INTERFACE_MODE_MAX, 1881 phy->possible_interfaces, 1882 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1883 1884 return phylink_validate_mask(pl, phy, supported, state, 1885 interfaces); 1886 } 1887 1888 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 1889 phydev_name(phy)); 1890 1891 /* Check whether we would use rate matching for the proposed interface 1892 * mode. 1893 */ 1894 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1895 1896 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1897 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1898 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1899 * their Serdes is either unnecessary or not reasonable. 1900 * 1901 * For these which switch interface modes, we really need to know which 1902 * interface modes the PHY supports to properly work out which ethtool 1903 * linkmodes can be supported. For now, as a work-around, we validate 1904 * against all interface modes, which may lead to more ethtool link 1905 * modes being advertised than are actually supported. 1906 */ 1907 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1908 state->interface != PHY_INTERFACE_MODE_RXAUI && 1909 state->interface != PHY_INTERFACE_MODE_XAUI && 1910 state->interface != PHY_INTERFACE_MODE_USXGMII) 1911 state->interface = PHY_INTERFACE_MODE_NA; 1912 1913 return phylink_validate(pl, supported, state); 1914 } 1915 1916 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1917 phy_interface_t interface) 1918 { 1919 struct phylink_link_state config; 1920 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1921 char *irq_str; 1922 int ret; 1923 1924 /* 1925 * This is the new way of dealing with flow control for PHYs, 1926 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1927 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1928 * using our validate call to the MAC, we rely upon the MAC 1929 * clearing the bits from both supported and advertising fields. 1930 */ 1931 phy_support_asym_pause(phy); 1932 1933 memset(&config, 0, sizeof(config)); 1934 linkmode_copy(supported, phy->supported); 1935 linkmode_copy(config.advertising, phy->advertising); 1936 config.interface = interface; 1937 1938 ret = phylink_validate_phy(pl, phy, supported, &config); 1939 if (ret) { 1940 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1941 phy_modes(config.interface), 1942 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1943 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1944 ERR_PTR(ret)); 1945 return ret; 1946 } 1947 1948 phy->phylink = pl; 1949 phy->phy_link_change = phylink_phy_change; 1950 1951 irq_str = phy_attached_info_irq(phy); 1952 phylink_info(pl, 1953 "PHY [%s] driver [%s] (irq=%s)\n", 1954 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1955 kfree(irq_str); 1956 1957 mutex_lock(&phy->lock); 1958 mutex_lock(&pl->state_mutex); 1959 pl->phydev = phy; 1960 pl->phy_state.interface = interface; 1961 pl->phy_state.pause = MLO_PAUSE_NONE; 1962 pl->phy_state.speed = SPEED_UNKNOWN; 1963 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1964 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1965 linkmode_copy(pl->supported, supported); 1966 linkmode_copy(pl->link_config.advertising, config.advertising); 1967 1968 /* Restrict the phy advertisement according to the MAC support. */ 1969 linkmode_copy(phy->advertising, config.advertising); 1970 mutex_unlock(&pl->state_mutex); 1971 mutex_unlock(&phy->lock); 1972 1973 phylink_dbg(pl, 1974 "phy: %s setting supported %*pb advertising %*pb\n", 1975 phy_modes(interface), 1976 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1977 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1978 1979 if (phy_interrupt_is_valid(phy)) 1980 phy_request_interrupt(phy); 1981 1982 if (pl->config->mac_managed_pm) 1983 phy->mac_managed_pm = true; 1984 1985 return 0; 1986 } 1987 1988 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1989 phy_interface_t interface) 1990 { 1991 u32 flags = 0; 1992 1993 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1994 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1995 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1996 return -EINVAL; 1997 1998 if (pl->phydev) 1999 return -EBUSY; 2000 2001 if (pl->config->mac_requires_rxc) 2002 flags |= PHY_F_RXC_ALWAYS_ON; 2003 2004 return phy_attach_direct(pl->netdev, phy, flags, interface); 2005 } 2006 2007 /** 2008 * phylink_connect_phy() - connect a PHY to the phylink instance 2009 * @pl: a pointer to a &struct phylink returned from phylink_create() 2010 * @phy: a pointer to a &struct phy_device. 2011 * 2012 * Connect @phy to the phylink instance specified by @pl by calling 2013 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2014 * capabilities, start the PHYLIB state machine and enable any interrupts 2015 * that the PHY supports. 2016 * 2017 * This updates the phylink's ethtool supported and advertising link mode 2018 * masks. 2019 * 2020 * Returns 0 on success or a negative errno. 2021 */ 2022 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2023 { 2024 int ret; 2025 2026 /* Use PHY device/driver interface */ 2027 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2028 pl->link_interface = phy->interface; 2029 pl->link_config.interface = pl->link_interface; 2030 } 2031 2032 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2033 if (ret < 0) 2034 return ret; 2035 2036 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2037 if (ret) 2038 phy_detach(phy); 2039 2040 return ret; 2041 } 2042 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2043 2044 /** 2045 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2046 * @pl: a pointer to a &struct phylink returned from phylink_create() 2047 * @dn: a pointer to a &struct device_node. 2048 * @flags: PHY-specific flags to communicate to the PHY device driver 2049 * 2050 * Connect the phy specified in the device node @dn to the phylink instance 2051 * specified by @pl. Actions specified in phylink_connect_phy() will be 2052 * performed. 2053 * 2054 * Returns 0 on success or a negative errno. 2055 */ 2056 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2057 u32 flags) 2058 { 2059 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2060 } 2061 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2062 2063 /** 2064 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2065 * @pl: a pointer to a &struct phylink returned from phylink_create() 2066 * @fwnode: a pointer to a &struct fwnode_handle. 2067 * @flags: PHY-specific flags to communicate to the PHY device driver 2068 * 2069 * Connect the phy specified @fwnode to the phylink instance specified 2070 * by @pl. 2071 * 2072 * Returns 0 on success or a negative errno. 2073 */ 2074 int phylink_fwnode_phy_connect(struct phylink *pl, 2075 const struct fwnode_handle *fwnode, 2076 u32 flags) 2077 { 2078 struct fwnode_handle *phy_fwnode; 2079 struct phy_device *phy_dev; 2080 int ret; 2081 2082 /* Fixed links and 802.3z are handled without needing a PHY */ 2083 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2084 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2085 phy_interface_mode_is_8023z(pl->link_interface))) 2086 return 0; 2087 2088 phy_fwnode = fwnode_get_phy_node(fwnode); 2089 if (IS_ERR(phy_fwnode)) { 2090 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2091 return -ENODEV; 2092 return 0; 2093 } 2094 2095 phy_dev = fwnode_phy_find_device(phy_fwnode); 2096 /* We're done with the phy_node handle */ 2097 fwnode_handle_put(phy_fwnode); 2098 if (!phy_dev) 2099 return -ENODEV; 2100 2101 /* Use PHY device/driver interface */ 2102 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2103 pl->link_interface = phy_dev->interface; 2104 pl->link_config.interface = pl->link_interface; 2105 } 2106 2107 if (pl->config->mac_requires_rxc) 2108 flags |= PHY_F_RXC_ALWAYS_ON; 2109 2110 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2111 pl->link_interface); 2112 phy_device_free(phy_dev); 2113 if (ret) 2114 return ret; 2115 2116 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2117 if (ret) 2118 phy_detach(phy_dev); 2119 2120 return ret; 2121 } 2122 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2123 2124 /** 2125 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2126 * instance. 2127 * @pl: a pointer to a &struct phylink returned from phylink_create() 2128 * 2129 * Disconnect any current PHY from the phylink instance described by @pl. 2130 */ 2131 void phylink_disconnect_phy(struct phylink *pl) 2132 { 2133 struct phy_device *phy; 2134 2135 ASSERT_RTNL(); 2136 2137 phy = pl->phydev; 2138 if (phy) { 2139 mutex_lock(&phy->lock); 2140 mutex_lock(&pl->state_mutex); 2141 pl->phydev = NULL; 2142 mutex_unlock(&pl->state_mutex); 2143 mutex_unlock(&phy->lock); 2144 flush_work(&pl->resolve); 2145 2146 phy_disconnect(phy); 2147 } 2148 } 2149 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2150 2151 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2152 { 2153 if (!up) 2154 pl->mac_link_dropped = true; 2155 phylink_run_resolve(pl); 2156 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2157 } 2158 2159 /** 2160 * phylink_mac_change() - notify phylink of a change in MAC state 2161 * @pl: a pointer to a &struct phylink returned from phylink_create() 2162 * @up: indicates whether the link is currently up. 2163 * 2164 * The MAC driver should call this driver when the state of its link 2165 * changes (eg, link failure, new negotiation results, etc.) 2166 */ 2167 void phylink_mac_change(struct phylink *pl, bool up) 2168 { 2169 phylink_link_changed(pl, up, "mac"); 2170 } 2171 EXPORT_SYMBOL_GPL(phylink_mac_change); 2172 2173 /** 2174 * phylink_pcs_change() - notify phylink of a change to PCS link state 2175 * @pcs: pointer to &struct phylink_pcs 2176 * @up: indicates whether the link is currently up. 2177 * 2178 * The PCS driver should call this when the state of its link changes 2179 * (e.g. link failure, new negotiation results, etc.) Note: it should 2180 * not determine "up" by reading the BMSR. If in doubt about the link 2181 * state at interrupt time, then pass true if pcs_get_state() returns 2182 * the latched link-down state, otherwise pass false. 2183 */ 2184 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2185 { 2186 struct phylink *pl = pcs->phylink; 2187 2188 if (pl) 2189 phylink_link_changed(pl, up, "pcs"); 2190 } 2191 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2192 2193 static irqreturn_t phylink_link_handler(int irq, void *data) 2194 { 2195 struct phylink *pl = data; 2196 2197 phylink_run_resolve(pl); 2198 2199 return IRQ_HANDLED; 2200 } 2201 2202 /** 2203 * phylink_start() - start a phylink instance 2204 * @pl: a pointer to a &struct phylink returned from phylink_create() 2205 * 2206 * Start the phylink instance specified by @pl, configuring the MAC for the 2207 * desired link mode(s) and negotiation style. This should be called from the 2208 * network device driver's &struct net_device_ops ndo_open() method. 2209 */ 2210 void phylink_start(struct phylink *pl) 2211 { 2212 bool poll = false; 2213 2214 ASSERT_RTNL(); 2215 2216 phylink_info(pl, "configuring for %s/%s link mode\n", 2217 phylink_an_mode_str(pl->cur_link_an_mode), 2218 phy_modes(pl->link_config.interface)); 2219 2220 /* Always set the carrier off */ 2221 if (pl->netdev) 2222 netif_carrier_off(pl->netdev); 2223 2224 pl->pcs_state = PCS_STATE_STARTING; 2225 2226 /* Apply the link configuration to the MAC when starting. This allows 2227 * a fixed-link to start with the correct parameters, and also 2228 * ensures that we set the appropriate advertisement for Serdes links. 2229 * 2230 * Restart autonegotiation if using 802.3z to ensure that the link 2231 * parameters are properly negotiated. This is necessary for DSA 2232 * switches using 802.3z negotiation to ensure they see our modes. 2233 */ 2234 phylink_mac_initial_config(pl, true); 2235 2236 pl->pcs_state = PCS_STATE_STARTED; 2237 2238 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2239 2240 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2241 int irq = gpiod_to_irq(pl->link_gpio); 2242 2243 if (irq > 0) { 2244 if (!request_irq(irq, phylink_link_handler, 2245 IRQF_TRIGGER_RISING | 2246 IRQF_TRIGGER_FALLING, 2247 "netdev link", pl)) 2248 pl->link_irq = irq; 2249 else 2250 irq = 0; 2251 } 2252 if (irq <= 0) 2253 poll = true; 2254 } 2255 2256 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2257 poll |= pl->config->poll_fixed_state; 2258 2259 if (poll) 2260 mod_timer(&pl->link_poll, jiffies + HZ); 2261 if (pl->phydev) 2262 phy_start(pl->phydev); 2263 if (pl->sfp_bus) 2264 sfp_upstream_start(pl->sfp_bus); 2265 } 2266 EXPORT_SYMBOL_GPL(phylink_start); 2267 2268 /** 2269 * phylink_stop() - stop a phylink instance 2270 * @pl: a pointer to a &struct phylink returned from phylink_create() 2271 * 2272 * Stop the phylink instance specified by @pl. This should be called from the 2273 * network device driver's &struct net_device_ops ndo_stop() method. The 2274 * network device's carrier state should not be changed prior to calling this 2275 * function. 2276 * 2277 * This will synchronously bring down the link if the link is not already 2278 * down (in other words, it will trigger a mac_link_down() method call.) 2279 */ 2280 void phylink_stop(struct phylink *pl) 2281 { 2282 ASSERT_RTNL(); 2283 2284 if (pl->sfp_bus) 2285 sfp_upstream_stop(pl->sfp_bus); 2286 if (pl->phydev) 2287 phy_stop(pl->phydev); 2288 del_timer_sync(&pl->link_poll); 2289 if (pl->link_irq) { 2290 free_irq(pl->link_irq, pl); 2291 pl->link_irq = 0; 2292 } 2293 2294 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2295 2296 pl->pcs_state = PCS_STATE_DOWN; 2297 2298 phylink_pcs_disable(pl->pcs); 2299 } 2300 EXPORT_SYMBOL_GPL(phylink_stop); 2301 2302 /** 2303 * phylink_suspend() - handle a network device suspend event 2304 * @pl: a pointer to a &struct phylink returned from phylink_create() 2305 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2306 * 2307 * Handle a network device suspend event. There are several cases: 2308 * 2309 * - If Wake-on-Lan is not active, we can bring down the link between 2310 * the MAC and PHY by calling phylink_stop(). 2311 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2312 * can also bring down the link between the MAC and PHY. 2313 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2314 * still needs to receive packets, so we can not bring the link down. 2315 */ 2316 void phylink_suspend(struct phylink *pl, bool mac_wol) 2317 { 2318 ASSERT_RTNL(); 2319 2320 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2321 /* Wake-on-Lan enabled, MAC handling */ 2322 mutex_lock(&pl->state_mutex); 2323 2324 /* Stop the resolver bringing the link up */ 2325 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2326 2327 /* Disable the carrier, to prevent transmit timeouts, 2328 * but one would hope all packets have been sent. This 2329 * also means phylink_resolve() will do nothing. 2330 */ 2331 if (pl->netdev) 2332 netif_carrier_off(pl->netdev); 2333 else 2334 pl->old_link_state = false; 2335 2336 /* We do not call mac_link_down() here as we want the 2337 * link to remain up to receive the WoL packets. 2338 */ 2339 mutex_unlock(&pl->state_mutex); 2340 } else { 2341 phylink_stop(pl); 2342 } 2343 } 2344 EXPORT_SYMBOL_GPL(phylink_suspend); 2345 2346 /** 2347 * phylink_resume() - handle a network device resume event 2348 * @pl: a pointer to a &struct phylink returned from phylink_create() 2349 * 2350 * Undo the effects of phylink_suspend(), returning the link to an 2351 * operational state. 2352 */ 2353 void phylink_resume(struct phylink *pl) 2354 { 2355 ASSERT_RTNL(); 2356 2357 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2358 /* Wake-on-Lan enabled, MAC handling */ 2359 2360 /* Call mac_link_down() so we keep the overall state balanced. 2361 * Do this under the state_mutex lock for consistency. This 2362 * will cause a "Link Down" message to be printed during 2363 * resume, which is harmless - the true link state will be 2364 * printed when we run a resolve. 2365 */ 2366 mutex_lock(&pl->state_mutex); 2367 phylink_link_down(pl); 2368 mutex_unlock(&pl->state_mutex); 2369 2370 /* Re-apply the link parameters so that all the settings get 2371 * restored to the MAC. 2372 */ 2373 phylink_mac_initial_config(pl, true); 2374 2375 /* Re-enable and re-resolve the link parameters */ 2376 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2377 } else { 2378 phylink_start(pl); 2379 } 2380 } 2381 EXPORT_SYMBOL_GPL(phylink_resume); 2382 2383 /** 2384 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2385 * @pl: a pointer to a &struct phylink returned from phylink_create() 2386 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2387 * 2388 * Read the wake on lan parameters from the PHY attached to the phylink 2389 * instance specified by @pl. If no PHY is currently attached, report no 2390 * support for wake on lan. 2391 */ 2392 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2393 { 2394 ASSERT_RTNL(); 2395 2396 wol->supported = 0; 2397 wol->wolopts = 0; 2398 2399 if (pl->phydev) 2400 phy_ethtool_get_wol(pl->phydev, wol); 2401 } 2402 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2403 2404 /** 2405 * phylink_ethtool_set_wol() - set wake on lan parameters 2406 * @pl: a pointer to a &struct phylink returned from phylink_create() 2407 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2408 * 2409 * Set the wake on lan parameters for the PHY attached to the phylink 2410 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2411 * error. 2412 * 2413 * Returns zero on success or negative errno code. 2414 */ 2415 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2416 { 2417 int ret = -EOPNOTSUPP; 2418 2419 ASSERT_RTNL(); 2420 2421 if (pl->phydev) 2422 ret = phy_ethtool_set_wol(pl->phydev, wol); 2423 2424 return ret; 2425 } 2426 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2427 2428 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2429 { 2430 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2431 2432 linkmode_zero(mask); 2433 phylink_set_port_modes(mask); 2434 2435 linkmode_and(dst, dst, mask); 2436 linkmode_or(dst, dst, b); 2437 } 2438 2439 static void phylink_get_ksettings(const struct phylink_link_state *state, 2440 struct ethtool_link_ksettings *kset) 2441 { 2442 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2443 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2444 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2445 kset->base.speed = state->speed; 2446 kset->base.duplex = state->duplex; 2447 } 2448 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2449 state->advertising) ? 2450 AUTONEG_ENABLE : AUTONEG_DISABLE; 2451 } 2452 2453 /** 2454 * phylink_ethtool_ksettings_get() - get the current link settings 2455 * @pl: a pointer to a &struct phylink returned from phylink_create() 2456 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2457 * 2458 * Read the current link settings for the phylink instance specified by @pl. 2459 * This will be the link settings read from the MAC, PHY or fixed link 2460 * settings depending on the current negotiation mode. 2461 */ 2462 int phylink_ethtool_ksettings_get(struct phylink *pl, 2463 struct ethtool_link_ksettings *kset) 2464 { 2465 struct phylink_link_state link_state; 2466 2467 ASSERT_RTNL(); 2468 2469 if (pl->phydev) 2470 phy_ethtool_ksettings_get(pl->phydev, kset); 2471 else 2472 kset->base.port = pl->link_port; 2473 2474 linkmode_copy(kset->link_modes.supported, pl->supported); 2475 2476 switch (pl->cur_link_an_mode) { 2477 case MLO_AN_FIXED: 2478 /* We are using fixed settings. Report these as the 2479 * current link settings - and note that these also 2480 * represent the supported speeds/duplex/pause modes. 2481 */ 2482 phylink_get_fixed_state(pl, &link_state); 2483 phylink_get_ksettings(&link_state, kset); 2484 break; 2485 2486 case MLO_AN_INBAND: 2487 /* If there is a phy attached, then use the reported 2488 * settings from the phy with no modification. 2489 */ 2490 if (pl->phydev) 2491 break; 2492 2493 phylink_mac_pcs_get_state(pl, &link_state); 2494 2495 /* The MAC is reporting the link results from its own PCS 2496 * layer via in-band status. Report these as the current 2497 * link settings. 2498 */ 2499 phylink_get_ksettings(&link_state, kset); 2500 break; 2501 } 2502 2503 return 0; 2504 } 2505 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2506 2507 /** 2508 * phylink_ethtool_ksettings_set() - set the link settings 2509 * @pl: a pointer to a &struct phylink returned from phylink_create() 2510 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2511 */ 2512 int phylink_ethtool_ksettings_set(struct phylink *pl, 2513 const struct ethtool_link_ksettings *kset) 2514 { 2515 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2516 struct phylink_link_state config; 2517 const struct phy_setting *s; 2518 2519 ASSERT_RTNL(); 2520 2521 if (pl->phydev) { 2522 struct ethtool_link_ksettings phy_kset = *kset; 2523 2524 linkmode_and(phy_kset.link_modes.advertising, 2525 phy_kset.link_modes.advertising, 2526 pl->supported); 2527 2528 /* We can rely on phylib for this update; we also do not need 2529 * to update the pl->link_config settings: 2530 * - the configuration returned via ksettings_get() will come 2531 * from phylib whenever a PHY is present. 2532 * - link_config.interface will be updated by the PHY calling 2533 * back via phylink_phy_change() and a subsequent resolve. 2534 * - initial link configuration for PHY mode comes from the 2535 * last phy state updated via phylink_phy_change(). 2536 * - other configuration changes (e.g. pause modes) are 2537 * performed directly via phylib. 2538 * - if in in-band mode with a PHY, the link configuration 2539 * is passed on the link from the PHY, and all of 2540 * link_config.{speed,duplex,an_enabled,pause} are not used. 2541 * - the only possible use would be link_config.advertising 2542 * pause modes when in 1000base-X mode with a PHY, but in 2543 * the presence of a PHY, this should not be changed as that 2544 * should be determined from the media side advertisement. 2545 */ 2546 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2547 } 2548 2549 config = pl->link_config; 2550 /* Mask out unsupported advertisements */ 2551 linkmode_and(config.advertising, kset->link_modes.advertising, 2552 pl->supported); 2553 2554 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2555 switch (kset->base.autoneg) { 2556 case AUTONEG_DISABLE: 2557 /* Autonegotiation disabled, select a suitable speed and 2558 * duplex. 2559 */ 2560 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2561 pl->supported, false); 2562 if (!s) 2563 return -EINVAL; 2564 2565 /* If we have a fixed link, refuse to change link parameters. 2566 * If the link parameters match, accept them but do nothing. 2567 */ 2568 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2569 if (s->speed != pl->link_config.speed || 2570 s->duplex != pl->link_config.duplex) 2571 return -EINVAL; 2572 return 0; 2573 } 2574 2575 config.speed = s->speed; 2576 config.duplex = s->duplex; 2577 break; 2578 2579 case AUTONEG_ENABLE: 2580 /* If we have a fixed link, allow autonegotiation (since that 2581 * is our default case) but do not allow the advertisement to 2582 * be changed. If the advertisement matches, simply return. 2583 */ 2584 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2585 if (!linkmode_equal(config.advertising, 2586 pl->link_config.advertising)) 2587 return -EINVAL; 2588 return 0; 2589 } 2590 2591 config.speed = SPEED_UNKNOWN; 2592 config.duplex = DUPLEX_UNKNOWN; 2593 break; 2594 2595 default: 2596 return -EINVAL; 2597 } 2598 2599 /* We have ruled out the case with a PHY attached, and the 2600 * fixed-link cases. All that is left are in-band links. 2601 */ 2602 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2603 kset->base.autoneg == AUTONEG_ENABLE); 2604 2605 /* If this link is with an SFP, ensure that changes to advertised modes 2606 * also cause the associated interface to be selected such that the 2607 * link can be configured correctly. 2608 */ 2609 if (pl->sfp_bus) { 2610 config.interface = sfp_select_interface(pl->sfp_bus, 2611 config.advertising); 2612 if (config.interface == PHY_INTERFACE_MODE_NA) { 2613 phylink_err(pl, 2614 "selection of interface failed, advertisement %*pb\n", 2615 __ETHTOOL_LINK_MODE_MASK_NBITS, 2616 config.advertising); 2617 return -EINVAL; 2618 } 2619 2620 /* Revalidate with the selected interface */ 2621 linkmode_copy(support, pl->supported); 2622 if (phylink_validate(pl, support, &config)) { 2623 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2624 phylink_an_mode_str(pl->cur_link_an_mode), 2625 phy_modes(config.interface), 2626 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2627 return -EINVAL; 2628 } 2629 } else { 2630 /* Validate without changing the current supported mask. */ 2631 linkmode_copy(support, pl->supported); 2632 if (phylink_validate(pl, support, &config)) 2633 return -EINVAL; 2634 } 2635 2636 /* If autonegotiation is enabled, we must have an advertisement */ 2637 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2638 config.advertising) && 2639 phylink_is_empty_linkmode(config.advertising)) 2640 return -EINVAL; 2641 2642 mutex_lock(&pl->state_mutex); 2643 pl->link_config.speed = config.speed; 2644 pl->link_config.duplex = config.duplex; 2645 2646 if (pl->link_config.interface != config.interface) { 2647 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2648 /* We need to force the link down, then change the interface */ 2649 if (pl->old_link_state) { 2650 phylink_link_down(pl); 2651 pl->old_link_state = false; 2652 } 2653 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2654 &pl->phylink_disable_state)) 2655 phylink_major_config(pl, false, &config); 2656 pl->link_config.interface = config.interface; 2657 linkmode_copy(pl->link_config.advertising, config.advertising); 2658 } else if (!linkmode_equal(pl->link_config.advertising, 2659 config.advertising)) { 2660 linkmode_copy(pl->link_config.advertising, config.advertising); 2661 phylink_change_inband_advert(pl); 2662 } 2663 mutex_unlock(&pl->state_mutex); 2664 2665 return 0; 2666 } 2667 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2668 2669 /** 2670 * phylink_ethtool_nway_reset() - restart negotiation 2671 * @pl: a pointer to a &struct phylink returned from phylink_create() 2672 * 2673 * Restart negotiation for the phylink instance specified by @pl. This will 2674 * cause any attached phy to restart negotiation with the link partner, and 2675 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2676 * negotiation. 2677 * 2678 * Returns zero on success, or negative error code. 2679 */ 2680 int phylink_ethtool_nway_reset(struct phylink *pl) 2681 { 2682 int ret = 0; 2683 2684 ASSERT_RTNL(); 2685 2686 if (pl->phydev) 2687 ret = phy_restart_aneg(pl->phydev); 2688 phylink_pcs_an_restart(pl); 2689 2690 return ret; 2691 } 2692 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2693 2694 /** 2695 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2696 * @pl: a pointer to a &struct phylink returned from phylink_create() 2697 * @pause: a pointer to a &struct ethtool_pauseparam 2698 */ 2699 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2700 struct ethtool_pauseparam *pause) 2701 { 2702 ASSERT_RTNL(); 2703 2704 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2705 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2706 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2707 } 2708 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2709 2710 /** 2711 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2712 * @pl: a pointer to a &struct phylink returned from phylink_create() 2713 * @pause: a pointer to a &struct ethtool_pauseparam 2714 */ 2715 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2716 struct ethtool_pauseparam *pause) 2717 { 2718 struct phylink_link_state *config = &pl->link_config; 2719 bool manual_changed; 2720 int pause_state; 2721 2722 ASSERT_RTNL(); 2723 2724 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2725 return -EOPNOTSUPP; 2726 2727 if (!phylink_test(pl->supported, Pause) && 2728 !phylink_test(pl->supported, Asym_Pause)) 2729 return -EOPNOTSUPP; 2730 2731 if (!phylink_test(pl->supported, Asym_Pause) && 2732 pause->rx_pause != pause->tx_pause) 2733 return -EINVAL; 2734 2735 pause_state = 0; 2736 if (pause->autoneg) 2737 pause_state |= MLO_PAUSE_AN; 2738 if (pause->rx_pause) 2739 pause_state |= MLO_PAUSE_RX; 2740 if (pause->tx_pause) 2741 pause_state |= MLO_PAUSE_TX; 2742 2743 mutex_lock(&pl->state_mutex); 2744 /* 2745 * See the comments for linkmode_set_pause(), wrt the deficiencies 2746 * with the current implementation. A solution to this issue would 2747 * be: 2748 * ethtool Local device 2749 * rx tx Pause AsymDir 2750 * 0 0 0 0 2751 * 1 0 1 1 2752 * 0 1 0 1 2753 * 1 1 1 1 2754 * and then use the ethtool rx/tx enablement status to mask the 2755 * rx/tx pause resolution. 2756 */ 2757 linkmode_set_pause(config->advertising, pause->tx_pause, 2758 pause->rx_pause); 2759 2760 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2761 (!(pause_state & MLO_PAUSE_AN) && 2762 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2763 2764 config->pause = pause_state; 2765 2766 /* Update our in-band advertisement, triggering a renegotiation if 2767 * the advertisement changed. 2768 */ 2769 if (!pl->phydev) 2770 phylink_change_inband_advert(pl); 2771 2772 mutex_unlock(&pl->state_mutex); 2773 2774 /* If we have a PHY, a change of the pause frame advertisement will 2775 * cause phylib to renegotiate (if AN is enabled) which will in turn 2776 * call our phylink_phy_change() and trigger a resolve. Note that 2777 * we can't hold our state mutex while calling phy_set_asym_pause(). 2778 */ 2779 if (pl->phydev) 2780 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2781 pause->tx_pause); 2782 2783 /* If the manual pause settings changed, make sure we trigger a 2784 * resolve to update their state; we can not guarantee that the 2785 * link will cycle. 2786 */ 2787 if (manual_changed) { 2788 pl->mac_link_dropped = true; 2789 phylink_run_resolve(pl); 2790 } 2791 2792 return 0; 2793 } 2794 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2795 2796 /** 2797 * phylink_get_eee_err() - read the energy efficient ethernet error 2798 * counter 2799 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2800 * 2801 * Read the Energy Efficient Ethernet error counter from the PHY associated 2802 * with the phylink instance specified by @pl. 2803 * 2804 * Returns positive error counter value, or negative error code. 2805 */ 2806 int phylink_get_eee_err(struct phylink *pl) 2807 { 2808 int ret = 0; 2809 2810 ASSERT_RTNL(); 2811 2812 if (pl->phydev) 2813 ret = phy_get_eee_err(pl->phydev); 2814 2815 return ret; 2816 } 2817 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2818 2819 /** 2820 * phylink_init_eee() - init and check the EEE features 2821 * @pl: a pointer to a &struct phylink returned from phylink_create() 2822 * @clk_stop_enable: allow PHY to stop receive clock 2823 * 2824 * Must be called either with RTNL held or within mac_link_up() 2825 */ 2826 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2827 { 2828 int ret = -EOPNOTSUPP; 2829 2830 if (pl->phydev) 2831 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2832 2833 return ret; 2834 } 2835 EXPORT_SYMBOL_GPL(phylink_init_eee); 2836 2837 /** 2838 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2839 * @pl: a pointer to a &struct phylink returned from phylink_create() 2840 * @eee: a pointer to a &struct ethtool_keee for the read parameters 2841 */ 2842 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 2843 { 2844 int ret = -EOPNOTSUPP; 2845 2846 ASSERT_RTNL(); 2847 2848 if (pl->phydev) 2849 ret = phy_ethtool_get_eee(pl->phydev, eee); 2850 2851 return ret; 2852 } 2853 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2854 2855 /** 2856 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2857 * @pl: a pointer to a &struct phylink returned from phylink_create() 2858 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 2859 */ 2860 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 2861 { 2862 int ret = -EOPNOTSUPP; 2863 2864 ASSERT_RTNL(); 2865 2866 if (pl->phydev) 2867 ret = phy_ethtool_set_eee(pl->phydev, eee); 2868 2869 return ret; 2870 } 2871 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2872 2873 /* This emulates MII registers for a fixed-mode phy operating as per the 2874 * passed in state. "aneg" defines if we report negotiation is possible. 2875 * 2876 * FIXME: should deal with negotiation state too. 2877 */ 2878 static int phylink_mii_emul_read(unsigned int reg, 2879 struct phylink_link_state *state) 2880 { 2881 struct fixed_phy_status fs; 2882 unsigned long *lpa = state->lp_advertising; 2883 int val; 2884 2885 fs.link = state->link; 2886 fs.speed = state->speed; 2887 fs.duplex = state->duplex; 2888 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2889 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2890 2891 val = swphy_read_reg(reg, &fs); 2892 if (reg == MII_BMSR) { 2893 if (!state->an_complete) 2894 val &= ~BMSR_ANEGCOMPLETE; 2895 } 2896 return val; 2897 } 2898 2899 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2900 unsigned int reg) 2901 { 2902 struct phy_device *phydev = pl->phydev; 2903 int prtad, devad; 2904 2905 if (mdio_phy_id_is_c45(phy_id)) { 2906 prtad = mdio_phy_id_prtad(phy_id); 2907 devad = mdio_phy_id_devad(phy_id); 2908 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2909 reg); 2910 } 2911 2912 if (phydev->is_c45) { 2913 switch (reg) { 2914 case MII_BMCR: 2915 case MII_BMSR: 2916 case MII_PHYSID1: 2917 case MII_PHYSID2: 2918 devad = __ffs(phydev->c45_ids.mmds_present); 2919 break; 2920 case MII_ADVERTISE: 2921 case MII_LPA: 2922 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2923 return -EINVAL; 2924 devad = MDIO_MMD_AN; 2925 if (reg == MII_ADVERTISE) 2926 reg = MDIO_AN_ADVERTISE; 2927 else 2928 reg = MDIO_AN_LPA; 2929 break; 2930 default: 2931 return -EINVAL; 2932 } 2933 prtad = phy_id; 2934 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2935 reg); 2936 } 2937 2938 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2939 } 2940 2941 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2942 unsigned int reg, unsigned int val) 2943 { 2944 struct phy_device *phydev = pl->phydev; 2945 int prtad, devad; 2946 2947 if (mdio_phy_id_is_c45(phy_id)) { 2948 prtad = mdio_phy_id_prtad(phy_id); 2949 devad = mdio_phy_id_devad(phy_id); 2950 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2951 reg, val); 2952 } 2953 2954 if (phydev->is_c45) { 2955 switch (reg) { 2956 case MII_BMCR: 2957 case MII_BMSR: 2958 case MII_PHYSID1: 2959 case MII_PHYSID2: 2960 devad = __ffs(phydev->c45_ids.mmds_present); 2961 break; 2962 case MII_ADVERTISE: 2963 case MII_LPA: 2964 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2965 return -EINVAL; 2966 devad = MDIO_MMD_AN; 2967 if (reg == MII_ADVERTISE) 2968 reg = MDIO_AN_ADVERTISE; 2969 else 2970 reg = MDIO_AN_LPA; 2971 break; 2972 default: 2973 return -EINVAL; 2974 } 2975 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2976 reg, val); 2977 } 2978 2979 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2980 } 2981 2982 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2983 unsigned int reg) 2984 { 2985 struct phylink_link_state state; 2986 int val = 0xffff; 2987 2988 switch (pl->cur_link_an_mode) { 2989 case MLO_AN_FIXED: 2990 if (phy_id == 0) { 2991 phylink_get_fixed_state(pl, &state); 2992 val = phylink_mii_emul_read(reg, &state); 2993 } 2994 break; 2995 2996 case MLO_AN_PHY: 2997 return -EOPNOTSUPP; 2998 2999 case MLO_AN_INBAND: 3000 if (phy_id == 0) { 3001 phylink_mac_pcs_get_state(pl, &state); 3002 val = phylink_mii_emul_read(reg, &state); 3003 } 3004 break; 3005 } 3006 3007 return val & 0xffff; 3008 } 3009 3010 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3011 unsigned int reg, unsigned int val) 3012 { 3013 switch (pl->cur_link_an_mode) { 3014 case MLO_AN_FIXED: 3015 break; 3016 3017 case MLO_AN_PHY: 3018 return -EOPNOTSUPP; 3019 3020 case MLO_AN_INBAND: 3021 break; 3022 } 3023 3024 return 0; 3025 } 3026 3027 /** 3028 * phylink_mii_ioctl() - generic mii ioctl interface 3029 * @pl: a pointer to a &struct phylink returned from phylink_create() 3030 * @ifr: a pointer to a &struct ifreq for socket ioctls 3031 * @cmd: ioctl cmd to execute 3032 * 3033 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3034 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3035 * 3036 * Returns: zero on success or negative error code. 3037 * 3038 * %SIOCGMIIPHY: 3039 * read register from the current PHY. 3040 * %SIOCGMIIREG: 3041 * read register from the specified PHY. 3042 * %SIOCSMIIREG: 3043 * set a register on the specified PHY. 3044 */ 3045 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3046 { 3047 struct mii_ioctl_data *mii = if_mii(ifr); 3048 int ret; 3049 3050 ASSERT_RTNL(); 3051 3052 if (pl->phydev) { 3053 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3054 switch (cmd) { 3055 case SIOCGMIIPHY: 3056 mii->phy_id = pl->phydev->mdio.addr; 3057 fallthrough; 3058 3059 case SIOCGMIIREG: 3060 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3061 if (ret >= 0) { 3062 mii->val_out = ret; 3063 ret = 0; 3064 } 3065 break; 3066 3067 case SIOCSMIIREG: 3068 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3069 mii->val_in); 3070 break; 3071 3072 default: 3073 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3074 break; 3075 } 3076 } else { 3077 switch (cmd) { 3078 case SIOCGMIIPHY: 3079 mii->phy_id = 0; 3080 fallthrough; 3081 3082 case SIOCGMIIREG: 3083 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3084 if (ret >= 0) { 3085 mii->val_out = ret; 3086 ret = 0; 3087 } 3088 break; 3089 3090 case SIOCSMIIREG: 3091 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3092 mii->val_in); 3093 break; 3094 3095 default: 3096 ret = -EOPNOTSUPP; 3097 break; 3098 } 3099 } 3100 3101 return ret; 3102 } 3103 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3104 3105 /** 3106 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3107 * link partners 3108 * @pl: a pointer to a &struct phylink returned from phylink_create() 3109 * @sync: perform action synchronously 3110 * 3111 * If we have a PHY that is not part of a SFP module, then set the speed 3112 * as described in the phy_speed_down() function. Please see this function 3113 * for a description of the @sync parameter. 3114 * 3115 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3116 */ 3117 int phylink_speed_down(struct phylink *pl, bool sync) 3118 { 3119 int ret = 0; 3120 3121 ASSERT_RTNL(); 3122 3123 if (!pl->sfp_bus && pl->phydev) 3124 ret = phy_speed_down(pl->phydev, sync); 3125 3126 return ret; 3127 } 3128 EXPORT_SYMBOL_GPL(phylink_speed_down); 3129 3130 /** 3131 * phylink_speed_up() - restore the advertised speeds prior to the call to 3132 * phylink_speed_down() 3133 * @pl: a pointer to a &struct phylink returned from phylink_create() 3134 * 3135 * If we have a PHY that is not part of a SFP module, then restore the 3136 * PHY speeds as per phy_speed_up(). 3137 * 3138 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3139 */ 3140 int phylink_speed_up(struct phylink *pl) 3141 { 3142 int ret = 0; 3143 3144 ASSERT_RTNL(); 3145 3146 if (!pl->sfp_bus && pl->phydev) 3147 ret = phy_speed_up(pl->phydev); 3148 3149 return ret; 3150 } 3151 EXPORT_SYMBOL_GPL(phylink_speed_up); 3152 3153 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3154 { 3155 struct phylink *pl = upstream; 3156 3157 pl->netdev->sfp_bus = bus; 3158 } 3159 3160 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3161 { 3162 struct phylink *pl = upstream; 3163 3164 pl->netdev->sfp_bus = NULL; 3165 } 3166 3167 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3168 const unsigned long *intf) 3169 { 3170 phy_interface_t interface; 3171 size_t i; 3172 3173 interface = PHY_INTERFACE_MODE_NA; 3174 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3175 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3176 interface = phylink_sfp_interface_preference[i]; 3177 break; 3178 } 3179 3180 return interface; 3181 } 3182 3183 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3184 unsigned long *supported, 3185 struct phylink_link_state *state) 3186 { 3187 bool changed = false; 3188 3189 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3190 phylink_an_mode_str(mode), phy_modes(state->interface), 3191 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3192 3193 if (!linkmode_equal(pl->supported, supported)) { 3194 linkmode_copy(pl->supported, supported); 3195 changed = true; 3196 } 3197 3198 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3199 linkmode_copy(pl->link_config.advertising, state->advertising); 3200 changed = true; 3201 } 3202 3203 if (pl->cur_link_an_mode != mode || 3204 pl->link_config.interface != state->interface) { 3205 pl->cur_link_an_mode = mode; 3206 pl->link_config.interface = state->interface; 3207 3208 changed = true; 3209 3210 phylink_info(pl, "switched to %s/%s link mode\n", 3211 phylink_an_mode_str(mode), 3212 phy_modes(state->interface)); 3213 } 3214 3215 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3216 &pl->phylink_disable_state)) 3217 phylink_mac_initial_config(pl, false); 3218 } 3219 3220 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3221 struct phy_device *phy) 3222 { 3223 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3224 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3225 struct phylink_link_state config; 3226 phy_interface_t iface; 3227 int ret; 3228 3229 linkmode_copy(support, phy->supported); 3230 3231 memset(&config, 0, sizeof(config)); 3232 linkmode_copy(config.advertising, phy->advertising); 3233 config.interface = PHY_INTERFACE_MODE_NA; 3234 config.speed = SPEED_UNKNOWN; 3235 config.duplex = DUPLEX_UNKNOWN; 3236 config.pause = MLO_PAUSE_AN; 3237 3238 /* Ignore errors if we're expecting a PHY to attach later */ 3239 ret = phylink_validate(pl, support, &config); 3240 if (ret) { 3241 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3242 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3243 ERR_PTR(ret)); 3244 return ret; 3245 } 3246 3247 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3248 if (iface == PHY_INTERFACE_MODE_NA) { 3249 phylink_err(pl, 3250 "selection of interface failed, advertisement %*pb\n", 3251 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3252 return -EINVAL; 3253 } 3254 3255 config.interface = iface; 3256 linkmode_copy(support1, support); 3257 ret = phylink_validate(pl, support1, &config); 3258 if (ret) { 3259 phylink_err(pl, 3260 "validation of %s/%s with support %*pb failed: %pe\n", 3261 phylink_an_mode_str(mode), 3262 phy_modes(config.interface), 3263 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3264 ERR_PTR(ret)); 3265 return ret; 3266 } 3267 3268 pl->link_port = pl->sfp_port; 3269 3270 phylink_sfp_set_config(pl, mode, support, &config); 3271 3272 return 0; 3273 } 3274 3275 static int phylink_sfp_config_optical(struct phylink *pl) 3276 { 3277 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3278 DECLARE_PHY_INTERFACE_MASK(interfaces); 3279 struct phylink_link_state config; 3280 phy_interface_t interface; 3281 int ret; 3282 3283 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3284 (int)PHY_INTERFACE_MODE_MAX, 3285 pl->config->supported_interfaces, 3286 (int)PHY_INTERFACE_MODE_MAX, 3287 pl->sfp_interfaces); 3288 3289 /* Find the union of the supported interfaces by the PCS/MAC and 3290 * the SFP module. 3291 */ 3292 phy_interface_and(interfaces, pl->config->supported_interfaces, 3293 pl->sfp_interfaces); 3294 if (phy_interface_empty(interfaces)) { 3295 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3296 return -EINVAL; 3297 } 3298 3299 memset(&config, 0, sizeof(config)); 3300 linkmode_copy(support, pl->sfp_support); 3301 linkmode_copy(config.advertising, pl->sfp_support); 3302 config.speed = SPEED_UNKNOWN; 3303 config.duplex = DUPLEX_UNKNOWN; 3304 config.pause = MLO_PAUSE_AN; 3305 3306 /* For all the interfaces that are supported, reduce the sfp_support 3307 * mask to only those link modes that can be supported. 3308 */ 3309 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3310 interfaces); 3311 if (ret) { 3312 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3313 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3314 return ret; 3315 } 3316 3317 interface = phylink_choose_sfp_interface(pl, interfaces); 3318 if (interface == PHY_INTERFACE_MODE_NA) { 3319 phylink_err(pl, "failed to select SFP interface\n"); 3320 return -EINVAL; 3321 } 3322 3323 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3324 phy_modes(interface)); 3325 3326 config.interface = interface; 3327 3328 /* Ignore errors if we're expecting a PHY to attach later */ 3329 ret = phylink_validate(pl, support, &config); 3330 if (ret) { 3331 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3332 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3333 ERR_PTR(ret)); 3334 return ret; 3335 } 3336 3337 pl->link_port = pl->sfp_port; 3338 3339 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3340 3341 return 0; 3342 } 3343 3344 static int phylink_sfp_module_insert(void *upstream, 3345 const struct sfp_eeprom_id *id) 3346 { 3347 struct phylink *pl = upstream; 3348 3349 ASSERT_RTNL(); 3350 3351 linkmode_zero(pl->sfp_support); 3352 phy_interface_zero(pl->sfp_interfaces); 3353 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3354 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3355 3356 /* If this module may have a PHY connecting later, defer until later */ 3357 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3358 if (pl->sfp_may_have_phy) 3359 return 0; 3360 3361 return phylink_sfp_config_optical(pl); 3362 } 3363 3364 static int phylink_sfp_module_start(void *upstream) 3365 { 3366 struct phylink *pl = upstream; 3367 3368 /* If this SFP module has a PHY, start the PHY now. */ 3369 if (pl->phydev) { 3370 phy_start(pl->phydev); 3371 return 0; 3372 } 3373 3374 /* If the module may have a PHY but we didn't detect one we 3375 * need to configure the MAC here. 3376 */ 3377 if (!pl->sfp_may_have_phy) 3378 return 0; 3379 3380 return phylink_sfp_config_optical(pl); 3381 } 3382 3383 static void phylink_sfp_module_stop(void *upstream) 3384 { 3385 struct phylink *pl = upstream; 3386 3387 /* If this SFP module has a PHY, stop it. */ 3388 if (pl->phydev) 3389 phy_stop(pl->phydev); 3390 } 3391 3392 static void phylink_sfp_link_down(void *upstream) 3393 { 3394 struct phylink *pl = upstream; 3395 3396 ASSERT_RTNL(); 3397 3398 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3399 } 3400 3401 static void phylink_sfp_link_up(void *upstream) 3402 { 3403 struct phylink *pl = upstream; 3404 3405 ASSERT_RTNL(); 3406 3407 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3408 } 3409 3410 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3411 * or 802.3z control word, so inband will not work. 3412 */ 3413 static bool phylink_phy_no_inband(struct phy_device *phy) 3414 { 3415 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3416 0xae025150, 0xfffffff0); 3417 } 3418 3419 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3420 { 3421 struct phylink *pl = upstream; 3422 phy_interface_t interface; 3423 u8 mode; 3424 int ret; 3425 3426 /* 3427 * This is the new way of dealing with flow control for PHYs, 3428 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3429 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3430 * using our validate call to the MAC, we rely upon the MAC 3431 * clearing the bits from both supported and advertising fields. 3432 */ 3433 phy_support_asym_pause(phy); 3434 3435 if (phylink_phy_no_inband(phy)) 3436 mode = MLO_AN_PHY; 3437 else 3438 mode = MLO_AN_INBAND; 3439 3440 /* Set the PHY's host supported interfaces */ 3441 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3442 pl->config->supported_interfaces); 3443 3444 /* Do the initial configuration */ 3445 ret = phylink_sfp_config_phy(pl, mode, phy); 3446 if (ret < 0) 3447 return ret; 3448 3449 interface = pl->link_config.interface; 3450 ret = phylink_attach_phy(pl, phy, interface); 3451 if (ret < 0) 3452 return ret; 3453 3454 ret = phylink_bringup_phy(pl, phy, interface); 3455 if (ret) 3456 phy_detach(phy); 3457 3458 return ret; 3459 } 3460 3461 static void phylink_sfp_disconnect_phy(void *upstream, 3462 struct phy_device *phydev) 3463 { 3464 phylink_disconnect_phy(upstream); 3465 } 3466 3467 static const struct sfp_upstream_ops sfp_phylink_ops = { 3468 .attach = phylink_sfp_attach, 3469 .detach = phylink_sfp_detach, 3470 .module_insert = phylink_sfp_module_insert, 3471 .module_start = phylink_sfp_module_start, 3472 .module_stop = phylink_sfp_module_stop, 3473 .link_up = phylink_sfp_link_up, 3474 .link_down = phylink_sfp_link_down, 3475 .connect_phy = phylink_sfp_connect_phy, 3476 .disconnect_phy = phylink_sfp_disconnect_phy, 3477 }; 3478 3479 /* Helpers for MAC drivers */ 3480 3481 static struct { 3482 int bit; 3483 int speed; 3484 } phylink_c73_priority_resolution[] = { 3485 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3486 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3487 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3488 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3489 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3490 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3491 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3492 /* 5GBASE-KR not supported */ 3493 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3494 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3495 }; 3496 3497 void phylink_resolve_c73(struct phylink_link_state *state) 3498 { 3499 int i; 3500 3501 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3502 int bit = phylink_c73_priority_resolution[i].bit; 3503 if (linkmode_test_bit(bit, state->advertising) && 3504 linkmode_test_bit(bit, state->lp_advertising)) 3505 break; 3506 } 3507 3508 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3509 state->speed = phylink_c73_priority_resolution[i].speed; 3510 state->duplex = DUPLEX_FULL; 3511 } else { 3512 /* negotiation failure */ 3513 state->link = false; 3514 } 3515 3516 phylink_resolve_an_pause(state); 3517 } 3518 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3519 3520 static void phylink_decode_c37_word(struct phylink_link_state *state, 3521 uint16_t config_reg, int speed) 3522 { 3523 int fd_bit; 3524 3525 if (speed == SPEED_2500) 3526 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3527 else 3528 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3529 3530 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3531 3532 if (linkmode_test_bit(fd_bit, state->advertising) && 3533 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3534 state->speed = speed; 3535 state->duplex = DUPLEX_FULL; 3536 } else { 3537 /* negotiation failure */ 3538 state->link = false; 3539 } 3540 3541 phylink_resolve_an_pause(state); 3542 } 3543 3544 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3545 uint16_t config_reg) 3546 { 3547 if (!(config_reg & LPA_SGMII_LINK)) { 3548 state->link = false; 3549 return; 3550 } 3551 3552 switch (config_reg & LPA_SGMII_SPD_MASK) { 3553 case LPA_SGMII_10: 3554 state->speed = SPEED_10; 3555 break; 3556 case LPA_SGMII_100: 3557 state->speed = SPEED_100; 3558 break; 3559 case LPA_SGMII_1000: 3560 state->speed = SPEED_1000; 3561 break; 3562 default: 3563 state->link = false; 3564 return; 3565 } 3566 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3567 state->duplex = DUPLEX_FULL; 3568 else 3569 state->duplex = DUPLEX_HALF; 3570 } 3571 3572 /** 3573 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3574 * @state: a pointer to a struct phylink_link_state. 3575 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3576 * 3577 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3578 * code word. Decode the USXGMII code word and populate the corresponding fields 3579 * (speed, duplex) into the phylink_link_state structure. 3580 */ 3581 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3582 uint16_t lpa) 3583 { 3584 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3585 case MDIO_USXGMII_10: 3586 state->speed = SPEED_10; 3587 break; 3588 case MDIO_USXGMII_100: 3589 state->speed = SPEED_100; 3590 break; 3591 case MDIO_USXGMII_1000: 3592 state->speed = SPEED_1000; 3593 break; 3594 case MDIO_USXGMII_2500: 3595 state->speed = SPEED_2500; 3596 break; 3597 case MDIO_USXGMII_5000: 3598 state->speed = SPEED_5000; 3599 break; 3600 case MDIO_USXGMII_10G: 3601 state->speed = SPEED_10000; 3602 break; 3603 default: 3604 state->link = false; 3605 return; 3606 } 3607 3608 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3609 state->duplex = DUPLEX_FULL; 3610 else 3611 state->duplex = DUPLEX_HALF; 3612 } 3613 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3614 3615 /** 3616 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3617 * @state: a pointer to a struct phylink_link_state. 3618 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3619 * 3620 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3621 * code word. Decode the USGMII code word and populate the corresponding fields 3622 * (speed, duplex) into the phylink_link_state structure. The structure for this 3623 * word is the same as the USXGMII word, except it only supports speeds up to 3624 * 1Gbps. 3625 */ 3626 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3627 uint16_t lpa) 3628 { 3629 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3630 case MDIO_USXGMII_10: 3631 state->speed = SPEED_10; 3632 break; 3633 case MDIO_USXGMII_100: 3634 state->speed = SPEED_100; 3635 break; 3636 case MDIO_USXGMII_1000: 3637 state->speed = SPEED_1000; 3638 break; 3639 default: 3640 state->link = false; 3641 return; 3642 } 3643 3644 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3645 state->duplex = DUPLEX_FULL; 3646 else 3647 state->duplex = DUPLEX_HALF; 3648 } 3649 3650 /** 3651 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3652 * @state: a pointer to a &struct phylink_link_state. 3653 * @bmsr: The value of the %MII_BMSR register 3654 * @lpa: The value of the %MII_LPA register 3655 * 3656 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3657 * clause 37 negotiation and/or SGMII control. 3658 * 3659 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3660 * the phylink @state structure. This is suitable to be used for implementing 3661 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3662 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3663 */ 3664 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3665 u16 bmsr, u16 lpa) 3666 { 3667 state->link = !!(bmsr & BMSR_LSTATUS); 3668 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3669 /* If there is no link or autonegotiation is disabled, the LP advertisement 3670 * data is not meaningful, so don't go any further. 3671 */ 3672 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3673 state->advertising)) 3674 return; 3675 3676 switch (state->interface) { 3677 case PHY_INTERFACE_MODE_1000BASEX: 3678 phylink_decode_c37_word(state, lpa, SPEED_1000); 3679 break; 3680 3681 case PHY_INTERFACE_MODE_2500BASEX: 3682 phylink_decode_c37_word(state, lpa, SPEED_2500); 3683 break; 3684 3685 case PHY_INTERFACE_MODE_SGMII: 3686 case PHY_INTERFACE_MODE_QSGMII: 3687 phylink_decode_sgmii_word(state, lpa); 3688 break; 3689 case PHY_INTERFACE_MODE_QUSGMII: 3690 phylink_decode_usgmii_word(state, lpa); 3691 break; 3692 3693 default: 3694 state->link = false; 3695 break; 3696 } 3697 } 3698 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3699 3700 /** 3701 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3702 * @pcs: a pointer to a &struct mdio_device. 3703 * @state: a pointer to a &struct phylink_link_state. 3704 * 3705 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3706 * clause 37 negotiation and/or SGMII control. 3707 * 3708 * Read the MAC PCS state from the MII device configured in @config and 3709 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3710 * the phylink @state structure. This is suitable to be directly plugged 3711 * into the pcs_get_state() member of the struct phylink_pcs_ops 3712 * structure. 3713 */ 3714 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3715 struct phylink_link_state *state) 3716 { 3717 int bmsr, lpa; 3718 3719 bmsr = mdiodev_read(pcs, MII_BMSR); 3720 lpa = mdiodev_read(pcs, MII_LPA); 3721 if (bmsr < 0 || lpa < 0) { 3722 state->link = false; 3723 return; 3724 } 3725 3726 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3727 } 3728 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3729 3730 /** 3731 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3732 * advertisement 3733 * @interface: the PHY interface mode being configured 3734 * @advertising: the ethtool advertisement mask 3735 * 3736 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3737 * clause 37 negotiation and/or SGMII control. 3738 * 3739 * Encode the clause 37 PCS advertisement as specified by @interface and 3740 * @advertising. 3741 * 3742 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3743 */ 3744 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3745 const unsigned long *advertising) 3746 { 3747 u16 adv; 3748 3749 switch (interface) { 3750 case PHY_INTERFACE_MODE_1000BASEX: 3751 case PHY_INTERFACE_MODE_2500BASEX: 3752 adv = ADVERTISE_1000XFULL; 3753 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3754 advertising)) 3755 adv |= ADVERTISE_1000XPAUSE; 3756 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3757 advertising)) 3758 adv |= ADVERTISE_1000XPSE_ASYM; 3759 return adv; 3760 case PHY_INTERFACE_MODE_SGMII: 3761 case PHY_INTERFACE_MODE_QSGMII: 3762 return 0x0001; 3763 default: 3764 /* Nothing to do for other modes */ 3765 return -EINVAL; 3766 } 3767 } 3768 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3769 3770 /** 3771 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3772 * @pcs: a pointer to a &struct mdio_device. 3773 * @interface: the PHY interface mode being configured 3774 * @advertising: the ethtool advertisement mask 3775 * @neg_mode: PCS negotiation mode 3776 * 3777 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3778 * parameters for the @mode, @interface and @advertising parameters. 3779 * Returns negative error number on failure, zero if the advertisement 3780 * has not changed, or positive if there is a change. 3781 */ 3782 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3783 phy_interface_t interface, 3784 const unsigned long *advertising, 3785 unsigned int neg_mode) 3786 { 3787 bool changed = 0; 3788 u16 bmcr; 3789 int ret, adv; 3790 3791 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3792 if (adv >= 0) { 3793 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3794 MII_ADVERTISE, 0xffff, adv); 3795 if (ret < 0) 3796 return ret; 3797 changed = ret; 3798 } 3799 3800 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3801 bmcr = BMCR_ANENABLE; 3802 else 3803 bmcr = 0; 3804 3805 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3806 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3807 if (ret < 0) 3808 return ret; 3809 3810 return changed; 3811 } 3812 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3813 3814 /** 3815 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3816 * @pcs: a pointer to a &struct mdio_device. 3817 * 3818 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3819 * clause 37 negotiation. 3820 * 3821 * Restart the clause 37 negotiation with the link partner. This is 3822 * suitable to be directly plugged into the pcs_get_state() member 3823 * of the struct phylink_pcs_ops structure. 3824 */ 3825 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3826 { 3827 int val = mdiodev_read(pcs, MII_BMCR); 3828 3829 if (val >= 0) { 3830 val |= BMCR_ANRESTART; 3831 3832 mdiodev_write(pcs, MII_BMCR, val); 3833 } 3834 } 3835 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3836 3837 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3838 struct phylink_link_state *state) 3839 { 3840 struct mii_bus *bus = pcs->bus; 3841 int addr = pcs->addr; 3842 int stat; 3843 3844 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3845 if (stat < 0) { 3846 state->link = false; 3847 return; 3848 } 3849 3850 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3851 if (!state->link) 3852 return; 3853 3854 switch (state->interface) { 3855 case PHY_INTERFACE_MODE_10GBASER: 3856 state->speed = SPEED_10000; 3857 state->duplex = DUPLEX_FULL; 3858 break; 3859 3860 default: 3861 break; 3862 } 3863 } 3864 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3865 3866 static int __init phylink_init(void) 3867 { 3868 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3869 __set_bit(phylink_sfp_interface_preference[i], 3870 phylink_sfp_interfaces); 3871 3872 return 0; 3873 } 3874 3875 module_init(phylink_init); 3876 3877 MODULE_LICENSE("GPL v2"); 3878 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3879