1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 83 struct sfp_bus *sfp_bus; 84 bool sfp_may_have_phy; 85 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 86 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 87 u8 sfp_port; 88 }; 89 90 #define phylink_printk(level, pl, fmt, ...) \ 91 do { \ 92 if ((pl)->config->type == PHYLINK_NETDEV) \ 93 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 94 else if ((pl)->config->type == PHYLINK_DEV) \ 95 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 96 } while (0) 97 98 #define phylink_err(pl, fmt, ...) \ 99 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 100 #define phylink_warn(pl, fmt, ...) \ 101 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 102 #define phylink_info(pl, fmt, ...) \ 103 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 104 #if defined(CONFIG_DYNAMIC_DEBUG) 105 #define phylink_dbg(pl, fmt, ...) \ 106 do { \ 107 if ((pl)->config->type == PHYLINK_NETDEV) \ 108 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 109 else if ((pl)->config->type == PHYLINK_DEV) \ 110 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 111 } while (0) 112 #elif defined(DEBUG) 113 #define phylink_dbg(pl, fmt, ...) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 115 #else 116 #define phylink_dbg(pl, fmt, ...) \ 117 ({ \ 118 if (0) \ 119 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 120 }) 121 #endif 122 123 static const phy_interface_t phylink_sfp_interface_preference[] = { 124 PHY_INTERFACE_MODE_25GBASER, 125 PHY_INTERFACE_MODE_USXGMII, 126 PHY_INTERFACE_MODE_10GBASER, 127 PHY_INTERFACE_MODE_5GBASER, 128 PHY_INTERFACE_MODE_2500BASEX, 129 PHY_INTERFACE_MODE_SGMII, 130 PHY_INTERFACE_MODE_1000BASEX, 131 PHY_INTERFACE_MODE_100BASEX, 132 }; 133 134 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 135 136 /** 137 * phylink_set_port_modes() - set the port type modes in the ethtool mask 138 * @mask: ethtool link mode mask 139 * 140 * Sets all the port type modes in the ethtool mask. MAC drivers should 141 * use this in their 'validate' callback. 142 */ 143 void phylink_set_port_modes(unsigned long *mask) 144 { 145 phylink_set(mask, TP); 146 phylink_set(mask, AUI); 147 phylink_set(mask, MII); 148 phylink_set(mask, FIBRE); 149 phylink_set(mask, BNC); 150 phylink_set(mask, Backplane); 151 } 152 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 153 154 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 155 { 156 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 157 158 phylink_set_port_modes(tmp); 159 phylink_set(tmp, Autoneg); 160 phylink_set(tmp, Pause); 161 phylink_set(tmp, Asym_Pause); 162 163 return linkmode_subset(linkmode, tmp); 164 } 165 166 static const char *phylink_an_mode_str(unsigned int mode) 167 { 168 static const char *modestr[] = { 169 [MLO_AN_PHY] = "phy", 170 [MLO_AN_FIXED] = "fixed", 171 [MLO_AN_INBAND] = "inband", 172 }; 173 174 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 175 } 176 177 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 178 { 179 switch (interface) { 180 case PHY_INTERFACE_MODE_SGMII: 181 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 182 return 1250; 183 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 184 return 3125; 185 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 186 return 5156; 187 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 188 return 10313; 189 default: 190 return 0; 191 } 192 } 193 194 /** 195 * phylink_interface_max_speed() - get the maximum speed of a phy interface 196 * @interface: phy interface mode defined by &typedef phy_interface_t 197 * 198 * Determine the maximum speed of a phy interface. This is intended to help 199 * determine the correct speed to pass to the MAC when the phy is performing 200 * rate matching. 201 * 202 * Return: The maximum speed of @interface 203 */ 204 static int phylink_interface_max_speed(phy_interface_t interface) 205 { 206 switch (interface) { 207 case PHY_INTERFACE_MODE_100BASEX: 208 case PHY_INTERFACE_MODE_REVRMII: 209 case PHY_INTERFACE_MODE_RMII: 210 case PHY_INTERFACE_MODE_SMII: 211 case PHY_INTERFACE_MODE_REVMII: 212 case PHY_INTERFACE_MODE_MII: 213 return SPEED_100; 214 215 case PHY_INTERFACE_MODE_TBI: 216 case PHY_INTERFACE_MODE_MOCA: 217 case PHY_INTERFACE_MODE_RTBI: 218 case PHY_INTERFACE_MODE_1000BASEX: 219 case PHY_INTERFACE_MODE_1000BASEKX: 220 case PHY_INTERFACE_MODE_TRGMII: 221 case PHY_INTERFACE_MODE_RGMII_TXID: 222 case PHY_INTERFACE_MODE_RGMII_RXID: 223 case PHY_INTERFACE_MODE_RGMII_ID: 224 case PHY_INTERFACE_MODE_RGMII: 225 case PHY_INTERFACE_MODE_PSGMII: 226 case PHY_INTERFACE_MODE_QSGMII: 227 case PHY_INTERFACE_MODE_QUSGMII: 228 case PHY_INTERFACE_MODE_SGMII: 229 case PHY_INTERFACE_MODE_GMII: 230 return SPEED_1000; 231 232 case PHY_INTERFACE_MODE_2500BASEX: 233 case PHY_INTERFACE_MODE_10G_QXGMII: 234 return SPEED_2500; 235 236 case PHY_INTERFACE_MODE_5GBASER: 237 return SPEED_5000; 238 239 case PHY_INTERFACE_MODE_XGMII: 240 case PHY_INTERFACE_MODE_RXAUI: 241 case PHY_INTERFACE_MODE_XAUI: 242 case PHY_INTERFACE_MODE_10GBASER: 243 case PHY_INTERFACE_MODE_10GKR: 244 case PHY_INTERFACE_MODE_USXGMII: 245 return SPEED_10000; 246 247 case PHY_INTERFACE_MODE_25GBASER: 248 return SPEED_25000; 249 250 case PHY_INTERFACE_MODE_XLGMII: 251 return SPEED_40000; 252 253 case PHY_INTERFACE_MODE_INTERNAL: 254 case PHY_INTERFACE_MODE_NA: 255 case PHY_INTERFACE_MODE_MAX: 256 /* No idea! Garbage in, unknown out */ 257 return SPEED_UNKNOWN; 258 } 259 260 /* If we get here, someone forgot to add an interface mode above */ 261 WARN_ON_ONCE(1); 262 return SPEED_UNKNOWN; 263 } 264 265 /** 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 267 * @linkmodes: ethtool linkmode mask (must be already initialised) 268 * @caps: bitmask of MAC capabilities 269 * 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 271 * supported by the @caps. @linkmodes must have been initialised previously. 272 */ 273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 274 unsigned long caps) 275 { 276 if (caps & MAC_SYM_PAUSE) 277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 278 279 if (caps & MAC_ASYM_PAUSE) 280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 281 282 if (caps & MAC_10HD) { 283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 286 } 287 288 if (caps & MAC_10FD) { 289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_100HD) { 295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 297 } 298 299 if (caps & MAC_100FD) { 300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_1000HD) 306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 307 308 if (caps & MAC_1000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 313 } 314 315 if (caps & MAC_2500FD) { 316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_5000FD) 321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 322 323 if (caps & MAC_10000FD) { 324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_25000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 339 } 340 341 if (caps & MAC_40000FD) { 342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 346 } 347 348 if (caps & MAC_50000FD) { 349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_56000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 365 } 366 367 if (caps & MAC_100000FD) { 368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 372 linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_200000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 400 } 401 402 if (caps & MAC_400000FD) { 403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 412 linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 415 } 416 } 417 418 static struct { 419 unsigned long mask; 420 int speed; 421 unsigned int duplex; 422 } phylink_caps_params[] = { 423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 436 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 437 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 438 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 439 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 440 }; 441 442 /** 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 444 * @config: pointer to a &struct phylink_config 445 * @max_speed: maximum speed 446 * 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 448 * Any further motifications of config.mac_capabilities will override this. 449 */ 450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 451 { 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 455 phylink_caps_params[i].speed > max_speed; i++) 456 config->mac_capabilities &= ~phylink_caps_params[i].mask; 457 } 458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 459 460 /** 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 462 * @speed: the speed to search for 463 * @duplex: the duplex to search for 464 * 465 * Find the mac capability for a given speed and duplex. 466 * 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 468 * there were no matches. 469 */ 470 static unsigned long phylink_cap_from_speed_duplex(int speed, 471 unsigned int duplex) 472 { 473 int i; 474 475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 476 if (speed == phylink_caps_params[i].speed && 477 duplex == phylink_caps_params[i].duplex) 478 return phylink_caps_params[i].mask; 479 } 480 481 return 0; 482 } 483 484 /** 485 * phylink_get_capabilities() - get capabilities for a given MAC 486 * @interface: phy interface mode defined by &typedef phy_interface_t 487 * @mac_capabilities: bitmask of MAC capabilities 488 * @rate_matching: type of rate matching being performed 489 * 490 * Get the MAC capabilities that are supported by the @interface mode and 491 * @mac_capabilities. 492 */ 493 static unsigned long phylink_get_capabilities(phy_interface_t interface, 494 unsigned long mac_capabilities, 495 int rate_matching) 496 { 497 int max_speed = phylink_interface_max_speed(interface); 498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 499 unsigned long matched_caps = 0; 500 501 switch (interface) { 502 case PHY_INTERFACE_MODE_USXGMII: 503 caps |= MAC_10000FD | MAC_5000FD; 504 fallthrough; 505 506 case PHY_INTERFACE_MODE_10G_QXGMII: 507 caps |= MAC_2500FD; 508 fallthrough; 509 510 case PHY_INTERFACE_MODE_RGMII_TXID: 511 case PHY_INTERFACE_MODE_RGMII_RXID: 512 case PHY_INTERFACE_MODE_RGMII_ID: 513 case PHY_INTERFACE_MODE_RGMII: 514 case PHY_INTERFACE_MODE_PSGMII: 515 case PHY_INTERFACE_MODE_QSGMII: 516 case PHY_INTERFACE_MODE_QUSGMII: 517 case PHY_INTERFACE_MODE_SGMII: 518 case PHY_INTERFACE_MODE_GMII: 519 caps |= MAC_1000HD | MAC_1000FD; 520 fallthrough; 521 522 case PHY_INTERFACE_MODE_REVRMII: 523 case PHY_INTERFACE_MODE_RMII: 524 case PHY_INTERFACE_MODE_SMII: 525 case PHY_INTERFACE_MODE_REVMII: 526 case PHY_INTERFACE_MODE_MII: 527 caps |= MAC_10HD | MAC_10FD; 528 fallthrough; 529 530 case PHY_INTERFACE_MODE_100BASEX: 531 caps |= MAC_100HD | MAC_100FD; 532 break; 533 534 case PHY_INTERFACE_MODE_TBI: 535 case PHY_INTERFACE_MODE_MOCA: 536 case PHY_INTERFACE_MODE_RTBI: 537 case PHY_INTERFACE_MODE_1000BASEX: 538 caps |= MAC_1000HD; 539 fallthrough; 540 case PHY_INTERFACE_MODE_1000BASEKX: 541 case PHY_INTERFACE_MODE_TRGMII: 542 caps |= MAC_1000FD; 543 break; 544 545 case PHY_INTERFACE_MODE_2500BASEX: 546 caps |= MAC_2500FD; 547 break; 548 549 case PHY_INTERFACE_MODE_5GBASER: 550 caps |= MAC_5000FD; 551 break; 552 553 case PHY_INTERFACE_MODE_XGMII: 554 case PHY_INTERFACE_MODE_RXAUI: 555 case PHY_INTERFACE_MODE_XAUI: 556 case PHY_INTERFACE_MODE_10GBASER: 557 case PHY_INTERFACE_MODE_10GKR: 558 caps |= MAC_10000FD; 559 break; 560 561 case PHY_INTERFACE_MODE_25GBASER: 562 caps |= MAC_25000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_XLGMII: 566 caps |= MAC_40000FD; 567 break; 568 569 case PHY_INTERFACE_MODE_INTERNAL: 570 caps |= ~0; 571 break; 572 573 case PHY_INTERFACE_MODE_NA: 574 case PHY_INTERFACE_MODE_MAX: 575 break; 576 } 577 578 switch (rate_matching) { 579 case RATE_MATCH_OPEN_LOOP: 580 /* TODO */ 581 fallthrough; 582 case RATE_MATCH_NONE: 583 matched_caps = 0; 584 break; 585 case RATE_MATCH_PAUSE: { 586 /* The MAC must support asymmetric pause towards the local 587 * device for this. We could allow just symmetric pause, but 588 * then we might have to renegotiate if the link partner 589 * doesn't support pause. This is because there's no way to 590 * accept pause frames without transmitting them if we only 591 * support symmetric pause. 592 */ 593 if (!(mac_capabilities & MAC_SYM_PAUSE) || 594 !(mac_capabilities & MAC_ASYM_PAUSE)) 595 break; 596 597 /* We can't adapt if the MAC doesn't support the interface's 598 * max speed at full duplex. 599 */ 600 if (mac_capabilities & 601 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 602 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 603 break; 604 } 605 case RATE_MATCH_CRS: 606 /* The MAC must support half duplex at the interface's max 607 * speed. 608 */ 609 if (mac_capabilities & 610 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 611 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 612 matched_caps &= mac_capabilities; 613 } 614 break; 615 } 616 617 return (caps & mac_capabilities) | matched_caps; 618 } 619 620 /** 621 * phylink_validate_mask_caps() - Restrict link modes based on caps 622 * @supported: ethtool bitmask for supported link modes. 623 * @state: pointer to a &struct phylink_link_state. 624 * @mac_capabilities: bitmask of MAC capabilities 625 * 626 * Calculate the supported link modes based on @mac_capabilities, and restrict 627 * @supported and @state based on that. Use this function if your capabiliies 628 * aren't constant, such as if they vary depending on the interface. 629 */ 630 static void phylink_validate_mask_caps(unsigned long *supported, 631 struct phylink_link_state *state, 632 unsigned long mac_capabilities) 633 { 634 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 635 unsigned long caps; 636 637 phylink_set_port_modes(mask); 638 phylink_set(mask, Autoneg); 639 caps = phylink_get_capabilities(state->interface, mac_capabilities, 640 state->rate_matching); 641 phylink_caps_to_linkmodes(mask, caps); 642 643 linkmode_and(supported, supported, mask); 644 linkmode_and(state->advertising, state->advertising, mask); 645 } 646 647 static int phylink_validate_mac_and_pcs(struct phylink *pl, 648 unsigned long *supported, 649 struct phylink_link_state *state) 650 { 651 struct phylink_pcs *pcs = NULL; 652 unsigned long capabilities; 653 int ret; 654 655 /* Get the PCS for this interface mode */ 656 if (pl->mac_ops->mac_select_pcs) { 657 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 658 if (IS_ERR(pcs)) 659 return PTR_ERR(pcs); 660 } 661 662 if (pcs) { 663 /* The PCS, if present, must be setup before phylink_create() 664 * has been called. If the ops is not initialised, print an 665 * error and backtrace rather than oopsing the kernel. 666 */ 667 if (!pcs->ops) { 668 phylink_err(pl, "interface %s: uninitialised PCS\n", 669 phy_modes(state->interface)); 670 dump_stack(); 671 return -EINVAL; 672 } 673 674 /* Validate the link parameters with the PCS */ 675 if (pcs->ops->pcs_validate) { 676 ret = pcs->ops->pcs_validate(pcs, supported, state); 677 if (ret < 0 || phylink_is_empty_linkmode(supported)) 678 return -EINVAL; 679 680 /* Ensure the advertising mask is a subset of the 681 * supported mask. 682 */ 683 linkmode_and(state->advertising, state->advertising, 684 supported); 685 } 686 } 687 688 /* Then validate the link parameters with the MAC */ 689 if (pl->mac_ops->mac_get_caps) 690 capabilities = pl->mac_ops->mac_get_caps(pl->config, 691 state->interface); 692 else 693 capabilities = pl->config->mac_capabilities; 694 695 phylink_validate_mask_caps(supported, state, capabilities); 696 697 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 698 } 699 700 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 701 const unsigned long *supported, 702 const struct phylink_link_state *state, 703 phy_interface_t interface, 704 unsigned long *accum_supported, 705 unsigned long *accum_advertising) 706 { 707 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 708 struct phylink_link_state tmp_state; 709 710 linkmode_copy(tmp_supported, supported); 711 712 tmp_state = *state; 713 tmp_state.interface = interface; 714 715 if (phy) 716 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 717 718 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 719 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 720 interface, phy_modes(interface), 721 phy_rate_matching_to_str(tmp_state.rate_matching), 722 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 723 724 linkmode_or(accum_supported, accum_supported, tmp_supported); 725 linkmode_or(accum_advertising, accum_advertising, 726 tmp_state.advertising); 727 } 728 } 729 730 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 731 unsigned long *supported, 732 struct phylink_link_state *state, 733 const unsigned long *interfaces) 734 { 735 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 736 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 737 int interface; 738 739 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 740 phylink_validate_one(pl, phy, supported, state, interface, 741 all_s, all_adv); 742 743 linkmode_copy(supported, all_s); 744 linkmode_copy(state->advertising, all_adv); 745 746 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 747 } 748 749 static int phylink_validate(struct phylink *pl, unsigned long *supported, 750 struct phylink_link_state *state) 751 { 752 const unsigned long *interfaces = pl->config->supported_interfaces; 753 754 if (state->interface == PHY_INTERFACE_MODE_NA) 755 return phylink_validate_mask(pl, NULL, supported, state, 756 interfaces); 757 758 if (!test_bit(state->interface, interfaces)) 759 return -EINVAL; 760 761 return phylink_validate_mac_and_pcs(pl, supported, state); 762 } 763 764 static int phylink_parse_fixedlink(struct phylink *pl, 765 const struct fwnode_handle *fwnode) 766 { 767 struct fwnode_handle *fixed_node; 768 bool pause, asym_pause, autoneg; 769 const struct phy_setting *s; 770 struct gpio_desc *desc; 771 u32 speed; 772 int ret; 773 774 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 775 if (fixed_node) { 776 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 777 778 pl->link_config.speed = speed; 779 pl->link_config.duplex = DUPLEX_HALF; 780 781 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 782 pl->link_config.duplex = DUPLEX_FULL; 783 784 /* We treat the "pause" and "asym-pause" terminology as 785 * defining the link partner's ability. 786 */ 787 if (fwnode_property_read_bool(fixed_node, "pause")) 788 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 789 pl->link_config.lp_advertising); 790 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 791 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 792 pl->link_config.lp_advertising); 793 794 if (ret == 0) { 795 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 796 GPIOD_IN, "?"); 797 798 if (!IS_ERR(desc)) 799 pl->link_gpio = desc; 800 else if (desc == ERR_PTR(-EPROBE_DEFER)) 801 ret = -EPROBE_DEFER; 802 } 803 fwnode_handle_put(fixed_node); 804 805 if (ret) 806 return ret; 807 } else { 808 u32 prop[5]; 809 810 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 811 NULL, 0); 812 if (ret != ARRAY_SIZE(prop)) { 813 phylink_err(pl, "broken fixed-link?\n"); 814 return -EINVAL; 815 } 816 817 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 818 prop, ARRAY_SIZE(prop)); 819 if (!ret) { 820 pl->link_config.duplex = prop[1] ? 821 DUPLEX_FULL : DUPLEX_HALF; 822 pl->link_config.speed = prop[2]; 823 if (prop[3]) 824 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 825 pl->link_config.lp_advertising); 826 if (prop[4]) 827 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 828 pl->link_config.lp_advertising); 829 } 830 } 831 832 if (pl->link_config.speed > SPEED_1000 && 833 pl->link_config.duplex != DUPLEX_FULL) 834 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 835 pl->link_config.speed); 836 837 linkmode_fill(pl->supported); 838 linkmode_copy(pl->link_config.advertising, pl->supported); 839 phylink_validate(pl, pl->supported, &pl->link_config); 840 841 pause = phylink_test(pl->supported, Pause); 842 asym_pause = phylink_test(pl->supported, Asym_Pause); 843 autoneg = phylink_test(pl->supported, Autoneg); 844 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 845 pl->supported, true); 846 linkmode_zero(pl->supported); 847 phylink_set(pl->supported, MII); 848 849 if (pause) 850 phylink_set(pl->supported, Pause); 851 852 if (asym_pause) 853 phylink_set(pl->supported, Asym_Pause); 854 855 if (autoneg) 856 phylink_set(pl->supported, Autoneg); 857 858 if (s) { 859 __set_bit(s->bit, pl->supported); 860 __set_bit(s->bit, pl->link_config.lp_advertising); 861 } else { 862 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 863 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 864 pl->link_config.speed); 865 } 866 867 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 868 pl->supported); 869 870 pl->link_config.link = 1; 871 pl->link_config.an_complete = 1; 872 873 return 0; 874 } 875 876 static int phylink_parse_mode(struct phylink *pl, 877 const struct fwnode_handle *fwnode) 878 { 879 struct fwnode_handle *dn; 880 const char *managed; 881 unsigned long caps; 882 883 if (pl->config->default_an_inband) 884 pl->cfg_link_an_mode = MLO_AN_INBAND; 885 886 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 887 if (dn || fwnode_property_present(fwnode, "fixed-link")) 888 pl->cfg_link_an_mode = MLO_AN_FIXED; 889 fwnode_handle_put(dn); 890 891 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 892 strcmp(managed, "in-band-status") == 0)) { 893 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 894 phylink_err(pl, 895 "can't use both fixed-link and in-band-status\n"); 896 return -EINVAL; 897 } 898 899 pl->cfg_link_an_mode = MLO_AN_INBAND; 900 } 901 902 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 903 linkmode_zero(pl->supported); 904 phylink_set(pl->supported, MII); 905 phylink_set(pl->supported, Autoneg); 906 phylink_set(pl->supported, Asym_Pause); 907 phylink_set(pl->supported, Pause); 908 909 switch (pl->link_config.interface) { 910 case PHY_INTERFACE_MODE_SGMII: 911 case PHY_INTERFACE_MODE_PSGMII: 912 case PHY_INTERFACE_MODE_QSGMII: 913 case PHY_INTERFACE_MODE_QUSGMII: 914 case PHY_INTERFACE_MODE_RGMII: 915 case PHY_INTERFACE_MODE_RGMII_ID: 916 case PHY_INTERFACE_MODE_RGMII_RXID: 917 case PHY_INTERFACE_MODE_RGMII_TXID: 918 case PHY_INTERFACE_MODE_RTBI: 919 case PHY_INTERFACE_MODE_1000BASEX: 920 case PHY_INTERFACE_MODE_2500BASEX: 921 case PHY_INTERFACE_MODE_5GBASER: 922 case PHY_INTERFACE_MODE_25GBASER: 923 case PHY_INTERFACE_MODE_USXGMII: 924 case PHY_INTERFACE_MODE_10G_QXGMII: 925 case PHY_INTERFACE_MODE_10GKR: 926 case PHY_INTERFACE_MODE_10GBASER: 927 case PHY_INTERFACE_MODE_XLGMII: 928 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 929 caps = phylink_get_capabilities(pl->link_config.interface, caps, 930 RATE_MATCH_NONE); 931 phylink_caps_to_linkmodes(pl->supported, caps); 932 break; 933 934 default: 935 phylink_err(pl, 936 "incorrect link mode %s for in-band status\n", 937 phy_modes(pl->link_config.interface)); 938 return -EINVAL; 939 } 940 941 linkmode_copy(pl->link_config.advertising, pl->supported); 942 943 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 944 phylink_err(pl, 945 "failed to validate link configuration for in-band status\n"); 946 return -EINVAL; 947 } 948 } 949 950 return 0; 951 } 952 953 static void phylink_apply_manual_flow(struct phylink *pl, 954 struct phylink_link_state *state) 955 { 956 /* If autoneg is disabled, pause AN is also disabled */ 957 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 958 state->advertising)) 959 state->pause &= ~MLO_PAUSE_AN; 960 961 /* Manual configuration of pause modes */ 962 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 963 state->pause = pl->link_config.pause; 964 } 965 966 static void phylink_resolve_an_pause(struct phylink_link_state *state) 967 { 968 bool tx_pause, rx_pause; 969 970 if (state->duplex == DUPLEX_FULL) { 971 linkmode_resolve_pause(state->advertising, 972 state->lp_advertising, 973 &tx_pause, &rx_pause); 974 if (tx_pause) 975 state->pause |= MLO_PAUSE_TX; 976 if (rx_pause) 977 state->pause |= MLO_PAUSE_RX; 978 } 979 } 980 981 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 982 phy_interface_t interface) 983 { 984 if (pcs && pcs->ops->pcs_pre_config) 985 pcs->ops->pcs_pre_config(pcs, interface); 986 } 987 988 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 989 phy_interface_t interface) 990 { 991 int err = 0; 992 993 if (pcs && pcs->ops->pcs_post_config) 994 err = pcs->ops->pcs_post_config(pcs, interface); 995 996 return err; 997 } 998 999 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1000 { 1001 if (pcs && pcs->ops->pcs_disable) 1002 pcs->ops->pcs_disable(pcs); 1003 } 1004 1005 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1006 { 1007 int err = 0; 1008 1009 if (pcs && pcs->ops->pcs_enable) 1010 err = pcs->ops->pcs_enable(pcs); 1011 1012 return err; 1013 } 1014 1015 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1016 const struct phylink_link_state *state, 1017 bool permit_pause_to_mac) 1018 { 1019 if (!pcs) 1020 return 0; 1021 1022 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1023 state->advertising, permit_pause_to_mac); 1024 } 1025 1026 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1027 phy_interface_t interface, int speed, 1028 int duplex) 1029 { 1030 if (pcs && pcs->ops->pcs_link_up) 1031 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1032 } 1033 1034 static void phylink_pcs_poll_stop(struct phylink *pl) 1035 { 1036 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1037 del_timer(&pl->link_poll); 1038 } 1039 1040 static void phylink_pcs_poll_start(struct phylink *pl) 1041 { 1042 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1043 mod_timer(&pl->link_poll, jiffies + HZ); 1044 } 1045 1046 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1047 { 1048 int ret = 0; 1049 1050 /* Signal to PCS driver that MAC requires RX clock for init */ 1051 if (pl->config->mac_requires_rxc) 1052 pcs->rxc_always_on = true; 1053 1054 if (pcs->ops->pcs_pre_init) 1055 ret = pcs->ops->pcs_pre_init(pcs); 1056 1057 return ret; 1058 } 1059 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1060 1061 static void phylink_mac_config(struct phylink *pl, 1062 const struct phylink_link_state *state) 1063 { 1064 struct phylink_link_state st = *state; 1065 1066 /* Stop drivers incorrectly using these */ 1067 linkmode_zero(st.lp_advertising); 1068 st.speed = SPEED_UNKNOWN; 1069 st.duplex = DUPLEX_UNKNOWN; 1070 st.an_complete = false; 1071 st.link = false; 1072 1073 phylink_dbg(pl, 1074 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1075 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1076 phy_modes(st.interface), 1077 phy_rate_matching_to_str(st.rate_matching), 1078 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1079 st.pause); 1080 1081 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1082 } 1083 1084 static void phylink_pcs_an_restart(struct phylink *pl) 1085 { 1086 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1087 pl->link_config.advertising) && 1088 phy_interface_mode_is_8023z(pl->link_config.interface) && 1089 phylink_autoneg_inband(pl->cur_link_an_mode)) 1090 pl->pcs->ops->pcs_an_restart(pl->pcs); 1091 } 1092 1093 /** 1094 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1095 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. 1096 * @interface: interface mode to be used 1097 * @advertising: adertisement ethtool link mode mask 1098 * 1099 * Determines the negotiation mode to be used by the PCS, and returns 1100 * one of: 1101 * 1102 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1103 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1104 * will be used. 1105 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1106 * disabled 1107 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1108 * 1109 * Note: this is for cases where the PCS itself is involved in negotiation 1110 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1111 */ 1112 static unsigned int phylink_pcs_neg_mode(unsigned int mode, 1113 phy_interface_t interface, 1114 const unsigned long *advertising) 1115 { 1116 unsigned int neg_mode; 1117 1118 switch (interface) { 1119 case PHY_INTERFACE_MODE_SGMII: 1120 case PHY_INTERFACE_MODE_QSGMII: 1121 case PHY_INTERFACE_MODE_QUSGMII: 1122 case PHY_INTERFACE_MODE_USXGMII: 1123 case PHY_INTERFACE_MODE_10G_QXGMII: 1124 /* These protocols are designed for use with a PHY which 1125 * communicates its negotiation result back to the MAC via 1126 * inband communication. Note: there exist PHYs that run 1127 * with SGMII but do not send the inband data. 1128 */ 1129 if (!phylink_autoneg_inband(mode)) 1130 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1131 else 1132 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1133 break; 1134 1135 case PHY_INTERFACE_MODE_1000BASEX: 1136 case PHY_INTERFACE_MODE_2500BASEX: 1137 /* 1000base-X is designed for use media-side for Fibre 1138 * connections, and thus the Autoneg bit needs to be 1139 * taken into account. We also do this for 2500base-X 1140 * as well, but drivers may not support this, so may 1141 * need to override this. 1142 */ 1143 if (!phylink_autoneg_inband(mode)) 1144 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1145 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1146 advertising)) 1147 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1148 else 1149 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1150 break; 1151 1152 default: 1153 neg_mode = PHYLINK_PCS_NEG_NONE; 1154 break; 1155 } 1156 1157 return neg_mode; 1158 } 1159 1160 static void phylink_major_config(struct phylink *pl, bool restart, 1161 const struct phylink_link_state *state) 1162 { 1163 struct phylink_pcs *pcs = NULL; 1164 bool pcs_changed = false; 1165 unsigned int rate_kbd; 1166 unsigned int neg_mode; 1167 int err; 1168 1169 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1170 1171 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1172 state->interface, 1173 state->advertising); 1174 1175 if (pl->mac_ops->mac_select_pcs) { 1176 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1177 if (IS_ERR(pcs)) { 1178 phylink_err(pl, 1179 "mac_select_pcs unexpectedly failed: %pe\n", 1180 pcs); 1181 return; 1182 } 1183 1184 pcs_changed = pl->pcs != pcs; 1185 } 1186 1187 phylink_pcs_poll_stop(pl); 1188 1189 if (pl->mac_ops->mac_prepare) { 1190 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1191 state->interface); 1192 if (err < 0) { 1193 phylink_err(pl, "mac_prepare failed: %pe\n", 1194 ERR_PTR(err)); 1195 return; 1196 } 1197 } 1198 1199 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1200 * for the change. 1201 */ 1202 if (pcs_changed) { 1203 phylink_pcs_disable(pl->pcs); 1204 1205 if (pl->pcs) 1206 pl->pcs->phylink = NULL; 1207 1208 pcs->phylink = pl; 1209 1210 pl->pcs = pcs; 1211 } 1212 1213 if (pl->pcs) 1214 phylink_pcs_pre_config(pl->pcs, state->interface); 1215 1216 phylink_mac_config(pl, state); 1217 1218 if (pl->pcs) 1219 phylink_pcs_post_config(pl->pcs, state->interface); 1220 1221 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1222 phylink_pcs_enable(pl->pcs); 1223 1224 neg_mode = pl->cur_link_an_mode; 1225 if (pl->pcs && pl->pcs->neg_mode) 1226 neg_mode = pl->pcs_neg_mode; 1227 1228 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1229 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1230 if (err < 0) 1231 phylink_err(pl, "pcs_config failed: %pe\n", 1232 ERR_PTR(err)); 1233 else if (err > 0) 1234 restart = true; 1235 1236 if (restart) 1237 phylink_pcs_an_restart(pl); 1238 1239 if (pl->mac_ops->mac_finish) { 1240 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1241 state->interface); 1242 if (err < 0) 1243 phylink_err(pl, "mac_finish failed: %pe\n", 1244 ERR_PTR(err)); 1245 } 1246 1247 if (pl->sfp_bus) { 1248 rate_kbd = phylink_interface_signal_rate(state->interface); 1249 if (rate_kbd) 1250 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1251 } 1252 1253 phylink_pcs_poll_start(pl); 1254 } 1255 1256 /* 1257 * Reconfigure for a change of inband advertisement. 1258 * If we have a separate PCS, we only need to call its pcs_config() method, 1259 * and then restart AN if it indicates something changed. Otherwise, we do 1260 * the full MAC reconfiguration. 1261 */ 1262 static int phylink_change_inband_advert(struct phylink *pl) 1263 { 1264 unsigned int neg_mode; 1265 int ret; 1266 1267 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1268 return 0; 1269 1270 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1271 phylink_an_mode_str(pl->cur_link_an_mode), 1272 phy_modes(pl->link_config.interface), 1273 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1274 pl->link_config.pause); 1275 1276 /* Recompute the PCS neg mode */ 1277 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1278 pl->link_config.interface, 1279 pl->link_config.advertising); 1280 1281 neg_mode = pl->cur_link_an_mode; 1282 if (pl->pcs->neg_mode) 1283 neg_mode = pl->pcs_neg_mode; 1284 1285 /* Modern PCS-based method; update the advert at the PCS, and 1286 * restart negotiation if the pcs_config() helper indicates that 1287 * the programmed advertisement has changed. 1288 */ 1289 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1290 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1291 if (ret < 0) 1292 return ret; 1293 1294 if (ret > 0) 1295 phylink_pcs_an_restart(pl); 1296 1297 return 0; 1298 } 1299 1300 static void phylink_mac_pcs_get_state(struct phylink *pl, 1301 struct phylink_link_state *state) 1302 { 1303 linkmode_copy(state->advertising, pl->link_config.advertising); 1304 linkmode_zero(state->lp_advertising); 1305 state->interface = pl->link_config.interface; 1306 state->rate_matching = pl->link_config.rate_matching; 1307 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1308 state->advertising)) { 1309 state->speed = SPEED_UNKNOWN; 1310 state->duplex = DUPLEX_UNKNOWN; 1311 state->pause = MLO_PAUSE_NONE; 1312 } else { 1313 state->speed = pl->link_config.speed; 1314 state->duplex = pl->link_config.duplex; 1315 state->pause = pl->link_config.pause; 1316 } 1317 state->an_complete = 0; 1318 state->link = 1; 1319 1320 if (pl->pcs) 1321 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1322 else 1323 state->link = 0; 1324 } 1325 1326 /* The fixed state is... fixed except for the link state, 1327 * which may be determined by a GPIO or a callback. 1328 */ 1329 static void phylink_get_fixed_state(struct phylink *pl, 1330 struct phylink_link_state *state) 1331 { 1332 *state = pl->link_config; 1333 if (pl->config->get_fixed_state) 1334 pl->config->get_fixed_state(pl->config, state); 1335 else if (pl->link_gpio) 1336 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1337 1338 state->pause = MLO_PAUSE_NONE; 1339 phylink_resolve_an_pause(state); 1340 } 1341 1342 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1343 { 1344 struct phylink_link_state link_state; 1345 1346 switch (pl->cur_link_an_mode) { 1347 case MLO_AN_PHY: 1348 link_state = pl->phy_state; 1349 break; 1350 1351 case MLO_AN_FIXED: 1352 phylink_get_fixed_state(pl, &link_state); 1353 break; 1354 1355 case MLO_AN_INBAND: 1356 link_state = pl->link_config; 1357 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1358 link_state.pause = MLO_PAUSE_NONE; 1359 break; 1360 1361 default: /* can't happen */ 1362 return; 1363 } 1364 1365 link_state.link = false; 1366 1367 phylink_apply_manual_flow(pl, &link_state); 1368 phylink_major_config(pl, force_restart, &link_state); 1369 } 1370 1371 static const char *phylink_pause_to_str(int pause) 1372 { 1373 switch (pause & MLO_PAUSE_TXRX_MASK) { 1374 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1375 return "rx/tx"; 1376 case MLO_PAUSE_TX: 1377 return "tx"; 1378 case MLO_PAUSE_RX: 1379 return "rx"; 1380 default: 1381 return "off"; 1382 } 1383 } 1384 1385 static void phylink_link_up(struct phylink *pl, 1386 struct phylink_link_state link_state) 1387 { 1388 struct net_device *ndev = pl->netdev; 1389 unsigned int neg_mode; 1390 int speed, duplex; 1391 bool rx_pause; 1392 1393 speed = link_state.speed; 1394 duplex = link_state.duplex; 1395 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1396 1397 switch (link_state.rate_matching) { 1398 case RATE_MATCH_PAUSE: 1399 /* The PHY is doing rate matchion from the media rate (in 1400 * the link_state) to the interface speed, and will send 1401 * pause frames to the MAC to limit its transmission speed. 1402 */ 1403 speed = phylink_interface_max_speed(link_state.interface); 1404 duplex = DUPLEX_FULL; 1405 rx_pause = true; 1406 break; 1407 1408 case RATE_MATCH_CRS: 1409 /* The PHY is doing rate matchion from the media rate (in 1410 * the link_state) to the interface speed, and will cause 1411 * collisions to the MAC to limit its transmission speed. 1412 */ 1413 speed = phylink_interface_max_speed(link_state.interface); 1414 duplex = DUPLEX_HALF; 1415 break; 1416 } 1417 1418 pl->cur_interface = link_state.interface; 1419 1420 neg_mode = pl->cur_link_an_mode; 1421 if (pl->pcs && pl->pcs->neg_mode) 1422 neg_mode = pl->pcs_neg_mode; 1423 1424 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1425 duplex); 1426 1427 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1428 pl->cur_interface, speed, duplex, 1429 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1430 1431 if (ndev) 1432 netif_carrier_on(ndev); 1433 1434 phylink_info(pl, 1435 "Link is Up - %s/%s - flow control %s\n", 1436 phy_speed_to_str(link_state.speed), 1437 phy_duplex_to_str(link_state.duplex), 1438 phylink_pause_to_str(link_state.pause)); 1439 } 1440 1441 static void phylink_link_down(struct phylink *pl) 1442 { 1443 struct net_device *ndev = pl->netdev; 1444 1445 if (ndev) 1446 netif_carrier_off(ndev); 1447 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1448 pl->cur_interface); 1449 phylink_info(pl, "Link is Down\n"); 1450 } 1451 1452 static void phylink_resolve(struct work_struct *w) 1453 { 1454 struct phylink *pl = container_of(w, struct phylink, resolve); 1455 struct phylink_link_state link_state; 1456 struct net_device *ndev = pl->netdev; 1457 bool mac_config = false; 1458 bool retrigger = false; 1459 bool cur_link_state; 1460 1461 mutex_lock(&pl->state_mutex); 1462 if (pl->netdev) 1463 cur_link_state = netif_carrier_ok(ndev); 1464 else 1465 cur_link_state = pl->old_link_state; 1466 1467 if (pl->phylink_disable_state) { 1468 pl->mac_link_dropped = false; 1469 link_state.link = false; 1470 } else if (pl->mac_link_dropped) { 1471 link_state.link = false; 1472 retrigger = true; 1473 } else { 1474 switch (pl->cur_link_an_mode) { 1475 case MLO_AN_PHY: 1476 link_state = pl->phy_state; 1477 phylink_apply_manual_flow(pl, &link_state); 1478 mac_config = link_state.link; 1479 break; 1480 1481 case MLO_AN_FIXED: 1482 phylink_get_fixed_state(pl, &link_state); 1483 mac_config = link_state.link; 1484 break; 1485 1486 case MLO_AN_INBAND: 1487 phylink_mac_pcs_get_state(pl, &link_state); 1488 1489 /* The PCS may have a latching link-fail indicator. 1490 * If the link was up, bring the link down and 1491 * re-trigger the resolve. Otherwise, re-read the 1492 * PCS state to get the current status of the link. 1493 */ 1494 if (!link_state.link) { 1495 if (cur_link_state) 1496 retrigger = true; 1497 else 1498 phylink_mac_pcs_get_state(pl, 1499 &link_state); 1500 } 1501 1502 /* If we have a phy, the "up" state is the union of 1503 * both the PHY and the MAC 1504 */ 1505 if (pl->phydev) 1506 link_state.link &= pl->phy_state.link; 1507 1508 /* Only update if the PHY link is up */ 1509 if (pl->phydev && pl->phy_state.link) { 1510 /* If the interface has changed, force a 1511 * link down event if the link isn't already 1512 * down, and re-resolve. 1513 */ 1514 if (link_state.interface != 1515 pl->phy_state.interface) { 1516 retrigger = true; 1517 link_state.link = false; 1518 } 1519 link_state.interface = pl->phy_state.interface; 1520 1521 /* If we are doing rate matching, then the 1522 * link speed/duplex comes from the PHY 1523 */ 1524 if (pl->phy_state.rate_matching) { 1525 link_state.rate_matching = 1526 pl->phy_state.rate_matching; 1527 link_state.speed = pl->phy_state.speed; 1528 link_state.duplex = 1529 pl->phy_state.duplex; 1530 } 1531 1532 /* If we have a PHY, we need to update with 1533 * the PHY flow control bits. 1534 */ 1535 link_state.pause = pl->phy_state.pause; 1536 mac_config = true; 1537 } 1538 phylink_apply_manual_flow(pl, &link_state); 1539 break; 1540 } 1541 } 1542 1543 if (mac_config) { 1544 if (link_state.interface != pl->link_config.interface) { 1545 /* The interface has changed, force the link down and 1546 * then reconfigure. 1547 */ 1548 if (cur_link_state) { 1549 phylink_link_down(pl); 1550 cur_link_state = false; 1551 } 1552 phylink_major_config(pl, false, &link_state); 1553 pl->link_config.interface = link_state.interface; 1554 } 1555 } 1556 1557 if (link_state.link != cur_link_state) { 1558 pl->old_link_state = link_state.link; 1559 if (!link_state.link) 1560 phylink_link_down(pl); 1561 else 1562 phylink_link_up(pl, link_state); 1563 } 1564 if (!link_state.link && retrigger) { 1565 pl->mac_link_dropped = false; 1566 queue_work(system_power_efficient_wq, &pl->resolve); 1567 } 1568 mutex_unlock(&pl->state_mutex); 1569 } 1570 1571 static void phylink_run_resolve(struct phylink *pl) 1572 { 1573 if (!pl->phylink_disable_state) 1574 queue_work(system_power_efficient_wq, &pl->resolve); 1575 } 1576 1577 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1578 { 1579 unsigned long state = pl->phylink_disable_state; 1580 1581 set_bit(bit, &pl->phylink_disable_state); 1582 if (state == 0) { 1583 queue_work(system_power_efficient_wq, &pl->resolve); 1584 flush_work(&pl->resolve); 1585 } 1586 } 1587 1588 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1589 { 1590 clear_bit(bit, &pl->phylink_disable_state); 1591 phylink_run_resolve(pl); 1592 } 1593 1594 static void phylink_fixed_poll(struct timer_list *t) 1595 { 1596 struct phylink *pl = container_of(t, struct phylink, link_poll); 1597 1598 mod_timer(t, jiffies + HZ); 1599 1600 phylink_run_resolve(pl); 1601 } 1602 1603 static const struct sfp_upstream_ops sfp_phylink_ops; 1604 1605 static int phylink_register_sfp(struct phylink *pl, 1606 const struct fwnode_handle *fwnode) 1607 { 1608 struct sfp_bus *bus; 1609 int ret; 1610 1611 if (!fwnode) 1612 return 0; 1613 1614 bus = sfp_bus_find_fwnode(fwnode); 1615 if (IS_ERR(bus)) { 1616 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1617 return PTR_ERR(bus); 1618 } 1619 1620 pl->sfp_bus = bus; 1621 1622 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1623 sfp_bus_put(bus); 1624 1625 return ret; 1626 } 1627 1628 /** 1629 * phylink_set_fixed_link() - set the fixed link 1630 * @pl: a pointer to a &struct phylink returned from phylink_create() 1631 * @state: a pointer to a struct phylink_link_state. 1632 * 1633 * This function is used when the link parameters are known and do not change, 1634 * making it suitable for certain types of network connections. 1635 * 1636 * Returns: zero on success or negative error code. 1637 */ 1638 int phylink_set_fixed_link(struct phylink *pl, 1639 const struct phylink_link_state *state) 1640 { 1641 const struct phy_setting *s; 1642 unsigned long *adv; 1643 1644 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1645 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1646 return -EINVAL; 1647 1648 s = phy_lookup_setting(state->speed, state->duplex, 1649 pl->supported, true); 1650 if (!s) 1651 return -EINVAL; 1652 1653 adv = pl->link_config.advertising; 1654 linkmode_zero(adv); 1655 linkmode_set_bit(s->bit, adv); 1656 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1657 1658 pl->link_config.speed = state->speed; 1659 pl->link_config.duplex = state->duplex; 1660 pl->link_config.link = 1; 1661 pl->link_config.an_complete = 1; 1662 1663 pl->cfg_link_an_mode = MLO_AN_FIXED; 1664 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1665 1666 return 0; 1667 } 1668 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1669 1670 /** 1671 * phylink_create() - create a phylink instance 1672 * @config: a pointer to the target &struct phylink_config 1673 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1674 * interface 1675 * @iface: the desired link mode defined by &typedef phy_interface_t 1676 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1677 * 1678 * Create a new phylink instance, and parse the link parameters found in @np. 1679 * This will parse in-band modes, fixed-link or SFP configuration. 1680 * 1681 * Note: the rtnl lock must not be held when calling this function. 1682 * 1683 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1684 * must use IS_ERR() to check for errors from this function. 1685 */ 1686 struct phylink *phylink_create(struct phylink_config *config, 1687 const struct fwnode_handle *fwnode, 1688 phy_interface_t iface, 1689 const struct phylink_mac_ops *mac_ops) 1690 { 1691 struct phylink *pl; 1692 int ret; 1693 1694 /* Validate the supplied configuration */ 1695 if (phy_interface_empty(config->supported_interfaces)) { 1696 dev_err(config->dev, 1697 "phylink: error: empty supported_interfaces\n"); 1698 return ERR_PTR(-EINVAL); 1699 } 1700 1701 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1702 if (!pl) 1703 return ERR_PTR(-ENOMEM); 1704 1705 mutex_init(&pl->state_mutex); 1706 INIT_WORK(&pl->resolve, phylink_resolve); 1707 1708 pl->config = config; 1709 if (config->type == PHYLINK_NETDEV) { 1710 pl->netdev = to_net_dev(config->dev); 1711 netif_carrier_off(pl->netdev); 1712 } else if (config->type == PHYLINK_DEV) { 1713 pl->dev = config->dev; 1714 } else { 1715 kfree(pl); 1716 return ERR_PTR(-EINVAL); 1717 } 1718 1719 pl->phy_state.interface = iface; 1720 pl->link_interface = iface; 1721 if (iface == PHY_INTERFACE_MODE_MOCA) 1722 pl->link_port = PORT_BNC; 1723 else 1724 pl->link_port = PORT_MII; 1725 pl->link_config.interface = iface; 1726 pl->link_config.pause = MLO_PAUSE_AN; 1727 pl->link_config.speed = SPEED_UNKNOWN; 1728 pl->link_config.duplex = DUPLEX_UNKNOWN; 1729 pl->pcs_state = PCS_STATE_DOWN; 1730 pl->mac_ops = mac_ops; 1731 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1732 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1733 1734 linkmode_fill(pl->supported); 1735 linkmode_copy(pl->link_config.advertising, pl->supported); 1736 phylink_validate(pl, pl->supported, &pl->link_config); 1737 1738 ret = phylink_parse_mode(pl, fwnode); 1739 if (ret < 0) { 1740 kfree(pl); 1741 return ERR_PTR(ret); 1742 } 1743 1744 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1745 ret = phylink_parse_fixedlink(pl, fwnode); 1746 if (ret < 0) { 1747 kfree(pl); 1748 return ERR_PTR(ret); 1749 } 1750 } 1751 1752 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1753 1754 ret = phylink_register_sfp(pl, fwnode); 1755 if (ret < 0) { 1756 kfree(pl); 1757 return ERR_PTR(ret); 1758 } 1759 1760 return pl; 1761 } 1762 EXPORT_SYMBOL_GPL(phylink_create); 1763 1764 /** 1765 * phylink_destroy() - cleanup and destroy the phylink instance 1766 * @pl: a pointer to a &struct phylink returned from phylink_create() 1767 * 1768 * Destroy a phylink instance. Any PHY that has been attached must have been 1769 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1770 * 1771 * Note: the rtnl lock must not be held when calling this function. 1772 */ 1773 void phylink_destroy(struct phylink *pl) 1774 { 1775 sfp_bus_del_upstream(pl->sfp_bus); 1776 if (pl->link_gpio) 1777 gpiod_put(pl->link_gpio); 1778 1779 cancel_work_sync(&pl->resolve); 1780 kfree(pl); 1781 } 1782 EXPORT_SYMBOL_GPL(phylink_destroy); 1783 1784 /** 1785 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1786 * @pl: a pointer to a &struct phylink returned from phylink_create() 1787 * 1788 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1789 * no PHY is needed. 1790 * 1791 * Returns true if phylink will be expecting a PHY. 1792 */ 1793 bool phylink_expects_phy(struct phylink *pl) 1794 { 1795 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1796 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1797 phy_interface_mode_is_8023z(pl->link_config.interface))) 1798 return false; 1799 return true; 1800 } 1801 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1802 1803 static void phylink_phy_change(struct phy_device *phydev, bool up) 1804 { 1805 struct phylink *pl = phydev->phylink; 1806 bool tx_pause, rx_pause; 1807 1808 phy_get_pause(phydev, &tx_pause, &rx_pause); 1809 1810 mutex_lock(&pl->state_mutex); 1811 pl->phy_state.speed = phydev->speed; 1812 pl->phy_state.duplex = phydev->duplex; 1813 pl->phy_state.rate_matching = phydev->rate_matching; 1814 pl->phy_state.pause = MLO_PAUSE_NONE; 1815 if (tx_pause) 1816 pl->phy_state.pause |= MLO_PAUSE_TX; 1817 if (rx_pause) 1818 pl->phy_state.pause |= MLO_PAUSE_RX; 1819 pl->phy_state.interface = phydev->interface; 1820 pl->phy_state.link = up; 1821 mutex_unlock(&pl->state_mutex); 1822 1823 phylink_run_resolve(pl); 1824 1825 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1826 phy_modes(phydev->interface), 1827 phy_speed_to_str(phydev->speed), 1828 phy_duplex_to_str(phydev->duplex), 1829 phy_rate_matching_to_str(phydev->rate_matching), 1830 phylink_pause_to_str(pl->phy_state.pause)); 1831 } 1832 1833 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1834 unsigned long *supported, 1835 struct phylink_link_state *state) 1836 { 1837 DECLARE_PHY_INTERFACE_MASK(interfaces); 1838 1839 /* If the PHY provides a bitmap of the interfaces it will be using 1840 * depending on the negotiated media speeds, use this to validate 1841 * which ethtool link modes can be used. 1842 */ 1843 if (!phy_interface_empty(phy->possible_interfaces)) { 1844 /* We only care about the union of the PHY's interfaces and 1845 * those which the host supports. 1846 */ 1847 phy_interface_and(interfaces, phy->possible_interfaces, 1848 pl->config->supported_interfaces); 1849 1850 if (phy_interface_empty(interfaces)) { 1851 phylink_err(pl, "PHY has no common interfaces\n"); 1852 return -EINVAL; 1853 } 1854 1855 if (phy_on_sfp(phy)) { 1856 /* If the PHY is on a SFP, limit the interfaces to 1857 * those that can be used with a SFP module. 1858 */ 1859 phy_interface_and(interfaces, interfaces, 1860 phylink_sfp_interfaces); 1861 1862 if (phy_interface_empty(interfaces)) { 1863 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1864 return -EINVAL; 1865 } 1866 } 1867 1868 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1869 phydev_name(phy), 1870 (int)PHY_INTERFACE_MODE_MAX, 1871 phy->possible_interfaces, 1872 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1873 1874 return phylink_validate_mask(pl, phy, supported, state, 1875 interfaces); 1876 } 1877 1878 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 1879 phydev_name(phy)); 1880 1881 /* Check whether we would use rate matching for the proposed interface 1882 * mode. 1883 */ 1884 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1885 1886 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1887 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1888 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1889 * their Serdes is either unnecessary or not reasonable. 1890 * 1891 * For these which switch interface modes, we really need to know which 1892 * interface modes the PHY supports to properly work out which ethtool 1893 * linkmodes can be supported. For now, as a work-around, we validate 1894 * against all interface modes, which may lead to more ethtool link 1895 * modes being advertised than are actually supported. 1896 */ 1897 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1898 state->interface != PHY_INTERFACE_MODE_RXAUI && 1899 state->interface != PHY_INTERFACE_MODE_XAUI && 1900 state->interface != PHY_INTERFACE_MODE_USXGMII) 1901 state->interface = PHY_INTERFACE_MODE_NA; 1902 1903 return phylink_validate(pl, supported, state); 1904 } 1905 1906 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1907 phy_interface_t interface) 1908 { 1909 struct phylink_link_state config; 1910 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1911 char *irq_str; 1912 int ret; 1913 1914 /* 1915 * This is the new way of dealing with flow control for PHYs, 1916 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1917 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1918 * using our validate call to the MAC, we rely upon the MAC 1919 * clearing the bits from both supported and advertising fields. 1920 */ 1921 phy_support_asym_pause(phy); 1922 1923 memset(&config, 0, sizeof(config)); 1924 linkmode_copy(supported, phy->supported); 1925 linkmode_copy(config.advertising, phy->advertising); 1926 config.interface = interface; 1927 1928 ret = phylink_validate_phy(pl, phy, supported, &config); 1929 if (ret) { 1930 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1931 phy_modes(config.interface), 1932 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1933 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1934 ERR_PTR(ret)); 1935 return ret; 1936 } 1937 1938 phy->phylink = pl; 1939 phy->phy_link_change = phylink_phy_change; 1940 1941 irq_str = phy_attached_info_irq(phy); 1942 phylink_info(pl, 1943 "PHY [%s] driver [%s] (irq=%s)\n", 1944 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1945 kfree(irq_str); 1946 1947 mutex_lock(&phy->lock); 1948 mutex_lock(&pl->state_mutex); 1949 pl->phydev = phy; 1950 pl->phy_state.interface = interface; 1951 pl->phy_state.pause = MLO_PAUSE_NONE; 1952 pl->phy_state.speed = SPEED_UNKNOWN; 1953 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1954 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1955 linkmode_copy(pl->supported, supported); 1956 linkmode_copy(pl->link_config.advertising, config.advertising); 1957 1958 /* Restrict the phy advertisement according to the MAC support. */ 1959 linkmode_copy(phy->advertising, config.advertising); 1960 mutex_unlock(&pl->state_mutex); 1961 mutex_unlock(&phy->lock); 1962 1963 phylink_dbg(pl, 1964 "phy: %s setting supported %*pb advertising %*pb\n", 1965 phy_modes(interface), 1966 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1967 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1968 1969 if (phy_interrupt_is_valid(phy)) 1970 phy_request_interrupt(phy); 1971 1972 if (pl->config->mac_managed_pm) 1973 phy->mac_managed_pm = true; 1974 1975 return 0; 1976 } 1977 1978 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1979 phy_interface_t interface) 1980 { 1981 u32 flags = 0; 1982 1983 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1984 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1985 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1986 return -EINVAL; 1987 1988 if (pl->phydev) 1989 return -EBUSY; 1990 1991 if (pl->config->mac_requires_rxc) 1992 flags |= PHY_F_RXC_ALWAYS_ON; 1993 1994 return phy_attach_direct(pl->netdev, phy, flags, interface); 1995 } 1996 1997 /** 1998 * phylink_connect_phy() - connect a PHY to the phylink instance 1999 * @pl: a pointer to a &struct phylink returned from phylink_create() 2000 * @phy: a pointer to a &struct phy_device. 2001 * 2002 * Connect @phy to the phylink instance specified by @pl by calling 2003 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2004 * capabilities, start the PHYLIB state machine and enable any interrupts 2005 * that the PHY supports. 2006 * 2007 * This updates the phylink's ethtool supported and advertising link mode 2008 * masks. 2009 * 2010 * Returns 0 on success or a negative errno. 2011 */ 2012 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2013 { 2014 int ret; 2015 2016 /* Use PHY device/driver interface */ 2017 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2018 pl->link_interface = phy->interface; 2019 pl->link_config.interface = pl->link_interface; 2020 } 2021 2022 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2023 if (ret < 0) 2024 return ret; 2025 2026 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2027 if (ret) 2028 phy_detach(phy); 2029 2030 return ret; 2031 } 2032 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2033 2034 /** 2035 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2036 * @pl: a pointer to a &struct phylink returned from phylink_create() 2037 * @dn: a pointer to a &struct device_node. 2038 * @flags: PHY-specific flags to communicate to the PHY device driver 2039 * 2040 * Connect the phy specified in the device node @dn to the phylink instance 2041 * specified by @pl. Actions specified in phylink_connect_phy() will be 2042 * performed. 2043 * 2044 * Returns 0 on success or a negative errno. 2045 */ 2046 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2047 u32 flags) 2048 { 2049 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2050 } 2051 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2052 2053 /** 2054 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2055 * @pl: a pointer to a &struct phylink returned from phylink_create() 2056 * @fwnode: a pointer to a &struct fwnode_handle. 2057 * @flags: PHY-specific flags to communicate to the PHY device driver 2058 * 2059 * Connect the phy specified @fwnode to the phylink instance specified 2060 * by @pl. 2061 * 2062 * Returns 0 on success or a negative errno. 2063 */ 2064 int phylink_fwnode_phy_connect(struct phylink *pl, 2065 const struct fwnode_handle *fwnode, 2066 u32 flags) 2067 { 2068 struct fwnode_handle *phy_fwnode; 2069 struct phy_device *phy_dev; 2070 int ret; 2071 2072 /* Fixed links and 802.3z are handled without needing a PHY */ 2073 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2074 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2075 phy_interface_mode_is_8023z(pl->link_interface))) 2076 return 0; 2077 2078 phy_fwnode = fwnode_get_phy_node(fwnode); 2079 if (IS_ERR(phy_fwnode)) { 2080 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2081 return -ENODEV; 2082 return 0; 2083 } 2084 2085 phy_dev = fwnode_phy_find_device(phy_fwnode); 2086 /* We're done with the phy_node handle */ 2087 fwnode_handle_put(phy_fwnode); 2088 if (!phy_dev) 2089 return -ENODEV; 2090 2091 /* Use PHY device/driver interface */ 2092 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2093 pl->link_interface = phy_dev->interface; 2094 pl->link_config.interface = pl->link_interface; 2095 } 2096 2097 if (pl->config->mac_requires_rxc) 2098 flags |= PHY_F_RXC_ALWAYS_ON; 2099 2100 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2101 pl->link_interface); 2102 phy_device_free(phy_dev); 2103 if (ret) 2104 return ret; 2105 2106 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2107 if (ret) 2108 phy_detach(phy_dev); 2109 2110 return ret; 2111 } 2112 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2113 2114 /** 2115 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2116 * instance. 2117 * @pl: a pointer to a &struct phylink returned from phylink_create() 2118 * 2119 * Disconnect any current PHY from the phylink instance described by @pl. 2120 */ 2121 void phylink_disconnect_phy(struct phylink *pl) 2122 { 2123 struct phy_device *phy; 2124 2125 ASSERT_RTNL(); 2126 2127 phy = pl->phydev; 2128 if (phy) { 2129 mutex_lock(&phy->lock); 2130 mutex_lock(&pl->state_mutex); 2131 pl->phydev = NULL; 2132 mutex_unlock(&pl->state_mutex); 2133 mutex_unlock(&phy->lock); 2134 flush_work(&pl->resolve); 2135 2136 phy_disconnect(phy); 2137 } 2138 } 2139 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2140 2141 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2142 { 2143 if (!up) 2144 pl->mac_link_dropped = true; 2145 phylink_run_resolve(pl); 2146 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2147 } 2148 2149 /** 2150 * phylink_mac_change() - notify phylink of a change in MAC state 2151 * @pl: a pointer to a &struct phylink returned from phylink_create() 2152 * @up: indicates whether the link is currently up. 2153 * 2154 * The MAC driver should call this driver when the state of its link 2155 * changes (eg, link failure, new negotiation results, etc.) 2156 */ 2157 void phylink_mac_change(struct phylink *pl, bool up) 2158 { 2159 phylink_link_changed(pl, up, "mac"); 2160 } 2161 EXPORT_SYMBOL_GPL(phylink_mac_change); 2162 2163 /** 2164 * phylink_pcs_change() - notify phylink of a change to PCS link state 2165 * @pcs: pointer to &struct phylink_pcs 2166 * @up: indicates whether the link is currently up. 2167 * 2168 * The PCS driver should call this when the state of its link changes 2169 * (e.g. link failure, new negotiation results, etc.) Note: it should 2170 * not determine "up" by reading the BMSR. If in doubt about the link 2171 * state at interrupt time, then pass true if pcs_get_state() returns 2172 * the latched link-down state, otherwise pass false. 2173 */ 2174 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2175 { 2176 struct phylink *pl = pcs->phylink; 2177 2178 if (pl) 2179 phylink_link_changed(pl, up, "pcs"); 2180 } 2181 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2182 2183 static irqreturn_t phylink_link_handler(int irq, void *data) 2184 { 2185 struct phylink *pl = data; 2186 2187 phylink_run_resolve(pl); 2188 2189 return IRQ_HANDLED; 2190 } 2191 2192 /** 2193 * phylink_start() - start a phylink instance 2194 * @pl: a pointer to a &struct phylink returned from phylink_create() 2195 * 2196 * Start the phylink instance specified by @pl, configuring the MAC for the 2197 * desired link mode(s) and negotiation style. This should be called from the 2198 * network device driver's &struct net_device_ops ndo_open() method. 2199 */ 2200 void phylink_start(struct phylink *pl) 2201 { 2202 bool poll = false; 2203 2204 ASSERT_RTNL(); 2205 2206 phylink_info(pl, "configuring for %s/%s link mode\n", 2207 phylink_an_mode_str(pl->cur_link_an_mode), 2208 phy_modes(pl->link_config.interface)); 2209 2210 /* Always set the carrier off */ 2211 if (pl->netdev) 2212 netif_carrier_off(pl->netdev); 2213 2214 pl->pcs_state = PCS_STATE_STARTING; 2215 2216 /* Apply the link configuration to the MAC when starting. This allows 2217 * a fixed-link to start with the correct parameters, and also 2218 * ensures that we set the appropriate advertisement for Serdes links. 2219 * 2220 * Restart autonegotiation if using 802.3z to ensure that the link 2221 * parameters are properly negotiated. This is necessary for DSA 2222 * switches using 802.3z negotiation to ensure they see our modes. 2223 */ 2224 phylink_mac_initial_config(pl, true); 2225 2226 pl->pcs_state = PCS_STATE_STARTED; 2227 2228 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2229 2230 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2231 int irq = gpiod_to_irq(pl->link_gpio); 2232 2233 if (irq > 0) { 2234 if (!request_irq(irq, phylink_link_handler, 2235 IRQF_TRIGGER_RISING | 2236 IRQF_TRIGGER_FALLING, 2237 "netdev link", pl)) 2238 pl->link_irq = irq; 2239 else 2240 irq = 0; 2241 } 2242 if (irq <= 0) 2243 poll = true; 2244 } 2245 2246 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2247 poll |= pl->config->poll_fixed_state; 2248 2249 if (poll) 2250 mod_timer(&pl->link_poll, jiffies + HZ); 2251 if (pl->phydev) 2252 phy_start(pl->phydev); 2253 if (pl->sfp_bus) 2254 sfp_upstream_start(pl->sfp_bus); 2255 } 2256 EXPORT_SYMBOL_GPL(phylink_start); 2257 2258 /** 2259 * phylink_stop() - stop a phylink instance 2260 * @pl: a pointer to a &struct phylink returned from phylink_create() 2261 * 2262 * Stop the phylink instance specified by @pl. This should be called from the 2263 * network device driver's &struct net_device_ops ndo_stop() method. The 2264 * network device's carrier state should not be changed prior to calling this 2265 * function. 2266 * 2267 * This will synchronously bring down the link if the link is not already 2268 * down (in other words, it will trigger a mac_link_down() method call.) 2269 */ 2270 void phylink_stop(struct phylink *pl) 2271 { 2272 ASSERT_RTNL(); 2273 2274 if (pl->sfp_bus) 2275 sfp_upstream_stop(pl->sfp_bus); 2276 if (pl->phydev) 2277 phy_stop(pl->phydev); 2278 del_timer_sync(&pl->link_poll); 2279 if (pl->link_irq) { 2280 free_irq(pl->link_irq, pl); 2281 pl->link_irq = 0; 2282 } 2283 2284 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2285 2286 pl->pcs_state = PCS_STATE_DOWN; 2287 2288 phylink_pcs_disable(pl->pcs); 2289 } 2290 EXPORT_SYMBOL_GPL(phylink_stop); 2291 2292 /** 2293 * phylink_suspend() - handle a network device suspend event 2294 * @pl: a pointer to a &struct phylink returned from phylink_create() 2295 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2296 * 2297 * Handle a network device suspend event. There are several cases: 2298 * 2299 * - If Wake-on-Lan is not active, we can bring down the link between 2300 * the MAC and PHY by calling phylink_stop(). 2301 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2302 * can also bring down the link between the MAC and PHY. 2303 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2304 * still needs to receive packets, so we can not bring the link down. 2305 */ 2306 void phylink_suspend(struct phylink *pl, bool mac_wol) 2307 { 2308 ASSERT_RTNL(); 2309 2310 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2311 /* Wake-on-Lan enabled, MAC handling */ 2312 mutex_lock(&pl->state_mutex); 2313 2314 /* Stop the resolver bringing the link up */ 2315 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2316 2317 /* Disable the carrier, to prevent transmit timeouts, 2318 * but one would hope all packets have been sent. This 2319 * also means phylink_resolve() will do nothing. 2320 */ 2321 if (pl->netdev) 2322 netif_carrier_off(pl->netdev); 2323 else 2324 pl->old_link_state = false; 2325 2326 /* We do not call mac_link_down() here as we want the 2327 * link to remain up to receive the WoL packets. 2328 */ 2329 mutex_unlock(&pl->state_mutex); 2330 } else { 2331 phylink_stop(pl); 2332 } 2333 } 2334 EXPORT_SYMBOL_GPL(phylink_suspend); 2335 2336 /** 2337 * phylink_resume() - handle a network device resume event 2338 * @pl: a pointer to a &struct phylink returned from phylink_create() 2339 * 2340 * Undo the effects of phylink_suspend(), returning the link to an 2341 * operational state. 2342 */ 2343 void phylink_resume(struct phylink *pl) 2344 { 2345 ASSERT_RTNL(); 2346 2347 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2348 /* Wake-on-Lan enabled, MAC handling */ 2349 2350 /* Call mac_link_down() so we keep the overall state balanced. 2351 * Do this under the state_mutex lock for consistency. This 2352 * will cause a "Link Down" message to be printed during 2353 * resume, which is harmless - the true link state will be 2354 * printed when we run a resolve. 2355 */ 2356 mutex_lock(&pl->state_mutex); 2357 phylink_link_down(pl); 2358 mutex_unlock(&pl->state_mutex); 2359 2360 /* Re-apply the link parameters so that all the settings get 2361 * restored to the MAC. 2362 */ 2363 phylink_mac_initial_config(pl, true); 2364 2365 /* Re-enable and re-resolve the link parameters */ 2366 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2367 } else { 2368 phylink_start(pl); 2369 } 2370 } 2371 EXPORT_SYMBOL_GPL(phylink_resume); 2372 2373 /** 2374 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2375 * @pl: a pointer to a &struct phylink returned from phylink_create() 2376 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2377 * 2378 * Read the wake on lan parameters from the PHY attached to the phylink 2379 * instance specified by @pl. If no PHY is currently attached, report no 2380 * support for wake on lan. 2381 */ 2382 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2383 { 2384 ASSERT_RTNL(); 2385 2386 wol->supported = 0; 2387 wol->wolopts = 0; 2388 2389 if (pl->phydev) 2390 phy_ethtool_get_wol(pl->phydev, wol); 2391 } 2392 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2393 2394 /** 2395 * phylink_ethtool_set_wol() - set wake on lan parameters 2396 * @pl: a pointer to a &struct phylink returned from phylink_create() 2397 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2398 * 2399 * Set the wake on lan parameters for the PHY attached to the phylink 2400 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2401 * error. 2402 * 2403 * Returns zero on success or negative errno code. 2404 */ 2405 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2406 { 2407 int ret = -EOPNOTSUPP; 2408 2409 ASSERT_RTNL(); 2410 2411 if (pl->phydev) 2412 ret = phy_ethtool_set_wol(pl->phydev, wol); 2413 2414 return ret; 2415 } 2416 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2417 2418 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2419 { 2420 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2421 2422 linkmode_zero(mask); 2423 phylink_set_port_modes(mask); 2424 2425 linkmode_and(dst, dst, mask); 2426 linkmode_or(dst, dst, b); 2427 } 2428 2429 static void phylink_get_ksettings(const struct phylink_link_state *state, 2430 struct ethtool_link_ksettings *kset) 2431 { 2432 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2433 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2434 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2435 kset->base.speed = state->speed; 2436 kset->base.duplex = state->duplex; 2437 } 2438 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2439 state->advertising) ? 2440 AUTONEG_ENABLE : AUTONEG_DISABLE; 2441 } 2442 2443 /** 2444 * phylink_ethtool_ksettings_get() - get the current link settings 2445 * @pl: a pointer to a &struct phylink returned from phylink_create() 2446 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2447 * 2448 * Read the current link settings for the phylink instance specified by @pl. 2449 * This will be the link settings read from the MAC, PHY or fixed link 2450 * settings depending on the current negotiation mode. 2451 */ 2452 int phylink_ethtool_ksettings_get(struct phylink *pl, 2453 struct ethtool_link_ksettings *kset) 2454 { 2455 struct phylink_link_state link_state; 2456 2457 ASSERT_RTNL(); 2458 2459 if (pl->phydev) 2460 phy_ethtool_ksettings_get(pl->phydev, kset); 2461 else 2462 kset->base.port = pl->link_port; 2463 2464 linkmode_copy(kset->link_modes.supported, pl->supported); 2465 2466 switch (pl->cur_link_an_mode) { 2467 case MLO_AN_FIXED: 2468 /* We are using fixed settings. Report these as the 2469 * current link settings - and note that these also 2470 * represent the supported speeds/duplex/pause modes. 2471 */ 2472 phylink_get_fixed_state(pl, &link_state); 2473 phylink_get_ksettings(&link_state, kset); 2474 break; 2475 2476 case MLO_AN_INBAND: 2477 /* If there is a phy attached, then use the reported 2478 * settings from the phy with no modification. 2479 */ 2480 if (pl->phydev) 2481 break; 2482 2483 phylink_mac_pcs_get_state(pl, &link_state); 2484 2485 /* The MAC is reporting the link results from its own PCS 2486 * layer via in-band status. Report these as the current 2487 * link settings. 2488 */ 2489 phylink_get_ksettings(&link_state, kset); 2490 break; 2491 } 2492 2493 return 0; 2494 } 2495 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2496 2497 /** 2498 * phylink_ethtool_ksettings_set() - set the link settings 2499 * @pl: a pointer to a &struct phylink returned from phylink_create() 2500 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2501 */ 2502 int phylink_ethtool_ksettings_set(struct phylink *pl, 2503 const struct ethtool_link_ksettings *kset) 2504 { 2505 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2506 struct phylink_link_state config; 2507 const struct phy_setting *s; 2508 2509 ASSERT_RTNL(); 2510 2511 if (pl->phydev) { 2512 struct ethtool_link_ksettings phy_kset = *kset; 2513 2514 linkmode_and(phy_kset.link_modes.advertising, 2515 phy_kset.link_modes.advertising, 2516 pl->supported); 2517 2518 /* We can rely on phylib for this update; we also do not need 2519 * to update the pl->link_config settings: 2520 * - the configuration returned via ksettings_get() will come 2521 * from phylib whenever a PHY is present. 2522 * - link_config.interface will be updated by the PHY calling 2523 * back via phylink_phy_change() and a subsequent resolve. 2524 * - initial link configuration for PHY mode comes from the 2525 * last phy state updated via phylink_phy_change(). 2526 * - other configuration changes (e.g. pause modes) are 2527 * performed directly via phylib. 2528 * - if in in-band mode with a PHY, the link configuration 2529 * is passed on the link from the PHY, and all of 2530 * link_config.{speed,duplex,an_enabled,pause} are not used. 2531 * - the only possible use would be link_config.advertising 2532 * pause modes when in 1000base-X mode with a PHY, but in 2533 * the presence of a PHY, this should not be changed as that 2534 * should be determined from the media side advertisement. 2535 */ 2536 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2537 } 2538 2539 config = pl->link_config; 2540 /* Mask out unsupported advertisements */ 2541 linkmode_and(config.advertising, kset->link_modes.advertising, 2542 pl->supported); 2543 2544 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2545 switch (kset->base.autoneg) { 2546 case AUTONEG_DISABLE: 2547 /* Autonegotiation disabled, select a suitable speed and 2548 * duplex. 2549 */ 2550 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2551 pl->supported, false); 2552 if (!s) 2553 return -EINVAL; 2554 2555 /* If we have a fixed link, refuse to change link parameters. 2556 * If the link parameters match, accept them but do nothing. 2557 */ 2558 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2559 if (s->speed != pl->link_config.speed || 2560 s->duplex != pl->link_config.duplex) 2561 return -EINVAL; 2562 return 0; 2563 } 2564 2565 config.speed = s->speed; 2566 config.duplex = s->duplex; 2567 break; 2568 2569 case AUTONEG_ENABLE: 2570 /* If we have a fixed link, allow autonegotiation (since that 2571 * is our default case) but do not allow the advertisement to 2572 * be changed. If the advertisement matches, simply return. 2573 */ 2574 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2575 if (!linkmode_equal(config.advertising, 2576 pl->link_config.advertising)) 2577 return -EINVAL; 2578 return 0; 2579 } 2580 2581 config.speed = SPEED_UNKNOWN; 2582 config.duplex = DUPLEX_UNKNOWN; 2583 break; 2584 2585 default: 2586 return -EINVAL; 2587 } 2588 2589 /* We have ruled out the case with a PHY attached, and the 2590 * fixed-link cases. All that is left are in-band links. 2591 */ 2592 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2593 kset->base.autoneg == AUTONEG_ENABLE); 2594 2595 /* If this link is with an SFP, ensure that changes to advertised modes 2596 * also cause the associated interface to be selected such that the 2597 * link can be configured correctly. 2598 */ 2599 if (pl->sfp_bus) { 2600 config.interface = sfp_select_interface(pl->sfp_bus, 2601 config.advertising); 2602 if (config.interface == PHY_INTERFACE_MODE_NA) { 2603 phylink_err(pl, 2604 "selection of interface failed, advertisement %*pb\n", 2605 __ETHTOOL_LINK_MODE_MASK_NBITS, 2606 config.advertising); 2607 return -EINVAL; 2608 } 2609 2610 /* Revalidate with the selected interface */ 2611 linkmode_copy(support, pl->supported); 2612 if (phylink_validate(pl, support, &config)) { 2613 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2614 phylink_an_mode_str(pl->cur_link_an_mode), 2615 phy_modes(config.interface), 2616 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2617 return -EINVAL; 2618 } 2619 } else { 2620 /* Validate without changing the current supported mask. */ 2621 linkmode_copy(support, pl->supported); 2622 if (phylink_validate(pl, support, &config)) 2623 return -EINVAL; 2624 } 2625 2626 /* If autonegotiation is enabled, we must have an advertisement */ 2627 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2628 config.advertising) && 2629 phylink_is_empty_linkmode(config.advertising)) 2630 return -EINVAL; 2631 2632 mutex_lock(&pl->state_mutex); 2633 pl->link_config.speed = config.speed; 2634 pl->link_config.duplex = config.duplex; 2635 2636 if (pl->link_config.interface != config.interface) { 2637 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2638 /* We need to force the link down, then change the interface */ 2639 if (pl->old_link_state) { 2640 phylink_link_down(pl); 2641 pl->old_link_state = false; 2642 } 2643 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2644 &pl->phylink_disable_state)) 2645 phylink_major_config(pl, false, &config); 2646 pl->link_config.interface = config.interface; 2647 linkmode_copy(pl->link_config.advertising, config.advertising); 2648 } else if (!linkmode_equal(pl->link_config.advertising, 2649 config.advertising)) { 2650 linkmode_copy(pl->link_config.advertising, config.advertising); 2651 phylink_change_inband_advert(pl); 2652 } 2653 mutex_unlock(&pl->state_mutex); 2654 2655 return 0; 2656 } 2657 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2658 2659 /** 2660 * phylink_ethtool_nway_reset() - restart negotiation 2661 * @pl: a pointer to a &struct phylink returned from phylink_create() 2662 * 2663 * Restart negotiation for the phylink instance specified by @pl. This will 2664 * cause any attached phy to restart negotiation with the link partner, and 2665 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2666 * negotiation. 2667 * 2668 * Returns zero on success, or negative error code. 2669 */ 2670 int phylink_ethtool_nway_reset(struct phylink *pl) 2671 { 2672 int ret = 0; 2673 2674 ASSERT_RTNL(); 2675 2676 if (pl->phydev) 2677 ret = phy_restart_aneg(pl->phydev); 2678 phylink_pcs_an_restart(pl); 2679 2680 return ret; 2681 } 2682 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2683 2684 /** 2685 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2686 * @pl: a pointer to a &struct phylink returned from phylink_create() 2687 * @pause: a pointer to a &struct ethtool_pauseparam 2688 */ 2689 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2690 struct ethtool_pauseparam *pause) 2691 { 2692 ASSERT_RTNL(); 2693 2694 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2695 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2696 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2697 } 2698 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2699 2700 /** 2701 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2702 * @pl: a pointer to a &struct phylink returned from phylink_create() 2703 * @pause: a pointer to a &struct ethtool_pauseparam 2704 */ 2705 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2706 struct ethtool_pauseparam *pause) 2707 { 2708 struct phylink_link_state *config = &pl->link_config; 2709 bool manual_changed; 2710 int pause_state; 2711 2712 ASSERT_RTNL(); 2713 2714 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2715 return -EOPNOTSUPP; 2716 2717 if (!phylink_test(pl->supported, Pause) && 2718 !phylink_test(pl->supported, Asym_Pause)) 2719 return -EOPNOTSUPP; 2720 2721 if (!phylink_test(pl->supported, Asym_Pause) && 2722 pause->rx_pause != pause->tx_pause) 2723 return -EINVAL; 2724 2725 pause_state = 0; 2726 if (pause->autoneg) 2727 pause_state |= MLO_PAUSE_AN; 2728 if (pause->rx_pause) 2729 pause_state |= MLO_PAUSE_RX; 2730 if (pause->tx_pause) 2731 pause_state |= MLO_PAUSE_TX; 2732 2733 mutex_lock(&pl->state_mutex); 2734 /* 2735 * See the comments for linkmode_set_pause(), wrt the deficiencies 2736 * with the current implementation. A solution to this issue would 2737 * be: 2738 * ethtool Local device 2739 * rx tx Pause AsymDir 2740 * 0 0 0 0 2741 * 1 0 1 1 2742 * 0 1 0 1 2743 * 1 1 1 1 2744 * and then use the ethtool rx/tx enablement status to mask the 2745 * rx/tx pause resolution. 2746 */ 2747 linkmode_set_pause(config->advertising, pause->tx_pause, 2748 pause->rx_pause); 2749 2750 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2751 (!(pause_state & MLO_PAUSE_AN) && 2752 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2753 2754 config->pause = pause_state; 2755 2756 /* Update our in-band advertisement, triggering a renegotiation if 2757 * the advertisement changed. 2758 */ 2759 if (!pl->phydev) 2760 phylink_change_inband_advert(pl); 2761 2762 mutex_unlock(&pl->state_mutex); 2763 2764 /* If we have a PHY, a change of the pause frame advertisement will 2765 * cause phylib to renegotiate (if AN is enabled) which will in turn 2766 * call our phylink_phy_change() and trigger a resolve. Note that 2767 * we can't hold our state mutex while calling phy_set_asym_pause(). 2768 */ 2769 if (pl->phydev) 2770 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2771 pause->tx_pause); 2772 2773 /* If the manual pause settings changed, make sure we trigger a 2774 * resolve to update their state; we can not guarantee that the 2775 * link will cycle. 2776 */ 2777 if (manual_changed) { 2778 pl->mac_link_dropped = true; 2779 phylink_run_resolve(pl); 2780 } 2781 2782 return 0; 2783 } 2784 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2785 2786 /** 2787 * phylink_get_eee_err() - read the energy efficient ethernet error 2788 * counter 2789 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2790 * 2791 * Read the Energy Efficient Ethernet error counter from the PHY associated 2792 * with the phylink instance specified by @pl. 2793 * 2794 * Returns positive error counter value, or negative error code. 2795 */ 2796 int phylink_get_eee_err(struct phylink *pl) 2797 { 2798 int ret = 0; 2799 2800 ASSERT_RTNL(); 2801 2802 if (pl->phydev) 2803 ret = phy_get_eee_err(pl->phydev); 2804 2805 return ret; 2806 } 2807 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2808 2809 /** 2810 * phylink_init_eee() - init and check the EEE features 2811 * @pl: a pointer to a &struct phylink returned from phylink_create() 2812 * @clk_stop_enable: allow PHY to stop receive clock 2813 * 2814 * Must be called either with RTNL held or within mac_link_up() 2815 */ 2816 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2817 { 2818 int ret = -EOPNOTSUPP; 2819 2820 if (pl->phydev) 2821 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2822 2823 return ret; 2824 } 2825 EXPORT_SYMBOL_GPL(phylink_init_eee); 2826 2827 /** 2828 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2829 * @pl: a pointer to a &struct phylink returned from phylink_create() 2830 * @eee: a pointer to a &struct ethtool_keee for the read parameters 2831 */ 2832 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 2833 { 2834 int ret = -EOPNOTSUPP; 2835 2836 ASSERT_RTNL(); 2837 2838 if (pl->phydev) 2839 ret = phy_ethtool_get_eee(pl->phydev, eee); 2840 2841 return ret; 2842 } 2843 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2844 2845 /** 2846 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2847 * @pl: a pointer to a &struct phylink returned from phylink_create() 2848 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 2849 */ 2850 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 2851 { 2852 int ret = -EOPNOTSUPP; 2853 2854 ASSERT_RTNL(); 2855 2856 if (pl->phydev) 2857 ret = phy_ethtool_set_eee(pl->phydev, eee); 2858 2859 return ret; 2860 } 2861 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2862 2863 /* This emulates MII registers for a fixed-mode phy operating as per the 2864 * passed in state. "aneg" defines if we report negotiation is possible. 2865 * 2866 * FIXME: should deal with negotiation state too. 2867 */ 2868 static int phylink_mii_emul_read(unsigned int reg, 2869 struct phylink_link_state *state) 2870 { 2871 struct fixed_phy_status fs; 2872 unsigned long *lpa = state->lp_advertising; 2873 int val; 2874 2875 fs.link = state->link; 2876 fs.speed = state->speed; 2877 fs.duplex = state->duplex; 2878 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2879 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2880 2881 val = swphy_read_reg(reg, &fs); 2882 if (reg == MII_BMSR) { 2883 if (!state->an_complete) 2884 val &= ~BMSR_ANEGCOMPLETE; 2885 } 2886 return val; 2887 } 2888 2889 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2890 unsigned int reg) 2891 { 2892 struct phy_device *phydev = pl->phydev; 2893 int prtad, devad; 2894 2895 if (mdio_phy_id_is_c45(phy_id)) { 2896 prtad = mdio_phy_id_prtad(phy_id); 2897 devad = mdio_phy_id_devad(phy_id); 2898 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2899 reg); 2900 } 2901 2902 if (phydev->is_c45) { 2903 switch (reg) { 2904 case MII_BMCR: 2905 case MII_BMSR: 2906 case MII_PHYSID1: 2907 case MII_PHYSID2: 2908 devad = __ffs(phydev->c45_ids.mmds_present); 2909 break; 2910 case MII_ADVERTISE: 2911 case MII_LPA: 2912 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2913 return -EINVAL; 2914 devad = MDIO_MMD_AN; 2915 if (reg == MII_ADVERTISE) 2916 reg = MDIO_AN_ADVERTISE; 2917 else 2918 reg = MDIO_AN_LPA; 2919 break; 2920 default: 2921 return -EINVAL; 2922 } 2923 prtad = phy_id; 2924 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2925 reg); 2926 } 2927 2928 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2929 } 2930 2931 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2932 unsigned int reg, unsigned int val) 2933 { 2934 struct phy_device *phydev = pl->phydev; 2935 int prtad, devad; 2936 2937 if (mdio_phy_id_is_c45(phy_id)) { 2938 prtad = mdio_phy_id_prtad(phy_id); 2939 devad = mdio_phy_id_devad(phy_id); 2940 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2941 reg, val); 2942 } 2943 2944 if (phydev->is_c45) { 2945 switch (reg) { 2946 case MII_BMCR: 2947 case MII_BMSR: 2948 case MII_PHYSID1: 2949 case MII_PHYSID2: 2950 devad = __ffs(phydev->c45_ids.mmds_present); 2951 break; 2952 case MII_ADVERTISE: 2953 case MII_LPA: 2954 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2955 return -EINVAL; 2956 devad = MDIO_MMD_AN; 2957 if (reg == MII_ADVERTISE) 2958 reg = MDIO_AN_ADVERTISE; 2959 else 2960 reg = MDIO_AN_LPA; 2961 break; 2962 default: 2963 return -EINVAL; 2964 } 2965 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2966 reg, val); 2967 } 2968 2969 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2970 } 2971 2972 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2973 unsigned int reg) 2974 { 2975 struct phylink_link_state state; 2976 int val = 0xffff; 2977 2978 switch (pl->cur_link_an_mode) { 2979 case MLO_AN_FIXED: 2980 if (phy_id == 0) { 2981 phylink_get_fixed_state(pl, &state); 2982 val = phylink_mii_emul_read(reg, &state); 2983 } 2984 break; 2985 2986 case MLO_AN_PHY: 2987 return -EOPNOTSUPP; 2988 2989 case MLO_AN_INBAND: 2990 if (phy_id == 0) { 2991 phylink_mac_pcs_get_state(pl, &state); 2992 val = phylink_mii_emul_read(reg, &state); 2993 } 2994 break; 2995 } 2996 2997 return val & 0xffff; 2998 } 2999 3000 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3001 unsigned int reg, unsigned int val) 3002 { 3003 switch (pl->cur_link_an_mode) { 3004 case MLO_AN_FIXED: 3005 break; 3006 3007 case MLO_AN_PHY: 3008 return -EOPNOTSUPP; 3009 3010 case MLO_AN_INBAND: 3011 break; 3012 } 3013 3014 return 0; 3015 } 3016 3017 /** 3018 * phylink_mii_ioctl() - generic mii ioctl interface 3019 * @pl: a pointer to a &struct phylink returned from phylink_create() 3020 * @ifr: a pointer to a &struct ifreq for socket ioctls 3021 * @cmd: ioctl cmd to execute 3022 * 3023 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3024 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3025 * 3026 * Returns: zero on success or negative error code. 3027 * 3028 * %SIOCGMIIPHY: 3029 * read register from the current PHY. 3030 * %SIOCGMIIREG: 3031 * read register from the specified PHY. 3032 * %SIOCSMIIREG: 3033 * set a register on the specified PHY. 3034 */ 3035 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3036 { 3037 struct mii_ioctl_data *mii = if_mii(ifr); 3038 int ret; 3039 3040 ASSERT_RTNL(); 3041 3042 if (pl->phydev) { 3043 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3044 switch (cmd) { 3045 case SIOCGMIIPHY: 3046 mii->phy_id = pl->phydev->mdio.addr; 3047 fallthrough; 3048 3049 case SIOCGMIIREG: 3050 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3051 if (ret >= 0) { 3052 mii->val_out = ret; 3053 ret = 0; 3054 } 3055 break; 3056 3057 case SIOCSMIIREG: 3058 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3059 mii->val_in); 3060 break; 3061 3062 default: 3063 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3064 break; 3065 } 3066 } else { 3067 switch (cmd) { 3068 case SIOCGMIIPHY: 3069 mii->phy_id = 0; 3070 fallthrough; 3071 3072 case SIOCGMIIREG: 3073 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3074 if (ret >= 0) { 3075 mii->val_out = ret; 3076 ret = 0; 3077 } 3078 break; 3079 3080 case SIOCSMIIREG: 3081 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3082 mii->val_in); 3083 break; 3084 3085 default: 3086 ret = -EOPNOTSUPP; 3087 break; 3088 } 3089 } 3090 3091 return ret; 3092 } 3093 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3094 3095 /** 3096 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3097 * link partners 3098 * @pl: a pointer to a &struct phylink returned from phylink_create() 3099 * @sync: perform action synchronously 3100 * 3101 * If we have a PHY that is not part of a SFP module, then set the speed 3102 * as described in the phy_speed_down() function. Please see this function 3103 * for a description of the @sync parameter. 3104 * 3105 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3106 */ 3107 int phylink_speed_down(struct phylink *pl, bool sync) 3108 { 3109 int ret = 0; 3110 3111 ASSERT_RTNL(); 3112 3113 if (!pl->sfp_bus && pl->phydev) 3114 ret = phy_speed_down(pl->phydev, sync); 3115 3116 return ret; 3117 } 3118 EXPORT_SYMBOL_GPL(phylink_speed_down); 3119 3120 /** 3121 * phylink_speed_up() - restore the advertised speeds prior to the call to 3122 * phylink_speed_down() 3123 * @pl: a pointer to a &struct phylink returned from phylink_create() 3124 * 3125 * If we have a PHY that is not part of a SFP module, then restore the 3126 * PHY speeds as per phy_speed_up(). 3127 * 3128 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3129 */ 3130 int phylink_speed_up(struct phylink *pl) 3131 { 3132 int ret = 0; 3133 3134 ASSERT_RTNL(); 3135 3136 if (!pl->sfp_bus && pl->phydev) 3137 ret = phy_speed_up(pl->phydev); 3138 3139 return ret; 3140 } 3141 EXPORT_SYMBOL_GPL(phylink_speed_up); 3142 3143 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3144 { 3145 struct phylink *pl = upstream; 3146 3147 pl->netdev->sfp_bus = bus; 3148 } 3149 3150 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3151 { 3152 struct phylink *pl = upstream; 3153 3154 pl->netdev->sfp_bus = NULL; 3155 } 3156 3157 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3158 const unsigned long *intf) 3159 { 3160 phy_interface_t interface; 3161 size_t i; 3162 3163 interface = PHY_INTERFACE_MODE_NA; 3164 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3165 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3166 interface = phylink_sfp_interface_preference[i]; 3167 break; 3168 } 3169 3170 return interface; 3171 } 3172 3173 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3174 unsigned long *supported, 3175 struct phylink_link_state *state) 3176 { 3177 bool changed = false; 3178 3179 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3180 phylink_an_mode_str(mode), phy_modes(state->interface), 3181 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3182 3183 if (!linkmode_equal(pl->supported, supported)) { 3184 linkmode_copy(pl->supported, supported); 3185 changed = true; 3186 } 3187 3188 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3189 linkmode_copy(pl->link_config.advertising, state->advertising); 3190 changed = true; 3191 } 3192 3193 if (pl->cur_link_an_mode != mode || 3194 pl->link_config.interface != state->interface) { 3195 pl->cur_link_an_mode = mode; 3196 pl->link_config.interface = state->interface; 3197 3198 changed = true; 3199 3200 phylink_info(pl, "switched to %s/%s link mode\n", 3201 phylink_an_mode_str(mode), 3202 phy_modes(state->interface)); 3203 } 3204 3205 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3206 &pl->phylink_disable_state)) 3207 phylink_mac_initial_config(pl, false); 3208 } 3209 3210 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3211 struct phy_device *phy) 3212 { 3213 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3214 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3215 struct phylink_link_state config; 3216 phy_interface_t iface; 3217 int ret; 3218 3219 linkmode_copy(support, phy->supported); 3220 3221 memset(&config, 0, sizeof(config)); 3222 linkmode_copy(config.advertising, phy->advertising); 3223 config.interface = PHY_INTERFACE_MODE_NA; 3224 config.speed = SPEED_UNKNOWN; 3225 config.duplex = DUPLEX_UNKNOWN; 3226 config.pause = MLO_PAUSE_AN; 3227 3228 /* Ignore errors if we're expecting a PHY to attach later */ 3229 ret = phylink_validate(pl, support, &config); 3230 if (ret) { 3231 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3232 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3233 ERR_PTR(ret)); 3234 return ret; 3235 } 3236 3237 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3238 if (iface == PHY_INTERFACE_MODE_NA) { 3239 phylink_err(pl, 3240 "selection of interface failed, advertisement %*pb\n", 3241 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3242 return -EINVAL; 3243 } 3244 3245 config.interface = iface; 3246 linkmode_copy(support1, support); 3247 ret = phylink_validate(pl, support1, &config); 3248 if (ret) { 3249 phylink_err(pl, 3250 "validation of %s/%s with support %*pb failed: %pe\n", 3251 phylink_an_mode_str(mode), 3252 phy_modes(config.interface), 3253 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3254 ERR_PTR(ret)); 3255 return ret; 3256 } 3257 3258 pl->link_port = pl->sfp_port; 3259 3260 phylink_sfp_set_config(pl, mode, support, &config); 3261 3262 return 0; 3263 } 3264 3265 static int phylink_sfp_config_optical(struct phylink *pl) 3266 { 3267 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3268 DECLARE_PHY_INTERFACE_MASK(interfaces); 3269 struct phylink_link_state config; 3270 phy_interface_t interface; 3271 int ret; 3272 3273 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3274 (int)PHY_INTERFACE_MODE_MAX, 3275 pl->config->supported_interfaces, 3276 (int)PHY_INTERFACE_MODE_MAX, 3277 pl->sfp_interfaces); 3278 3279 /* Find the union of the supported interfaces by the PCS/MAC and 3280 * the SFP module. 3281 */ 3282 phy_interface_and(interfaces, pl->config->supported_interfaces, 3283 pl->sfp_interfaces); 3284 if (phy_interface_empty(interfaces)) { 3285 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3286 return -EINVAL; 3287 } 3288 3289 memset(&config, 0, sizeof(config)); 3290 linkmode_copy(support, pl->sfp_support); 3291 linkmode_copy(config.advertising, pl->sfp_support); 3292 config.speed = SPEED_UNKNOWN; 3293 config.duplex = DUPLEX_UNKNOWN; 3294 config.pause = MLO_PAUSE_AN; 3295 3296 /* For all the interfaces that are supported, reduce the sfp_support 3297 * mask to only those link modes that can be supported. 3298 */ 3299 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3300 interfaces); 3301 if (ret) { 3302 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3303 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3304 return ret; 3305 } 3306 3307 interface = phylink_choose_sfp_interface(pl, interfaces); 3308 if (interface == PHY_INTERFACE_MODE_NA) { 3309 phylink_err(pl, "failed to select SFP interface\n"); 3310 return -EINVAL; 3311 } 3312 3313 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3314 phy_modes(interface)); 3315 3316 config.interface = interface; 3317 3318 /* Ignore errors if we're expecting a PHY to attach later */ 3319 ret = phylink_validate(pl, support, &config); 3320 if (ret) { 3321 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3322 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3323 ERR_PTR(ret)); 3324 return ret; 3325 } 3326 3327 pl->link_port = pl->sfp_port; 3328 3329 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3330 3331 return 0; 3332 } 3333 3334 static int phylink_sfp_module_insert(void *upstream, 3335 const struct sfp_eeprom_id *id) 3336 { 3337 struct phylink *pl = upstream; 3338 3339 ASSERT_RTNL(); 3340 3341 linkmode_zero(pl->sfp_support); 3342 phy_interface_zero(pl->sfp_interfaces); 3343 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3344 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3345 3346 /* If this module may have a PHY connecting later, defer until later */ 3347 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3348 if (pl->sfp_may_have_phy) 3349 return 0; 3350 3351 return phylink_sfp_config_optical(pl); 3352 } 3353 3354 static int phylink_sfp_module_start(void *upstream) 3355 { 3356 struct phylink *pl = upstream; 3357 3358 /* If this SFP module has a PHY, start the PHY now. */ 3359 if (pl->phydev) { 3360 phy_start(pl->phydev); 3361 return 0; 3362 } 3363 3364 /* If the module may have a PHY but we didn't detect one we 3365 * need to configure the MAC here. 3366 */ 3367 if (!pl->sfp_may_have_phy) 3368 return 0; 3369 3370 return phylink_sfp_config_optical(pl); 3371 } 3372 3373 static void phylink_sfp_module_stop(void *upstream) 3374 { 3375 struct phylink *pl = upstream; 3376 3377 /* If this SFP module has a PHY, stop it. */ 3378 if (pl->phydev) 3379 phy_stop(pl->phydev); 3380 } 3381 3382 static void phylink_sfp_link_down(void *upstream) 3383 { 3384 struct phylink *pl = upstream; 3385 3386 ASSERT_RTNL(); 3387 3388 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3389 } 3390 3391 static void phylink_sfp_link_up(void *upstream) 3392 { 3393 struct phylink *pl = upstream; 3394 3395 ASSERT_RTNL(); 3396 3397 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3398 } 3399 3400 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3401 * or 802.3z control word, so inband will not work. 3402 */ 3403 static bool phylink_phy_no_inband(struct phy_device *phy) 3404 { 3405 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3406 0xae025150, 0xfffffff0); 3407 } 3408 3409 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3410 { 3411 struct phylink *pl = upstream; 3412 phy_interface_t interface; 3413 u8 mode; 3414 int ret; 3415 3416 /* 3417 * This is the new way of dealing with flow control for PHYs, 3418 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3419 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3420 * using our validate call to the MAC, we rely upon the MAC 3421 * clearing the bits from both supported and advertising fields. 3422 */ 3423 phy_support_asym_pause(phy); 3424 3425 if (phylink_phy_no_inband(phy)) 3426 mode = MLO_AN_PHY; 3427 else 3428 mode = MLO_AN_INBAND; 3429 3430 /* Set the PHY's host supported interfaces */ 3431 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3432 pl->config->supported_interfaces); 3433 3434 /* Do the initial configuration */ 3435 ret = phylink_sfp_config_phy(pl, mode, phy); 3436 if (ret < 0) 3437 return ret; 3438 3439 interface = pl->link_config.interface; 3440 ret = phylink_attach_phy(pl, phy, interface); 3441 if (ret < 0) 3442 return ret; 3443 3444 ret = phylink_bringup_phy(pl, phy, interface); 3445 if (ret) 3446 phy_detach(phy); 3447 3448 return ret; 3449 } 3450 3451 static void phylink_sfp_disconnect_phy(void *upstream, 3452 struct phy_device *phydev) 3453 { 3454 phylink_disconnect_phy(upstream); 3455 } 3456 3457 static const struct sfp_upstream_ops sfp_phylink_ops = { 3458 .attach = phylink_sfp_attach, 3459 .detach = phylink_sfp_detach, 3460 .module_insert = phylink_sfp_module_insert, 3461 .module_start = phylink_sfp_module_start, 3462 .module_stop = phylink_sfp_module_stop, 3463 .link_up = phylink_sfp_link_up, 3464 .link_down = phylink_sfp_link_down, 3465 .connect_phy = phylink_sfp_connect_phy, 3466 .disconnect_phy = phylink_sfp_disconnect_phy, 3467 }; 3468 3469 /* Helpers for MAC drivers */ 3470 3471 static struct { 3472 int bit; 3473 int speed; 3474 } phylink_c73_priority_resolution[] = { 3475 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3476 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3477 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3478 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3479 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3480 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3481 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3482 /* 5GBASE-KR not supported */ 3483 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3484 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3485 }; 3486 3487 void phylink_resolve_c73(struct phylink_link_state *state) 3488 { 3489 int i; 3490 3491 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3492 int bit = phylink_c73_priority_resolution[i].bit; 3493 if (linkmode_test_bit(bit, state->advertising) && 3494 linkmode_test_bit(bit, state->lp_advertising)) 3495 break; 3496 } 3497 3498 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3499 state->speed = phylink_c73_priority_resolution[i].speed; 3500 state->duplex = DUPLEX_FULL; 3501 } else { 3502 /* negotiation failure */ 3503 state->link = false; 3504 } 3505 3506 phylink_resolve_an_pause(state); 3507 } 3508 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3509 3510 static void phylink_decode_c37_word(struct phylink_link_state *state, 3511 uint16_t config_reg, int speed) 3512 { 3513 int fd_bit; 3514 3515 if (speed == SPEED_2500) 3516 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3517 else 3518 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3519 3520 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3521 3522 if (linkmode_test_bit(fd_bit, state->advertising) && 3523 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3524 state->speed = speed; 3525 state->duplex = DUPLEX_FULL; 3526 } else { 3527 /* negotiation failure */ 3528 state->link = false; 3529 } 3530 3531 phylink_resolve_an_pause(state); 3532 } 3533 3534 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3535 uint16_t config_reg) 3536 { 3537 if (!(config_reg & LPA_SGMII_LINK)) { 3538 state->link = false; 3539 return; 3540 } 3541 3542 switch (config_reg & LPA_SGMII_SPD_MASK) { 3543 case LPA_SGMII_10: 3544 state->speed = SPEED_10; 3545 break; 3546 case LPA_SGMII_100: 3547 state->speed = SPEED_100; 3548 break; 3549 case LPA_SGMII_1000: 3550 state->speed = SPEED_1000; 3551 break; 3552 default: 3553 state->link = false; 3554 return; 3555 } 3556 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3557 state->duplex = DUPLEX_FULL; 3558 else 3559 state->duplex = DUPLEX_HALF; 3560 } 3561 3562 /** 3563 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3564 * @state: a pointer to a struct phylink_link_state. 3565 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3566 * 3567 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3568 * code word. Decode the USXGMII code word and populate the corresponding fields 3569 * (speed, duplex) into the phylink_link_state structure. 3570 */ 3571 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3572 uint16_t lpa) 3573 { 3574 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3575 case MDIO_USXGMII_10: 3576 state->speed = SPEED_10; 3577 break; 3578 case MDIO_USXGMII_100: 3579 state->speed = SPEED_100; 3580 break; 3581 case MDIO_USXGMII_1000: 3582 state->speed = SPEED_1000; 3583 break; 3584 case MDIO_USXGMII_2500: 3585 state->speed = SPEED_2500; 3586 break; 3587 case MDIO_USXGMII_5000: 3588 state->speed = SPEED_5000; 3589 break; 3590 case MDIO_USXGMII_10G: 3591 state->speed = SPEED_10000; 3592 break; 3593 default: 3594 state->link = false; 3595 return; 3596 } 3597 3598 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3599 state->duplex = DUPLEX_FULL; 3600 else 3601 state->duplex = DUPLEX_HALF; 3602 } 3603 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3604 3605 /** 3606 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3607 * @state: a pointer to a struct phylink_link_state. 3608 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3609 * 3610 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3611 * code word. Decode the USGMII code word and populate the corresponding fields 3612 * (speed, duplex) into the phylink_link_state structure. The structure for this 3613 * word is the same as the USXGMII word, except it only supports speeds up to 3614 * 1Gbps. 3615 */ 3616 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3617 uint16_t lpa) 3618 { 3619 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3620 case MDIO_USXGMII_10: 3621 state->speed = SPEED_10; 3622 break; 3623 case MDIO_USXGMII_100: 3624 state->speed = SPEED_100; 3625 break; 3626 case MDIO_USXGMII_1000: 3627 state->speed = SPEED_1000; 3628 break; 3629 default: 3630 state->link = false; 3631 return; 3632 } 3633 3634 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3635 state->duplex = DUPLEX_FULL; 3636 else 3637 state->duplex = DUPLEX_HALF; 3638 } 3639 3640 /** 3641 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3642 * @state: a pointer to a &struct phylink_link_state. 3643 * @bmsr: The value of the %MII_BMSR register 3644 * @lpa: The value of the %MII_LPA register 3645 * 3646 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3647 * clause 37 negotiation and/or SGMII control. 3648 * 3649 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3650 * the phylink @state structure. This is suitable to be used for implementing 3651 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3652 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3653 */ 3654 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3655 u16 bmsr, u16 lpa) 3656 { 3657 state->link = !!(bmsr & BMSR_LSTATUS); 3658 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3659 /* If there is no link or autonegotiation is disabled, the LP advertisement 3660 * data is not meaningful, so don't go any further. 3661 */ 3662 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3663 state->advertising)) 3664 return; 3665 3666 switch (state->interface) { 3667 case PHY_INTERFACE_MODE_1000BASEX: 3668 phylink_decode_c37_word(state, lpa, SPEED_1000); 3669 break; 3670 3671 case PHY_INTERFACE_MODE_2500BASEX: 3672 phylink_decode_c37_word(state, lpa, SPEED_2500); 3673 break; 3674 3675 case PHY_INTERFACE_MODE_SGMII: 3676 case PHY_INTERFACE_MODE_QSGMII: 3677 phylink_decode_sgmii_word(state, lpa); 3678 break; 3679 case PHY_INTERFACE_MODE_QUSGMII: 3680 phylink_decode_usgmii_word(state, lpa); 3681 break; 3682 3683 default: 3684 state->link = false; 3685 break; 3686 } 3687 } 3688 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3689 3690 /** 3691 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3692 * @pcs: a pointer to a &struct mdio_device. 3693 * @state: a pointer to a &struct phylink_link_state. 3694 * 3695 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3696 * clause 37 negotiation and/or SGMII control. 3697 * 3698 * Read the MAC PCS state from the MII device configured in @config and 3699 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3700 * the phylink @state structure. This is suitable to be directly plugged 3701 * into the pcs_get_state() member of the struct phylink_pcs_ops 3702 * structure. 3703 */ 3704 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3705 struct phylink_link_state *state) 3706 { 3707 int bmsr, lpa; 3708 3709 bmsr = mdiodev_read(pcs, MII_BMSR); 3710 lpa = mdiodev_read(pcs, MII_LPA); 3711 if (bmsr < 0 || lpa < 0) { 3712 state->link = false; 3713 return; 3714 } 3715 3716 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3717 } 3718 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3719 3720 /** 3721 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3722 * advertisement 3723 * @interface: the PHY interface mode being configured 3724 * @advertising: the ethtool advertisement mask 3725 * 3726 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3727 * clause 37 negotiation and/or SGMII control. 3728 * 3729 * Encode the clause 37 PCS advertisement as specified by @interface and 3730 * @advertising. 3731 * 3732 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3733 */ 3734 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3735 const unsigned long *advertising) 3736 { 3737 u16 adv; 3738 3739 switch (interface) { 3740 case PHY_INTERFACE_MODE_1000BASEX: 3741 case PHY_INTERFACE_MODE_2500BASEX: 3742 adv = ADVERTISE_1000XFULL; 3743 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3744 advertising)) 3745 adv |= ADVERTISE_1000XPAUSE; 3746 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3747 advertising)) 3748 adv |= ADVERTISE_1000XPSE_ASYM; 3749 return adv; 3750 case PHY_INTERFACE_MODE_SGMII: 3751 case PHY_INTERFACE_MODE_QSGMII: 3752 return 0x0001; 3753 default: 3754 /* Nothing to do for other modes */ 3755 return -EINVAL; 3756 } 3757 } 3758 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3759 3760 /** 3761 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3762 * @pcs: a pointer to a &struct mdio_device. 3763 * @interface: the PHY interface mode being configured 3764 * @advertising: the ethtool advertisement mask 3765 * @neg_mode: PCS negotiation mode 3766 * 3767 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3768 * parameters for the @mode, @interface and @advertising parameters. 3769 * Returns negative error number on failure, zero if the advertisement 3770 * has not changed, or positive if there is a change. 3771 */ 3772 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3773 phy_interface_t interface, 3774 const unsigned long *advertising, 3775 unsigned int neg_mode) 3776 { 3777 bool changed = 0; 3778 u16 bmcr; 3779 int ret, adv; 3780 3781 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3782 if (adv >= 0) { 3783 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3784 MII_ADVERTISE, 0xffff, adv); 3785 if (ret < 0) 3786 return ret; 3787 changed = ret; 3788 } 3789 3790 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3791 bmcr = BMCR_ANENABLE; 3792 else 3793 bmcr = 0; 3794 3795 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3796 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3797 if (ret < 0) 3798 return ret; 3799 3800 return changed; 3801 } 3802 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3803 3804 /** 3805 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3806 * @pcs: a pointer to a &struct mdio_device. 3807 * 3808 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3809 * clause 37 negotiation. 3810 * 3811 * Restart the clause 37 negotiation with the link partner. This is 3812 * suitable to be directly plugged into the pcs_get_state() member 3813 * of the struct phylink_pcs_ops structure. 3814 */ 3815 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3816 { 3817 int val = mdiodev_read(pcs, MII_BMCR); 3818 3819 if (val >= 0) { 3820 val |= BMCR_ANRESTART; 3821 3822 mdiodev_write(pcs, MII_BMCR, val); 3823 } 3824 } 3825 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3826 3827 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3828 struct phylink_link_state *state) 3829 { 3830 struct mii_bus *bus = pcs->bus; 3831 int addr = pcs->addr; 3832 int stat; 3833 3834 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3835 if (stat < 0) { 3836 state->link = false; 3837 return; 3838 } 3839 3840 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3841 if (!state->link) 3842 return; 3843 3844 switch (state->interface) { 3845 case PHY_INTERFACE_MODE_10GBASER: 3846 state->speed = SPEED_10000; 3847 state->duplex = DUPLEX_FULL; 3848 break; 3849 3850 default: 3851 break; 3852 } 3853 } 3854 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3855 3856 static int __init phylink_init(void) 3857 { 3858 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3859 __set_bit(phylink_sfp_interface_preference[i], 3860 phylink_sfp_interfaces); 3861 3862 return 0; 3863 } 3864 3865 module_init(phylink_init); 3866 3867 MODULE_LICENSE("GPL v2"); 3868 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3869