1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. 157 */ 158 void phylink_set_port_modes(unsigned long *mask) 159 { 160 phylink_set(mask, TP); 161 phylink_set(mask, AUI); 162 phylink_set(mask, MII); 163 phylink_set(mask, FIBRE); 164 phylink_set(mask, BNC); 165 phylink_set(mask, Backplane); 166 } 167 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 168 169 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 170 { 171 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 172 173 phylink_set_port_modes(tmp); 174 phylink_set(tmp, Autoneg); 175 phylink_set(tmp, Pause); 176 phylink_set(tmp, Asym_Pause); 177 178 return linkmode_subset(linkmode, tmp); 179 } 180 181 static const char *phylink_an_mode_str(unsigned int mode) 182 { 183 static const char *modestr[] = { 184 [MLO_AN_PHY] = "phy", 185 [MLO_AN_FIXED] = "fixed", 186 [MLO_AN_INBAND] = "inband", 187 }; 188 189 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 190 } 191 192 static const char *phylink_pcs_mode_str(unsigned int mode) 193 { 194 if (!mode) 195 return "none"; 196 197 if (mode & PHYLINK_PCS_NEG_OUTBAND) 198 return "outband"; 199 200 if (mode & PHYLINK_PCS_NEG_INBAND) { 201 if (mode & PHYLINK_PCS_NEG_ENABLED) 202 return "inband,an-enabled"; 203 else 204 return "inband,an-disabled"; 205 } 206 207 return "unknown"; 208 } 209 210 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_SGMII: 214 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 215 return 1250; 216 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 217 return 3125; 218 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 219 return 5156; 220 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 221 return 10313; 222 default: 223 return 0; 224 } 225 } 226 227 /** 228 * phylink_interface_max_speed() - get the maximum speed of a phy interface 229 * @interface: phy interface mode defined by &typedef phy_interface_t 230 * 231 * Determine the maximum speed of a phy interface. This is intended to help 232 * determine the correct speed to pass to the MAC when the phy is performing 233 * rate matching. 234 * 235 * Return: The maximum speed of @interface 236 */ 237 static int phylink_interface_max_speed(phy_interface_t interface) 238 { 239 switch (interface) { 240 case PHY_INTERFACE_MODE_100BASEX: 241 case PHY_INTERFACE_MODE_REVRMII: 242 case PHY_INTERFACE_MODE_RMII: 243 case PHY_INTERFACE_MODE_SMII: 244 case PHY_INTERFACE_MODE_REVMII: 245 case PHY_INTERFACE_MODE_MII: 246 case PHY_INTERFACE_MODE_MIILITE: 247 return SPEED_100; 248 249 case PHY_INTERFACE_MODE_TBI: 250 case PHY_INTERFACE_MODE_MOCA: 251 case PHY_INTERFACE_MODE_RTBI: 252 case PHY_INTERFACE_MODE_1000BASEX: 253 case PHY_INTERFACE_MODE_1000BASEKX: 254 case PHY_INTERFACE_MODE_TRGMII: 255 case PHY_INTERFACE_MODE_RGMII_TXID: 256 case PHY_INTERFACE_MODE_RGMII_RXID: 257 case PHY_INTERFACE_MODE_RGMII_ID: 258 case PHY_INTERFACE_MODE_RGMII: 259 case PHY_INTERFACE_MODE_PSGMII: 260 case PHY_INTERFACE_MODE_QSGMII: 261 case PHY_INTERFACE_MODE_QUSGMII: 262 case PHY_INTERFACE_MODE_SGMII: 263 case PHY_INTERFACE_MODE_GMII: 264 return SPEED_1000; 265 266 case PHY_INTERFACE_MODE_2500BASEX: 267 case PHY_INTERFACE_MODE_10G_QXGMII: 268 return SPEED_2500; 269 270 case PHY_INTERFACE_MODE_5GBASER: 271 return SPEED_5000; 272 273 case PHY_INTERFACE_MODE_XGMII: 274 case PHY_INTERFACE_MODE_RXAUI: 275 case PHY_INTERFACE_MODE_XAUI: 276 case PHY_INTERFACE_MODE_10GBASER: 277 case PHY_INTERFACE_MODE_10GKR: 278 case PHY_INTERFACE_MODE_USXGMII: 279 return SPEED_10000; 280 281 case PHY_INTERFACE_MODE_25GBASER: 282 return SPEED_25000; 283 284 case PHY_INTERFACE_MODE_XLGMII: 285 return SPEED_40000; 286 287 case PHY_INTERFACE_MODE_50GBASER: 288 case PHY_INTERFACE_MODE_LAUI: 289 return SPEED_50000; 290 291 case PHY_INTERFACE_MODE_100GBASEP: 292 return SPEED_100000; 293 294 case PHY_INTERFACE_MODE_INTERNAL: 295 case PHY_INTERFACE_MODE_NA: 296 case PHY_INTERFACE_MODE_MAX: 297 /* No idea! Garbage in, unknown out */ 298 return SPEED_UNKNOWN; 299 } 300 301 /* If we get here, someone forgot to add an interface mode above */ 302 WARN_ON_ONCE(1); 303 return SPEED_UNKNOWN; 304 } 305 306 static struct { 307 unsigned long mask; 308 int speed; 309 unsigned int duplex; 310 unsigned int caps_bit; 311 } phylink_caps_params[] = { 312 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 313 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 314 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 315 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 316 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 317 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 318 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 319 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 320 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 321 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 322 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 323 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 324 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 325 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 326 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 327 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 328 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 329 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 330 }; 331 332 /** 333 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 334 * @caps: A set of MAC capabilities 335 * 336 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 337 */ 338 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 339 { 340 unsigned long link_caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (caps & phylink_caps_params[i].mask) 345 link_caps |= phylink_caps_params[i].caps_bit; 346 347 return link_caps; 348 } 349 350 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 351 { 352 unsigned long caps = 0; 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 356 if (link_caps & phylink_caps_params[i].caps_bit) 357 caps |= phylink_caps_params[i].mask; 358 359 return caps; 360 } 361 362 /** 363 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 364 * @linkmodes: ethtool linkmode mask (must be already initialised) 365 * @caps: bitmask of MAC capabilities 366 * 367 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 368 * supported by the @caps. @linkmodes must have been initialised previously. 369 */ 370 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 371 unsigned long caps) 372 { 373 unsigned long link_caps = phylink_caps_to_link_caps(caps); 374 375 if (caps & MAC_SYM_PAUSE) 376 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 377 378 if (caps & MAC_ASYM_PAUSE) 379 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 380 381 phy_caps_linkmodes(link_caps, linkmodes); 382 } 383 384 /** 385 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 386 * @config: pointer to a &struct phylink_config 387 * @max_speed: maximum speed 388 * 389 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 390 * Any further motifications of config.mac_capabilities will override this. 391 */ 392 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 393 { 394 int i; 395 396 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 397 phylink_caps_params[i].speed > max_speed; i++) 398 config->mac_capabilities &= ~phylink_caps_params[i].mask; 399 } 400 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 401 402 /** 403 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 404 * @speed: the speed to search for 405 * @duplex: the duplex to search for 406 * 407 * Find the mac capability for a given speed and duplex. 408 * 409 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 410 * there were no matches. 411 */ 412 static unsigned long phylink_cap_from_speed_duplex(int speed, 413 unsigned int duplex) 414 { 415 int i; 416 417 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 418 if (speed == phylink_caps_params[i].speed && 419 duplex == phylink_caps_params[i].duplex) 420 return phylink_caps_params[i].mask; 421 } 422 423 return 0; 424 } 425 426 /** 427 * phylink_get_capabilities() - get capabilities for a given MAC 428 * @interface: phy interface mode defined by &typedef phy_interface_t 429 * @mac_capabilities: bitmask of MAC capabilities 430 * @rate_matching: type of rate matching being performed 431 * 432 * Get the MAC capabilities that are supported by the @interface mode and 433 * @mac_capabilities. 434 */ 435 static unsigned long phylink_get_capabilities(phy_interface_t interface, 436 unsigned long mac_capabilities, 437 int rate_matching) 438 { 439 unsigned long link_caps = phy_caps_from_interface(interface); 440 int max_speed = phylink_interface_max_speed(interface); 441 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 442 unsigned long matched_caps = 0; 443 444 caps |= phylink_link_caps_to_mac_caps(link_caps); 445 446 switch (rate_matching) { 447 case RATE_MATCH_OPEN_LOOP: 448 /* TODO */ 449 fallthrough; 450 case RATE_MATCH_NONE: 451 matched_caps = 0; 452 break; 453 case RATE_MATCH_PAUSE: { 454 /* The MAC must support asymmetric pause towards the local 455 * device for this. We could allow just symmetric pause, but 456 * then we might have to renegotiate if the link partner 457 * doesn't support pause. This is because there's no way to 458 * accept pause frames without transmitting them if we only 459 * support symmetric pause. 460 */ 461 if (!(mac_capabilities & MAC_SYM_PAUSE) || 462 !(mac_capabilities & MAC_ASYM_PAUSE)) 463 break; 464 465 /* We can't adapt if the MAC doesn't support the interface's 466 * max speed at full duplex. 467 */ 468 if (mac_capabilities & 469 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 470 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 471 break; 472 } 473 case RATE_MATCH_CRS: 474 /* The MAC must support half duplex at the interface's max 475 * speed. 476 */ 477 if (mac_capabilities & 478 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 479 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 480 matched_caps &= mac_capabilities; 481 } 482 break; 483 } 484 485 return (caps & mac_capabilities) | matched_caps; 486 } 487 488 /** 489 * phylink_validate_mask_caps() - Restrict link modes based on caps 490 * @supported: ethtool bitmask for supported link modes. 491 * @state: pointer to a &struct phylink_link_state. 492 * @mac_capabilities: bitmask of MAC capabilities 493 * 494 * Calculate the supported link modes based on @mac_capabilities, and restrict 495 * @supported and @state based on that. Use this function if your capabiliies 496 * aren't constant, such as if they vary depending on the interface. 497 */ 498 static void phylink_validate_mask_caps(unsigned long *supported, 499 struct phylink_link_state *state, 500 unsigned long mac_capabilities) 501 { 502 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 503 unsigned long caps; 504 505 phylink_set_port_modes(mask); 506 phylink_set(mask, Autoneg); 507 caps = phylink_get_capabilities(state->interface, mac_capabilities, 508 state->rate_matching); 509 phylink_caps_to_linkmodes(mask, caps); 510 511 linkmode_and(supported, supported, mask); 512 linkmode_and(state->advertising, state->advertising, mask); 513 } 514 515 static int phylink_validate_mac_and_pcs(struct phylink *pl, 516 unsigned long *supported, 517 struct phylink_link_state *state) 518 { 519 struct phylink_pcs *pcs = NULL; 520 unsigned long capabilities; 521 int ret; 522 523 /* Get the PCS for this interface mode */ 524 if (pl->mac_ops->mac_select_pcs) { 525 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 526 if (IS_ERR(pcs)) 527 return PTR_ERR(pcs); 528 } 529 530 if (pcs) { 531 /* The PCS, if present, must be setup before phylink_create() 532 * has been called. If the ops is not initialised, print an 533 * error and backtrace rather than oopsing the kernel. 534 */ 535 if (!pcs->ops) { 536 phylink_err(pl, "interface %s: uninitialised PCS\n", 537 phy_modes(state->interface)); 538 dump_stack(); 539 return -EINVAL; 540 } 541 542 /* Ensure that this PCS supports the interface which the MAC 543 * returned it for. It is an error for the MAC to return a PCS 544 * that does not support the interface mode. 545 */ 546 if (!phy_interface_empty(pcs->supported_interfaces) && 547 !test_bit(state->interface, pcs->supported_interfaces)) { 548 phylink_err(pl, "MAC returned PCS which does not support %s\n", 549 phy_modes(state->interface)); 550 return -EINVAL; 551 } 552 553 /* Validate the link parameters with the PCS */ 554 if (pcs->ops->pcs_validate) { 555 ret = pcs->ops->pcs_validate(pcs, supported, state); 556 if (ret < 0 || phylink_is_empty_linkmode(supported)) 557 return -EINVAL; 558 559 /* Ensure the advertising mask is a subset of the 560 * supported mask. 561 */ 562 linkmode_and(state->advertising, state->advertising, 563 supported); 564 } 565 } 566 567 /* Then validate the link parameters with the MAC */ 568 if (pl->mac_ops->mac_get_caps) 569 capabilities = pl->mac_ops->mac_get_caps(pl->config, 570 state->interface); 571 else 572 capabilities = pl->config->mac_capabilities; 573 574 phylink_validate_mask_caps(supported, state, capabilities); 575 576 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 577 } 578 579 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 580 const unsigned long *supported, 581 const struct phylink_link_state *state, 582 phy_interface_t interface, 583 unsigned long *accum_supported, 584 unsigned long *accum_advertising) 585 { 586 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 587 struct phylink_link_state tmp_state; 588 589 linkmode_copy(tmp_supported, supported); 590 591 tmp_state = *state; 592 tmp_state.interface = interface; 593 594 if (phy) 595 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 596 597 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 598 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 599 interface, phy_modes(interface), 600 phy_rate_matching_to_str(tmp_state.rate_matching), 601 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 602 603 linkmode_or(accum_supported, accum_supported, tmp_supported); 604 linkmode_or(accum_advertising, accum_advertising, 605 tmp_state.advertising); 606 } 607 } 608 609 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 610 unsigned long *supported, 611 struct phylink_link_state *state, 612 const unsigned long *interfaces) 613 { 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 616 int interface; 617 618 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 619 phylink_validate_one(pl, phy, supported, state, interface, 620 all_s, all_adv); 621 622 linkmode_copy(supported, all_s); 623 linkmode_copy(state->advertising, all_adv); 624 625 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 626 } 627 628 static int phylink_validate(struct phylink *pl, unsigned long *supported, 629 struct phylink_link_state *state) 630 { 631 const unsigned long *interfaces = pl->config->supported_interfaces; 632 633 if (state->interface == PHY_INTERFACE_MODE_NA) 634 return phylink_validate_mask(pl, NULL, supported, state, 635 interfaces); 636 637 if (!test_bit(state->interface, interfaces)) 638 return -EINVAL; 639 640 return phylink_validate_mac_and_pcs(pl, supported, state); 641 } 642 643 static void phylink_fill_fixedlink_supported(unsigned long *supported) 644 { 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 657 } 658 659 static int phylink_parse_fixedlink(struct phylink *pl, 660 const struct fwnode_handle *fwnode) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 const struct link_capabilities *c; 665 struct fwnode_handle *fixed_node; 666 struct gpio_desc *desc; 667 u32 speed; 668 int ret; 669 670 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 671 if (fixed_node) { 672 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 673 674 pl->link_config.speed = speed; 675 pl->link_config.duplex = DUPLEX_HALF; 676 677 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 678 pl->link_config.duplex = DUPLEX_FULL; 679 680 /* We treat the "pause" and "asym-pause" terminology as 681 * defining the link partner's ability. 682 */ 683 if (fwnode_property_read_bool(fixed_node, "pause")) 684 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 685 pl->link_config.lp_advertising); 686 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 687 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 688 pl->link_config.lp_advertising); 689 690 if (ret == 0) { 691 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 692 GPIOD_IN, "?"); 693 694 if (!IS_ERR(desc)) 695 pl->link_gpio = desc; 696 else if (desc == ERR_PTR(-EPROBE_DEFER)) 697 ret = -EPROBE_DEFER; 698 } 699 fwnode_handle_put(fixed_node); 700 701 if (ret) 702 return ret; 703 } else { 704 u32 prop[5]; 705 706 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 707 NULL, 0); 708 if (ret != ARRAY_SIZE(prop)) { 709 phylink_err(pl, "broken fixed-link?\n"); 710 return -EINVAL; 711 } 712 713 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 714 fwnode); 715 716 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 717 prop, ARRAY_SIZE(prop)); 718 if (!ret) { 719 pl->link_config.duplex = prop[1] ? 720 DUPLEX_FULL : DUPLEX_HALF; 721 pl->link_config.speed = prop[2]; 722 if (prop[3]) 723 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 724 pl->link_config.lp_advertising); 725 if (prop[4]) 726 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 727 pl->link_config.lp_advertising); 728 } 729 } 730 731 if (pl->link_config.speed > SPEED_1000 && 732 pl->link_config.duplex != DUPLEX_FULL) 733 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 734 pl->link_config.speed); 735 736 linkmode_zero(pl->supported); 737 phylink_fill_fixedlink_supported(pl->supported); 738 739 linkmode_copy(pl->link_config.advertising, pl->supported); 740 phylink_validate(pl, pl->supported, &pl->link_config); 741 742 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 743 pl->supported, true); 744 if (c) 745 linkmode_and(match, pl->supported, c->linkmodes); 746 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 750 linkmode_and(pl->supported, pl->supported, mask); 751 752 phylink_set(pl->supported, MII); 753 754 if (c) { 755 linkmode_or(pl->supported, pl->supported, match); 756 linkmode_or(pl->link_config.lp_advertising, 757 pl->link_config.lp_advertising, match); 758 } else { 759 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 760 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 761 pl->link_config.speed); 762 } 763 764 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 765 pl->supported); 766 767 pl->link_config.link = 1; 768 pl->link_config.an_complete = 1; 769 770 return 0; 771 } 772 773 static int phylink_parse_mode(struct phylink *pl, 774 const struct fwnode_handle *fwnode) 775 { 776 struct fwnode_handle *dn; 777 const char *managed; 778 unsigned long caps; 779 780 if (pl->config->default_an_inband) 781 pl->cfg_link_an_mode = MLO_AN_INBAND; 782 783 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 784 if (dn || fwnode_property_present(fwnode, "fixed-link")) 785 pl->cfg_link_an_mode = MLO_AN_FIXED; 786 fwnode_handle_put(dn); 787 788 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 789 strcmp(managed, "in-band-status") == 0)) { 790 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 791 phylink_err(pl, 792 "can't use both fixed-link and in-band-status\n"); 793 return -EINVAL; 794 } 795 796 pl->cfg_link_an_mode = MLO_AN_INBAND; 797 } 798 799 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 800 linkmode_zero(pl->supported); 801 phylink_set(pl->supported, MII); 802 phylink_set(pl->supported, Autoneg); 803 phylink_set(pl->supported, Asym_Pause); 804 phylink_set(pl->supported, Pause); 805 806 switch (pl->link_config.interface) { 807 case PHY_INTERFACE_MODE_SGMII: 808 case PHY_INTERFACE_MODE_PSGMII: 809 case PHY_INTERFACE_MODE_QSGMII: 810 case PHY_INTERFACE_MODE_QUSGMII: 811 case PHY_INTERFACE_MODE_RGMII: 812 case PHY_INTERFACE_MODE_RGMII_ID: 813 case PHY_INTERFACE_MODE_RGMII_RXID: 814 case PHY_INTERFACE_MODE_RGMII_TXID: 815 case PHY_INTERFACE_MODE_RTBI: 816 case PHY_INTERFACE_MODE_1000BASEX: 817 case PHY_INTERFACE_MODE_2500BASEX: 818 case PHY_INTERFACE_MODE_5GBASER: 819 case PHY_INTERFACE_MODE_25GBASER: 820 case PHY_INTERFACE_MODE_USXGMII: 821 case PHY_INTERFACE_MODE_10G_QXGMII: 822 case PHY_INTERFACE_MODE_10GKR: 823 case PHY_INTERFACE_MODE_10GBASER: 824 case PHY_INTERFACE_MODE_XLGMII: 825 case PHY_INTERFACE_MODE_50GBASER: 826 case PHY_INTERFACE_MODE_LAUI: 827 case PHY_INTERFACE_MODE_100GBASEP: 828 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 829 caps = phylink_get_capabilities(pl->link_config.interface, caps, 830 RATE_MATCH_NONE); 831 phylink_caps_to_linkmodes(pl->supported, caps); 832 break; 833 834 default: 835 phylink_err(pl, 836 "incorrect link mode %s for in-band status\n", 837 phy_modes(pl->link_config.interface)); 838 return -EINVAL; 839 } 840 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 843 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 844 phylink_err(pl, 845 "failed to validate link configuration for in-band status\n"); 846 return -EINVAL; 847 } 848 } 849 850 return 0; 851 } 852 853 static void phylink_apply_manual_flow(struct phylink *pl, 854 struct phylink_link_state *state) 855 { 856 /* If autoneg is disabled, pause AN is also disabled */ 857 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 858 state->advertising)) 859 state->pause &= ~MLO_PAUSE_AN; 860 861 /* Manual configuration of pause modes */ 862 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 863 state->pause = pl->link_config.pause; 864 } 865 866 static void phylink_resolve_an_pause(struct phylink_link_state *state) 867 { 868 bool tx_pause, rx_pause; 869 870 if (state->duplex == DUPLEX_FULL) { 871 linkmode_resolve_pause(state->advertising, 872 state->lp_advertising, 873 &tx_pause, &rx_pause); 874 if (tx_pause) 875 state->pause |= MLO_PAUSE_TX; 876 if (rx_pause) 877 state->pause |= MLO_PAUSE_RX; 878 } 879 } 880 881 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 882 phy_interface_t interface) 883 { 884 if (pcs && pcs->ops->pcs_inband_caps) 885 return pcs->ops->pcs_inband_caps(pcs, interface); 886 887 return 0; 888 } 889 890 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 891 phy_interface_t interface) 892 { 893 if (pcs && pcs->ops->pcs_pre_config) 894 pcs->ops->pcs_pre_config(pcs, interface); 895 } 896 897 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 898 phy_interface_t interface) 899 { 900 int err = 0; 901 902 if (pcs && pcs->ops->pcs_post_config) 903 err = pcs->ops->pcs_post_config(pcs, interface); 904 905 return err; 906 } 907 908 static void phylink_pcs_disable(struct phylink_pcs *pcs) 909 { 910 if (pcs && pcs->ops->pcs_disable) 911 pcs->ops->pcs_disable(pcs); 912 } 913 914 static int phylink_pcs_enable(struct phylink_pcs *pcs) 915 { 916 int err = 0; 917 918 if (pcs && pcs->ops->pcs_enable) 919 err = pcs->ops->pcs_enable(pcs); 920 921 return err; 922 } 923 924 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 925 const struct phylink_link_state *state, 926 bool permit_pause_to_mac) 927 { 928 if (!pcs) 929 return 0; 930 931 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 932 state->advertising, permit_pause_to_mac); 933 } 934 935 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 936 phy_interface_t interface, int speed, 937 int duplex) 938 { 939 if (pcs && pcs->ops->pcs_link_up) 940 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 941 } 942 943 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 944 { 945 if (pcs && pcs->ops->pcs_disable_eee) 946 pcs->ops->pcs_disable_eee(pcs); 947 } 948 949 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 950 { 951 if (pcs && pcs->ops->pcs_enable_eee) 952 pcs->ops->pcs_enable_eee(pcs); 953 } 954 955 /* Query inband for a specific interface mode, asking the MAC for the 956 * PCS which will be used to handle the interface mode. 957 */ 958 static unsigned int phylink_inband_caps(struct phylink *pl, 959 phy_interface_t interface) 960 { 961 struct phylink_pcs *pcs; 962 963 if (!pl->mac_ops->mac_select_pcs) 964 return 0; 965 966 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 967 if (IS_ERR_OR_NULL(pcs)) 968 return 0; 969 970 return phylink_pcs_inband_caps(pcs, interface); 971 } 972 973 static void phylink_pcs_poll_stop(struct phylink *pl) 974 { 975 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 976 timer_delete(&pl->link_poll); 977 } 978 979 static void phylink_pcs_poll_start(struct phylink *pl) 980 { 981 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 982 mod_timer(&pl->link_poll, jiffies + HZ); 983 } 984 985 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 986 { 987 int ret = 0; 988 989 /* Signal to PCS driver that MAC requires RX clock for init */ 990 if (pl->config->mac_requires_rxc) 991 pcs->rxc_always_on = true; 992 993 if (pcs->ops->pcs_pre_init) 994 ret = pcs->ops->pcs_pre_init(pcs); 995 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 999 1000 static void phylink_mac_config(struct phylink *pl, 1001 const struct phylink_link_state *state) 1002 { 1003 struct phylink_link_state st = *state; 1004 1005 /* Stop drivers incorrectly using these */ 1006 linkmode_zero(st.lp_advertising); 1007 st.speed = SPEED_UNKNOWN; 1008 st.duplex = DUPLEX_UNKNOWN; 1009 st.an_complete = false; 1010 st.link = false; 1011 1012 phylink_dbg(pl, 1013 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1014 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1015 phy_modes(st.interface), 1016 phy_rate_matching_to_str(st.rate_matching), 1017 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1018 st.pause); 1019 1020 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1021 } 1022 1023 static void phylink_pcs_an_restart(struct phylink *pl) 1024 { 1025 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1026 pl->link_config.advertising) && 1027 phy_interface_mode_is_8023z(pl->link_config.interface) && 1028 phylink_autoneg_inband(pl->act_link_an_mode)) 1029 pl->pcs->ops->pcs_an_restart(pl->pcs); 1030 } 1031 1032 enum inband_type { 1033 INBAND_NONE, 1034 INBAND_CISCO_SGMII, 1035 INBAND_BASEX, 1036 }; 1037 1038 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1039 { 1040 switch (interface) { 1041 case PHY_INTERFACE_MODE_SGMII: 1042 case PHY_INTERFACE_MODE_PSGMII: 1043 case PHY_INTERFACE_MODE_QSGMII: 1044 case PHY_INTERFACE_MODE_QUSGMII: 1045 case PHY_INTERFACE_MODE_USXGMII: 1046 case PHY_INTERFACE_MODE_10G_QXGMII: 1047 /* These protocols are designed for use with a PHY which 1048 * communicates its negotiation result back to the MAC via 1049 * inband communication. Note: there exist PHYs that run 1050 * with SGMII but do not send the inband data. 1051 */ 1052 return INBAND_CISCO_SGMII; 1053 1054 case PHY_INTERFACE_MODE_1000BASEX: 1055 case PHY_INTERFACE_MODE_2500BASEX: 1056 /* 1000base-X is designed for use media-side for Fibre 1057 * connections, and thus the Autoneg bit needs to be 1058 * taken into account. We also do this for 2500base-X 1059 * as well, but drivers may not support this, so may 1060 * need to override this. 1061 */ 1062 return INBAND_BASEX; 1063 1064 default: 1065 return INBAND_NONE; 1066 } 1067 } 1068 1069 /** 1070 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1071 * @pl: a pointer to a &struct phylink returned from phylink_create() 1072 * @pcs: a pointer to &struct phylink_pcs 1073 * @interface: interface mode to be used 1074 * @advertising: adertisement ethtool link mode mask 1075 * 1076 * Determines the negotiation mode to be used by the PCS, and returns 1077 * one of: 1078 * 1079 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1080 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1081 * will be used. 1082 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1083 * disabled 1084 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1085 * 1086 * Note: this is for cases where the PCS itself is involved in negotiation 1087 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1088 */ 1089 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1090 phy_interface_t interface, 1091 const unsigned long *advertising) 1092 { 1093 unsigned int pcs_ib_caps = 0; 1094 unsigned int phy_ib_caps = 0; 1095 unsigned int neg_mode, mode; 1096 enum inband_type type; 1097 1098 type = phylink_get_inband_type(interface); 1099 if (type == INBAND_NONE) { 1100 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1101 pl->act_link_an_mode = pl->req_link_an_mode; 1102 return; 1103 } 1104 1105 mode = pl->req_link_an_mode; 1106 1107 pl->phy_ib_mode = 0; 1108 1109 if (pcs) 1110 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1111 1112 if (pl->phydev) 1113 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1114 1115 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1116 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1117 1118 if (!phylink_autoneg_inband(mode)) { 1119 bool pcs_ib_only = false; 1120 bool phy_ib_only = false; 1121 1122 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1123 /* PCS supports reporting in-band capabilities, and 1124 * supports more than disable mode. 1125 */ 1126 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1127 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1128 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1129 pcs_ib_only = true; 1130 } 1131 1132 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1133 /* PHY supports in-band capabilities, and supports 1134 * more than disable mode. 1135 */ 1136 if (phy_ib_caps & LINK_INBAND_DISABLE) 1137 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1138 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1139 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1140 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1141 phy_ib_only = true; 1142 } 1143 1144 /* If either the PCS or PHY requires inband to be enabled, 1145 * this is an invalid configuration. Provide a diagnostic 1146 * message for this case, but don't try to force the issue. 1147 */ 1148 if (pcs_ib_only || phy_ib_only) 1149 phylink_warn(pl, 1150 "firmware wants %s mode, but %s%s%s requires inband\n", 1151 phylink_an_mode_str(mode), 1152 pcs_ib_only ? "PCS" : "", 1153 pcs_ib_only && phy_ib_only ? " and " : "", 1154 phy_ib_only ? "PHY" : ""); 1155 1156 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1157 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1158 /* For SGMII modes which are designed to be used with PHYs, or 1159 * Base-X with a PHY, we try to use in-band mode where-ever 1160 * possible. However, there are some PHYs e.g. BCM84881 which 1161 * do not support in-band. 1162 */ 1163 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1164 LINK_INBAND_BYPASS; 1165 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1166 LINK_INBAND_BYPASS; 1167 /* PCS PHY 1168 * D E D E 1169 * 0 0 0 0 no information inband enabled 1170 * 1 0 0 0 pcs doesn't support outband 1171 * 0 1 0 0 pcs required inband enabled 1172 * 1 1 0 0 pcs optional inband enabled 1173 * 0 0 1 0 phy doesn't support outband 1174 * 1 0 1 0 pcs+phy doesn't support outband 1175 * 0 1 1 0 pcs required, phy doesn't support, invalid 1176 * 1 1 1 0 pcs optional, phy doesn't support, outband 1177 * 0 0 0 1 phy required inband enabled 1178 * 1 0 0 1 pcs doesn't support, phy required, invalid 1179 * 0 1 0 1 pcs+phy required inband enabled 1180 * 1 1 0 1 pcs optional, phy required inband enabled 1181 * 0 0 1 1 phy optional inband enabled 1182 * 1 0 1 1 pcs doesn't support, phy optional, outband 1183 * 0 1 1 1 pcs required, phy optional inband enabled 1184 * 1 1 1 1 pcs+phy optional inband enabled 1185 */ 1186 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1187 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1188 /* In-band supported or unknown at both ends. Enable 1189 * in-band mode with or without bypass at the PHY. 1190 */ 1191 if (phy_ib_caps & LINK_INBAND_ENABLE) 1192 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1193 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1194 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1195 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1198 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1199 /* Either in-band not supported at at least one end. 1200 * In-band bypass at the other end is possible. 1201 */ 1202 if (phy_ib_caps & LINK_INBAND_DISABLE) 1203 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1204 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1205 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1206 1207 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1208 if (pl->phydev) 1209 mode = MLO_AN_PHY; 1210 } else { 1211 /* invalid */ 1212 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1213 phy_modes(interface)); 1214 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1215 } 1216 } else { 1217 /* For Base-X without a PHY */ 1218 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1219 /* If the PCS doesn't support inband, then inband must 1220 * be disabled. 1221 */ 1222 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1223 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1224 /* If the PCS requires inband, then inband must always 1225 * be enabled. 1226 */ 1227 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1228 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1229 advertising)) 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1231 else 1232 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1233 } 1234 1235 pl->pcs_neg_mode = neg_mode; 1236 pl->act_link_an_mode = mode; 1237 } 1238 1239 static void phylink_major_config(struct phylink *pl, bool restart, 1240 const struct phylink_link_state *state) 1241 { 1242 struct phylink_pcs *pcs = NULL; 1243 bool pcs_changed = false; 1244 unsigned int rate_kbd; 1245 int err; 1246 1247 phylink_dbg(pl, "major config, requested %s/%s\n", 1248 phylink_an_mode_str(pl->req_link_an_mode), 1249 phy_modes(state->interface)); 1250 1251 pl->major_config_failed = false; 1252 1253 if (pl->mac_ops->mac_select_pcs) { 1254 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1255 if (IS_ERR(pcs)) { 1256 phylink_err(pl, 1257 "mac_select_pcs unexpectedly failed: %pe\n", 1258 pcs); 1259 1260 pl->major_config_failed = true; 1261 return; 1262 } 1263 1264 pcs_changed = pl->pcs != pcs; 1265 } 1266 1267 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1268 1269 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1270 phylink_an_mode_str(pl->act_link_an_mode), 1271 phylink_pcs_mode_str(pl->pcs_neg_mode), 1272 phy_modes(state->interface)); 1273 1274 phylink_pcs_poll_stop(pl); 1275 1276 if (pl->mac_ops->mac_prepare) { 1277 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1278 state->interface); 1279 if (err < 0) { 1280 phylink_err(pl, "mac_prepare failed: %pe\n", 1281 ERR_PTR(err)); 1282 pl->major_config_failed = true; 1283 return; 1284 } 1285 } 1286 1287 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1288 * for the change. 1289 */ 1290 if (pcs_changed) { 1291 phylink_pcs_disable(pl->pcs); 1292 1293 if (pl->pcs) 1294 pl->pcs->phylink = NULL; 1295 1296 if (pcs) 1297 pcs->phylink = pl; 1298 1299 pl->pcs = pcs; 1300 } 1301 1302 if (pl->pcs) 1303 phylink_pcs_pre_config(pl->pcs, state->interface); 1304 1305 phylink_mac_config(pl, state); 1306 1307 if (pl->pcs) { 1308 err = phylink_pcs_post_config(pl->pcs, state->interface); 1309 if (err < 0) { 1310 phylink_err(pl, "pcs_post_config failed: %pe\n", 1311 ERR_PTR(err)); 1312 1313 pl->major_config_failed = true; 1314 } 1315 } 1316 1317 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1318 phylink_pcs_enable(pl->pcs); 1319 1320 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1321 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1322 if (err < 0) { 1323 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1324 pl->major_config_failed = true; 1325 } else if (err > 0) { 1326 restart = true; 1327 } 1328 1329 if (restart) 1330 phylink_pcs_an_restart(pl); 1331 1332 if (pl->mac_ops->mac_finish) { 1333 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1334 state->interface); 1335 if (err < 0) { 1336 phylink_err(pl, "mac_finish failed: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->phydev && pl->phy_ib_mode) { 1344 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1345 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1346 " disable" : "", 1347 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1348 " enable" : "", 1349 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1350 " bypass" : ""); 1351 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1352 if (err < 0) { 1353 phylink_err(pl, "phy_config_inband: %pe\n", 1354 ERR_PTR(err)); 1355 1356 pl->major_config_failed = true; 1357 } 1358 } 1359 1360 if (pl->sfp_bus) { 1361 rate_kbd = phylink_interface_signal_rate(state->interface); 1362 if (rate_kbd) 1363 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1364 } 1365 1366 phylink_pcs_poll_start(pl); 1367 } 1368 1369 /* 1370 * Reconfigure for a change of inband advertisement. 1371 * If we have a separate PCS, we only need to call its pcs_config() method, 1372 * and then restart AN if it indicates something changed. Otherwise, we do 1373 * the full MAC reconfiguration. 1374 */ 1375 static int phylink_change_inband_advert(struct phylink *pl) 1376 { 1377 int ret; 1378 1379 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1380 return 0; 1381 1382 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1383 phylink_an_mode_str(pl->req_link_an_mode), 1384 phy_modes(pl->link_config.interface), 1385 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1386 pl->link_config.pause); 1387 1388 /* Recompute the PCS neg mode */ 1389 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1390 pl->link_config.advertising); 1391 1392 /* Modern PCS-based method; update the advert at the PCS, and 1393 * restart negotiation if the pcs_config() helper indicates that 1394 * the programmed advertisement has changed. 1395 */ 1396 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1397 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1398 if (ret < 0) 1399 return ret; 1400 1401 if (ret > 0) 1402 phylink_pcs_an_restart(pl); 1403 1404 return 0; 1405 } 1406 1407 static void phylink_mac_pcs_get_state(struct phylink *pl, 1408 struct phylink_link_state *state) 1409 { 1410 struct phylink_pcs *pcs; 1411 bool autoneg; 1412 1413 linkmode_copy(state->advertising, pl->link_config.advertising); 1414 linkmode_zero(state->lp_advertising); 1415 state->interface = pl->link_config.interface; 1416 state->rate_matching = pl->link_config.rate_matching; 1417 state->an_complete = 0; 1418 state->link = 1; 1419 1420 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1421 if (autoneg) { 1422 state->speed = SPEED_UNKNOWN; 1423 state->duplex = DUPLEX_UNKNOWN; 1424 state->pause = MLO_PAUSE_NONE; 1425 } else { 1426 state->speed = pl->link_config.speed; 1427 state->duplex = pl->link_config.duplex; 1428 state->pause = pl->link_config.pause; 1429 } 1430 1431 pcs = pl->pcs; 1432 if (pcs) 1433 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1434 else 1435 state->link = 0; 1436 } 1437 1438 /* The fixed state is... fixed except for the link state, 1439 * which may be determined by a GPIO or a callback. 1440 */ 1441 static void phylink_get_fixed_state(struct phylink *pl, 1442 struct phylink_link_state *state) 1443 { 1444 *state = pl->link_config; 1445 if (pl->config->get_fixed_state) 1446 pl->config->get_fixed_state(pl->config, state); 1447 else if (pl->link_gpio) 1448 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1449 1450 state->pause = MLO_PAUSE_NONE; 1451 phylink_resolve_an_pause(state); 1452 } 1453 1454 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1455 { 1456 struct phylink_link_state link_state; 1457 struct phy_device *phy = pl->phydev; 1458 1459 switch (pl->req_link_an_mode) { 1460 case MLO_AN_PHY: 1461 link_state = pl->phy_state; 1462 break; 1463 1464 case MLO_AN_FIXED: 1465 phylink_get_fixed_state(pl, &link_state); 1466 break; 1467 1468 case MLO_AN_INBAND: 1469 link_state = pl->link_config; 1470 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1471 link_state.pause = MLO_PAUSE_NONE; 1472 break; 1473 1474 default: /* can't happen */ 1475 return; 1476 } 1477 1478 link_state.link = false; 1479 1480 phylink_apply_manual_flow(pl, &link_state); 1481 if (phy) 1482 mutex_lock(&phy->lock); 1483 phylink_major_config(pl, force_restart, &link_state); 1484 if (phy) 1485 mutex_unlock(&phy->lock); 1486 } 1487 1488 static const char *phylink_pause_to_str(int pause) 1489 { 1490 switch (pause & MLO_PAUSE_TXRX_MASK) { 1491 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1492 return "rx/tx"; 1493 case MLO_PAUSE_TX: 1494 return "tx"; 1495 case MLO_PAUSE_RX: 1496 return "rx"; 1497 default: 1498 return "off"; 1499 } 1500 } 1501 1502 static void phylink_deactivate_lpi(struct phylink *pl) 1503 { 1504 if (pl->mac_enable_tx_lpi) { 1505 pl->mac_enable_tx_lpi = false; 1506 1507 phylink_dbg(pl, "disabling LPI\n"); 1508 1509 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1510 1511 phylink_pcs_disable_eee(pl->pcs); 1512 } 1513 } 1514 1515 static void phylink_activate_lpi(struct phylink *pl) 1516 { 1517 int err; 1518 1519 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1520 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1521 phy_modes(pl->cur_interface)); 1522 return; 1523 } 1524 1525 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1526 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1527 1528 phylink_pcs_enable_eee(pl->pcs); 1529 1530 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1531 pl->mac_tx_clk_stop); 1532 if (err) { 1533 phylink_pcs_disable_eee(pl->pcs); 1534 phylink_err(pl, "%ps() failed: %pe\n", 1535 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1536 return; 1537 } 1538 1539 pl->mac_enable_tx_lpi = true; 1540 } 1541 1542 static void phylink_link_up(struct phylink *pl, 1543 struct phylink_link_state link_state) 1544 { 1545 struct net_device *ndev = pl->netdev; 1546 int speed, duplex; 1547 bool rx_pause; 1548 1549 speed = link_state.speed; 1550 duplex = link_state.duplex; 1551 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1552 1553 switch (link_state.rate_matching) { 1554 case RATE_MATCH_PAUSE: 1555 /* The PHY is doing rate matchion from the media rate (in 1556 * the link_state) to the interface speed, and will send 1557 * pause frames to the MAC to limit its transmission speed. 1558 */ 1559 speed = phylink_interface_max_speed(link_state.interface); 1560 duplex = DUPLEX_FULL; 1561 rx_pause = true; 1562 break; 1563 1564 case RATE_MATCH_CRS: 1565 /* The PHY is doing rate matchion from the media rate (in 1566 * the link_state) to the interface speed, and will cause 1567 * collisions to the MAC to limit its transmission speed. 1568 */ 1569 speed = phylink_interface_max_speed(link_state.interface); 1570 duplex = DUPLEX_HALF; 1571 break; 1572 } 1573 1574 pl->cur_interface = link_state.interface; 1575 1576 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1577 duplex); 1578 1579 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1580 pl->cur_interface, speed, duplex, 1581 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1582 1583 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1584 phylink_activate_lpi(pl); 1585 1586 if (ndev) 1587 netif_carrier_on(ndev); 1588 1589 phylink_info(pl, 1590 "Link is Up - %s/%s - flow control %s\n", 1591 phy_speed_to_str(link_state.speed), 1592 phy_duplex_to_str(link_state.duplex), 1593 phylink_pause_to_str(link_state.pause)); 1594 } 1595 1596 static void phylink_link_down(struct phylink *pl) 1597 { 1598 struct net_device *ndev = pl->netdev; 1599 1600 if (ndev) 1601 netif_carrier_off(ndev); 1602 1603 phylink_deactivate_lpi(pl); 1604 1605 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1606 pl->cur_interface); 1607 phylink_info(pl, "Link is Down\n"); 1608 } 1609 1610 static bool phylink_link_is_up(struct phylink *pl) 1611 { 1612 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1613 } 1614 1615 static void phylink_resolve(struct work_struct *w) 1616 { 1617 struct phylink *pl = container_of(w, struct phylink, resolve); 1618 struct phylink_link_state link_state; 1619 bool mac_config = false; 1620 bool retrigger = false; 1621 struct phy_device *phy; 1622 bool cur_link_state; 1623 1624 mutex_lock(&pl->phydev_mutex); 1625 phy = pl->phydev; 1626 if (phy) 1627 mutex_lock(&phy->lock); 1628 mutex_lock(&pl->state_mutex); 1629 cur_link_state = phylink_link_is_up(pl); 1630 1631 if (pl->phylink_disable_state) { 1632 pl->link_failed = false; 1633 link_state = pl->link_config; 1634 link_state.link = false; 1635 } else if (pl->link_failed) { 1636 link_state = pl->link_config; 1637 link_state.link = false; 1638 retrigger = true; 1639 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1640 phylink_get_fixed_state(pl, &link_state); 1641 mac_config = link_state.link; 1642 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1643 link_state = pl->phy_state; 1644 mac_config = link_state.link; 1645 } else { 1646 phylink_mac_pcs_get_state(pl, &link_state); 1647 1648 /* The PCS may have a latching link-fail indicator. If the link 1649 * was up, bring the link down and re-trigger the resolve. 1650 * Otherwise, re-read the PCS state to get the current status 1651 * of the link. 1652 */ 1653 if (!link_state.link) { 1654 if (cur_link_state) 1655 retrigger = true; 1656 else 1657 phylink_mac_pcs_get_state(pl, &link_state); 1658 } 1659 1660 /* If we have a phy, the "up" state is the union of both the 1661 * PHY and the MAC 1662 */ 1663 if (phy) 1664 link_state.link &= pl->phy_state.link; 1665 1666 /* Only update if the PHY link is up */ 1667 if (phy && pl->phy_state.link) { 1668 /* If the interface has changed, force a link down 1669 * event if the link isn't already down, and re-resolve. 1670 */ 1671 if (link_state.interface != pl->phy_state.interface) { 1672 retrigger = true; 1673 link_state.link = false; 1674 } 1675 1676 link_state.interface = pl->phy_state.interface; 1677 1678 /* If we are doing rate matching, then the link 1679 * speed/duplex comes from the PHY 1680 */ 1681 if (pl->phy_state.rate_matching) { 1682 link_state.rate_matching = 1683 pl->phy_state.rate_matching; 1684 link_state.speed = pl->phy_state.speed; 1685 link_state.duplex = pl->phy_state.duplex; 1686 } 1687 1688 /* If we have a PHY, we need to update with the PHY 1689 * flow control bits. 1690 */ 1691 link_state.pause = pl->phy_state.pause; 1692 mac_config = true; 1693 } 1694 } 1695 1696 if (pl->act_link_an_mode != MLO_AN_FIXED) 1697 phylink_apply_manual_flow(pl, &link_state); 1698 1699 if ((mac_config && link_state.interface != pl->link_config.interface) || 1700 pl->force_major_config) { 1701 /* The interface has changed or a forced major configuration 1702 * was requested, so force the link down and then reconfigure. 1703 */ 1704 if (cur_link_state) { 1705 phylink_link_down(pl); 1706 cur_link_state = false; 1707 } 1708 phylink_major_config(pl, false, &link_state); 1709 pl->link_config.interface = link_state.interface; 1710 pl->force_major_config = false; 1711 } 1712 1713 /* If configuration of the interface failed, force the link down 1714 * until we get a successful configuration. 1715 */ 1716 if (pl->major_config_failed) 1717 link_state.link = false; 1718 1719 if (link_state.link != cur_link_state) { 1720 pl->old_link_state = link_state.link; 1721 if (!link_state.link) 1722 phylink_link_down(pl); 1723 else 1724 phylink_link_up(pl, link_state); 1725 } 1726 if (!link_state.link && retrigger) { 1727 pl->link_failed = false; 1728 queue_work(system_power_efficient_wq, &pl->resolve); 1729 } 1730 mutex_unlock(&pl->state_mutex); 1731 if (phy) 1732 mutex_unlock(&phy->lock); 1733 mutex_unlock(&pl->phydev_mutex); 1734 } 1735 1736 static void phylink_run_resolve(struct phylink *pl) 1737 { 1738 if (!pl->phylink_disable_state) 1739 queue_work(system_power_efficient_wq, &pl->resolve); 1740 } 1741 1742 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1743 { 1744 unsigned long state = pl->phylink_disable_state; 1745 1746 set_bit(bit, &pl->phylink_disable_state); 1747 if (state == 0) { 1748 queue_work(system_power_efficient_wq, &pl->resolve); 1749 flush_work(&pl->resolve); 1750 } 1751 } 1752 1753 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1754 { 1755 clear_bit(bit, &pl->phylink_disable_state); 1756 phylink_run_resolve(pl); 1757 } 1758 1759 static void phylink_fixed_poll(struct timer_list *t) 1760 { 1761 struct phylink *pl = container_of(t, struct phylink, link_poll); 1762 1763 mod_timer(t, jiffies + HZ); 1764 1765 phylink_run_resolve(pl); 1766 } 1767 1768 static const struct sfp_upstream_ops sfp_phylink_ops; 1769 1770 static int phylink_register_sfp(struct phylink *pl, 1771 const struct fwnode_handle *fwnode) 1772 { 1773 struct sfp_bus *bus; 1774 int ret; 1775 1776 if (!fwnode) 1777 return 0; 1778 1779 bus = sfp_bus_find_fwnode(fwnode); 1780 if (IS_ERR(bus)) { 1781 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1782 return PTR_ERR(bus); 1783 } 1784 1785 pl->sfp_bus = bus; 1786 1787 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1788 sfp_bus_put(bus); 1789 1790 return ret; 1791 } 1792 1793 /** 1794 * phylink_set_fixed_link() - set the fixed link 1795 * @pl: a pointer to a &struct phylink returned from phylink_create() 1796 * @state: a pointer to a struct phylink_link_state. 1797 * 1798 * This function is used when the link parameters are known and do not change, 1799 * making it suitable for certain types of network connections. 1800 * 1801 * Returns: zero on success or negative error code. 1802 */ 1803 int phylink_set_fixed_link(struct phylink *pl, 1804 const struct phylink_link_state *state) 1805 { 1806 const struct link_capabilities *c; 1807 unsigned long *adv; 1808 1809 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1810 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1811 return -EINVAL; 1812 1813 c = phy_caps_lookup(state->speed, state->duplex, 1814 pl->supported, true); 1815 if (!c) 1816 return -EINVAL; 1817 1818 adv = pl->link_config.advertising; 1819 linkmode_and(adv, pl->supported, c->linkmodes); 1820 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1821 1822 pl->link_config.speed = state->speed; 1823 pl->link_config.duplex = state->duplex; 1824 pl->link_config.link = 1; 1825 pl->link_config.an_complete = 1; 1826 1827 pl->cfg_link_an_mode = MLO_AN_FIXED; 1828 pl->req_link_an_mode = pl->cfg_link_an_mode; 1829 1830 return 0; 1831 } 1832 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1833 1834 /** 1835 * phylink_create() - create a phylink instance 1836 * @config: a pointer to the target &struct phylink_config 1837 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1838 * interface 1839 * @iface: the desired link mode defined by &typedef phy_interface_t 1840 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1841 * 1842 * Create a new phylink instance, and parse the link parameters found in @np. 1843 * This will parse in-band modes, fixed-link or SFP configuration. 1844 * 1845 * Note: the rtnl lock must not be held when calling this function. 1846 * 1847 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1848 * must use IS_ERR() to check for errors from this function. 1849 */ 1850 struct phylink *phylink_create(struct phylink_config *config, 1851 const struct fwnode_handle *fwnode, 1852 phy_interface_t iface, 1853 const struct phylink_mac_ops *mac_ops) 1854 { 1855 struct phylink *pl; 1856 int ret; 1857 1858 /* Validate the supplied configuration */ 1859 if (phy_interface_empty(config->supported_interfaces)) { 1860 dev_err(config->dev, 1861 "phylink: error: empty supported_interfaces\n"); 1862 return ERR_PTR(-EINVAL); 1863 } 1864 1865 pl = kzalloc_obj(*pl); 1866 if (!pl) 1867 return ERR_PTR(-ENOMEM); 1868 1869 mutex_init(&pl->phydev_mutex); 1870 mutex_init(&pl->state_mutex); 1871 INIT_WORK(&pl->resolve, phylink_resolve); 1872 1873 pl->config = config; 1874 if (config->type == PHYLINK_NETDEV) { 1875 pl->netdev = to_net_dev(config->dev); 1876 netif_carrier_off(pl->netdev); 1877 } else if (config->type == PHYLINK_DEV) { 1878 pl->dev = config->dev; 1879 } else { 1880 ret = -EINVAL; 1881 goto free_pl; 1882 } 1883 1884 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1885 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1886 pl->config->lpi_capabilities && 1887 !phy_interface_empty(pl->config->lpi_interfaces); 1888 1889 /* Set the default EEE configuration */ 1890 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1891 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1892 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1893 1894 pl->phy_state.interface = iface; 1895 pl->link_interface = iface; 1896 if (iface == PHY_INTERFACE_MODE_MOCA) 1897 pl->link_port = PORT_BNC; 1898 else 1899 pl->link_port = PORT_MII; 1900 pl->link_config.interface = iface; 1901 pl->link_config.pause = MLO_PAUSE_AN; 1902 pl->link_config.speed = SPEED_UNKNOWN; 1903 pl->link_config.duplex = DUPLEX_UNKNOWN; 1904 pl->pcs_state = PCS_STATE_DOWN; 1905 pl->mac_ops = mac_ops; 1906 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1907 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1908 1909 linkmode_fill(pl->supported); 1910 linkmode_copy(pl->link_config.advertising, pl->supported); 1911 phylink_validate(pl, pl->supported, &pl->link_config); 1912 1913 ret = phylink_parse_mode(pl, fwnode); 1914 if (ret < 0) 1915 goto free_pl; 1916 1917 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1918 ret = phylink_parse_fixedlink(pl, fwnode); 1919 if (ret < 0) 1920 goto release_link_gpio; 1921 } 1922 1923 pl->req_link_an_mode = pl->cfg_link_an_mode; 1924 1925 ret = phylink_register_sfp(pl, fwnode); 1926 if (ret < 0) 1927 goto release_link_gpio; 1928 1929 return pl; 1930 1931 release_link_gpio: 1932 if (pl->link_gpio) 1933 gpiod_put(pl->link_gpio); 1934 free_pl: 1935 kfree(pl); 1936 return ERR_PTR(ret); 1937 } 1938 EXPORT_SYMBOL_GPL(phylink_create); 1939 1940 /** 1941 * phylink_destroy() - cleanup and destroy the phylink instance 1942 * @pl: a pointer to a &struct phylink returned from phylink_create() 1943 * 1944 * Destroy a phylink instance. Any PHY that has been attached must have been 1945 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1946 * 1947 * Note: the rtnl lock must not be held when calling this function. 1948 */ 1949 void phylink_destroy(struct phylink *pl) 1950 { 1951 sfp_bus_del_upstream(pl->sfp_bus); 1952 if (pl->link_gpio) 1953 gpiod_put(pl->link_gpio); 1954 1955 cancel_work_sync(&pl->resolve); 1956 kfree(pl); 1957 } 1958 EXPORT_SYMBOL_GPL(phylink_destroy); 1959 1960 /** 1961 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1962 * @pl: a pointer to a &struct phylink returned from phylink_create() 1963 * 1964 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1965 * no PHY is needed. 1966 * 1967 * Returns true if phylink will be expecting a PHY. 1968 */ 1969 bool phylink_expects_phy(struct phylink *pl) 1970 { 1971 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 1972 return false; 1973 return true; 1974 } 1975 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1976 1977 static void phylink_phy_change(struct phy_device *phydev, bool up) 1978 { 1979 struct phylink *pl = phydev->phylink; 1980 bool tx_pause, rx_pause; 1981 1982 phy_get_pause(phydev, &tx_pause, &rx_pause); 1983 1984 mutex_lock(&pl->state_mutex); 1985 pl->phy_state.speed = phydev->speed; 1986 pl->phy_state.duplex = phydev->duplex; 1987 pl->phy_state.rate_matching = phydev->rate_matching; 1988 pl->phy_state.pause = MLO_PAUSE_NONE; 1989 if (tx_pause) 1990 pl->phy_state.pause |= MLO_PAUSE_TX; 1991 if (rx_pause) 1992 pl->phy_state.pause |= MLO_PAUSE_RX; 1993 pl->phy_state.interface = phydev->interface; 1994 pl->phy_state.link = up; 1995 if (!up) 1996 pl->link_failed = true; 1997 1998 /* Get the LPI state from phylib */ 1999 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 2000 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 2001 mutex_unlock(&pl->state_mutex); 2002 2003 phylink_run_resolve(pl); 2004 2005 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2006 up ? "up" : "down", 2007 phy_modes(phydev->interface), 2008 phy_speed_to_str(phydev->speed), 2009 phy_duplex_to_str(phydev->duplex), 2010 phy_rate_matching_to_str(phydev->rate_matching), 2011 phylink_pause_to_str(pl->phy_state.pause), 2012 phydev->enable_tx_lpi ? "" : "no"); 2013 } 2014 2015 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2016 unsigned long *supported, 2017 struct phylink_link_state *state) 2018 { 2019 DECLARE_PHY_INTERFACE_MASK(interfaces); 2020 2021 /* If the PHY provides a bitmap of the interfaces it will be using 2022 * depending on the negotiated media speeds, use this to validate 2023 * which ethtool link modes can be used. 2024 */ 2025 if (!phy_interface_empty(phy->possible_interfaces)) { 2026 /* We only care about the union of the PHY's interfaces and 2027 * those which the host supports. 2028 */ 2029 phy_interface_and(interfaces, phy->possible_interfaces, 2030 pl->config->supported_interfaces); 2031 2032 if (phy_interface_empty(interfaces)) { 2033 phylink_err(pl, "PHY has no common interfaces\n"); 2034 return -EINVAL; 2035 } 2036 2037 if (phy_on_sfp(phy)) { 2038 /* If the PHY is on a SFP, limit the interfaces to 2039 * those that can be used with a SFP module. 2040 */ 2041 phy_interface_and(interfaces, interfaces, 2042 phylink_sfp_interfaces); 2043 2044 if (phy_interface_empty(interfaces)) { 2045 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2046 return -EINVAL; 2047 } 2048 } 2049 2050 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2051 phydev_name(phy), 2052 (int)PHY_INTERFACE_MODE_MAX, 2053 phy->possible_interfaces, 2054 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2055 2056 return phylink_validate_mask(pl, phy, supported, state, 2057 interfaces); 2058 } 2059 2060 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2061 phydev_name(phy)); 2062 2063 /* Check whether we would use rate matching for the proposed interface 2064 * mode. 2065 */ 2066 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2067 2068 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2069 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2070 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2071 * their Serdes is either unnecessary or not reasonable. 2072 * 2073 * For these which switch interface modes, we really need to know which 2074 * interface modes the PHY supports to properly work out which ethtool 2075 * linkmodes can be supported. For now, as a work-around, we validate 2076 * against all interface modes, which may lead to more ethtool link 2077 * modes being advertised than are actually supported. 2078 */ 2079 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2080 state->interface != PHY_INTERFACE_MODE_RXAUI && 2081 state->interface != PHY_INTERFACE_MODE_XAUI && 2082 state->interface != PHY_INTERFACE_MODE_USXGMII) 2083 state->interface = PHY_INTERFACE_MODE_NA; 2084 2085 return phylink_validate(pl, supported, state); 2086 } 2087 2088 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2089 phy_interface_t interface) 2090 { 2091 struct phylink_link_state config; 2092 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2093 char *irq_str; 2094 int ret; 2095 2096 /* 2097 * This is the new way of dealing with flow control for PHYs, 2098 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2099 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2100 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2101 * capabilities and must NOT change the phy's pause settings directly. 2102 */ 2103 phy_support_asym_pause(phy); 2104 2105 memset(&config, 0, sizeof(config)); 2106 linkmode_copy(supported, phy->supported); 2107 linkmode_copy(config.advertising, phy->advertising); 2108 config.interface = interface; 2109 2110 ret = phylink_validate_phy(pl, phy, supported, &config); 2111 if (ret) { 2112 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2113 phy_modes(config.interface), 2114 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2115 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2116 ERR_PTR(ret)); 2117 return ret; 2118 } 2119 2120 phy->phylink = pl; 2121 phy->phy_link_change = phylink_phy_change; 2122 2123 irq_str = phy_attached_info_irq(phy); 2124 phylink_info(pl, 2125 "PHY [%s] driver [%s] (irq=%s)\n", 2126 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2127 kfree(irq_str); 2128 2129 mutex_lock(&pl->phydev_mutex); 2130 mutex_lock(&phy->lock); 2131 mutex_lock(&pl->state_mutex); 2132 pl->phydev = phy; 2133 pl->phy_state.interface = interface; 2134 pl->phy_state.pause = MLO_PAUSE_NONE; 2135 pl->phy_state.speed = SPEED_UNKNOWN; 2136 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2137 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2138 linkmode_copy(pl->supported, supported); 2139 linkmode_copy(pl->link_config.advertising, config.advertising); 2140 2141 /* Restrict the phy advertisement according to the MAC support. */ 2142 linkmode_copy(phy->advertising, config.advertising); 2143 2144 /* If the MAC supports phylink managed EEE, restrict the EEE 2145 * advertisement according to the MAC's LPI capabilities. 2146 */ 2147 if (pl->mac_supports_eee) { 2148 /* If EEE is enabled, then we need to call phy_support_eee() 2149 * to ensure that the advertising mask is appropriately set. 2150 * This also enables EEE at the PHY. 2151 */ 2152 if (pl->eee_cfg.eee_enabled) 2153 phy_support_eee(phy); 2154 2155 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2156 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2157 2158 /* Convert the MAC's LPI capabilities to linkmodes */ 2159 linkmode_zero(pl->supported_lpi); 2160 phylink_caps_to_linkmodes(pl->supported_lpi, 2161 pl->config->lpi_capabilities); 2162 2163 /* Restrict the PHYs EEE support/advertisement to the modes 2164 * that the MAC supports. 2165 */ 2166 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2167 pl->supported_lpi); 2168 } else if (pl->mac_supports_eee_ops) { 2169 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2170 phy_disable_eee(phy); 2171 } 2172 2173 mutex_unlock(&pl->state_mutex); 2174 mutex_unlock(&phy->lock); 2175 mutex_unlock(&pl->phydev_mutex); 2176 2177 phylink_dbg(pl, 2178 "phy: %s setting supported %*pb advertising %*pb\n", 2179 phy_modes(interface), 2180 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2181 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2182 2183 if (pl->config->mac_managed_pm) 2184 phy->mac_managed_pm = true; 2185 2186 /* Allow the MAC to stop its clock if the PHY has the capability */ 2187 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2188 2189 if (pl->mac_supports_eee_ops) { 2190 /* Explicitly configure whether the PHY is allowed to stop it's 2191 * receive clock. 2192 */ 2193 ret = phy_eee_rx_clock_stop(phy, 2194 pl->config->eee_rx_clk_stop_enable); 2195 if (ret == -EOPNOTSUPP) 2196 ret = 0; 2197 } 2198 2199 if (ret == 0 && phy_interrupt_is_valid(phy)) 2200 phy_request_interrupt(phy); 2201 2202 return ret; 2203 } 2204 2205 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2206 phy_interface_t interface) 2207 { 2208 u32 flags = 0; 2209 2210 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2211 return -EINVAL; 2212 2213 if (pl->phydev) 2214 return -EBUSY; 2215 2216 if (pl->config->mac_requires_rxc) 2217 flags |= PHY_F_RXC_ALWAYS_ON; 2218 2219 return phy_attach_direct(pl->netdev, phy, flags, interface); 2220 } 2221 2222 /** 2223 * phylink_connect_phy() - connect a PHY to the phylink instance 2224 * @pl: a pointer to a &struct phylink returned from phylink_create() 2225 * @phy: a pointer to a &struct phy_device. 2226 * 2227 * Connect @phy to the phylink instance specified by @pl by calling 2228 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2229 * capabilities, start the PHYLIB state machine and enable any interrupts 2230 * that the PHY supports. 2231 * 2232 * This updates the phylink's ethtool supported and advertising link mode 2233 * masks. 2234 * 2235 * Returns 0 on success or a negative errno. 2236 */ 2237 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2238 { 2239 int ret; 2240 2241 /* Use PHY device/driver interface */ 2242 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2243 pl->link_interface = phy->interface; 2244 pl->link_config.interface = pl->link_interface; 2245 } 2246 2247 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2248 if (ret < 0) 2249 return ret; 2250 2251 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2252 if (ret) 2253 phy_detach(phy); 2254 2255 return ret; 2256 } 2257 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2258 2259 /** 2260 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2261 * @pl: a pointer to a &struct phylink returned from phylink_create() 2262 * @dn: a pointer to a &struct device_node. 2263 * @flags: PHY-specific flags to communicate to the PHY device driver 2264 * 2265 * Connect the phy specified in the device node @dn to the phylink instance 2266 * specified by @pl. Actions specified in phylink_connect_phy() will be 2267 * performed. 2268 * 2269 * Returns 0 on success or a negative errno. 2270 */ 2271 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2272 u32 flags) 2273 { 2274 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2275 } 2276 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2277 2278 /** 2279 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2280 * @pl: a pointer to a &struct phylink returned from phylink_create() 2281 * @fwnode: a pointer to a &struct fwnode_handle. 2282 * @flags: PHY-specific flags to communicate to the PHY device driver 2283 * 2284 * Connect the phy specified @fwnode to the phylink instance specified 2285 * by @pl. 2286 * 2287 * Returns 0 on success or a negative errno. 2288 */ 2289 int phylink_fwnode_phy_connect(struct phylink *pl, 2290 const struct fwnode_handle *fwnode, 2291 u32 flags) 2292 { 2293 struct fwnode_handle *phy_fwnode; 2294 struct phy_device *phy_dev; 2295 int ret; 2296 2297 if (!phylink_expects_phy(pl)) 2298 return 0; 2299 2300 phy_fwnode = fwnode_get_phy_node(fwnode); 2301 if (IS_ERR(phy_fwnode)) { 2302 /* PHY mode requires a PHY to be specified. */ 2303 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2304 return -ENODEV; 2305 return 0; 2306 } 2307 2308 phy_dev = fwnode_phy_find_device(phy_fwnode); 2309 /* We're done with the phy_node handle */ 2310 fwnode_handle_put(phy_fwnode); 2311 if (!phy_dev) 2312 return -ENODEV; 2313 2314 /* Use PHY device/driver interface */ 2315 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2316 pl->link_interface = phy_dev->interface; 2317 pl->link_config.interface = pl->link_interface; 2318 } 2319 2320 if (pl->config->mac_requires_rxc) 2321 flags |= PHY_F_RXC_ALWAYS_ON; 2322 2323 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2324 pl->link_interface); 2325 phy_device_free(phy_dev); 2326 if (ret) 2327 return ret; 2328 2329 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2330 if (ret) 2331 phy_detach(phy_dev); 2332 2333 return ret; 2334 } 2335 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2336 2337 /** 2338 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2339 * instance. 2340 * @pl: a pointer to a &struct phylink returned from phylink_create() 2341 * 2342 * Disconnect any current PHY from the phylink instance described by @pl. 2343 */ 2344 void phylink_disconnect_phy(struct phylink *pl) 2345 { 2346 struct phy_device *phy; 2347 2348 ASSERT_RTNL(); 2349 2350 mutex_lock(&pl->phydev_mutex); 2351 phy = pl->phydev; 2352 if (phy) { 2353 mutex_lock(&phy->lock); 2354 mutex_lock(&pl->state_mutex); 2355 pl->phydev = NULL; 2356 pl->phy_enable_tx_lpi = false; 2357 pl->mac_tx_clk_stop = false; 2358 mutex_unlock(&pl->state_mutex); 2359 mutex_unlock(&phy->lock); 2360 } 2361 mutex_unlock(&pl->phydev_mutex); 2362 2363 if (phy) { 2364 flush_work(&pl->resolve); 2365 phy_disconnect(phy); 2366 } 2367 } 2368 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2369 2370 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2371 { 2372 if (!up) 2373 pl->link_failed = true; 2374 phylink_run_resolve(pl); 2375 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2376 } 2377 2378 /** 2379 * phylink_mac_change() - notify phylink of a change in MAC state 2380 * @pl: a pointer to a &struct phylink returned from phylink_create() 2381 * @up: indicates whether the link is currently up. 2382 * 2383 * The MAC driver should call this driver when the state of its link 2384 * changes (eg, link failure, new negotiation results, etc.) 2385 */ 2386 void phylink_mac_change(struct phylink *pl, bool up) 2387 { 2388 phylink_link_changed(pl, up, "mac"); 2389 } 2390 EXPORT_SYMBOL_GPL(phylink_mac_change); 2391 2392 /** 2393 * phylink_pcs_change() - notify phylink of a change to PCS link state 2394 * @pcs: pointer to &struct phylink_pcs 2395 * @up: indicates whether the link is currently up. 2396 * 2397 * The PCS driver should call this when the state of its link changes 2398 * (e.g. link failure, new negotiation results, etc.) Note: it should 2399 * not determine "up" by reading the BMSR. If in doubt about the link 2400 * state at interrupt time, then pass true if pcs_get_state() returns 2401 * the latched link-down state, otherwise pass false. 2402 */ 2403 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2404 { 2405 struct phylink *pl = pcs->phylink; 2406 2407 if (pl) 2408 phylink_link_changed(pl, up, "pcs"); 2409 } 2410 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2411 2412 static irqreturn_t phylink_link_handler(int irq, void *data) 2413 { 2414 struct phylink *pl = data; 2415 2416 phylink_run_resolve(pl); 2417 2418 return IRQ_HANDLED; 2419 } 2420 2421 /** 2422 * phylink_start() - start a phylink instance 2423 * @pl: a pointer to a &struct phylink returned from phylink_create() 2424 * 2425 * Start the phylink instance specified by @pl, configuring the MAC for the 2426 * desired link mode(s) and negotiation style. This should be called from the 2427 * network device driver's &struct net_device_ops ndo_open() method. 2428 */ 2429 void phylink_start(struct phylink *pl) 2430 { 2431 bool poll = false; 2432 2433 ASSERT_RTNL(); 2434 2435 phylink_info(pl, "configuring for %s/%s link mode\n", 2436 phylink_an_mode_str(pl->req_link_an_mode), 2437 phy_modes(pl->link_config.interface)); 2438 2439 /* Always set the carrier off */ 2440 if (pl->netdev) 2441 netif_carrier_off(pl->netdev); 2442 2443 pl->pcs_state = PCS_STATE_STARTING; 2444 2445 /* Apply the link configuration to the MAC when starting. This allows 2446 * a fixed-link to start with the correct parameters, and also 2447 * ensures that we set the appropriate advertisement for Serdes links. 2448 * 2449 * Restart autonegotiation if using 802.3z to ensure that the link 2450 * parameters are properly negotiated. This is necessary for DSA 2451 * switches using 802.3z negotiation to ensure they see our modes. 2452 */ 2453 phylink_mac_initial_config(pl, true); 2454 2455 pl->pcs_state = PCS_STATE_STARTED; 2456 2457 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2458 2459 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2460 int irq = gpiod_to_irq(pl->link_gpio); 2461 2462 if (irq > 0) { 2463 if (!request_irq(irq, phylink_link_handler, 2464 IRQF_TRIGGER_RISING | 2465 IRQF_TRIGGER_FALLING, 2466 "netdev link", pl)) 2467 pl->link_irq = irq; 2468 else 2469 irq = 0; 2470 } 2471 if (irq <= 0) 2472 poll = true; 2473 } 2474 2475 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2476 poll |= pl->config->poll_fixed_state; 2477 2478 if (poll) 2479 mod_timer(&pl->link_poll, jiffies + HZ); 2480 if (pl->phydev) 2481 phy_start(pl->phydev); 2482 if (pl->sfp_bus) 2483 sfp_upstream_start(pl->sfp_bus); 2484 } 2485 EXPORT_SYMBOL_GPL(phylink_start); 2486 2487 /** 2488 * phylink_stop() - stop a phylink instance 2489 * @pl: a pointer to a &struct phylink returned from phylink_create() 2490 * 2491 * Stop the phylink instance specified by @pl. This should be called from the 2492 * network device driver's &struct net_device_ops ndo_stop() method. The 2493 * network device's carrier state should not be changed prior to calling this 2494 * function. 2495 * 2496 * This will synchronously bring down the link if the link is not already 2497 * down (in other words, it will trigger a mac_link_down() method call.) 2498 */ 2499 void phylink_stop(struct phylink *pl) 2500 { 2501 ASSERT_RTNL(); 2502 2503 if (pl->sfp_bus) 2504 sfp_upstream_stop(pl->sfp_bus); 2505 if (pl->phydev) 2506 phy_stop(pl->phydev); 2507 timer_delete_sync(&pl->link_poll); 2508 if (pl->link_irq) { 2509 free_irq(pl->link_irq, pl); 2510 pl->link_irq = 0; 2511 } 2512 2513 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2514 2515 pl->pcs_state = PCS_STATE_DOWN; 2516 2517 phylink_pcs_disable(pl->pcs); 2518 } 2519 EXPORT_SYMBOL_GPL(phylink_stop); 2520 2521 /** 2522 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2523 * @pl: a pointer to a &struct phylink returned from phylink_create() 2524 * 2525 * Disable the PHY's ability to stop the receive clock while the receive path 2526 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2527 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2528 */ 2529 void phylink_rx_clk_stop_block(struct phylink *pl) 2530 { 2531 ASSERT_RTNL(); 2532 2533 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2534 phylink_warn(pl, "%s called too many times - ignoring\n", 2535 __func__); 2536 dump_stack(); 2537 return; 2538 } 2539 2540 /* Disable PHY receive clock stop if this is the first time this 2541 * function has been called and clock-stop was previously enabled. 2542 */ 2543 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2544 pl->mac_supports_eee_ops && pl->phydev && 2545 pl->config->eee_rx_clk_stop_enable) 2546 phy_eee_rx_clock_stop(pl->phydev, false); 2547 } 2548 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2549 2550 /** 2551 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2552 * @pl: a pointer to a &struct phylink returned from phylink_create() 2553 * 2554 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2555 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2556 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2557 */ 2558 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2559 { 2560 ASSERT_RTNL(); 2561 2562 if (pl->mac_rx_clk_stop_blocked == 0) { 2563 phylink_warn(pl, "%s called too many times - ignoring\n", 2564 __func__); 2565 dump_stack(); 2566 return; 2567 } 2568 2569 /* Re-enable PHY receive clock stop if the number of unblocks matches 2570 * the number of calls to the block function above. 2571 */ 2572 if (--pl->mac_rx_clk_stop_blocked == 0 && 2573 pl->mac_supports_eee_ops && pl->phydev && 2574 pl->config->eee_rx_clk_stop_enable) 2575 phy_eee_rx_clock_stop(pl->phydev, true); 2576 } 2577 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2578 2579 static bool phylink_mac_supports_wol(struct phylink *pl) 2580 { 2581 return !!pl->mac_ops->mac_wol_set; 2582 } 2583 2584 static bool phylink_phy_supports_wol(struct phylink *pl, 2585 struct phy_device *phydev) 2586 { 2587 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2588 } 2589 2590 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2591 { 2592 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2593 pl->phydev && phy_may_wakeup(pl->phydev); 2594 } 2595 2596 /** 2597 * phylink_suspend() - handle a network device suspend event 2598 * @pl: a pointer to a &struct phylink returned from phylink_create() 2599 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2600 * 2601 * Handle a network device suspend event. There are several cases: 2602 * 2603 * - If Wake-on-Lan is not active, we can bring down the link between 2604 * the MAC and PHY by calling phylink_stop(). 2605 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2606 * can also bring down the link between the MAC and PHY. 2607 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2608 * still needs to receive packets, so we can not bring the link down. 2609 * 2610 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2611 * (struct phylink_mac_ops.mac_set_wol populated.) 2612 */ 2613 void phylink_suspend(struct phylink *pl, bool mac_wol) 2614 { 2615 ASSERT_RTNL(); 2616 2617 if (phylink_mac_supports_wol(pl)) 2618 mac_wol = !!pl->wolopts_mac; 2619 2620 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2621 /* Wake-on-Lan enabled, MAC handling */ 2622 mutex_lock(&pl->state_mutex); 2623 2624 /* Stop the resolver bringing the link up */ 2625 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2626 2627 pl->suspend_link_up = phylink_link_is_up(pl); 2628 if (pl->suspend_link_up) { 2629 /* Disable the carrier, to prevent transmit timeouts, 2630 * but one would hope all packets have been sent. This 2631 * also means phylink_resolve() will do nothing. 2632 */ 2633 if (pl->netdev) 2634 netif_carrier_off(pl->netdev); 2635 pl->old_link_state = false; 2636 } 2637 2638 /* We do not call mac_link_down() here as we want the 2639 * link to remain up to receive the WoL packets. 2640 */ 2641 mutex_unlock(&pl->state_mutex); 2642 } else { 2643 phylink_stop(pl); 2644 } 2645 2646 if (phylink_phy_pm_speed_ctrl(pl)) 2647 phylink_speed_down(pl, false); 2648 } 2649 EXPORT_SYMBOL_GPL(phylink_suspend); 2650 2651 /** 2652 * phylink_prepare_resume() - prepare to resume a network device 2653 * @pl: a pointer to a &struct phylink returned from phylink_create() 2654 * 2655 * Optional, but if called must be called prior to phylink_resume(). 2656 * 2657 * Prepare to resume a network device, preparing the PHY as necessary. 2658 */ 2659 void phylink_prepare_resume(struct phylink *pl) 2660 { 2661 struct phy_device *phydev = pl->phydev; 2662 2663 ASSERT_RTNL(); 2664 2665 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2666 * when PDOWN is set. However, some MACs require RXC to be running 2667 * in order to resume. If the MAC requires RXC, and we have a PHY, 2668 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2669 * the clock meets requirements. We do not implement this delay. 2670 */ 2671 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2672 phy_resume(phydev); 2673 } 2674 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2675 2676 /** 2677 * phylink_resume() - handle a network device resume event 2678 * @pl: a pointer to a &struct phylink returned from phylink_create() 2679 * 2680 * Undo the effects of phylink_suspend(), returning the link to an 2681 * operational state. 2682 */ 2683 void phylink_resume(struct phylink *pl) 2684 { 2685 ASSERT_RTNL(); 2686 2687 if (phylink_phy_pm_speed_ctrl(pl)) 2688 phylink_speed_up(pl); 2689 2690 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2691 /* Wake-on-Lan enabled, MAC handling */ 2692 2693 if (pl->suspend_link_up) { 2694 /* Call mac_link_down() so we keep the overall state 2695 * balanced. Do this under the state_mutex lock for 2696 * consistency. This will cause a "Link Down" message 2697 * to be printed during resume, which is harmless - 2698 * the true link state will be printed when we run a 2699 * resolve. 2700 */ 2701 mutex_lock(&pl->state_mutex); 2702 phylink_link_down(pl); 2703 mutex_unlock(&pl->state_mutex); 2704 } 2705 2706 /* Re-apply the link parameters so that all the settings get 2707 * restored to the MAC. 2708 */ 2709 phylink_mac_initial_config(pl, true); 2710 2711 /* Re-enable and re-resolve the link parameters */ 2712 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2713 } else { 2714 phylink_start(pl); 2715 } 2716 } 2717 EXPORT_SYMBOL_GPL(phylink_resume); 2718 2719 /** 2720 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2721 * @pl: a pointer to a &struct phylink returned from phylink_create() 2722 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2723 * 2724 * Read the wake on lan parameters from the PHY attached to the phylink 2725 * instance specified by @pl. If no PHY is currently attached, report no 2726 * support for wake on lan. 2727 */ 2728 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2729 { 2730 ASSERT_RTNL(); 2731 2732 wol->supported = 0; 2733 wol->wolopts = 0; 2734 2735 if (phylink_mac_supports_wol(pl)) { 2736 if (phylink_phy_supports_wol(pl, pl->phydev)) 2737 phy_ethtool_get_wol(pl->phydev, wol); 2738 2739 /* Where the MAC augments the WoL support, merge its support and 2740 * current configuration. 2741 */ 2742 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2743 memcpy(wol->sopass, pl->wol_sopass, 2744 sizeof(wol->sopass)); 2745 2746 wol->supported |= pl->config->wol_mac_support; 2747 wol->wolopts |= pl->wolopts_mac; 2748 } else { 2749 /* Legacy */ 2750 if (pl->phydev) 2751 phy_ethtool_get_wol(pl->phydev, wol); 2752 } 2753 } 2754 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2755 2756 /** 2757 * phylink_ethtool_set_wol() - set wake on lan parameters 2758 * @pl: a pointer to a &struct phylink returned from phylink_create() 2759 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2760 * 2761 * Set the wake on lan parameters for the PHY attached to the phylink 2762 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2763 * error. 2764 * 2765 * Returns zero on success or negative errno code. 2766 */ 2767 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2768 { 2769 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2770 int ret = -EOPNOTSUPP; 2771 bool changed; 2772 u32 wolopts; 2773 2774 ASSERT_RTNL(); 2775 2776 if (phylink_mac_supports_wol(pl)) { 2777 wolopts = wol->wolopts; 2778 2779 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2780 ret = phy_ethtool_set_wol(pl->phydev, wol); 2781 if (ret != 0 && ret != -EOPNOTSUPP) 2782 return ret; 2783 2784 phy_ethtool_get_wol(pl->phydev, &w); 2785 2786 /* Any Wake-on-Lan modes which the PHY is handling 2787 * should not be passed on to the MAC. 2788 */ 2789 wolopts &= ~w.wolopts; 2790 } 2791 2792 wolopts &= pl->config->wol_mac_support; 2793 changed = pl->wolopts_mac != wolopts; 2794 if (wolopts & WAKE_MAGICSECURE) 2795 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2796 sizeof(wol->sopass)); 2797 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2798 2799 if (changed) { 2800 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2801 wol->sopass); 2802 if (!ret) 2803 pl->wolopts_mac = wolopts; 2804 } else { 2805 ret = 0; 2806 } 2807 } else { 2808 if (pl->phydev) 2809 ret = phy_ethtool_set_wol(pl->phydev, wol); 2810 } 2811 2812 return ret; 2813 } 2814 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2815 2816 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2817 const unsigned long *link_modes) 2818 { 2819 phy_interface_t interface; 2820 2821 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2822 if (interface == PHY_INTERFACE_MODE_NA) { 2823 phylink_err(pl, 2824 "selection of interface failed, advertisement %*pb\n", 2825 __ETHTOOL_LINK_MODE_MASK_NBITS, 2826 link_modes); 2827 return interface; 2828 } 2829 2830 if (!test_bit(interface, pl->config->supported_interfaces)) { 2831 phylink_err(pl, 2832 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2833 phy_modes(interface), interface, 2834 (int)PHY_INTERFACE_MODE_MAX, 2835 pl->config->supported_interfaces); 2836 return PHY_INTERFACE_MODE_NA; 2837 } 2838 2839 return interface; 2840 } 2841 2842 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2843 u32 speed) 2844 { 2845 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2846 phy_interface_t interface; 2847 u32 max_speed; 2848 int i; 2849 2850 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2851 interface = phylink_sfp_interface_preference[i]; 2852 if (!test_bit(interface, pl->sfp_interfaces)) 2853 continue; 2854 2855 max_speed = phylink_interface_max_speed(interface); 2856 2857 /* The logic here is: if speed == max_speed, then we've found 2858 * the best interface. Otherwise we find the interface that 2859 * can just support the requested speed. 2860 */ 2861 if (max_speed >= speed) 2862 best_interface = interface; 2863 2864 if (max_speed <= speed) 2865 break; 2866 } 2867 2868 if (best_interface == PHY_INTERFACE_MODE_NA) 2869 phylink_err(pl, "selection of interface failed, speed %u\n", 2870 speed); 2871 2872 return best_interface; 2873 } 2874 2875 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2876 { 2877 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2878 2879 linkmode_zero(mask); 2880 phylink_set_port_modes(mask); 2881 2882 linkmode_and(dst, dst, mask); 2883 linkmode_or(dst, dst, b); 2884 } 2885 2886 static void phylink_get_ksettings(const struct phylink_link_state *state, 2887 struct ethtool_link_ksettings *kset) 2888 { 2889 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2890 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2891 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2892 kset->base.speed = state->speed; 2893 kset->base.duplex = state->duplex; 2894 } 2895 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2896 state->advertising) ? 2897 AUTONEG_ENABLE : AUTONEG_DISABLE; 2898 } 2899 2900 /** 2901 * phylink_ethtool_ksettings_get() - get the current link settings 2902 * @pl: a pointer to a &struct phylink returned from phylink_create() 2903 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2904 * 2905 * Read the current link settings for the phylink instance specified by @pl. 2906 * This will be the link settings read from the MAC, PHY or fixed link 2907 * settings depending on the current negotiation mode. 2908 */ 2909 int phylink_ethtool_ksettings_get(struct phylink *pl, 2910 struct ethtool_link_ksettings *kset) 2911 { 2912 struct phylink_link_state link_state; 2913 2914 ASSERT_RTNL(); 2915 2916 if (pl->phydev) 2917 phy_ethtool_ksettings_get(pl->phydev, kset); 2918 else 2919 kset->base.port = pl->link_port; 2920 2921 linkmode_copy(kset->link_modes.supported, pl->supported); 2922 2923 switch (pl->act_link_an_mode) { 2924 case MLO_AN_FIXED: 2925 /* We are using fixed settings. Report these as the 2926 * current link settings - and note that these also 2927 * represent the supported speeds/duplex/pause modes. 2928 */ 2929 phylink_get_fixed_state(pl, &link_state); 2930 phylink_get_ksettings(&link_state, kset); 2931 break; 2932 2933 case MLO_AN_INBAND: 2934 /* If there is a phy attached, then use the reported 2935 * settings from the phy with no modification. 2936 */ 2937 if (pl->phydev) 2938 break; 2939 2940 phylink_mac_pcs_get_state(pl, &link_state); 2941 2942 /* The MAC is reporting the link results from its own PCS 2943 * layer via in-band status. Report these as the current 2944 * link settings. 2945 */ 2946 phylink_get_ksettings(&link_state, kset); 2947 break; 2948 } 2949 2950 return 0; 2951 } 2952 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2953 2954 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2955 phy_interface_t interface, 2956 unsigned long *adv) 2957 { 2958 unsigned int inband = phylink_inband_caps(pl, interface); 2959 unsigned int mask; 2960 2961 /* If the PCS doesn't implement inband support, be permissive. */ 2962 if (!inband) 2963 return true; 2964 2965 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2966 mask = LINK_INBAND_ENABLE; 2967 else 2968 mask = LINK_INBAND_DISABLE; 2969 2970 /* Check whether the PCS implements the required mode */ 2971 return !!(inband & mask); 2972 } 2973 2974 /** 2975 * phylink_ethtool_ksettings_set() - set the link settings 2976 * @pl: a pointer to a &struct phylink returned from phylink_create() 2977 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2978 */ 2979 int phylink_ethtool_ksettings_set(struct phylink *pl, 2980 const struct ethtool_link_ksettings *kset) 2981 { 2982 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2983 const struct link_capabilities *c; 2984 struct phylink_link_state config; 2985 2986 ASSERT_RTNL(); 2987 2988 if (pl->phydev) { 2989 struct ethtool_link_ksettings phy_kset = *kset; 2990 2991 linkmode_and(phy_kset.link_modes.advertising, 2992 phy_kset.link_modes.advertising, 2993 pl->supported); 2994 2995 /* We can rely on phylib for this update; we also do not need 2996 * to update the pl->link_config settings: 2997 * - the configuration returned via ksettings_get() will come 2998 * from phylib whenever a PHY is present. 2999 * - link_config.interface will be updated by the PHY calling 3000 * back via phylink_phy_change() and a subsequent resolve. 3001 * - initial link configuration for PHY mode comes from the 3002 * last phy state updated via phylink_phy_change(). 3003 * - other configuration changes (e.g. pause modes) are 3004 * performed directly via phylib. 3005 * - if in in-band mode with a PHY, the link configuration 3006 * is passed on the link from the PHY, and all of 3007 * link_config.{speed,duplex,an_enabled,pause} are not used. 3008 * - the only possible use would be link_config.advertising 3009 * pause modes when in 1000base-X mode with a PHY, but in 3010 * the presence of a PHY, this should not be changed as that 3011 * should be determined from the media side advertisement. 3012 */ 3013 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3014 } 3015 3016 config = pl->link_config; 3017 /* Mask out unsupported advertisements */ 3018 linkmode_and(config.advertising, kset->link_modes.advertising, 3019 pl->supported); 3020 3021 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3022 switch (kset->base.autoneg) { 3023 case AUTONEG_DISABLE: 3024 /* Autonegotiation disabled, select a suitable speed and 3025 * duplex. 3026 */ 3027 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3028 pl->supported, false); 3029 if (!c) 3030 return -EINVAL; 3031 3032 /* If we have a fixed link, refuse to change link parameters. 3033 * If the link parameters match, accept them but do nothing. 3034 */ 3035 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3036 if (c->speed != pl->link_config.speed || 3037 c->duplex != pl->link_config.duplex) 3038 return -EINVAL; 3039 return 0; 3040 } 3041 3042 config.speed = c->speed; 3043 config.duplex = c->duplex; 3044 break; 3045 3046 case AUTONEG_ENABLE: 3047 /* If we have a fixed link, allow autonegotiation (since that 3048 * is our default case) but do not allow the advertisement to 3049 * be changed. If the advertisement matches, simply return. 3050 */ 3051 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3052 if (!linkmode_equal(config.advertising, 3053 pl->link_config.advertising)) 3054 return -EINVAL; 3055 return 0; 3056 } 3057 3058 config.speed = SPEED_UNKNOWN; 3059 config.duplex = DUPLEX_UNKNOWN; 3060 break; 3061 3062 default: 3063 return -EINVAL; 3064 } 3065 3066 /* We have ruled out the case with a PHY attached, and the 3067 * fixed-link cases. All that is left are in-band links. 3068 */ 3069 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3070 kset->base.autoneg == AUTONEG_ENABLE); 3071 3072 /* If this link is with an SFP, ensure that changes to advertised modes 3073 * also cause the associated interface to be selected such that the 3074 * link can be configured correctly. 3075 */ 3076 if (pl->sfp_bus) { 3077 if (kset->base.autoneg == AUTONEG_ENABLE) 3078 config.interface = 3079 phylink_sfp_select_interface(pl, 3080 config.advertising); 3081 else 3082 config.interface = 3083 phylink_sfp_select_interface_speed(pl, 3084 config.speed); 3085 if (config.interface == PHY_INTERFACE_MODE_NA) 3086 return -EINVAL; 3087 3088 /* Revalidate with the selected interface */ 3089 linkmode_copy(support, pl->supported); 3090 if (phylink_validate(pl, support, &config)) { 3091 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3092 phylink_an_mode_str(pl->req_link_an_mode), 3093 phy_modes(config.interface), 3094 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3095 return -EINVAL; 3096 } 3097 } else { 3098 /* Validate without changing the current supported mask. */ 3099 linkmode_copy(support, pl->supported); 3100 if (phylink_validate(pl, support, &config)) 3101 return -EINVAL; 3102 } 3103 3104 /* If autonegotiation is enabled, we must have an advertisement */ 3105 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3106 config.advertising) && 3107 phylink_is_empty_linkmode(config.advertising)) 3108 return -EINVAL; 3109 3110 /* Validate the autonegotiation state. We don't have a PHY in this 3111 * situation, so the PCS is the media-facing entity. 3112 */ 3113 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3114 config.advertising)) 3115 return -EINVAL; 3116 3117 mutex_lock(&pl->state_mutex); 3118 pl->link_config.speed = config.speed; 3119 pl->link_config.duplex = config.duplex; 3120 3121 if (pl->link_config.interface != config.interface) { 3122 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3123 /* We need to force the link down, then change the interface */ 3124 if (pl->old_link_state) { 3125 phylink_link_down(pl); 3126 pl->old_link_state = false; 3127 } 3128 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3129 &pl->phylink_disable_state)) 3130 phylink_major_config(pl, false, &config); 3131 pl->link_config.interface = config.interface; 3132 linkmode_copy(pl->link_config.advertising, config.advertising); 3133 } else if (!linkmode_equal(pl->link_config.advertising, 3134 config.advertising)) { 3135 linkmode_copy(pl->link_config.advertising, config.advertising); 3136 phylink_change_inband_advert(pl); 3137 } 3138 mutex_unlock(&pl->state_mutex); 3139 3140 return 0; 3141 } 3142 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3143 3144 /** 3145 * phylink_ethtool_nway_reset() - restart negotiation 3146 * @pl: a pointer to a &struct phylink returned from phylink_create() 3147 * 3148 * Restart negotiation for the phylink instance specified by @pl. This will 3149 * cause any attached phy to restart negotiation with the link partner, and 3150 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3151 * negotiation. 3152 * 3153 * Returns zero on success, or negative error code. 3154 */ 3155 int phylink_ethtool_nway_reset(struct phylink *pl) 3156 { 3157 int ret = 0; 3158 3159 ASSERT_RTNL(); 3160 3161 if (pl->phydev) 3162 ret = phy_restart_aneg(pl->phydev); 3163 phylink_pcs_an_restart(pl); 3164 3165 return ret; 3166 } 3167 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3168 3169 /** 3170 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3171 * @pl: a pointer to a &struct phylink returned from phylink_create() 3172 * @pause: a pointer to a &struct ethtool_pauseparam 3173 */ 3174 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3175 struct ethtool_pauseparam *pause) 3176 { 3177 ASSERT_RTNL(); 3178 3179 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3180 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3181 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3182 } 3183 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3184 3185 /** 3186 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3187 * @pl: a pointer to a &struct phylink returned from phylink_create() 3188 * @pause: a pointer to a &struct ethtool_pauseparam 3189 */ 3190 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3191 struct ethtool_pauseparam *pause) 3192 { 3193 struct phylink_link_state *config = &pl->link_config; 3194 bool manual_changed; 3195 int pause_state; 3196 3197 ASSERT_RTNL(); 3198 3199 if (pl->req_link_an_mode == MLO_AN_FIXED) 3200 return -EOPNOTSUPP; 3201 3202 if (!phylink_test(pl->supported, Pause) && 3203 !phylink_test(pl->supported, Asym_Pause)) 3204 return -EOPNOTSUPP; 3205 3206 if (!phylink_test(pl->supported, Asym_Pause) && 3207 pause->rx_pause != pause->tx_pause) 3208 return -EINVAL; 3209 3210 pause_state = 0; 3211 if (pause->autoneg) 3212 pause_state |= MLO_PAUSE_AN; 3213 if (pause->rx_pause) 3214 pause_state |= MLO_PAUSE_RX; 3215 if (pause->tx_pause) 3216 pause_state |= MLO_PAUSE_TX; 3217 3218 mutex_lock(&pl->state_mutex); 3219 /* 3220 * See the comments for linkmode_set_pause(), wrt the deficiencies 3221 * with the current implementation. A solution to this issue would 3222 * be: 3223 * ethtool Local device 3224 * rx tx Pause AsymDir 3225 * 0 0 0 0 3226 * 1 0 1 1 3227 * 0 1 0 1 3228 * 1 1 1 1 3229 * and then use the ethtool rx/tx enablement status to mask the 3230 * rx/tx pause resolution. 3231 */ 3232 linkmode_set_pause(config->advertising, pause->tx_pause, 3233 pause->rx_pause); 3234 3235 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3236 (!(pause_state & MLO_PAUSE_AN) && 3237 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3238 3239 config->pause = pause_state; 3240 3241 /* Update our in-band advertisement, triggering a renegotiation if 3242 * the advertisement changed. 3243 */ 3244 if (!pl->phydev) 3245 phylink_change_inband_advert(pl); 3246 3247 mutex_unlock(&pl->state_mutex); 3248 3249 /* If we have a PHY, a change of the pause frame advertisement will 3250 * cause phylib to renegotiate (if AN is enabled) which will in turn 3251 * call our phylink_phy_change() and trigger a resolve. Note that 3252 * we can't hold our state mutex while calling phy_set_asym_pause(). 3253 */ 3254 if (pl->phydev) 3255 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3256 pause->tx_pause); 3257 3258 /* If the manual pause settings changed, make sure we trigger a 3259 * resolve to update their state; we can not guarantee that the 3260 * link will cycle. 3261 */ 3262 if (manual_changed) { 3263 pl->link_failed = true; 3264 phylink_run_resolve(pl); 3265 } 3266 3267 return 0; 3268 } 3269 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3270 3271 /** 3272 * phylink_get_eee_err() - read the energy efficient ethernet error 3273 * counter 3274 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3275 * 3276 * Read the Energy Efficient Ethernet error counter from the PHY associated 3277 * with the phylink instance specified by @pl. 3278 * 3279 * Returns positive error counter value, or negative error code. 3280 */ 3281 int phylink_get_eee_err(struct phylink *pl) 3282 { 3283 int ret = 0; 3284 3285 ASSERT_RTNL(); 3286 3287 if (pl->phydev) 3288 ret = phy_get_eee_err(pl->phydev); 3289 3290 return ret; 3291 } 3292 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3293 3294 /** 3295 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3296 * @pl: a pointer to a &struct phylink returned from phylink_create() 3297 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3298 */ 3299 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3300 { 3301 int ret = -EOPNOTSUPP; 3302 3303 ASSERT_RTNL(); 3304 3305 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3306 return ret; 3307 3308 if (pl->phydev) { 3309 ret = phy_ethtool_get_eee(pl->phydev, eee); 3310 /* Restrict supported linkmode mask */ 3311 if (ret == 0 && pl->mac_supports_eee_ops) 3312 linkmode_and(eee->supported, eee->supported, 3313 pl->supported_lpi); 3314 } 3315 3316 return ret; 3317 } 3318 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3319 3320 /** 3321 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3322 * @pl: a pointer to a &struct phylink returned from phylink_create() 3323 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3324 */ 3325 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3326 { 3327 bool mac_eee = pl->mac_supports_eee; 3328 int ret = -EOPNOTSUPP; 3329 3330 ASSERT_RTNL(); 3331 3332 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3333 mac_eee ? "supports" : "does not support", 3334 eee->eee_enabled ? ", enabled" : "", 3335 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3336 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3337 3338 if (pl->mac_supports_eee_ops && !mac_eee) 3339 return ret; 3340 3341 if (pl->phydev) { 3342 /* Restrict advertisement mask */ 3343 if (pl->mac_supports_eee_ops) 3344 linkmode_and(eee->advertised, eee->advertised, 3345 pl->supported_lpi); 3346 ret = phy_ethtool_set_eee(pl->phydev, eee); 3347 if (ret == 0) 3348 eee_to_eeecfg(&pl->eee_cfg, eee); 3349 } 3350 3351 return ret; 3352 } 3353 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3354 3355 /* This emulates MII registers for a fixed-mode phy operating as per the 3356 * passed in state. "aneg" defines if we report negotiation is possible. 3357 * 3358 * FIXME: should deal with negotiation state too. 3359 */ 3360 static int phylink_mii_emul_read(unsigned int reg, 3361 struct phylink_link_state *state) 3362 { 3363 struct fixed_phy_status fs; 3364 unsigned long *lpa = state->lp_advertising; 3365 int val; 3366 3367 fs.link = state->link; 3368 fs.speed = state->speed; 3369 fs.duplex = state->duplex; 3370 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3371 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3372 3373 val = swphy_read_reg(reg, &fs); 3374 if (reg == MII_BMSR) { 3375 if (!state->an_complete) 3376 val &= ~BMSR_ANEGCOMPLETE; 3377 } 3378 return val; 3379 } 3380 3381 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3382 unsigned int reg) 3383 { 3384 struct phy_device *phydev = pl->phydev; 3385 int prtad, devad; 3386 3387 if (mdio_phy_id_is_c45(phy_id)) { 3388 prtad = mdio_phy_id_prtad(phy_id); 3389 devad = mdio_phy_id_devad(phy_id); 3390 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3391 reg); 3392 } 3393 3394 if (phydev->is_c45) { 3395 switch (reg) { 3396 case MII_BMCR: 3397 case MII_BMSR: 3398 case MII_PHYSID1: 3399 case MII_PHYSID2: 3400 devad = __ffs(phydev->c45_ids.mmds_present); 3401 break; 3402 case MII_ADVERTISE: 3403 case MII_LPA: 3404 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3405 return -EINVAL; 3406 devad = MDIO_MMD_AN; 3407 if (reg == MII_ADVERTISE) 3408 reg = MDIO_AN_ADVERTISE; 3409 else 3410 reg = MDIO_AN_LPA; 3411 break; 3412 default: 3413 return -EINVAL; 3414 } 3415 prtad = phy_id; 3416 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3417 reg); 3418 } 3419 3420 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3421 } 3422 3423 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3424 unsigned int reg, unsigned int val) 3425 { 3426 struct phy_device *phydev = pl->phydev; 3427 int prtad, devad; 3428 3429 if (mdio_phy_id_is_c45(phy_id)) { 3430 prtad = mdio_phy_id_prtad(phy_id); 3431 devad = mdio_phy_id_devad(phy_id); 3432 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3433 reg, val); 3434 } 3435 3436 if (phydev->is_c45) { 3437 switch (reg) { 3438 case MII_BMCR: 3439 case MII_BMSR: 3440 case MII_PHYSID1: 3441 case MII_PHYSID2: 3442 devad = __ffs(phydev->c45_ids.mmds_present); 3443 break; 3444 case MII_ADVERTISE: 3445 case MII_LPA: 3446 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3447 return -EINVAL; 3448 devad = MDIO_MMD_AN; 3449 if (reg == MII_ADVERTISE) 3450 reg = MDIO_AN_ADVERTISE; 3451 else 3452 reg = MDIO_AN_LPA; 3453 break; 3454 default: 3455 return -EINVAL; 3456 } 3457 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3458 reg, val); 3459 } 3460 3461 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3462 } 3463 3464 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3465 unsigned int reg) 3466 { 3467 struct phylink_link_state state; 3468 int val = 0xffff; 3469 3470 switch (pl->act_link_an_mode) { 3471 case MLO_AN_FIXED: 3472 if (phy_id == 0) { 3473 phylink_get_fixed_state(pl, &state); 3474 val = phylink_mii_emul_read(reg, &state); 3475 } 3476 break; 3477 3478 case MLO_AN_PHY: 3479 return -EOPNOTSUPP; 3480 3481 case MLO_AN_INBAND: 3482 if (phy_id == 0) { 3483 phylink_mac_pcs_get_state(pl, &state); 3484 val = phylink_mii_emul_read(reg, &state); 3485 } 3486 break; 3487 } 3488 3489 return val & 0xffff; 3490 } 3491 3492 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3493 unsigned int reg, unsigned int val) 3494 { 3495 switch (pl->act_link_an_mode) { 3496 case MLO_AN_FIXED: 3497 break; 3498 3499 case MLO_AN_PHY: 3500 return -EOPNOTSUPP; 3501 3502 case MLO_AN_INBAND: 3503 break; 3504 } 3505 3506 return 0; 3507 } 3508 3509 /** 3510 * phylink_mii_ioctl() - generic mii ioctl interface 3511 * @pl: a pointer to a &struct phylink returned from phylink_create() 3512 * @ifr: a pointer to a &struct ifreq for socket ioctls 3513 * @cmd: ioctl cmd to execute 3514 * 3515 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3516 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3517 * 3518 * Returns: zero on success or negative error code. 3519 * 3520 * %SIOCGMIIPHY: 3521 * read register from the current PHY. 3522 * %SIOCGMIIREG: 3523 * read register from the specified PHY. 3524 * %SIOCSMIIREG: 3525 * set a register on the specified PHY. 3526 */ 3527 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3528 { 3529 struct mii_ioctl_data *mii = if_mii(ifr); 3530 int ret; 3531 3532 ASSERT_RTNL(); 3533 3534 if (pl->phydev) { 3535 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3536 switch (cmd) { 3537 case SIOCGMIIPHY: 3538 mii->phy_id = pl->phydev->mdio.addr; 3539 fallthrough; 3540 3541 case SIOCGMIIREG: 3542 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3543 if (ret >= 0) { 3544 mii->val_out = ret; 3545 ret = 0; 3546 } 3547 break; 3548 3549 case SIOCSMIIREG: 3550 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3551 mii->val_in); 3552 break; 3553 3554 default: 3555 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3556 break; 3557 } 3558 } else { 3559 switch (cmd) { 3560 case SIOCGMIIPHY: 3561 mii->phy_id = 0; 3562 fallthrough; 3563 3564 case SIOCGMIIREG: 3565 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3566 if (ret >= 0) { 3567 mii->val_out = ret; 3568 ret = 0; 3569 } 3570 break; 3571 3572 case SIOCSMIIREG: 3573 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3574 mii->val_in); 3575 break; 3576 3577 default: 3578 ret = -EOPNOTSUPP; 3579 break; 3580 } 3581 } 3582 3583 return ret; 3584 } 3585 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3586 3587 /** 3588 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3589 * link partners 3590 * @pl: a pointer to a &struct phylink returned from phylink_create() 3591 * @sync: perform action synchronously 3592 * 3593 * If we have a PHY that is not part of a SFP module, then set the speed 3594 * as described in the phy_speed_down() function. Please see this function 3595 * for a description of the @sync parameter. 3596 * 3597 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3598 */ 3599 int phylink_speed_down(struct phylink *pl, bool sync) 3600 { 3601 int ret = 0; 3602 3603 ASSERT_RTNL(); 3604 3605 if (!pl->sfp_bus && pl->phydev) 3606 ret = phy_speed_down(pl->phydev, sync); 3607 3608 return ret; 3609 } 3610 EXPORT_SYMBOL_GPL(phylink_speed_down); 3611 3612 /** 3613 * phylink_speed_up() - restore the advertised speeds prior to the call to 3614 * phylink_speed_down() 3615 * @pl: a pointer to a &struct phylink returned from phylink_create() 3616 * 3617 * If we have a PHY that is not part of a SFP module, then restore the 3618 * PHY speeds as per phy_speed_up(). 3619 * 3620 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3621 */ 3622 int phylink_speed_up(struct phylink *pl) 3623 { 3624 int ret = 0; 3625 3626 ASSERT_RTNL(); 3627 3628 if (!pl->sfp_bus && pl->phydev) 3629 ret = phy_speed_up(pl->phydev); 3630 3631 return ret; 3632 } 3633 EXPORT_SYMBOL_GPL(phylink_speed_up); 3634 3635 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3636 { 3637 struct phylink *pl = upstream; 3638 3639 pl->netdev->sfp_bus = bus; 3640 } 3641 3642 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3643 { 3644 struct phylink *pl = upstream; 3645 3646 pl->netdev->sfp_bus = NULL; 3647 } 3648 3649 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3650 const unsigned long *intf) 3651 { 3652 phy_interface_t interface; 3653 size_t i; 3654 3655 interface = PHY_INTERFACE_MODE_NA; 3656 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3657 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3658 interface = phylink_sfp_interface_preference[i]; 3659 break; 3660 } 3661 3662 return interface; 3663 } 3664 3665 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3666 struct phylink_link_state *state, 3667 bool changed) 3668 { 3669 u8 mode = MLO_AN_INBAND; 3670 3671 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3672 phylink_an_mode_str(mode), phy_modes(state->interface), 3673 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3674 3675 if (!linkmode_equal(pl->supported, supported)) { 3676 linkmode_copy(pl->supported, supported); 3677 changed = true; 3678 } 3679 3680 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3681 linkmode_copy(pl->link_config.advertising, state->advertising); 3682 changed = true; 3683 } 3684 3685 if (pl->req_link_an_mode != mode || 3686 pl->link_config.interface != state->interface) { 3687 pl->req_link_an_mode = mode; 3688 pl->link_config.interface = state->interface; 3689 3690 changed = true; 3691 3692 phylink_info(pl, "switched to %s/%s link mode\n", 3693 phylink_an_mode_str(mode), 3694 phy_modes(state->interface)); 3695 } 3696 3697 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3698 &pl->phylink_disable_state)) 3699 phylink_mac_initial_config(pl, false); 3700 } 3701 3702 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3703 { 3704 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3705 struct phylink_link_state config; 3706 int ret; 3707 3708 /* We're not using pl->sfp_interfaces, so clear it. */ 3709 phy_interface_zero(pl->sfp_interfaces); 3710 linkmode_copy(support, phy->supported); 3711 3712 memset(&config, 0, sizeof(config)); 3713 linkmode_copy(config.advertising, phy->advertising); 3714 config.interface = PHY_INTERFACE_MODE_NA; 3715 config.speed = SPEED_UNKNOWN; 3716 config.duplex = DUPLEX_UNKNOWN; 3717 config.pause = MLO_PAUSE_AN; 3718 3719 /* Ignore errors if we're expecting a PHY to attach later */ 3720 ret = phylink_validate(pl, support, &config); 3721 if (ret) { 3722 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3723 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3724 ERR_PTR(ret)); 3725 return ret; 3726 } 3727 3728 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3729 if (config.interface == PHY_INTERFACE_MODE_NA) 3730 return -EINVAL; 3731 3732 /* Attach the PHY so that the PHY is present when we do the major 3733 * configuration step. 3734 */ 3735 ret = phylink_attach_phy(pl, phy, config.interface); 3736 if (ret < 0) 3737 return ret; 3738 3739 /* This will validate the configuration for us. */ 3740 ret = phylink_bringup_phy(pl, phy, config.interface); 3741 if (ret < 0) { 3742 phy_detach(phy); 3743 return ret; 3744 } 3745 3746 pl->link_port = pl->sfp_port; 3747 3748 phylink_sfp_set_config(pl, support, &config, true); 3749 3750 return 0; 3751 } 3752 3753 static int phylink_sfp_config_optical(struct phylink *pl) 3754 { 3755 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3756 struct phylink_link_state config; 3757 enum inband_type inband_type; 3758 phy_interface_t interface; 3759 int ret; 3760 3761 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3762 (int)PHY_INTERFACE_MODE_MAX, 3763 pl->config->supported_interfaces, 3764 (int)PHY_INTERFACE_MODE_MAX, 3765 pl->sfp_interfaces); 3766 3767 /* Find the union of the supported interfaces by the PCS/MAC and 3768 * the SFP module. 3769 */ 3770 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3771 pl->sfp_interfaces); 3772 if (phy_interface_empty(pl->sfp_interfaces)) { 3773 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3774 return -EINVAL; 3775 } 3776 3777 memset(&config, 0, sizeof(config)); 3778 linkmode_copy(support, pl->sfp_support); 3779 linkmode_copy(config.advertising, pl->sfp_support); 3780 config.speed = SPEED_UNKNOWN; 3781 config.duplex = DUPLEX_UNKNOWN; 3782 config.pause = MLO_PAUSE_AN; 3783 3784 /* For all the interfaces that are supported, reduce the sfp_support 3785 * mask to only those link modes that can be supported. 3786 */ 3787 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3788 pl->sfp_interfaces); 3789 if (ret) { 3790 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3791 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3792 return ret; 3793 } 3794 3795 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3796 if (interface == PHY_INTERFACE_MODE_NA) { 3797 phylink_err(pl, "failed to select SFP interface\n"); 3798 return -EINVAL; 3799 } 3800 3801 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3802 phy_modes(interface)); 3803 3804 inband_type = phylink_get_inband_type(interface); 3805 if (inband_type == INBAND_NONE) { 3806 /* If this is the sole interface, and there is no inband 3807 * support, clear the advertising mask and Autoneg bit in 3808 * the support mask. Otherwise, just clear the Autoneg bit 3809 * in the advertising mask. 3810 */ 3811 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3812 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3813 pl->sfp_support); 3814 linkmode_zero(config.advertising); 3815 } else { 3816 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3817 config.advertising); 3818 } 3819 } 3820 3821 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3822 config.advertising)) { 3823 phylink_err(pl, "autoneg setting not compatible with PCS"); 3824 return -EINVAL; 3825 } 3826 3827 config.interface = interface; 3828 3829 /* Ignore errors if we're expecting a PHY to attach later */ 3830 ret = phylink_validate(pl, support, &config); 3831 if (ret) { 3832 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3833 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3834 ERR_PTR(ret)); 3835 return ret; 3836 } 3837 3838 pl->link_port = pl->sfp_port; 3839 3840 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3841 3842 return 0; 3843 } 3844 3845 static int phylink_sfp_module_insert(void *upstream, 3846 const struct sfp_eeprom_id *id) 3847 { 3848 const struct sfp_module_caps *caps; 3849 struct phylink *pl = upstream; 3850 3851 ASSERT_RTNL(); 3852 3853 caps = sfp_get_module_caps(pl->sfp_bus); 3854 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3855 linkmode_copy(pl->sfp_support, caps->link_modes); 3856 pl->sfp_may_have_phy = caps->may_have_phy; 3857 pl->sfp_port = caps->port; 3858 3859 /* If this module may have a PHY connecting later, defer until later */ 3860 if (pl->sfp_may_have_phy) 3861 return 0; 3862 3863 return phylink_sfp_config_optical(pl); 3864 } 3865 3866 static void phylink_sfp_module_remove(void *upstream) 3867 { 3868 struct phylink *pl = upstream; 3869 3870 phy_interface_zero(pl->sfp_interfaces); 3871 } 3872 3873 static int phylink_sfp_module_start(void *upstream) 3874 { 3875 struct phylink *pl = upstream; 3876 3877 /* If this SFP module has a PHY, start the PHY now. */ 3878 if (pl->phydev) { 3879 phy_start(pl->phydev); 3880 return 0; 3881 } 3882 3883 /* If the module may have a PHY but we didn't detect one we 3884 * need to configure the MAC here. 3885 */ 3886 if (!pl->sfp_may_have_phy) 3887 return 0; 3888 3889 return phylink_sfp_config_optical(pl); 3890 } 3891 3892 static void phylink_sfp_module_stop(void *upstream) 3893 { 3894 struct phylink *pl = upstream; 3895 3896 /* If this SFP module has a PHY, stop it. */ 3897 if (pl->phydev) 3898 phy_stop(pl->phydev); 3899 } 3900 3901 static void phylink_sfp_link_down(void *upstream) 3902 { 3903 struct phylink *pl = upstream; 3904 3905 ASSERT_RTNL(); 3906 3907 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3908 } 3909 3910 static void phylink_sfp_link_up(void *upstream) 3911 { 3912 struct phylink *pl = upstream; 3913 3914 ASSERT_RTNL(); 3915 3916 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3917 } 3918 3919 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3920 { 3921 struct phylink *pl = upstream; 3922 3923 if (!phy->drv) { 3924 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3925 phydev_name(phy), (unsigned long)phy->phy_id); 3926 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3927 return -EINVAL; 3928 } 3929 3930 /* 3931 * This is the new way of dealing with flow control for PHYs, 3932 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3933 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 3934 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 3935 * capabilities and must NOT change the phy's pause settings directly. 3936 */ 3937 phy_support_asym_pause(phy); 3938 3939 /* Set the PHY's host supported interfaces */ 3940 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3941 pl->config->supported_interfaces); 3942 3943 /* Do the initial configuration */ 3944 return phylink_sfp_config_phy(pl, phy); 3945 } 3946 3947 static void phylink_sfp_disconnect_phy(void *upstream, 3948 struct phy_device *phydev) 3949 { 3950 phylink_disconnect_phy(upstream); 3951 } 3952 3953 static const struct sfp_upstream_ops sfp_phylink_ops = { 3954 .attach = phylink_sfp_attach, 3955 .detach = phylink_sfp_detach, 3956 .module_insert = phylink_sfp_module_insert, 3957 .module_remove = phylink_sfp_module_remove, 3958 .module_start = phylink_sfp_module_start, 3959 .module_stop = phylink_sfp_module_stop, 3960 .link_up = phylink_sfp_link_up, 3961 .link_down = phylink_sfp_link_down, 3962 .connect_phy = phylink_sfp_connect_phy, 3963 .disconnect_phy = phylink_sfp_disconnect_phy, 3964 }; 3965 3966 /* Helpers for MAC drivers */ 3967 3968 static struct { 3969 int bit; 3970 int speed; 3971 } phylink_c73_priority_resolution[] = { 3972 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3973 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3974 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3975 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3976 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3977 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3978 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3979 /* 5GBASE-KR not supported */ 3980 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3981 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3982 }; 3983 3984 void phylink_resolve_c73(struct phylink_link_state *state) 3985 { 3986 int i; 3987 3988 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3989 int bit = phylink_c73_priority_resolution[i].bit; 3990 if (linkmode_test_bit(bit, state->advertising) && 3991 linkmode_test_bit(bit, state->lp_advertising)) 3992 break; 3993 } 3994 3995 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3996 state->speed = phylink_c73_priority_resolution[i].speed; 3997 state->duplex = DUPLEX_FULL; 3998 } else { 3999 /* negotiation failure */ 4000 state->link = false; 4001 } 4002 4003 phylink_resolve_an_pause(state); 4004 } 4005 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4006 4007 static void phylink_decode_c37_word(struct phylink_link_state *state, 4008 uint16_t config_reg, int speed) 4009 { 4010 int fd_bit; 4011 4012 if (speed == SPEED_2500) 4013 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4014 else 4015 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4016 4017 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4018 4019 if (linkmode_test_bit(fd_bit, state->advertising) && 4020 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4021 state->speed = speed; 4022 state->duplex = DUPLEX_FULL; 4023 } else { 4024 /* negotiation failure */ 4025 state->link = false; 4026 } 4027 4028 phylink_resolve_an_pause(state); 4029 } 4030 4031 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4032 uint16_t config_reg) 4033 { 4034 if (!(config_reg & LPA_SGMII_LINK)) { 4035 state->link = false; 4036 return; 4037 } 4038 4039 switch (config_reg & LPA_SGMII_SPD_MASK) { 4040 case LPA_SGMII_10: 4041 state->speed = SPEED_10; 4042 break; 4043 case LPA_SGMII_100: 4044 state->speed = SPEED_100; 4045 break; 4046 case LPA_SGMII_1000: 4047 state->speed = SPEED_1000; 4048 break; 4049 default: 4050 state->link = false; 4051 return; 4052 } 4053 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4054 state->duplex = DUPLEX_FULL; 4055 else 4056 state->duplex = DUPLEX_HALF; 4057 } 4058 4059 /** 4060 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4061 * @state: a pointer to a struct phylink_link_state. 4062 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4063 * 4064 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4065 * code word. Decode the USXGMII code word and populate the corresponding fields 4066 * (speed, duplex) into the phylink_link_state structure. 4067 */ 4068 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4069 uint16_t lpa) 4070 { 4071 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4072 case MDIO_USXGMII_10: 4073 state->speed = SPEED_10; 4074 break; 4075 case MDIO_USXGMII_100: 4076 state->speed = SPEED_100; 4077 break; 4078 case MDIO_USXGMII_1000: 4079 state->speed = SPEED_1000; 4080 break; 4081 case MDIO_USXGMII_2500: 4082 state->speed = SPEED_2500; 4083 break; 4084 case MDIO_USXGMII_5000: 4085 state->speed = SPEED_5000; 4086 break; 4087 case MDIO_USXGMII_10G: 4088 state->speed = SPEED_10000; 4089 break; 4090 default: 4091 state->link = false; 4092 return; 4093 } 4094 4095 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4096 state->duplex = DUPLEX_FULL; 4097 else 4098 state->duplex = DUPLEX_HALF; 4099 } 4100 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4101 4102 /** 4103 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4104 * @state: a pointer to a struct phylink_link_state. 4105 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4106 * 4107 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4108 * code word. Decode the USGMII code word and populate the corresponding fields 4109 * (speed, duplex) into the phylink_link_state structure. The structure for this 4110 * word is the same as the USXGMII word, except it only supports speeds up to 4111 * 1Gbps. 4112 */ 4113 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4114 uint16_t lpa) 4115 { 4116 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4117 case MDIO_USXGMII_10: 4118 state->speed = SPEED_10; 4119 break; 4120 case MDIO_USXGMII_100: 4121 state->speed = SPEED_100; 4122 break; 4123 case MDIO_USXGMII_1000: 4124 state->speed = SPEED_1000; 4125 break; 4126 default: 4127 state->link = false; 4128 return; 4129 } 4130 4131 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4132 state->duplex = DUPLEX_FULL; 4133 else 4134 state->duplex = DUPLEX_HALF; 4135 } 4136 4137 /** 4138 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4139 * @state: a pointer to a &struct phylink_link_state. 4140 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4141 * @bmsr: The value of the %MII_BMSR register 4142 * @lpa: The value of the %MII_LPA register 4143 * 4144 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4145 * clause 37 negotiation and/or SGMII control. 4146 * 4147 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4148 * the phylink @state structure. This is suitable to be used for implementing 4149 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4150 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4151 */ 4152 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4153 unsigned int neg_mode, u16 bmsr, u16 lpa) 4154 { 4155 state->link = !!(bmsr & BMSR_LSTATUS); 4156 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4157 4158 /* If the link is down, the advertisement data is undefined. */ 4159 if (!state->link) 4160 return; 4161 4162 switch (state->interface) { 4163 case PHY_INTERFACE_MODE_1000BASEX: 4164 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4165 phylink_decode_c37_word(state, lpa, SPEED_1000); 4166 } else { 4167 state->speed = SPEED_1000; 4168 state->duplex = DUPLEX_FULL; 4169 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4170 } 4171 break; 4172 4173 case PHY_INTERFACE_MODE_2500BASEX: 4174 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4175 phylink_decode_c37_word(state, lpa, SPEED_2500); 4176 } else { 4177 state->speed = SPEED_2500; 4178 state->duplex = DUPLEX_FULL; 4179 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4180 } 4181 break; 4182 4183 case PHY_INTERFACE_MODE_SGMII: 4184 case PHY_INTERFACE_MODE_PSGMII: 4185 case PHY_INTERFACE_MODE_QSGMII: 4186 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4187 phylink_decode_sgmii_word(state, lpa); 4188 break; 4189 4190 case PHY_INTERFACE_MODE_QUSGMII: 4191 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4192 phylink_decode_usgmii_word(state, lpa); 4193 break; 4194 4195 default: 4196 state->link = false; 4197 break; 4198 } 4199 } 4200 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4201 4202 /** 4203 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4204 * @pcs: a pointer to a &struct mdio_device. 4205 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4206 * @state: a pointer to a &struct phylink_link_state. 4207 * 4208 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4209 * clause 37 negotiation and/or SGMII control. 4210 * 4211 * Read the MAC PCS state from the MII device configured in @config and 4212 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4213 * the phylink @state structure. This is suitable to be directly plugged 4214 * into the pcs_get_state() member of the struct phylink_pcs_ops 4215 * structure. 4216 */ 4217 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4218 unsigned int neg_mode, 4219 struct phylink_link_state *state) 4220 { 4221 int bmsr, lpa; 4222 4223 bmsr = mdiodev_read(pcs, MII_BMSR); 4224 lpa = mdiodev_read(pcs, MII_LPA); 4225 if (bmsr < 0 || lpa < 0) { 4226 state->link = false; 4227 return; 4228 } 4229 4230 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4231 } 4232 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4233 4234 /** 4235 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4236 * advertisement 4237 * @interface: the PHY interface mode being configured 4238 * @advertising: the ethtool advertisement mask 4239 * 4240 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4241 * clause 37 negotiation and/or SGMII control. 4242 * 4243 * Encode the clause 37 PCS advertisement as specified by @interface and 4244 * @advertising. 4245 * 4246 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4247 */ 4248 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4249 const unsigned long *advertising) 4250 { 4251 u16 adv; 4252 4253 switch (interface) { 4254 case PHY_INTERFACE_MODE_1000BASEX: 4255 case PHY_INTERFACE_MODE_2500BASEX: 4256 adv = ADVERTISE_1000XFULL; 4257 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4258 advertising)) 4259 adv |= ADVERTISE_1000XPAUSE; 4260 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4261 advertising)) 4262 adv |= ADVERTISE_1000XPSE_ASYM; 4263 return adv; 4264 case PHY_INTERFACE_MODE_SGMII: 4265 case PHY_INTERFACE_MODE_PSGMII: 4266 case PHY_INTERFACE_MODE_QSGMII: 4267 return 0x0001; 4268 default: 4269 /* Nothing to do for other modes */ 4270 return -EINVAL; 4271 } 4272 } 4273 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4274 4275 /** 4276 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4277 * @pcs: a pointer to a &struct mdio_device. 4278 * @interface: the PHY interface mode being configured 4279 * @advertising: the ethtool advertisement mask 4280 * @neg_mode: PCS negotiation mode 4281 * 4282 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4283 * parameters for the @mode, @interface and @advertising parameters. 4284 * Returns negative error number on failure, zero if the advertisement 4285 * has not changed, or positive if there is a change. 4286 */ 4287 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4288 phy_interface_t interface, 4289 const unsigned long *advertising, 4290 unsigned int neg_mode) 4291 { 4292 bool changed = 0; 4293 u16 bmcr; 4294 int ret, adv; 4295 4296 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4297 if (adv >= 0) { 4298 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4299 MII_ADVERTISE, 0xffff, adv); 4300 if (ret < 0) 4301 return ret; 4302 changed = ret; 4303 } 4304 4305 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4306 bmcr = BMCR_ANENABLE; 4307 else 4308 bmcr = 0; 4309 4310 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4311 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4312 if (ret < 0) 4313 return ret; 4314 4315 return changed; 4316 } 4317 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4318 4319 /** 4320 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4321 * @pcs: a pointer to a &struct mdio_device. 4322 * 4323 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4324 * clause 37 negotiation. 4325 * 4326 * Restart the clause 37 negotiation with the link partner. This is 4327 * suitable to be directly plugged into the pcs_get_state() member 4328 * of the struct phylink_pcs_ops structure. 4329 */ 4330 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4331 { 4332 int val = mdiodev_read(pcs, MII_BMCR); 4333 4334 if (val >= 0) { 4335 val |= BMCR_ANRESTART; 4336 4337 mdiodev_write(pcs, MII_BMCR, val); 4338 } 4339 } 4340 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4341 4342 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4343 struct phylink_link_state *state) 4344 { 4345 struct mii_bus *bus = pcs->bus; 4346 int addr = pcs->addr; 4347 int stat; 4348 4349 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4350 if (stat < 0) { 4351 state->link = false; 4352 return; 4353 } 4354 4355 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4356 if (!state->link) 4357 return; 4358 4359 switch (state->interface) { 4360 case PHY_INTERFACE_MODE_10GBASER: 4361 state->speed = SPEED_10000; 4362 state->duplex = DUPLEX_FULL; 4363 break; 4364 4365 default: 4366 break; 4367 } 4368 } 4369 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4370 4371 /** 4372 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4373 * which loses state 4374 * @pl: a pointer to a &struct phylink returned from phylink_create() 4375 * 4376 * Helper for MAC drivers which may perform a destructive reset at runtime. 4377 * Both the own driver's mac_link_down() method is called, as well as the 4378 * pcs_link_down() method of the split PCS (if any). 4379 * 4380 * This is similar to phylink_stop(), except it does not alter the state of 4381 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4382 * reset). 4383 */ 4384 void phylink_replay_link_begin(struct phylink *pl) 4385 { 4386 ASSERT_RTNL(); 4387 4388 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4389 } 4390 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4391 4392 /** 4393 * phylink_replay_link_end() - end replay of link callbacks for driver 4394 * which lost state 4395 * @pl: a pointer to a &struct phylink returned from phylink_create() 4396 * 4397 * Helper for MAC drivers which may perform a destructive reset at runtime. 4398 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4399 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4400 * 4401 * This is similar to phylink_start(), except it does not alter the state of 4402 * the phylib PHY. 4403 * 4404 * One must call this method only within the same rtnl_lock() critical section 4405 * as a previous phylink_replay_link_start(). 4406 */ 4407 void phylink_replay_link_end(struct phylink *pl) 4408 { 4409 ASSERT_RTNL(); 4410 4411 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4412 &pl->phylink_disable_state), 4413 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4414 return; 4415 4416 pl->force_major_config = true; 4417 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4418 flush_work(&pl->resolve); 4419 } 4420 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4421 4422 static int __init phylink_init(void) 4423 { 4424 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4425 __set_bit(phylink_sfp_interface_preference[i], 4426 phylink_sfp_interfaces); 4427 4428 return 0; 4429 } 4430 4431 module_init(phylink_init); 4432 4433 MODULE_LICENSE("GPL v2"); 4434 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4435