1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 32 PCS_STATE_DOWN = 0, 33 PCS_STATE_STARTING, 34 PCS_STATE_STARTED, 35 }; 36 37 /** 38 * struct phylink - internal data type for phylink 39 */ 40 struct phylink { 41 /* private: */ 42 struct net_device *netdev; 43 const struct phylink_mac_ops *mac_ops; 44 struct phylink_config *config; 45 struct phylink_pcs *pcs; 46 struct device *dev; 47 unsigned int old_link_state:1; 48 49 unsigned long phylink_disable_state; /* bitmask of disables */ 50 struct phy_device *phydev; 51 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 52 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 53 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 54 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 55 u8 link_port; /* The current non-phy ethtool port */ 56 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 69 struct mutex state_mutex; 70 /* Serialize updates to pl->phydev with phylink_resolve() */ 71 struct mutex phydev_mutex; 72 struct phylink_link_state phy_state; 73 unsigned int phy_ib_mode; 74 struct work_struct resolve; 75 unsigned int pcs_neg_mode; 76 unsigned int pcs_state; 77 78 bool link_failed; 79 bool suspend_link_up; 80 bool major_config_failed; 81 bool mac_supports_eee_ops; 82 bool mac_supports_eee; 83 bool phy_enable_tx_lpi; 84 bool mac_enable_tx_lpi; 85 bool mac_tx_clk_stop; 86 u32 mac_tx_lpi_timer; 87 u8 mac_rx_clk_stop_blocked; 88 89 struct sfp_bus *sfp_bus; 90 bool sfp_may_have_phy; 91 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 92 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 93 u8 sfp_port; 94 95 struct eee_config eee_cfg; 96 97 u32 wolopts_mac; 98 u8 wol_sopass[SOPASS_MAX]; 99 }; 100 101 #define phylink_printk(level, pl, fmt, ...) \ 102 do { \ 103 if ((pl)->config->type == PHYLINK_NETDEV) \ 104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 105 else if ((pl)->config->type == PHYLINK_DEV) \ 106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 107 } while (0) 108 109 #define phylink_err(pl, fmt, ...) \ 110 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 111 #define phylink_warn(pl, fmt, ...) \ 112 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 113 #define phylink_info(pl, fmt, ...) \ 114 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 115 #if defined(CONFIG_DYNAMIC_DEBUG) 116 #define phylink_dbg(pl, fmt, ...) \ 117 do { \ 118 if ((pl)->config->type == PHYLINK_NETDEV) \ 119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 120 else if ((pl)->config->type == PHYLINK_DEV) \ 121 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 122 } while (0) 123 #elif defined(DEBUG) 124 #define phylink_dbg(pl, fmt, ...) \ 125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 126 #else 127 #define phylink_dbg(pl, fmt, ...) \ 128 ({ \ 129 if (0) \ 130 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 131 }) 132 #endif 133 134 static const phy_interface_t phylink_sfp_interface_preference[] = { 135 PHY_INTERFACE_MODE_100GBASEP, 136 PHY_INTERFACE_MODE_50GBASER, 137 PHY_INTERFACE_MODE_LAUI, 138 PHY_INTERFACE_MODE_25GBASER, 139 PHY_INTERFACE_MODE_USXGMII, 140 PHY_INTERFACE_MODE_10GBASER, 141 PHY_INTERFACE_MODE_5GBASER, 142 PHY_INTERFACE_MODE_2500BASEX, 143 PHY_INTERFACE_MODE_SGMII, 144 PHY_INTERFACE_MODE_1000BASEX, 145 PHY_INTERFACE_MODE_100BASEX, 146 }; 147 148 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 149 150 /** 151 * phylink_set_port_modes() - set the port type modes in the ethtool mask 152 * @mask: ethtool link mode mask 153 * 154 * Sets all the port type modes in the ethtool mask. MAC drivers should 155 * use this in their 'validate' callback. 156 */ 157 void phylink_set_port_modes(unsigned long *mask) 158 { 159 phylink_set(mask, TP); 160 phylink_set(mask, AUI); 161 phylink_set(mask, MII); 162 phylink_set(mask, FIBRE); 163 phylink_set(mask, BNC); 164 phylink_set(mask, Backplane); 165 } 166 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 167 168 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 169 { 170 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 171 172 phylink_set_port_modes(tmp); 173 phylink_set(tmp, Autoneg); 174 phylink_set(tmp, Pause); 175 phylink_set(tmp, Asym_Pause); 176 177 return linkmode_subset(linkmode, tmp); 178 } 179 180 static const char *phylink_an_mode_str(unsigned int mode) 181 { 182 static const char *modestr[] = { 183 [MLO_AN_PHY] = "phy", 184 [MLO_AN_FIXED] = "fixed", 185 [MLO_AN_INBAND] = "inband", 186 }; 187 188 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 189 } 190 191 static const char *phylink_pcs_mode_str(unsigned int mode) 192 { 193 if (!mode) 194 return "none"; 195 196 if (mode & PHYLINK_PCS_NEG_OUTBAND) 197 return "outband"; 198 199 if (mode & PHYLINK_PCS_NEG_INBAND) { 200 if (mode & PHYLINK_PCS_NEG_ENABLED) 201 return "inband,an-enabled"; 202 else 203 return "inband,an-disabled"; 204 } 205 206 return "unknown"; 207 } 208 209 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 210 { 211 switch (interface) { 212 case PHY_INTERFACE_MODE_SGMII: 213 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 214 return 1250; 215 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 216 return 3125; 217 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 218 return 5156; 219 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 220 return 10313; 221 default: 222 return 0; 223 } 224 } 225 226 /** 227 * phylink_interface_max_speed() - get the maximum speed of a phy interface 228 * @interface: phy interface mode defined by &typedef phy_interface_t 229 * 230 * Determine the maximum speed of a phy interface. This is intended to help 231 * determine the correct speed to pass to the MAC when the phy is performing 232 * rate matching. 233 * 234 * Return: The maximum speed of @interface 235 */ 236 static int phylink_interface_max_speed(phy_interface_t interface) 237 { 238 switch (interface) { 239 case PHY_INTERFACE_MODE_100BASEX: 240 case PHY_INTERFACE_MODE_REVRMII: 241 case PHY_INTERFACE_MODE_RMII: 242 case PHY_INTERFACE_MODE_SMII: 243 case PHY_INTERFACE_MODE_REVMII: 244 case PHY_INTERFACE_MODE_MII: 245 case PHY_INTERFACE_MODE_MIILITE: 246 return SPEED_100; 247 248 case PHY_INTERFACE_MODE_TBI: 249 case PHY_INTERFACE_MODE_MOCA: 250 case PHY_INTERFACE_MODE_RTBI: 251 case PHY_INTERFACE_MODE_1000BASEX: 252 case PHY_INTERFACE_MODE_1000BASEKX: 253 case PHY_INTERFACE_MODE_TRGMII: 254 case PHY_INTERFACE_MODE_RGMII_TXID: 255 case PHY_INTERFACE_MODE_RGMII_RXID: 256 case PHY_INTERFACE_MODE_RGMII_ID: 257 case PHY_INTERFACE_MODE_RGMII: 258 case PHY_INTERFACE_MODE_PSGMII: 259 case PHY_INTERFACE_MODE_QSGMII: 260 case PHY_INTERFACE_MODE_QUSGMII: 261 case PHY_INTERFACE_MODE_SGMII: 262 case PHY_INTERFACE_MODE_GMII: 263 return SPEED_1000; 264 265 case PHY_INTERFACE_MODE_2500BASEX: 266 case PHY_INTERFACE_MODE_10G_QXGMII: 267 return SPEED_2500; 268 269 case PHY_INTERFACE_MODE_5GBASER: 270 return SPEED_5000; 271 272 case PHY_INTERFACE_MODE_XGMII: 273 case PHY_INTERFACE_MODE_RXAUI: 274 case PHY_INTERFACE_MODE_XAUI: 275 case PHY_INTERFACE_MODE_10GBASER: 276 case PHY_INTERFACE_MODE_10GKR: 277 case PHY_INTERFACE_MODE_USXGMII: 278 return SPEED_10000; 279 280 case PHY_INTERFACE_MODE_25GBASER: 281 return SPEED_25000; 282 283 case PHY_INTERFACE_MODE_XLGMII: 284 return SPEED_40000; 285 286 case PHY_INTERFACE_MODE_50GBASER: 287 case PHY_INTERFACE_MODE_LAUI: 288 return SPEED_50000; 289 290 case PHY_INTERFACE_MODE_100GBASEP: 291 return SPEED_100000; 292 293 case PHY_INTERFACE_MODE_INTERNAL: 294 case PHY_INTERFACE_MODE_NA: 295 case PHY_INTERFACE_MODE_MAX: 296 /* No idea! Garbage in, unknown out */ 297 return SPEED_UNKNOWN; 298 } 299 300 /* If we get here, someone forgot to add an interface mode above */ 301 WARN_ON_ONCE(1); 302 return SPEED_UNKNOWN; 303 } 304 305 static struct { 306 unsigned long mask; 307 int speed; 308 unsigned int duplex; 309 unsigned int caps_bit; 310 } phylink_caps_params[] = { 311 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 312 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 313 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 314 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 315 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 316 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 317 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 318 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 319 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 320 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 321 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 322 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 323 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 324 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 325 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 326 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 327 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 328 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 329 }; 330 331 /** 332 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 333 * @caps: A set of MAC capabilities 334 * 335 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 336 */ 337 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 338 { 339 unsigned long link_caps = 0; 340 int i; 341 342 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 343 if (caps & phylink_caps_params[i].mask) 344 link_caps |= phylink_caps_params[i].caps_bit; 345 346 return link_caps; 347 } 348 349 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 350 { 351 unsigned long caps = 0; 352 int i; 353 354 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 355 if (link_caps & phylink_caps_params[i].caps_bit) 356 caps |= phylink_caps_params[i].mask; 357 358 return caps; 359 } 360 361 /** 362 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 363 * @linkmodes: ethtool linkmode mask (must be already initialised) 364 * @caps: bitmask of MAC capabilities 365 * 366 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 367 * supported by the @caps. @linkmodes must have been initialised previously. 368 */ 369 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 370 unsigned long caps) 371 { 372 unsigned long link_caps = phylink_caps_to_link_caps(caps); 373 374 if (caps & MAC_SYM_PAUSE) 375 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 376 377 if (caps & MAC_ASYM_PAUSE) 378 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 379 380 phy_caps_linkmodes(link_caps, linkmodes); 381 } 382 383 /** 384 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 385 * @config: pointer to a &struct phylink_config 386 * @max_speed: maximum speed 387 * 388 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 389 * Any further motifications of config.mac_capabilities will override this. 390 */ 391 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 392 { 393 int i; 394 395 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 396 phylink_caps_params[i].speed > max_speed; i++) 397 config->mac_capabilities &= ~phylink_caps_params[i].mask; 398 } 399 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 400 401 /** 402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 403 * @speed: the speed to search for 404 * @duplex: the duplex to search for 405 * 406 * Find the mac capability for a given speed and duplex. 407 * 408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 409 * there were no matches. 410 */ 411 static unsigned long phylink_cap_from_speed_duplex(int speed, 412 unsigned int duplex) 413 { 414 int i; 415 416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 417 if (speed == phylink_caps_params[i].speed && 418 duplex == phylink_caps_params[i].duplex) 419 return phylink_caps_params[i].mask; 420 } 421 422 return 0; 423 } 424 425 /** 426 * phylink_get_capabilities() - get capabilities for a given MAC 427 * @interface: phy interface mode defined by &typedef phy_interface_t 428 * @mac_capabilities: bitmask of MAC capabilities 429 * @rate_matching: type of rate matching being performed 430 * 431 * Get the MAC capabilities that are supported by the @interface mode and 432 * @mac_capabilities. 433 */ 434 static unsigned long phylink_get_capabilities(phy_interface_t interface, 435 unsigned long mac_capabilities, 436 int rate_matching) 437 { 438 unsigned long link_caps = phy_caps_from_interface(interface); 439 int max_speed = phylink_interface_max_speed(interface); 440 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 441 unsigned long matched_caps = 0; 442 443 caps |= phylink_link_caps_to_mac_caps(link_caps); 444 445 switch (rate_matching) { 446 case RATE_MATCH_OPEN_LOOP: 447 /* TODO */ 448 fallthrough; 449 case RATE_MATCH_NONE: 450 matched_caps = 0; 451 break; 452 case RATE_MATCH_PAUSE: { 453 /* The MAC must support asymmetric pause towards the local 454 * device for this. We could allow just symmetric pause, but 455 * then we might have to renegotiate if the link partner 456 * doesn't support pause. This is because there's no way to 457 * accept pause frames without transmitting them if we only 458 * support symmetric pause. 459 */ 460 if (!(mac_capabilities & MAC_SYM_PAUSE) || 461 !(mac_capabilities & MAC_ASYM_PAUSE)) 462 break; 463 464 /* We can't adapt if the MAC doesn't support the interface's 465 * max speed at full duplex. 466 */ 467 if (mac_capabilities & 468 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 469 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 470 break; 471 } 472 case RATE_MATCH_CRS: 473 /* The MAC must support half duplex at the interface's max 474 * speed. 475 */ 476 if (mac_capabilities & 477 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 478 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 479 matched_caps &= mac_capabilities; 480 } 481 break; 482 } 483 484 return (caps & mac_capabilities) | matched_caps; 485 } 486 487 /** 488 * phylink_validate_mask_caps() - Restrict link modes based on caps 489 * @supported: ethtool bitmask for supported link modes. 490 * @state: pointer to a &struct phylink_link_state. 491 * @mac_capabilities: bitmask of MAC capabilities 492 * 493 * Calculate the supported link modes based on @mac_capabilities, and restrict 494 * @supported and @state based on that. Use this function if your capabiliies 495 * aren't constant, such as if they vary depending on the interface. 496 */ 497 static void phylink_validate_mask_caps(unsigned long *supported, 498 struct phylink_link_state *state, 499 unsigned long mac_capabilities) 500 { 501 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 502 unsigned long caps; 503 504 phylink_set_port_modes(mask); 505 phylink_set(mask, Autoneg); 506 caps = phylink_get_capabilities(state->interface, mac_capabilities, 507 state->rate_matching); 508 phylink_caps_to_linkmodes(mask, caps); 509 510 linkmode_and(supported, supported, mask); 511 linkmode_and(state->advertising, state->advertising, mask); 512 } 513 514 static int phylink_validate_mac_and_pcs(struct phylink *pl, 515 unsigned long *supported, 516 struct phylink_link_state *state) 517 { 518 struct phylink_pcs *pcs = NULL; 519 unsigned long capabilities; 520 int ret; 521 522 /* Get the PCS for this interface mode */ 523 if (pl->mac_ops->mac_select_pcs) { 524 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 525 if (IS_ERR(pcs)) 526 return PTR_ERR(pcs); 527 } 528 529 if (pcs) { 530 /* The PCS, if present, must be setup before phylink_create() 531 * has been called. If the ops is not initialised, print an 532 * error and backtrace rather than oopsing the kernel. 533 */ 534 if (!pcs->ops) { 535 phylink_err(pl, "interface %s: uninitialised PCS\n", 536 phy_modes(state->interface)); 537 dump_stack(); 538 return -EINVAL; 539 } 540 541 /* Ensure that this PCS supports the interface which the MAC 542 * returned it for. It is an error for the MAC to return a PCS 543 * that does not support the interface mode. 544 */ 545 if (!phy_interface_empty(pcs->supported_interfaces) && 546 !test_bit(state->interface, pcs->supported_interfaces)) { 547 phylink_err(pl, "MAC returned PCS which does not support %s\n", 548 phy_modes(state->interface)); 549 return -EINVAL; 550 } 551 552 /* Validate the link parameters with the PCS */ 553 if (pcs->ops->pcs_validate) { 554 ret = pcs->ops->pcs_validate(pcs, supported, state); 555 if (ret < 0 || phylink_is_empty_linkmode(supported)) 556 return -EINVAL; 557 558 /* Ensure the advertising mask is a subset of the 559 * supported mask. 560 */ 561 linkmode_and(state->advertising, state->advertising, 562 supported); 563 } 564 } 565 566 /* Then validate the link parameters with the MAC */ 567 if (pl->mac_ops->mac_get_caps) 568 capabilities = pl->mac_ops->mac_get_caps(pl->config, 569 state->interface); 570 else 571 capabilities = pl->config->mac_capabilities; 572 573 phylink_validate_mask_caps(supported, state, capabilities); 574 575 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 576 } 577 578 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 579 const unsigned long *supported, 580 const struct phylink_link_state *state, 581 phy_interface_t interface, 582 unsigned long *accum_supported, 583 unsigned long *accum_advertising) 584 { 585 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 586 struct phylink_link_state tmp_state; 587 588 linkmode_copy(tmp_supported, supported); 589 590 tmp_state = *state; 591 tmp_state.interface = interface; 592 593 if (phy) 594 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 595 596 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 597 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 598 interface, phy_modes(interface), 599 phy_rate_matching_to_str(tmp_state.rate_matching), 600 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 601 602 linkmode_or(accum_supported, accum_supported, tmp_supported); 603 linkmode_or(accum_advertising, accum_advertising, 604 tmp_state.advertising); 605 } 606 } 607 608 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 609 unsigned long *supported, 610 struct phylink_link_state *state, 611 const unsigned long *interfaces) 612 { 613 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 615 int interface; 616 617 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 618 phylink_validate_one(pl, phy, supported, state, interface, 619 all_s, all_adv); 620 621 linkmode_copy(supported, all_s); 622 linkmode_copy(state->advertising, all_adv); 623 624 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 625 } 626 627 static int phylink_validate(struct phylink *pl, unsigned long *supported, 628 struct phylink_link_state *state) 629 { 630 const unsigned long *interfaces = pl->config->supported_interfaces; 631 632 if (state->interface == PHY_INTERFACE_MODE_NA) 633 return phylink_validate_mask(pl, NULL, supported, state, 634 interfaces); 635 636 if (!test_bit(state->interface, interfaces)) 637 return -EINVAL; 638 639 return phylink_validate_mac_and_pcs(pl, supported, state); 640 } 641 642 static void phylink_fill_fixedlink_supported(unsigned long *supported) 643 { 644 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 656 } 657 658 static int phylink_parse_fixedlink(struct phylink *pl, 659 const struct fwnode_handle *fwnode) 660 { 661 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 663 const struct link_capabilities *c; 664 struct fwnode_handle *fixed_node; 665 struct gpio_desc *desc; 666 u32 speed; 667 int ret; 668 669 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 670 if (fixed_node) { 671 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 672 673 pl->link_config.speed = speed; 674 pl->link_config.duplex = DUPLEX_HALF; 675 676 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 677 pl->link_config.duplex = DUPLEX_FULL; 678 679 /* We treat the "pause" and "asym-pause" terminology as 680 * defining the link partner's ability. 681 */ 682 if (fwnode_property_read_bool(fixed_node, "pause")) 683 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 684 pl->link_config.lp_advertising); 685 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 686 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 687 pl->link_config.lp_advertising); 688 689 if (ret == 0) { 690 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 691 GPIOD_IN, "?"); 692 693 if (!IS_ERR(desc)) 694 pl->link_gpio = desc; 695 else if (desc == ERR_PTR(-EPROBE_DEFER)) 696 ret = -EPROBE_DEFER; 697 } 698 fwnode_handle_put(fixed_node); 699 700 if (ret) 701 return ret; 702 } else { 703 u32 prop[5]; 704 705 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 706 NULL, 0); 707 if (ret != ARRAY_SIZE(prop)) { 708 phylink_err(pl, "broken fixed-link?\n"); 709 return -EINVAL; 710 } 711 712 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 713 fwnode); 714 715 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 716 prop, ARRAY_SIZE(prop)); 717 if (!ret) { 718 pl->link_config.duplex = prop[1] ? 719 DUPLEX_FULL : DUPLEX_HALF; 720 pl->link_config.speed = prop[2]; 721 if (prop[3]) 722 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 723 pl->link_config.lp_advertising); 724 if (prop[4]) 725 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 726 pl->link_config.lp_advertising); 727 } 728 } 729 730 if (pl->link_config.speed > SPEED_1000 && 731 pl->link_config.duplex != DUPLEX_FULL) 732 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 733 pl->link_config.speed); 734 735 linkmode_zero(pl->supported); 736 phylink_fill_fixedlink_supported(pl->supported); 737 738 linkmode_copy(pl->link_config.advertising, pl->supported); 739 phylink_validate(pl, pl->supported, &pl->link_config); 740 741 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 742 pl->supported, true); 743 if (c) 744 linkmode_and(match, pl->supported, c->linkmodes); 745 746 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 749 linkmode_and(pl->supported, pl->supported, mask); 750 751 phylink_set(pl->supported, MII); 752 753 if (c) { 754 linkmode_or(pl->supported, pl->supported, match); 755 linkmode_or(pl->link_config.lp_advertising, 756 pl->link_config.lp_advertising, match); 757 } else { 758 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 759 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 760 pl->link_config.speed); 761 } 762 763 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 764 pl->supported); 765 766 pl->link_config.link = 1; 767 pl->link_config.an_complete = 1; 768 769 return 0; 770 } 771 772 static int phylink_parse_mode(struct phylink *pl, 773 const struct fwnode_handle *fwnode) 774 { 775 struct fwnode_handle *dn; 776 const char *managed; 777 unsigned long caps; 778 779 if (pl->config->default_an_inband) 780 pl->cfg_link_an_mode = MLO_AN_INBAND; 781 782 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 783 if (dn || fwnode_property_present(fwnode, "fixed-link")) 784 pl->cfg_link_an_mode = MLO_AN_FIXED; 785 fwnode_handle_put(dn); 786 787 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 788 strcmp(managed, "in-band-status") == 0)) { 789 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 790 phylink_err(pl, 791 "can't use both fixed-link and in-band-status\n"); 792 return -EINVAL; 793 } 794 795 pl->cfg_link_an_mode = MLO_AN_INBAND; 796 } 797 798 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 799 linkmode_zero(pl->supported); 800 phylink_set(pl->supported, MII); 801 phylink_set(pl->supported, Autoneg); 802 phylink_set(pl->supported, Asym_Pause); 803 phylink_set(pl->supported, Pause); 804 805 switch (pl->link_config.interface) { 806 case PHY_INTERFACE_MODE_SGMII: 807 case PHY_INTERFACE_MODE_PSGMII: 808 case PHY_INTERFACE_MODE_QSGMII: 809 case PHY_INTERFACE_MODE_QUSGMII: 810 case PHY_INTERFACE_MODE_RGMII: 811 case PHY_INTERFACE_MODE_RGMII_ID: 812 case PHY_INTERFACE_MODE_RGMII_RXID: 813 case PHY_INTERFACE_MODE_RGMII_TXID: 814 case PHY_INTERFACE_MODE_RTBI: 815 case PHY_INTERFACE_MODE_1000BASEX: 816 case PHY_INTERFACE_MODE_2500BASEX: 817 case PHY_INTERFACE_MODE_5GBASER: 818 case PHY_INTERFACE_MODE_25GBASER: 819 case PHY_INTERFACE_MODE_USXGMII: 820 case PHY_INTERFACE_MODE_10G_QXGMII: 821 case PHY_INTERFACE_MODE_10GKR: 822 case PHY_INTERFACE_MODE_10GBASER: 823 case PHY_INTERFACE_MODE_XLGMII: 824 case PHY_INTERFACE_MODE_50GBASER: 825 case PHY_INTERFACE_MODE_LAUI: 826 case PHY_INTERFACE_MODE_100GBASEP: 827 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 828 caps = phylink_get_capabilities(pl->link_config.interface, caps, 829 RATE_MATCH_NONE); 830 phylink_caps_to_linkmodes(pl->supported, caps); 831 break; 832 833 default: 834 phylink_err(pl, 835 "incorrect link mode %s for in-band status\n", 836 phy_modes(pl->link_config.interface)); 837 return -EINVAL; 838 } 839 840 linkmode_copy(pl->link_config.advertising, pl->supported); 841 842 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 843 phylink_err(pl, 844 "failed to validate link configuration for in-band status\n"); 845 return -EINVAL; 846 } 847 } 848 849 return 0; 850 } 851 852 static void phylink_apply_manual_flow(struct phylink *pl, 853 struct phylink_link_state *state) 854 { 855 /* If autoneg is disabled, pause AN is also disabled */ 856 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 857 state->advertising)) 858 state->pause &= ~MLO_PAUSE_AN; 859 860 /* Manual configuration of pause modes */ 861 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 862 state->pause = pl->link_config.pause; 863 } 864 865 static void phylink_resolve_an_pause(struct phylink_link_state *state) 866 { 867 bool tx_pause, rx_pause; 868 869 if (state->duplex == DUPLEX_FULL) { 870 linkmode_resolve_pause(state->advertising, 871 state->lp_advertising, 872 &tx_pause, &rx_pause); 873 if (tx_pause) 874 state->pause |= MLO_PAUSE_TX; 875 if (rx_pause) 876 state->pause |= MLO_PAUSE_RX; 877 } 878 } 879 880 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 881 phy_interface_t interface) 882 { 883 if (pcs && pcs->ops->pcs_inband_caps) 884 return pcs->ops->pcs_inband_caps(pcs, interface); 885 886 return 0; 887 } 888 889 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 890 phy_interface_t interface) 891 { 892 if (pcs && pcs->ops->pcs_pre_config) 893 pcs->ops->pcs_pre_config(pcs, interface); 894 } 895 896 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 897 phy_interface_t interface) 898 { 899 int err = 0; 900 901 if (pcs && pcs->ops->pcs_post_config) 902 err = pcs->ops->pcs_post_config(pcs, interface); 903 904 return err; 905 } 906 907 static void phylink_pcs_disable(struct phylink_pcs *pcs) 908 { 909 if (pcs && pcs->ops->pcs_disable) 910 pcs->ops->pcs_disable(pcs); 911 } 912 913 static int phylink_pcs_enable(struct phylink_pcs *pcs) 914 { 915 int err = 0; 916 917 if (pcs && pcs->ops->pcs_enable) 918 err = pcs->ops->pcs_enable(pcs); 919 920 return err; 921 } 922 923 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 924 const struct phylink_link_state *state, 925 bool permit_pause_to_mac) 926 { 927 if (!pcs) 928 return 0; 929 930 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 931 state->advertising, permit_pause_to_mac); 932 } 933 934 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 935 phy_interface_t interface, int speed, 936 int duplex) 937 { 938 if (pcs && pcs->ops->pcs_link_up) 939 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 940 } 941 942 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 943 { 944 if (pcs && pcs->ops->pcs_disable_eee) 945 pcs->ops->pcs_disable_eee(pcs); 946 } 947 948 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 949 { 950 if (pcs && pcs->ops->pcs_enable_eee) 951 pcs->ops->pcs_enable_eee(pcs); 952 } 953 954 /* Query inband for a specific interface mode, asking the MAC for the 955 * PCS which will be used to handle the interface mode. 956 */ 957 static unsigned int phylink_inband_caps(struct phylink *pl, 958 phy_interface_t interface) 959 { 960 struct phylink_pcs *pcs; 961 962 if (!pl->mac_ops->mac_select_pcs) 963 return 0; 964 965 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 966 if (!pcs) 967 return 0; 968 969 return phylink_pcs_inband_caps(pcs, interface); 970 } 971 972 static void phylink_pcs_poll_stop(struct phylink *pl) 973 { 974 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 975 timer_delete(&pl->link_poll); 976 } 977 978 static void phylink_pcs_poll_start(struct phylink *pl) 979 { 980 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 981 mod_timer(&pl->link_poll, jiffies + HZ); 982 } 983 984 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 985 { 986 int ret = 0; 987 988 /* Signal to PCS driver that MAC requires RX clock for init */ 989 if (pl->config->mac_requires_rxc) 990 pcs->rxc_always_on = true; 991 992 if (pcs->ops->pcs_pre_init) 993 ret = pcs->ops->pcs_pre_init(pcs); 994 995 return ret; 996 } 997 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 998 999 static void phylink_mac_config(struct phylink *pl, 1000 const struct phylink_link_state *state) 1001 { 1002 struct phylink_link_state st = *state; 1003 1004 /* Stop drivers incorrectly using these */ 1005 linkmode_zero(st.lp_advertising); 1006 st.speed = SPEED_UNKNOWN; 1007 st.duplex = DUPLEX_UNKNOWN; 1008 st.an_complete = false; 1009 st.link = false; 1010 1011 phylink_dbg(pl, 1012 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1013 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1014 phy_modes(st.interface), 1015 phy_rate_matching_to_str(st.rate_matching), 1016 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1017 st.pause); 1018 1019 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1020 } 1021 1022 static void phylink_pcs_an_restart(struct phylink *pl) 1023 { 1024 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1025 pl->link_config.advertising) && 1026 phy_interface_mode_is_8023z(pl->link_config.interface) && 1027 phylink_autoneg_inband(pl->act_link_an_mode)) 1028 pl->pcs->ops->pcs_an_restart(pl->pcs); 1029 } 1030 1031 enum inband_type { 1032 INBAND_NONE, 1033 INBAND_CISCO_SGMII, 1034 INBAND_BASEX, 1035 }; 1036 1037 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1038 { 1039 switch (interface) { 1040 case PHY_INTERFACE_MODE_SGMII: 1041 case PHY_INTERFACE_MODE_QSGMII: 1042 case PHY_INTERFACE_MODE_QUSGMII: 1043 case PHY_INTERFACE_MODE_USXGMII: 1044 case PHY_INTERFACE_MODE_10G_QXGMII: 1045 /* These protocols are designed for use with a PHY which 1046 * communicates its negotiation result back to the MAC via 1047 * inband communication. Note: there exist PHYs that run 1048 * with SGMII but do not send the inband data. 1049 */ 1050 return INBAND_CISCO_SGMII; 1051 1052 case PHY_INTERFACE_MODE_1000BASEX: 1053 case PHY_INTERFACE_MODE_2500BASEX: 1054 /* 1000base-X is designed for use media-side for Fibre 1055 * connections, and thus the Autoneg bit needs to be 1056 * taken into account. We also do this for 2500base-X 1057 * as well, but drivers may not support this, so may 1058 * need to override this. 1059 */ 1060 return INBAND_BASEX; 1061 1062 default: 1063 return INBAND_NONE; 1064 } 1065 } 1066 1067 /** 1068 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1069 * @pl: a pointer to a &struct phylink returned from phylink_create() 1070 * @pcs: a pointer to &struct phylink_pcs 1071 * @interface: interface mode to be used 1072 * @advertising: adertisement ethtool link mode mask 1073 * 1074 * Determines the negotiation mode to be used by the PCS, and returns 1075 * one of: 1076 * 1077 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1078 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1079 * will be used. 1080 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1081 * disabled 1082 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1083 * 1084 * Note: this is for cases where the PCS itself is involved in negotiation 1085 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1086 */ 1087 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1088 phy_interface_t interface, 1089 const unsigned long *advertising) 1090 { 1091 unsigned int pcs_ib_caps = 0; 1092 unsigned int phy_ib_caps = 0; 1093 unsigned int neg_mode, mode; 1094 enum inband_type type; 1095 1096 type = phylink_get_inband_type(interface); 1097 if (type == INBAND_NONE) { 1098 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1099 pl->act_link_an_mode = pl->req_link_an_mode; 1100 return; 1101 } 1102 1103 mode = pl->req_link_an_mode; 1104 1105 pl->phy_ib_mode = 0; 1106 1107 if (pcs) 1108 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1109 1110 if (pl->phydev) 1111 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1112 1113 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1114 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1115 1116 if (!phylink_autoneg_inband(mode)) { 1117 bool pcs_ib_only = false; 1118 bool phy_ib_only = false; 1119 1120 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1121 /* PCS supports reporting in-band capabilities, and 1122 * supports more than disable mode. 1123 */ 1124 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1125 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1126 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1127 pcs_ib_only = true; 1128 } 1129 1130 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1131 /* PHY supports in-band capabilities, and supports 1132 * more than disable mode. 1133 */ 1134 if (phy_ib_caps & LINK_INBAND_DISABLE) 1135 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1136 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1137 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1138 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1139 phy_ib_only = true; 1140 } 1141 1142 /* If either the PCS or PHY requires inband to be enabled, 1143 * this is an invalid configuration. Provide a diagnostic 1144 * message for this case, but don't try to force the issue. 1145 */ 1146 if (pcs_ib_only || phy_ib_only) 1147 phylink_warn(pl, 1148 "firmware wants %s mode, but %s%s%s requires inband\n", 1149 phylink_an_mode_str(mode), 1150 pcs_ib_only ? "PCS" : "", 1151 pcs_ib_only && phy_ib_only ? " and " : "", 1152 phy_ib_only ? "PHY" : ""); 1153 1154 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1155 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1156 /* For SGMII modes which are designed to be used with PHYs, or 1157 * Base-X with a PHY, we try to use in-band mode where-ever 1158 * possible. However, there are some PHYs e.g. BCM84881 which 1159 * do not support in-band. 1160 */ 1161 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1162 LINK_INBAND_BYPASS; 1163 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1164 LINK_INBAND_BYPASS; 1165 /* PCS PHY 1166 * D E D E 1167 * 0 0 0 0 no information inband enabled 1168 * 1 0 0 0 pcs doesn't support outband 1169 * 0 1 0 0 pcs required inband enabled 1170 * 1 1 0 0 pcs optional inband enabled 1171 * 0 0 1 0 phy doesn't support outband 1172 * 1 0 1 0 pcs+phy doesn't support outband 1173 * 0 1 1 0 pcs required, phy doesn't support, invalid 1174 * 1 1 1 0 pcs optional, phy doesn't support, outband 1175 * 0 0 0 1 phy required inband enabled 1176 * 1 0 0 1 pcs doesn't support, phy required, invalid 1177 * 0 1 0 1 pcs+phy required inband enabled 1178 * 1 1 0 1 pcs optional, phy required inband enabled 1179 * 0 0 1 1 phy optional inband enabled 1180 * 1 0 1 1 pcs doesn't support, phy optional, outband 1181 * 0 1 1 1 pcs required, phy optional inband enabled 1182 * 1 1 1 1 pcs+phy optional inband enabled 1183 */ 1184 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1185 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1186 /* In-band supported or unknown at both ends. Enable 1187 * in-band mode with or without bypass at the PHY. 1188 */ 1189 if (phy_ib_caps & LINK_INBAND_ENABLE) 1190 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1191 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1192 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1193 1194 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1195 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1196 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1197 /* Either in-band not supported at at least one end. 1198 * In-band bypass at the other end is possible. 1199 */ 1200 if (phy_ib_caps & LINK_INBAND_DISABLE) 1201 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1202 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1203 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1204 1205 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1206 if (pl->phydev) 1207 mode = MLO_AN_PHY; 1208 } else { 1209 /* invalid */ 1210 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1211 phy_modes(interface)); 1212 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1213 } 1214 } else { 1215 /* For Base-X without a PHY */ 1216 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1217 /* If the PCS doesn't support inband, then inband must 1218 * be disabled. 1219 */ 1220 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1221 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1222 /* If the PCS requires inband, then inband must always 1223 * be enabled. 1224 */ 1225 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1226 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1227 advertising)) 1228 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1229 else 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1231 } 1232 1233 pl->pcs_neg_mode = neg_mode; 1234 pl->act_link_an_mode = mode; 1235 } 1236 1237 static void phylink_major_config(struct phylink *pl, bool restart, 1238 const struct phylink_link_state *state) 1239 { 1240 struct phylink_pcs *pcs = NULL; 1241 bool pcs_changed = false; 1242 unsigned int rate_kbd; 1243 int err; 1244 1245 phylink_dbg(pl, "major config, requested %s/%s\n", 1246 phylink_an_mode_str(pl->req_link_an_mode), 1247 phy_modes(state->interface)); 1248 1249 pl->major_config_failed = false; 1250 1251 if (pl->mac_ops->mac_select_pcs) { 1252 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1253 if (IS_ERR(pcs)) { 1254 phylink_err(pl, 1255 "mac_select_pcs unexpectedly failed: %pe\n", 1256 pcs); 1257 1258 pl->major_config_failed = true; 1259 return; 1260 } 1261 1262 pcs_changed = pl->pcs != pcs; 1263 } 1264 1265 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1266 1267 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1268 phylink_an_mode_str(pl->act_link_an_mode), 1269 phylink_pcs_mode_str(pl->pcs_neg_mode), 1270 phy_modes(state->interface)); 1271 1272 phylink_pcs_poll_stop(pl); 1273 1274 if (pl->mac_ops->mac_prepare) { 1275 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1276 state->interface); 1277 if (err < 0) { 1278 phylink_err(pl, "mac_prepare failed: %pe\n", 1279 ERR_PTR(err)); 1280 pl->major_config_failed = true; 1281 return; 1282 } 1283 } 1284 1285 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1286 * for the change. 1287 */ 1288 if (pcs_changed) { 1289 phylink_pcs_disable(pl->pcs); 1290 1291 if (pl->pcs) 1292 pl->pcs->phylink = NULL; 1293 1294 pcs->phylink = pl; 1295 1296 pl->pcs = pcs; 1297 } 1298 1299 if (pl->pcs) 1300 phylink_pcs_pre_config(pl->pcs, state->interface); 1301 1302 phylink_mac_config(pl, state); 1303 1304 if (pl->pcs) { 1305 err = phylink_pcs_post_config(pl->pcs, state->interface); 1306 if (err < 0) { 1307 phylink_err(pl, "pcs_post_config failed: %pe\n", 1308 ERR_PTR(err)); 1309 1310 pl->major_config_failed = true; 1311 } 1312 } 1313 1314 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1315 phylink_pcs_enable(pl->pcs); 1316 1317 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1318 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1319 if (err < 0) { 1320 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1321 pl->major_config_failed = true; 1322 } else if (err > 0) { 1323 restart = true; 1324 } 1325 1326 if (restart) 1327 phylink_pcs_an_restart(pl); 1328 1329 if (pl->mac_ops->mac_finish) { 1330 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1331 state->interface); 1332 if (err < 0) { 1333 phylink_err(pl, "mac_finish failed: %pe\n", 1334 ERR_PTR(err)); 1335 1336 pl->major_config_failed = true; 1337 } 1338 } 1339 1340 if (pl->phydev && pl->phy_ib_mode) { 1341 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1342 if (err < 0) { 1343 phylink_err(pl, "phy_config_inband: %pe\n", 1344 ERR_PTR(err)); 1345 1346 pl->major_config_failed = true; 1347 } 1348 } 1349 1350 if (pl->sfp_bus) { 1351 rate_kbd = phylink_interface_signal_rate(state->interface); 1352 if (rate_kbd) 1353 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1354 } 1355 1356 phylink_pcs_poll_start(pl); 1357 } 1358 1359 /* 1360 * Reconfigure for a change of inband advertisement. 1361 * If we have a separate PCS, we only need to call its pcs_config() method, 1362 * and then restart AN if it indicates something changed. Otherwise, we do 1363 * the full MAC reconfiguration. 1364 */ 1365 static int phylink_change_inband_advert(struct phylink *pl) 1366 { 1367 int ret; 1368 1369 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1370 return 0; 1371 1372 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1373 phylink_an_mode_str(pl->req_link_an_mode), 1374 phy_modes(pl->link_config.interface), 1375 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1376 pl->link_config.pause); 1377 1378 /* Recompute the PCS neg mode */ 1379 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1380 pl->link_config.advertising); 1381 1382 /* Modern PCS-based method; update the advert at the PCS, and 1383 * restart negotiation if the pcs_config() helper indicates that 1384 * the programmed advertisement has changed. 1385 */ 1386 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1387 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1388 if (ret < 0) 1389 return ret; 1390 1391 if (ret > 0) 1392 phylink_pcs_an_restart(pl); 1393 1394 return 0; 1395 } 1396 1397 static void phylink_mac_pcs_get_state(struct phylink *pl, 1398 struct phylink_link_state *state) 1399 { 1400 struct phylink_pcs *pcs; 1401 bool autoneg; 1402 1403 linkmode_copy(state->advertising, pl->link_config.advertising); 1404 linkmode_zero(state->lp_advertising); 1405 state->interface = pl->link_config.interface; 1406 state->rate_matching = pl->link_config.rate_matching; 1407 state->an_complete = 0; 1408 state->link = 1; 1409 1410 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1411 if (autoneg) { 1412 state->speed = SPEED_UNKNOWN; 1413 state->duplex = DUPLEX_UNKNOWN; 1414 state->pause = MLO_PAUSE_NONE; 1415 } else { 1416 state->speed = pl->link_config.speed; 1417 state->duplex = pl->link_config.duplex; 1418 state->pause = pl->link_config.pause; 1419 } 1420 1421 pcs = pl->pcs; 1422 if (pcs) 1423 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1424 else 1425 state->link = 0; 1426 } 1427 1428 /* The fixed state is... fixed except for the link state, 1429 * which may be determined by a GPIO or a callback. 1430 */ 1431 static void phylink_get_fixed_state(struct phylink *pl, 1432 struct phylink_link_state *state) 1433 { 1434 *state = pl->link_config; 1435 if (pl->config->get_fixed_state) 1436 pl->config->get_fixed_state(pl->config, state); 1437 else if (pl->link_gpio) 1438 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1439 1440 state->pause = MLO_PAUSE_NONE; 1441 phylink_resolve_an_pause(state); 1442 } 1443 1444 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1445 { 1446 struct phylink_link_state link_state; 1447 struct phy_device *phy = pl->phydev; 1448 1449 switch (pl->req_link_an_mode) { 1450 case MLO_AN_PHY: 1451 link_state = pl->phy_state; 1452 break; 1453 1454 case MLO_AN_FIXED: 1455 phylink_get_fixed_state(pl, &link_state); 1456 break; 1457 1458 case MLO_AN_INBAND: 1459 link_state = pl->link_config; 1460 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1461 link_state.pause = MLO_PAUSE_NONE; 1462 break; 1463 1464 default: /* can't happen */ 1465 return; 1466 } 1467 1468 link_state.link = false; 1469 1470 phylink_apply_manual_flow(pl, &link_state); 1471 if (phy) 1472 mutex_lock(&phy->lock); 1473 phylink_major_config(pl, force_restart, &link_state); 1474 if (phy) 1475 mutex_unlock(&phy->lock); 1476 } 1477 1478 static const char *phylink_pause_to_str(int pause) 1479 { 1480 switch (pause & MLO_PAUSE_TXRX_MASK) { 1481 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1482 return "rx/tx"; 1483 case MLO_PAUSE_TX: 1484 return "tx"; 1485 case MLO_PAUSE_RX: 1486 return "rx"; 1487 default: 1488 return "off"; 1489 } 1490 } 1491 1492 static void phylink_deactivate_lpi(struct phylink *pl) 1493 { 1494 if (pl->mac_enable_tx_lpi) { 1495 pl->mac_enable_tx_lpi = false; 1496 1497 phylink_dbg(pl, "disabling LPI\n"); 1498 1499 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1500 1501 phylink_pcs_disable_eee(pl->pcs); 1502 } 1503 } 1504 1505 static void phylink_activate_lpi(struct phylink *pl) 1506 { 1507 int err; 1508 1509 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1510 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1511 phy_modes(pl->cur_interface)); 1512 return; 1513 } 1514 1515 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1516 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1517 1518 phylink_pcs_enable_eee(pl->pcs); 1519 1520 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1521 pl->mac_tx_clk_stop); 1522 if (err) { 1523 phylink_pcs_disable_eee(pl->pcs); 1524 phylink_err(pl, "%ps() failed: %pe\n", 1525 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1526 return; 1527 } 1528 1529 pl->mac_enable_tx_lpi = true; 1530 } 1531 1532 static void phylink_link_up(struct phylink *pl, 1533 struct phylink_link_state link_state) 1534 { 1535 struct net_device *ndev = pl->netdev; 1536 int speed, duplex; 1537 bool rx_pause; 1538 1539 speed = link_state.speed; 1540 duplex = link_state.duplex; 1541 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1542 1543 switch (link_state.rate_matching) { 1544 case RATE_MATCH_PAUSE: 1545 /* The PHY is doing rate matchion from the media rate (in 1546 * the link_state) to the interface speed, and will send 1547 * pause frames to the MAC to limit its transmission speed. 1548 */ 1549 speed = phylink_interface_max_speed(link_state.interface); 1550 duplex = DUPLEX_FULL; 1551 rx_pause = true; 1552 break; 1553 1554 case RATE_MATCH_CRS: 1555 /* The PHY is doing rate matchion from the media rate (in 1556 * the link_state) to the interface speed, and will cause 1557 * collisions to the MAC to limit its transmission speed. 1558 */ 1559 speed = phylink_interface_max_speed(link_state.interface); 1560 duplex = DUPLEX_HALF; 1561 break; 1562 } 1563 1564 pl->cur_interface = link_state.interface; 1565 1566 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1567 duplex); 1568 1569 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1570 pl->cur_interface, speed, duplex, 1571 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1572 1573 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1574 phylink_activate_lpi(pl); 1575 1576 if (ndev) 1577 netif_carrier_on(ndev); 1578 1579 phylink_info(pl, 1580 "Link is Up - %s/%s - flow control %s\n", 1581 phy_speed_to_str(link_state.speed), 1582 phy_duplex_to_str(link_state.duplex), 1583 phylink_pause_to_str(link_state.pause)); 1584 } 1585 1586 static void phylink_link_down(struct phylink *pl) 1587 { 1588 struct net_device *ndev = pl->netdev; 1589 1590 if (ndev) 1591 netif_carrier_off(ndev); 1592 1593 phylink_deactivate_lpi(pl); 1594 1595 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1596 pl->cur_interface); 1597 phylink_info(pl, "Link is Down\n"); 1598 } 1599 1600 static bool phylink_link_is_up(struct phylink *pl) 1601 { 1602 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1603 } 1604 1605 static void phylink_resolve(struct work_struct *w) 1606 { 1607 struct phylink *pl = container_of(w, struct phylink, resolve); 1608 struct phylink_link_state link_state; 1609 bool mac_config = false; 1610 bool retrigger = false; 1611 struct phy_device *phy; 1612 bool cur_link_state; 1613 1614 mutex_lock(&pl->phydev_mutex); 1615 phy = pl->phydev; 1616 if (phy) 1617 mutex_lock(&phy->lock); 1618 mutex_lock(&pl->state_mutex); 1619 cur_link_state = phylink_link_is_up(pl); 1620 1621 if (pl->phylink_disable_state) { 1622 pl->link_failed = false; 1623 link_state.link = false; 1624 } else if (pl->link_failed) { 1625 link_state.link = false; 1626 retrigger = true; 1627 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1628 phylink_get_fixed_state(pl, &link_state); 1629 mac_config = link_state.link; 1630 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1631 link_state = pl->phy_state; 1632 mac_config = link_state.link; 1633 } else { 1634 phylink_mac_pcs_get_state(pl, &link_state); 1635 1636 /* The PCS may have a latching link-fail indicator. If the link 1637 * was up, bring the link down and re-trigger the resolve. 1638 * Otherwise, re-read the PCS state to get the current status 1639 * of the link. 1640 */ 1641 if (!link_state.link) { 1642 if (cur_link_state) 1643 retrigger = true; 1644 else 1645 phylink_mac_pcs_get_state(pl, &link_state); 1646 } 1647 1648 /* If we have a phy, the "up" state is the union of both the 1649 * PHY and the MAC 1650 */ 1651 if (phy) 1652 link_state.link &= pl->phy_state.link; 1653 1654 /* Only update if the PHY link is up */ 1655 if (phy && pl->phy_state.link) { 1656 /* If the interface has changed, force a link down 1657 * event if the link isn't already down, and re-resolve. 1658 */ 1659 if (link_state.interface != pl->phy_state.interface) { 1660 retrigger = true; 1661 link_state.link = false; 1662 } 1663 1664 link_state.interface = pl->phy_state.interface; 1665 1666 /* If we are doing rate matching, then the link 1667 * speed/duplex comes from the PHY 1668 */ 1669 if (pl->phy_state.rate_matching) { 1670 link_state.rate_matching = 1671 pl->phy_state.rate_matching; 1672 link_state.speed = pl->phy_state.speed; 1673 link_state.duplex = pl->phy_state.duplex; 1674 } 1675 1676 /* If we have a PHY, we need to update with the PHY 1677 * flow control bits. 1678 */ 1679 link_state.pause = pl->phy_state.pause; 1680 mac_config = true; 1681 } 1682 } 1683 1684 if (pl->act_link_an_mode != MLO_AN_FIXED) 1685 phylink_apply_manual_flow(pl, &link_state); 1686 1687 if (mac_config) { 1688 if (link_state.interface != pl->link_config.interface) { 1689 /* The interface has changed, force the link down and 1690 * then reconfigure. 1691 */ 1692 if (cur_link_state) { 1693 phylink_link_down(pl); 1694 cur_link_state = false; 1695 } 1696 phylink_major_config(pl, false, &link_state); 1697 pl->link_config.interface = link_state.interface; 1698 } 1699 } 1700 1701 /* If configuration of the interface failed, force the link down 1702 * until we get a successful configuration. 1703 */ 1704 if (pl->major_config_failed) 1705 link_state.link = false; 1706 1707 if (link_state.link != cur_link_state) { 1708 pl->old_link_state = link_state.link; 1709 if (!link_state.link) 1710 phylink_link_down(pl); 1711 else 1712 phylink_link_up(pl, link_state); 1713 } 1714 if (!link_state.link && retrigger) { 1715 pl->link_failed = false; 1716 queue_work(system_power_efficient_wq, &pl->resolve); 1717 } 1718 mutex_unlock(&pl->state_mutex); 1719 if (phy) 1720 mutex_unlock(&phy->lock); 1721 mutex_unlock(&pl->phydev_mutex); 1722 } 1723 1724 static void phylink_run_resolve(struct phylink *pl) 1725 { 1726 if (!pl->phylink_disable_state) 1727 queue_work(system_power_efficient_wq, &pl->resolve); 1728 } 1729 1730 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1731 { 1732 unsigned long state = pl->phylink_disable_state; 1733 1734 set_bit(bit, &pl->phylink_disable_state); 1735 if (state == 0) { 1736 queue_work(system_power_efficient_wq, &pl->resolve); 1737 flush_work(&pl->resolve); 1738 } 1739 } 1740 1741 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1742 { 1743 clear_bit(bit, &pl->phylink_disable_state); 1744 phylink_run_resolve(pl); 1745 } 1746 1747 static void phylink_fixed_poll(struct timer_list *t) 1748 { 1749 struct phylink *pl = container_of(t, struct phylink, link_poll); 1750 1751 mod_timer(t, jiffies + HZ); 1752 1753 phylink_run_resolve(pl); 1754 } 1755 1756 static const struct sfp_upstream_ops sfp_phylink_ops; 1757 1758 static int phylink_register_sfp(struct phylink *pl, 1759 const struct fwnode_handle *fwnode) 1760 { 1761 struct sfp_bus *bus; 1762 int ret; 1763 1764 if (!fwnode) 1765 return 0; 1766 1767 bus = sfp_bus_find_fwnode(fwnode); 1768 if (IS_ERR(bus)) { 1769 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1770 return PTR_ERR(bus); 1771 } 1772 1773 pl->sfp_bus = bus; 1774 1775 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1776 sfp_bus_put(bus); 1777 1778 return ret; 1779 } 1780 1781 /** 1782 * phylink_set_fixed_link() - set the fixed link 1783 * @pl: a pointer to a &struct phylink returned from phylink_create() 1784 * @state: a pointer to a struct phylink_link_state. 1785 * 1786 * This function is used when the link parameters are known and do not change, 1787 * making it suitable for certain types of network connections. 1788 * 1789 * Returns: zero on success or negative error code. 1790 */ 1791 int phylink_set_fixed_link(struct phylink *pl, 1792 const struct phylink_link_state *state) 1793 { 1794 const struct link_capabilities *c; 1795 unsigned long *adv; 1796 1797 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1798 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1799 return -EINVAL; 1800 1801 c = phy_caps_lookup(state->speed, state->duplex, 1802 pl->supported, true); 1803 if (!c) 1804 return -EINVAL; 1805 1806 adv = pl->link_config.advertising; 1807 linkmode_and(adv, pl->supported, c->linkmodes); 1808 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1809 1810 pl->link_config.speed = state->speed; 1811 pl->link_config.duplex = state->duplex; 1812 pl->link_config.link = 1; 1813 pl->link_config.an_complete = 1; 1814 1815 pl->cfg_link_an_mode = MLO_AN_FIXED; 1816 pl->req_link_an_mode = pl->cfg_link_an_mode; 1817 1818 return 0; 1819 } 1820 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1821 1822 /** 1823 * phylink_create() - create a phylink instance 1824 * @config: a pointer to the target &struct phylink_config 1825 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1826 * interface 1827 * @iface: the desired link mode defined by &typedef phy_interface_t 1828 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1829 * 1830 * Create a new phylink instance, and parse the link parameters found in @np. 1831 * This will parse in-band modes, fixed-link or SFP configuration. 1832 * 1833 * Note: the rtnl lock must not be held when calling this function. 1834 * 1835 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1836 * must use IS_ERR() to check for errors from this function. 1837 */ 1838 struct phylink *phylink_create(struct phylink_config *config, 1839 const struct fwnode_handle *fwnode, 1840 phy_interface_t iface, 1841 const struct phylink_mac_ops *mac_ops) 1842 { 1843 struct phylink *pl; 1844 int ret; 1845 1846 /* Validate the supplied configuration */ 1847 if (phy_interface_empty(config->supported_interfaces)) { 1848 dev_err(config->dev, 1849 "phylink: error: empty supported_interfaces\n"); 1850 return ERR_PTR(-EINVAL); 1851 } 1852 1853 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1854 if (!pl) 1855 return ERR_PTR(-ENOMEM); 1856 1857 mutex_init(&pl->phydev_mutex); 1858 mutex_init(&pl->state_mutex); 1859 INIT_WORK(&pl->resolve, phylink_resolve); 1860 1861 pl->config = config; 1862 if (config->type == PHYLINK_NETDEV) { 1863 pl->netdev = to_net_dev(config->dev); 1864 netif_carrier_off(pl->netdev); 1865 } else if (config->type == PHYLINK_DEV) { 1866 pl->dev = config->dev; 1867 } else { 1868 kfree(pl); 1869 return ERR_PTR(-EINVAL); 1870 } 1871 1872 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1873 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1874 pl->config->lpi_capabilities && 1875 !phy_interface_empty(pl->config->lpi_interfaces); 1876 1877 /* Set the default EEE configuration */ 1878 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1879 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1880 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1881 1882 pl->phy_state.interface = iface; 1883 pl->link_interface = iface; 1884 if (iface == PHY_INTERFACE_MODE_MOCA) 1885 pl->link_port = PORT_BNC; 1886 else 1887 pl->link_port = PORT_MII; 1888 pl->link_config.interface = iface; 1889 pl->link_config.pause = MLO_PAUSE_AN; 1890 pl->link_config.speed = SPEED_UNKNOWN; 1891 pl->link_config.duplex = DUPLEX_UNKNOWN; 1892 pl->pcs_state = PCS_STATE_DOWN; 1893 pl->mac_ops = mac_ops; 1894 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1895 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1896 1897 linkmode_fill(pl->supported); 1898 linkmode_copy(pl->link_config.advertising, pl->supported); 1899 phylink_validate(pl, pl->supported, &pl->link_config); 1900 1901 ret = phylink_parse_mode(pl, fwnode); 1902 if (ret < 0) { 1903 kfree(pl); 1904 return ERR_PTR(ret); 1905 } 1906 1907 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1908 ret = phylink_parse_fixedlink(pl, fwnode); 1909 if (ret < 0) { 1910 kfree(pl); 1911 return ERR_PTR(ret); 1912 } 1913 } 1914 1915 pl->req_link_an_mode = pl->cfg_link_an_mode; 1916 1917 ret = phylink_register_sfp(pl, fwnode); 1918 if (ret < 0) { 1919 kfree(pl); 1920 return ERR_PTR(ret); 1921 } 1922 1923 return pl; 1924 } 1925 EXPORT_SYMBOL_GPL(phylink_create); 1926 1927 /** 1928 * phylink_destroy() - cleanup and destroy the phylink instance 1929 * @pl: a pointer to a &struct phylink returned from phylink_create() 1930 * 1931 * Destroy a phylink instance. Any PHY that has been attached must have been 1932 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1933 * 1934 * Note: the rtnl lock must not be held when calling this function. 1935 */ 1936 void phylink_destroy(struct phylink *pl) 1937 { 1938 sfp_bus_del_upstream(pl->sfp_bus); 1939 if (pl->link_gpio) 1940 gpiod_put(pl->link_gpio); 1941 1942 cancel_work_sync(&pl->resolve); 1943 kfree(pl); 1944 } 1945 EXPORT_SYMBOL_GPL(phylink_destroy); 1946 1947 /** 1948 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1949 * @pl: a pointer to a &struct phylink returned from phylink_create() 1950 * 1951 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1952 * no PHY is needed. 1953 * 1954 * Returns true if phylink will be expecting a PHY. 1955 */ 1956 bool phylink_expects_phy(struct phylink *pl) 1957 { 1958 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1959 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1960 phy_interface_mode_is_8023z(pl->link_interface))) 1961 return false; 1962 return true; 1963 } 1964 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1965 1966 static void phylink_phy_change(struct phy_device *phydev, bool up) 1967 { 1968 struct phylink *pl = phydev->phylink; 1969 bool tx_pause, rx_pause; 1970 1971 phy_get_pause(phydev, &tx_pause, &rx_pause); 1972 1973 mutex_lock(&pl->state_mutex); 1974 pl->phy_state.speed = phydev->speed; 1975 pl->phy_state.duplex = phydev->duplex; 1976 pl->phy_state.rate_matching = phydev->rate_matching; 1977 pl->phy_state.pause = MLO_PAUSE_NONE; 1978 if (tx_pause) 1979 pl->phy_state.pause |= MLO_PAUSE_TX; 1980 if (rx_pause) 1981 pl->phy_state.pause |= MLO_PAUSE_RX; 1982 pl->phy_state.interface = phydev->interface; 1983 pl->phy_state.link = up; 1984 if (!up) 1985 pl->link_failed = true; 1986 1987 /* Get the LPI state from phylib */ 1988 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1989 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1990 mutex_unlock(&pl->state_mutex); 1991 1992 phylink_run_resolve(pl); 1993 1994 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 1995 up ? "up" : "down", 1996 phy_modes(phydev->interface), 1997 phy_speed_to_str(phydev->speed), 1998 phy_duplex_to_str(phydev->duplex), 1999 phy_rate_matching_to_str(phydev->rate_matching), 2000 phylink_pause_to_str(pl->phy_state.pause), 2001 phydev->enable_tx_lpi ? "" : "no"); 2002 } 2003 2004 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2005 unsigned long *supported, 2006 struct phylink_link_state *state) 2007 { 2008 DECLARE_PHY_INTERFACE_MASK(interfaces); 2009 2010 /* If the PHY provides a bitmap of the interfaces it will be using 2011 * depending on the negotiated media speeds, use this to validate 2012 * which ethtool link modes can be used. 2013 */ 2014 if (!phy_interface_empty(phy->possible_interfaces)) { 2015 /* We only care about the union of the PHY's interfaces and 2016 * those which the host supports. 2017 */ 2018 phy_interface_and(interfaces, phy->possible_interfaces, 2019 pl->config->supported_interfaces); 2020 2021 if (phy_interface_empty(interfaces)) { 2022 phylink_err(pl, "PHY has no common interfaces\n"); 2023 return -EINVAL; 2024 } 2025 2026 if (phy_on_sfp(phy)) { 2027 /* If the PHY is on a SFP, limit the interfaces to 2028 * those that can be used with a SFP module. 2029 */ 2030 phy_interface_and(interfaces, interfaces, 2031 phylink_sfp_interfaces); 2032 2033 if (phy_interface_empty(interfaces)) { 2034 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2035 return -EINVAL; 2036 } 2037 } 2038 2039 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2040 phydev_name(phy), 2041 (int)PHY_INTERFACE_MODE_MAX, 2042 phy->possible_interfaces, 2043 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2044 2045 return phylink_validate_mask(pl, phy, supported, state, 2046 interfaces); 2047 } 2048 2049 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2050 phydev_name(phy)); 2051 2052 /* Check whether we would use rate matching for the proposed interface 2053 * mode. 2054 */ 2055 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2056 2057 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2058 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2059 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2060 * their Serdes is either unnecessary or not reasonable. 2061 * 2062 * For these which switch interface modes, we really need to know which 2063 * interface modes the PHY supports to properly work out which ethtool 2064 * linkmodes can be supported. For now, as a work-around, we validate 2065 * against all interface modes, which may lead to more ethtool link 2066 * modes being advertised than are actually supported. 2067 */ 2068 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2069 state->interface != PHY_INTERFACE_MODE_RXAUI && 2070 state->interface != PHY_INTERFACE_MODE_XAUI && 2071 state->interface != PHY_INTERFACE_MODE_USXGMII) 2072 state->interface = PHY_INTERFACE_MODE_NA; 2073 2074 return phylink_validate(pl, supported, state); 2075 } 2076 2077 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2078 phy_interface_t interface) 2079 { 2080 struct phylink_link_state config; 2081 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2082 char *irq_str; 2083 int ret; 2084 2085 /* 2086 * This is the new way of dealing with flow control for PHYs, 2087 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2088 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2089 * using our validate call to the MAC, we rely upon the MAC 2090 * clearing the bits from both supported and advertising fields. 2091 */ 2092 phy_support_asym_pause(phy); 2093 2094 memset(&config, 0, sizeof(config)); 2095 linkmode_copy(supported, phy->supported); 2096 linkmode_copy(config.advertising, phy->advertising); 2097 config.interface = interface; 2098 2099 ret = phylink_validate_phy(pl, phy, supported, &config); 2100 if (ret) { 2101 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2102 phy_modes(config.interface), 2103 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2104 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2105 ERR_PTR(ret)); 2106 return ret; 2107 } 2108 2109 phy->phylink = pl; 2110 phy->phy_link_change = phylink_phy_change; 2111 2112 irq_str = phy_attached_info_irq(phy); 2113 phylink_info(pl, 2114 "PHY [%s] driver [%s] (irq=%s)\n", 2115 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2116 kfree(irq_str); 2117 2118 mutex_lock(&pl->phydev_mutex); 2119 mutex_lock(&phy->lock); 2120 mutex_lock(&pl->state_mutex); 2121 pl->phydev = phy; 2122 pl->phy_state.interface = interface; 2123 pl->phy_state.pause = MLO_PAUSE_NONE; 2124 pl->phy_state.speed = SPEED_UNKNOWN; 2125 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2126 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2127 linkmode_copy(pl->supported, supported); 2128 linkmode_copy(pl->link_config.advertising, config.advertising); 2129 2130 /* Restrict the phy advertisement according to the MAC support. */ 2131 linkmode_copy(phy->advertising, config.advertising); 2132 2133 /* If the MAC supports phylink managed EEE, restrict the EEE 2134 * advertisement according to the MAC's LPI capabilities. 2135 */ 2136 if (pl->mac_supports_eee) { 2137 /* If EEE is enabled, then we need to call phy_support_eee() 2138 * to ensure that the advertising mask is appropriately set. 2139 * This also enables EEE at the PHY. 2140 */ 2141 if (pl->eee_cfg.eee_enabled) 2142 phy_support_eee(phy); 2143 2144 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2145 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2146 2147 /* Convert the MAC's LPI capabilities to linkmodes */ 2148 linkmode_zero(pl->supported_lpi); 2149 phylink_caps_to_linkmodes(pl->supported_lpi, 2150 pl->config->lpi_capabilities); 2151 2152 /* Restrict the PHYs EEE support/advertisement to the modes 2153 * that the MAC supports. 2154 */ 2155 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2156 pl->supported_lpi); 2157 } else if (pl->mac_supports_eee_ops) { 2158 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2159 phy_disable_eee(phy); 2160 } 2161 2162 mutex_unlock(&pl->state_mutex); 2163 mutex_unlock(&phy->lock); 2164 mutex_unlock(&pl->phydev_mutex); 2165 2166 phylink_dbg(pl, 2167 "phy: %s setting supported %*pb advertising %*pb\n", 2168 phy_modes(interface), 2169 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2170 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2171 2172 if (pl->config->mac_managed_pm) 2173 phy->mac_managed_pm = true; 2174 2175 /* Allow the MAC to stop its clock if the PHY has the capability */ 2176 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2177 2178 if (pl->mac_supports_eee_ops) { 2179 /* Explicitly configure whether the PHY is allowed to stop it's 2180 * receive clock. 2181 */ 2182 ret = phy_eee_rx_clock_stop(phy, 2183 pl->config->eee_rx_clk_stop_enable); 2184 if (ret == -EOPNOTSUPP) 2185 ret = 0; 2186 } 2187 2188 if (ret == 0 && phy_interrupt_is_valid(phy)) 2189 phy_request_interrupt(phy); 2190 2191 return ret; 2192 } 2193 2194 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2195 phy_interface_t interface) 2196 { 2197 u32 flags = 0; 2198 2199 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2200 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2201 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2202 return -EINVAL; 2203 2204 if (pl->phydev) 2205 return -EBUSY; 2206 2207 if (pl->config->mac_requires_rxc) 2208 flags |= PHY_F_RXC_ALWAYS_ON; 2209 2210 return phy_attach_direct(pl->netdev, phy, flags, interface); 2211 } 2212 2213 /** 2214 * phylink_connect_phy() - connect a PHY to the phylink instance 2215 * @pl: a pointer to a &struct phylink returned from phylink_create() 2216 * @phy: a pointer to a &struct phy_device. 2217 * 2218 * Connect @phy to the phylink instance specified by @pl by calling 2219 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2220 * capabilities, start the PHYLIB state machine and enable any interrupts 2221 * that the PHY supports. 2222 * 2223 * This updates the phylink's ethtool supported and advertising link mode 2224 * masks. 2225 * 2226 * Returns 0 on success or a negative errno. 2227 */ 2228 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2229 { 2230 int ret; 2231 2232 /* Use PHY device/driver interface */ 2233 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2234 pl->link_interface = phy->interface; 2235 pl->link_config.interface = pl->link_interface; 2236 } 2237 2238 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2239 if (ret < 0) 2240 return ret; 2241 2242 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2243 if (ret) 2244 phy_detach(phy); 2245 2246 return ret; 2247 } 2248 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2249 2250 /** 2251 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2252 * @pl: a pointer to a &struct phylink returned from phylink_create() 2253 * @dn: a pointer to a &struct device_node. 2254 * @flags: PHY-specific flags to communicate to the PHY device driver 2255 * 2256 * Connect the phy specified in the device node @dn to the phylink instance 2257 * specified by @pl. Actions specified in phylink_connect_phy() will be 2258 * performed. 2259 * 2260 * Returns 0 on success or a negative errno. 2261 */ 2262 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2263 u32 flags) 2264 { 2265 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2266 } 2267 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2268 2269 /** 2270 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2271 * @pl: a pointer to a &struct phylink returned from phylink_create() 2272 * @fwnode: a pointer to a &struct fwnode_handle. 2273 * @flags: PHY-specific flags to communicate to the PHY device driver 2274 * 2275 * Connect the phy specified @fwnode to the phylink instance specified 2276 * by @pl. 2277 * 2278 * Returns 0 on success or a negative errno. 2279 */ 2280 int phylink_fwnode_phy_connect(struct phylink *pl, 2281 const struct fwnode_handle *fwnode, 2282 u32 flags) 2283 { 2284 struct fwnode_handle *phy_fwnode; 2285 struct phy_device *phy_dev; 2286 int ret; 2287 2288 /* Fixed links and 802.3z are handled without needing a PHY */ 2289 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2290 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2291 phy_interface_mode_is_8023z(pl->link_interface))) 2292 return 0; 2293 2294 phy_fwnode = fwnode_get_phy_node(fwnode); 2295 if (IS_ERR(phy_fwnode)) { 2296 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2297 return -ENODEV; 2298 return 0; 2299 } 2300 2301 phy_dev = fwnode_phy_find_device(phy_fwnode); 2302 /* We're done with the phy_node handle */ 2303 fwnode_handle_put(phy_fwnode); 2304 if (!phy_dev) 2305 return -ENODEV; 2306 2307 /* Use PHY device/driver interface */ 2308 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2309 pl->link_interface = phy_dev->interface; 2310 pl->link_config.interface = pl->link_interface; 2311 } 2312 2313 if (pl->config->mac_requires_rxc) 2314 flags |= PHY_F_RXC_ALWAYS_ON; 2315 2316 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2317 pl->link_interface); 2318 phy_device_free(phy_dev); 2319 if (ret) 2320 return ret; 2321 2322 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2323 if (ret) 2324 phy_detach(phy_dev); 2325 2326 return ret; 2327 } 2328 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2329 2330 /** 2331 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2332 * instance. 2333 * @pl: a pointer to a &struct phylink returned from phylink_create() 2334 * 2335 * Disconnect any current PHY from the phylink instance described by @pl. 2336 */ 2337 void phylink_disconnect_phy(struct phylink *pl) 2338 { 2339 struct phy_device *phy; 2340 2341 ASSERT_RTNL(); 2342 2343 mutex_lock(&pl->phydev_mutex); 2344 phy = pl->phydev; 2345 if (phy) { 2346 mutex_lock(&phy->lock); 2347 mutex_lock(&pl->state_mutex); 2348 pl->phydev = NULL; 2349 pl->phy_enable_tx_lpi = false; 2350 pl->mac_tx_clk_stop = false; 2351 mutex_unlock(&pl->state_mutex); 2352 mutex_unlock(&phy->lock); 2353 } 2354 mutex_unlock(&pl->phydev_mutex); 2355 2356 if (phy) { 2357 flush_work(&pl->resolve); 2358 phy_disconnect(phy); 2359 } 2360 } 2361 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2362 2363 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2364 { 2365 if (!up) 2366 pl->link_failed = true; 2367 phylink_run_resolve(pl); 2368 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2369 } 2370 2371 /** 2372 * phylink_mac_change() - notify phylink of a change in MAC state 2373 * @pl: a pointer to a &struct phylink returned from phylink_create() 2374 * @up: indicates whether the link is currently up. 2375 * 2376 * The MAC driver should call this driver when the state of its link 2377 * changes (eg, link failure, new negotiation results, etc.) 2378 */ 2379 void phylink_mac_change(struct phylink *pl, bool up) 2380 { 2381 phylink_link_changed(pl, up, "mac"); 2382 } 2383 EXPORT_SYMBOL_GPL(phylink_mac_change); 2384 2385 /** 2386 * phylink_pcs_change() - notify phylink of a change to PCS link state 2387 * @pcs: pointer to &struct phylink_pcs 2388 * @up: indicates whether the link is currently up. 2389 * 2390 * The PCS driver should call this when the state of its link changes 2391 * (e.g. link failure, new negotiation results, etc.) Note: it should 2392 * not determine "up" by reading the BMSR. If in doubt about the link 2393 * state at interrupt time, then pass true if pcs_get_state() returns 2394 * the latched link-down state, otherwise pass false. 2395 */ 2396 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2397 { 2398 struct phylink *pl = pcs->phylink; 2399 2400 if (pl) 2401 phylink_link_changed(pl, up, "pcs"); 2402 } 2403 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2404 2405 static irqreturn_t phylink_link_handler(int irq, void *data) 2406 { 2407 struct phylink *pl = data; 2408 2409 phylink_run_resolve(pl); 2410 2411 return IRQ_HANDLED; 2412 } 2413 2414 /** 2415 * phylink_start() - start a phylink instance 2416 * @pl: a pointer to a &struct phylink returned from phylink_create() 2417 * 2418 * Start the phylink instance specified by @pl, configuring the MAC for the 2419 * desired link mode(s) and negotiation style. This should be called from the 2420 * network device driver's &struct net_device_ops ndo_open() method. 2421 */ 2422 void phylink_start(struct phylink *pl) 2423 { 2424 bool poll = false; 2425 2426 ASSERT_RTNL(); 2427 2428 phylink_info(pl, "configuring for %s/%s link mode\n", 2429 phylink_an_mode_str(pl->req_link_an_mode), 2430 phy_modes(pl->link_config.interface)); 2431 2432 /* Always set the carrier off */ 2433 if (pl->netdev) 2434 netif_carrier_off(pl->netdev); 2435 2436 pl->pcs_state = PCS_STATE_STARTING; 2437 2438 /* Apply the link configuration to the MAC when starting. This allows 2439 * a fixed-link to start with the correct parameters, and also 2440 * ensures that we set the appropriate advertisement for Serdes links. 2441 * 2442 * Restart autonegotiation if using 802.3z to ensure that the link 2443 * parameters are properly negotiated. This is necessary for DSA 2444 * switches using 802.3z negotiation to ensure they see our modes. 2445 */ 2446 phylink_mac_initial_config(pl, true); 2447 2448 pl->pcs_state = PCS_STATE_STARTED; 2449 2450 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2451 2452 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2453 int irq = gpiod_to_irq(pl->link_gpio); 2454 2455 if (irq > 0) { 2456 if (!request_irq(irq, phylink_link_handler, 2457 IRQF_TRIGGER_RISING | 2458 IRQF_TRIGGER_FALLING, 2459 "netdev link", pl)) 2460 pl->link_irq = irq; 2461 else 2462 irq = 0; 2463 } 2464 if (irq <= 0) 2465 poll = true; 2466 } 2467 2468 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2469 poll |= pl->config->poll_fixed_state; 2470 2471 if (poll) 2472 mod_timer(&pl->link_poll, jiffies + HZ); 2473 if (pl->phydev) 2474 phy_start(pl->phydev); 2475 if (pl->sfp_bus) 2476 sfp_upstream_start(pl->sfp_bus); 2477 } 2478 EXPORT_SYMBOL_GPL(phylink_start); 2479 2480 /** 2481 * phylink_stop() - stop a phylink instance 2482 * @pl: a pointer to a &struct phylink returned from phylink_create() 2483 * 2484 * Stop the phylink instance specified by @pl. This should be called from the 2485 * network device driver's &struct net_device_ops ndo_stop() method. The 2486 * network device's carrier state should not be changed prior to calling this 2487 * function. 2488 * 2489 * This will synchronously bring down the link if the link is not already 2490 * down (in other words, it will trigger a mac_link_down() method call.) 2491 */ 2492 void phylink_stop(struct phylink *pl) 2493 { 2494 ASSERT_RTNL(); 2495 2496 if (pl->sfp_bus) 2497 sfp_upstream_stop(pl->sfp_bus); 2498 if (pl->phydev) 2499 phy_stop(pl->phydev); 2500 timer_delete_sync(&pl->link_poll); 2501 if (pl->link_irq) { 2502 free_irq(pl->link_irq, pl); 2503 pl->link_irq = 0; 2504 } 2505 2506 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2507 2508 pl->pcs_state = PCS_STATE_DOWN; 2509 2510 phylink_pcs_disable(pl->pcs); 2511 } 2512 EXPORT_SYMBOL_GPL(phylink_stop); 2513 2514 /** 2515 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2516 * @pl: a pointer to a &struct phylink returned from phylink_create() 2517 * 2518 * Disable the PHY's ability to stop the receive clock while the receive path 2519 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2520 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2521 */ 2522 void phylink_rx_clk_stop_block(struct phylink *pl) 2523 { 2524 ASSERT_RTNL(); 2525 2526 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2527 phylink_warn(pl, "%s called too many times - ignoring\n", 2528 __func__); 2529 dump_stack(); 2530 return; 2531 } 2532 2533 /* Disable PHY receive clock stop if this is the first time this 2534 * function has been called and clock-stop was previously enabled. 2535 */ 2536 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2537 pl->mac_supports_eee_ops && pl->phydev && 2538 pl->config->eee_rx_clk_stop_enable) 2539 phy_eee_rx_clock_stop(pl->phydev, false); 2540 } 2541 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2542 2543 /** 2544 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2545 * @pl: a pointer to a &struct phylink returned from phylink_create() 2546 * 2547 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2548 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2549 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2550 */ 2551 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2552 { 2553 ASSERT_RTNL(); 2554 2555 if (pl->mac_rx_clk_stop_blocked == 0) { 2556 phylink_warn(pl, "%s called too many times - ignoring\n", 2557 __func__); 2558 dump_stack(); 2559 return; 2560 } 2561 2562 /* Re-enable PHY receive clock stop if the number of unblocks matches 2563 * the number of calls to the block function above. 2564 */ 2565 if (--pl->mac_rx_clk_stop_blocked == 0 && 2566 pl->mac_supports_eee_ops && pl->phydev && 2567 pl->config->eee_rx_clk_stop_enable) 2568 phy_eee_rx_clock_stop(pl->phydev, true); 2569 } 2570 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2571 2572 static bool phylink_mac_supports_wol(struct phylink *pl) 2573 { 2574 return !!pl->mac_ops->mac_wol_set; 2575 } 2576 2577 static bool phylink_phy_supports_wol(struct phylink *pl, 2578 struct phy_device *phydev) 2579 { 2580 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2581 } 2582 2583 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2584 { 2585 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2586 pl->phydev && phy_may_wakeup(pl->phydev); 2587 } 2588 2589 /** 2590 * phylink_suspend() - handle a network device suspend event 2591 * @pl: a pointer to a &struct phylink returned from phylink_create() 2592 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2593 * 2594 * Handle a network device suspend event. There are several cases: 2595 * 2596 * - If Wake-on-Lan is not active, we can bring down the link between 2597 * the MAC and PHY by calling phylink_stop(). 2598 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2599 * can also bring down the link between the MAC and PHY. 2600 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2601 * still needs to receive packets, so we can not bring the link down. 2602 * 2603 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2604 * (struct phylink_mac_ops.mac_set_wol populated.) 2605 */ 2606 void phylink_suspend(struct phylink *pl, bool mac_wol) 2607 { 2608 ASSERT_RTNL(); 2609 2610 if (phylink_mac_supports_wol(pl)) 2611 mac_wol = !!pl->wolopts_mac; 2612 2613 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2614 /* Wake-on-Lan enabled, MAC handling */ 2615 mutex_lock(&pl->state_mutex); 2616 2617 /* Stop the resolver bringing the link up */ 2618 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2619 2620 pl->suspend_link_up = phylink_link_is_up(pl); 2621 if (pl->suspend_link_up) { 2622 /* Disable the carrier, to prevent transmit timeouts, 2623 * but one would hope all packets have been sent. This 2624 * also means phylink_resolve() will do nothing. 2625 */ 2626 if (pl->netdev) 2627 netif_carrier_off(pl->netdev); 2628 pl->old_link_state = false; 2629 } 2630 2631 /* We do not call mac_link_down() here as we want the 2632 * link to remain up to receive the WoL packets. 2633 */ 2634 mutex_unlock(&pl->state_mutex); 2635 } else { 2636 phylink_stop(pl); 2637 } 2638 2639 if (phylink_phy_pm_speed_ctrl(pl)) 2640 phylink_speed_down(pl, false); 2641 } 2642 EXPORT_SYMBOL_GPL(phylink_suspend); 2643 2644 /** 2645 * phylink_prepare_resume() - prepare to resume a network device 2646 * @pl: a pointer to a &struct phylink returned from phylink_create() 2647 * 2648 * Optional, but if called must be called prior to phylink_resume(). 2649 * 2650 * Prepare to resume a network device, preparing the PHY as necessary. 2651 */ 2652 void phylink_prepare_resume(struct phylink *pl) 2653 { 2654 struct phy_device *phydev = pl->phydev; 2655 2656 ASSERT_RTNL(); 2657 2658 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2659 * when PDOWN is set. However, some MACs require RXC to be running 2660 * in order to resume. If the MAC requires RXC, and we have a PHY, 2661 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2662 * the clock meets requirements. We do not implement this delay. 2663 */ 2664 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2665 phy_resume(phydev); 2666 } 2667 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2668 2669 /** 2670 * phylink_resume() - handle a network device resume event 2671 * @pl: a pointer to a &struct phylink returned from phylink_create() 2672 * 2673 * Undo the effects of phylink_suspend(), returning the link to an 2674 * operational state. 2675 */ 2676 void phylink_resume(struct phylink *pl) 2677 { 2678 ASSERT_RTNL(); 2679 2680 if (phylink_phy_pm_speed_ctrl(pl)) 2681 phylink_speed_up(pl); 2682 2683 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2684 /* Wake-on-Lan enabled, MAC handling */ 2685 2686 if (pl->suspend_link_up) { 2687 /* Call mac_link_down() so we keep the overall state 2688 * balanced. Do this under the state_mutex lock for 2689 * consistency. This will cause a "Link Down" message 2690 * to be printed during resume, which is harmless - 2691 * the true link state will be printed when we run a 2692 * resolve. 2693 */ 2694 mutex_lock(&pl->state_mutex); 2695 phylink_link_down(pl); 2696 mutex_unlock(&pl->state_mutex); 2697 } 2698 2699 /* Re-apply the link parameters so that all the settings get 2700 * restored to the MAC. 2701 */ 2702 phylink_mac_initial_config(pl, true); 2703 2704 /* Re-enable and re-resolve the link parameters */ 2705 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2706 } else { 2707 phylink_start(pl); 2708 } 2709 } 2710 EXPORT_SYMBOL_GPL(phylink_resume); 2711 2712 /** 2713 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2714 * @pl: a pointer to a &struct phylink returned from phylink_create() 2715 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2716 * 2717 * Read the wake on lan parameters from the PHY attached to the phylink 2718 * instance specified by @pl. If no PHY is currently attached, report no 2719 * support for wake on lan. 2720 */ 2721 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2722 { 2723 ASSERT_RTNL(); 2724 2725 wol->supported = 0; 2726 wol->wolopts = 0; 2727 2728 if (phylink_mac_supports_wol(pl)) { 2729 if (phylink_phy_supports_wol(pl, pl->phydev)) 2730 phy_ethtool_get_wol(pl->phydev, wol); 2731 2732 /* Where the MAC augments the WoL support, merge its support and 2733 * current configuration. 2734 */ 2735 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2736 memcpy(wol->sopass, pl->wol_sopass, 2737 sizeof(wol->sopass)); 2738 2739 wol->supported |= pl->config->wol_mac_support; 2740 wol->wolopts |= pl->wolopts_mac; 2741 } else { 2742 /* Legacy */ 2743 if (pl->phydev) 2744 phy_ethtool_get_wol(pl->phydev, wol); 2745 } 2746 } 2747 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2748 2749 /** 2750 * phylink_ethtool_set_wol() - set wake on lan parameters 2751 * @pl: a pointer to a &struct phylink returned from phylink_create() 2752 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2753 * 2754 * Set the wake on lan parameters for the PHY attached to the phylink 2755 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2756 * error. 2757 * 2758 * Returns zero on success or negative errno code. 2759 */ 2760 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2761 { 2762 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2763 int ret = -EOPNOTSUPP; 2764 bool changed; 2765 u32 wolopts; 2766 2767 ASSERT_RTNL(); 2768 2769 if (phylink_mac_supports_wol(pl)) { 2770 wolopts = wol->wolopts; 2771 2772 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2773 ret = phy_ethtool_set_wol(pl->phydev, wol); 2774 if (ret != 0 && ret != -EOPNOTSUPP) 2775 return ret; 2776 2777 phy_ethtool_get_wol(pl->phydev, &w); 2778 2779 /* Any Wake-on-Lan modes which the PHY is handling 2780 * should not be passed on to the MAC. 2781 */ 2782 wolopts &= ~w.wolopts; 2783 } 2784 2785 wolopts &= pl->config->wol_mac_support; 2786 changed = pl->wolopts_mac != wolopts; 2787 if (wolopts & WAKE_MAGICSECURE) 2788 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2789 sizeof(wol->sopass)); 2790 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2791 2792 if (changed) { 2793 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2794 wol->sopass); 2795 if (!ret) 2796 pl->wolopts_mac = wolopts; 2797 } else { 2798 ret = 0; 2799 } 2800 } else { 2801 if (pl->phydev) 2802 ret = phy_ethtool_set_wol(pl->phydev, wol); 2803 } 2804 2805 return ret; 2806 } 2807 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2808 2809 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2810 const unsigned long *link_modes) 2811 { 2812 phy_interface_t interface; 2813 2814 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2815 if (interface == PHY_INTERFACE_MODE_NA) { 2816 phylink_err(pl, 2817 "selection of interface failed, advertisement %*pb\n", 2818 __ETHTOOL_LINK_MODE_MASK_NBITS, 2819 link_modes); 2820 return interface; 2821 } 2822 2823 if (!test_bit(interface, pl->config->supported_interfaces)) { 2824 phylink_err(pl, 2825 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2826 phy_modes(interface), interface, 2827 (int)PHY_INTERFACE_MODE_MAX, 2828 pl->config->supported_interfaces); 2829 return PHY_INTERFACE_MODE_NA; 2830 } 2831 2832 return interface; 2833 } 2834 2835 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2836 u32 speed) 2837 { 2838 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2839 phy_interface_t interface; 2840 u32 max_speed; 2841 int i; 2842 2843 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2844 interface = phylink_sfp_interface_preference[i]; 2845 if (!test_bit(interface, pl->sfp_interfaces)) 2846 continue; 2847 2848 max_speed = phylink_interface_max_speed(interface); 2849 2850 /* The logic here is: if speed == max_speed, then we've found 2851 * the best interface. Otherwise we find the interface that 2852 * can just support the requested speed. 2853 */ 2854 if (max_speed >= speed) 2855 best_interface = interface; 2856 2857 if (max_speed <= speed) 2858 break; 2859 } 2860 2861 if (best_interface == PHY_INTERFACE_MODE_NA) 2862 phylink_err(pl, "selection of interface failed, speed %u\n", 2863 speed); 2864 2865 return best_interface; 2866 } 2867 2868 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2869 { 2870 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2871 2872 linkmode_zero(mask); 2873 phylink_set_port_modes(mask); 2874 2875 linkmode_and(dst, dst, mask); 2876 linkmode_or(dst, dst, b); 2877 } 2878 2879 static void phylink_get_ksettings(const struct phylink_link_state *state, 2880 struct ethtool_link_ksettings *kset) 2881 { 2882 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2883 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2884 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2885 kset->base.speed = state->speed; 2886 kset->base.duplex = state->duplex; 2887 } 2888 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2889 state->advertising) ? 2890 AUTONEG_ENABLE : AUTONEG_DISABLE; 2891 } 2892 2893 /** 2894 * phylink_ethtool_ksettings_get() - get the current link settings 2895 * @pl: a pointer to a &struct phylink returned from phylink_create() 2896 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2897 * 2898 * Read the current link settings for the phylink instance specified by @pl. 2899 * This will be the link settings read from the MAC, PHY or fixed link 2900 * settings depending on the current negotiation mode. 2901 */ 2902 int phylink_ethtool_ksettings_get(struct phylink *pl, 2903 struct ethtool_link_ksettings *kset) 2904 { 2905 struct phylink_link_state link_state; 2906 2907 ASSERT_RTNL(); 2908 2909 if (pl->phydev) 2910 phy_ethtool_ksettings_get(pl->phydev, kset); 2911 else 2912 kset->base.port = pl->link_port; 2913 2914 linkmode_copy(kset->link_modes.supported, pl->supported); 2915 2916 switch (pl->act_link_an_mode) { 2917 case MLO_AN_FIXED: 2918 /* We are using fixed settings. Report these as the 2919 * current link settings - and note that these also 2920 * represent the supported speeds/duplex/pause modes. 2921 */ 2922 phylink_get_fixed_state(pl, &link_state); 2923 phylink_get_ksettings(&link_state, kset); 2924 break; 2925 2926 case MLO_AN_INBAND: 2927 /* If there is a phy attached, then use the reported 2928 * settings from the phy with no modification. 2929 */ 2930 if (pl->phydev) 2931 break; 2932 2933 phylink_mac_pcs_get_state(pl, &link_state); 2934 2935 /* The MAC is reporting the link results from its own PCS 2936 * layer via in-band status. Report these as the current 2937 * link settings. 2938 */ 2939 phylink_get_ksettings(&link_state, kset); 2940 break; 2941 } 2942 2943 return 0; 2944 } 2945 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2946 2947 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2948 phy_interface_t interface, 2949 unsigned long *adv) 2950 { 2951 unsigned int inband = phylink_inband_caps(pl, interface); 2952 unsigned int mask; 2953 2954 /* If the PCS doesn't implement inband support, be permissive. */ 2955 if (!inband) 2956 return true; 2957 2958 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2959 mask = LINK_INBAND_ENABLE; 2960 else 2961 mask = LINK_INBAND_DISABLE; 2962 2963 /* Check whether the PCS implements the required mode */ 2964 return !!(inband & mask); 2965 } 2966 2967 /** 2968 * phylink_ethtool_ksettings_set() - set the link settings 2969 * @pl: a pointer to a &struct phylink returned from phylink_create() 2970 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2971 */ 2972 int phylink_ethtool_ksettings_set(struct phylink *pl, 2973 const struct ethtool_link_ksettings *kset) 2974 { 2975 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2976 const struct link_capabilities *c; 2977 struct phylink_link_state config; 2978 2979 ASSERT_RTNL(); 2980 2981 if (pl->phydev) { 2982 struct ethtool_link_ksettings phy_kset = *kset; 2983 2984 linkmode_and(phy_kset.link_modes.advertising, 2985 phy_kset.link_modes.advertising, 2986 pl->supported); 2987 2988 /* We can rely on phylib for this update; we also do not need 2989 * to update the pl->link_config settings: 2990 * - the configuration returned via ksettings_get() will come 2991 * from phylib whenever a PHY is present. 2992 * - link_config.interface will be updated by the PHY calling 2993 * back via phylink_phy_change() and a subsequent resolve. 2994 * - initial link configuration for PHY mode comes from the 2995 * last phy state updated via phylink_phy_change(). 2996 * - other configuration changes (e.g. pause modes) are 2997 * performed directly via phylib. 2998 * - if in in-band mode with a PHY, the link configuration 2999 * is passed on the link from the PHY, and all of 3000 * link_config.{speed,duplex,an_enabled,pause} are not used. 3001 * - the only possible use would be link_config.advertising 3002 * pause modes when in 1000base-X mode with a PHY, but in 3003 * the presence of a PHY, this should not be changed as that 3004 * should be determined from the media side advertisement. 3005 */ 3006 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3007 } 3008 3009 config = pl->link_config; 3010 /* Mask out unsupported advertisements */ 3011 linkmode_and(config.advertising, kset->link_modes.advertising, 3012 pl->supported); 3013 3014 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3015 switch (kset->base.autoneg) { 3016 case AUTONEG_DISABLE: 3017 /* Autonegotiation disabled, select a suitable speed and 3018 * duplex. 3019 */ 3020 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3021 pl->supported, false); 3022 if (!c) 3023 return -EINVAL; 3024 3025 /* If we have a fixed link, refuse to change link parameters. 3026 * If the link parameters match, accept them but do nothing. 3027 */ 3028 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3029 if (c->speed != pl->link_config.speed || 3030 c->duplex != pl->link_config.duplex) 3031 return -EINVAL; 3032 return 0; 3033 } 3034 3035 config.speed = c->speed; 3036 config.duplex = c->duplex; 3037 break; 3038 3039 case AUTONEG_ENABLE: 3040 /* If we have a fixed link, allow autonegotiation (since that 3041 * is our default case) but do not allow the advertisement to 3042 * be changed. If the advertisement matches, simply return. 3043 */ 3044 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3045 if (!linkmode_equal(config.advertising, 3046 pl->link_config.advertising)) 3047 return -EINVAL; 3048 return 0; 3049 } 3050 3051 config.speed = SPEED_UNKNOWN; 3052 config.duplex = DUPLEX_UNKNOWN; 3053 break; 3054 3055 default: 3056 return -EINVAL; 3057 } 3058 3059 /* We have ruled out the case with a PHY attached, and the 3060 * fixed-link cases. All that is left are in-band links. 3061 */ 3062 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3063 kset->base.autoneg == AUTONEG_ENABLE); 3064 3065 /* If this link is with an SFP, ensure that changes to advertised modes 3066 * also cause the associated interface to be selected such that the 3067 * link can be configured correctly. 3068 */ 3069 if (pl->sfp_bus) { 3070 if (kset->base.autoneg == AUTONEG_ENABLE) 3071 config.interface = 3072 phylink_sfp_select_interface(pl, 3073 config.advertising); 3074 else 3075 config.interface = 3076 phylink_sfp_select_interface_speed(pl, 3077 config.speed); 3078 if (config.interface == PHY_INTERFACE_MODE_NA) 3079 return -EINVAL; 3080 3081 /* Revalidate with the selected interface */ 3082 linkmode_copy(support, pl->supported); 3083 if (phylink_validate(pl, support, &config)) { 3084 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3085 phylink_an_mode_str(pl->req_link_an_mode), 3086 phy_modes(config.interface), 3087 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3088 return -EINVAL; 3089 } 3090 } else { 3091 /* Validate without changing the current supported mask. */ 3092 linkmode_copy(support, pl->supported); 3093 if (phylink_validate(pl, support, &config)) 3094 return -EINVAL; 3095 } 3096 3097 /* If autonegotiation is enabled, we must have an advertisement */ 3098 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3099 config.advertising) && 3100 phylink_is_empty_linkmode(config.advertising)) 3101 return -EINVAL; 3102 3103 /* Validate the autonegotiation state. We don't have a PHY in this 3104 * situation, so the PCS is the media-facing entity. 3105 */ 3106 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3107 config.advertising)) 3108 return -EINVAL; 3109 3110 mutex_lock(&pl->state_mutex); 3111 pl->link_config.speed = config.speed; 3112 pl->link_config.duplex = config.duplex; 3113 3114 if (pl->link_config.interface != config.interface) { 3115 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3116 /* We need to force the link down, then change the interface */ 3117 if (pl->old_link_state) { 3118 phylink_link_down(pl); 3119 pl->old_link_state = false; 3120 } 3121 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3122 &pl->phylink_disable_state)) 3123 phylink_major_config(pl, false, &config); 3124 pl->link_config.interface = config.interface; 3125 linkmode_copy(pl->link_config.advertising, config.advertising); 3126 } else if (!linkmode_equal(pl->link_config.advertising, 3127 config.advertising)) { 3128 linkmode_copy(pl->link_config.advertising, config.advertising); 3129 phylink_change_inband_advert(pl); 3130 } 3131 mutex_unlock(&pl->state_mutex); 3132 3133 return 0; 3134 } 3135 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3136 3137 /** 3138 * phylink_ethtool_nway_reset() - restart negotiation 3139 * @pl: a pointer to a &struct phylink returned from phylink_create() 3140 * 3141 * Restart negotiation for the phylink instance specified by @pl. This will 3142 * cause any attached phy to restart negotiation with the link partner, and 3143 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3144 * negotiation. 3145 * 3146 * Returns zero on success, or negative error code. 3147 */ 3148 int phylink_ethtool_nway_reset(struct phylink *pl) 3149 { 3150 int ret = 0; 3151 3152 ASSERT_RTNL(); 3153 3154 if (pl->phydev) 3155 ret = phy_restart_aneg(pl->phydev); 3156 phylink_pcs_an_restart(pl); 3157 3158 return ret; 3159 } 3160 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3161 3162 /** 3163 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3164 * @pl: a pointer to a &struct phylink returned from phylink_create() 3165 * @pause: a pointer to a &struct ethtool_pauseparam 3166 */ 3167 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3168 struct ethtool_pauseparam *pause) 3169 { 3170 ASSERT_RTNL(); 3171 3172 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3173 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3174 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3175 } 3176 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3177 3178 /** 3179 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3180 * @pl: a pointer to a &struct phylink returned from phylink_create() 3181 * @pause: a pointer to a &struct ethtool_pauseparam 3182 */ 3183 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3184 struct ethtool_pauseparam *pause) 3185 { 3186 struct phylink_link_state *config = &pl->link_config; 3187 bool manual_changed; 3188 int pause_state; 3189 3190 ASSERT_RTNL(); 3191 3192 if (pl->req_link_an_mode == MLO_AN_FIXED) 3193 return -EOPNOTSUPP; 3194 3195 if (!phylink_test(pl->supported, Pause) && 3196 !phylink_test(pl->supported, Asym_Pause)) 3197 return -EOPNOTSUPP; 3198 3199 if (!phylink_test(pl->supported, Asym_Pause) && 3200 pause->rx_pause != pause->tx_pause) 3201 return -EINVAL; 3202 3203 pause_state = 0; 3204 if (pause->autoneg) 3205 pause_state |= MLO_PAUSE_AN; 3206 if (pause->rx_pause) 3207 pause_state |= MLO_PAUSE_RX; 3208 if (pause->tx_pause) 3209 pause_state |= MLO_PAUSE_TX; 3210 3211 mutex_lock(&pl->state_mutex); 3212 /* 3213 * See the comments for linkmode_set_pause(), wrt the deficiencies 3214 * with the current implementation. A solution to this issue would 3215 * be: 3216 * ethtool Local device 3217 * rx tx Pause AsymDir 3218 * 0 0 0 0 3219 * 1 0 1 1 3220 * 0 1 0 1 3221 * 1 1 1 1 3222 * and then use the ethtool rx/tx enablement status to mask the 3223 * rx/tx pause resolution. 3224 */ 3225 linkmode_set_pause(config->advertising, pause->tx_pause, 3226 pause->rx_pause); 3227 3228 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3229 (!(pause_state & MLO_PAUSE_AN) && 3230 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3231 3232 config->pause = pause_state; 3233 3234 /* Update our in-band advertisement, triggering a renegotiation if 3235 * the advertisement changed. 3236 */ 3237 if (!pl->phydev) 3238 phylink_change_inband_advert(pl); 3239 3240 mutex_unlock(&pl->state_mutex); 3241 3242 /* If we have a PHY, a change of the pause frame advertisement will 3243 * cause phylib to renegotiate (if AN is enabled) which will in turn 3244 * call our phylink_phy_change() and trigger a resolve. Note that 3245 * we can't hold our state mutex while calling phy_set_asym_pause(). 3246 */ 3247 if (pl->phydev) 3248 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3249 pause->tx_pause); 3250 3251 /* If the manual pause settings changed, make sure we trigger a 3252 * resolve to update their state; we can not guarantee that the 3253 * link will cycle. 3254 */ 3255 if (manual_changed) { 3256 pl->link_failed = true; 3257 phylink_run_resolve(pl); 3258 } 3259 3260 return 0; 3261 } 3262 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3263 3264 /** 3265 * phylink_get_eee_err() - read the energy efficient ethernet error 3266 * counter 3267 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3268 * 3269 * Read the Energy Efficient Ethernet error counter from the PHY associated 3270 * with the phylink instance specified by @pl. 3271 * 3272 * Returns positive error counter value, or negative error code. 3273 */ 3274 int phylink_get_eee_err(struct phylink *pl) 3275 { 3276 int ret = 0; 3277 3278 ASSERT_RTNL(); 3279 3280 if (pl->phydev) 3281 ret = phy_get_eee_err(pl->phydev); 3282 3283 return ret; 3284 } 3285 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3286 3287 /** 3288 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3289 * @pl: a pointer to a &struct phylink returned from phylink_create() 3290 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3291 */ 3292 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3293 { 3294 int ret = -EOPNOTSUPP; 3295 3296 ASSERT_RTNL(); 3297 3298 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3299 return ret; 3300 3301 if (pl->phydev) { 3302 ret = phy_ethtool_get_eee(pl->phydev, eee); 3303 /* Restrict supported linkmode mask */ 3304 if (ret == 0 && pl->mac_supports_eee_ops) 3305 linkmode_and(eee->supported, eee->supported, 3306 pl->supported_lpi); 3307 } 3308 3309 return ret; 3310 } 3311 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3312 3313 /** 3314 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3315 * @pl: a pointer to a &struct phylink returned from phylink_create() 3316 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3317 */ 3318 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3319 { 3320 bool mac_eee = pl->mac_supports_eee; 3321 int ret = -EOPNOTSUPP; 3322 3323 ASSERT_RTNL(); 3324 3325 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3326 mac_eee ? "supports" : "does not support", 3327 eee->eee_enabled ? ", enabled" : "", 3328 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3329 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3330 3331 if (pl->mac_supports_eee_ops && !mac_eee) 3332 return ret; 3333 3334 if (pl->phydev) { 3335 /* Restrict advertisement mask */ 3336 if (pl->mac_supports_eee_ops) 3337 linkmode_and(eee->advertised, eee->advertised, 3338 pl->supported_lpi); 3339 ret = phy_ethtool_set_eee(pl->phydev, eee); 3340 if (ret == 0) 3341 eee_to_eeecfg(&pl->eee_cfg, eee); 3342 } 3343 3344 return ret; 3345 } 3346 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3347 3348 /* This emulates MII registers for a fixed-mode phy operating as per the 3349 * passed in state. "aneg" defines if we report negotiation is possible. 3350 * 3351 * FIXME: should deal with negotiation state too. 3352 */ 3353 static int phylink_mii_emul_read(unsigned int reg, 3354 struct phylink_link_state *state) 3355 { 3356 struct fixed_phy_status fs; 3357 unsigned long *lpa = state->lp_advertising; 3358 int val; 3359 3360 fs.link = state->link; 3361 fs.speed = state->speed; 3362 fs.duplex = state->duplex; 3363 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3364 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3365 3366 val = swphy_read_reg(reg, &fs); 3367 if (reg == MII_BMSR) { 3368 if (!state->an_complete) 3369 val &= ~BMSR_ANEGCOMPLETE; 3370 } 3371 return val; 3372 } 3373 3374 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3375 unsigned int reg) 3376 { 3377 struct phy_device *phydev = pl->phydev; 3378 int prtad, devad; 3379 3380 if (mdio_phy_id_is_c45(phy_id)) { 3381 prtad = mdio_phy_id_prtad(phy_id); 3382 devad = mdio_phy_id_devad(phy_id); 3383 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3384 reg); 3385 } 3386 3387 if (phydev->is_c45) { 3388 switch (reg) { 3389 case MII_BMCR: 3390 case MII_BMSR: 3391 case MII_PHYSID1: 3392 case MII_PHYSID2: 3393 devad = __ffs(phydev->c45_ids.mmds_present); 3394 break; 3395 case MII_ADVERTISE: 3396 case MII_LPA: 3397 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3398 return -EINVAL; 3399 devad = MDIO_MMD_AN; 3400 if (reg == MII_ADVERTISE) 3401 reg = MDIO_AN_ADVERTISE; 3402 else 3403 reg = MDIO_AN_LPA; 3404 break; 3405 default: 3406 return -EINVAL; 3407 } 3408 prtad = phy_id; 3409 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3410 reg); 3411 } 3412 3413 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3414 } 3415 3416 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3417 unsigned int reg, unsigned int val) 3418 { 3419 struct phy_device *phydev = pl->phydev; 3420 int prtad, devad; 3421 3422 if (mdio_phy_id_is_c45(phy_id)) { 3423 prtad = mdio_phy_id_prtad(phy_id); 3424 devad = mdio_phy_id_devad(phy_id); 3425 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3426 reg, val); 3427 } 3428 3429 if (phydev->is_c45) { 3430 switch (reg) { 3431 case MII_BMCR: 3432 case MII_BMSR: 3433 case MII_PHYSID1: 3434 case MII_PHYSID2: 3435 devad = __ffs(phydev->c45_ids.mmds_present); 3436 break; 3437 case MII_ADVERTISE: 3438 case MII_LPA: 3439 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3440 return -EINVAL; 3441 devad = MDIO_MMD_AN; 3442 if (reg == MII_ADVERTISE) 3443 reg = MDIO_AN_ADVERTISE; 3444 else 3445 reg = MDIO_AN_LPA; 3446 break; 3447 default: 3448 return -EINVAL; 3449 } 3450 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3451 reg, val); 3452 } 3453 3454 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3455 } 3456 3457 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3458 unsigned int reg) 3459 { 3460 struct phylink_link_state state; 3461 int val = 0xffff; 3462 3463 switch (pl->act_link_an_mode) { 3464 case MLO_AN_FIXED: 3465 if (phy_id == 0) { 3466 phylink_get_fixed_state(pl, &state); 3467 val = phylink_mii_emul_read(reg, &state); 3468 } 3469 break; 3470 3471 case MLO_AN_PHY: 3472 return -EOPNOTSUPP; 3473 3474 case MLO_AN_INBAND: 3475 if (phy_id == 0) { 3476 phylink_mac_pcs_get_state(pl, &state); 3477 val = phylink_mii_emul_read(reg, &state); 3478 } 3479 break; 3480 } 3481 3482 return val & 0xffff; 3483 } 3484 3485 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3486 unsigned int reg, unsigned int val) 3487 { 3488 switch (pl->act_link_an_mode) { 3489 case MLO_AN_FIXED: 3490 break; 3491 3492 case MLO_AN_PHY: 3493 return -EOPNOTSUPP; 3494 3495 case MLO_AN_INBAND: 3496 break; 3497 } 3498 3499 return 0; 3500 } 3501 3502 /** 3503 * phylink_mii_ioctl() - generic mii ioctl interface 3504 * @pl: a pointer to a &struct phylink returned from phylink_create() 3505 * @ifr: a pointer to a &struct ifreq for socket ioctls 3506 * @cmd: ioctl cmd to execute 3507 * 3508 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3509 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3510 * 3511 * Returns: zero on success or negative error code. 3512 * 3513 * %SIOCGMIIPHY: 3514 * read register from the current PHY. 3515 * %SIOCGMIIREG: 3516 * read register from the specified PHY. 3517 * %SIOCSMIIREG: 3518 * set a register on the specified PHY. 3519 */ 3520 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3521 { 3522 struct mii_ioctl_data *mii = if_mii(ifr); 3523 int ret; 3524 3525 ASSERT_RTNL(); 3526 3527 if (pl->phydev) { 3528 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3529 switch (cmd) { 3530 case SIOCGMIIPHY: 3531 mii->phy_id = pl->phydev->mdio.addr; 3532 fallthrough; 3533 3534 case SIOCGMIIREG: 3535 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3536 if (ret >= 0) { 3537 mii->val_out = ret; 3538 ret = 0; 3539 } 3540 break; 3541 3542 case SIOCSMIIREG: 3543 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3544 mii->val_in); 3545 break; 3546 3547 default: 3548 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3549 break; 3550 } 3551 } else { 3552 switch (cmd) { 3553 case SIOCGMIIPHY: 3554 mii->phy_id = 0; 3555 fallthrough; 3556 3557 case SIOCGMIIREG: 3558 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3559 if (ret >= 0) { 3560 mii->val_out = ret; 3561 ret = 0; 3562 } 3563 break; 3564 3565 case SIOCSMIIREG: 3566 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3567 mii->val_in); 3568 break; 3569 3570 default: 3571 ret = -EOPNOTSUPP; 3572 break; 3573 } 3574 } 3575 3576 return ret; 3577 } 3578 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3579 3580 /** 3581 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3582 * link partners 3583 * @pl: a pointer to a &struct phylink returned from phylink_create() 3584 * @sync: perform action synchronously 3585 * 3586 * If we have a PHY that is not part of a SFP module, then set the speed 3587 * as described in the phy_speed_down() function. Please see this function 3588 * for a description of the @sync parameter. 3589 * 3590 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3591 */ 3592 int phylink_speed_down(struct phylink *pl, bool sync) 3593 { 3594 int ret = 0; 3595 3596 ASSERT_RTNL(); 3597 3598 if (!pl->sfp_bus && pl->phydev) 3599 ret = phy_speed_down(pl->phydev, sync); 3600 3601 return ret; 3602 } 3603 EXPORT_SYMBOL_GPL(phylink_speed_down); 3604 3605 /** 3606 * phylink_speed_up() - restore the advertised speeds prior to the call to 3607 * phylink_speed_down() 3608 * @pl: a pointer to a &struct phylink returned from phylink_create() 3609 * 3610 * If we have a PHY that is not part of a SFP module, then restore the 3611 * PHY speeds as per phy_speed_up(). 3612 * 3613 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3614 */ 3615 int phylink_speed_up(struct phylink *pl) 3616 { 3617 int ret = 0; 3618 3619 ASSERT_RTNL(); 3620 3621 if (!pl->sfp_bus && pl->phydev) 3622 ret = phy_speed_up(pl->phydev); 3623 3624 return ret; 3625 } 3626 EXPORT_SYMBOL_GPL(phylink_speed_up); 3627 3628 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3629 { 3630 struct phylink *pl = upstream; 3631 3632 pl->netdev->sfp_bus = bus; 3633 } 3634 3635 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3636 { 3637 struct phylink *pl = upstream; 3638 3639 pl->netdev->sfp_bus = NULL; 3640 } 3641 3642 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3643 const unsigned long *intf) 3644 { 3645 phy_interface_t interface; 3646 size_t i; 3647 3648 interface = PHY_INTERFACE_MODE_NA; 3649 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3650 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3651 interface = phylink_sfp_interface_preference[i]; 3652 break; 3653 } 3654 3655 return interface; 3656 } 3657 3658 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3659 struct phylink_link_state *state, 3660 bool changed) 3661 { 3662 u8 mode = MLO_AN_INBAND; 3663 3664 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3665 phylink_an_mode_str(mode), phy_modes(state->interface), 3666 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3667 3668 if (!linkmode_equal(pl->supported, supported)) { 3669 linkmode_copy(pl->supported, supported); 3670 changed = true; 3671 } 3672 3673 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3674 linkmode_copy(pl->link_config.advertising, state->advertising); 3675 changed = true; 3676 } 3677 3678 if (pl->req_link_an_mode != mode || 3679 pl->link_config.interface != state->interface) { 3680 pl->req_link_an_mode = mode; 3681 pl->link_config.interface = state->interface; 3682 3683 changed = true; 3684 3685 phylink_info(pl, "switched to %s/%s link mode\n", 3686 phylink_an_mode_str(mode), 3687 phy_modes(state->interface)); 3688 } 3689 3690 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3691 &pl->phylink_disable_state)) 3692 phylink_mac_initial_config(pl, false); 3693 } 3694 3695 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3696 { 3697 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3698 struct phylink_link_state config; 3699 int ret; 3700 3701 /* We're not using pl->sfp_interfaces, so clear it. */ 3702 phy_interface_zero(pl->sfp_interfaces); 3703 linkmode_copy(support, phy->supported); 3704 3705 memset(&config, 0, sizeof(config)); 3706 linkmode_copy(config.advertising, phy->advertising); 3707 config.interface = PHY_INTERFACE_MODE_NA; 3708 config.speed = SPEED_UNKNOWN; 3709 config.duplex = DUPLEX_UNKNOWN; 3710 config.pause = MLO_PAUSE_AN; 3711 3712 /* Ignore errors if we're expecting a PHY to attach later */ 3713 ret = phylink_validate(pl, support, &config); 3714 if (ret) { 3715 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3716 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3717 ERR_PTR(ret)); 3718 return ret; 3719 } 3720 3721 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3722 if (config.interface == PHY_INTERFACE_MODE_NA) 3723 return -EINVAL; 3724 3725 /* Attach the PHY so that the PHY is present when we do the major 3726 * configuration step. 3727 */ 3728 ret = phylink_attach_phy(pl, phy, config.interface); 3729 if (ret < 0) 3730 return ret; 3731 3732 /* This will validate the configuration for us. */ 3733 ret = phylink_bringup_phy(pl, phy, config.interface); 3734 if (ret < 0) { 3735 phy_detach(phy); 3736 return ret; 3737 } 3738 3739 pl->link_port = pl->sfp_port; 3740 3741 phylink_sfp_set_config(pl, support, &config, true); 3742 3743 return 0; 3744 } 3745 3746 static int phylink_sfp_config_optical(struct phylink *pl) 3747 { 3748 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3749 struct phylink_link_state config; 3750 enum inband_type inband_type; 3751 phy_interface_t interface; 3752 int ret; 3753 3754 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3755 (int)PHY_INTERFACE_MODE_MAX, 3756 pl->config->supported_interfaces, 3757 (int)PHY_INTERFACE_MODE_MAX, 3758 pl->sfp_interfaces); 3759 3760 /* Find the union of the supported interfaces by the PCS/MAC and 3761 * the SFP module. 3762 */ 3763 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3764 pl->sfp_interfaces); 3765 if (phy_interface_empty(pl->sfp_interfaces)) { 3766 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3767 return -EINVAL; 3768 } 3769 3770 memset(&config, 0, sizeof(config)); 3771 linkmode_copy(support, pl->sfp_support); 3772 linkmode_copy(config.advertising, pl->sfp_support); 3773 config.speed = SPEED_UNKNOWN; 3774 config.duplex = DUPLEX_UNKNOWN; 3775 config.pause = MLO_PAUSE_AN; 3776 3777 /* For all the interfaces that are supported, reduce the sfp_support 3778 * mask to only those link modes that can be supported. 3779 */ 3780 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3781 pl->sfp_interfaces); 3782 if (ret) { 3783 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3784 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3785 return ret; 3786 } 3787 3788 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3789 if (interface == PHY_INTERFACE_MODE_NA) { 3790 phylink_err(pl, "failed to select SFP interface\n"); 3791 return -EINVAL; 3792 } 3793 3794 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3795 phy_modes(interface)); 3796 3797 inband_type = phylink_get_inband_type(interface); 3798 if (inband_type == INBAND_NONE) { 3799 /* If this is the sole interface, and there is no inband 3800 * support, clear the advertising mask and Autoneg bit in 3801 * the support mask. Otherwise, just clear the Autoneg bit 3802 * in the advertising mask. 3803 */ 3804 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3805 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3806 pl->sfp_support); 3807 linkmode_zero(config.advertising); 3808 } else { 3809 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3810 config.advertising); 3811 } 3812 } 3813 3814 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3815 config.advertising)) { 3816 phylink_err(pl, "autoneg setting not compatible with PCS"); 3817 return -EINVAL; 3818 } 3819 3820 config.interface = interface; 3821 3822 /* Ignore errors if we're expecting a PHY to attach later */ 3823 ret = phylink_validate(pl, support, &config); 3824 if (ret) { 3825 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3826 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3827 ERR_PTR(ret)); 3828 return ret; 3829 } 3830 3831 pl->link_port = pl->sfp_port; 3832 3833 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3834 3835 return 0; 3836 } 3837 3838 static int phylink_sfp_module_insert(void *upstream, 3839 const struct sfp_eeprom_id *id) 3840 { 3841 const struct sfp_module_caps *caps; 3842 struct phylink *pl = upstream; 3843 3844 ASSERT_RTNL(); 3845 3846 caps = sfp_get_module_caps(pl->sfp_bus); 3847 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3848 linkmode_copy(pl->sfp_support, caps->link_modes); 3849 pl->sfp_may_have_phy = caps->may_have_phy; 3850 pl->sfp_port = caps->port; 3851 3852 /* If this module may have a PHY connecting later, defer until later */ 3853 if (pl->sfp_may_have_phy) 3854 return 0; 3855 3856 return phylink_sfp_config_optical(pl); 3857 } 3858 3859 static void phylink_sfp_module_remove(void *upstream) 3860 { 3861 struct phylink *pl = upstream; 3862 3863 phy_interface_zero(pl->sfp_interfaces); 3864 } 3865 3866 static int phylink_sfp_module_start(void *upstream) 3867 { 3868 struct phylink *pl = upstream; 3869 3870 /* If this SFP module has a PHY, start the PHY now. */ 3871 if (pl->phydev) { 3872 phy_start(pl->phydev); 3873 return 0; 3874 } 3875 3876 /* If the module may have a PHY but we didn't detect one we 3877 * need to configure the MAC here. 3878 */ 3879 if (!pl->sfp_may_have_phy) 3880 return 0; 3881 3882 return phylink_sfp_config_optical(pl); 3883 } 3884 3885 static void phylink_sfp_module_stop(void *upstream) 3886 { 3887 struct phylink *pl = upstream; 3888 3889 /* If this SFP module has a PHY, stop it. */ 3890 if (pl->phydev) 3891 phy_stop(pl->phydev); 3892 } 3893 3894 static void phylink_sfp_link_down(void *upstream) 3895 { 3896 struct phylink *pl = upstream; 3897 3898 ASSERT_RTNL(); 3899 3900 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3901 } 3902 3903 static void phylink_sfp_link_up(void *upstream) 3904 { 3905 struct phylink *pl = upstream; 3906 3907 ASSERT_RTNL(); 3908 3909 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3910 } 3911 3912 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3913 { 3914 struct phylink *pl = upstream; 3915 3916 if (!phy->drv) { 3917 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3918 phydev_name(phy), (unsigned long)phy->phy_id); 3919 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3920 return -EINVAL; 3921 } 3922 3923 /* 3924 * This is the new way of dealing with flow control for PHYs, 3925 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3926 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3927 * using our validate call to the MAC, we rely upon the MAC 3928 * clearing the bits from both supported and advertising fields. 3929 */ 3930 phy_support_asym_pause(phy); 3931 3932 /* Set the PHY's host supported interfaces */ 3933 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3934 pl->config->supported_interfaces); 3935 3936 /* Do the initial configuration */ 3937 return phylink_sfp_config_phy(pl, phy); 3938 } 3939 3940 static void phylink_sfp_disconnect_phy(void *upstream, 3941 struct phy_device *phydev) 3942 { 3943 phylink_disconnect_phy(upstream); 3944 } 3945 3946 static const struct sfp_upstream_ops sfp_phylink_ops = { 3947 .attach = phylink_sfp_attach, 3948 .detach = phylink_sfp_detach, 3949 .module_insert = phylink_sfp_module_insert, 3950 .module_remove = phylink_sfp_module_remove, 3951 .module_start = phylink_sfp_module_start, 3952 .module_stop = phylink_sfp_module_stop, 3953 .link_up = phylink_sfp_link_up, 3954 .link_down = phylink_sfp_link_down, 3955 .connect_phy = phylink_sfp_connect_phy, 3956 .disconnect_phy = phylink_sfp_disconnect_phy, 3957 }; 3958 3959 /* Helpers for MAC drivers */ 3960 3961 static struct { 3962 int bit; 3963 int speed; 3964 } phylink_c73_priority_resolution[] = { 3965 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3966 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3967 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3968 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3969 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3970 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3971 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3972 /* 5GBASE-KR not supported */ 3973 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3974 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3975 }; 3976 3977 void phylink_resolve_c73(struct phylink_link_state *state) 3978 { 3979 int i; 3980 3981 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3982 int bit = phylink_c73_priority_resolution[i].bit; 3983 if (linkmode_test_bit(bit, state->advertising) && 3984 linkmode_test_bit(bit, state->lp_advertising)) 3985 break; 3986 } 3987 3988 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3989 state->speed = phylink_c73_priority_resolution[i].speed; 3990 state->duplex = DUPLEX_FULL; 3991 } else { 3992 /* negotiation failure */ 3993 state->link = false; 3994 } 3995 3996 phylink_resolve_an_pause(state); 3997 } 3998 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3999 4000 static void phylink_decode_c37_word(struct phylink_link_state *state, 4001 uint16_t config_reg, int speed) 4002 { 4003 int fd_bit; 4004 4005 if (speed == SPEED_2500) 4006 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4007 else 4008 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4009 4010 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4011 4012 if (linkmode_test_bit(fd_bit, state->advertising) && 4013 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4014 state->speed = speed; 4015 state->duplex = DUPLEX_FULL; 4016 } else { 4017 /* negotiation failure */ 4018 state->link = false; 4019 } 4020 4021 phylink_resolve_an_pause(state); 4022 } 4023 4024 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4025 uint16_t config_reg) 4026 { 4027 if (!(config_reg & LPA_SGMII_LINK)) { 4028 state->link = false; 4029 return; 4030 } 4031 4032 switch (config_reg & LPA_SGMII_SPD_MASK) { 4033 case LPA_SGMII_10: 4034 state->speed = SPEED_10; 4035 break; 4036 case LPA_SGMII_100: 4037 state->speed = SPEED_100; 4038 break; 4039 case LPA_SGMII_1000: 4040 state->speed = SPEED_1000; 4041 break; 4042 default: 4043 state->link = false; 4044 return; 4045 } 4046 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4047 state->duplex = DUPLEX_FULL; 4048 else 4049 state->duplex = DUPLEX_HALF; 4050 } 4051 4052 /** 4053 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4054 * @state: a pointer to a struct phylink_link_state. 4055 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4056 * 4057 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4058 * code word. Decode the USXGMII code word and populate the corresponding fields 4059 * (speed, duplex) into the phylink_link_state structure. 4060 */ 4061 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4062 uint16_t lpa) 4063 { 4064 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4065 case MDIO_USXGMII_10: 4066 state->speed = SPEED_10; 4067 break; 4068 case MDIO_USXGMII_100: 4069 state->speed = SPEED_100; 4070 break; 4071 case MDIO_USXGMII_1000: 4072 state->speed = SPEED_1000; 4073 break; 4074 case MDIO_USXGMII_2500: 4075 state->speed = SPEED_2500; 4076 break; 4077 case MDIO_USXGMII_5000: 4078 state->speed = SPEED_5000; 4079 break; 4080 case MDIO_USXGMII_10G: 4081 state->speed = SPEED_10000; 4082 break; 4083 default: 4084 state->link = false; 4085 return; 4086 } 4087 4088 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4089 state->duplex = DUPLEX_FULL; 4090 else 4091 state->duplex = DUPLEX_HALF; 4092 } 4093 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4094 4095 /** 4096 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4097 * @state: a pointer to a struct phylink_link_state. 4098 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4099 * 4100 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4101 * code word. Decode the USGMII code word and populate the corresponding fields 4102 * (speed, duplex) into the phylink_link_state structure. The structure for this 4103 * word is the same as the USXGMII word, except it only supports speeds up to 4104 * 1Gbps. 4105 */ 4106 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4107 uint16_t lpa) 4108 { 4109 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4110 case MDIO_USXGMII_10: 4111 state->speed = SPEED_10; 4112 break; 4113 case MDIO_USXGMII_100: 4114 state->speed = SPEED_100; 4115 break; 4116 case MDIO_USXGMII_1000: 4117 state->speed = SPEED_1000; 4118 break; 4119 default: 4120 state->link = false; 4121 return; 4122 } 4123 4124 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4125 state->duplex = DUPLEX_FULL; 4126 else 4127 state->duplex = DUPLEX_HALF; 4128 } 4129 4130 /** 4131 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4132 * @state: a pointer to a &struct phylink_link_state. 4133 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4134 * @bmsr: The value of the %MII_BMSR register 4135 * @lpa: The value of the %MII_LPA register 4136 * 4137 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4138 * clause 37 negotiation and/or SGMII control. 4139 * 4140 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4141 * the phylink @state structure. This is suitable to be used for implementing 4142 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4143 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4144 */ 4145 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4146 unsigned int neg_mode, u16 bmsr, u16 lpa) 4147 { 4148 state->link = !!(bmsr & BMSR_LSTATUS); 4149 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4150 4151 /* If the link is down, the advertisement data is undefined. */ 4152 if (!state->link) 4153 return; 4154 4155 switch (state->interface) { 4156 case PHY_INTERFACE_MODE_1000BASEX: 4157 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4158 phylink_decode_c37_word(state, lpa, SPEED_1000); 4159 } else { 4160 state->speed = SPEED_1000; 4161 state->duplex = DUPLEX_FULL; 4162 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4163 } 4164 break; 4165 4166 case PHY_INTERFACE_MODE_2500BASEX: 4167 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4168 phylink_decode_c37_word(state, lpa, SPEED_2500); 4169 } else { 4170 state->speed = SPEED_2500; 4171 state->duplex = DUPLEX_FULL; 4172 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4173 } 4174 break; 4175 4176 case PHY_INTERFACE_MODE_SGMII: 4177 case PHY_INTERFACE_MODE_QSGMII: 4178 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4179 phylink_decode_sgmii_word(state, lpa); 4180 break; 4181 4182 case PHY_INTERFACE_MODE_QUSGMII: 4183 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4184 phylink_decode_usgmii_word(state, lpa); 4185 break; 4186 4187 default: 4188 state->link = false; 4189 break; 4190 } 4191 } 4192 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4193 4194 /** 4195 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4196 * @pcs: a pointer to a &struct mdio_device. 4197 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4198 * @state: a pointer to a &struct phylink_link_state. 4199 * 4200 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4201 * clause 37 negotiation and/or SGMII control. 4202 * 4203 * Read the MAC PCS state from the MII device configured in @config and 4204 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4205 * the phylink @state structure. This is suitable to be directly plugged 4206 * into the pcs_get_state() member of the struct phylink_pcs_ops 4207 * structure. 4208 */ 4209 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4210 unsigned int neg_mode, 4211 struct phylink_link_state *state) 4212 { 4213 int bmsr, lpa; 4214 4215 bmsr = mdiodev_read(pcs, MII_BMSR); 4216 lpa = mdiodev_read(pcs, MII_LPA); 4217 if (bmsr < 0 || lpa < 0) { 4218 state->link = false; 4219 return; 4220 } 4221 4222 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4223 } 4224 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4225 4226 /** 4227 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4228 * advertisement 4229 * @interface: the PHY interface mode being configured 4230 * @advertising: the ethtool advertisement mask 4231 * 4232 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4233 * clause 37 negotiation and/or SGMII control. 4234 * 4235 * Encode the clause 37 PCS advertisement as specified by @interface and 4236 * @advertising. 4237 * 4238 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4239 */ 4240 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4241 const unsigned long *advertising) 4242 { 4243 u16 adv; 4244 4245 switch (interface) { 4246 case PHY_INTERFACE_MODE_1000BASEX: 4247 case PHY_INTERFACE_MODE_2500BASEX: 4248 adv = ADVERTISE_1000XFULL; 4249 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4250 advertising)) 4251 adv |= ADVERTISE_1000XPAUSE; 4252 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4253 advertising)) 4254 adv |= ADVERTISE_1000XPSE_ASYM; 4255 return adv; 4256 case PHY_INTERFACE_MODE_SGMII: 4257 case PHY_INTERFACE_MODE_QSGMII: 4258 return 0x0001; 4259 default: 4260 /* Nothing to do for other modes */ 4261 return -EINVAL; 4262 } 4263 } 4264 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4265 4266 /** 4267 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4268 * @pcs: a pointer to a &struct mdio_device. 4269 * @interface: the PHY interface mode being configured 4270 * @advertising: the ethtool advertisement mask 4271 * @neg_mode: PCS negotiation mode 4272 * 4273 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4274 * parameters for the @mode, @interface and @advertising parameters. 4275 * Returns negative error number on failure, zero if the advertisement 4276 * has not changed, or positive if there is a change. 4277 */ 4278 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4279 phy_interface_t interface, 4280 const unsigned long *advertising, 4281 unsigned int neg_mode) 4282 { 4283 bool changed = 0; 4284 u16 bmcr; 4285 int ret, adv; 4286 4287 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4288 if (adv >= 0) { 4289 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4290 MII_ADVERTISE, 0xffff, adv); 4291 if (ret < 0) 4292 return ret; 4293 changed = ret; 4294 } 4295 4296 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4297 bmcr = BMCR_ANENABLE; 4298 else 4299 bmcr = 0; 4300 4301 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4302 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4303 if (ret < 0) 4304 return ret; 4305 4306 return changed; 4307 } 4308 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4309 4310 /** 4311 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4312 * @pcs: a pointer to a &struct mdio_device. 4313 * 4314 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4315 * clause 37 negotiation. 4316 * 4317 * Restart the clause 37 negotiation with the link partner. This is 4318 * suitable to be directly plugged into the pcs_get_state() member 4319 * of the struct phylink_pcs_ops structure. 4320 */ 4321 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4322 { 4323 int val = mdiodev_read(pcs, MII_BMCR); 4324 4325 if (val >= 0) { 4326 val |= BMCR_ANRESTART; 4327 4328 mdiodev_write(pcs, MII_BMCR, val); 4329 } 4330 } 4331 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4332 4333 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4334 struct phylink_link_state *state) 4335 { 4336 struct mii_bus *bus = pcs->bus; 4337 int addr = pcs->addr; 4338 int stat; 4339 4340 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4341 if (stat < 0) { 4342 state->link = false; 4343 return; 4344 } 4345 4346 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4347 if (!state->link) 4348 return; 4349 4350 switch (state->interface) { 4351 case PHY_INTERFACE_MODE_10GBASER: 4352 state->speed = SPEED_10000; 4353 state->duplex = DUPLEX_FULL; 4354 break; 4355 4356 default: 4357 break; 4358 } 4359 } 4360 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4361 4362 static int __init phylink_init(void) 4363 { 4364 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4365 __set_bit(phylink_sfp_interface_preference[i], 4366 phylink_sfp_interfaces); 4367 4368 return 0; 4369 } 4370 4371 module_init(phylink_init); 4372 4373 MODULE_LICENSE("GPL v2"); 4374 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4375