1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 60 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 61 u8 link_port; /* The current non-phy ethtool port */ 62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 63 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 64 65 /* The link configuration settings */ 66 struct phylink_link_state link_config; 67 68 /* The current settings */ 69 phy_interface_t cur_interface; 70 71 struct gpio_desc *link_gpio; 72 unsigned int link_irq; 73 struct timer_list link_poll; 74 void (*get_fixed_state)(struct net_device *dev, 75 struct phylink_link_state *s); 76 77 struct mutex state_mutex; 78 struct phylink_link_state phy_state; 79 unsigned int phy_ib_mode; 80 struct work_struct resolve; 81 unsigned int pcs_neg_mode; 82 unsigned int pcs_state; 83 84 bool link_failed; 85 bool mac_supports_eee_ops; 86 bool mac_supports_eee; 87 bool phy_enable_tx_lpi; 88 bool mac_enable_tx_lpi; 89 bool mac_tx_clk_stop; 90 u32 mac_tx_lpi_timer; 91 92 struct sfp_bus *sfp_bus; 93 bool sfp_may_have_phy; 94 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 95 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 96 u8 sfp_port; 97 98 struct eee_config eee_cfg; 99 }; 100 101 #define phylink_printk(level, pl, fmt, ...) \ 102 do { \ 103 if ((pl)->config->type == PHYLINK_NETDEV) \ 104 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 105 else if ((pl)->config->type == PHYLINK_DEV) \ 106 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 107 } while (0) 108 109 #define phylink_err(pl, fmt, ...) \ 110 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 111 #define phylink_warn(pl, fmt, ...) \ 112 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 113 #define phylink_info(pl, fmt, ...) \ 114 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 115 #if defined(CONFIG_DYNAMIC_DEBUG) 116 #define phylink_dbg(pl, fmt, ...) \ 117 do { \ 118 if ((pl)->config->type == PHYLINK_NETDEV) \ 119 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 120 else if ((pl)->config->type == PHYLINK_DEV) \ 121 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 122 } while (0) 123 #elif defined(DEBUG) 124 #define phylink_dbg(pl, fmt, ...) \ 125 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 126 #else 127 #define phylink_dbg(pl, fmt, ...) \ 128 ({ \ 129 if (0) \ 130 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 131 }) 132 #endif 133 134 static const phy_interface_t phylink_sfp_interface_preference[] = { 135 PHY_INTERFACE_MODE_25GBASER, 136 PHY_INTERFACE_MODE_USXGMII, 137 PHY_INTERFACE_MODE_10GBASER, 138 PHY_INTERFACE_MODE_5GBASER, 139 PHY_INTERFACE_MODE_2500BASEX, 140 PHY_INTERFACE_MODE_SGMII, 141 PHY_INTERFACE_MODE_1000BASEX, 142 PHY_INTERFACE_MODE_100BASEX, 143 }; 144 145 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 146 147 /** 148 * phylink_set_port_modes() - set the port type modes in the ethtool mask 149 * @mask: ethtool link mode mask 150 * 151 * Sets all the port type modes in the ethtool mask. MAC drivers should 152 * use this in their 'validate' callback. 153 */ 154 void phylink_set_port_modes(unsigned long *mask) 155 { 156 phylink_set(mask, TP); 157 phylink_set(mask, AUI); 158 phylink_set(mask, MII); 159 phylink_set(mask, FIBRE); 160 phylink_set(mask, BNC); 161 phylink_set(mask, Backplane); 162 } 163 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 164 165 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 166 { 167 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 168 169 phylink_set_port_modes(tmp); 170 phylink_set(tmp, Autoneg); 171 phylink_set(tmp, Pause); 172 phylink_set(tmp, Asym_Pause); 173 174 return linkmode_subset(linkmode, tmp); 175 } 176 177 static const char *phylink_an_mode_str(unsigned int mode) 178 { 179 static const char *modestr[] = { 180 [MLO_AN_PHY] = "phy", 181 [MLO_AN_FIXED] = "fixed", 182 [MLO_AN_INBAND] = "inband", 183 }; 184 185 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 186 } 187 188 static const char *phylink_pcs_mode_str(unsigned int mode) 189 { 190 if (!mode) 191 return "none"; 192 193 if (mode & PHYLINK_PCS_NEG_OUTBAND) 194 return "outband"; 195 196 if (mode & PHYLINK_PCS_NEG_INBAND) { 197 if (mode & PHYLINK_PCS_NEG_ENABLED) 198 return "inband,an-enabled"; 199 else 200 return "inband,an-disabled"; 201 } 202 203 return "unknown"; 204 } 205 206 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 207 { 208 switch (interface) { 209 case PHY_INTERFACE_MODE_SGMII: 210 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 211 return 1250; 212 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 213 return 3125; 214 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 215 return 5156; 216 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 217 return 10313; 218 default: 219 return 0; 220 } 221 } 222 223 /** 224 * phylink_interface_max_speed() - get the maximum speed of a phy interface 225 * @interface: phy interface mode defined by &typedef phy_interface_t 226 * 227 * Determine the maximum speed of a phy interface. This is intended to help 228 * determine the correct speed to pass to the MAC when the phy is performing 229 * rate matching. 230 * 231 * Return: The maximum speed of @interface 232 */ 233 static int phylink_interface_max_speed(phy_interface_t interface) 234 { 235 switch (interface) { 236 case PHY_INTERFACE_MODE_100BASEX: 237 case PHY_INTERFACE_MODE_REVRMII: 238 case PHY_INTERFACE_MODE_RMII: 239 case PHY_INTERFACE_MODE_SMII: 240 case PHY_INTERFACE_MODE_REVMII: 241 case PHY_INTERFACE_MODE_MII: 242 return SPEED_100; 243 244 case PHY_INTERFACE_MODE_TBI: 245 case PHY_INTERFACE_MODE_MOCA: 246 case PHY_INTERFACE_MODE_RTBI: 247 case PHY_INTERFACE_MODE_1000BASEX: 248 case PHY_INTERFACE_MODE_1000BASEKX: 249 case PHY_INTERFACE_MODE_TRGMII: 250 case PHY_INTERFACE_MODE_RGMII_TXID: 251 case PHY_INTERFACE_MODE_RGMII_RXID: 252 case PHY_INTERFACE_MODE_RGMII_ID: 253 case PHY_INTERFACE_MODE_RGMII: 254 case PHY_INTERFACE_MODE_PSGMII: 255 case PHY_INTERFACE_MODE_QSGMII: 256 case PHY_INTERFACE_MODE_QUSGMII: 257 case PHY_INTERFACE_MODE_SGMII: 258 case PHY_INTERFACE_MODE_GMII: 259 return SPEED_1000; 260 261 case PHY_INTERFACE_MODE_2500BASEX: 262 case PHY_INTERFACE_MODE_10G_QXGMII: 263 return SPEED_2500; 264 265 case PHY_INTERFACE_MODE_5GBASER: 266 return SPEED_5000; 267 268 case PHY_INTERFACE_MODE_XGMII: 269 case PHY_INTERFACE_MODE_RXAUI: 270 case PHY_INTERFACE_MODE_XAUI: 271 case PHY_INTERFACE_MODE_10GBASER: 272 case PHY_INTERFACE_MODE_10GKR: 273 case PHY_INTERFACE_MODE_USXGMII: 274 return SPEED_10000; 275 276 case PHY_INTERFACE_MODE_25GBASER: 277 return SPEED_25000; 278 279 case PHY_INTERFACE_MODE_XLGMII: 280 return SPEED_40000; 281 282 case PHY_INTERFACE_MODE_INTERNAL: 283 case PHY_INTERFACE_MODE_NA: 284 case PHY_INTERFACE_MODE_MAX: 285 /* No idea! Garbage in, unknown out */ 286 return SPEED_UNKNOWN; 287 } 288 289 /* If we get here, someone forgot to add an interface mode above */ 290 WARN_ON_ONCE(1); 291 return SPEED_UNKNOWN; 292 } 293 294 /** 295 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 296 * @linkmodes: ethtool linkmode mask (must be already initialised) 297 * @caps: bitmask of MAC capabilities 298 * 299 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 300 * supported by the @caps. @linkmodes must have been initialised previously. 301 */ 302 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 303 unsigned long caps) 304 { 305 if (caps & MAC_SYM_PAUSE) 306 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 307 308 if (caps & MAC_ASYM_PAUSE) 309 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 310 311 if (caps & MAC_10HD) { 312 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 315 } 316 317 if (caps & MAC_10FD) { 318 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 319 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 320 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 321 } 322 323 if (caps & MAC_100HD) { 324 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 326 } 327 328 if (caps & MAC_100FD) { 329 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 332 } 333 334 if (caps & MAC_1000HD) 335 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 336 337 if (caps & MAC_1000FD) { 338 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 342 } 343 344 if (caps & MAC_2500FD) { 345 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 347 } 348 349 if (caps & MAC_5000FD) 350 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 351 352 if (caps & MAC_10000FD) { 353 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 359 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 362 } 363 364 if (caps & MAC_25000FD) { 365 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 368 } 369 370 if (caps & MAC_40000FD) { 371 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 375 } 376 377 if (caps & MAC_50000FD) { 378 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 385 linkmodes); 386 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 387 } 388 389 if (caps & MAC_56000FD) { 390 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 394 } 395 396 if (caps & MAC_100000FD) { 397 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 401 linkmodes); 402 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 403 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 411 linkmodes); 412 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 414 } 415 416 if (caps & MAC_200000FD) { 417 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 418 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 419 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 420 linkmodes); 421 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 422 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 423 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 424 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 425 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 426 linkmodes); 427 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 428 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 429 } 430 431 if (caps & MAC_400000FD) { 432 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 433 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 434 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 435 linkmodes); 436 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 437 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 438 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 439 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 440 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 441 linkmodes); 442 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 443 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 444 } 445 } 446 447 static struct { 448 unsigned long mask; 449 int speed; 450 unsigned int duplex; 451 } phylink_caps_params[] = { 452 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 453 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 454 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 455 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 456 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 457 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 458 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 459 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 460 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 461 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 462 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 463 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 464 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 465 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 466 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 467 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 468 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 469 }; 470 471 /** 472 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 473 * @config: pointer to a &struct phylink_config 474 * @max_speed: maximum speed 475 * 476 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 477 * Any further motifications of config.mac_capabilities will override this. 478 */ 479 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 480 { 481 int i; 482 483 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 484 phylink_caps_params[i].speed > max_speed; i++) 485 config->mac_capabilities &= ~phylink_caps_params[i].mask; 486 } 487 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 488 489 /** 490 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 491 * @speed: the speed to search for 492 * @duplex: the duplex to search for 493 * 494 * Find the mac capability for a given speed and duplex. 495 * 496 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 497 * there were no matches. 498 */ 499 static unsigned long phylink_cap_from_speed_duplex(int speed, 500 unsigned int duplex) 501 { 502 int i; 503 504 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 505 if (speed == phylink_caps_params[i].speed && 506 duplex == phylink_caps_params[i].duplex) 507 return phylink_caps_params[i].mask; 508 } 509 510 return 0; 511 } 512 513 /** 514 * phylink_get_capabilities() - get capabilities for a given MAC 515 * @interface: phy interface mode defined by &typedef phy_interface_t 516 * @mac_capabilities: bitmask of MAC capabilities 517 * @rate_matching: type of rate matching being performed 518 * 519 * Get the MAC capabilities that are supported by the @interface mode and 520 * @mac_capabilities. 521 */ 522 static unsigned long phylink_get_capabilities(phy_interface_t interface, 523 unsigned long mac_capabilities, 524 int rate_matching) 525 { 526 int max_speed = phylink_interface_max_speed(interface); 527 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 528 unsigned long matched_caps = 0; 529 530 switch (interface) { 531 case PHY_INTERFACE_MODE_USXGMII: 532 caps |= MAC_10000FD | MAC_5000FD; 533 fallthrough; 534 535 case PHY_INTERFACE_MODE_10G_QXGMII: 536 caps |= MAC_2500FD; 537 fallthrough; 538 539 case PHY_INTERFACE_MODE_RGMII_TXID: 540 case PHY_INTERFACE_MODE_RGMII_RXID: 541 case PHY_INTERFACE_MODE_RGMII_ID: 542 case PHY_INTERFACE_MODE_RGMII: 543 case PHY_INTERFACE_MODE_PSGMII: 544 case PHY_INTERFACE_MODE_QSGMII: 545 case PHY_INTERFACE_MODE_QUSGMII: 546 case PHY_INTERFACE_MODE_SGMII: 547 case PHY_INTERFACE_MODE_GMII: 548 caps |= MAC_1000HD | MAC_1000FD; 549 fallthrough; 550 551 case PHY_INTERFACE_MODE_REVRMII: 552 case PHY_INTERFACE_MODE_RMII: 553 case PHY_INTERFACE_MODE_SMII: 554 case PHY_INTERFACE_MODE_REVMII: 555 case PHY_INTERFACE_MODE_MII: 556 caps |= MAC_10HD | MAC_10FD; 557 fallthrough; 558 559 case PHY_INTERFACE_MODE_100BASEX: 560 caps |= MAC_100HD | MAC_100FD; 561 break; 562 563 case PHY_INTERFACE_MODE_TBI: 564 case PHY_INTERFACE_MODE_MOCA: 565 case PHY_INTERFACE_MODE_RTBI: 566 case PHY_INTERFACE_MODE_1000BASEX: 567 caps |= MAC_1000HD; 568 fallthrough; 569 case PHY_INTERFACE_MODE_1000BASEKX: 570 case PHY_INTERFACE_MODE_TRGMII: 571 caps |= MAC_1000FD; 572 break; 573 574 case PHY_INTERFACE_MODE_2500BASEX: 575 caps |= MAC_2500FD; 576 break; 577 578 case PHY_INTERFACE_MODE_5GBASER: 579 caps |= MAC_5000FD; 580 break; 581 582 case PHY_INTERFACE_MODE_XGMII: 583 case PHY_INTERFACE_MODE_RXAUI: 584 case PHY_INTERFACE_MODE_XAUI: 585 case PHY_INTERFACE_MODE_10GBASER: 586 case PHY_INTERFACE_MODE_10GKR: 587 caps |= MAC_10000FD; 588 break; 589 590 case PHY_INTERFACE_MODE_25GBASER: 591 caps |= MAC_25000FD; 592 break; 593 594 case PHY_INTERFACE_MODE_XLGMII: 595 caps |= MAC_40000FD; 596 break; 597 598 case PHY_INTERFACE_MODE_INTERNAL: 599 caps |= ~0; 600 break; 601 602 case PHY_INTERFACE_MODE_NA: 603 case PHY_INTERFACE_MODE_MAX: 604 break; 605 } 606 607 switch (rate_matching) { 608 case RATE_MATCH_OPEN_LOOP: 609 /* TODO */ 610 fallthrough; 611 case RATE_MATCH_NONE: 612 matched_caps = 0; 613 break; 614 case RATE_MATCH_PAUSE: { 615 /* The MAC must support asymmetric pause towards the local 616 * device for this. We could allow just symmetric pause, but 617 * then we might have to renegotiate if the link partner 618 * doesn't support pause. This is because there's no way to 619 * accept pause frames without transmitting them if we only 620 * support symmetric pause. 621 */ 622 if (!(mac_capabilities & MAC_SYM_PAUSE) || 623 !(mac_capabilities & MAC_ASYM_PAUSE)) 624 break; 625 626 /* We can't adapt if the MAC doesn't support the interface's 627 * max speed at full duplex. 628 */ 629 if (mac_capabilities & 630 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 631 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 632 break; 633 } 634 case RATE_MATCH_CRS: 635 /* The MAC must support half duplex at the interface's max 636 * speed. 637 */ 638 if (mac_capabilities & 639 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 640 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 641 matched_caps &= mac_capabilities; 642 } 643 break; 644 } 645 646 return (caps & mac_capabilities) | matched_caps; 647 } 648 649 /** 650 * phylink_validate_mask_caps() - Restrict link modes based on caps 651 * @supported: ethtool bitmask for supported link modes. 652 * @state: pointer to a &struct phylink_link_state. 653 * @mac_capabilities: bitmask of MAC capabilities 654 * 655 * Calculate the supported link modes based on @mac_capabilities, and restrict 656 * @supported and @state based on that. Use this function if your capabiliies 657 * aren't constant, such as if they vary depending on the interface. 658 */ 659 static void phylink_validate_mask_caps(unsigned long *supported, 660 struct phylink_link_state *state, 661 unsigned long mac_capabilities) 662 { 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 unsigned long caps; 665 666 phylink_set_port_modes(mask); 667 phylink_set(mask, Autoneg); 668 caps = phylink_get_capabilities(state->interface, mac_capabilities, 669 state->rate_matching); 670 phylink_caps_to_linkmodes(mask, caps); 671 672 linkmode_and(supported, supported, mask); 673 linkmode_and(state->advertising, state->advertising, mask); 674 } 675 676 static int phylink_validate_mac_and_pcs(struct phylink *pl, 677 unsigned long *supported, 678 struct phylink_link_state *state) 679 { 680 struct phylink_pcs *pcs = NULL; 681 unsigned long capabilities; 682 int ret; 683 684 /* Get the PCS for this interface mode */ 685 if (pl->mac_ops->mac_select_pcs) { 686 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 687 if (IS_ERR(pcs)) 688 return PTR_ERR(pcs); 689 } 690 691 if (pcs) { 692 /* The PCS, if present, must be setup before phylink_create() 693 * has been called. If the ops is not initialised, print an 694 * error and backtrace rather than oopsing the kernel. 695 */ 696 if (!pcs->ops) { 697 phylink_err(pl, "interface %s: uninitialised PCS\n", 698 phy_modes(state->interface)); 699 dump_stack(); 700 return -EINVAL; 701 } 702 703 /* Ensure that this PCS supports the interface which the MAC 704 * returned it for. It is an error for the MAC to return a PCS 705 * that does not support the interface mode. 706 */ 707 if (!phy_interface_empty(pcs->supported_interfaces) && 708 !test_bit(state->interface, pcs->supported_interfaces)) { 709 phylink_err(pl, "MAC returned PCS which does not support %s\n", 710 phy_modes(state->interface)); 711 return -EINVAL; 712 } 713 714 /* Validate the link parameters with the PCS */ 715 if (pcs->ops->pcs_validate) { 716 ret = pcs->ops->pcs_validate(pcs, supported, state); 717 if (ret < 0 || phylink_is_empty_linkmode(supported)) 718 return -EINVAL; 719 720 /* Ensure the advertising mask is a subset of the 721 * supported mask. 722 */ 723 linkmode_and(state->advertising, state->advertising, 724 supported); 725 } 726 } 727 728 /* Then validate the link parameters with the MAC */ 729 if (pl->mac_ops->mac_get_caps) 730 capabilities = pl->mac_ops->mac_get_caps(pl->config, 731 state->interface); 732 else 733 capabilities = pl->config->mac_capabilities; 734 735 phylink_validate_mask_caps(supported, state, capabilities); 736 737 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 738 } 739 740 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 741 const unsigned long *supported, 742 const struct phylink_link_state *state, 743 phy_interface_t interface, 744 unsigned long *accum_supported, 745 unsigned long *accum_advertising) 746 { 747 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 748 struct phylink_link_state tmp_state; 749 750 linkmode_copy(tmp_supported, supported); 751 752 tmp_state = *state; 753 tmp_state.interface = interface; 754 755 if (phy) 756 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 757 758 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 759 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 760 interface, phy_modes(interface), 761 phy_rate_matching_to_str(tmp_state.rate_matching), 762 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 763 764 linkmode_or(accum_supported, accum_supported, tmp_supported); 765 linkmode_or(accum_advertising, accum_advertising, 766 tmp_state.advertising); 767 } 768 } 769 770 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 771 unsigned long *supported, 772 struct phylink_link_state *state, 773 const unsigned long *interfaces) 774 { 775 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 776 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 777 int interface; 778 779 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 780 phylink_validate_one(pl, phy, supported, state, interface, 781 all_s, all_adv); 782 783 linkmode_copy(supported, all_s); 784 linkmode_copy(state->advertising, all_adv); 785 786 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 787 } 788 789 static int phylink_validate(struct phylink *pl, unsigned long *supported, 790 struct phylink_link_state *state) 791 { 792 const unsigned long *interfaces = pl->config->supported_interfaces; 793 794 if (state->interface == PHY_INTERFACE_MODE_NA) 795 return phylink_validate_mask(pl, NULL, supported, state, 796 interfaces); 797 798 if (!test_bit(state->interface, interfaces)) 799 return -EINVAL; 800 801 return phylink_validate_mac_and_pcs(pl, supported, state); 802 } 803 804 static int phylink_parse_fixedlink(struct phylink *pl, 805 const struct fwnode_handle *fwnode) 806 { 807 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 808 struct fwnode_handle *fixed_node; 809 const struct phy_setting *s; 810 struct gpio_desc *desc; 811 u32 speed; 812 int ret; 813 814 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 815 if (fixed_node) { 816 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 817 818 pl->link_config.speed = speed; 819 pl->link_config.duplex = DUPLEX_HALF; 820 821 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 822 pl->link_config.duplex = DUPLEX_FULL; 823 824 /* We treat the "pause" and "asym-pause" terminology as 825 * defining the link partner's ability. 826 */ 827 if (fwnode_property_read_bool(fixed_node, "pause")) 828 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 829 pl->link_config.lp_advertising); 830 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 831 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 832 pl->link_config.lp_advertising); 833 834 if (ret == 0) { 835 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 836 GPIOD_IN, "?"); 837 838 if (!IS_ERR(desc)) 839 pl->link_gpio = desc; 840 else if (desc == ERR_PTR(-EPROBE_DEFER)) 841 ret = -EPROBE_DEFER; 842 } 843 fwnode_handle_put(fixed_node); 844 845 if (ret) 846 return ret; 847 } else { 848 u32 prop[5]; 849 850 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 851 NULL, 0); 852 if (ret != ARRAY_SIZE(prop)) { 853 phylink_err(pl, "broken fixed-link?\n"); 854 return -EINVAL; 855 } 856 857 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 858 prop, ARRAY_SIZE(prop)); 859 if (!ret) { 860 pl->link_config.duplex = prop[1] ? 861 DUPLEX_FULL : DUPLEX_HALF; 862 pl->link_config.speed = prop[2]; 863 if (prop[3]) 864 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 865 pl->link_config.lp_advertising); 866 if (prop[4]) 867 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 868 pl->link_config.lp_advertising); 869 } 870 } 871 872 if (pl->link_config.speed > SPEED_1000 && 873 pl->link_config.duplex != DUPLEX_FULL) 874 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 875 pl->link_config.speed); 876 877 linkmode_fill(pl->supported); 878 linkmode_copy(pl->link_config.advertising, pl->supported); 879 phylink_validate(pl, pl->supported, &pl->link_config); 880 881 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 882 pl->supported, true); 883 884 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 885 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 886 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 887 linkmode_and(pl->supported, pl->supported, mask); 888 889 phylink_set(pl->supported, MII); 890 891 if (s) { 892 __set_bit(s->bit, pl->supported); 893 __set_bit(s->bit, pl->link_config.lp_advertising); 894 } else { 895 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 896 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 897 pl->link_config.speed); 898 } 899 900 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 901 pl->supported); 902 903 pl->link_config.link = 1; 904 pl->link_config.an_complete = 1; 905 906 return 0; 907 } 908 909 static int phylink_parse_mode(struct phylink *pl, 910 const struct fwnode_handle *fwnode) 911 { 912 struct fwnode_handle *dn; 913 const char *managed; 914 unsigned long caps; 915 916 if (pl->config->default_an_inband) 917 pl->cfg_link_an_mode = MLO_AN_INBAND; 918 919 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 920 if (dn || fwnode_property_present(fwnode, "fixed-link")) 921 pl->cfg_link_an_mode = MLO_AN_FIXED; 922 fwnode_handle_put(dn); 923 924 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 925 strcmp(managed, "in-band-status") == 0)) { 926 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 927 phylink_err(pl, 928 "can't use both fixed-link and in-band-status\n"); 929 return -EINVAL; 930 } 931 932 pl->cfg_link_an_mode = MLO_AN_INBAND; 933 } 934 935 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 936 linkmode_zero(pl->supported); 937 phylink_set(pl->supported, MII); 938 phylink_set(pl->supported, Autoneg); 939 phylink_set(pl->supported, Asym_Pause); 940 phylink_set(pl->supported, Pause); 941 942 switch (pl->link_config.interface) { 943 case PHY_INTERFACE_MODE_SGMII: 944 case PHY_INTERFACE_MODE_PSGMII: 945 case PHY_INTERFACE_MODE_QSGMII: 946 case PHY_INTERFACE_MODE_QUSGMII: 947 case PHY_INTERFACE_MODE_RGMII: 948 case PHY_INTERFACE_MODE_RGMII_ID: 949 case PHY_INTERFACE_MODE_RGMII_RXID: 950 case PHY_INTERFACE_MODE_RGMII_TXID: 951 case PHY_INTERFACE_MODE_RTBI: 952 case PHY_INTERFACE_MODE_1000BASEX: 953 case PHY_INTERFACE_MODE_2500BASEX: 954 case PHY_INTERFACE_MODE_5GBASER: 955 case PHY_INTERFACE_MODE_25GBASER: 956 case PHY_INTERFACE_MODE_USXGMII: 957 case PHY_INTERFACE_MODE_10G_QXGMII: 958 case PHY_INTERFACE_MODE_10GKR: 959 case PHY_INTERFACE_MODE_10GBASER: 960 case PHY_INTERFACE_MODE_XLGMII: 961 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 962 caps = phylink_get_capabilities(pl->link_config.interface, caps, 963 RATE_MATCH_NONE); 964 phylink_caps_to_linkmodes(pl->supported, caps); 965 break; 966 967 default: 968 phylink_err(pl, 969 "incorrect link mode %s for in-band status\n", 970 phy_modes(pl->link_config.interface)); 971 return -EINVAL; 972 } 973 974 linkmode_copy(pl->link_config.advertising, pl->supported); 975 976 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 977 phylink_err(pl, 978 "failed to validate link configuration for in-band status\n"); 979 return -EINVAL; 980 } 981 } 982 983 return 0; 984 } 985 986 static void phylink_apply_manual_flow(struct phylink *pl, 987 struct phylink_link_state *state) 988 { 989 /* If autoneg is disabled, pause AN is also disabled */ 990 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 991 state->advertising)) 992 state->pause &= ~MLO_PAUSE_AN; 993 994 /* Manual configuration of pause modes */ 995 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 996 state->pause = pl->link_config.pause; 997 } 998 999 static void phylink_resolve_an_pause(struct phylink_link_state *state) 1000 { 1001 bool tx_pause, rx_pause; 1002 1003 if (state->duplex == DUPLEX_FULL) { 1004 linkmode_resolve_pause(state->advertising, 1005 state->lp_advertising, 1006 &tx_pause, &rx_pause); 1007 if (tx_pause) 1008 state->pause |= MLO_PAUSE_TX; 1009 if (rx_pause) 1010 state->pause |= MLO_PAUSE_RX; 1011 } 1012 } 1013 1014 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 1015 phy_interface_t interface) 1016 { 1017 if (pcs && pcs->ops->pcs_inband_caps) 1018 return pcs->ops->pcs_inband_caps(pcs, interface); 1019 1020 return 0; 1021 } 1022 1023 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1024 phy_interface_t interface) 1025 { 1026 if (pcs && pcs->ops->pcs_pre_config) 1027 pcs->ops->pcs_pre_config(pcs, interface); 1028 } 1029 1030 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1031 phy_interface_t interface) 1032 { 1033 int err = 0; 1034 1035 if (pcs && pcs->ops->pcs_post_config) 1036 err = pcs->ops->pcs_post_config(pcs, interface); 1037 1038 return err; 1039 } 1040 1041 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1042 { 1043 if (pcs && pcs->ops->pcs_disable) 1044 pcs->ops->pcs_disable(pcs); 1045 } 1046 1047 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1048 { 1049 int err = 0; 1050 1051 if (pcs && pcs->ops->pcs_enable) 1052 err = pcs->ops->pcs_enable(pcs); 1053 1054 return err; 1055 } 1056 1057 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1058 const struct phylink_link_state *state, 1059 bool permit_pause_to_mac) 1060 { 1061 if (!pcs) 1062 return 0; 1063 1064 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1065 state->advertising, permit_pause_to_mac); 1066 } 1067 1068 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1069 phy_interface_t interface, int speed, 1070 int duplex) 1071 { 1072 if (pcs && pcs->ops->pcs_link_up) 1073 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1074 } 1075 1076 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 1077 { 1078 if (pcs && pcs->ops->pcs_disable_eee) 1079 pcs->ops->pcs_disable_eee(pcs); 1080 } 1081 1082 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 1083 { 1084 if (pcs && pcs->ops->pcs_enable_eee) 1085 pcs->ops->pcs_enable_eee(pcs); 1086 } 1087 1088 /* Query inband for a specific interface mode, asking the MAC for the 1089 * PCS which will be used to handle the interface mode. 1090 */ 1091 static unsigned int phylink_inband_caps(struct phylink *pl, 1092 phy_interface_t interface) 1093 { 1094 struct phylink_pcs *pcs; 1095 1096 if (!pl->mac_ops->mac_select_pcs) 1097 return 0; 1098 1099 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 1100 if (!pcs) 1101 return 0; 1102 1103 return phylink_pcs_inband_caps(pcs, interface); 1104 } 1105 1106 static void phylink_pcs_poll_stop(struct phylink *pl) 1107 { 1108 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1109 del_timer(&pl->link_poll); 1110 } 1111 1112 static void phylink_pcs_poll_start(struct phylink *pl) 1113 { 1114 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1115 mod_timer(&pl->link_poll, jiffies + HZ); 1116 } 1117 1118 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1119 { 1120 int ret = 0; 1121 1122 /* Signal to PCS driver that MAC requires RX clock for init */ 1123 if (pl->config->mac_requires_rxc) 1124 pcs->rxc_always_on = true; 1125 1126 if (pcs->ops->pcs_pre_init) 1127 ret = pcs->ops->pcs_pre_init(pcs); 1128 1129 return ret; 1130 } 1131 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1132 1133 static void phylink_mac_config(struct phylink *pl, 1134 const struct phylink_link_state *state) 1135 { 1136 struct phylink_link_state st = *state; 1137 1138 /* Stop drivers incorrectly using these */ 1139 linkmode_zero(st.lp_advertising); 1140 st.speed = SPEED_UNKNOWN; 1141 st.duplex = DUPLEX_UNKNOWN; 1142 st.an_complete = false; 1143 st.link = false; 1144 1145 phylink_dbg(pl, 1146 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1147 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1148 phy_modes(st.interface), 1149 phy_rate_matching_to_str(st.rate_matching), 1150 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1151 st.pause); 1152 1153 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1154 } 1155 1156 static void phylink_pcs_an_restart(struct phylink *pl) 1157 { 1158 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1159 pl->link_config.advertising) && 1160 phy_interface_mode_is_8023z(pl->link_config.interface) && 1161 phylink_autoneg_inband(pl->act_link_an_mode)) 1162 pl->pcs->ops->pcs_an_restart(pl->pcs); 1163 } 1164 1165 /** 1166 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1167 * @pl: a pointer to a &struct phylink returned from phylink_create() 1168 * @pcs: a pointer to &struct phylink_pcs 1169 * @interface: interface mode to be used 1170 * @advertising: adertisement ethtool link mode mask 1171 * 1172 * Determines the negotiation mode to be used by the PCS, and returns 1173 * one of: 1174 * 1175 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1176 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1177 * will be used. 1178 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1179 * disabled 1180 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1181 * 1182 * Note: this is for cases where the PCS itself is involved in negotiation 1183 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1184 */ 1185 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1186 phy_interface_t interface, 1187 const unsigned long *advertising) 1188 { 1189 unsigned int pcs_ib_caps = 0; 1190 unsigned int phy_ib_caps = 0; 1191 unsigned int neg_mode, mode; 1192 enum { 1193 INBAND_CISCO_SGMII, 1194 INBAND_BASEX, 1195 } type; 1196 1197 mode = pl->req_link_an_mode; 1198 1199 pl->phy_ib_mode = 0; 1200 1201 switch (interface) { 1202 case PHY_INTERFACE_MODE_SGMII: 1203 case PHY_INTERFACE_MODE_QSGMII: 1204 case PHY_INTERFACE_MODE_QUSGMII: 1205 case PHY_INTERFACE_MODE_USXGMII: 1206 case PHY_INTERFACE_MODE_10G_QXGMII: 1207 /* These protocols are designed for use with a PHY which 1208 * communicates its negotiation result back to the MAC via 1209 * inband communication. Note: there exist PHYs that run 1210 * with SGMII but do not send the inband data. 1211 */ 1212 type = INBAND_CISCO_SGMII; 1213 break; 1214 1215 case PHY_INTERFACE_MODE_1000BASEX: 1216 case PHY_INTERFACE_MODE_2500BASEX: 1217 /* 1000base-X is designed for use media-side for Fibre 1218 * connections, and thus the Autoneg bit needs to be 1219 * taken into account. We also do this for 2500base-X 1220 * as well, but drivers may not support this, so may 1221 * need to override this. 1222 */ 1223 type = INBAND_BASEX; 1224 break; 1225 1226 default: 1227 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1228 pl->act_link_an_mode = mode; 1229 return; 1230 } 1231 1232 if (pcs) 1233 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1234 1235 if (pl->phydev) 1236 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1237 1238 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1239 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1240 1241 if (!phylink_autoneg_inband(mode)) { 1242 bool pcs_ib_only = false; 1243 bool phy_ib_only = false; 1244 1245 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1246 /* PCS supports reporting in-band capabilities, and 1247 * supports more than disable mode. 1248 */ 1249 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1250 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1251 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1252 pcs_ib_only = true; 1253 } 1254 1255 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1256 /* PHY supports in-band capabilities, and supports 1257 * more than disable mode. 1258 */ 1259 if (phy_ib_caps & LINK_INBAND_DISABLE) 1260 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1261 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1262 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1263 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1264 phy_ib_only = true; 1265 } 1266 1267 /* If either the PCS or PHY requires inband to be enabled, 1268 * this is an invalid configuration. Provide a diagnostic 1269 * message for this case, but don't try to force the issue. 1270 */ 1271 if (pcs_ib_only || phy_ib_only) 1272 phylink_warn(pl, 1273 "firmware wants %s mode, but %s%s%s requires inband\n", 1274 phylink_an_mode_str(mode), 1275 pcs_ib_only ? "PCS" : "", 1276 pcs_ib_only && phy_ib_only ? " and " : "", 1277 phy_ib_only ? "PHY" : ""); 1278 1279 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1280 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1281 /* For SGMII modes which are designed to be used with PHYs, or 1282 * Base-X with a PHY, we try to use in-band mode where-ever 1283 * possible. However, there are some PHYs e.g. BCM84881 which 1284 * do not support in-band. 1285 */ 1286 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1287 LINK_INBAND_BYPASS; 1288 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1289 LINK_INBAND_BYPASS; 1290 /* PCS PHY 1291 * D E D E 1292 * 0 0 0 0 no information inband enabled 1293 * 1 0 0 0 pcs doesn't support outband 1294 * 0 1 0 0 pcs required inband enabled 1295 * 1 1 0 0 pcs optional inband enabled 1296 * 0 0 1 0 phy doesn't support outband 1297 * 1 0 1 0 pcs+phy doesn't support outband 1298 * 0 1 1 0 pcs required, phy doesn't support, invalid 1299 * 1 1 1 0 pcs optional, phy doesn't support, outband 1300 * 0 0 0 1 phy required inband enabled 1301 * 1 0 0 1 pcs doesn't support, phy required, invalid 1302 * 0 1 0 1 pcs+phy required inband enabled 1303 * 1 1 0 1 pcs optional, phy required inband enabled 1304 * 0 0 1 1 phy optional inband enabled 1305 * 1 0 1 1 pcs doesn't support, phy optional, outband 1306 * 0 1 1 1 pcs required, phy optional inband enabled 1307 * 1 1 1 1 pcs+phy optional inband enabled 1308 */ 1309 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1310 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1311 /* In-band supported or unknown at both ends. Enable 1312 * in-band mode with or without bypass at the PHY. 1313 */ 1314 if (phy_ib_caps & LINK_INBAND_ENABLE) 1315 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1316 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1317 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1318 1319 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1320 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1321 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1322 /* Either in-band not supported at at least one end. 1323 * In-band bypass at the other end is possible. 1324 */ 1325 if (phy_ib_caps & LINK_INBAND_DISABLE) 1326 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1327 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1328 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1329 1330 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1331 if (pl->phydev) 1332 mode = MLO_AN_PHY; 1333 } else { 1334 /* invalid */ 1335 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1336 phy_modes(interface)); 1337 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1338 } 1339 } else { 1340 /* For Base-X without a PHY */ 1341 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1342 /* If the PCS doesn't support inband, then inband must 1343 * be disabled. 1344 */ 1345 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1346 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1347 /* If the PCS requires inband, then inband must always 1348 * be enabled. 1349 */ 1350 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1351 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1352 advertising)) 1353 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1354 else 1355 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1356 } 1357 1358 pl->pcs_neg_mode = neg_mode; 1359 pl->act_link_an_mode = mode; 1360 } 1361 1362 static void phylink_major_config(struct phylink *pl, bool restart, 1363 const struct phylink_link_state *state) 1364 { 1365 struct phylink_pcs *pcs = NULL; 1366 bool pcs_changed = false; 1367 unsigned int rate_kbd; 1368 int err; 1369 1370 phylink_dbg(pl, "major config, requested %s/%s\n", 1371 phylink_an_mode_str(pl->req_link_an_mode), 1372 phy_modes(state->interface)); 1373 1374 if (pl->mac_ops->mac_select_pcs) { 1375 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1376 if (IS_ERR(pcs)) { 1377 phylink_err(pl, 1378 "mac_select_pcs unexpectedly failed: %pe\n", 1379 pcs); 1380 return; 1381 } 1382 1383 pcs_changed = pl->pcs != pcs; 1384 } 1385 1386 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1387 1388 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1389 phylink_an_mode_str(pl->act_link_an_mode), 1390 phylink_pcs_mode_str(pl->pcs_neg_mode), 1391 phy_modes(state->interface)); 1392 1393 phylink_pcs_poll_stop(pl); 1394 1395 if (pl->mac_ops->mac_prepare) { 1396 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1397 state->interface); 1398 if (err < 0) { 1399 phylink_err(pl, "mac_prepare failed: %pe\n", 1400 ERR_PTR(err)); 1401 return; 1402 } 1403 } 1404 1405 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1406 * for the change. 1407 */ 1408 if (pcs_changed) { 1409 phylink_pcs_disable(pl->pcs); 1410 1411 if (pl->pcs) 1412 pl->pcs->phylink = NULL; 1413 1414 pcs->phylink = pl; 1415 1416 pl->pcs = pcs; 1417 } 1418 1419 if (pl->pcs) 1420 phylink_pcs_pre_config(pl->pcs, state->interface); 1421 1422 phylink_mac_config(pl, state); 1423 1424 if (pl->pcs) 1425 phylink_pcs_post_config(pl->pcs, state->interface); 1426 1427 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1428 phylink_pcs_enable(pl->pcs); 1429 1430 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1431 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1432 if (err < 0) 1433 phylink_err(pl, "pcs_config failed: %pe\n", 1434 ERR_PTR(err)); 1435 else if (err > 0) 1436 restart = true; 1437 1438 if (restart) 1439 phylink_pcs_an_restart(pl); 1440 1441 if (pl->mac_ops->mac_finish) { 1442 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1443 state->interface); 1444 if (err < 0) 1445 phylink_err(pl, "mac_finish failed: %pe\n", 1446 ERR_PTR(err)); 1447 } 1448 1449 if (pl->phydev && pl->phy_ib_mode) { 1450 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1451 if (err < 0) 1452 phylink_err(pl, "phy_config_inband: %pe\n", 1453 ERR_PTR(err)); 1454 } 1455 1456 if (pl->sfp_bus) { 1457 rate_kbd = phylink_interface_signal_rate(state->interface); 1458 if (rate_kbd) 1459 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1460 } 1461 1462 phylink_pcs_poll_start(pl); 1463 } 1464 1465 /* 1466 * Reconfigure for a change of inband advertisement. 1467 * If we have a separate PCS, we only need to call its pcs_config() method, 1468 * and then restart AN if it indicates something changed. Otherwise, we do 1469 * the full MAC reconfiguration. 1470 */ 1471 static int phylink_change_inband_advert(struct phylink *pl) 1472 { 1473 int ret; 1474 1475 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1476 return 0; 1477 1478 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1479 phylink_an_mode_str(pl->req_link_an_mode), 1480 phy_modes(pl->link_config.interface), 1481 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1482 pl->link_config.pause); 1483 1484 /* Recompute the PCS neg mode */ 1485 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1486 pl->link_config.advertising); 1487 1488 /* Modern PCS-based method; update the advert at the PCS, and 1489 * restart negotiation if the pcs_config() helper indicates that 1490 * the programmed advertisement has changed. 1491 */ 1492 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1493 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1494 if (ret < 0) 1495 return ret; 1496 1497 if (ret > 0) 1498 phylink_pcs_an_restart(pl); 1499 1500 return 0; 1501 } 1502 1503 static void phylink_mac_pcs_get_state(struct phylink *pl, 1504 struct phylink_link_state *state) 1505 { 1506 struct phylink_pcs *pcs; 1507 bool autoneg; 1508 1509 linkmode_copy(state->advertising, pl->link_config.advertising); 1510 linkmode_zero(state->lp_advertising); 1511 state->interface = pl->link_config.interface; 1512 state->rate_matching = pl->link_config.rate_matching; 1513 state->an_complete = 0; 1514 state->link = 1; 1515 1516 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1517 if (autoneg) { 1518 state->speed = SPEED_UNKNOWN; 1519 state->duplex = DUPLEX_UNKNOWN; 1520 state->pause = MLO_PAUSE_NONE; 1521 } else { 1522 state->speed = pl->link_config.speed; 1523 state->duplex = pl->link_config.duplex; 1524 state->pause = pl->link_config.pause; 1525 } 1526 1527 pcs = pl->pcs; 1528 if (pcs) 1529 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1530 else 1531 state->link = 0; 1532 } 1533 1534 /* The fixed state is... fixed except for the link state, 1535 * which may be determined by a GPIO or a callback. 1536 */ 1537 static void phylink_get_fixed_state(struct phylink *pl, 1538 struct phylink_link_state *state) 1539 { 1540 *state = pl->link_config; 1541 if (pl->config->get_fixed_state) 1542 pl->config->get_fixed_state(pl->config, state); 1543 else if (pl->link_gpio) 1544 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1545 1546 state->pause = MLO_PAUSE_NONE; 1547 phylink_resolve_an_pause(state); 1548 } 1549 1550 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1551 { 1552 struct phylink_link_state link_state; 1553 1554 switch (pl->req_link_an_mode) { 1555 case MLO_AN_PHY: 1556 link_state = pl->phy_state; 1557 break; 1558 1559 case MLO_AN_FIXED: 1560 phylink_get_fixed_state(pl, &link_state); 1561 break; 1562 1563 case MLO_AN_INBAND: 1564 link_state = pl->link_config; 1565 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1566 link_state.pause = MLO_PAUSE_NONE; 1567 break; 1568 1569 default: /* can't happen */ 1570 return; 1571 } 1572 1573 link_state.link = false; 1574 1575 phylink_apply_manual_flow(pl, &link_state); 1576 phylink_major_config(pl, force_restart, &link_state); 1577 } 1578 1579 static const char *phylink_pause_to_str(int pause) 1580 { 1581 switch (pause & MLO_PAUSE_TXRX_MASK) { 1582 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1583 return "rx/tx"; 1584 case MLO_PAUSE_TX: 1585 return "tx"; 1586 case MLO_PAUSE_RX: 1587 return "rx"; 1588 default: 1589 return "off"; 1590 } 1591 } 1592 1593 static void phylink_deactivate_lpi(struct phylink *pl) 1594 { 1595 if (pl->mac_enable_tx_lpi) { 1596 pl->mac_enable_tx_lpi = false; 1597 1598 phylink_dbg(pl, "disabling LPI\n"); 1599 1600 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1601 1602 phylink_pcs_disable_eee(pl->pcs); 1603 } 1604 } 1605 1606 static void phylink_activate_lpi(struct phylink *pl) 1607 { 1608 int err; 1609 1610 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1611 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1612 phy_modes(pl->cur_interface)); 1613 return; 1614 } 1615 1616 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1617 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1618 1619 phylink_pcs_enable_eee(pl->pcs); 1620 1621 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1622 pl->mac_tx_clk_stop); 1623 if (err) { 1624 phylink_pcs_disable_eee(pl->pcs); 1625 phylink_err(pl, "%ps() failed: %pe\n", 1626 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1627 return; 1628 } 1629 1630 pl->mac_enable_tx_lpi = true; 1631 } 1632 1633 static void phylink_link_up(struct phylink *pl, 1634 struct phylink_link_state link_state) 1635 { 1636 struct net_device *ndev = pl->netdev; 1637 int speed, duplex; 1638 bool rx_pause; 1639 1640 speed = link_state.speed; 1641 duplex = link_state.duplex; 1642 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1643 1644 switch (link_state.rate_matching) { 1645 case RATE_MATCH_PAUSE: 1646 /* The PHY is doing rate matchion from the media rate (in 1647 * the link_state) to the interface speed, and will send 1648 * pause frames to the MAC to limit its transmission speed. 1649 */ 1650 speed = phylink_interface_max_speed(link_state.interface); 1651 duplex = DUPLEX_FULL; 1652 rx_pause = true; 1653 break; 1654 1655 case RATE_MATCH_CRS: 1656 /* The PHY is doing rate matchion from the media rate (in 1657 * the link_state) to the interface speed, and will cause 1658 * collisions to the MAC to limit its transmission speed. 1659 */ 1660 speed = phylink_interface_max_speed(link_state.interface); 1661 duplex = DUPLEX_HALF; 1662 break; 1663 } 1664 1665 pl->cur_interface = link_state.interface; 1666 1667 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1668 duplex); 1669 1670 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1671 pl->cur_interface, speed, duplex, 1672 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1673 1674 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1675 phylink_activate_lpi(pl); 1676 1677 if (ndev) 1678 netif_carrier_on(ndev); 1679 1680 phylink_info(pl, 1681 "Link is Up - %s/%s - flow control %s\n", 1682 phy_speed_to_str(link_state.speed), 1683 phy_duplex_to_str(link_state.duplex), 1684 phylink_pause_to_str(link_state.pause)); 1685 } 1686 1687 static void phylink_link_down(struct phylink *pl) 1688 { 1689 struct net_device *ndev = pl->netdev; 1690 1691 if (ndev) 1692 netif_carrier_off(ndev); 1693 1694 phylink_deactivate_lpi(pl); 1695 1696 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1697 pl->cur_interface); 1698 phylink_info(pl, "Link is Down\n"); 1699 } 1700 1701 static bool phylink_link_is_up(struct phylink *pl) 1702 { 1703 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1704 } 1705 1706 static void phylink_resolve(struct work_struct *w) 1707 { 1708 struct phylink *pl = container_of(w, struct phylink, resolve); 1709 struct phylink_link_state link_state; 1710 bool mac_config = false; 1711 bool retrigger = false; 1712 bool cur_link_state; 1713 1714 mutex_lock(&pl->state_mutex); 1715 cur_link_state = phylink_link_is_up(pl); 1716 1717 if (pl->phylink_disable_state) { 1718 pl->link_failed = false; 1719 link_state.link = false; 1720 } else if (pl->link_failed) { 1721 link_state.link = false; 1722 retrigger = true; 1723 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1724 phylink_get_fixed_state(pl, &link_state); 1725 mac_config = link_state.link; 1726 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1727 link_state = pl->phy_state; 1728 mac_config = link_state.link; 1729 } else { 1730 phylink_mac_pcs_get_state(pl, &link_state); 1731 1732 /* The PCS may have a latching link-fail indicator. If the link 1733 * was up, bring the link down and re-trigger the resolve. 1734 * Otherwise, re-read the PCS state to get the current status 1735 * of the link. 1736 */ 1737 if (!link_state.link) { 1738 if (cur_link_state) 1739 retrigger = true; 1740 else 1741 phylink_mac_pcs_get_state(pl, &link_state); 1742 } 1743 1744 /* If we have a phy, the "up" state is the union of both the 1745 * PHY and the MAC 1746 */ 1747 if (pl->phydev) 1748 link_state.link &= pl->phy_state.link; 1749 1750 /* Only update if the PHY link is up */ 1751 if (pl->phydev && pl->phy_state.link) { 1752 /* If the interface has changed, force a link down 1753 * event if the link isn't already down, and re-resolve. 1754 */ 1755 if (link_state.interface != pl->phy_state.interface) { 1756 retrigger = true; 1757 link_state.link = false; 1758 } 1759 1760 link_state.interface = pl->phy_state.interface; 1761 1762 /* If we are doing rate matching, then the link 1763 * speed/duplex comes from the PHY 1764 */ 1765 if (pl->phy_state.rate_matching) { 1766 link_state.rate_matching = 1767 pl->phy_state.rate_matching; 1768 link_state.speed = pl->phy_state.speed; 1769 link_state.duplex = pl->phy_state.duplex; 1770 } 1771 1772 /* If we have a PHY, we need to update with the PHY 1773 * flow control bits. 1774 */ 1775 link_state.pause = pl->phy_state.pause; 1776 mac_config = true; 1777 } 1778 } 1779 1780 if (pl->act_link_an_mode != MLO_AN_FIXED) 1781 phylink_apply_manual_flow(pl, &link_state); 1782 1783 if (mac_config) { 1784 if (link_state.interface != pl->link_config.interface) { 1785 /* The interface has changed, force the link down and 1786 * then reconfigure. 1787 */ 1788 if (cur_link_state) { 1789 phylink_link_down(pl); 1790 cur_link_state = false; 1791 } 1792 phylink_major_config(pl, false, &link_state); 1793 pl->link_config.interface = link_state.interface; 1794 } 1795 } 1796 1797 if (link_state.link != cur_link_state) { 1798 pl->old_link_state = link_state.link; 1799 if (!link_state.link) 1800 phylink_link_down(pl); 1801 else 1802 phylink_link_up(pl, link_state); 1803 } 1804 if (!link_state.link && retrigger) { 1805 pl->link_failed = false; 1806 queue_work(system_power_efficient_wq, &pl->resolve); 1807 } 1808 mutex_unlock(&pl->state_mutex); 1809 } 1810 1811 static void phylink_run_resolve(struct phylink *pl) 1812 { 1813 if (!pl->phylink_disable_state) 1814 queue_work(system_power_efficient_wq, &pl->resolve); 1815 } 1816 1817 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1818 { 1819 unsigned long state = pl->phylink_disable_state; 1820 1821 set_bit(bit, &pl->phylink_disable_state); 1822 if (state == 0) { 1823 queue_work(system_power_efficient_wq, &pl->resolve); 1824 flush_work(&pl->resolve); 1825 } 1826 } 1827 1828 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1829 { 1830 clear_bit(bit, &pl->phylink_disable_state); 1831 phylink_run_resolve(pl); 1832 } 1833 1834 static void phylink_fixed_poll(struct timer_list *t) 1835 { 1836 struct phylink *pl = container_of(t, struct phylink, link_poll); 1837 1838 mod_timer(t, jiffies + HZ); 1839 1840 phylink_run_resolve(pl); 1841 } 1842 1843 static const struct sfp_upstream_ops sfp_phylink_ops; 1844 1845 static int phylink_register_sfp(struct phylink *pl, 1846 const struct fwnode_handle *fwnode) 1847 { 1848 struct sfp_bus *bus; 1849 int ret; 1850 1851 if (!fwnode) 1852 return 0; 1853 1854 bus = sfp_bus_find_fwnode(fwnode); 1855 if (IS_ERR(bus)) { 1856 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1857 return PTR_ERR(bus); 1858 } 1859 1860 pl->sfp_bus = bus; 1861 1862 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1863 sfp_bus_put(bus); 1864 1865 return ret; 1866 } 1867 1868 /** 1869 * phylink_set_fixed_link() - set the fixed link 1870 * @pl: a pointer to a &struct phylink returned from phylink_create() 1871 * @state: a pointer to a struct phylink_link_state. 1872 * 1873 * This function is used when the link parameters are known and do not change, 1874 * making it suitable for certain types of network connections. 1875 * 1876 * Returns: zero on success or negative error code. 1877 */ 1878 int phylink_set_fixed_link(struct phylink *pl, 1879 const struct phylink_link_state *state) 1880 { 1881 const struct phy_setting *s; 1882 unsigned long *adv; 1883 1884 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1885 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1886 return -EINVAL; 1887 1888 s = phy_lookup_setting(state->speed, state->duplex, 1889 pl->supported, true); 1890 if (!s) 1891 return -EINVAL; 1892 1893 adv = pl->link_config.advertising; 1894 linkmode_zero(adv); 1895 linkmode_set_bit(s->bit, adv); 1896 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1897 1898 pl->link_config.speed = state->speed; 1899 pl->link_config.duplex = state->duplex; 1900 pl->link_config.link = 1; 1901 pl->link_config.an_complete = 1; 1902 1903 pl->cfg_link_an_mode = MLO_AN_FIXED; 1904 pl->req_link_an_mode = pl->cfg_link_an_mode; 1905 1906 return 0; 1907 } 1908 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1909 1910 /** 1911 * phylink_create() - create a phylink instance 1912 * @config: a pointer to the target &struct phylink_config 1913 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1914 * interface 1915 * @iface: the desired link mode defined by &typedef phy_interface_t 1916 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1917 * 1918 * Create a new phylink instance, and parse the link parameters found in @np. 1919 * This will parse in-band modes, fixed-link or SFP configuration. 1920 * 1921 * Note: the rtnl lock must not be held when calling this function. 1922 * 1923 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1924 * must use IS_ERR() to check for errors from this function. 1925 */ 1926 struct phylink *phylink_create(struct phylink_config *config, 1927 const struct fwnode_handle *fwnode, 1928 phy_interface_t iface, 1929 const struct phylink_mac_ops *mac_ops) 1930 { 1931 struct phylink *pl; 1932 int ret; 1933 1934 /* Validate the supplied configuration */ 1935 if (phy_interface_empty(config->supported_interfaces)) { 1936 dev_err(config->dev, 1937 "phylink: error: empty supported_interfaces\n"); 1938 return ERR_PTR(-EINVAL); 1939 } 1940 1941 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1942 if (!pl) 1943 return ERR_PTR(-ENOMEM); 1944 1945 mutex_init(&pl->state_mutex); 1946 INIT_WORK(&pl->resolve, phylink_resolve); 1947 1948 pl->config = config; 1949 if (config->type == PHYLINK_NETDEV) { 1950 pl->netdev = to_net_dev(config->dev); 1951 netif_carrier_off(pl->netdev); 1952 } else if (config->type == PHYLINK_DEV) { 1953 pl->dev = config->dev; 1954 } else { 1955 kfree(pl); 1956 return ERR_PTR(-EINVAL); 1957 } 1958 1959 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1960 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1961 pl->config->lpi_capabilities && 1962 !phy_interface_empty(pl->config->lpi_interfaces); 1963 1964 /* Set the default EEE configuration */ 1965 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1966 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1967 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1968 1969 pl->phy_state.interface = iface; 1970 pl->link_interface = iface; 1971 if (iface == PHY_INTERFACE_MODE_MOCA) 1972 pl->link_port = PORT_BNC; 1973 else 1974 pl->link_port = PORT_MII; 1975 pl->link_config.interface = iface; 1976 pl->link_config.pause = MLO_PAUSE_AN; 1977 pl->link_config.speed = SPEED_UNKNOWN; 1978 pl->link_config.duplex = DUPLEX_UNKNOWN; 1979 pl->pcs_state = PCS_STATE_DOWN; 1980 pl->mac_ops = mac_ops; 1981 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1982 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1983 1984 linkmode_fill(pl->supported); 1985 linkmode_copy(pl->link_config.advertising, pl->supported); 1986 phylink_validate(pl, pl->supported, &pl->link_config); 1987 1988 ret = phylink_parse_mode(pl, fwnode); 1989 if (ret < 0) { 1990 kfree(pl); 1991 return ERR_PTR(ret); 1992 } 1993 1994 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1995 ret = phylink_parse_fixedlink(pl, fwnode); 1996 if (ret < 0) { 1997 kfree(pl); 1998 return ERR_PTR(ret); 1999 } 2000 } 2001 2002 pl->req_link_an_mode = pl->cfg_link_an_mode; 2003 2004 ret = phylink_register_sfp(pl, fwnode); 2005 if (ret < 0) { 2006 kfree(pl); 2007 return ERR_PTR(ret); 2008 } 2009 2010 return pl; 2011 } 2012 EXPORT_SYMBOL_GPL(phylink_create); 2013 2014 /** 2015 * phylink_destroy() - cleanup and destroy the phylink instance 2016 * @pl: a pointer to a &struct phylink returned from phylink_create() 2017 * 2018 * Destroy a phylink instance. Any PHY that has been attached must have been 2019 * cleaned up via phylink_disconnect_phy() prior to calling this function. 2020 * 2021 * Note: the rtnl lock must not be held when calling this function. 2022 */ 2023 void phylink_destroy(struct phylink *pl) 2024 { 2025 sfp_bus_del_upstream(pl->sfp_bus); 2026 if (pl->link_gpio) 2027 gpiod_put(pl->link_gpio); 2028 2029 cancel_work_sync(&pl->resolve); 2030 kfree(pl); 2031 } 2032 EXPORT_SYMBOL_GPL(phylink_destroy); 2033 2034 /** 2035 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 2036 * @pl: a pointer to a &struct phylink returned from phylink_create() 2037 * 2038 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 2039 * no PHY is needed. 2040 * 2041 * Returns true if phylink will be expecting a PHY. 2042 */ 2043 bool phylink_expects_phy(struct phylink *pl) 2044 { 2045 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2046 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2047 phy_interface_mode_is_8023z(pl->link_config.interface))) 2048 return false; 2049 return true; 2050 } 2051 EXPORT_SYMBOL_GPL(phylink_expects_phy); 2052 2053 static void phylink_phy_change(struct phy_device *phydev, bool up) 2054 { 2055 struct phylink *pl = phydev->phylink; 2056 bool tx_pause, rx_pause; 2057 2058 phy_get_pause(phydev, &tx_pause, &rx_pause); 2059 2060 mutex_lock(&pl->state_mutex); 2061 pl->phy_state.speed = phydev->speed; 2062 pl->phy_state.duplex = phydev->duplex; 2063 pl->phy_state.rate_matching = phydev->rate_matching; 2064 pl->phy_state.pause = MLO_PAUSE_NONE; 2065 if (tx_pause) 2066 pl->phy_state.pause |= MLO_PAUSE_TX; 2067 if (rx_pause) 2068 pl->phy_state.pause |= MLO_PAUSE_RX; 2069 pl->phy_state.interface = phydev->interface; 2070 pl->phy_state.link = up; 2071 if (!up) 2072 pl->link_failed = true; 2073 2074 /* Get the LPI state from phylib */ 2075 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 2076 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 2077 mutex_unlock(&pl->state_mutex); 2078 2079 phylink_run_resolve(pl); 2080 2081 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2082 up ? "up" : "down", 2083 phy_modes(phydev->interface), 2084 phy_speed_to_str(phydev->speed), 2085 phy_duplex_to_str(phydev->duplex), 2086 phy_rate_matching_to_str(phydev->rate_matching), 2087 phylink_pause_to_str(pl->phy_state.pause), 2088 phydev->enable_tx_lpi ? "" : "no"); 2089 } 2090 2091 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2092 unsigned long *supported, 2093 struct phylink_link_state *state) 2094 { 2095 DECLARE_PHY_INTERFACE_MASK(interfaces); 2096 2097 /* If the PHY provides a bitmap of the interfaces it will be using 2098 * depending on the negotiated media speeds, use this to validate 2099 * which ethtool link modes can be used. 2100 */ 2101 if (!phy_interface_empty(phy->possible_interfaces)) { 2102 /* We only care about the union of the PHY's interfaces and 2103 * those which the host supports. 2104 */ 2105 phy_interface_and(interfaces, phy->possible_interfaces, 2106 pl->config->supported_interfaces); 2107 2108 if (phy_interface_empty(interfaces)) { 2109 phylink_err(pl, "PHY has no common interfaces\n"); 2110 return -EINVAL; 2111 } 2112 2113 if (phy_on_sfp(phy)) { 2114 /* If the PHY is on a SFP, limit the interfaces to 2115 * those that can be used with a SFP module. 2116 */ 2117 phy_interface_and(interfaces, interfaces, 2118 phylink_sfp_interfaces); 2119 2120 if (phy_interface_empty(interfaces)) { 2121 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2122 return -EINVAL; 2123 } 2124 } 2125 2126 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2127 phydev_name(phy), 2128 (int)PHY_INTERFACE_MODE_MAX, 2129 phy->possible_interfaces, 2130 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2131 2132 return phylink_validate_mask(pl, phy, supported, state, 2133 interfaces); 2134 } 2135 2136 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2137 phydev_name(phy)); 2138 2139 /* Check whether we would use rate matching for the proposed interface 2140 * mode. 2141 */ 2142 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2143 2144 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2145 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2146 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2147 * their Serdes is either unnecessary or not reasonable. 2148 * 2149 * For these which switch interface modes, we really need to know which 2150 * interface modes the PHY supports to properly work out which ethtool 2151 * linkmodes can be supported. For now, as a work-around, we validate 2152 * against all interface modes, which may lead to more ethtool link 2153 * modes being advertised than are actually supported. 2154 */ 2155 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2156 state->interface != PHY_INTERFACE_MODE_RXAUI && 2157 state->interface != PHY_INTERFACE_MODE_XAUI && 2158 state->interface != PHY_INTERFACE_MODE_USXGMII) 2159 state->interface = PHY_INTERFACE_MODE_NA; 2160 2161 return phylink_validate(pl, supported, state); 2162 } 2163 2164 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2165 phy_interface_t interface) 2166 { 2167 struct phylink_link_state config; 2168 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2169 char *irq_str; 2170 int ret; 2171 2172 /* 2173 * This is the new way of dealing with flow control for PHYs, 2174 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2175 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2176 * using our validate call to the MAC, we rely upon the MAC 2177 * clearing the bits from both supported and advertising fields. 2178 */ 2179 phy_support_asym_pause(phy); 2180 2181 memset(&config, 0, sizeof(config)); 2182 linkmode_copy(supported, phy->supported); 2183 linkmode_copy(config.advertising, phy->advertising); 2184 config.interface = interface; 2185 2186 ret = phylink_validate_phy(pl, phy, supported, &config); 2187 if (ret) { 2188 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2189 phy_modes(config.interface), 2190 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2191 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2192 ERR_PTR(ret)); 2193 return ret; 2194 } 2195 2196 phy->phylink = pl; 2197 phy->phy_link_change = phylink_phy_change; 2198 2199 irq_str = phy_attached_info_irq(phy); 2200 phylink_info(pl, 2201 "PHY [%s] driver [%s] (irq=%s)\n", 2202 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2203 kfree(irq_str); 2204 2205 mutex_lock(&phy->lock); 2206 mutex_lock(&pl->state_mutex); 2207 pl->phydev = phy; 2208 pl->phy_state.interface = interface; 2209 pl->phy_state.pause = MLO_PAUSE_NONE; 2210 pl->phy_state.speed = SPEED_UNKNOWN; 2211 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2212 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2213 linkmode_copy(pl->supported, supported); 2214 linkmode_copy(pl->link_config.advertising, config.advertising); 2215 2216 /* Restrict the phy advertisement according to the MAC support. */ 2217 linkmode_copy(phy->advertising, config.advertising); 2218 2219 /* If the MAC supports phylink managed EEE, restrict the EEE 2220 * advertisement according to the MAC's LPI capabilities. 2221 */ 2222 if (pl->mac_supports_eee) { 2223 /* If EEE is enabled, then we need to call phy_support_eee() 2224 * to ensure that the advertising mask is appropriately set. 2225 * This also enables EEE at the PHY. 2226 */ 2227 if (pl->eee_cfg.eee_enabled) 2228 phy_support_eee(phy); 2229 2230 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2231 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2232 2233 /* Convert the MAC's LPI capabilities to linkmodes */ 2234 linkmode_zero(pl->supported_lpi); 2235 phylink_caps_to_linkmodes(pl->supported_lpi, 2236 pl->config->lpi_capabilities); 2237 2238 /* Restrict the PHYs EEE support/advertisement to the modes 2239 * that the MAC supports. 2240 */ 2241 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2242 pl->supported_lpi); 2243 } else if (pl->mac_supports_eee_ops) { 2244 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2245 phy_disable_eee(phy); 2246 } 2247 2248 mutex_unlock(&pl->state_mutex); 2249 mutex_unlock(&phy->lock); 2250 2251 phylink_dbg(pl, 2252 "phy: %s setting supported %*pb advertising %*pb\n", 2253 phy_modes(interface), 2254 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2255 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2256 2257 if (phy_interrupt_is_valid(phy)) 2258 phy_request_interrupt(phy); 2259 2260 if (pl->config->mac_managed_pm) 2261 phy->mac_managed_pm = true; 2262 2263 /* Allow the MAC to stop its clock if the PHY has the capability */ 2264 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2265 2266 if (pl->mac_supports_eee_ops) { 2267 /* Explicitly configure whether the PHY is allowed to stop it's 2268 * receive clock. 2269 */ 2270 ret = phy_eee_rx_clock_stop(phy, 2271 pl->config->eee_rx_clk_stop_enable); 2272 if (ret == -EOPNOTSUPP) 2273 ret = 0; 2274 } 2275 2276 return ret; 2277 } 2278 2279 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2280 phy_interface_t interface) 2281 { 2282 u32 flags = 0; 2283 2284 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2285 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2286 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2287 return -EINVAL; 2288 2289 if (pl->phydev) 2290 return -EBUSY; 2291 2292 if (pl->config->mac_requires_rxc) 2293 flags |= PHY_F_RXC_ALWAYS_ON; 2294 2295 return phy_attach_direct(pl->netdev, phy, flags, interface); 2296 } 2297 2298 /** 2299 * phylink_connect_phy() - connect a PHY to the phylink instance 2300 * @pl: a pointer to a &struct phylink returned from phylink_create() 2301 * @phy: a pointer to a &struct phy_device. 2302 * 2303 * Connect @phy to the phylink instance specified by @pl by calling 2304 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2305 * capabilities, start the PHYLIB state machine and enable any interrupts 2306 * that the PHY supports. 2307 * 2308 * This updates the phylink's ethtool supported and advertising link mode 2309 * masks. 2310 * 2311 * Returns 0 on success or a negative errno. 2312 */ 2313 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2314 { 2315 int ret; 2316 2317 /* Use PHY device/driver interface */ 2318 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2319 pl->link_interface = phy->interface; 2320 pl->link_config.interface = pl->link_interface; 2321 } 2322 2323 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2324 if (ret < 0) 2325 return ret; 2326 2327 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2328 if (ret) 2329 phy_detach(phy); 2330 2331 return ret; 2332 } 2333 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2334 2335 /** 2336 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2337 * @pl: a pointer to a &struct phylink returned from phylink_create() 2338 * @dn: a pointer to a &struct device_node. 2339 * @flags: PHY-specific flags to communicate to the PHY device driver 2340 * 2341 * Connect the phy specified in the device node @dn to the phylink instance 2342 * specified by @pl. Actions specified in phylink_connect_phy() will be 2343 * performed. 2344 * 2345 * Returns 0 on success or a negative errno. 2346 */ 2347 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2348 u32 flags) 2349 { 2350 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2351 } 2352 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2353 2354 /** 2355 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2356 * @pl: a pointer to a &struct phylink returned from phylink_create() 2357 * @fwnode: a pointer to a &struct fwnode_handle. 2358 * @flags: PHY-specific flags to communicate to the PHY device driver 2359 * 2360 * Connect the phy specified @fwnode to the phylink instance specified 2361 * by @pl. 2362 * 2363 * Returns 0 on success or a negative errno. 2364 */ 2365 int phylink_fwnode_phy_connect(struct phylink *pl, 2366 const struct fwnode_handle *fwnode, 2367 u32 flags) 2368 { 2369 struct fwnode_handle *phy_fwnode; 2370 struct phy_device *phy_dev; 2371 int ret; 2372 2373 /* Fixed links and 802.3z are handled without needing a PHY */ 2374 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2375 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2376 phy_interface_mode_is_8023z(pl->link_interface))) 2377 return 0; 2378 2379 phy_fwnode = fwnode_get_phy_node(fwnode); 2380 if (IS_ERR(phy_fwnode)) { 2381 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2382 return -ENODEV; 2383 return 0; 2384 } 2385 2386 phy_dev = fwnode_phy_find_device(phy_fwnode); 2387 /* We're done with the phy_node handle */ 2388 fwnode_handle_put(phy_fwnode); 2389 if (!phy_dev) 2390 return -ENODEV; 2391 2392 /* Use PHY device/driver interface */ 2393 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2394 pl->link_interface = phy_dev->interface; 2395 pl->link_config.interface = pl->link_interface; 2396 } 2397 2398 if (pl->config->mac_requires_rxc) 2399 flags |= PHY_F_RXC_ALWAYS_ON; 2400 2401 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2402 pl->link_interface); 2403 phy_device_free(phy_dev); 2404 if (ret) 2405 return ret; 2406 2407 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2408 if (ret) 2409 phy_detach(phy_dev); 2410 2411 return ret; 2412 } 2413 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2414 2415 /** 2416 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2417 * instance. 2418 * @pl: a pointer to a &struct phylink returned from phylink_create() 2419 * 2420 * Disconnect any current PHY from the phylink instance described by @pl. 2421 */ 2422 void phylink_disconnect_phy(struct phylink *pl) 2423 { 2424 struct phy_device *phy; 2425 2426 ASSERT_RTNL(); 2427 2428 phy = pl->phydev; 2429 if (phy) { 2430 mutex_lock(&phy->lock); 2431 mutex_lock(&pl->state_mutex); 2432 pl->phydev = NULL; 2433 pl->phy_enable_tx_lpi = false; 2434 pl->mac_tx_clk_stop = false; 2435 mutex_unlock(&pl->state_mutex); 2436 mutex_unlock(&phy->lock); 2437 flush_work(&pl->resolve); 2438 2439 phy_disconnect(phy); 2440 } 2441 } 2442 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2443 2444 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2445 { 2446 if (!up) 2447 pl->link_failed = true; 2448 phylink_run_resolve(pl); 2449 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2450 } 2451 2452 /** 2453 * phylink_mac_change() - notify phylink of a change in MAC state 2454 * @pl: a pointer to a &struct phylink returned from phylink_create() 2455 * @up: indicates whether the link is currently up. 2456 * 2457 * The MAC driver should call this driver when the state of its link 2458 * changes (eg, link failure, new negotiation results, etc.) 2459 */ 2460 void phylink_mac_change(struct phylink *pl, bool up) 2461 { 2462 phylink_link_changed(pl, up, "mac"); 2463 } 2464 EXPORT_SYMBOL_GPL(phylink_mac_change); 2465 2466 /** 2467 * phylink_pcs_change() - notify phylink of a change to PCS link state 2468 * @pcs: pointer to &struct phylink_pcs 2469 * @up: indicates whether the link is currently up. 2470 * 2471 * The PCS driver should call this when the state of its link changes 2472 * (e.g. link failure, new negotiation results, etc.) Note: it should 2473 * not determine "up" by reading the BMSR. If in doubt about the link 2474 * state at interrupt time, then pass true if pcs_get_state() returns 2475 * the latched link-down state, otherwise pass false. 2476 */ 2477 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2478 { 2479 struct phylink *pl = pcs->phylink; 2480 2481 if (pl) 2482 phylink_link_changed(pl, up, "pcs"); 2483 } 2484 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2485 2486 static irqreturn_t phylink_link_handler(int irq, void *data) 2487 { 2488 struct phylink *pl = data; 2489 2490 phylink_run_resolve(pl); 2491 2492 return IRQ_HANDLED; 2493 } 2494 2495 /** 2496 * phylink_start() - start a phylink instance 2497 * @pl: a pointer to a &struct phylink returned from phylink_create() 2498 * 2499 * Start the phylink instance specified by @pl, configuring the MAC for the 2500 * desired link mode(s) and negotiation style. This should be called from the 2501 * network device driver's &struct net_device_ops ndo_open() method. 2502 */ 2503 void phylink_start(struct phylink *pl) 2504 { 2505 bool poll = false; 2506 2507 ASSERT_RTNL(); 2508 2509 phylink_info(pl, "configuring for %s/%s link mode\n", 2510 phylink_an_mode_str(pl->req_link_an_mode), 2511 phy_modes(pl->link_config.interface)); 2512 2513 /* Always set the carrier off */ 2514 if (pl->netdev) 2515 netif_carrier_off(pl->netdev); 2516 2517 pl->pcs_state = PCS_STATE_STARTING; 2518 2519 /* Apply the link configuration to the MAC when starting. This allows 2520 * a fixed-link to start with the correct parameters, and also 2521 * ensures that we set the appropriate advertisement for Serdes links. 2522 * 2523 * Restart autonegotiation if using 802.3z to ensure that the link 2524 * parameters are properly negotiated. This is necessary for DSA 2525 * switches using 802.3z negotiation to ensure they see our modes. 2526 */ 2527 phylink_mac_initial_config(pl, true); 2528 2529 pl->pcs_state = PCS_STATE_STARTED; 2530 2531 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2532 2533 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2534 int irq = gpiod_to_irq(pl->link_gpio); 2535 2536 if (irq > 0) { 2537 if (!request_irq(irq, phylink_link_handler, 2538 IRQF_TRIGGER_RISING | 2539 IRQF_TRIGGER_FALLING, 2540 "netdev link", pl)) 2541 pl->link_irq = irq; 2542 else 2543 irq = 0; 2544 } 2545 if (irq <= 0) 2546 poll = true; 2547 } 2548 2549 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2550 poll |= pl->config->poll_fixed_state; 2551 2552 if (poll) 2553 mod_timer(&pl->link_poll, jiffies + HZ); 2554 if (pl->phydev) 2555 phy_start(pl->phydev); 2556 if (pl->sfp_bus) 2557 sfp_upstream_start(pl->sfp_bus); 2558 } 2559 EXPORT_SYMBOL_GPL(phylink_start); 2560 2561 /** 2562 * phylink_stop() - stop a phylink instance 2563 * @pl: a pointer to a &struct phylink returned from phylink_create() 2564 * 2565 * Stop the phylink instance specified by @pl. This should be called from the 2566 * network device driver's &struct net_device_ops ndo_stop() method. The 2567 * network device's carrier state should not be changed prior to calling this 2568 * function. 2569 * 2570 * This will synchronously bring down the link if the link is not already 2571 * down (in other words, it will trigger a mac_link_down() method call.) 2572 */ 2573 void phylink_stop(struct phylink *pl) 2574 { 2575 ASSERT_RTNL(); 2576 2577 if (pl->sfp_bus) 2578 sfp_upstream_stop(pl->sfp_bus); 2579 if (pl->phydev) 2580 phy_stop(pl->phydev); 2581 del_timer_sync(&pl->link_poll); 2582 if (pl->link_irq) { 2583 free_irq(pl->link_irq, pl); 2584 pl->link_irq = 0; 2585 } 2586 2587 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2588 2589 pl->pcs_state = PCS_STATE_DOWN; 2590 2591 phylink_pcs_disable(pl->pcs); 2592 } 2593 EXPORT_SYMBOL_GPL(phylink_stop); 2594 2595 /** 2596 * phylink_suspend() - handle a network device suspend event 2597 * @pl: a pointer to a &struct phylink returned from phylink_create() 2598 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2599 * 2600 * Handle a network device suspend event. There are several cases: 2601 * 2602 * - If Wake-on-Lan is not active, we can bring down the link between 2603 * the MAC and PHY by calling phylink_stop(). 2604 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2605 * can also bring down the link between the MAC and PHY. 2606 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2607 * still needs to receive packets, so we can not bring the link down. 2608 */ 2609 void phylink_suspend(struct phylink *pl, bool mac_wol) 2610 { 2611 ASSERT_RTNL(); 2612 2613 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2614 /* Wake-on-Lan enabled, MAC handling */ 2615 mutex_lock(&pl->state_mutex); 2616 2617 /* Stop the resolver bringing the link up */ 2618 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2619 2620 /* Disable the carrier, to prevent transmit timeouts, 2621 * but one would hope all packets have been sent. This 2622 * also means phylink_resolve() will do nothing. 2623 */ 2624 if (pl->netdev) 2625 netif_carrier_off(pl->netdev); 2626 else 2627 pl->old_link_state = false; 2628 2629 /* We do not call mac_link_down() here as we want the 2630 * link to remain up to receive the WoL packets. 2631 */ 2632 mutex_unlock(&pl->state_mutex); 2633 } else { 2634 phylink_stop(pl); 2635 } 2636 } 2637 EXPORT_SYMBOL_GPL(phylink_suspend); 2638 2639 /** 2640 * phylink_resume() - handle a network device resume event 2641 * @pl: a pointer to a &struct phylink returned from phylink_create() 2642 * 2643 * Undo the effects of phylink_suspend(), returning the link to an 2644 * operational state. 2645 */ 2646 void phylink_resume(struct phylink *pl) 2647 { 2648 ASSERT_RTNL(); 2649 2650 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2651 /* Wake-on-Lan enabled, MAC handling */ 2652 2653 /* Call mac_link_down() so we keep the overall state balanced. 2654 * Do this under the state_mutex lock for consistency. This 2655 * will cause a "Link Down" message to be printed during 2656 * resume, which is harmless - the true link state will be 2657 * printed when we run a resolve. 2658 */ 2659 mutex_lock(&pl->state_mutex); 2660 phylink_link_down(pl); 2661 mutex_unlock(&pl->state_mutex); 2662 2663 /* Re-apply the link parameters so that all the settings get 2664 * restored to the MAC. 2665 */ 2666 phylink_mac_initial_config(pl, true); 2667 2668 /* Re-enable and re-resolve the link parameters */ 2669 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2670 } else { 2671 phylink_start(pl); 2672 } 2673 } 2674 EXPORT_SYMBOL_GPL(phylink_resume); 2675 2676 /** 2677 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2678 * @pl: a pointer to a &struct phylink returned from phylink_create() 2679 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2680 * 2681 * Read the wake on lan parameters from the PHY attached to the phylink 2682 * instance specified by @pl. If no PHY is currently attached, report no 2683 * support for wake on lan. 2684 */ 2685 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2686 { 2687 ASSERT_RTNL(); 2688 2689 wol->supported = 0; 2690 wol->wolopts = 0; 2691 2692 if (pl->phydev) 2693 phy_ethtool_get_wol(pl->phydev, wol); 2694 } 2695 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2696 2697 /** 2698 * phylink_ethtool_set_wol() - set wake on lan parameters 2699 * @pl: a pointer to a &struct phylink returned from phylink_create() 2700 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2701 * 2702 * Set the wake on lan parameters for the PHY attached to the phylink 2703 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2704 * error. 2705 * 2706 * Returns zero on success or negative errno code. 2707 */ 2708 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2709 { 2710 int ret = -EOPNOTSUPP; 2711 2712 ASSERT_RTNL(); 2713 2714 if (pl->phydev) 2715 ret = phy_ethtool_set_wol(pl->phydev, wol); 2716 2717 return ret; 2718 } 2719 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2720 2721 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2722 const unsigned long *link_modes) 2723 { 2724 phy_interface_t interface; 2725 2726 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2727 if (interface == PHY_INTERFACE_MODE_NA) { 2728 phylink_err(pl, 2729 "selection of interface failed, advertisement %*pb\n", 2730 __ETHTOOL_LINK_MODE_MASK_NBITS, 2731 link_modes); 2732 return interface; 2733 } 2734 2735 if (!test_bit(interface, pl->config->supported_interfaces)) { 2736 phylink_err(pl, 2737 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2738 phy_modes(interface), interface, 2739 (int)PHY_INTERFACE_MODE_MAX, 2740 pl->config->supported_interfaces); 2741 return PHY_INTERFACE_MODE_NA; 2742 } 2743 2744 return interface; 2745 } 2746 2747 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2748 { 2749 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2750 2751 linkmode_zero(mask); 2752 phylink_set_port_modes(mask); 2753 2754 linkmode_and(dst, dst, mask); 2755 linkmode_or(dst, dst, b); 2756 } 2757 2758 static void phylink_get_ksettings(const struct phylink_link_state *state, 2759 struct ethtool_link_ksettings *kset) 2760 { 2761 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2762 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2763 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2764 kset->base.speed = state->speed; 2765 kset->base.duplex = state->duplex; 2766 } 2767 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2768 state->advertising) ? 2769 AUTONEG_ENABLE : AUTONEG_DISABLE; 2770 } 2771 2772 /** 2773 * phylink_ethtool_ksettings_get() - get the current link settings 2774 * @pl: a pointer to a &struct phylink returned from phylink_create() 2775 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2776 * 2777 * Read the current link settings for the phylink instance specified by @pl. 2778 * This will be the link settings read from the MAC, PHY or fixed link 2779 * settings depending on the current negotiation mode. 2780 */ 2781 int phylink_ethtool_ksettings_get(struct phylink *pl, 2782 struct ethtool_link_ksettings *kset) 2783 { 2784 struct phylink_link_state link_state; 2785 2786 ASSERT_RTNL(); 2787 2788 if (pl->phydev) 2789 phy_ethtool_ksettings_get(pl->phydev, kset); 2790 else 2791 kset->base.port = pl->link_port; 2792 2793 linkmode_copy(kset->link_modes.supported, pl->supported); 2794 2795 switch (pl->act_link_an_mode) { 2796 case MLO_AN_FIXED: 2797 /* We are using fixed settings. Report these as the 2798 * current link settings - and note that these also 2799 * represent the supported speeds/duplex/pause modes. 2800 */ 2801 phylink_get_fixed_state(pl, &link_state); 2802 phylink_get_ksettings(&link_state, kset); 2803 break; 2804 2805 case MLO_AN_INBAND: 2806 /* If there is a phy attached, then use the reported 2807 * settings from the phy with no modification. 2808 */ 2809 if (pl->phydev) 2810 break; 2811 2812 phylink_mac_pcs_get_state(pl, &link_state); 2813 2814 /* The MAC is reporting the link results from its own PCS 2815 * layer via in-band status. Report these as the current 2816 * link settings. 2817 */ 2818 phylink_get_ksettings(&link_state, kset); 2819 break; 2820 } 2821 2822 return 0; 2823 } 2824 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2825 2826 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2827 phy_interface_t interface, 2828 unsigned long *adv) 2829 { 2830 unsigned int inband = phylink_inband_caps(pl, interface); 2831 unsigned int mask; 2832 2833 /* If the PCS doesn't implement inband support, be permissive. */ 2834 if (!inband) 2835 return true; 2836 2837 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2838 mask = LINK_INBAND_ENABLE; 2839 else 2840 mask = LINK_INBAND_DISABLE; 2841 2842 /* Check whether the PCS implements the required mode */ 2843 return !!(inband & mask); 2844 } 2845 2846 /** 2847 * phylink_ethtool_ksettings_set() - set the link settings 2848 * @pl: a pointer to a &struct phylink returned from phylink_create() 2849 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2850 */ 2851 int phylink_ethtool_ksettings_set(struct phylink *pl, 2852 const struct ethtool_link_ksettings *kset) 2853 { 2854 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2855 struct phylink_link_state config; 2856 const struct phy_setting *s; 2857 2858 ASSERT_RTNL(); 2859 2860 if (pl->phydev) { 2861 struct ethtool_link_ksettings phy_kset = *kset; 2862 2863 linkmode_and(phy_kset.link_modes.advertising, 2864 phy_kset.link_modes.advertising, 2865 pl->supported); 2866 2867 /* We can rely on phylib for this update; we also do not need 2868 * to update the pl->link_config settings: 2869 * - the configuration returned via ksettings_get() will come 2870 * from phylib whenever a PHY is present. 2871 * - link_config.interface will be updated by the PHY calling 2872 * back via phylink_phy_change() and a subsequent resolve. 2873 * - initial link configuration for PHY mode comes from the 2874 * last phy state updated via phylink_phy_change(). 2875 * - other configuration changes (e.g. pause modes) are 2876 * performed directly via phylib. 2877 * - if in in-band mode with a PHY, the link configuration 2878 * is passed on the link from the PHY, and all of 2879 * link_config.{speed,duplex,an_enabled,pause} are not used. 2880 * - the only possible use would be link_config.advertising 2881 * pause modes when in 1000base-X mode with a PHY, but in 2882 * the presence of a PHY, this should not be changed as that 2883 * should be determined from the media side advertisement. 2884 */ 2885 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2886 } 2887 2888 config = pl->link_config; 2889 /* Mask out unsupported advertisements */ 2890 linkmode_and(config.advertising, kset->link_modes.advertising, 2891 pl->supported); 2892 2893 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2894 switch (kset->base.autoneg) { 2895 case AUTONEG_DISABLE: 2896 /* Autonegotiation disabled, select a suitable speed and 2897 * duplex. 2898 */ 2899 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2900 pl->supported, false); 2901 if (!s) 2902 return -EINVAL; 2903 2904 /* If we have a fixed link, refuse to change link parameters. 2905 * If the link parameters match, accept them but do nothing. 2906 */ 2907 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2908 if (s->speed != pl->link_config.speed || 2909 s->duplex != pl->link_config.duplex) 2910 return -EINVAL; 2911 return 0; 2912 } 2913 2914 config.speed = s->speed; 2915 config.duplex = s->duplex; 2916 break; 2917 2918 case AUTONEG_ENABLE: 2919 /* If we have a fixed link, allow autonegotiation (since that 2920 * is our default case) but do not allow the advertisement to 2921 * be changed. If the advertisement matches, simply return. 2922 */ 2923 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2924 if (!linkmode_equal(config.advertising, 2925 pl->link_config.advertising)) 2926 return -EINVAL; 2927 return 0; 2928 } 2929 2930 config.speed = SPEED_UNKNOWN; 2931 config.duplex = DUPLEX_UNKNOWN; 2932 break; 2933 2934 default: 2935 return -EINVAL; 2936 } 2937 2938 /* We have ruled out the case with a PHY attached, and the 2939 * fixed-link cases. All that is left are in-band links. 2940 */ 2941 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2942 kset->base.autoneg == AUTONEG_ENABLE); 2943 2944 /* If this link is with an SFP, ensure that changes to advertised modes 2945 * also cause the associated interface to be selected such that the 2946 * link can be configured correctly. 2947 */ 2948 if (pl->sfp_bus) { 2949 config.interface = phylink_sfp_select_interface(pl, 2950 config.advertising); 2951 if (config.interface == PHY_INTERFACE_MODE_NA) 2952 return -EINVAL; 2953 2954 /* Revalidate with the selected interface */ 2955 linkmode_copy(support, pl->supported); 2956 if (phylink_validate(pl, support, &config)) { 2957 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2958 phylink_an_mode_str(pl->req_link_an_mode), 2959 phy_modes(config.interface), 2960 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2961 return -EINVAL; 2962 } 2963 } else { 2964 /* Validate without changing the current supported mask. */ 2965 linkmode_copy(support, pl->supported); 2966 if (phylink_validate(pl, support, &config)) 2967 return -EINVAL; 2968 } 2969 2970 /* If autonegotiation is enabled, we must have an advertisement */ 2971 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2972 config.advertising) && 2973 phylink_is_empty_linkmode(config.advertising)) 2974 return -EINVAL; 2975 2976 /* Validate the autonegotiation state. We don't have a PHY in this 2977 * situation, so the PCS is the media-facing entity. 2978 */ 2979 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 2980 config.advertising)) 2981 return -EINVAL; 2982 2983 mutex_lock(&pl->state_mutex); 2984 pl->link_config.speed = config.speed; 2985 pl->link_config.duplex = config.duplex; 2986 2987 if (pl->link_config.interface != config.interface) { 2988 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2989 /* We need to force the link down, then change the interface */ 2990 if (pl->old_link_state) { 2991 phylink_link_down(pl); 2992 pl->old_link_state = false; 2993 } 2994 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2995 &pl->phylink_disable_state)) 2996 phylink_major_config(pl, false, &config); 2997 pl->link_config.interface = config.interface; 2998 linkmode_copy(pl->link_config.advertising, config.advertising); 2999 } else if (!linkmode_equal(pl->link_config.advertising, 3000 config.advertising)) { 3001 linkmode_copy(pl->link_config.advertising, config.advertising); 3002 phylink_change_inband_advert(pl); 3003 } 3004 mutex_unlock(&pl->state_mutex); 3005 3006 return 0; 3007 } 3008 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3009 3010 /** 3011 * phylink_ethtool_nway_reset() - restart negotiation 3012 * @pl: a pointer to a &struct phylink returned from phylink_create() 3013 * 3014 * Restart negotiation for the phylink instance specified by @pl. This will 3015 * cause any attached phy to restart negotiation with the link partner, and 3016 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3017 * negotiation. 3018 * 3019 * Returns zero on success, or negative error code. 3020 */ 3021 int phylink_ethtool_nway_reset(struct phylink *pl) 3022 { 3023 int ret = 0; 3024 3025 ASSERT_RTNL(); 3026 3027 if (pl->phydev) 3028 ret = phy_restart_aneg(pl->phydev); 3029 phylink_pcs_an_restart(pl); 3030 3031 return ret; 3032 } 3033 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3034 3035 /** 3036 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3037 * @pl: a pointer to a &struct phylink returned from phylink_create() 3038 * @pause: a pointer to a &struct ethtool_pauseparam 3039 */ 3040 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3041 struct ethtool_pauseparam *pause) 3042 { 3043 ASSERT_RTNL(); 3044 3045 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3046 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3047 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3048 } 3049 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3050 3051 /** 3052 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3053 * @pl: a pointer to a &struct phylink returned from phylink_create() 3054 * @pause: a pointer to a &struct ethtool_pauseparam 3055 */ 3056 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3057 struct ethtool_pauseparam *pause) 3058 { 3059 struct phylink_link_state *config = &pl->link_config; 3060 bool manual_changed; 3061 int pause_state; 3062 3063 ASSERT_RTNL(); 3064 3065 if (pl->req_link_an_mode == MLO_AN_FIXED) 3066 return -EOPNOTSUPP; 3067 3068 if (!phylink_test(pl->supported, Pause) && 3069 !phylink_test(pl->supported, Asym_Pause)) 3070 return -EOPNOTSUPP; 3071 3072 if (!phylink_test(pl->supported, Asym_Pause) && 3073 pause->rx_pause != pause->tx_pause) 3074 return -EINVAL; 3075 3076 pause_state = 0; 3077 if (pause->autoneg) 3078 pause_state |= MLO_PAUSE_AN; 3079 if (pause->rx_pause) 3080 pause_state |= MLO_PAUSE_RX; 3081 if (pause->tx_pause) 3082 pause_state |= MLO_PAUSE_TX; 3083 3084 mutex_lock(&pl->state_mutex); 3085 /* 3086 * See the comments for linkmode_set_pause(), wrt the deficiencies 3087 * with the current implementation. A solution to this issue would 3088 * be: 3089 * ethtool Local device 3090 * rx tx Pause AsymDir 3091 * 0 0 0 0 3092 * 1 0 1 1 3093 * 0 1 0 1 3094 * 1 1 1 1 3095 * and then use the ethtool rx/tx enablement status to mask the 3096 * rx/tx pause resolution. 3097 */ 3098 linkmode_set_pause(config->advertising, pause->tx_pause, 3099 pause->rx_pause); 3100 3101 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3102 (!(pause_state & MLO_PAUSE_AN) && 3103 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3104 3105 config->pause = pause_state; 3106 3107 /* Update our in-band advertisement, triggering a renegotiation if 3108 * the advertisement changed. 3109 */ 3110 if (!pl->phydev) 3111 phylink_change_inband_advert(pl); 3112 3113 mutex_unlock(&pl->state_mutex); 3114 3115 /* If we have a PHY, a change of the pause frame advertisement will 3116 * cause phylib to renegotiate (if AN is enabled) which will in turn 3117 * call our phylink_phy_change() and trigger a resolve. Note that 3118 * we can't hold our state mutex while calling phy_set_asym_pause(). 3119 */ 3120 if (pl->phydev) 3121 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3122 pause->tx_pause); 3123 3124 /* If the manual pause settings changed, make sure we trigger a 3125 * resolve to update their state; we can not guarantee that the 3126 * link will cycle. 3127 */ 3128 if (manual_changed) { 3129 pl->link_failed = true; 3130 phylink_run_resolve(pl); 3131 } 3132 3133 return 0; 3134 } 3135 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3136 3137 /** 3138 * phylink_get_eee_err() - read the energy efficient ethernet error 3139 * counter 3140 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3141 * 3142 * Read the Energy Efficient Ethernet error counter from the PHY associated 3143 * with the phylink instance specified by @pl. 3144 * 3145 * Returns positive error counter value, or negative error code. 3146 */ 3147 int phylink_get_eee_err(struct phylink *pl) 3148 { 3149 int ret = 0; 3150 3151 ASSERT_RTNL(); 3152 3153 if (pl->phydev) 3154 ret = phy_get_eee_err(pl->phydev); 3155 3156 return ret; 3157 } 3158 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3159 3160 /** 3161 * phylink_init_eee() - init and check the EEE features 3162 * @pl: a pointer to a &struct phylink returned from phylink_create() 3163 * @clk_stop_enable: allow PHY to stop receive clock 3164 * 3165 * Must be called either with RTNL held or within mac_link_up() 3166 */ 3167 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 3168 { 3169 int ret = -EOPNOTSUPP; 3170 3171 if (pl->phydev) 3172 ret = phy_init_eee(pl->phydev, clk_stop_enable); 3173 3174 return ret; 3175 } 3176 EXPORT_SYMBOL_GPL(phylink_init_eee); 3177 3178 /** 3179 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3180 * @pl: a pointer to a &struct phylink returned from phylink_create() 3181 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3182 */ 3183 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3184 { 3185 int ret = -EOPNOTSUPP; 3186 3187 ASSERT_RTNL(); 3188 3189 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3190 return ret; 3191 3192 if (pl->phydev) { 3193 ret = phy_ethtool_get_eee(pl->phydev, eee); 3194 /* Restrict supported linkmode mask */ 3195 if (ret == 0 && pl->mac_supports_eee_ops) 3196 linkmode_and(eee->supported, eee->supported, 3197 pl->supported_lpi); 3198 } 3199 3200 return ret; 3201 } 3202 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3203 3204 /** 3205 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3206 * @pl: a pointer to a &struct phylink returned from phylink_create() 3207 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3208 */ 3209 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3210 { 3211 bool mac_eee = pl->mac_supports_eee; 3212 int ret = -EOPNOTSUPP; 3213 3214 ASSERT_RTNL(); 3215 3216 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3217 mac_eee ? "supports" : "does not support", 3218 eee->eee_enabled ? ", enabled" : "", 3219 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3220 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3221 3222 if (pl->mac_supports_eee_ops && !mac_eee) 3223 return ret; 3224 3225 if (pl->phydev) { 3226 /* Restrict advertisement mask */ 3227 if (pl->mac_supports_eee_ops) 3228 linkmode_and(eee->advertised, eee->advertised, 3229 pl->supported_lpi); 3230 ret = phy_ethtool_set_eee(pl->phydev, eee); 3231 if (ret == 0) 3232 eee_to_eeecfg(&pl->eee_cfg, eee); 3233 } 3234 3235 return ret; 3236 } 3237 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3238 3239 /* This emulates MII registers for a fixed-mode phy operating as per the 3240 * passed in state. "aneg" defines if we report negotiation is possible. 3241 * 3242 * FIXME: should deal with negotiation state too. 3243 */ 3244 static int phylink_mii_emul_read(unsigned int reg, 3245 struct phylink_link_state *state) 3246 { 3247 struct fixed_phy_status fs; 3248 unsigned long *lpa = state->lp_advertising; 3249 int val; 3250 3251 fs.link = state->link; 3252 fs.speed = state->speed; 3253 fs.duplex = state->duplex; 3254 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3255 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3256 3257 val = swphy_read_reg(reg, &fs); 3258 if (reg == MII_BMSR) { 3259 if (!state->an_complete) 3260 val &= ~BMSR_ANEGCOMPLETE; 3261 } 3262 return val; 3263 } 3264 3265 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3266 unsigned int reg) 3267 { 3268 struct phy_device *phydev = pl->phydev; 3269 int prtad, devad; 3270 3271 if (mdio_phy_id_is_c45(phy_id)) { 3272 prtad = mdio_phy_id_prtad(phy_id); 3273 devad = mdio_phy_id_devad(phy_id); 3274 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3275 reg); 3276 } 3277 3278 if (phydev->is_c45) { 3279 switch (reg) { 3280 case MII_BMCR: 3281 case MII_BMSR: 3282 case MII_PHYSID1: 3283 case MII_PHYSID2: 3284 devad = __ffs(phydev->c45_ids.mmds_present); 3285 break; 3286 case MII_ADVERTISE: 3287 case MII_LPA: 3288 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3289 return -EINVAL; 3290 devad = MDIO_MMD_AN; 3291 if (reg == MII_ADVERTISE) 3292 reg = MDIO_AN_ADVERTISE; 3293 else 3294 reg = MDIO_AN_LPA; 3295 break; 3296 default: 3297 return -EINVAL; 3298 } 3299 prtad = phy_id; 3300 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3301 reg); 3302 } 3303 3304 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3305 } 3306 3307 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3308 unsigned int reg, unsigned int val) 3309 { 3310 struct phy_device *phydev = pl->phydev; 3311 int prtad, devad; 3312 3313 if (mdio_phy_id_is_c45(phy_id)) { 3314 prtad = mdio_phy_id_prtad(phy_id); 3315 devad = mdio_phy_id_devad(phy_id); 3316 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3317 reg, val); 3318 } 3319 3320 if (phydev->is_c45) { 3321 switch (reg) { 3322 case MII_BMCR: 3323 case MII_BMSR: 3324 case MII_PHYSID1: 3325 case MII_PHYSID2: 3326 devad = __ffs(phydev->c45_ids.mmds_present); 3327 break; 3328 case MII_ADVERTISE: 3329 case MII_LPA: 3330 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3331 return -EINVAL; 3332 devad = MDIO_MMD_AN; 3333 if (reg == MII_ADVERTISE) 3334 reg = MDIO_AN_ADVERTISE; 3335 else 3336 reg = MDIO_AN_LPA; 3337 break; 3338 default: 3339 return -EINVAL; 3340 } 3341 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3342 reg, val); 3343 } 3344 3345 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3346 } 3347 3348 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3349 unsigned int reg) 3350 { 3351 struct phylink_link_state state; 3352 int val = 0xffff; 3353 3354 switch (pl->act_link_an_mode) { 3355 case MLO_AN_FIXED: 3356 if (phy_id == 0) { 3357 phylink_get_fixed_state(pl, &state); 3358 val = phylink_mii_emul_read(reg, &state); 3359 } 3360 break; 3361 3362 case MLO_AN_PHY: 3363 return -EOPNOTSUPP; 3364 3365 case MLO_AN_INBAND: 3366 if (phy_id == 0) { 3367 phylink_mac_pcs_get_state(pl, &state); 3368 val = phylink_mii_emul_read(reg, &state); 3369 } 3370 break; 3371 } 3372 3373 return val & 0xffff; 3374 } 3375 3376 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3377 unsigned int reg, unsigned int val) 3378 { 3379 switch (pl->act_link_an_mode) { 3380 case MLO_AN_FIXED: 3381 break; 3382 3383 case MLO_AN_PHY: 3384 return -EOPNOTSUPP; 3385 3386 case MLO_AN_INBAND: 3387 break; 3388 } 3389 3390 return 0; 3391 } 3392 3393 /** 3394 * phylink_mii_ioctl() - generic mii ioctl interface 3395 * @pl: a pointer to a &struct phylink returned from phylink_create() 3396 * @ifr: a pointer to a &struct ifreq for socket ioctls 3397 * @cmd: ioctl cmd to execute 3398 * 3399 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3400 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3401 * 3402 * Returns: zero on success or negative error code. 3403 * 3404 * %SIOCGMIIPHY: 3405 * read register from the current PHY. 3406 * %SIOCGMIIREG: 3407 * read register from the specified PHY. 3408 * %SIOCSMIIREG: 3409 * set a register on the specified PHY. 3410 */ 3411 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3412 { 3413 struct mii_ioctl_data *mii = if_mii(ifr); 3414 int ret; 3415 3416 ASSERT_RTNL(); 3417 3418 if (pl->phydev) { 3419 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3420 switch (cmd) { 3421 case SIOCGMIIPHY: 3422 mii->phy_id = pl->phydev->mdio.addr; 3423 fallthrough; 3424 3425 case SIOCGMIIREG: 3426 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3427 if (ret >= 0) { 3428 mii->val_out = ret; 3429 ret = 0; 3430 } 3431 break; 3432 3433 case SIOCSMIIREG: 3434 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3435 mii->val_in); 3436 break; 3437 3438 default: 3439 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3440 break; 3441 } 3442 } else { 3443 switch (cmd) { 3444 case SIOCGMIIPHY: 3445 mii->phy_id = 0; 3446 fallthrough; 3447 3448 case SIOCGMIIREG: 3449 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3450 if (ret >= 0) { 3451 mii->val_out = ret; 3452 ret = 0; 3453 } 3454 break; 3455 3456 case SIOCSMIIREG: 3457 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3458 mii->val_in); 3459 break; 3460 3461 default: 3462 ret = -EOPNOTSUPP; 3463 break; 3464 } 3465 } 3466 3467 return ret; 3468 } 3469 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3470 3471 /** 3472 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3473 * link partners 3474 * @pl: a pointer to a &struct phylink returned from phylink_create() 3475 * @sync: perform action synchronously 3476 * 3477 * If we have a PHY that is not part of a SFP module, then set the speed 3478 * as described in the phy_speed_down() function. Please see this function 3479 * for a description of the @sync parameter. 3480 * 3481 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3482 */ 3483 int phylink_speed_down(struct phylink *pl, bool sync) 3484 { 3485 int ret = 0; 3486 3487 ASSERT_RTNL(); 3488 3489 if (!pl->sfp_bus && pl->phydev) 3490 ret = phy_speed_down(pl->phydev, sync); 3491 3492 return ret; 3493 } 3494 EXPORT_SYMBOL_GPL(phylink_speed_down); 3495 3496 /** 3497 * phylink_speed_up() - restore the advertised speeds prior to the call to 3498 * phylink_speed_down() 3499 * @pl: a pointer to a &struct phylink returned from phylink_create() 3500 * 3501 * If we have a PHY that is not part of a SFP module, then restore the 3502 * PHY speeds as per phy_speed_up(). 3503 * 3504 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3505 */ 3506 int phylink_speed_up(struct phylink *pl) 3507 { 3508 int ret = 0; 3509 3510 ASSERT_RTNL(); 3511 3512 if (!pl->sfp_bus && pl->phydev) 3513 ret = phy_speed_up(pl->phydev); 3514 3515 return ret; 3516 } 3517 EXPORT_SYMBOL_GPL(phylink_speed_up); 3518 3519 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3520 { 3521 struct phylink *pl = upstream; 3522 3523 pl->netdev->sfp_bus = bus; 3524 } 3525 3526 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3527 { 3528 struct phylink *pl = upstream; 3529 3530 pl->netdev->sfp_bus = NULL; 3531 } 3532 3533 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3534 const unsigned long *intf) 3535 { 3536 phy_interface_t interface; 3537 size_t i; 3538 3539 interface = PHY_INTERFACE_MODE_NA; 3540 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3541 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3542 interface = phylink_sfp_interface_preference[i]; 3543 break; 3544 } 3545 3546 return interface; 3547 } 3548 3549 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3550 struct phylink_link_state *state, 3551 bool changed) 3552 { 3553 u8 mode = MLO_AN_INBAND; 3554 3555 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3556 phylink_an_mode_str(mode), phy_modes(state->interface), 3557 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3558 3559 if (!linkmode_equal(pl->supported, supported)) { 3560 linkmode_copy(pl->supported, supported); 3561 changed = true; 3562 } 3563 3564 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3565 linkmode_copy(pl->link_config.advertising, state->advertising); 3566 changed = true; 3567 } 3568 3569 if (pl->req_link_an_mode != mode || 3570 pl->link_config.interface != state->interface) { 3571 pl->req_link_an_mode = mode; 3572 pl->link_config.interface = state->interface; 3573 3574 changed = true; 3575 3576 phylink_info(pl, "switched to %s/%s link mode\n", 3577 phylink_an_mode_str(mode), 3578 phy_modes(state->interface)); 3579 } 3580 3581 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3582 &pl->phylink_disable_state)) 3583 phylink_mac_initial_config(pl, false); 3584 } 3585 3586 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3587 { 3588 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3589 struct phylink_link_state config; 3590 int ret; 3591 3592 linkmode_copy(support, phy->supported); 3593 3594 memset(&config, 0, sizeof(config)); 3595 linkmode_copy(config.advertising, phy->advertising); 3596 config.interface = PHY_INTERFACE_MODE_NA; 3597 config.speed = SPEED_UNKNOWN; 3598 config.duplex = DUPLEX_UNKNOWN; 3599 config.pause = MLO_PAUSE_AN; 3600 3601 /* Ignore errors if we're expecting a PHY to attach later */ 3602 ret = phylink_validate(pl, support, &config); 3603 if (ret) { 3604 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3605 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3606 ERR_PTR(ret)); 3607 return ret; 3608 } 3609 3610 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3611 if (config.interface == PHY_INTERFACE_MODE_NA) 3612 return -EINVAL; 3613 3614 /* Attach the PHY so that the PHY is present when we do the major 3615 * configuration step. 3616 */ 3617 ret = phylink_attach_phy(pl, phy, config.interface); 3618 if (ret < 0) 3619 return ret; 3620 3621 /* This will validate the configuration for us. */ 3622 ret = phylink_bringup_phy(pl, phy, config.interface); 3623 if (ret < 0) { 3624 phy_detach(phy); 3625 return ret; 3626 } 3627 3628 pl->link_port = pl->sfp_port; 3629 3630 phylink_sfp_set_config(pl, support, &config, true); 3631 3632 return 0; 3633 } 3634 3635 static int phylink_sfp_config_optical(struct phylink *pl) 3636 { 3637 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3638 DECLARE_PHY_INTERFACE_MASK(interfaces); 3639 struct phylink_link_state config; 3640 phy_interface_t interface; 3641 int ret; 3642 3643 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3644 (int)PHY_INTERFACE_MODE_MAX, 3645 pl->config->supported_interfaces, 3646 (int)PHY_INTERFACE_MODE_MAX, 3647 pl->sfp_interfaces); 3648 3649 /* Find the union of the supported interfaces by the PCS/MAC and 3650 * the SFP module. 3651 */ 3652 phy_interface_and(interfaces, pl->config->supported_interfaces, 3653 pl->sfp_interfaces); 3654 if (phy_interface_empty(interfaces)) { 3655 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3656 return -EINVAL; 3657 } 3658 3659 memset(&config, 0, sizeof(config)); 3660 linkmode_copy(support, pl->sfp_support); 3661 linkmode_copy(config.advertising, pl->sfp_support); 3662 config.speed = SPEED_UNKNOWN; 3663 config.duplex = DUPLEX_UNKNOWN; 3664 config.pause = MLO_PAUSE_AN; 3665 3666 /* For all the interfaces that are supported, reduce the sfp_support 3667 * mask to only those link modes that can be supported. 3668 */ 3669 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3670 interfaces); 3671 if (ret) { 3672 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3673 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3674 return ret; 3675 } 3676 3677 interface = phylink_choose_sfp_interface(pl, interfaces); 3678 if (interface == PHY_INTERFACE_MODE_NA) { 3679 phylink_err(pl, "failed to select SFP interface\n"); 3680 return -EINVAL; 3681 } 3682 3683 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3684 phy_modes(interface)); 3685 3686 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3687 config.advertising)) { 3688 phylink_err(pl, "autoneg setting not compatible with PCS"); 3689 return -EINVAL; 3690 } 3691 3692 config.interface = interface; 3693 3694 /* Ignore errors if we're expecting a PHY to attach later */ 3695 ret = phylink_validate(pl, support, &config); 3696 if (ret) { 3697 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3698 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3699 ERR_PTR(ret)); 3700 return ret; 3701 } 3702 3703 pl->link_port = pl->sfp_port; 3704 3705 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3706 3707 return 0; 3708 } 3709 3710 static int phylink_sfp_module_insert(void *upstream, 3711 const struct sfp_eeprom_id *id) 3712 { 3713 struct phylink *pl = upstream; 3714 3715 ASSERT_RTNL(); 3716 3717 linkmode_zero(pl->sfp_support); 3718 phy_interface_zero(pl->sfp_interfaces); 3719 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3720 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3721 3722 /* If this module may have a PHY connecting later, defer until later */ 3723 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3724 if (pl->sfp_may_have_phy) 3725 return 0; 3726 3727 return phylink_sfp_config_optical(pl); 3728 } 3729 3730 static int phylink_sfp_module_start(void *upstream) 3731 { 3732 struct phylink *pl = upstream; 3733 3734 /* If this SFP module has a PHY, start the PHY now. */ 3735 if (pl->phydev) { 3736 phy_start(pl->phydev); 3737 return 0; 3738 } 3739 3740 /* If the module may have a PHY but we didn't detect one we 3741 * need to configure the MAC here. 3742 */ 3743 if (!pl->sfp_may_have_phy) 3744 return 0; 3745 3746 return phylink_sfp_config_optical(pl); 3747 } 3748 3749 static void phylink_sfp_module_stop(void *upstream) 3750 { 3751 struct phylink *pl = upstream; 3752 3753 /* If this SFP module has a PHY, stop it. */ 3754 if (pl->phydev) 3755 phy_stop(pl->phydev); 3756 } 3757 3758 static void phylink_sfp_link_down(void *upstream) 3759 { 3760 struct phylink *pl = upstream; 3761 3762 ASSERT_RTNL(); 3763 3764 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3765 } 3766 3767 static void phylink_sfp_link_up(void *upstream) 3768 { 3769 struct phylink *pl = upstream; 3770 3771 ASSERT_RTNL(); 3772 3773 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3774 } 3775 3776 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3777 { 3778 struct phylink *pl = upstream; 3779 3780 if (!phy->drv) { 3781 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3782 phydev_name(phy), (unsigned long)phy->phy_id); 3783 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3784 return -EINVAL; 3785 } 3786 3787 /* 3788 * This is the new way of dealing with flow control for PHYs, 3789 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3790 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3791 * using our validate call to the MAC, we rely upon the MAC 3792 * clearing the bits from both supported and advertising fields. 3793 */ 3794 phy_support_asym_pause(phy); 3795 3796 /* Set the PHY's host supported interfaces */ 3797 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3798 pl->config->supported_interfaces); 3799 3800 /* Do the initial configuration */ 3801 return phylink_sfp_config_phy(pl, phy); 3802 } 3803 3804 static void phylink_sfp_disconnect_phy(void *upstream, 3805 struct phy_device *phydev) 3806 { 3807 phylink_disconnect_phy(upstream); 3808 } 3809 3810 static const struct sfp_upstream_ops sfp_phylink_ops = { 3811 .attach = phylink_sfp_attach, 3812 .detach = phylink_sfp_detach, 3813 .module_insert = phylink_sfp_module_insert, 3814 .module_start = phylink_sfp_module_start, 3815 .module_stop = phylink_sfp_module_stop, 3816 .link_up = phylink_sfp_link_up, 3817 .link_down = phylink_sfp_link_down, 3818 .connect_phy = phylink_sfp_connect_phy, 3819 .disconnect_phy = phylink_sfp_disconnect_phy, 3820 }; 3821 3822 /* Helpers for MAC drivers */ 3823 3824 static struct { 3825 int bit; 3826 int speed; 3827 } phylink_c73_priority_resolution[] = { 3828 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3829 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3830 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3831 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3832 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3833 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3834 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3835 /* 5GBASE-KR not supported */ 3836 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3837 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3838 }; 3839 3840 void phylink_resolve_c73(struct phylink_link_state *state) 3841 { 3842 int i; 3843 3844 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3845 int bit = phylink_c73_priority_resolution[i].bit; 3846 if (linkmode_test_bit(bit, state->advertising) && 3847 linkmode_test_bit(bit, state->lp_advertising)) 3848 break; 3849 } 3850 3851 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3852 state->speed = phylink_c73_priority_resolution[i].speed; 3853 state->duplex = DUPLEX_FULL; 3854 } else { 3855 /* negotiation failure */ 3856 state->link = false; 3857 } 3858 3859 phylink_resolve_an_pause(state); 3860 } 3861 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3862 3863 static void phylink_decode_c37_word(struct phylink_link_state *state, 3864 uint16_t config_reg, int speed) 3865 { 3866 int fd_bit; 3867 3868 if (speed == SPEED_2500) 3869 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3870 else 3871 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3872 3873 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3874 3875 if (linkmode_test_bit(fd_bit, state->advertising) && 3876 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3877 state->speed = speed; 3878 state->duplex = DUPLEX_FULL; 3879 } else { 3880 /* negotiation failure */ 3881 state->link = false; 3882 } 3883 3884 phylink_resolve_an_pause(state); 3885 } 3886 3887 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3888 uint16_t config_reg) 3889 { 3890 if (!(config_reg & LPA_SGMII_LINK)) { 3891 state->link = false; 3892 return; 3893 } 3894 3895 switch (config_reg & LPA_SGMII_SPD_MASK) { 3896 case LPA_SGMII_10: 3897 state->speed = SPEED_10; 3898 break; 3899 case LPA_SGMII_100: 3900 state->speed = SPEED_100; 3901 break; 3902 case LPA_SGMII_1000: 3903 state->speed = SPEED_1000; 3904 break; 3905 default: 3906 state->link = false; 3907 return; 3908 } 3909 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3910 state->duplex = DUPLEX_FULL; 3911 else 3912 state->duplex = DUPLEX_HALF; 3913 } 3914 3915 /** 3916 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3917 * @state: a pointer to a struct phylink_link_state. 3918 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3919 * 3920 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3921 * code word. Decode the USXGMII code word and populate the corresponding fields 3922 * (speed, duplex) into the phylink_link_state structure. 3923 */ 3924 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3925 uint16_t lpa) 3926 { 3927 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3928 case MDIO_USXGMII_10: 3929 state->speed = SPEED_10; 3930 break; 3931 case MDIO_USXGMII_100: 3932 state->speed = SPEED_100; 3933 break; 3934 case MDIO_USXGMII_1000: 3935 state->speed = SPEED_1000; 3936 break; 3937 case MDIO_USXGMII_2500: 3938 state->speed = SPEED_2500; 3939 break; 3940 case MDIO_USXGMII_5000: 3941 state->speed = SPEED_5000; 3942 break; 3943 case MDIO_USXGMII_10G: 3944 state->speed = SPEED_10000; 3945 break; 3946 default: 3947 state->link = false; 3948 return; 3949 } 3950 3951 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3952 state->duplex = DUPLEX_FULL; 3953 else 3954 state->duplex = DUPLEX_HALF; 3955 } 3956 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3957 3958 /** 3959 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3960 * @state: a pointer to a struct phylink_link_state. 3961 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3962 * 3963 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3964 * code word. Decode the USGMII code word and populate the corresponding fields 3965 * (speed, duplex) into the phylink_link_state structure. The structure for this 3966 * word is the same as the USXGMII word, except it only supports speeds up to 3967 * 1Gbps. 3968 */ 3969 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3970 uint16_t lpa) 3971 { 3972 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3973 case MDIO_USXGMII_10: 3974 state->speed = SPEED_10; 3975 break; 3976 case MDIO_USXGMII_100: 3977 state->speed = SPEED_100; 3978 break; 3979 case MDIO_USXGMII_1000: 3980 state->speed = SPEED_1000; 3981 break; 3982 default: 3983 state->link = false; 3984 return; 3985 } 3986 3987 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3988 state->duplex = DUPLEX_FULL; 3989 else 3990 state->duplex = DUPLEX_HALF; 3991 } 3992 3993 /** 3994 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3995 * @state: a pointer to a &struct phylink_link_state. 3996 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 3997 * @bmsr: The value of the %MII_BMSR register 3998 * @lpa: The value of the %MII_LPA register 3999 * 4000 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4001 * clause 37 negotiation and/or SGMII control. 4002 * 4003 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4004 * the phylink @state structure. This is suitable to be used for implementing 4005 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4006 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4007 */ 4008 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4009 unsigned int neg_mode, u16 bmsr, u16 lpa) 4010 { 4011 state->link = !!(bmsr & BMSR_LSTATUS); 4012 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4013 4014 /* If the link is down, the advertisement data is undefined. */ 4015 if (!state->link) 4016 return; 4017 4018 switch (state->interface) { 4019 case PHY_INTERFACE_MODE_1000BASEX: 4020 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4021 phylink_decode_c37_word(state, lpa, SPEED_1000); 4022 } else { 4023 state->speed = SPEED_1000; 4024 state->duplex = DUPLEX_FULL; 4025 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4026 } 4027 break; 4028 4029 case PHY_INTERFACE_MODE_2500BASEX: 4030 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4031 phylink_decode_c37_word(state, lpa, SPEED_2500); 4032 } else { 4033 state->speed = SPEED_2500; 4034 state->duplex = DUPLEX_FULL; 4035 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4036 } 4037 break; 4038 4039 case PHY_INTERFACE_MODE_SGMII: 4040 case PHY_INTERFACE_MODE_QSGMII: 4041 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4042 phylink_decode_sgmii_word(state, lpa); 4043 break; 4044 4045 case PHY_INTERFACE_MODE_QUSGMII: 4046 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4047 phylink_decode_usgmii_word(state, lpa); 4048 break; 4049 4050 default: 4051 state->link = false; 4052 break; 4053 } 4054 } 4055 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4056 4057 /** 4058 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4059 * @pcs: a pointer to a &struct mdio_device. 4060 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4061 * @state: a pointer to a &struct phylink_link_state. 4062 * 4063 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4064 * clause 37 negotiation and/or SGMII control. 4065 * 4066 * Read the MAC PCS state from the MII device configured in @config and 4067 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4068 * the phylink @state structure. This is suitable to be directly plugged 4069 * into the pcs_get_state() member of the struct phylink_pcs_ops 4070 * structure. 4071 */ 4072 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4073 unsigned int neg_mode, 4074 struct phylink_link_state *state) 4075 { 4076 int bmsr, lpa; 4077 4078 bmsr = mdiodev_read(pcs, MII_BMSR); 4079 lpa = mdiodev_read(pcs, MII_LPA); 4080 if (bmsr < 0 || lpa < 0) { 4081 state->link = false; 4082 return; 4083 } 4084 4085 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4086 } 4087 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4088 4089 /** 4090 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4091 * advertisement 4092 * @interface: the PHY interface mode being configured 4093 * @advertising: the ethtool advertisement mask 4094 * 4095 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4096 * clause 37 negotiation and/or SGMII control. 4097 * 4098 * Encode the clause 37 PCS advertisement as specified by @interface and 4099 * @advertising. 4100 * 4101 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4102 */ 4103 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4104 const unsigned long *advertising) 4105 { 4106 u16 adv; 4107 4108 switch (interface) { 4109 case PHY_INTERFACE_MODE_1000BASEX: 4110 case PHY_INTERFACE_MODE_2500BASEX: 4111 adv = ADVERTISE_1000XFULL; 4112 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4113 advertising)) 4114 adv |= ADVERTISE_1000XPAUSE; 4115 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4116 advertising)) 4117 adv |= ADVERTISE_1000XPSE_ASYM; 4118 return adv; 4119 case PHY_INTERFACE_MODE_SGMII: 4120 case PHY_INTERFACE_MODE_QSGMII: 4121 return 0x0001; 4122 default: 4123 /* Nothing to do for other modes */ 4124 return -EINVAL; 4125 } 4126 } 4127 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4128 4129 /** 4130 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4131 * @pcs: a pointer to a &struct mdio_device. 4132 * @interface: the PHY interface mode being configured 4133 * @advertising: the ethtool advertisement mask 4134 * @neg_mode: PCS negotiation mode 4135 * 4136 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4137 * parameters for the @mode, @interface and @advertising parameters. 4138 * Returns negative error number on failure, zero if the advertisement 4139 * has not changed, or positive if there is a change. 4140 */ 4141 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4142 phy_interface_t interface, 4143 const unsigned long *advertising, 4144 unsigned int neg_mode) 4145 { 4146 bool changed = 0; 4147 u16 bmcr; 4148 int ret, adv; 4149 4150 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4151 if (adv >= 0) { 4152 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4153 MII_ADVERTISE, 0xffff, adv); 4154 if (ret < 0) 4155 return ret; 4156 changed = ret; 4157 } 4158 4159 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4160 bmcr = BMCR_ANENABLE; 4161 else 4162 bmcr = 0; 4163 4164 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4165 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4166 if (ret < 0) 4167 return ret; 4168 4169 return changed; 4170 } 4171 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4172 4173 /** 4174 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4175 * @pcs: a pointer to a &struct mdio_device. 4176 * 4177 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4178 * clause 37 negotiation. 4179 * 4180 * Restart the clause 37 negotiation with the link partner. This is 4181 * suitable to be directly plugged into the pcs_get_state() member 4182 * of the struct phylink_pcs_ops structure. 4183 */ 4184 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4185 { 4186 int val = mdiodev_read(pcs, MII_BMCR); 4187 4188 if (val >= 0) { 4189 val |= BMCR_ANRESTART; 4190 4191 mdiodev_write(pcs, MII_BMCR, val); 4192 } 4193 } 4194 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4195 4196 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4197 struct phylink_link_state *state) 4198 { 4199 struct mii_bus *bus = pcs->bus; 4200 int addr = pcs->addr; 4201 int stat; 4202 4203 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4204 if (stat < 0) { 4205 state->link = false; 4206 return; 4207 } 4208 4209 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4210 if (!state->link) 4211 return; 4212 4213 switch (state->interface) { 4214 case PHY_INTERFACE_MODE_10GBASER: 4215 state->speed = SPEED_10000; 4216 state->duplex = DUPLEX_FULL; 4217 break; 4218 4219 default: 4220 break; 4221 } 4222 } 4223 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4224 4225 static int __init phylink_init(void) 4226 { 4227 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4228 __set_bit(phylink_sfp_interface_preference[i], 4229 phylink_sfp_interfaces); 4230 4231 return 0; 4232 } 4233 4234 module_init(phylink_init); 4235 4236 MODULE_LICENSE("GPL v2"); 4237 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4238