1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 return SPEED_2500; 235 236 case PHY_INTERFACE_MODE_5GBASER: 237 return SPEED_5000; 238 239 case PHY_INTERFACE_MODE_XGMII: 240 case PHY_INTERFACE_MODE_RXAUI: 241 case PHY_INTERFACE_MODE_XAUI: 242 case PHY_INTERFACE_MODE_10GBASER: 243 case PHY_INTERFACE_MODE_10GKR: 244 case PHY_INTERFACE_MODE_USXGMII: 245 return SPEED_10000; 246 247 case PHY_INTERFACE_MODE_25GBASER: 248 return SPEED_25000; 249 250 case PHY_INTERFACE_MODE_XLGMII: 251 return SPEED_40000; 252 253 case PHY_INTERFACE_MODE_INTERNAL: 254 case PHY_INTERFACE_MODE_NA: 255 case PHY_INTERFACE_MODE_MAX: 256 /* No idea! Garbage in, unknown out */ 257 return SPEED_UNKNOWN; 258 } 259 260 /* If we get here, someone forgot to add an interface mode above */ 261 WARN_ON_ONCE(1); 262 return SPEED_UNKNOWN; 263 } 264 265 /** 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 267 * @linkmodes: ethtool linkmode mask (must be already initialised) 268 * @caps: bitmask of MAC capabilities 269 * 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 271 * supported by the @caps. @linkmodes must have been initialised previously. 272 */ 273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 274 unsigned long caps) 275 { 276 if (caps & MAC_SYM_PAUSE) 277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 278 279 if (caps & MAC_ASYM_PAUSE) 280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 281 282 if (caps & MAC_10HD) { 283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 286 } 287 288 if (caps & MAC_10FD) { 289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_100HD) { 295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 297 } 298 299 if (caps & MAC_100FD) { 300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_1000HD) 306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 307 308 if (caps & MAC_1000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 313 } 314 315 if (caps & MAC_2500FD) { 316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_5000FD) 321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 322 323 if (caps & MAC_10000FD) { 324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_25000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 339 } 340 341 if (caps & MAC_40000FD) { 342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 346 } 347 348 if (caps & MAC_50000FD) { 349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_56000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 365 } 366 367 if (caps & MAC_100000FD) { 368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 372 linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_200000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 400 } 401 402 if (caps & MAC_400000FD) { 403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 412 linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 415 } 416 } 417 418 static struct { 419 unsigned long mask; 420 int speed; 421 unsigned int duplex; 422 } phylink_caps_params[] = { 423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 436 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 437 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 438 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 439 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 440 }; 441 442 /** 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 444 * @config: pointer to a &struct phylink_config 445 * @max_speed: maximum speed 446 * 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 448 * Any further motifications of config.mac_capabilities will override this. 449 */ 450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 451 { 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 455 phylink_caps_params[i].speed > max_speed; i++) 456 config->mac_capabilities &= ~phylink_caps_params[i].mask; 457 } 458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 459 460 /** 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 462 * @speed: the speed to search for 463 * @duplex: the duplex to search for 464 * 465 * Find the mac capability for a given speed and duplex. 466 * 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 468 * there were no matches. 469 */ 470 static unsigned long phylink_cap_from_speed_duplex(int speed, 471 unsigned int duplex) 472 { 473 int i; 474 475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 476 if (speed == phylink_caps_params[i].speed && 477 duplex == phylink_caps_params[i].duplex) 478 return phylink_caps_params[i].mask; 479 } 480 481 return 0; 482 } 483 484 /** 485 * phylink_get_capabilities() - get capabilities for a given MAC 486 * @interface: phy interface mode defined by &typedef phy_interface_t 487 * @mac_capabilities: bitmask of MAC capabilities 488 * @rate_matching: type of rate matching being performed 489 * 490 * Get the MAC capabilities that are supported by the @interface mode and 491 * @mac_capabilities. 492 */ 493 static unsigned long phylink_get_capabilities(phy_interface_t interface, 494 unsigned long mac_capabilities, 495 int rate_matching) 496 { 497 int max_speed = phylink_interface_max_speed(interface); 498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 499 unsigned long matched_caps = 0; 500 501 switch (interface) { 502 case PHY_INTERFACE_MODE_USXGMII: 503 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 504 fallthrough; 505 506 case PHY_INTERFACE_MODE_RGMII_TXID: 507 case PHY_INTERFACE_MODE_RGMII_RXID: 508 case PHY_INTERFACE_MODE_RGMII_ID: 509 case PHY_INTERFACE_MODE_RGMII: 510 case PHY_INTERFACE_MODE_PSGMII: 511 case PHY_INTERFACE_MODE_QSGMII: 512 case PHY_INTERFACE_MODE_QUSGMII: 513 case PHY_INTERFACE_MODE_SGMII: 514 case PHY_INTERFACE_MODE_GMII: 515 caps |= MAC_1000HD | MAC_1000FD; 516 fallthrough; 517 518 case PHY_INTERFACE_MODE_REVRMII: 519 case PHY_INTERFACE_MODE_RMII: 520 case PHY_INTERFACE_MODE_SMII: 521 case PHY_INTERFACE_MODE_REVMII: 522 case PHY_INTERFACE_MODE_MII: 523 caps |= MAC_10HD | MAC_10FD; 524 fallthrough; 525 526 case PHY_INTERFACE_MODE_100BASEX: 527 caps |= MAC_100HD | MAC_100FD; 528 break; 529 530 case PHY_INTERFACE_MODE_TBI: 531 case PHY_INTERFACE_MODE_MOCA: 532 case PHY_INTERFACE_MODE_RTBI: 533 case PHY_INTERFACE_MODE_1000BASEX: 534 caps |= MAC_1000HD; 535 fallthrough; 536 case PHY_INTERFACE_MODE_1000BASEKX: 537 case PHY_INTERFACE_MODE_TRGMII: 538 caps |= MAC_1000FD; 539 break; 540 541 case PHY_INTERFACE_MODE_2500BASEX: 542 caps |= MAC_2500FD; 543 break; 544 545 case PHY_INTERFACE_MODE_5GBASER: 546 caps |= MAC_5000FD; 547 break; 548 549 case PHY_INTERFACE_MODE_XGMII: 550 case PHY_INTERFACE_MODE_RXAUI: 551 case PHY_INTERFACE_MODE_XAUI: 552 case PHY_INTERFACE_MODE_10GBASER: 553 case PHY_INTERFACE_MODE_10GKR: 554 caps |= MAC_10000FD; 555 break; 556 557 case PHY_INTERFACE_MODE_25GBASER: 558 caps |= MAC_25000FD; 559 break; 560 561 case PHY_INTERFACE_MODE_XLGMII: 562 caps |= MAC_40000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_INTERNAL: 566 caps |= ~0; 567 break; 568 569 case PHY_INTERFACE_MODE_NA: 570 case PHY_INTERFACE_MODE_MAX: 571 break; 572 } 573 574 switch (rate_matching) { 575 case RATE_MATCH_OPEN_LOOP: 576 /* TODO */ 577 fallthrough; 578 case RATE_MATCH_NONE: 579 matched_caps = 0; 580 break; 581 case RATE_MATCH_PAUSE: { 582 /* The MAC must support asymmetric pause towards the local 583 * device for this. We could allow just symmetric pause, but 584 * then we might have to renegotiate if the link partner 585 * doesn't support pause. This is because there's no way to 586 * accept pause frames without transmitting them if we only 587 * support symmetric pause. 588 */ 589 if (!(mac_capabilities & MAC_SYM_PAUSE) || 590 !(mac_capabilities & MAC_ASYM_PAUSE)) 591 break; 592 593 /* We can't adapt if the MAC doesn't support the interface's 594 * max speed at full duplex. 595 */ 596 if (mac_capabilities & 597 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 598 /* Although a duplex-matching phy might exist, we 599 * conservatively remove these modes because the MAC 600 * will not be aware of the half-duplex nature of the 601 * link. 602 */ 603 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 604 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 605 } 606 break; 607 } 608 case RATE_MATCH_CRS: 609 /* The MAC must support half duplex at the interface's max 610 * speed. 611 */ 612 if (mac_capabilities & 613 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 614 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 615 matched_caps &= mac_capabilities; 616 } 617 break; 618 } 619 620 return (caps & mac_capabilities) | matched_caps; 621 } 622 623 /** 624 * phylink_validate_mask_caps() - Restrict link modes based on caps 625 * @supported: ethtool bitmask for supported link modes. 626 * @state: pointer to a &struct phylink_link_state. 627 * @mac_capabilities: bitmask of MAC capabilities 628 * 629 * Calculate the supported link modes based on @mac_capabilities, and restrict 630 * @supported and @state based on that. Use this function if your capabiliies 631 * aren't constant, such as if they vary depending on the interface. 632 */ 633 static void phylink_validate_mask_caps(unsigned long *supported, 634 struct phylink_link_state *state, 635 unsigned long mac_capabilities) 636 { 637 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 638 unsigned long caps; 639 640 phylink_set_port_modes(mask); 641 phylink_set(mask, Autoneg); 642 caps = phylink_get_capabilities(state->interface, mac_capabilities, 643 state->rate_matching); 644 phylink_caps_to_linkmodes(mask, caps); 645 646 linkmode_and(supported, supported, mask); 647 linkmode_and(state->advertising, state->advertising, mask); 648 } 649 650 static int phylink_validate_mac_and_pcs(struct phylink *pl, 651 unsigned long *supported, 652 struct phylink_link_state *state) 653 { 654 unsigned long capabilities; 655 struct phylink_pcs *pcs; 656 int ret; 657 658 /* Get the PCS for this interface mode */ 659 if (pl->using_mac_select_pcs) { 660 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 661 if (IS_ERR(pcs)) 662 return PTR_ERR(pcs); 663 } else { 664 pcs = pl->pcs; 665 } 666 667 if (pcs) { 668 /* The PCS, if present, must be setup before phylink_create() 669 * has been called. If the ops is not initialised, print an 670 * error and backtrace rather than oopsing the kernel. 671 */ 672 if (!pcs->ops) { 673 phylink_err(pl, "interface %s: uninitialised PCS\n", 674 phy_modes(state->interface)); 675 dump_stack(); 676 return -EINVAL; 677 } 678 679 /* Validate the link parameters with the PCS */ 680 if (pcs->ops->pcs_validate) { 681 ret = pcs->ops->pcs_validate(pcs, supported, state); 682 if (ret < 0 || phylink_is_empty_linkmode(supported)) 683 return -EINVAL; 684 685 /* Ensure the advertising mask is a subset of the 686 * supported mask. 687 */ 688 linkmode_and(state->advertising, state->advertising, 689 supported); 690 } 691 } 692 693 /* Then validate the link parameters with the MAC */ 694 if (pl->mac_ops->mac_get_caps) 695 capabilities = pl->mac_ops->mac_get_caps(pl->config, 696 state->interface); 697 else 698 capabilities = pl->config->mac_capabilities; 699 700 phylink_validate_mask_caps(supported, state, capabilities); 701 702 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 703 } 704 705 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 706 const unsigned long *supported, 707 const struct phylink_link_state *state, 708 phy_interface_t interface, 709 unsigned long *accum_supported, 710 unsigned long *accum_advertising) 711 { 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 713 struct phylink_link_state tmp_state; 714 715 linkmode_copy(tmp_supported, supported); 716 717 tmp_state = *state; 718 tmp_state.interface = interface; 719 720 if (phy) 721 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 722 723 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 724 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 725 interface, phy_modes(interface), 726 phy_rate_matching_to_str(tmp_state.rate_matching), 727 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 728 729 linkmode_or(accum_supported, accum_supported, tmp_supported); 730 linkmode_or(accum_advertising, accum_advertising, 731 tmp_state.advertising); 732 } 733 } 734 735 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 736 unsigned long *supported, 737 struct phylink_link_state *state, 738 const unsigned long *interfaces) 739 { 740 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 741 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 742 int interface; 743 744 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 745 phylink_validate_one(pl, phy, supported, state, interface, 746 all_s, all_adv); 747 748 linkmode_copy(supported, all_s); 749 linkmode_copy(state->advertising, all_adv); 750 751 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 752 } 753 754 static int phylink_validate(struct phylink *pl, unsigned long *supported, 755 struct phylink_link_state *state) 756 { 757 const unsigned long *interfaces = pl->config->supported_interfaces; 758 759 if (state->interface == PHY_INTERFACE_MODE_NA) 760 return phylink_validate_mask(pl, NULL, supported, state, 761 interfaces); 762 763 if (!test_bit(state->interface, interfaces)) 764 return -EINVAL; 765 766 return phylink_validate_mac_and_pcs(pl, supported, state); 767 } 768 769 static int phylink_parse_fixedlink(struct phylink *pl, 770 const struct fwnode_handle *fwnode) 771 { 772 struct fwnode_handle *fixed_node; 773 bool pause, asym_pause, autoneg; 774 const struct phy_setting *s; 775 struct gpio_desc *desc; 776 u32 speed; 777 int ret; 778 779 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 780 if (fixed_node) { 781 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 782 783 pl->link_config.speed = speed; 784 pl->link_config.duplex = DUPLEX_HALF; 785 786 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 787 pl->link_config.duplex = DUPLEX_FULL; 788 789 /* We treat the "pause" and "asym-pause" terminology as 790 * defining the link partner's ability. 791 */ 792 if (fwnode_property_read_bool(fixed_node, "pause")) 793 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 794 pl->link_config.lp_advertising); 795 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 796 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 797 pl->link_config.lp_advertising); 798 799 if (ret == 0) { 800 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 801 GPIOD_IN, "?"); 802 803 if (!IS_ERR(desc)) 804 pl->link_gpio = desc; 805 else if (desc == ERR_PTR(-EPROBE_DEFER)) 806 ret = -EPROBE_DEFER; 807 } 808 fwnode_handle_put(fixed_node); 809 810 if (ret) 811 return ret; 812 } else { 813 u32 prop[5]; 814 815 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 816 NULL, 0); 817 if (ret != ARRAY_SIZE(prop)) { 818 phylink_err(pl, "broken fixed-link?\n"); 819 return -EINVAL; 820 } 821 822 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 823 prop, ARRAY_SIZE(prop)); 824 if (!ret) { 825 pl->link_config.duplex = prop[1] ? 826 DUPLEX_FULL : DUPLEX_HALF; 827 pl->link_config.speed = prop[2]; 828 if (prop[3]) 829 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 830 pl->link_config.lp_advertising); 831 if (prop[4]) 832 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 833 pl->link_config.lp_advertising); 834 } 835 } 836 837 if (pl->link_config.speed > SPEED_1000 && 838 pl->link_config.duplex != DUPLEX_FULL) 839 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 840 pl->link_config.speed); 841 842 linkmode_fill(pl->supported); 843 linkmode_copy(pl->link_config.advertising, pl->supported); 844 phylink_validate(pl, pl->supported, &pl->link_config); 845 846 pause = phylink_test(pl->supported, Pause); 847 asym_pause = phylink_test(pl->supported, Asym_Pause); 848 autoneg = phylink_test(pl->supported, Autoneg); 849 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 850 pl->supported, true); 851 linkmode_zero(pl->supported); 852 phylink_set(pl->supported, MII); 853 854 if (pause) 855 phylink_set(pl->supported, Pause); 856 857 if (asym_pause) 858 phylink_set(pl->supported, Asym_Pause); 859 860 if (autoneg) 861 phylink_set(pl->supported, Autoneg); 862 863 if (s) { 864 __set_bit(s->bit, pl->supported); 865 __set_bit(s->bit, pl->link_config.lp_advertising); 866 } else { 867 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 868 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 869 pl->link_config.speed); 870 } 871 872 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 873 pl->supported); 874 875 pl->link_config.link = 1; 876 pl->link_config.an_complete = 1; 877 878 return 0; 879 } 880 881 static int phylink_parse_mode(struct phylink *pl, 882 const struct fwnode_handle *fwnode) 883 { 884 struct fwnode_handle *dn; 885 const char *managed; 886 unsigned long caps; 887 888 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 889 if (dn || fwnode_property_present(fwnode, "fixed-link")) 890 pl->cfg_link_an_mode = MLO_AN_FIXED; 891 fwnode_handle_put(dn); 892 893 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 894 strcmp(managed, "in-band-status") == 0) || 895 pl->config->ovr_an_inband) { 896 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 897 phylink_err(pl, 898 "can't use both fixed-link and in-band-status\n"); 899 return -EINVAL; 900 } 901 902 linkmode_zero(pl->supported); 903 phylink_set(pl->supported, MII); 904 phylink_set(pl->supported, Autoneg); 905 phylink_set(pl->supported, Asym_Pause); 906 phylink_set(pl->supported, Pause); 907 pl->cfg_link_an_mode = MLO_AN_INBAND; 908 909 switch (pl->link_config.interface) { 910 case PHY_INTERFACE_MODE_SGMII: 911 case PHY_INTERFACE_MODE_PSGMII: 912 case PHY_INTERFACE_MODE_QSGMII: 913 case PHY_INTERFACE_MODE_QUSGMII: 914 case PHY_INTERFACE_MODE_RGMII: 915 case PHY_INTERFACE_MODE_RGMII_ID: 916 case PHY_INTERFACE_MODE_RGMII_RXID: 917 case PHY_INTERFACE_MODE_RGMII_TXID: 918 case PHY_INTERFACE_MODE_RTBI: 919 case PHY_INTERFACE_MODE_1000BASEX: 920 case PHY_INTERFACE_MODE_2500BASEX: 921 case PHY_INTERFACE_MODE_5GBASER: 922 case PHY_INTERFACE_MODE_25GBASER: 923 case PHY_INTERFACE_MODE_USXGMII: 924 case PHY_INTERFACE_MODE_10GKR: 925 case PHY_INTERFACE_MODE_10GBASER: 926 case PHY_INTERFACE_MODE_XLGMII: 927 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 928 caps = phylink_get_capabilities(pl->link_config.interface, caps, 929 RATE_MATCH_NONE); 930 phylink_caps_to_linkmodes(pl->supported, caps); 931 break; 932 933 default: 934 phylink_err(pl, 935 "incorrect link mode %s for in-band status\n", 936 phy_modes(pl->link_config.interface)); 937 return -EINVAL; 938 } 939 940 linkmode_copy(pl->link_config.advertising, pl->supported); 941 942 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 943 phylink_err(pl, 944 "failed to validate link configuration for in-band status\n"); 945 return -EINVAL; 946 } 947 } 948 949 return 0; 950 } 951 952 static void phylink_apply_manual_flow(struct phylink *pl, 953 struct phylink_link_state *state) 954 { 955 /* If autoneg is disabled, pause AN is also disabled */ 956 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 957 state->advertising)) 958 state->pause &= ~MLO_PAUSE_AN; 959 960 /* Manual configuration of pause modes */ 961 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 962 state->pause = pl->link_config.pause; 963 } 964 965 static void phylink_resolve_an_pause(struct phylink_link_state *state) 966 { 967 bool tx_pause, rx_pause; 968 969 if (state->duplex == DUPLEX_FULL) { 970 linkmode_resolve_pause(state->advertising, 971 state->lp_advertising, 972 &tx_pause, &rx_pause); 973 if (tx_pause) 974 state->pause |= MLO_PAUSE_TX; 975 if (rx_pause) 976 state->pause |= MLO_PAUSE_RX; 977 } 978 } 979 980 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 981 phy_interface_t interface) 982 { 983 if (pcs && pcs->ops->pcs_pre_config) 984 pcs->ops->pcs_pre_config(pcs, interface); 985 } 986 987 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 988 phy_interface_t interface) 989 { 990 int err = 0; 991 992 if (pcs && pcs->ops->pcs_post_config) 993 err = pcs->ops->pcs_post_config(pcs, interface); 994 995 return err; 996 } 997 998 static void phylink_pcs_disable(struct phylink_pcs *pcs) 999 { 1000 if (pcs && pcs->ops->pcs_disable) 1001 pcs->ops->pcs_disable(pcs); 1002 } 1003 1004 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1005 { 1006 int err = 0; 1007 1008 if (pcs && pcs->ops->pcs_enable) 1009 err = pcs->ops->pcs_enable(pcs); 1010 1011 return err; 1012 } 1013 1014 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1015 const struct phylink_link_state *state, 1016 bool permit_pause_to_mac) 1017 { 1018 if (!pcs) 1019 return 0; 1020 1021 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1022 state->advertising, permit_pause_to_mac); 1023 } 1024 1025 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1026 phy_interface_t interface, int speed, 1027 int duplex) 1028 { 1029 if (pcs && pcs->ops->pcs_link_up) 1030 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1031 } 1032 1033 static void phylink_pcs_poll_stop(struct phylink *pl) 1034 { 1035 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1036 del_timer(&pl->link_poll); 1037 } 1038 1039 static void phylink_pcs_poll_start(struct phylink *pl) 1040 { 1041 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1042 mod_timer(&pl->link_poll, jiffies + HZ); 1043 } 1044 1045 static void phylink_mac_config(struct phylink *pl, 1046 const struct phylink_link_state *state) 1047 { 1048 struct phylink_link_state st = *state; 1049 1050 /* Stop drivers incorrectly using these */ 1051 linkmode_zero(st.lp_advertising); 1052 st.speed = SPEED_UNKNOWN; 1053 st.duplex = DUPLEX_UNKNOWN; 1054 st.an_complete = false; 1055 st.link = false; 1056 1057 phylink_dbg(pl, 1058 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1059 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1060 phy_modes(st.interface), 1061 phy_rate_matching_to_str(st.rate_matching), 1062 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1063 st.pause); 1064 1065 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1066 } 1067 1068 static void phylink_pcs_an_restart(struct phylink *pl) 1069 { 1070 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1071 pl->link_config.advertising) && 1072 phy_interface_mode_is_8023z(pl->link_config.interface) && 1073 phylink_autoneg_inband(pl->cur_link_an_mode)) 1074 pl->pcs->ops->pcs_an_restart(pl->pcs); 1075 } 1076 1077 static void phylink_major_config(struct phylink *pl, bool restart, 1078 const struct phylink_link_state *state) 1079 { 1080 struct phylink_pcs *pcs = NULL; 1081 bool pcs_changed = false; 1082 unsigned int rate_kbd; 1083 unsigned int neg_mode; 1084 int err; 1085 1086 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1087 1088 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1089 state->interface, 1090 state->advertising); 1091 1092 if (pl->using_mac_select_pcs) { 1093 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1094 if (IS_ERR(pcs)) { 1095 phylink_err(pl, 1096 "mac_select_pcs unexpectedly failed: %pe\n", 1097 pcs); 1098 return; 1099 } 1100 1101 pcs_changed = pcs && pl->pcs != pcs; 1102 } 1103 1104 phylink_pcs_poll_stop(pl); 1105 1106 if (pl->mac_ops->mac_prepare) { 1107 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1108 state->interface); 1109 if (err < 0) { 1110 phylink_err(pl, "mac_prepare failed: %pe\n", 1111 ERR_PTR(err)); 1112 return; 1113 } 1114 } 1115 1116 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1117 * for the change. 1118 */ 1119 if (pcs_changed) { 1120 phylink_pcs_disable(pl->pcs); 1121 1122 if (pl->pcs) 1123 pl->pcs->phylink = NULL; 1124 1125 pcs->phylink = pl; 1126 1127 pl->pcs = pcs; 1128 } 1129 1130 if (pl->pcs) 1131 phylink_pcs_pre_config(pl->pcs, state->interface); 1132 1133 phylink_mac_config(pl, state); 1134 1135 if (pl->pcs) 1136 phylink_pcs_post_config(pl->pcs, state->interface); 1137 1138 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1139 phylink_pcs_enable(pl->pcs); 1140 1141 neg_mode = pl->cur_link_an_mode; 1142 if (pl->pcs && pl->pcs->neg_mode) 1143 neg_mode = pl->pcs_neg_mode; 1144 1145 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1146 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1147 if (err < 0) 1148 phylink_err(pl, "pcs_config failed: %pe\n", 1149 ERR_PTR(err)); 1150 else if (err > 0) 1151 restart = true; 1152 1153 if (restart) 1154 phylink_pcs_an_restart(pl); 1155 1156 if (pl->mac_ops->mac_finish) { 1157 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1158 state->interface); 1159 if (err < 0) 1160 phylink_err(pl, "mac_finish failed: %pe\n", 1161 ERR_PTR(err)); 1162 } 1163 1164 if (pl->sfp_bus) { 1165 rate_kbd = phylink_interface_signal_rate(state->interface); 1166 if (rate_kbd) 1167 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1168 } 1169 1170 phylink_pcs_poll_start(pl); 1171 } 1172 1173 /* 1174 * Reconfigure for a change of inband advertisement. 1175 * If we have a separate PCS, we only need to call its pcs_config() method, 1176 * and then restart AN if it indicates something changed. Otherwise, we do 1177 * the full MAC reconfiguration. 1178 */ 1179 static int phylink_change_inband_advert(struct phylink *pl) 1180 { 1181 unsigned int neg_mode; 1182 int ret; 1183 1184 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1185 return 0; 1186 1187 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1188 phylink_an_mode_str(pl->cur_link_an_mode), 1189 phy_modes(pl->link_config.interface), 1190 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1191 pl->link_config.pause); 1192 1193 /* Recompute the PCS neg mode */ 1194 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1195 pl->link_config.interface, 1196 pl->link_config.advertising); 1197 1198 neg_mode = pl->cur_link_an_mode; 1199 if (pl->pcs->neg_mode) 1200 neg_mode = pl->pcs_neg_mode; 1201 1202 /* Modern PCS-based method; update the advert at the PCS, and 1203 * restart negotiation if the pcs_config() helper indicates that 1204 * the programmed advertisement has changed. 1205 */ 1206 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1207 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1208 if (ret < 0) 1209 return ret; 1210 1211 if (ret > 0) 1212 phylink_pcs_an_restart(pl); 1213 1214 return 0; 1215 } 1216 1217 static void phylink_mac_pcs_get_state(struct phylink *pl, 1218 struct phylink_link_state *state) 1219 { 1220 linkmode_copy(state->advertising, pl->link_config.advertising); 1221 linkmode_zero(state->lp_advertising); 1222 state->interface = pl->link_config.interface; 1223 state->rate_matching = pl->link_config.rate_matching; 1224 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1225 state->advertising)) { 1226 state->speed = SPEED_UNKNOWN; 1227 state->duplex = DUPLEX_UNKNOWN; 1228 state->pause = MLO_PAUSE_NONE; 1229 } else { 1230 state->speed = pl->link_config.speed; 1231 state->duplex = pl->link_config.duplex; 1232 state->pause = pl->link_config.pause; 1233 } 1234 state->an_complete = 0; 1235 state->link = 1; 1236 1237 if (pl->pcs) 1238 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1239 else 1240 state->link = 0; 1241 } 1242 1243 /* The fixed state is... fixed except for the link state, 1244 * which may be determined by a GPIO or a callback. 1245 */ 1246 static void phylink_get_fixed_state(struct phylink *pl, 1247 struct phylink_link_state *state) 1248 { 1249 *state = pl->link_config; 1250 if (pl->config->get_fixed_state) 1251 pl->config->get_fixed_state(pl->config, state); 1252 else if (pl->link_gpio) 1253 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1254 1255 state->pause = MLO_PAUSE_NONE; 1256 phylink_resolve_an_pause(state); 1257 } 1258 1259 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1260 { 1261 struct phylink_link_state link_state; 1262 1263 switch (pl->cur_link_an_mode) { 1264 case MLO_AN_PHY: 1265 link_state = pl->phy_state; 1266 break; 1267 1268 case MLO_AN_FIXED: 1269 phylink_get_fixed_state(pl, &link_state); 1270 break; 1271 1272 case MLO_AN_INBAND: 1273 link_state = pl->link_config; 1274 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1275 link_state.pause = MLO_PAUSE_NONE; 1276 break; 1277 1278 default: /* can't happen */ 1279 return; 1280 } 1281 1282 link_state.link = false; 1283 1284 phylink_apply_manual_flow(pl, &link_state); 1285 phylink_major_config(pl, force_restart, &link_state); 1286 } 1287 1288 static const char *phylink_pause_to_str(int pause) 1289 { 1290 switch (pause & MLO_PAUSE_TXRX_MASK) { 1291 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1292 return "rx/tx"; 1293 case MLO_PAUSE_TX: 1294 return "tx"; 1295 case MLO_PAUSE_RX: 1296 return "rx"; 1297 default: 1298 return "off"; 1299 } 1300 } 1301 1302 static void phylink_link_up(struct phylink *pl, 1303 struct phylink_link_state link_state) 1304 { 1305 struct net_device *ndev = pl->netdev; 1306 unsigned int neg_mode; 1307 int speed, duplex; 1308 bool rx_pause; 1309 1310 speed = link_state.speed; 1311 duplex = link_state.duplex; 1312 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1313 1314 switch (link_state.rate_matching) { 1315 case RATE_MATCH_PAUSE: 1316 /* The PHY is doing rate matchion from the media rate (in 1317 * the link_state) to the interface speed, and will send 1318 * pause frames to the MAC to limit its transmission speed. 1319 */ 1320 speed = phylink_interface_max_speed(link_state.interface); 1321 duplex = DUPLEX_FULL; 1322 rx_pause = true; 1323 break; 1324 1325 case RATE_MATCH_CRS: 1326 /* The PHY is doing rate matchion from the media rate (in 1327 * the link_state) to the interface speed, and will cause 1328 * collisions to the MAC to limit its transmission speed. 1329 */ 1330 speed = phylink_interface_max_speed(link_state.interface); 1331 duplex = DUPLEX_HALF; 1332 break; 1333 } 1334 1335 pl->cur_interface = link_state.interface; 1336 1337 neg_mode = pl->cur_link_an_mode; 1338 if (pl->pcs && pl->pcs->neg_mode) 1339 neg_mode = pl->pcs_neg_mode; 1340 1341 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1342 duplex); 1343 1344 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1345 pl->cur_interface, speed, duplex, 1346 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1347 1348 if (ndev) 1349 netif_carrier_on(ndev); 1350 1351 phylink_info(pl, 1352 "Link is Up - %s/%s - flow control %s\n", 1353 phy_speed_to_str(link_state.speed), 1354 phy_duplex_to_str(link_state.duplex), 1355 phylink_pause_to_str(link_state.pause)); 1356 } 1357 1358 static void phylink_link_down(struct phylink *pl) 1359 { 1360 struct net_device *ndev = pl->netdev; 1361 1362 if (ndev) 1363 netif_carrier_off(ndev); 1364 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1365 pl->cur_interface); 1366 phylink_info(pl, "Link is Down\n"); 1367 } 1368 1369 static void phylink_resolve(struct work_struct *w) 1370 { 1371 struct phylink *pl = container_of(w, struct phylink, resolve); 1372 struct phylink_link_state link_state; 1373 struct net_device *ndev = pl->netdev; 1374 bool mac_config = false; 1375 bool retrigger = false; 1376 bool cur_link_state; 1377 1378 mutex_lock(&pl->state_mutex); 1379 if (pl->netdev) 1380 cur_link_state = netif_carrier_ok(ndev); 1381 else 1382 cur_link_state = pl->old_link_state; 1383 1384 if (pl->phylink_disable_state) { 1385 pl->mac_link_dropped = false; 1386 link_state.link = false; 1387 } else if (pl->mac_link_dropped) { 1388 link_state.link = false; 1389 retrigger = true; 1390 } else { 1391 switch (pl->cur_link_an_mode) { 1392 case MLO_AN_PHY: 1393 link_state = pl->phy_state; 1394 phylink_apply_manual_flow(pl, &link_state); 1395 mac_config = link_state.link; 1396 break; 1397 1398 case MLO_AN_FIXED: 1399 phylink_get_fixed_state(pl, &link_state); 1400 mac_config = link_state.link; 1401 break; 1402 1403 case MLO_AN_INBAND: 1404 phylink_mac_pcs_get_state(pl, &link_state); 1405 1406 /* The PCS may have a latching link-fail indicator. 1407 * If the link was up, bring the link down and 1408 * re-trigger the resolve. Otherwise, re-read the 1409 * PCS state to get the current status of the link. 1410 */ 1411 if (!link_state.link) { 1412 if (cur_link_state) 1413 retrigger = true; 1414 else 1415 phylink_mac_pcs_get_state(pl, 1416 &link_state); 1417 } 1418 1419 /* If we have a phy, the "up" state is the union of 1420 * both the PHY and the MAC 1421 */ 1422 if (pl->phydev) 1423 link_state.link &= pl->phy_state.link; 1424 1425 /* Only update if the PHY link is up */ 1426 if (pl->phydev && pl->phy_state.link) { 1427 /* If the interface has changed, force a 1428 * link down event if the link isn't already 1429 * down, and re-resolve. 1430 */ 1431 if (link_state.interface != 1432 pl->phy_state.interface) { 1433 retrigger = true; 1434 link_state.link = false; 1435 } 1436 link_state.interface = pl->phy_state.interface; 1437 1438 /* If we are doing rate matching, then the 1439 * link speed/duplex comes from the PHY 1440 */ 1441 if (pl->phy_state.rate_matching) { 1442 link_state.rate_matching = 1443 pl->phy_state.rate_matching; 1444 link_state.speed = pl->phy_state.speed; 1445 link_state.duplex = 1446 pl->phy_state.duplex; 1447 } 1448 1449 /* If we have a PHY, we need to update with 1450 * the PHY flow control bits. 1451 */ 1452 link_state.pause = pl->phy_state.pause; 1453 mac_config = true; 1454 } 1455 phylink_apply_manual_flow(pl, &link_state); 1456 break; 1457 } 1458 } 1459 1460 if (mac_config) { 1461 if (link_state.interface != pl->link_config.interface) { 1462 /* The interface has changed, force the link down and 1463 * then reconfigure. 1464 */ 1465 if (cur_link_state) { 1466 phylink_link_down(pl); 1467 cur_link_state = false; 1468 } 1469 phylink_major_config(pl, false, &link_state); 1470 pl->link_config.interface = link_state.interface; 1471 } 1472 } 1473 1474 if (link_state.link != cur_link_state) { 1475 pl->old_link_state = link_state.link; 1476 if (!link_state.link) 1477 phylink_link_down(pl); 1478 else 1479 phylink_link_up(pl, link_state); 1480 } 1481 if (!link_state.link && retrigger) { 1482 pl->mac_link_dropped = false; 1483 queue_work(system_power_efficient_wq, &pl->resolve); 1484 } 1485 mutex_unlock(&pl->state_mutex); 1486 } 1487 1488 static void phylink_run_resolve(struct phylink *pl) 1489 { 1490 if (!pl->phylink_disable_state) 1491 queue_work(system_power_efficient_wq, &pl->resolve); 1492 } 1493 1494 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1495 { 1496 unsigned long state = pl->phylink_disable_state; 1497 1498 set_bit(bit, &pl->phylink_disable_state); 1499 if (state == 0) { 1500 queue_work(system_power_efficient_wq, &pl->resolve); 1501 flush_work(&pl->resolve); 1502 } 1503 } 1504 1505 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1506 { 1507 clear_bit(bit, &pl->phylink_disable_state); 1508 phylink_run_resolve(pl); 1509 } 1510 1511 static void phylink_fixed_poll(struct timer_list *t) 1512 { 1513 struct phylink *pl = container_of(t, struct phylink, link_poll); 1514 1515 mod_timer(t, jiffies + HZ); 1516 1517 phylink_run_resolve(pl); 1518 } 1519 1520 static const struct sfp_upstream_ops sfp_phylink_ops; 1521 1522 static int phylink_register_sfp(struct phylink *pl, 1523 const struct fwnode_handle *fwnode) 1524 { 1525 struct sfp_bus *bus; 1526 int ret; 1527 1528 if (!fwnode) 1529 return 0; 1530 1531 bus = sfp_bus_find_fwnode(fwnode); 1532 if (IS_ERR(bus)) { 1533 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1534 return PTR_ERR(bus); 1535 } 1536 1537 pl->sfp_bus = bus; 1538 1539 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1540 sfp_bus_put(bus); 1541 1542 return ret; 1543 } 1544 1545 /** 1546 * phylink_create() - create a phylink instance 1547 * @config: a pointer to the target &struct phylink_config 1548 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1549 * interface 1550 * @iface: the desired link mode defined by &typedef phy_interface_t 1551 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1552 * 1553 * Create a new phylink instance, and parse the link parameters found in @np. 1554 * This will parse in-band modes, fixed-link or SFP configuration. 1555 * 1556 * Note: the rtnl lock must not be held when calling this function. 1557 * 1558 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1559 * must use IS_ERR() to check for errors from this function. 1560 */ 1561 struct phylink *phylink_create(struct phylink_config *config, 1562 const struct fwnode_handle *fwnode, 1563 phy_interface_t iface, 1564 const struct phylink_mac_ops *mac_ops) 1565 { 1566 bool using_mac_select_pcs = false; 1567 struct phylink *pl; 1568 int ret; 1569 1570 /* Validate the supplied configuration */ 1571 if (phy_interface_empty(config->supported_interfaces)) { 1572 dev_err(config->dev, 1573 "phylink: error: empty supported_interfaces\n"); 1574 return ERR_PTR(-EINVAL); 1575 } 1576 1577 if (mac_ops->mac_select_pcs && 1578 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1579 ERR_PTR(-EOPNOTSUPP)) 1580 using_mac_select_pcs = true; 1581 1582 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1583 if (!pl) 1584 return ERR_PTR(-ENOMEM); 1585 1586 mutex_init(&pl->state_mutex); 1587 INIT_WORK(&pl->resolve, phylink_resolve); 1588 1589 pl->config = config; 1590 if (config->type == PHYLINK_NETDEV) { 1591 pl->netdev = to_net_dev(config->dev); 1592 netif_carrier_off(pl->netdev); 1593 } else if (config->type == PHYLINK_DEV) { 1594 pl->dev = config->dev; 1595 } else { 1596 kfree(pl); 1597 return ERR_PTR(-EINVAL); 1598 } 1599 1600 pl->using_mac_select_pcs = using_mac_select_pcs; 1601 pl->phy_state.interface = iface; 1602 pl->link_interface = iface; 1603 if (iface == PHY_INTERFACE_MODE_MOCA) 1604 pl->link_port = PORT_BNC; 1605 else 1606 pl->link_port = PORT_MII; 1607 pl->link_config.interface = iface; 1608 pl->link_config.pause = MLO_PAUSE_AN; 1609 pl->link_config.speed = SPEED_UNKNOWN; 1610 pl->link_config.duplex = DUPLEX_UNKNOWN; 1611 pl->pcs_state = PCS_STATE_DOWN; 1612 pl->mac_ops = mac_ops; 1613 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1614 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1615 1616 linkmode_fill(pl->supported); 1617 linkmode_copy(pl->link_config.advertising, pl->supported); 1618 phylink_validate(pl, pl->supported, &pl->link_config); 1619 1620 ret = phylink_parse_mode(pl, fwnode); 1621 if (ret < 0) { 1622 kfree(pl); 1623 return ERR_PTR(ret); 1624 } 1625 1626 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1627 ret = phylink_parse_fixedlink(pl, fwnode); 1628 if (ret < 0) { 1629 kfree(pl); 1630 return ERR_PTR(ret); 1631 } 1632 } 1633 1634 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1635 1636 ret = phylink_register_sfp(pl, fwnode); 1637 if (ret < 0) { 1638 kfree(pl); 1639 return ERR_PTR(ret); 1640 } 1641 1642 return pl; 1643 } 1644 EXPORT_SYMBOL_GPL(phylink_create); 1645 1646 /** 1647 * phylink_destroy() - cleanup and destroy the phylink instance 1648 * @pl: a pointer to a &struct phylink returned from phylink_create() 1649 * 1650 * Destroy a phylink instance. Any PHY that has been attached must have been 1651 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1652 * 1653 * Note: the rtnl lock must not be held when calling this function. 1654 */ 1655 void phylink_destroy(struct phylink *pl) 1656 { 1657 sfp_bus_del_upstream(pl->sfp_bus); 1658 if (pl->link_gpio) 1659 gpiod_put(pl->link_gpio); 1660 1661 cancel_work_sync(&pl->resolve); 1662 kfree(pl); 1663 } 1664 EXPORT_SYMBOL_GPL(phylink_destroy); 1665 1666 /** 1667 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1668 * @pl: a pointer to a &struct phylink returned from phylink_create() 1669 * 1670 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1671 * no PHY is needed. 1672 * 1673 * Returns true if phylink will be expecting a PHY. 1674 */ 1675 bool phylink_expects_phy(struct phylink *pl) 1676 { 1677 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1678 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1679 phy_interface_mode_is_8023z(pl->link_config.interface))) 1680 return false; 1681 return true; 1682 } 1683 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1684 1685 static void phylink_phy_change(struct phy_device *phydev, bool up) 1686 { 1687 struct phylink *pl = phydev->phylink; 1688 bool tx_pause, rx_pause; 1689 1690 phy_get_pause(phydev, &tx_pause, &rx_pause); 1691 1692 mutex_lock(&pl->state_mutex); 1693 pl->phy_state.speed = phydev->speed; 1694 pl->phy_state.duplex = phydev->duplex; 1695 pl->phy_state.rate_matching = phydev->rate_matching; 1696 pl->phy_state.pause = MLO_PAUSE_NONE; 1697 if (tx_pause) 1698 pl->phy_state.pause |= MLO_PAUSE_TX; 1699 if (rx_pause) 1700 pl->phy_state.pause |= MLO_PAUSE_RX; 1701 pl->phy_state.interface = phydev->interface; 1702 pl->phy_state.link = up; 1703 mutex_unlock(&pl->state_mutex); 1704 1705 phylink_run_resolve(pl); 1706 1707 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1708 phy_modes(phydev->interface), 1709 phy_speed_to_str(phydev->speed), 1710 phy_duplex_to_str(phydev->duplex), 1711 phy_rate_matching_to_str(phydev->rate_matching), 1712 phylink_pause_to_str(pl->phy_state.pause)); 1713 } 1714 1715 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1716 unsigned long *supported, 1717 struct phylink_link_state *state) 1718 { 1719 DECLARE_PHY_INTERFACE_MASK(interfaces); 1720 1721 /* If the PHY provides a bitmap of the interfaces it will be using 1722 * depending on the negotiated media speeds, use this to validate 1723 * which ethtool link modes can be used. 1724 */ 1725 if (!phy_interface_empty(phy->possible_interfaces)) { 1726 /* We only care about the union of the PHY's interfaces and 1727 * those which the host supports. 1728 */ 1729 phy_interface_and(interfaces, phy->possible_interfaces, 1730 pl->config->supported_interfaces); 1731 1732 if (phy_interface_empty(interfaces)) { 1733 phylink_err(pl, "PHY has no common interfaces\n"); 1734 return -EINVAL; 1735 } 1736 1737 if (phy_on_sfp(phy)) { 1738 /* If the PHY is on a SFP, limit the interfaces to 1739 * those that can be used with a SFP module. 1740 */ 1741 phy_interface_and(interfaces, interfaces, 1742 phylink_sfp_interfaces); 1743 1744 if (phy_interface_empty(interfaces)) { 1745 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1746 return -EINVAL; 1747 } 1748 } 1749 1750 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1751 phydev_name(phy), 1752 (int)PHY_INTERFACE_MODE_MAX, 1753 phy->possible_interfaces, 1754 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1755 1756 return phylink_validate_mask(pl, phy, supported, state, 1757 interfaces); 1758 } 1759 1760 /* Check whether we would use rate matching for the proposed interface 1761 * mode. 1762 */ 1763 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1764 1765 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1766 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1767 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1768 * their Serdes is either unnecessary or not reasonable. 1769 * 1770 * For these which switch interface modes, we really need to know which 1771 * interface modes the PHY supports to properly work out which ethtool 1772 * linkmodes can be supported. For now, as a work-around, we validate 1773 * against all interface modes, which may lead to more ethtool link 1774 * modes being advertised than are actually supported. 1775 */ 1776 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1777 state->interface != PHY_INTERFACE_MODE_RXAUI && 1778 state->interface != PHY_INTERFACE_MODE_XAUI && 1779 state->interface != PHY_INTERFACE_MODE_USXGMII) 1780 state->interface = PHY_INTERFACE_MODE_NA; 1781 1782 return phylink_validate(pl, supported, state); 1783 } 1784 1785 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1786 phy_interface_t interface) 1787 { 1788 struct phylink_link_state config; 1789 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1790 char *irq_str; 1791 int ret; 1792 1793 /* 1794 * This is the new way of dealing with flow control for PHYs, 1795 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1796 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1797 * using our validate call to the MAC, we rely upon the MAC 1798 * clearing the bits from both supported and advertising fields. 1799 */ 1800 phy_support_asym_pause(phy); 1801 1802 memset(&config, 0, sizeof(config)); 1803 linkmode_copy(supported, phy->supported); 1804 linkmode_copy(config.advertising, phy->advertising); 1805 config.interface = interface; 1806 1807 ret = phylink_validate_phy(pl, phy, supported, &config); 1808 if (ret) { 1809 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1810 phy_modes(config.interface), 1811 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1812 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1813 ERR_PTR(ret)); 1814 return ret; 1815 } 1816 1817 phy->phylink = pl; 1818 phy->phy_link_change = phylink_phy_change; 1819 1820 irq_str = phy_attached_info_irq(phy); 1821 phylink_info(pl, 1822 "PHY [%s] driver [%s] (irq=%s)\n", 1823 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1824 kfree(irq_str); 1825 1826 mutex_lock(&phy->lock); 1827 mutex_lock(&pl->state_mutex); 1828 pl->phydev = phy; 1829 pl->phy_state.interface = interface; 1830 pl->phy_state.pause = MLO_PAUSE_NONE; 1831 pl->phy_state.speed = SPEED_UNKNOWN; 1832 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1833 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1834 linkmode_copy(pl->supported, supported); 1835 linkmode_copy(pl->link_config.advertising, config.advertising); 1836 1837 /* Restrict the phy advertisement according to the MAC support. */ 1838 linkmode_copy(phy->advertising, config.advertising); 1839 mutex_unlock(&pl->state_mutex); 1840 mutex_unlock(&phy->lock); 1841 1842 phylink_dbg(pl, 1843 "phy: %s setting supported %*pb advertising %*pb\n", 1844 phy_modes(interface), 1845 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1846 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1847 1848 if (phy_interrupt_is_valid(phy)) 1849 phy_request_interrupt(phy); 1850 1851 if (pl->config->mac_managed_pm) 1852 phy->mac_managed_pm = true; 1853 1854 return 0; 1855 } 1856 1857 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1858 phy_interface_t interface) 1859 { 1860 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1861 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1862 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1863 return -EINVAL; 1864 1865 if (pl->phydev) 1866 return -EBUSY; 1867 1868 return phy_attach_direct(pl->netdev, phy, 0, interface); 1869 } 1870 1871 /** 1872 * phylink_connect_phy() - connect a PHY to the phylink instance 1873 * @pl: a pointer to a &struct phylink returned from phylink_create() 1874 * @phy: a pointer to a &struct phy_device. 1875 * 1876 * Connect @phy to the phylink instance specified by @pl by calling 1877 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1878 * capabilities, start the PHYLIB state machine and enable any interrupts 1879 * that the PHY supports. 1880 * 1881 * This updates the phylink's ethtool supported and advertising link mode 1882 * masks. 1883 * 1884 * Returns 0 on success or a negative errno. 1885 */ 1886 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1887 { 1888 int ret; 1889 1890 /* Use PHY device/driver interface */ 1891 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1892 pl->link_interface = phy->interface; 1893 pl->link_config.interface = pl->link_interface; 1894 } 1895 1896 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1897 if (ret < 0) 1898 return ret; 1899 1900 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1901 if (ret) 1902 phy_detach(phy); 1903 1904 return ret; 1905 } 1906 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1907 1908 /** 1909 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1910 * @pl: a pointer to a &struct phylink returned from phylink_create() 1911 * @dn: a pointer to a &struct device_node. 1912 * @flags: PHY-specific flags to communicate to the PHY device driver 1913 * 1914 * Connect the phy specified in the device node @dn to the phylink instance 1915 * specified by @pl. Actions specified in phylink_connect_phy() will be 1916 * performed. 1917 * 1918 * Returns 0 on success or a negative errno. 1919 */ 1920 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1921 u32 flags) 1922 { 1923 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1924 } 1925 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1926 1927 /** 1928 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1929 * @pl: a pointer to a &struct phylink returned from phylink_create() 1930 * @fwnode: a pointer to a &struct fwnode_handle. 1931 * @flags: PHY-specific flags to communicate to the PHY device driver 1932 * 1933 * Connect the phy specified @fwnode to the phylink instance specified 1934 * by @pl. 1935 * 1936 * Returns 0 on success or a negative errno. 1937 */ 1938 int phylink_fwnode_phy_connect(struct phylink *pl, 1939 const struct fwnode_handle *fwnode, 1940 u32 flags) 1941 { 1942 struct fwnode_handle *phy_fwnode; 1943 struct phy_device *phy_dev; 1944 int ret; 1945 1946 /* Fixed links and 802.3z are handled without needing a PHY */ 1947 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1948 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1949 phy_interface_mode_is_8023z(pl->link_interface))) 1950 return 0; 1951 1952 phy_fwnode = fwnode_get_phy_node(fwnode); 1953 if (IS_ERR(phy_fwnode)) { 1954 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1955 return -ENODEV; 1956 return 0; 1957 } 1958 1959 phy_dev = fwnode_phy_find_device(phy_fwnode); 1960 /* We're done with the phy_node handle */ 1961 fwnode_handle_put(phy_fwnode); 1962 if (!phy_dev) 1963 return -ENODEV; 1964 1965 /* Use PHY device/driver interface */ 1966 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1967 pl->link_interface = phy_dev->interface; 1968 pl->link_config.interface = pl->link_interface; 1969 } 1970 1971 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1972 pl->link_interface); 1973 phy_device_free(phy_dev); 1974 if (ret) 1975 return ret; 1976 1977 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1978 if (ret) 1979 phy_detach(phy_dev); 1980 1981 return ret; 1982 } 1983 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1984 1985 /** 1986 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1987 * instance. 1988 * @pl: a pointer to a &struct phylink returned from phylink_create() 1989 * 1990 * Disconnect any current PHY from the phylink instance described by @pl. 1991 */ 1992 void phylink_disconnect_phy(struct phylink *pl) 1993 { 1994 struct phy_device *phy; 1995 1996 ASSERT_RTNL(); 1997 1998 phy = pl->phydev; 1999 if (phy) { 2000 mutex_lock(&phy->lock); 2001 mutex_lock(&pl->state_mutex); 2002 pl->phydev = NULL; 2003 mutex_unlock(&pl->state_mutex); 2004 mutex_unlock(&phy->lock); 2005 flush_work(&pl->resolve); 2006 2007 phy_disconnect(phy); 2008 } 2009 } 2010 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2011 2012 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2013 { 2014 if (!up) 2015 pl->mac_link_dropped = true; 2016 phylink_run_resolve(pl); 2017 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2018 } 2019 2020 /** 2021 * phylink_mac_change() - notify phylink of a change in MAC state 2022 * @pl: a pointer to a &struct phylink returned from phylink_create() 2023 * @up: indicates whether the link is currently up. 2024 * 2025 * The MAC driver should call this driver when the state of its link 2026 * changes (eg, link failure, new negotiation results, etc.) 2027 */ 2028 void phylink_mac_change(struct phylink *pl, bool up) 2029 { 2030 phylink_link_changed(pl, up, "mac"); 2031 } 2032 EXPORT_SYMBOL_GPL(phylink_mac_change); 2033 2034 /** 2035 * phylink_pcs_change() - notify phylink of a change to PCS link state 2036 * @pcs: pointer to &struct phylink_pcs 2037 * @up: indicates whether the link is currently up. 2038 * 2039 * The PCS driver should call this when the state of its link changes 2040 * (e.g. link failure, new negotiation results, etc.) Note: it should 2041 * not determine "up" by reading the BMSR. If in doubt about the link 2042 * state at interrupt time, then pass true if pcs_get_state() returns 2043 * the latched link-down state, otherwise pass false. 2044 */ 2045 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2046 { 2047 struct phylink *pl = pcs->phylink; 2048 2049 if (pl) 2050 phylink_link_changed(pl, up, "pcs"); 2051 } 2052 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2053 2054 static irqreturn_t phylink_link_handler(int irq, void *data) 2055 { 2056 struct phylink *pl = data; 2057 2058 phylink_run_resolve(pl); 2059 2060 return IRQ_HANDLED; 2061 } 2062 2063 /** 2064 * phylink_start() - start a phylink instance 2065 * @pl: a pointer to a &struct phylink returned from phylink_create() 2066 * 2067 * Start the phylink instance specified by @pl, configuring the MAC for the 2068 * desired link mode(s) and negotiation style. This should be called from the 2069 * network device driver's &struct net_device_ops ndo_open() method. 2070 */ 2071 void phylink_start(struct phylink *pl) 2072 { 2073 bool poll = false; 2074 2075 ASSERT_RTNL(); 2076 2077 phylink_info(pl, "configuring for %s/%s link mode\n", 2078 phylink_an_mode_str(pl->cur_link_an_mode), 2079 phy_modes(pl->link_config.interface)); 2080 2081 /* Always set the carrier off */ 2082 if (pl->netdev) 2083 netif_carrier_off(pl->netdev); 2084 2085 pl->pcs_state = PCS_STATE_STARTING; 2086 2087 /* Apply the link configuration to the MAC when starting. This allows 2088 * a fixed-link to start with the correct parameters, and also 2089 * ensures that we set the appropriate advertisement for Serdes links. 2090 * 2091 * Restart autonegotiation if using 802.3z to ensure that the link 2092 * parameters are properly negotiated. This is necessary for DSA 2093 * switches using 802.3z negotiation to ensure they see our modes. 2094 */ 2095 phylink_mac_initial_config(pl, true); 2096 2097 pl->pcs_state = PCS_STATE_STARTED; 2098 2099 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2100 2101 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2102 int irq = gpiod_to_irq(pl->link_gpio); 2103 2104 if (irq > 0) { 2105 if (!request_irq(irq, phylink_link_handler, 2106 IRQF_TRIGGER_RISING | 2107 IRQF_TRIGGER_FALLING, 2108 "netdev link", pl)) 2109 pl->link_irq = irq; 2110 else 2111 irq = 0; 2112 } 2113 if (irq <= 0) 2114 poll = true; 2115 } 2116 2117 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2118 poll |= pl->config->poll_fixed_state; 2119 2120 if (poll) 2121 mod_timer(&pl->link_poll, jiffies + HZ); 2122 if (pl->phydev) 2123 phy_start(pl->phydev); 2124 if (pl->sfp_bus) 2125 sfp_upstream_start(pl->sfp_bus); 2126 } 2127 EXPORT_SYMBOL_GPL(phylink_start); 2128 2129 /** 2130 * phylink_stop() - stop a phylink instance 2131 * @pl: a pointer to a &struct phylink returned from phylink_create() 2132 * 2133 * Stop the phylink instance specified by @pl. This should be called from the 2134 * network device driver's &struct net_device_ops ndo_stop() method. The 2135 * network device's carrier state should not be changed prior to calling this 2136 * function. 2137 * 2138 * This will synchronously bring down the link if the link is not already 2139 * down (in other words, it will trigger a mac_link_down() method call.) 2140 */ 2141 void phylink_stop(struct phylink *pl) 2142 { 2143 ASSERT_RTNL(); 2144 2145 if (pl->sfp_bus) 2146 sfp_upstream_stop(pl->sfp_bus); 2147 if (pl->phydev) 2148 phy_stop(pl->phydev); 2149 del_timer_sync(&pl->link_poll); 2150 if (pl->link_irq) { 2151 free_irq(pl->link_irq, pl); 2152 pl->link_irq = 0; 2153 } 2154 2155 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2156 2157 pl->pcs_state = PCS_STATE_DOWN; 2158 2159 phylink_pcs_disable(pl->pcs); 2160 } 2161 EXPORT_SYMBOL_GPL(phylink_stop); 2162 2163 /** 2164 * phylink_suspend() - handle a network device suspend event 2165 * @pl: a pointer to a &struct phylink returned from phylink_create() 2166 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2167 * 2168 * Handle a network device suspend event. There are several cases: 2169 * 2170 * - If Wake-on-Lan is not active, we can bring down the link between 2171 * the MAC and PHY by calling phylink_stop(). 2172 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2173 * can also bring down the link between the MAC and PHY. 2174 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2175 * still needs to receive packets, so we can not bring the link down. 2176 */ 2177 void phylink_suspend(struct phylink *pl, bool mac_wol) 2178 { 2179 ASSERT_RTNL(); 2180 2181 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2182 /* Wake-on-Lan enabled, MAC handling */ 2183 mutex_lock(&pl->state_mutex); 2184 2185 /* Stop the resolver bringing the link up */ 2186 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2187 2188 /* Disable the carrier, to prevent transmit timeouts, 2189 * but one would hope all packets have been sent. This 2190 * also means phylink_resolve() will do nothing. 2191 */ 2192 if (pl->netdev) 2193 netif_carrier_off(pl->netdev); 2194 else 2195 pl->old_link_state = false; 2196 2197 /* We do not call mac_link_down() here as we want the 2198 * link to remain up to receive the WoL packets. 2199 */ 2200 mutex_unlock(&pl->state_mutex); 2201 } else { 2202 phylink_stop(pl); 2203 } 2204 } 2205 EXPORT_SYMBOL_GPL(phylink_suspend); 2206 2207 /** 2208 * phylink_resume() - handle a network device resume event 2209 * @pl: a pointer to a &struct phylink returned from phylink_create() 2210 * 2211 * Undo the effects of phylink_suspend(), returning the link to an 2212 * operational state. 2213 */ 2214 void phylink_resume(struct phylink *pl) 2215 { 2216 ASSERT_RTNL(); 2217 2218 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2219 /* Wake-on-Lan enabled, MAC handling */ 2220 2221 /* Call mac_link_down() so we keep the overall state balanced. 2222 * Do this under the state_mutex lock for consistency. This 2223 * will cause a "Link Down" message to be printed during 2224 * resume, which is harmless - the true link state will be 2225 * printed when we run a resolve. 2226 */ 2227 mutex_lock(&pl->state_mutex); 2228 phylink_link_down(pl); 2229 mutex_unlock(&pl->state_mutex); 2230 2231 /* Re-apply the link parameters so that all the settings get 2232 * restored to the MAC. 2233 */ 2234 phylink_mac_initial_config(pl, true); 2235 2236 /* Re-enable and re-resolve the link parameters */ 2237 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2238 } else { 2239 phylink_start(pl); 2240 } 2241 } 2242 EXPORT_SYMBOL_GPL(phylink_resume); 2243 2244 /** 2245 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2246 * @pl: a pointer to a &struct phylink returned from phylink_create() 2247 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2248 * 2249 * Read the wake on lan parameters from the PHY attached to the phylink 2250 * instance specified by @pl. If no PHY is currently attached, report no 2251 * support for wake on lan. 2252 */ 2253 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2254 { 2255 ASSERT_RTNL(); 2256 2257 wol->supported = 0; 2258 wol->wolopts = 0; 2259 2260 if (pl->phydev) 2261 phy_ethtool_get_wol(pl->phydev, wol); 2262 } 2263 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2264 2265 /** 2266 * phylink_ethtool_set_wol() - set wake on lan parameters 2267 * @pl: a pointer to a &struct phylink returned from phylink_create() 2268 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2269 * 2270 * Set the wake on lan parameters for the PHY attached to the phylink 2271 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2272 * error. 2273 * 2274 * Returns zero on success or negative errno code. 2275 */ 2276 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2277 { 2278 int ret = -EOPNOTSUPP; 2279 2280 ASSERT_RTNL(); 2281 2282 if (pl->phydev) 2283 ret = phy_ethtool_set_wol(pl->phydev, wol); 2284 2285 return ret; 2286 } 2287 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2288 2289 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2290 { 2291 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2292 2293 linkmode_zero(mask); 2294 phylink_set_port_modes(mask); 2295 2296 linkmode_and(dst, dst, mask); 2297 linkmode_or(dst, dst, b); 2298 } 2299 2300 static void phylink_get_ksettings(const struct phylink_link_state *state, 2301 struct ethtool_link_ksettings *kset) 2302 { 2303 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2304 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2305 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2306 kset->base.speed = state->speed; 2307 kset->base.duplex = state->duplex; 2308 } 2309 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2310 state->advertising) ? 2311 AUTONEG_ENABLE : AUTONEG_DISABLE; 2312 } 2313 2314 /** 2315 * phylink_ethtool_ksettings_get() - get the current link settings 2316 * @pl: a pointer to a &struct phylink returned from phylink_create() 2317 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2318 * 2319 * Read the current link settings for the phylink instance specified by @pl. 2320 * This will be the link settings read from the MAC, PHY or fixed link 2321 * settings depending on the current negotiation mode. 2322 */ 2323 int phylink_ethtool_ksettings_get(struct phylink *pl, 2324 struct ethtool_link_ksettings *kset) 2325 { 2326 struct phylink_link_state link_state; 2327 2328 ASSERT_RTNL(); 2329 2330 if (pl->phydev) 2331 phy_ethtool_ksettings_get(pl->phydev, kset); 2332 else 2333 kset->base.port = pl->link_port; 2334 2335 linkmode_copy(kset->link_modes.supported, pl->supported); 2336 2337 switch (pl->cur_link_an_mode) { 2338 case MLO_AN_FIXED: 2339 /* We are using fixed settings. Report these as the 2340 * current link settings - and note that these also 2341 * represent the supported speeds/duplex/pause modes. 2342 */ 2343 phylink_get_fixed_state(pl, &link_state); 2344 phylink_get_ksettings(&link_state, kset); 2345 break; 2346 2347 case MLO_AN_INBAND: 2348 /* If there is a phy attached, then use the reported 2349 * settings from the phy with no modification. 2350 */ 2351 if (pl->phydev) 2352 break; 2353 2354 phylink_mac_pcs_get_state(pl, &link_state); 2355 2356 /* The MAC is reporting the link results from its own PCS 2357 * layer via in-band status. Report these as the current 2358 * link settings. 2359 */ 2360 phylink_get_ksettings(&link_state, kset); 2361 break; 2362 } 2363 2364 return 0; 2365 } 2366 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2367 2368 /** 2369 * phylink_ethtool_ksettings_set() - set the link settings 2370 * @pl: a pointer to a &struct phylink returned from phylink_create() 2371 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2372 */ 2373 int phylink_ethtool_ksettings_set(struct phylink *pl, 2374 const struct ethtool_link_ksettings *kset) 2375 { 2376 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2377 struct phylink_link_state config; 2378 const struct phy_setting *s; 2379 2380 ASSERT_RTNL(); 2381 2382 if (pl->phydev) { 2383 struct ethtool_link_ksettings phy_kset = *kset; 2384 2385 linkmode_and(phy_kset.link_modes.advertising, 2386 phy_kset.link_modes.advertising, 2387 pl->supported); 2388 2389 /* We can rely on phylib for this update; we also do not need 2390 * to update the pl->link_config settings: 2391 * - the configuration returned via ksettings_get() will come 2392 * from phylib whenever a PHY is present. 2393 * - link_config.interface will be updated by the PHY calling 2394 * back via phylink_phy_change() and a subsequent resolve. 2395 * - initial link configuration for PHY mode comes from the 2396 * last phy state updated via phylink_phy_change(). 2397 * - other configuration changes (e.g. pause modes) are 2398 * performed directly via phylib. 2399 * - if in in-band mode with a PHY, the link configuration 2400 * is passed on the link from the PHY, and all of 2401 * link_config.{speed,duplex,an_enabled,pause} are not used. 2402 * - the only possible use would be link_config.advertising 2403 * pause modes when in 1000base-X mode with a PHY, but in 2404 * the presence of a PHY, this should not be changed as that 2405 * should be determined from the media side advertisement. 2406 */ 2407 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2408 } 2409 2410 config = pl->link_config; 2411 /* Mask out unsupported advertisements */ 2412 linkmode_and(config.advertising, kset->link_modes.advertising, 2413 pl->supported); 2414 2415 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2416 switch (kset->base.autoneg) { 2417 case AUTONEG_DISABLE: 2418 /* Autonegotiation disabled, select a suitable speed and 2419 * duplex. 2420 */ 2421 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2422 pl->supported, false); 2423 if (!s) 2424 return -EINVAL; 2425 2426 /* If we have a fixed link, refuse to change link parameters. 2427 * If the link parameters match, accept them but do nothing. 2428 */ 2429 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2430 if (s->speed != pl->link_config.speed || 2431 s->duplex != pl->link_config.duplex) 2432 return -EINVAL; 2433 return 0; 2434 } 2435 2436 config.speed = s->speed; 2437 config.duplex = s->duplex; 2438 break; 2439 2440 case AUTONEG_ENABLE: 2441 /* If we have a fixed link, allow autonegotiation (since that 2442 * is our default case) but do not allow the advertisement to 2443 * be changed. If the advertisement matches, simply return. 2444 */ 2445 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2446 if (!linkmode_equal(config.advertising, 2447 pl->link_config.advertising)) 2448 return -EINVAL; 2449 return 0; 2450 } 2451 2452 config.speed = SPEED_UNKNOWN; 2453 config.duplex = DUPLEX_UNKNOWN; 2454 break; 2455 2456 default: 2457 return -EINVAL; 2458 } 2459 2460 /* We have ruled out the case with a PHY attached, and the 2461 * fixed-link cases. All that is left are in-band links. 2462 */ 2463 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2464 kset->base.autoneg == AUTONEG_ENABLE); 2465 2466 /* If this link is with an SFP, ensure that changes to advertised modes 2467 * also cause the associated interface to be selected such that the 2468 * link can be configured correctly. 2469 */ 2470 if (pl->sfp_bus) { 2471 config.interface = sfp_select_interface(pl->sfp_bus, 2472 config.advertising); 2473 if (config.interface == PHY_INTERFACE_MODE_NA) { 2474 phylink_err(pl, 2475 "selection of interface failed, advertisement %*pb\n", 2476 __ETHTOOL_LINK_MODE_MASK_NBITS, 2477 config.advertising); 2478 return -EINVAL; 2479 } 2480 2481 /* Revalidate with the selected interface */ 2482 linkmode_copy(support, pl->supported); 2483 if (phylink_validate(pl, support, &config)) { 2484 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2485 phylink_an_mode_str(pl->cur_link_an_mode), 2486 phy_modes(config.interface), 2487 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2488 return -EINVAL; 2489 } 2490 } else { 2491 /* Validate without changing the current supported mask. */ 2492 linkmode_copy(support, pl->supported); 2493 if (phylink_validate(pl, support, &config)) 2494 return -EINVAL; 2495 } 2496 2497 /* If autonegotiation is enabled, we must have an advertisement */ 2498 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2499 config.advertising) && 2500 phylink_is_empty_linkmode(config.advertising)) 2501 return -EINVAL; 2502 2503 mutex_lock(&pl->state_mutex); 2504 pl->link_config.speed = config.speed; 2505 pl->link_config.duplex = config.duplex; 2506 2507 if (pl->link_config.interface != config.interface) { 2508 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2509 /* We need to force the link down, then change the interface */ 2510 if (pl->old_link_state) { 2511 phylink_link_down(pl); 2512 pl->old_link_state = false; 2513 } 2514 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2515 &pl->phylink_disable_state)) 2516 phylink_major_config(pl, false, &config); 2517 pl->link_config.interface = config.interface; 2518 linkmode_copy(pl->link_config.advertising, config.advertising); 2519 } else if (!linkmode_equal(pl->link_config.advertising, 2520 config.advertising)) { 2521 linkmode_copy(pl->link_config.advertising, config.advertising); 2522 phylink_change_inband_advert(pl); 2523 } 2524 mutex_unlock(&pl->state_mutex); 2525 2526 return 0; 2527 } 2528 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2529 2530 /** 2531 * phylink_ethtool_nway_reset() - restart negotiation 2532 * @pl: a pointer to a &struct phylink returned from phylink_create() 2533 * 2534 * Restart negotiation for the phylink instance specified by @pl. This will 2535 * cause any attached phy to restart negotiation with the link partner, and 2536 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2537 * negotiation. 2538 * 2539 * Returns zero on success, or negative error code. 2540 */ 2541 int phylink_ethtool_nway_reset(struct phylink *pl) 2542 { 2543 int ret = 0; 2544 2545 ASSERT_RTNL(); 2546 2547 if (pl->phydev) 2548 ret = phy_restart_aneg(pl->phydev); 2549 phylink_pcs_an_restart(pl); 2550 2551 return ret; 2552 } 2553 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2554 2555 /** 2556 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2557 * @pl: a pointer to a &struct phylink returned from phylink_create() 2558 * @pause: a pointer to a &struct ethtool_pauseparam 2559 */ 2560 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2561 struct ethtool_pauseparam *pause) 2562 { 2563 ASSERT_RTNL(); 2564 2565 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2566 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2567 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2568 } 2569 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2570 2571 /** 2572 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2573 * @pl: a pointer to a &struct phylink returned from phylink_create() 2574 * @pause: a pointer to a &struct ethtool_pauseparam 2575 */ 2576 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2577 struct ethtool_pauseparam *pause) 2578 { 2579 struct phylink_link_state *config = &pl->link_config; 2580 bool manual_changed; 2581 int pause_state; 2582 2583 ASSERT_RTNL(); 2584 2585 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2586 return -EOPNOTSUPP; 2587 2588 if (!phylink_test(pl->supported, Pause) && 2589 !phylink_test(pl->supported, Asym_Pause)) 2590 return -EOPNOTSUPP; 2591 2592 if (!phylink_test(pl->supported, Asym_Pause) && 2593 pause->rx_pause != pause->tx_pause) 2594 return -EINVAL; 2595 2596 pause_state = 0; 2597 if (pause->autoneg) 2598 pause_state |= MLO_PAUSE_AN; 2599 if (pause->rx_pause) 2600 pause_state |= MLO_PAUSE_RX; 2601 if (pause->tx_pause) 2602 pause_state |= MLO_PAUSE_TX; 2603 2604 mutex_lock(&pl->state_mutex); 2605 /* 2606 * See the comments for linkmode_set_pause(), wrt the deficiencies 2607 * with the current implementation. A solution to this issue would 2608 * be: 2609 * ethtool Local device 2610 * rx tx Pause AsymDir 2611 * 0 0 0 0 2612 * 1 0 1 1 2613 * 0 1 0 1 2614 * 1 1 1 1 2615 * and then use the ethtool rx/tx enablement status to mask the 2616 * rx/tx pause resolution. 2617 */ 2618 linkmode_set_pause(config->advertising, pause->tx_pause, 2619 pause->rx_pause); 2620 2621 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2622 (!(pause_state & MLO_PAUSE_AN) && 2623 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2624 2625 config->pause = pause_state; 2626 2627 /* Update our in-band advertisement, triggering a renegotiation if 2628 * the advertisement changed. 2629 */ 2630 if (!pl->phydev) 2631 phylink_change_inband_advert(pl); 2632 2633 mutex_unlock(&pl->state_mutex); 2634 2635 /* If we have a PHY, a change of the pause frame advertisement will 2636 * cause phylib to renegotiate (if AN is enabled) which will in turn 2637 * call our phylink_phy_change() and trigger a resolve. Note that 2638 * we can't hold our state mutex while calling phy_set_asym_pause(). 2639 */ 2640 if (pl->phydev) 2641 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2642 pause->tx_pause); 2643 2644 /* If the manual pause settings changed, make sure we trigger a 2645 * resolve to update their state; we can not guarantee that the 2646 * link will cycle. 2647 */ 2648 if (manual_changed) { 2649 pl->mac_link_dropped = true; 2650 phylink_run_resolve(pl); 2651 } 2652 2653 return 0; 2654 } 2655 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2656 2657 /** 2658 * phylink_get_eee_err() - read the energy efficient ethernet error 2659 * counter 2660 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2661 * 2662 * Read the Energy Efficient Ethernet error counter from the PHY associated 2663 * with the phylink instance specified by @pl. 2664 * 2665 * Returns positive error counter value, or negative error code. 2666 */ 2667 int phylink_get_eee_err(struct phylink *pl) 2668 { 2669 int ret = 0; 2670 2671 ASSERT_RTNL(); 2672 2673 if (pl->phydev) 2674 ret = phy_get_eee_err(pl->phydev); 2675 2676 return ret; 2677 } 2678 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2679 2680 /** 2681 * phylink_init_eee() - init and check the EEE features 2682 * @pl: a pointer to a &struct phylink returned from phylink_create() 2683 * @clk_stop_enable: allow PHY to stop receive clock 2684 * 2685 * Must be called either with RTNL held or within mac_link_up() 2686 */ 2687 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2688 { 2689 int ret = -EOPNOTSUPP; 2690 2691 if (pl->phydev) 2692 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2693 2694 return ret; 2695 } 2696 EXPORT_SYMBOL_GPL(phylink_init_eee); 2697 2698 /** 2699 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2700 * @pl: a pointer to a &struct phylink returned from phylink_create() 2701 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2702 */ 2703 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2704 { 2705 int ret = -EOPNOTSUPP; 2706 2707 ASSERT_RTNL(); 2708 2709 if (pl->phydev) 2710 ret = phy_ethtool_get_eee(pl->phydev, eee); 2711 2712 return ret; 2713 } 2714 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2715 2716 /** 2717 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2718 * @pl: a pointer to a &struct phylink returned from phylink_create() 2719 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2720 */ 2721 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2722 { 2723 int ret = -EOPNOTSUPP; 2724 2725 ASSERT_RTNL(); 2726 2727 if (pl->phydev) 2728 ret = phy_ethtool_set_eee(pl->phydev, eee); 2729 2730 return ret; 2731 } 2732 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2733 2734 /* This emulates MII registers for a fixed-mode phy operating as per the 2735 * passed in state. "aneg" defines if we report negotiation is possible. 2736 * 2737 * FIXME: should deal with negotiation state too. 2738 */ 2739 static int phylink_mii_emul_read(unsigned int reg, 2740 struct phylink_link_state *state) 2741 { 2742 struct fixed_phy_status fs; 2743 unsigned long *lpa = state->lp_advertising; 2744 int val; 2745 2746 fs.link = state->link; 2747 fs.speed = state->speed; 2748 fs.duplex = state->duplex; 2749 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2750 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2751 2752 val = swphy_read_reg(reg, &fs); 2753 if (reg == MII_BMSR) { 2754 if (!state->an_complete) 2755 val &= ~BMSR_ANEGCOMPLETE; 2756 } 2757 return val; 2758 } 2759 2760 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2761 unsigned int reg) 2762 { 2763 struct phy_device *phydev = pl->phydev; 2764 int prtad, devad; 2765 2766 if (mdio_phy_id_is_c45(phy_id)) { 2767 prtad = mdio_phy_id_prtad(phy_id); 2768 devad = mdio_phy_id_devad(phy_id); 2769 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2770 reg); 2771 } 2772 2773 if (phydev->is_c45) { 2774 switch (reg) { 2775 case MII_BMCR: 2776 case MII_BMSR: 2777 case MII_PHYSID1: 2778 case MII_PHYSID2: 2779 devad = __ffs(phydev->c45_ids.mmds_present); 2780 break; 2781 case MII_ADVERTISE: 2782 case MII_LPA: 2783 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2784 return -EINVAL; 2785 devad = MDIO_MMD_AN; 2786 if (reg == MII_ADVERTISE) 2787 reg = MDIO_AN_ADVERTISE; 2788 else 2789 reg = MDIO_AN_LPA; 2790 break; 2791 default: 2792 return -EINVAL; 2793 } 2794 prtad = phy_id; 2795 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2796 reg); 2797 } 2798 2799 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2800 } 2801 2802 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2803 unsigned int reg, unsigned int val) 2804 { 2805 struct phy_device *phydev = pl->phydev; 2806 int prtad, devad; 2807 2808 if (mdio_phy_id_is_c45(phy_id)) { 2809 prtad = mdio_phy_id_prtad(phy_id); 2810 devad = mdio_phy_id_devad(phy_id); 2811 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2812 reg, val); 2813 } 2814 2815 if (phydev->is_c45) { 2816 switch (reg) { 2817 case MII_BMCR: 2818 case MII_BMSR: 2819 case MII_PHYSID1: 2820 case MII_PHYSID2: 2821 devad = __ffs(phydev->c45_ids.mmds_present); 2822 break; 2823 case MII_ADVERTISE: 2824 case MII_LPA: 2825 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2826 return -EINVAL; 2827 devad = MDIO_MMD_AN; 2828 if (reg == MII_ADVERTISE) 2829 reg = MDIO_AN_ADVERTISE; 2830 else 2831 reg = MDIO_AN_LPA; 2832 break; 2833 default: 2834 return -EINVAL; 2835 } 2836 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2837 reg, val); 2838 } 2839 2840 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2841 } 2842 2843 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2844 unsigned int reg) 2845 { 2846 struct phylink_link_state state; 2847 int val = 0xffff; 2848 2849 switch (pl->cur_link_an_mode) { 2850 case MLO_AN_FIXED: 2851 if (phy_id == 0) { 2852 phylink_get_fixed_state(pl, &state); 2853 val = phylink_mii_emul_read(reg, &state); 2854 } 2855 break; 2856 2857 case MLO_AN_PHY: 2858 return -EOPNOTSUPP; 2859 2860 case MLO_AN_INBAND: 2861 if (phy_id == 0) { 2862 phylink_mac_pcs_get_state(pl, &state); 2863 val = phylink_mii_emul_read(reg, &state); 2864 } 2865 break; 2866 } 2867 2868 return val & 0xffff; 2869 } 2870 2871 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2872 unsigned int reg, unsigned int val) 2873 { 2874 switch (pl->cur_link_an_mode) { 2875 case MLO_AN_FIXED: 2876 break; 2877 2878 case MLO_AN_PHY: 2879 return -EOPNOTSUPP; 2880 2881 case MLO_AN_INBAND: 2882 break; 2883 } 2884 2885 return 0; 2886 } 2887 2888 /** 2889 * phylink_mii_ioctl() - generic mii ioctl interface 2890 * @pl: a pointer to a &struct phylink returned from phylink_create() 2891 * @ifr: a pointer to a &struct ifreq for socket ioctls 2892 * @cmd: ioctl cmd to execute 2893 * 2894 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2895 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2896 * 2897 * Returns: zero on success or negative error code. 2898 * 2899 * %SIOCGMIIPHY: 2900 * read register from the current PHY. 2901 * %SIOCGMIIREG: 2902 * read register from the specified PHY. 2903 * %SIOCSMIIREG: 2904 * set a register on the specified PHY. 2905 */ 2906 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2907 { 2908 struct mii_ioctl_data *mii = if_mii(ifr); 2909 int ret; 2910 2911 ASSERT_RTNL(); 2912 2913 if (pl->phydev) { 2914 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2915 switch (cmd) { 2916 case SIOCGMIIPHY: 2917 mii->phy_id = pl->phydev->mdio.addr; 2918 fallthrough; 2919 2920 case SIOCGMIIREG: 2921 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2922 if (ret >= 0) { 2923 mii->val_out = ret; 2924 ret = 0; 2925 } 2926 break; 2927 2928 case SIOCSMIIREG: 2929 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2930 mii->val_in); 2931 break; 2932 2933 default: 2934 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2935 break; 2936 } 2937 } else { 2938 switch (cmd) { 2939 case SIOCGMIIPHY: 2940 mii->phy_id = 0; 2941 fallthrough; 2942 2943 case SIOCGMIIREG: 2944 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2945 if (ret >= 0) { 2946 mii->val_out = ret; 2947 ret = 0; 2948 } 2949 break; 2950 2951 case SIOCSMIIREG: 2952 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2953 mii->val_in); 2954 break; 2955 2956 default: 2957 ret = -EOPNOTSUPP; 2958 break; 2959 } 2960 } 2961 2962 return ret; 2963 } 2964 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2965 2966 /** 2967 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2968 * link partners 2969 * @pl: a pointer to a &struct phylink returned from phylink_create() 2970 * @sync: perform action synchronously 2971 * 2972 * If we have a PHY that is not part of a SFP module, then set the speed 2973 * as described in the phy_speed_down() function. Please see this function 2974 * for a description of the @sync parameter. 2975 * 2976 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2977 */ 2978 int phylink_speed_down(struct phylink *pl, bool sync) 2979 { 2980 int ret = 0; 2981 2982 ASSERT_RTNL(); 2983 2984 if (!pl->sfp_bus && pl->phydev) 2985 ret = phy_speed_down(pl->phydev, sync); 2986 2987 return ret; 2988 } 2989 EXPORT_SYMBOL_GPL(phylink_speed_down); 2990 2991 /** 2992 * phylink_speed_up() - restore the advertised speeds prior to the call to 2993 * phylink_speed_down() 2994 * @pl: a pointer to a &struct phylink returned from phylink_create() 2995 * 2996 * If we have a PHY that is not part of a SFP module, then restore the 2997 * PHY speeds as per phy_speed_up(). 2998 * 2999 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3000 */ 3001 int phylink_speed_up(struct phylink *pl) 3002 { 3003 int ret = 0; 3004 3005 ASSERT_RTNL(); 3006 3007 if (!pl->sfp_bus && pl->phydev) 3008 ret = phy_speed_up(pl->phydev); 3009 3010 return ret; 3011 } 3012 EXPORT_SYMBOL_GPL(phylink_speed_up); 3013 3014 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3015 { 3016 struct phylink *pl = upstream; 3017 3018 pl->netdev->sfp_bus = bus; 3019 } 3020 3021 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3022 { 3023 struct phylink *pl = upstream; 3024 3025 pl->netdev->sfp_bus = NULL; 3026 } 3027 3028 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3029 const unsigned long *intf) 3030 { 3031 phy_interface_t interface; 3032 size_t i; 3033 3034 interface = PHY_INTERFACE_MODE_NA; 3035 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3036 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3037 interface = phylink_sfp_interface_preference[i]; 3038 break; 3039 } 3040 3041 return interface; 3042 } 3043 3044 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3045 unsigned long *supported, 3046 struct phylink_link_state *state) 3047 { 3048 bool changed = false; 3049 3050 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3051 phylink_an_mode_str(mode), phy_modes(state->interface), 3052 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3053 3054 if (!linkmode_equal(pl->supported, supported)) { 3055 linkmode_copy(pl->supported, supported); 3056 changed = true; 3057 } 3058 3059 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3060 linkmode_copy(pl->link_config.advertising, state->advertising); 3061 changed = true; 3062 } 3063 3064 if (pl->cur_link_an_mode != mode || 3065 pl->link_config.interface != state->interface) { 3066 pl->cur_link_an_mode = mode; 3067 pl->link_config.interface = state->interface; 3068 3069 changed = true; 3070 3071 phylink_info(pl, "switched to %s/%s link mode\n", 3072 phylink_an_mode_str(mode), 3073 phy_modes(state->interface)); 3074 } 3075 3076 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3077 &pl->phylink_disable_state)) 3078 phylink_mac_initial_config(pl, false); 3079 } 3080 3081 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3082 struct phy_device *phy) 3083 { 3084 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3085 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3086 struct phylink_link_state config; 3087 phy_interface_t iface; 3088 int ret; 3089 3090 linkmode_copy(support, phy->supported); 3091 3092 memset(&config, 0, sizeof(config)); 3093 linkmode_copy(config.advertising, phy->advertising); 3094 config.interface = PHY_INTERFACE_MODE_NA; 3095 config.speed = SPEED_UNKNOWN; 3096 config.duplex = DUPLEX_UNKNOWN; 3097 config.pause = MLO_PAUSE_AN; 3098 3099 /* Ignore errors if we're expecting a PHY to attach later */ 3100 ret = phylink_validate(pl, support, &config); 3101 if (ret) { 3102 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3103 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3104 ERR_PTR(ret)); 3105 return ret; 3106 } 3107 3108 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3109 if (iface == PHY_INTERFACE_MODE_NA) { 3110 phylink_err(pl, 3111 "selection of interface failed, advertisement %*pb\n", 3112 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3113 return -EINVAL; 3114 } 3115 3116 config.interface = iface; 3117 linkmode_copy(support1, support); 3118 ret = phylink_validate(pl, support1, &config); 3119 if (ret) { 3120 phylink_err(pl, 3121 "validation of %s/%s with support %*pb failed: %pe\n", 3122 phylink_an_mode_str(mode), 3123 phy_modes(config.interface), 3124 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3125 ERR_PTR(ret)); 3126 return ret; 3127 } 3128 3129 pl->link_port = pl->sfp_port; 3130 3131 phylink_sfp_set_config(pl, mode, support, &config); 3132 3133 return 0; 3134 } 3135 3136 static int phylink_sfp_config_optical(struct phylink *pl) 3137 { 3138 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3139 DECLARE_PHY_INTERFACE_MASK(interfaces); 3140 struct phylink_link_state config; 3141 phy_interface_t interface; 3142 int ret; 3143 3144 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3145 (int)PHY_INTERFACE_MODE_MAX, 3146 pl->config->supported_interfaces, 3147 (int)PHY_INTERFACE_MODE_MAX, 3148 pl->sfp_interfaces); 3149 3150 /* Find the union of the supported interfaces by the PCS/MAC and 3151 * the SFP module. 3152 */ 3153 phy_interface_and(interfaces, pl->config->supported_interfaces, 3154 pl->sfp_interfaces); 3155 if (phy_interface_empty(interfaces)) { 3156 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3157 return -EINVAL; 3158 } 3159 3160 memset(&config, 0, sizeof(config)); 3161 linkmode_copy(support, pl->sfp_support); 3162 linkmode_copy(config.advertising, pl->sfp_support); 3163 config.speed = SPEED_UNKNOWN; 3164 config.duplex = DUPLEX_UNKNOWN; 3165 config.pause = MLO_PAUSE_AN; 3166 3167 /* For all the interfaces that are supported, reduce the sfp_support 3168 * mask to only those link modes that can be supported. 3169 */ 3170 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3171 interfaces); 3172 if (ret) { 3173 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3174 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3175 return ret; 3176 } 3177 3178 interface = phylink_choose_sfp_interface(pl, interfaces); 3179 if (interface == PHY_INTERFACE_MODE_NA) { 3180 phylink_err(pl, "failed to select SFP interface\n"); 3181 return -EINVAL; 3182 } 3183 3184 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3185 phy_modes(interface)); 3186 3187 config.interface = interface; 3188 3189 /* Ignore errors if we're expecting a PHY to attach later */ 3190 ret = phylink_validate(pl, support, &config); 3191 if (ret) { 3192 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3193 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3194 ERR_PTR(ret)); 3195 return ret; 3196 } 3197 3198 pl->link_port = pl->sfp_port; 3199 3200 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3201 3202 return 0; 3203 } 3204 3205 static int phylink_sfp_module_insert(void *upstream, 3206 const struct sfp_eeprom_id *id) 3207 { 3208 struct phylink *pl = upstream; 3209 3210 ASSERT_RTNL(); 3211 3212 linkmode_zero(pl->sfp_support); 3213 phy_interface_zero(pl->sfp_interfaces); 3214 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3215 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3216 3217 /* If this module may have a PHY connecting later, defer until later */ 3218 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3219 if (pl->sfp_may_have_phy) 3220 return 0; 3221 3222 return phylink_sfp_config_optical(pl); 3223 } 3224 3225 static int phylink_sfp_module_start(void *upstream) 3226 { 3227 struct phylink *pl = upstream; 3228 3229 /* If this SFP module has a PHY, start the PHY now. */ 3230 if (pl->phydev) { 3231 phy_start(pl->phydev); 3232 return 0; 3233 } 3234 3235 /* If the module may have a PHY but we didn't detect one we 3236 * need to configure the MAC here. 3237 */ 3238 if (!pl->sfp_may_have_phy) 3239 return 0; 3240 3241 return phylink_sfp_config_optical(pl); 3242 } 3243 3244 static void phylink_sfp_module_stop(void *upstream) 3245 { 3246 struct phylink *pl = upstream; 3247 3248 /* If this SFP module has a PHY, stop it. */ 3249 if (pl->phydev) 3250 phy_stop(pl->phydev); 3251 } 3252 3253 static void phylink_sfp_link_down(void *upstream) 3254 { 3255 struct phylink *pl = upstream; 3256 3257 ASSERT_RTNL(); 3258 3259 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3260 } 3261 3262 static void phylink_sfp_link_up(void *upstream) 3263 { 3264 struct phylink *pl = upstream; 3265 3266 ASSERT_RTNL(); 3267 3268 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3269 } 3270 3271 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3272 * or 802.3z control word, so inband will not work. 3273 */ 3274 static bool phylink_phy_no_inband(struct phy_device *phy) 3275 { 3276 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3277 0xae025150, 0xfffffff0); 3278 } 3279 3280 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3281 { 3282 struct phylink *pl = upstream; 3283 phy_interface_t interface; 3284 u8 mode; 3285 int ret; 3286 3287 /* 3288 * This is the new way of dealing with flow control for PHYs, 3289 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3290 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3291 * using our validate call to the MAC, we rely upon the MAC 3292 * clearing the bits from both supported and advertising fields. 3293 */ 3294 phy_support_asym_pause(phy); 3295 3296 if (phylink_phy_no_inband(phy)) 3297 mode = MLO_AN_PHY; 3298 else 3299 mode = MLO_AN_INBAND; 3300 3301 /* Set the PHY's host supported interfaces */ 3302 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3303 pl->config->supported_interfaces); 3304 3305 /* Do the initial configuration */ 3306 ret = phylink_sfp_config_phy(pl, mode, phy); 3307 if (ret < 0) 3308 return ret; 3309 3310 interface = pl->link_config.interface; 3311 ret = phylink_attach_phy(pl, phy, interface); 3312 if (ret < 0) 3313 return ret; 3314 3315 ret = phylink_bringup_phy(pl, phy, interface); 3316 if (ret) 3317 phy_detach(phy); 3318 3319 return ret; 3320 } 3321 3322 static void phylink_sfp_disconnect_phy(void *upstream) 3323 { 3324 phylink_disconnect_phy(upstream); 3325 } 3326 3327 static const struct sfp_upstream_ops sfp_phylink_ops = { 3328 .attach = phylink_sfp_attach, 3329 .detach = phylink_sfp_detach, 3330 .module_insert = phylink_sfp_module_insert, 3331 .module_start = phylink_sfp_module_start, 3332 .module_stop = phylink_sfp_module_stop, 3333 .link_up = phylink_sfp_link_up, 3334 .link_down = phylink_sfp_link_down, 3335 .connect_phy = phylink_sfp_connect_phy, 3336 .disconnect_phy = phylink_sfp_disconnect_phy, 3337 }; 3338 3339 /* Helpers for MAC drivers */ 3340 3341 static struct { 3342 int bit; 3343 int speed; 3344 } phylink_c73_priority_resolution[] = { 3345 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3346 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3347 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3348 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3349 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3350 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3351 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3352 /* 5GBASE-KR not supported */ 3353 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3354 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3355 }; 3356 3357 void phylink_resolve_c73(struct phylink_link_state *state) 3358 { 3359 int i; 3360 3361 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3362 int bit = phylink_c73_priority_resolution[i].bit; 3363 if (linkmode_test_bit(bit, state->advertising) && 3364 linkmode_test_bit(bit, state->lp_advertising)) 3365 break; 3366 } 3367 3368 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3369 state->speed = phylink_c73_priority_resolution[i].speed; 3370 state->duplex = DUPLEX_FULL; 3371 } else { 3372 /* negotiation failure */ 3373 state->link = false; 3374 } 3375 3376 phylink_resolve_an_pause(state); 3377 } 3378 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3379 3380 static void phylink_decode_c37_word(struct phylink_link_state *state, 3381 uint16_t config_reg, int speed) 3382 { 3383 int fd_bit; 3384 3385 if (speed == SPEED_2500) 3386 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3387 else 3388 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3389 3390 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3391 3392 if (linkmode_test_bit(fd_bit, state->advertising) && 3393 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3394 state->speed = speed; 3395 state->duplex = DUPLEX_FULL; 3396 } else { 3397 /* negotiation failure */ 3398 state->link = false; 3399 } 3400 3401 phylink_resolve_an_pause(state); 3402 } 3403 3404 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3405 uint16_t config_reg) 3406 { 3407 if (!(config_reg & LPA_SGMII_LINK)) { 3408 state->link = false; 3409 return; 3410 } 3411 3412 switch (config_reg & LPA_SGMII_SPD_MASK) { 3413 case LPA_SGMII_10: 3414 state->speed = SPEED_10; 3415 break; 3416 case LPA_SGMII_100: 3417 state->speed = SPEED_100; 3418 break; 3419 case LPA_SGMII_1000: 3420 state->speed = SPEED_1000; 3421 break; 3422 default: 3423 state->link = false; 3424 return; 3425 } 3426 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3427 state->duplex = DUPLEX_FULL; 3428 else 3429 state->duplex = DUPLEX_HALF; 3430 } 3431 3432 /** 3433 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3434 * @state: a pointer to a struct phylink_link_state. 3435 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3436 * 3437 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3438 * code word. Decode the USXGMII code word and populate the corresponding fields 3439 * (speed, duplex) into the phylink_link_state structure. 3440 */ 3441 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3442 uint16_t lpa) 3443 { 3444 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3445 case MDIO_USXGMII_10: 3446 state->speed = SPEED_10; 3447 break; 3448 case MDIO_USXGMII_100: 3449 state->speed = SPEED_100; 3450 break; 3451 case MDIO_USXGMII_1000: 3452 state->speed = SPEED_1000; 3453 break; 3454 case MDIO_USXGMII_2500: 3455 state->speed = SPEED_2500; 3456 break; 3457 case MDIO_USXGMII_5000: 3458 state->speed = SPEED_5000; 3459 break; 3460 case MDIO_USXGMII_10G: 3461 state->speed = SPEED_10000; 3462 break; 3463 default: 3464 state->link = false; 3465 return; 3466 } 3467 3468 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3469 state->duplex = DUPLEX_FULL; 3470 else 3471 state->duplex = DUPLEX_HALF; 3472 } 3473 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3474 3475 /** 3476 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3477 * @state: a pointer to a struct phylink_link_state. 3478 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3479 * 3480 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3481 * code word. Decode the USGMII code word and populate the corresponding fields 3482 * (speed, duplex) into the phylink_link_state structure. The structure for this 3483 * word is the same as the USXGMII word, except it only supports speeds up to 3484 * 1Gbps. 3485 */ 3486 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3487 uint16_t lpa) 3488 { 3489 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3490 case MDIO_USXGMII_10: 3491 state->speed = SPEED_10; 3492 break; 3493 case MDIO_USXGMII_100: 3494 state->speed = SPEED_100; 3495 break; 3496 case MDIO_USXGMII_1000: 3497 state->speed = SPEED_1000; 3498 break; 3499 default: 3500 state->link = false; 3501 return; 3502 } 3503 3504 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3505 state->duplex = DUPLEX_FULL; 3506 else 3507 state->duplex = DUPLEX_HALF; 3508 } 3509 3510 /** 3511 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3512 * @state: a pointer to a &struct phylink_link_state. 3513 * @bmsr: The value of the %MII_BMSR register 3514 * @lpa: The value of the %MII_LPA register 3515 * 3516 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3517 * clause 37 negotiation and/or SGMII control. 3518 * 3519 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3520 * the phylink @state structure. This is suitable to be used for implementing 3521 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3522 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3523 */ 3524 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3525 u16 bmsr, u16 lpa) 3526 { 3527 state->link = !!(bmsr & BMSR_LSTATUS); 3528 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3529 /* If there is no link or autonegotiation is disabled, the LP advertisement 3530 * data is not meaningful, so don't go any further. 3531 */ 3532 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3533 state->advertising)) 3534 return; 3535 3536 switch (state->interface) { 3537 case PHY_INTERFACE_MODE_1000BASEX: 3538 phylink_decode_c37_word(state, lpa, SPEED_1000); 3539 break; 3540 3541 case PHY_INTERFACE_MODE_2500BASEX: 3542 phylink_decode_c37_word(state, lpa, SPEED_2500); 3543 break; 3544 3545 case PHY_INTERFACE_MODE_SGMII: 3546 case PHY_INTERFACE_MODE_QSGMII: 3547 phylink_decode_sgmii_word(state, lpa); 3548 break; 3549 case PHY_INTERFACE_MODE_QUSGMII: 3550 phylink_decode_usgmii_word(state, lpa); 3551 break; 3552 3553 default: 3554 state->link = false; 3555 break; 3556 } 3557 } 3558 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3559 3560 /** 3561 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3562 * @pcs: a pointer to a &struct mdio_device. 3563 * @state: a pointer to a &struct phylink_link_state. 3564 * 3565 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3566 * clause 37 negotiation and/or SGMII control. 3567 * 3568 * Read the MAC PCS state from the MII device configured in @config and 3569 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3570 * the phylink @state structure. This is suitable to be directly plugged 3571 * into the pcs_get_state() member of the struct phylink_pcs_ops 3572 * structure. 3573 */ 3574 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3575 struct phylink_link_state *state) 3576 { 3577 int bmsr, lpa; 3578 3579 bmsr = mdiodev_read(pcs, MII_BMSR); 3580 lpa = mdiodev_read(pcs, MII_LPA); 3581 if (bmsr < 0 || lpa < 0) { 3582 state->link = false; 3583 return; 3584 } 3585 3586 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3587 } 3588 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3589 3590 /** 3591 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3592 * advertisement 3593 * @interface: the PHY interface mode being configured 3594 * @advertising: the ethtool advertisement mask 3595 * 3596 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3597 * clause 37 negotiation and/or SGMII control. 3598 * 3599 * Encode the clause 37 PCS advertisement as specified by @interface and 3600 * @advertising. 3601 * 3602 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3603 */ 3604 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3605 const unsigned long *advertising) 3606 { 3607 u16 adv; 3608 3609 switch (interface) { 3610 case PHY_INTERFACE_MODE_1000BASEX: 3611 case PHY_INTERFACE_MODE_2500BASEX: 3612 adv = ADVERTISE_1000XFULL; 3613 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3614 advertising)) 3615 adv |= ADVERTISE_1000XPAUSE; 3616 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3617 advertising)) 3618 adv |= ADVERTISE_1000XPSE_ASYM; 3619 return adv; 3620 case PHY_INTERFACE_MODE_SGMII: 3621 case PHY_INTERFACE_MODE_QSGMII: 3622 return 0x0001; 3623 default: 3624 /* Nothing to do for other modes */ 3625 return -EINVAL; 3626 } 3627 } 3628 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3629 3630 /** 3631 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3632 * @pcs: a pointer to a &struct mdio_device. 3633 * @interface: the PHY interface mode being configured 3634 * @advertising: the ethtool advertisement mask 3635 * @neg_mode: PCS negotiation mode 3636 * 3637 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3638 * parameters for the @mode, @interface and @advertising parameters. 3639 * Returns negative error number on failure, zero if the advertisement 3640 * has not changed, or positive if there is a change. 3641 */ 3642 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3643 phy_interface_t interface, 3644 const unsigned long *advertising, 3645 unsigned int neg_mode) 3646 { 3647 bool changed = 0; 3648 u16 bmcr; 3649 int ret, adv; 3650 3651 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3652 if (adv >= 0) { 3653 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3654 MII_ADVERTISE, 0xffff, adv); 3655 if (ret < 0) 3656 return ret; 3657 changed = ret; 3658 } 3659 3660 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3661 bmcr = BMCR_ANENABLE; 3662 else 3663 bmcr = 0; 3664 3665 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3666 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3667 if (ret < 0) 3668 return ret; 3669 3670 return changed; 3671 } 3672 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3673 3674 /** 3675 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3676 * @pcs: a pointer to a &struct mdio_device. 3677 * 3678 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3679 * clause 37 negotiation. 3680 * 3681 * Restart the clause 37 negotiation with the link partner. This is 3682 * suitable to be directly plugged into the pcs_get_state() member 3683 * of the struct phylink_pcs_ops structure. 3684 */ 3685 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3686 { 3687 int val = mdiodev_read(pcs, MII_BMCR); 3688 3689 if (val >= 0) { 3690 val |= BMCR_ANRESTART; 3691 3692 mdiodev_write(pcs, MII_BMCR, val); 3693 } 3694 } 3695 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3696 3697 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3698 struct phylink_link_state *state) 3699 { 3700 struct mii_bus *bus = pcs->bus; 3701 int addr = pcs->addr; 3702 int stat; 3703 3704 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3705 if (stat < 0) { 3706 state->link = false; 3707 return; 3708 } 3709 3710 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3711 if (!state->link) 3712 return; 3713 3714 switch (state->interface) { 3715 case PHY_INTERFACE_MODE_10GBASER: 3716 state->speed = SPEED_10000; 3717 state->duplex = DUPLEX_FULL; 3718 break; 3719 3720 default: 3721 break; 3722 } 3723 } 3724 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3725 3726 static int __init phylink_init(void) 3727 { 3728 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3729 __set_bit(phylink_sfp_interface_preference[i], 3730 phylink_sfp_interfaces); 3731 3732 return 0; 3733 } 3734 3735 module_init(phylink_init); 3736 3737 MODULE_LICENSE("GPL v2"); 3738 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3739