1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "phy-caps.h" 24 #include "sfp.h" 25 #include "swphy.h" 26 27 enum { 28 PHYLINK_DISABLE_STOPPED, 29 PHYLINK_DISABLE_LINK, 30 PHYLINK_DISABLE_MAC_WOL, 31 PHYLINK_DISABLE_REPLAY, 32 33 PCS_STATE_DOWN = 0, 34 PCS_STATE_STARTING, 35 PCS_STATE_STARTED, 36 }; 37 38 /** 39 * struct phylink - internal data type for phylink 40 */ 41 struct phylink { 42 /* private: */ 43 struct net_device *netdev; 44 const struct phylink_mac_ops *mac_ops; 45 struct phylink_config *config; 46 struct phylink_pcs *pcs; 47 struct device *dev; 48 unsigned int old_link_state:1; 49 50 unsigned long phylink_disable_state; /* bitmask of disables */ 51 struct phy_device *phydev; 52 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 53 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 54 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 55 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported_lpi); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 70 struct mutex state_mutex; 71 /* Serialize updates to pl->phydev with phylink_resolve() */ 72 struct mutex phydev_mutex; 73 struct phylink_link_state phy_state; 74 unsigned int phy_ib_mode; 75 struct work_struct resolve; 76 unsigned int pcs_neg_mode; 77 unsigned int pcs_state; 78 79 bool link_failed; 80 bool suspend_link_up; 81 bool force_major_config; 82 bool major_config_failed; 83 bool mac_supports_eee_ops; 84 bool mac_supports_eee; 85 bool phy_enable_tx_lpi; 86 bool mac_enable_tx_lpi; 87 bool mac_tx_clk_stop; 88 u32 mac_tx_lpi_timer; 89 u8 mac_rx_clk_stop_blocked; 90 91 struct sfp_bus *sfp_bus; 92 bool sfp_may_have_phy; 93 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 94 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 95 u8 sfp_port; 96 97 struct eee_config eee_cfg; 98 99 u32 wolopts_mac; 100 u8 wol_sopass[SOPASS_MAX]; 101 }; 102 103 #define phylink_printk(level, pl, fmt, ...) \ 104 do { \ 105 if ((pl)->config->type == PHYLINK_NETDEV) \ 106 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 107 else if ((pl)->config->type == PHYLINK_DEV) \ 108 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 109 } while (0) 110 111 #define phylink_err(pl, fmt, ...) \ 112 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 113 #define phylink_warn(pl, fmt, ...) \ 114 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 115 #define phylink_info(pl, fmt, ...) \ 116 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 117 #if defined(CONFIG_DYNAMIC_DEBUG) 118 #define phylink_dbg(pl, fmt, ...) \ 119 do { \ 120 if ((pl)->config->type == PHYLINK_NETDEV) \ 121 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 122 else if ((pl)->config->type == PHYLINK_DEV) \ 123 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 124 } while (0) 125 #elif defined(DEBUG) 126 #define phylink_dbg(pl, fmt, ...) \ 127 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 128 #else 129 #define phylink_dbg(pl, fmt, ...) \ 130 ({ \ 131 if (0) \ 132 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 133 }) 134 #endif 135 136 static const phy_interface_t phylink_sfp_interface_preference[] = { 137 PHY_INTERFACE_MODE_100GBASEP, 138 PHY_INTERFACE_MODE_50GBASER, 139 PHY_INTERFACE_MODE_LAUI, 140 PHY_INTERFACE_MODE_25GBASER, 141 PHY_INTERFACE_MODE_USXGMII, 142 PHY_INTERFACE_MODE_10GBASER, 143 PHY_INTERFACE_MODE_5GBASER, 144 PHY_INTERFACE_MODE_2500BASEX, 145 PHY_INTERFACE_MODE_SGMII, 146 PHY_INTERFACE_MODE_1000BASEX, 147 PHY_INTERFACE_MODE_100BASEX, 148 }; 149 150 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 151 152 /** 153 * phylink_set_port_modes() - set the port type modes in the ethtool mask 154 * @mask: ethtool link mode mask 155 * 156 * Sets all the port type modes in the ethtool mask. 157 */ 158 void phylink_set_port_modes(unsigned long *mask) 159 { 160 phylink_set(mask, TP); 161 phylink_set(mask, AUI); 162 phylink_set(mask, MII); 163 phylink_set(mask, FIBRE); 164 phylink_set(mask, BNC); 165 phylink_set(mask, Backplane); 166 } 167 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 168 169 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 170 { 171 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 172 173 phylink_set_port_modes(tmp); 174 phylink_set(tmp, Autoneg); 175 phylink_set(tmp, Pause); 176 phylink_set(tmp, Asym_Pause); 177 178 return linkmode_subset(linkmode, tmp); 179 } 180 181 static const char *phylink_an_mode_str(unsigned int mode) 182 { 183 static const char *modestr[] = { 184 [MLO_AN_PHY] = "phy", 185 [MLO_AN_FIXED] = "fixed", 186 [MLO_AN_INBAND] = "inband", 187 }; 188 189 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 190 } 191 192 static const char *phylink_pcs_mode_str(unsigned int mode) 193 { 194 if (!mode) 195 return "none"; 196 197 if (mode & PHYLINK_PCS_NEG_OUTBAND) 198 return "outband"; 199 200 if (mode & PHYLINK_PCS_NEG_INBAND) { 201 if (mode & PHYLINK_PCS_NEG_ENABLED) 202 return "inband,an-enabled"; 203 else 204 return "inband,an-disabled"; 205 } 206 207 return "unknown"; 208 } 209 210 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 211 { 212 switch (interface) { 213 case PHY_INTERFACE_MODE_SGMII: 214 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 215 return 1250; 216 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 217 return 3125; 218 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 219 return 5156; 220 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 221 return 10313; 222 default: 223 return 0; 224 } 225 } 226 227 /** 228 * phylink_interface_max_speed() - get the maximum speed of a phy interface 229 * @interface: phy interface mode defined by &typedef phy_interface_t 230 * 231 * Determine the maximum speed of a phy interface. This is intended to help 232 * determine the correct speed to pass to the MAC when the phy is performing 233 * rate matching. 234 * 235 * Return: The maximum speed of @interface 236 */ 237 static int phylink_interface_max_speed(phy_interface_t interface) 238 { 239 switch (interface) { 240 case PHY_INTERFACE_MODE_100BASEX: 241 case PHY_INTERFACE_MODE_REVRMII: 242 case PHY_INTERFACE_MODE_RMII: 243 case PHY_INTERFACE_MODE_SMII: 244 case PHY_INTERFACE_MODE_REVMII: 245 case PHY_INTERFACE_MODE_MII: 246 case PHY_INTERFACE_MODE_MIILITE: 247 return SPEED_100; 248 249 case PHY_INTERFACE_MODE_TBI: 250 case PHY_INTERFACE_MODE_MOCA: 251 case PHY_INTERFACE_MODE_RTBI: 252 case PHY_INTERFACE_MODE_1000BASEX: 253 case PHY_INTERFACE_MODE_1000BASEKX: 254 case PHY_INTERFACE_MODE_TRGMII: 255 case PHY_INTERFACE_MODE_RGMII_TXID: 256 case PHY_INTERFACE_MODE_RGMII_RXID: 257 case PHY_INTERFACE_MODE_RGMII_ID: 258 case PHY_INTERFACE_MODE_RGMII: 259 case PHY_INTERFACE_MODE_PSGMII: 260 case PHY_INTERFACE_MODE_QSGMII: 261 case PHY_INTERFACE_MODE_QUSGMII: 262 case PHY_INTERFACE_MODE_SGMII: 263 case PHY_INTERFACE_MODE_GMII: 264 return SPEED_1000; 265 266 case PHY_INTERFACE_MODE_2500BASEX: 267 case PHY_INTERFACE_MODE_10G_QXGMII: 268 return SPEED_2500; 269 270 case PHY_INTERFACE_MODE_5GBASER: 271 return SPEED_5000; 272 273 case PHY_INTERFACE_MODE_XGMII: 274 case PHY_INTERFACE_MODE_RXAUI: 275 case PHY_INTERFACE_MODE_XAUI: 276 case PHY_INTERFACE_MODE_10GBASER: 277 case PHY_INTERFACE_MODE_10GKR: 278 case PHY_INTERFACE_MODE_USXGMII: 279 return SPEED_10000; 280 281 case PHY_INTERFACE_MODE_25GBASER: 282 return SPEED_25000; 283 284 case PHY_INTERFACE_MODE_XLGMII: 285 return SPEED_40000; 286 287 case PHY_INTERFACE_MODE_50GBASER: 288 case PHY_INTERFACE_MODE_LAUI: 289 return SPEED_50000; 290 291 case PHY_INTERFACE_MODE_100GBASEP: 292 return SPEED_100000; 293 294 case PHY_INTERFACE_MODE_INTERNAL: 295 case PHY_INTERFACE_MODE_NA: 296 case PHY_INTERFACE_MODE_MAX: 297 /* No idea! Garbage in, unknown out */ 298 return SPEED_UNKNOWN; 299 } 300 301 /* If we get here, someone forgot to add an interface mode above */ 302 WARN_ON_ONCE(1); 303 return SPEED_UNKNOWN; 304 } 305 306 static struct { 307 unsigned long mask; 308 int speed; 309 unsigned int duplex; 310 unsigned int caps_bit; 311 } phylink_caps_params[] = { 312 { MAC_400000FD, SPEED_400000, DUPLEX_FULL, BIT(LINK_CAPA_400000FD) }, 313 { MAC_200000FD, SPEED_200000, DUPLEX_FULL, BIT(LINK_CAPA_200000FD) }, 314 { MAC_100000FD, SPEED_100000, DUPLEX_FULL, BIT(LINK_CAPA_100000FD) }, 315 { MAC_80000FD, SPEED_80000, DUPLEX_FULL, BIT(LINK_CAPA_80000FD) }, 316 { MAC_56000FD, SPEED_56000, DUPLEX_FULL, BIT(LINK_CAPA_56000FD) }, 317 { MAC_50000FD, SPEED_50000, DUPLEX_FULL, BIT(LINK_CAPA_50000FD) }, 318 { MAC_40000FD, SPEED_40000, DUPLEX_FULL, BIT(LINK_CAPA_40000FD) }, 319 { MAC_25000FD, SPEED_25000, DUPLEX_FULL, BIT(LINK_CAPA_25000FD) }, 320 { MAC_20000FD, SPEED_20000, DUPLEX_FULL, BIT(LINK_CAPA_20000FD) }, 321 { MAC_10000FD, SPEED_10000, DUPLEX_FULL, BIT(LINK_CAPA_10000FD) }, 322 { MAC_5000FD, SPEED_5000, DUPLEX_FULL, BIT(LINK_CAPA_5000FD) }, 323 { MAC_2500FD, SPEED_2500, DUPLEX_FULL, BIT(LINK_CAPA_2500FD) }, 324 { MAC_1000FD, SPEED_1000, DUPLEX_FULL, BIT(LINK_CAPA_1000FD) }, 325 { MAC_1000HD, SPEED_1000, DUPLEX_HALF, BIT(LINK_CAPA_1000HD) }, 326 { MAC_100FD, SPEED_100, DUPLEX_FULL, BIT(LINK_CAPA_100FD) }, 327 { MAC_100HD, SPEED_100, DUPLEX_HALF, BIT(LINK_CAPA_100HD) }, 328 { MAC_10FD, SPEED_10, DUPLEX_FULL, BIT(LINK_CAPA_10FD) }, 329 { MAC_10HD, SPEED_10, DUPLEX_HALF, BIT(LINK_CAPA_10HD) }, 330 }; 331 332 /** 333 * phylink_caps_to_link_caps() - Convert a set of MAC capabilities LINK caps 334 * @caps: A set of MAC capabilities 335 * 336 * Returns: The corresponding set of LINK_CAPA as defined in phy-caps.h 337 */ 338 static unsigned long phylink_caps_to_link_caps(unsigned long caps) 339 { 340 unsigned long link_caps = 0; 341 int i; 342 343 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 344 if (caps & phylink_caps_params[i].mask) 345 link_caps |= phylink_caps_params[i].caps_bit; 346 347 return link_caps; 348 } 349 350 static unsigned long phylink_link_caps_to_mac_caps(unsigned long link_caps) 351 { 352 unsigned long caps = 0; 353 int i; 354 355 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) 356 if (link_caps & phylink_caps_params[i].caps_bit) 357 caps |= phylink_caps_params[i].mask; 358 359 return caps; 360 } 361 362 /** 363 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 364 * @linkmodes: ethtool linkmode mask (must be already initialised) 365 * @caps: bitmask of MAC capabilities 366 * 367 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 368 * supported by the @caps. @linkmodes must have been initialised previously. 369 */ 370 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 371 unsigned long caps) 372 { 373 unsigned long link_caps = phylink_caps_to_link_caps(caps); 374 375 if (caps & MAC_SYM_PAUSE) 376 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 377 378 if (caps & MAC_ASYM_PAUSE) 379 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 380 381 phy_caps_linkmodes(link_caps, linkmodes); 382 } 383 384 /** 385 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 386 * @config: pointer to a &struct phylink_config 387 * @max_speed: maximum speed 388 * 389 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 390 * Any further motifications of config.mac_capabilities will override this. 391 */ 392 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 393 { 394 int i; 395 396 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 397 phylink_caps_params[i].speed > max_speed; i++) 398 config->mac_capabilities &= ~phylink_caps_params[i].mask; 399 } 400 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 401 402 /** 403 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 404 * @speed: the speed to search for 405 * @duplex: the duplex to search for 406 * 407 * Find the mac capability for a given speed and duplex. 408 * 409 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 410 * there were no matches. 411 */ 412 static unsigned long phylink_cap_from_speed_duplex(int speed, 413 unsigned int duplex) 414 { 415 int i; 416 417 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 418 if (speed == phylink_caps_params[i].speed && 419 duplex == phylink_caps_params[i].duplex) 420 return phylink_caps_params[i].mask; 421 } 422 423 return 0; 424 } 425 426 /** 427 * phylink_get_capabilities() - get capabilities for a given MAC 428 * @interface: phy interface mode defined by &typedef phy_interface_t 429 * @mac_capabilities: bitmask of MAC capabilities 430 * @rate_matching: type of rate matching being performed 431 * 432 * Get the MAC capabilities that are supported by the @interface mode and 433 * @mac_capabilities. 434 */ 435 static unsigned long phylink_get_capabilities(phy_interface_t interface, 436 unsigned long mac_capabilities, 437 int rate_matching) 438 { 439 unsigned long link_caps = phy_caps_from_interface(interface); 440 int max_speed = phylink_interface_max_speed(interface); 441 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 442 unsigned long matched_caps = 0; 443 444 caps |= phylink_link_caps_to_mac_caps(link_caps); 445 446 switch (rate_matching) { 447 case RATE_MATCH_OPEN_LOOP: 448 /* TODO */ 449 fallthrough; 450 case RATE_MATCH_NONE: 451 matched_caps = 0; 452 break; 453 case RATE_MATCH_PAUSE: { 454 /* The MAC must support asymmetric pause towards the local 455 * device for this. We could allow just symmetric pause, but 456 * then we might have to renegotiate if the link partner 457 * doesn't support pause. This is because there's no way to 458 * accept pause frames without transmitting them if we only 459 * support symmetric pause. 460 */ 461 if (!(mac_capabilities & MAC_SYM_PAUSE) || 462 !(mac_capabilities & MAC_ASYM_PAUSE)) 463 break; 464 465 /* We can't adapt if the MAC doesn't support the interface's 466 * max speed at full duplex. 467 */ 468 if (mac_capabilities & 469 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 470 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 471 break; 472 } 473 case RATE_MATCH_CRS: 474 /* The MAC must support half duplex at the interface's max 475 * speed. 476 */ 477 if (mac_capabilities & 478 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 479 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 480 matched_caps &= mac_capabilities; 481 } 482 break; 483 } 484 485 return (caps & mac_capabilities) | matched_caps; 486 } 487 488 /** 489 * phylink_validate_mask_caps() - Restrict link modes based on caps 490 * @supported: ethtool bitmask for supported link modes. 491 * @state: pointer to a &struct phylink_link_state. 492 * @mac_capabilities: bitmask of MAC capabilities 493 * 494 * Calculate the supported link modes based on @mac_capabilities, and restrict 495 * @supported and @state based on that. Use this function if your capabiliies 496 * aren't constant, such as if they vary depending on the interface. 497 */ 498 static void phylink_validate_mask_caps(unsigned long *supported, 499 struct phylink_link_state *state, 500 unsigned long mac_capabilities) 501 { 502 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 503 unsigned long caps; 504 505 phylink_set_port_modes(mask); 506 phylink_set(mask, Autoneg); 507 caps = phylink_get_capabilities(state->interface, mac_capabilities, 508 state->rate_matching); 509 phylink_caps_to_linkmodes(mask, caps); 510 511 linkmode_and(supported, supported, mask); 512 linkmode_and(state->advertising, state->advertising, mask); 513 } 514 515 static int phylink_validate_mac_and_pcs(struct phylink *pl, 516 unsigned long *supported, 517 struct phylink_link_state *state) 518 { 519 struct phylink_pcs *pcs = NULL; 520 unsigned long capabilities; 521 int ret; 522 523 /* Get the PCS for this interface mode */ 524 if (pl->mac_ops->mac_select_pcs) { 525 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 526 if (IS_ERR(pcs)) 527 return PTR_ERR(pcs); 528 } 529 530 if (pcs) { 531 /* The PCS, if present, must be setup before phylink_create() 532 * has been called. If the ops is not initialised, print an 533 * error and backtrace rather than oopsing the kernel. 534 */ 535 if (!pcs->ops) { 536 phylink_err(pl, "interface %s: uninitialised PCS\n", 537 phy_modes(state->interface)); 538 dump_stack(); 539 return -EINVAL; 540 } 541 542 /* Ensure that this PCS supports the interface which the MAC 543 * returned it for. It is an error for the MAC to return a PCS 544 * that does not support the interface mode. 545 */ 546 if (!phy_interface_empty(pcs->supported_interfaces) && 547 !test_bit(state->interface, pcs->supported_interfaces)) { 548 phylink_err(pl, "MAC returned PCS which does not support %s\n", 549 phy_modes(state->interface)); 550 return -EINVAL; 551 } 552 553 /* Validate the link parameters with the PCS */ 554 if (pcs->ops->pcs_validate) { 555 ret = pcs->ops->pcs_validate(pcs, supported, state); 556 if (ret < 0 || phylink_is_empty_linkmode(supported)) 557 return -EINVAL; 558 559 /* Ensure the advertising mask is a subset of the 560 * supported mask. 561 */ 562 linkmode_and(state->advertising, state->advertising, 563 supported); 564 } 565 } 566 567 /* Then validate the link parameters with the MAC */ 568 if (pl->mac_ops->mac_get_caps) 569 capabilities = pl->mac_ops->mac_get_caps(pl->config, 570 state->interface); 571 else 572 capabilities = pl->config->mac_capabilities; 573 574 phylink_validate_mask_caps(supported, state, capabilities); 575 576 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 577 } 578 579 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 580 const unsigned long *supported, 581 const struct phylink_link_state *state, 582 phy_interface_t interface, 583 unsigned long *accum_supported, 584 unsigned long *accum_advertising) 585 { 586 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 587 struct phylink_link_state tmp_state; 588 589 linkmode_copy(tmp_supported, supported); 590 591 tmp_state = *state; 592 tmp_state.interface = interface; 593 594 if (phy) 595 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 596 597 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 598 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 599 interface, phy_modes(interface), 600 phy_rate_matching_to_str(tmp_state.rate_matching), 601 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 602 603 linkmode_or(accum_supported, accum_supported, tmp_supported); 604 linkmode_or(accum_advertising, accum_advertising, 605 tmp_state.advertising); 606 } 607 } 608 609 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 610 unsigned long *supported, 611 struct phylink_link_state *state, 612 const unsigned long *interfaces) 613 { 614 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 615 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 616 int interface; 617 618 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 619 phylink_validate_one(pl, phy, supported, state, interface, 620 all_s, all_adv); 621 622 linkmode_copy(supported, all_s); 623 linkmode_copy(state->advertising, all_adv); 624 625 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 626 } 627 628 static int phylink_validate(struct phylink *pl, unsigned long *supported, 629 struct phylink_link_state *state) 630 { 631 const unsigned long *interfaces = pl->config->supported_interfaces; 632 633 if (state->interface == PHY_INTERFACE_MODE_NA) 634 return phylink_validate_mask(pl, NULL, supported, state, 635 interfaces); 636 637 if (!test_bit(state->interface, interfaces)) 638 return -EINVAL; 639 640 return phylink_validate_mac_and_pcs(pl, supported, state); 641 } 642 643 static void phylink_fill_fixedlink_supported(unsigned long *supported) 644 { 645 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, supported); 646 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, supported); 647 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, supported); 648 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, supported); 649 linkmode_set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, supported); 650 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, supported); 651 linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, supported); 652 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, supported); 653 linkmode_set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, supported); 654 linkmode_set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, supported); 655 linkmode_set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, supported); 656 linkmode_set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, supported); 657 } 658 659 static int phylink_parse_fixedlink(struct phylink *pl, 660 const struct fwnode_handle *fwnode) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(match) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 664 const struct link_capabilities *c; 665 struct fwnode_handle *fixed_node; 666 struct gpio_desc *desc; 667 u32 speed; 668 int ret; 669 670 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 671 if (fixed_node) { 672 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 673 674 pl->link_config.speed = speed; 675 pl->link_config.duplex = DUPLEX_HALF; 676 677 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 678 pl->link_config.duplex = DUPLEX_FULL; 679 680 /* We treat the "pause" and "asym-pause" terminology as 681 * defining the link partner's ability. 682 */ 683 if (fwnode_property_read_bool(fixed_node, "pause")) 684 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 685 pl->link_config.lp_advertising); 686 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 687 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 688 pl->link_config.lp_advertising); 689 690 if (ret == 0) { 691 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 692 GPIOD_IN, "?"); 693 694 if (!IS_ERR(desc)) 695 pl->link_gpio = desc; 696 else if (desc == ERR_PTR(-EPROBE_DEFER)) 697 ret = -EPROBE_DEFER; 698 } 699 fwnode_handle_put(fixed_node); 700 701 if (ret) 702 return ret; 703 } else { 704 u32 prop[5]; 705 706 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 707 NULL, 0); 708 if (ret != ARRAY_SIZE(prop)) { 709 phylink_err(pl, "broken fixed-link?\n"); 710 return -EINVAL; 711 } 712 713 phylink_warn(pl, "%pfw uses deprecated array-style fixed-link binding!\n", 714 fwnode); 715 716 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 717 prop, ARRAY_SIZE(prop)); 718 if (!ret) { 719 pl->link_config.duplex = prop[1] ? 720 DUPLEX_FULL : DUPLEX_HALF; 721 pl->link_config.speed = prop[2]; 722 if (prop[3]) 723 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 724 pl->link_config.lp_advertising); 725 if (prop[4]) 726 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 727 pl->link_config.lp_advertising); 728 } 729 } 730 731 if (pl->link_config.speed > SPEED_1000 && 732 pl->link_config.duplex != DUPLEX_FULL) 733 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 734 pl->link_config.speed); 735 736 linkmode_zero(pl->supported); 737 phylink_fill_fixedlink_supported(pl->supported); 738 739 linkmode_copy(pl->link_config.advertising, pl->supported); 740 phylink_validate(pl, pl->supported, &pl->link_config); 741 742 c = phy_caps_lookup(pl->link_config.speed, pl->link_config.duplex, 743 pl->supported, true); 744 if (c) 745 linkmode_and(match, pl->supported, c->linkmodes); 746 747 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 748 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 749 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 750 linkmode_and(pl->supported, pl->supported, mask); 751 752 phylink_set(pl->supported, MII); 753 754 if (c) { 755 linkmode_or(pl->supported, pl->supported, match); 756 linkmode_or(pl->link_config.lp_advertising, 757 pl->link_config.lp_advertising, match); 758 } else { 759 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 760 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 761 pl->link_config.speed); 762 } 763 764 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 765 pl->supported); 766 767 pl->link_config.link = 1; 768 pl->link_config.an_complete = 1; 769 770 return 0; 771 } 772 773 static int phylink_parse_mode(struct phylink *pl, 774 const struct fwnode_handle *fwnode) 775 { 776 struct fwnode_handle *dn; 777 const char *managed; 778 unsigned long caps; 779 780 if (pl->config->default_an_inband) 781 pl->cfg_link_an_mode = MLO_AN_INBAND; 782 783 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 784 if (dn || fwnode_property_present(fwnode, "fixed-link")) 785 pl->cfg_link_an_mode = MLO_AN_FIXED; 786 fwnode_handle_put(dn); 787 788 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 789 strcmp(managed, "in-band-status") == 0)) { 790 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 791 phylink_err(pl, 792 "can't use both fixed-link and in-band-status\n"); 793 return -EINVAL; 794 } 795 796 pl->cfg_link_an_mode = MLO_AN_INBAND; 797 } 798 799 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 800 linkmode_zero(pl->supported); 801 phylink_set(pl->supported, MII); 802 phylink_set(pl->supported, Autoneg); 803 phylink_set(pl->supported, Asym_Pause); 804 phylink_set(pl->supported, Pause); 805 806 switch (pl->link_config.interface) { 807 case PHY_INTERFACE_MODE_SGMII: 808 case PHY_INTERFACE_MODE_PSGMII: 809 case PHY_INTERFACE_MODE_QSGMII: 810 case PHY_INTERFACE_MODE_QUSGMII: 811 case PHY_INTERFACE_MODE_RGMII: 812 case PHY_INTERFACE_MODE_RGMII_ID: 813 case PHY_INTERFACE_MODE_RGMII_RXID: 814 case PHY_INTERFACE_MODE_RGMII_TXID: 815 case PHY_INTERFACE_MODE_RTBI: 816 case PHY_INTERFACE_MODE_1000BASEX: 817 case PHY_INTERFACE_MODE_2500BASEX: 818 case PHY_INTERFACE_MODE_5GBASER: 819 case PHY_INTERFACE_MODE_25GBASER: 820 case PHY_INTERFACE_MODE_USXGMII: 821 case PHY_INTERFACE_MODE_10G_QXGMII: 822 case PHY_INTERFACE_MODE_10GKR: 823 case PHY_INTERFACE_MODE_10GBASER: 824 case PHY_INTERFACE_MODE_XLGMII: 825 case PHY_INTERFACE_MODE_50GBASER: 826 case PHY_INTERFACE_MODE_LAUI: 827 case PHY_INTERFACE_MODE_100GBASEP: 828 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 829 caps = phylink_get_capabilities(pl->link_config.interface, caps, 830 RATE_MATCH_NONE); 831 phylink_caps_to_linkmodes(pl->supported, caps); 832 break; 833 834 default: 835 phylink_err(pl, 836 "incorrect link mode %s for in-band status\n", 837 phy_modes(pl->link_config.interface)); 838 return -EINVAL; 839 } 840 841 linkmode_copy(pl->link_config.advertising, pl->supported); 842 843 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 844 phylink_err(pl, 845 "failed to validate link configuration for in-band status\n"); 846 return -EINVAL; 847 } 848 } 849 850 return 0; 851 } 852 853 static void phylink_apply_manual_flow(struct phylink *pl, 854 struct phylink_link_state *state) 855 { 856 /* If autoneg is disabled, pause AN is also disabled */ 857 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 858 state->advertising)) 859 state->pause &= ~MLO_PAUSE_AN; 860 861 /* Manual configuration of pause modes */ 862 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 863 state->pause = pl->link_config.pause; 864 } 865 866 static void phylink_resolve_an_pause(struct phylink_link_state *state) 867 { 868 bool tx_pause, rx_pause; 869 870 if (state->duplex == DUPLEX_FULL) { 871 linkmode_resolve_pause(state->advertising, 872 state->lp_advertising, 873 &tx_pause, &rx_pause); 874 if (tx_pause) 875 state->pause |= MLO_PAUSE_TX; 876 if (rx_pause) 877 state->pause |= MLO_PAUSE_RX; 878 } 879 } 880 881 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 882 phy_interface_t interface) 883 { 884 if (pcs && pcs->ops->pcs_inband_caps) 885 return pcs->ops->pcs_inband_caps(pcs, interface); 886 887 return 0; 888 } 889 890 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 891 phy_interface_t interface) 892 { 893 if (pcs && pcs->ops->pcs_pre_config) 894 pcs->ops->pcs_pre_config(pcs, interface); 895 } 896 897 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 898 phy_interface_t interface) 899 { 900 int err = 0; 901 902 if (pcs && pcs->ops->pcs_post_config) 903 err = pcs->ops->pcs_post_config(pcs, interface); 904 905 return err; 906 } 907 908 static void phylink_pcs_disable(struct phylink_pcs *pcs) 909 { 910 if (pcs && pcs->ops->pcs_disable) 911 pcs->ops->pcs_disable(pcs); 912 } 913 914 static int phylink_pcs_enable(struct phylink_pcs *pcs) 915 { 916 int err = 0; 917 918 if (pcs && pcs->ops->pcs_enable) 919 err = pcs->ops->pcs_enable(pcs); 920 921 return err; 922 } 923 924 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 925 const struct phylink_link_state *state, 926 bool permit_pause_to_mac) 927 { 928 if (!pcs) 929 return 0; 930 931 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 932 state->advertising, permit_pause_to_mac); 933 } 934 935 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 936 phy_interface_t interface, int speed, 937 int duplex) 938 { 939 if (pcs && pcs->ops->pcs_link_up) 940 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 941 } 942 943 static void phylink_pcs_disable_eee(struct phylink_pcs *pcs) 944 { 945 if (pcs && pcs->ops->pcs_disable_eee) 946 pcs->ops->pcs_disable_eee(pcs); 947 } 948 949 static void phylink_pcs_enable_eee(struct phylink_pcs *pcs) 950 { 951 if (pcs && pcs->ops->pcs_enable_eee) 952 pcs->ops->pcs_enable_eee(pcs); 953 } 954 955 /* Query inband for a specific interface mode, asking the MAC for the 956 * PCS which will be used to handle the interface mode. 957 */ 958 static unsigned int phylink_inband_caps(struct phylink *pl, 959 phy_interface_t interface) 960 { 961 struct phylink_pcs *pcs; 962 963 if (!pl->mac_ops->mac_select_pcs) 964 return 0; 965 966 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 967 if (!pcs) 968 return 0; 969 970 return phylink_pcs_inband_caps(pcs, interface); 971 } 972 973 static void phylink_pcs_poll_stop(struct phylink *pl) 974 { 975 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 976 timer_delete(&pl->link_poll); 977 } 978 979 static void phylink_pcs_poll_start(struct phylink *pl) 980 { 981 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 982 mod_timer(&pl->link_poll, jiffies + HZ); 983 } 984 985 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 986 { 987 int ret = 0; 988 989 /* Signal to PCS driver that MAC requires RX clock for init */ 990 if (pl->config->mac_requires_rxc) 991 pcs->rxc_always_on = true; 992 993 if (pcs->ops->pcs_pre_init) 994 ret = pcs->ops->pcs_pre_init(pcs); 995 996 return ret; 997 } 998 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 999 1000 static void phylink_mac_config(struct phylink *pl, 1001 const struct phylink_link_state *state) 1002 { 1003 struct phylink_link_state st = *state; 1004 1005 /* Stop drivers incorrectly using these */ 1006 linkmode_zero(st.lp_advertising); 1007 st.speed = SPEED_UNKNOWN; 1008 st.duplex = DUPLEX_UNKNOWN; 1009 st.an_complete = false; 1010 st.link = false; 1011 1012 phylink_dbg(pl, 1013 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1014 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1015 phy_modes(st.interface), 1016 phy_rate_matching_to_str(st.rate_matching), 1017 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1018 st.pause); 1019 1020 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1021 } 1022 1023 static void phylink_pcs_an_restart(struct phylink *pl) 1024 { 1025 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1026 pl->link_config.advertising) && 1027 phy_interface_mode_is_8023z(pl->link_config.interface) && 1028 phylink_autoneg_inband(pl->act_link_an_mode)) 1029 pl->pcs->ops->pcs_an_restart(pl->pcs); 1030 } 1031 1032 enum inband_type { 1033 INBAND_NONE, 1034 INBAND_CISCO_SGMII, 1035 INBAND_BASEX, 1036 }; 1037 1038 static enum inband_type phylink_get_inband_type(phy_interface_t interface) 1039 { 1040 switch (interface) { 1041 case PHY_INTERFACE_MODE_SGMII: 1042 case PHY_INTERFACE_MODE_PSGMII: 1043 case PHY_INTERFACE_MODE_QSGMII: 1044 case PHY_INTERFACE_MODE_QUSGMII: 1045 case PHY_INTERFACE_MODE_USXGMII: 1046 case PHY_INTERFACE_MODE_10G_QXGMII: 1047 /* These protocols are designed for use with a PHY which 1048 * communicates its negotiation result back to the MAC via 1049 * inband communication. Note: there exist PHYs that run 1050 * with SGMII but do not send the inband data. 1051 */ 1052 return INBAND_CISCO_SGMII; 1053 1054 case PHY_INTERFACE_MODE_1000BASEX: 1055 case PHY_INTERFACE_MODE_2500BASEX: 1056 /* 1000base-X is designed for use media-side for Fibre 1057 * connections, and thus the Autoneg bit needs to be 1058 * taken into account. We also do this for 2500base-X 1059 * as well, but drivers may not support this, so may 1060 * need to override this. 1061 */ 1062 return INBAND_BASEX; 1063 1064 default: 1065 return INBAND_NONE; 1066 } 1067 } 1068 1069 /** 1070 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1071 * @pl: a pointer to a &struct phylink returned from phylink_create() 1072 * @pcs: a pointer to &struct phylink_pcs 1073 * @interface: interface mode to be used 1074 * @advertising: adertisement ethtool link mode mask 1075 * 1076 * Determines the negotiation mode to be used by the PCS, and returns 1077 * one of: 1078 * 1079 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1080 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1081 * will be used. 1082 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1083 * disabled 1084 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1085 * 1086 * Note: this is for cases where the PCS itself is involved in negotiation 1087 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1088 */ 1089 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1090 phy_interface_t interface, 1091 const unsigned long *advertising) 1092 { 1093 unsigned int pcs_ib_caps = 0; 1094 unsigned int phy_ib_caps = 0; 1095 unsigned int neg_mode, mode; 1096 enum inband_type type; 1097 1098 type = phylink_get_inband_type(interface); 1099 if (type == INBAND_NONE) { 1100 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1101 pl->act_link_an_mode = pl->req_link_an_mode; 1102 return; 1103 } 1104 1105 mode = pl->req_link_an_mode; 1106 1107 pl->phy_ib_mode = 0; 1108 1109 if (pcs) 1110 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1111 1112 if (pl->phydev) 1113 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1114 1115 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1116 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1117 1118 if (!phylink_autoneg_inband(mode)) { 1119 bool pcs_ib_only = false; 1120 bool phy_ib_only = false; 1121 1122 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1123 /* PCS supports reporting in-band capabilities, and 1124 * supports more than disable mode. 1125 */ 1126 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1127 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1128 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1129 pcs_ib_only = true; 1130 } 1131 1132 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1133 /* PHY supports in-band capabilities, and supports 1134 * more than disable mode. 1135 */ 1136 if (phy_ib_caps & LINK_INBAND_DISABLE) 1137 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1138 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1139 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1140 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1141 phy_ib_only = true; 1142 } 1143 1144 /* If either the PCS or PHY requires inband to be enabled, 1145 * this is an invalid configuration. Provide a diagnostic 1146 * message for this case, but don't try to force the issue. 1147 */ 1148 if (pcs_ib_only || phy_ib_only) 1149 phylink_warn(pl, 1150 "firmware wants %s mode, but %s%s%s requires inband\n", 1151 phylink_an_mode_str(mode), 1152 pcs_ib_only ? "PCS" : "", 1153 pcs_ib_only && phy_ib_only ? " and " : "", 1154 phy_ib_only ? "PHY" : ""); 1155 1156 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1157 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1158 /* For SGMII modes which are designed to be used with PHYs, or 1159 * Base-X with a PHY, we try to use in-band mode where-ever 1160 * possible. However, there are some PHYs e.g. BCM84881 which 1161 * do not support in-band. 1162 */ 1163 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1164 LINK_INBAND_BYPASS; 1165 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1166 LINK_INBAND_BYPASS; 1167 /* PCS PHY 1168 * D E D E 1169 * 0 0 0 0 no information inband enabled 1170 * 1 0 0 0 pcs doesn't support outband 1171 * 0 1 0 0 pcs required inband enabled 1172 * 1 1 0 0 pcs optional inband enabled 1173 * 0 0 1 0 phy doesn't support outband 1174 * 1 0 1 0 pcs+phy doesn't support outband 1175 * 0 1 1 0 pcs required, phy doesn't support, invalid 1176 * 1 1 1 0 pcs optional, phy doesn't support, outband 1177 * 0 0 0 1 phy required inband enabled 1178 * 1 0 0 1 pcs doesn't support, phy required, invalid 1179 * 0 1 0 1 pcs+phy required inband enabled 1180 * 1 1 0 1 pcs optional, phy required inband enabled 1181 * 0 0 1 1 phy optional inband enabled 1182 * 1 0 1 1 pcs doesn't support, phy optional, outband 1183 * 0 1 1 1 pcs required, phy optional inband enabled 1184 * 1 1 1 1 pcs+phy optional inband enabled 1185 */ 1186 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1187 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1188 /* In-band supported or unknown at both ends. Enable 1189 * in-band mode with or without bypass at the PHY. 1190 */ 1191 if (phy_ib_caps & LINK_INBAND_ENABLE) 1192 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1193 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1194 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1195 1196 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1197 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1198 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1199 /* Either in-band not supported at at least one end. 1200 * In-band bypass at the other end is possible. 1201 */ 1202 if (phy_ib_caps & LINK_INBAND_DISABLE) 1203 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1204 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1205 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1206 1207 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1208 if (pl->phydev) 1209 mode = MLO_AN_PHY; 1210 } else { 1211 /* invalid */ 1212 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1213 phy_modes(interface)); 1214 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1215 } 1216 } else { 1217 /* For Base-X without a PHY */ 1218 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1219 /* If the PCS doesn't support inband, then inband must 1220 * be disabled. 1221 */ 1222 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1223 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1224 /* If the PCS requires inband, then inband must always 1225 * be enabled. 1226 */ 1227 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1228 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1229 advertising)) 1230 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1231 else 1232 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1233 } 1234 1235 pl->pcs_neg_mode = neg_mode; 1236 pl->act_link_an_mode = mode; 1237 } 1238 1239 static void phylink_major_config(struct phylink *pl, bool restart, 1240 const struct phylink_link_state *state) 1241 { 1242 struct phylink_pcs *pcs = NULL; 1243 bool pcs_changed = false; 1244 unsigned int rate_kbd; 1245 int err; 1246 1247 phylink_dbg(pl, "major config, requested %s/%s\n", 1248 phylink_an_mode_str(pl->req_link_an_mode), 1249 phy_modes(state->interface)); 1250 1251 pl->major_config_failed = false; 1252 1253 if (pl->mac_ops->mac_select_pcs) { 1254 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1255 if (IS_ERR(pcs)) { 1256 phylink_err(pl, 1257 "mac_select_pcs unexpectedly failed: %pe\n", 1258 pcs); 1259 1260 pl->major_config_failed = true; 1261 return; 1262 } 1263 1264 pcs_changed = pl->pcs != pcs; 1265 } 1266 1267 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1268 1269 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1270 phylink_an_mode_str(pl->act_link_an_mode), 1271 phylink_pcs_mode_str(pl->pcs_neg_mode), 1272 phy_modes(state->interface)); 1273 1274 phylink_pcs_poll_stop(pl); 1275 1276 if (pl->mac_ops->mac_prepare) { 1277 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1278 state->interface); 1279 if (err < 0) { 1280 phylink_err(pl, "mac_prepare failed: %pe\n", 1281 ERR_PTR(err)); 1282 pl->major_config_failed = true; 1283 return; 1284 } 1285 } 1286 1287 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1288 * for the change. 1289 */ 1290 if (pcs_changed) { 1291 phylink_pcs_disable(pl->pcs); 1292 1293 if (pl->pcs) 1294 pl->pcs->phylink = NULL; 1295 1296 if (pcs) 1297 pcs->phylink = pl; 1298 1299 pl->pcs = pcs; 1300 } 1301 1302 if (pl->pcs) 1303 phylink_pcs_pre_config(pl->pcs, state->interface); 1304 1305 phylink_mac_config(pl, state); 1306 1307 if (pl->pcs) { 1308 err = phylink_pcs_post_config(pl->pcs, state->interface); 1309 if (err < 0) { 1310 phylink_err(pl, "pcs_post_config failed: %pe\n", 1311 ERR_PTR(err)); 1312 1313 pl->major_config_failed = true; 1314 } 1315 } 1316 1317 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1318 phylink_pcs_enable(pl->pcs); 1319 1320 err = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, state, 1321 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1322 if (err < 0) { 1323 phylink_err(pl, "pcs_config failed: %pe\n", ERR_PTR(err)); 1324 pl->major_config_failed = true; 1325 } else if (err > 0) { 1326 restart = true; 1327 } 1328 1329 if (restart) 1330 phylink_pcs_an_restart(pl); 1331 1332 if (pl->mac_ops->mac_finish) { 1333 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1334 state->interface); 1335 if (err < 0) { 1336 phylink_err(pl, "mac_finish failed: %pe\n", 1337 ERR_PTR(err)); 1338 1339 pl->major_config_failed = true; 1340 } 1341 } 1342 1343 if (pl->phydev && pl->phy_ib_mode) { 1344 phylink_dbg(pl, "configuring PHY for inband%s%s%s\n", 1345 pl->phy_ib_mode & LINK_INBAND_DISABLE ? 1346 " disable" : "", 1347 pl->phy_ib_mode & LINK_INBAND_ENABLE ? 1348 " enable" : "", 1349 pl->phy_ib_mode & LINK_INBAND_BYPASS ? 1350 " bypass" : ""); 1351 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1352 if (err < 0) { 1353 phylink_err(pl, "phy_config_inband: %pe\n", 1354 ERR_PTR(err)); 1355 1356 pl->major_config_failed = true; 1357 } 1358 } 1359 1360 if (pl->sfp_bus) { 1361 rate_kbd = phylink_interface_signal_rate(state->interface); 1362 if (rate_kbd) 1363 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1364 } 1365 1366 phylink_pcs_poll_start(pl); 1367 } 1368 1369 /* 1370 * Reconfigure for a change of inband advertisement. 1371 * If we have a separate PCS, we only need to call its pcs_config() method, 1372 * and then restart AN if it indicates something changed. Otherwise, we do 1373 * the full MAC reconfiguration. 1374 */ 1375 static int phylink_change_inband_advert(struct phylink *pl) 1376 { 1377 int ret; 1378 1379 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1380 return 0; 1381 1382 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1383 phylink_an_mode_str(pl->req_link_an_mode), 1384 phy_modes(pl->link_config.interface), 1385 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1386 pl->link_config.pause); 1387 1388 /* Recompute the PCS neg mode */ 1389 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1390 pl->link_config.advertising); 1391 1392 /* Modern PCS-based method; update the advert at the PCS, and 1393 * restart negotiation if the pcs_config() helper indicates that 1394 * the programmed advertisement has changed. 1395 */ 1396 ret = phylink_pcs_config(pl->pcs, pl->pcs_neg_mode, &pl->link_config, 1397 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1398 if (ret < 0) 1399 return ret; 1400 1401 if (ret > 0) 1402 phylink_pcs_an_restart(pl); 1403 1404 return 0; 1405 } 1406 1407 static void phylink_mac_pcs_get_state(struct phylink *pl, 1408 struct phylink_link_state *state) 1409 { 1410 struct phylink_pcs *pcs; 1411 bool autoneg; 1412 1413 linkmode_copy(state->advertising, pl->link_config.advertising); 1414 linkmode_zero(state->lp_advertising); 1415 state->interface = pl->link_config.interface; 1416 state->rate_matching = pl->link_config.rate_matching; 1417 state->an_complete = 0; 1418 state->link = 1; 1419 1420 autoneg = pl->pcs_neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED; 1421 if (autoneg) { 1422 state->speed = SPEED_UNKNOWN; 1423 state->duplex = DUPLEX_UNKNOWN; 1424 state->pause = MLO_PAUSE_NONE; 1425 } else { 1426 state->speed = pl->link_config.speed; 1427 state->duplex = pl->link_config.duplex; 1428 state->pause = pl->link_config.pause; 1429 } 1430 1431 pcs = pl->pcs; 1432 if (pcs) 1433 pcs->ops->pcs_get_state(pcs, pl->pcs_neg_mode, state); 1434 else 1435 state->link = 0; 1436 } 1437 1438 /* The fixed state is... fixed except for the link state, 1439 * which may be determined by a GPIO or a callback. 1440 */ 1441 static void phylink_get_fixed_state(struct phylink *pl, 1442 struct phylink_link_state *state) 1443 { 1444 *state = pl->link_config; 1445 if (pl->config->get_fixed_state) 1446 pl->config->get_fixed_state(pl->config, state); 1447 else if (pl->link_gpio) 1448 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1449 1450 state->pause = MLO_PAUSE_NONE; 1451 phylink_resolve_an_pause(state); 1452 } 1453 1454 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1455 { 1456 struct phylink_link_state link_state; 1457 struct phy_device *phy = pl->phydev; 1458 1459 switch (pl->req_link_an_mode) { 1460 case MLO_AN_PHY: 1461 link_state = pl->phy_state; 1462 break; 1463 1464 case MLO_AN_FIXED: 1465 phylink_get_fixed_state(pl, &link_state); 1466 break; 1467 1468 case MLO_AN_INBAND: 1469 link_state = pl->link_config; 1470 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1471 link_state.pause = MLO_PAUSE_NONE; 1472 break; 1473 1474 default: /* can't happen */ 1475 return; 1476 } 1477 1478 link_state.link = false; 1479 1480 phylink_apply_manual_flow(pl, &link_state); 1481 if (phy) 1482 mutex_lock(&phy->lock); 1483 phylink_major_config(pl, force_restart, &link_state); 1484 if (phy) 1485 mutex_unlock(&phy->lock); 1486 } 1487 1488 static const char *phylink_pause_to_str(int pause) 1489 { 1490 switch (pause & MLO_PAUSE_TXRX_MASK) { 1491 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1492 return "rx/tx"; 1493 case MLO_PAUSE_TX: 1494 return "tx"; 1495 case MLO_PAUSE_RX: 1496 return "rx"; 1497 default: 1498 return "off"; 1499 } 1500 } 1501 1502 static void phylink_deactivate_lpi(struct phylink *pl) 1503 { 1504 if (pl->mac_enable_tx_lpi) { 1505 pl->mac_enable_tx_lpi = false; 1506 1507 phylink_dbg(pl, "disabling LPI\n"); 1508 1509 pl->mac_ops->mac_disable_tx_lpi(pl->config); 1510 1511 phylink_pcs_disable_eee(pl->pcs); 1512 } 1513 } 1514 1515 static void phylink_activate_lpi(struct phylink *pl) 1516 { 1517 int err; 1518 1519 if (!test_bit(pl->cur_interface, pl->config->lpi_interfaces)) { 1520 phylink_dbg(pl, "MAC does not support LPI with %s\n", 1521 phy_modes(pl->cur_interface)); 1522 return; 1523 } 1524 1525 phylink_dbg(pl, "LPI timer %uus, tx clock stop %u\n", 1526 pl->mac_tx_lpi_timer, pl->mac_tx_clk_stop); 1527 1528 phylink_pcs_enable_eee(pl->pcs); 1529 1530 err = pl->mac_ops->mac_enable_tx_lpi(pl->config, pl->mac_tx_lpi_timer, 1531 pl->mac_tx_clk_stop); 1532 if (err) { 1533 phylink_pcs_disable_eee(pl->pcs); 1534 phylink_err(pl, "%ps() failed: %pe\n", 1535 pl->mac_ops->mac_enable_tx_lpi, ERR_PTR(err)); 1536 return; 1537 } 1538 1539 pl->mac_enable_tx_lpi = true; 1540 } 1541 1542 static void phylink_link_up(struct phylink *pl, 1543 struct phylink_link_state link_state) 1544 { 1545 struct net_device *ndev = pl->netdev; 1546 int speed, duplex; 1547 bool rx_pause; 1548 1549 speed = link_state.speed; 1550 duplex = link_state.duplex; 1551 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1552 1553 switch (link_state.rate_matching) { 1554 case RATE_MATCH_PAUSE: 1555 /* The PHY is doing rate matchion from the media rate (in 1556 * the link_state) to the interface speed, and will send 1557 * pause frames to the MAC to limit its transmission speed. 1558 */ 1559 speed = phylink_interface_max_speed(link_state.interface); 1560 duplex = DUPLEX_FULL; 1561 rx_pause = true; 1562 break; 1563 1564 case RATE_MATCH_CRS: 1565 /* The PHY is doing rate matchion from the media rate (in 1566 * the link_state) to the interface speed, and will cause 1567 * collisions to the MAC to limit its transmission speed. 1568 */ 1569 speed = phylink_interface_max_speed(link_state.interface); 1570 duplex = DUPLEX_HALF; 1571 break; 1572 } 1573 1574 pl->cur_interface = link_state.interface; 1575 1576 phylink_pcs_link_up(pl->pcs, pl->pcs_neg_mode, pl->cur_interface, speed, 1577 duplex); 1578 1579 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1580 pl->cur_interface, speed, duplex, 1581 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1582 1583 if (pl->mac_supports_eee && pl->phy_enable_tx_lpi) 1584 phylink_activate_lpi(pl); 1585 1586 if (ndev) 1587 netif_carrier_on(ndev); 1588 1589 phylink_info(pl, 1590 "Link is Up - %s/%s - flow control %s\n", 1591 phy_speed_to_str(link_state.speed), 1592 phy_duplex_to_str(link_state.duplex), 1593 phylink_pause_to_str(link_state.pause)); 1594 } 1595 1596 static void phylink_link_down(struct phylink *pl) 1597 { 1598 struct net_device *ndev = pl->netdev; 1599 1600 if (ndev) 1601 netif_carrier_off(ndev); 1602 1603 phylink_deactivate_lpi(pl); 1604 1605 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1606 pl->cur_interface); 1607 phylink_info(pl, "Link is Down\n"); 1608 } 1609 1610 static bool phylink_link_is_up(struct phylink *pl) 1611 { 1612 return pl->netdev ? netif_carrier_ok(pl->netdev) : pl->old_link_state; 1613 } 1614 1615 static void phylink_resolve(struct work_struct *w) 1616 { 1617 struct phylink *pl = container_of(w, struct phylink, resolve); 1618 struct phylink_link_state link_state; 1619 bool mac_config = false; 1620 bool retrigger = false; 1621 struct phy_device *phy; 1622 bool cur_link_state; 1623 1624 mutex_lock(&pl->phydev_mutex); 1625 phy = pl->phydev; 1626 if (phy) 1627 mutex_lock(&phy->lock); 1628 mutex_lock(&pl->state_mutex); 1629 cur_link_state = phylink_link_is_up(pl); 1630 1631 if (pl->phylink_disable_state) { 1632 pl->link_failed = false; 1633 link_state.link = false; 1634 } else if (pl->link_failed) { 1635 link_state.link = false; 1636 retrigger = true; 1637 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1638 phylink_get_fixed_state(pl, &link_state); 1639 mac_config = link_state.link; 1640 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1641 link_state = pl->phy_state; 1642 mac_config = link_state.link; 1643 } else { 1644 phylink_mac_pcs_get_state(pl, &link_state); 1645 1646 /* The PCS may have a latching link-fail indicator. If the link 1647 * was up, bring the link down and re-trigger the resolve. 1648 * Otherwise, re-read the PCS state to get the current status 1649 * of the link. 1650 */ 1651 if (!link_state.link) { 1652 if (cur_link_state) 1653 retrigger = true; 1654 else 1655 phylink_mac_pcs_get_state(pl, &link_state); 1656 } 1657 1658 /* If we have a phy, the "up" state is the union of both the 1659 * PHY and the MAC 1660 */ 1661 if (phy) 1662 link_state.link &= pl->phy_state.link; 1663 1664 /* Only update if the PHY link is up */ 1665 if (phy && pl->phy_state.link) { 1666 /* If the interface has changed, force a link down 1667 * event if the link isn't already down, and re-resolve. 1668 */ 1669 if (link_state.interface != pl->phy_state.interface) { 1670 retrigger = true; 1671 link_state.link = false; 1672 } 1673 1674 link_state.interface = pl->phy_state.interface; 1675 1676 /* If we are doing rate matching, then the link 1677 * speed/duplex comes from the PHY 1678 */ 1679 if (pl->phy_state.rate_matching) { 1680 link_state.rate_matching = 1681 pl->phy_state.rate_matching; 1682 link_state.speed = pl->phy_state.speed; 1683 link_state.duplex = pl->phy_state.duplex; 1684 } 1685 1686 /* If we have a PHY, we need to update with the PHY 1687 * flow control bits. 1688 */ 1689 link_state.pause = pl->phy_state.pause; 1690 mac_config = true; 1691 } 1692 } 1693 1694 if (pl->act_link_an_mode != MLO_AN_FIXED) 1695 phylink_apply_manual_flow(pl, &link_state); 1696 1697 if ((mac_config && link_state.interface != pl->link_config.interface) || 1698 pl->force_major_config) { 1699 /* The interface has changed or a forced major configuration 1700 * was requested, so force the link down and then reconfigure. 1701 */ 1702 if (cur_link_state) { 1703 phylink_link_down(pl); 1704 cur_link_state = false; 1705 } 1706 phylink_major_config(pl, false, &link_state); 1707 pl->link_config.interface = link_state.interface; 1708 pl->force_major_config = false; 1709 } 1710 1711 /* If configuration of the interface failed, force the link down 1712 * until we get a successful configuration. 1713 */ 1714 if (pl->major_config_failed) 1715 link_state.link = false; 1716 1717 if (link_state.link != cur_link_state) { 1718 pl->old_link_state = link_state.link; 1719 if (!link_state.link) 1720 phylink_link_down(pl); 1721 else 1722 phylink_link_up(pl, link_state); 1723 } 1724 if (!link_state.link && retrigger) { 1725 pl->link_failed = false; 1726 queue_work(system_power_efficient_wq, &pl->resolve); 1727 } 1728 mutex_unlock(&pl->state_mutex); 1729 if (phy) 1730 mutex_unlock(&phy->lock); 1731 mutex_unlock(&pl->phydev_mutex); 1732 } 1733 1734 static void phylink_run_resolve(struct phylink *pl) 1735 { 1736 if (!pl->phylink_disable_state) 1737 queue_work(system_power_efficient_wq, &pl->resolve); 1738 } 1739 1740 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1741 { 1742 unsigned long state = pl->phylink_disable_state; 1743 1744 set_bit(bit, &pl->phylink_disable_state); 1745 if (state == 0) { 1746 queue_work(system_power_efficient_wq, &pl->resolve); 1747 flush_work(&pl->resolve); 1748 } 1749 } 1750 1751 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1752 { 1753 clear_bit(bit, &pl->phylink_disable_state); 1754 phylink_run_resolve(pl); 1755 } 1756 1757 static void phylink_fixed_poll(struct timer_list *t) 1758 { 1759 struct phylink *pl = container_of(t, struct phylink, link_poll); 1760 1761 mod_timer(t, jiffies + HZ); 1762 1763 phylink_run_resolve(pl); 1764 } 1765 1766 static const struct sfp_upstream_ops sfp_phylink_ops; 1767 1768 static int phylink_register_sfp(struct phylink *pl, 1769 const struct fwnode_handle *fwnode) 1770 { 1771 struct sfp_bus *bus; 1772 int ret; 1773 1774 if (!fwnode) 1775 return 0; 1776 1777 bus = sfp_bus_find_fwnode(fwnode); 1778 if (IS_ERR(bus)) { 1779 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1780 return PTR_ERR(bus); 1781 } 1782 1783 pl->sfp_bus = bus; 1784 1785 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1786 sfp_bus_put(bus); 1787 1788 return ret; 1789 } 1790 1791 /** 1792 * phylink_set_fixed_link() - set the fixed link 1793 * @pl: a pointer to a &struct phylink returned from phylink_create() 1794 * @state: a pointer to a struct phylink_link_state. 1795 * 1796 * This function is used when the link parameters are known and do not change, 1797 * making it suitable for certain types of network connections. 1798 * 1799 * Returns: zero on success or negative error code. 1800 */ 1801 int phylink_set_fixed_link(struct phylink *pl, 1802 const struct phylink_link_state *state) 1803 { 1804 const struct link_capabilities *c; 1805 unsigned long *adv; 1806 1807 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1808 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1809 return -EINVAL; 1810 1811 c = phy_caps_lookup(state->speed, state->duplex, 1812 pl->supported, true); 1813 if (!c) 1814 return -EINVAL; 1815 1816 adv = pl->link_config.advertising; 1817 linkmode_and(adv, pl->supported, c->linkmodes); 1818 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1819 1820 pl->link_config.speed = state->speed; 1821 pl->link_config.duplex = state->duplex; 1822 pl->link_config.link = 1; 1823 pl->link_config.an_complete = 1; 1824 1825 pl->cfg_link_an_mode = MLO_AN_FIXED; 1826 pl->req_link_an_mode = pl->cfg_link_an_mode; 1827 1828 return 0; 1829 } 1830 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1831 1832 /** 1833 * phylink_create() - create a phylink instance 1834 * @config: a pointer to the target &struct phylink_config 1835 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1836 * interface 1837 * @iface: the desired link mode defined by &typedef phy_interface_t 1838 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1839 * 1840 * Create a new phylink instance, and parse the link parameters found in @np. 1841 * This will parse in-band modes, fixed-link or SFP configuration. 1842 * 1843 * Note: the rtnl lock must not be held when calling this function. 1844 * 1845 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1846 * must use IS_ERR() to check for errors from this function. 1847 */ 1848 struct phylink *phylink_create(struct phylink_config *config, 1849 const struct fwnode_handle *fwnode, 1850 phy_interface_t iface, 1851 const struct phylink_mac_ops *mac_ops) 1852 { 1853 struct phylink *pl; 1854 int ret; 1855 1856 /* Validate the supplied configuration */ 1857 if (phy_interface_empty(config->supported_interfaces)) { 1858 dev_err(config->dev, 1859 "phylink: error: empty supported_interfaces\n"); 1860 return ERR_PTR(-EINVAL); 1861 } 1862 1863 pl = kzalloc_obj(*pl); 1864 if (!pl) 1865 return ERR_PTR(-ENOMEM); 1866 1867 mutex_init(&pl->phydev_mutex); 1868 mutex_init(&pl->state_mutex); 1869 INIT_WORK(&pl->resolve, phylink_resolve); 1870 1871 pl->config = config; 1872 if (config->type == PHYLINK_NETDEV) { 1873 pl->netdev = to_net_dev(config->dev); 1874 netif_carrier_off(pl->netdev); 1875 } else if (config->type == PHYLINK_DEV) { 1876 pl->dev = config->dev; 1877 } else { 1878 ret = -EINVAL; 1879 goto free_pl; 1880 } 1881 1882 pl->mac_supports_eee_ops = phylink_mac_implements_lpi(mac_ops); 1883 pl->mac_supports_eee = pl->mac_supports_eee_ops && 1884 pl->config->lpi_capabilities && 1885 !phy_interface_empty(pl->config->lpi_interfaces); 1886 1887 /* Set the default EEE configuration */ 1888 pl->eee_cfg.eee_enabled = pl->config->eee_enabled_default; 1889 pl->eee_cfg.tx_lpi_enabled = pl->eee_cfg.eee_enabled; 1890 pl->eee_cfg.tx_lpi_timer = pl->config->lpi_timer_default; 1891 1892 pl->phy_state.interface = iface; 1893 pl->link_interface = iface; 1894 if (iface == PHY_INTERFACE_MODE_MOCA) 1895 pl->link_port = PORT_BNC; 1896 else 1897 pl->link_port = PORT_MII; 1898 pl->link_config.interface = iface; 1899 pl->link_config.pause = MLO_PAUSE_AN; 1900 pl->link_config.speed = SPEED_UNKNOWN; 1901 pl->link_config.duplex = DUPLEX_UNKNOWN; 1902 pl->pcs_state = PCS_STATE_DOWN; 1903 pl->mac_ops = mac_ops; 1904 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1905 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1906 1907 linkmode_fill(pl->supported); 1908 linkmode_copy(pl->link_config.advertising, pl->supported); 1909 phylink_validate(pl, pl->supported, &pl->link_config); 1910 1911 ret = phylink_parse_mode(pl, fwnode); 1912 if (ret < 0) 1913 goto free_pl; 1914 1915 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1916 ret = phylink_parse_fixedlink(pl, fwnode); 1917 if (ret < 0) 1918 goto release_link_gpio; 1919 } 1920 1921 pl->req_link_an_mode = pl->cfg_link_an_mode; 1922 1923 ret = phylink_register_sfp(pl, fwnode); 1924 if (ret < 0) 1925 goto release_link_gpio; 1926 1927 return pl; 1928 1929 release_link_gpio: 1930 if (pl->link_gpio) 1931 gpiod_put(pl->link_gpio); 1932 free_pl: 1933 kfree(pl); 1934 return ERR_PTR(ret); 1935 } 1936 EXPORT_SYMBOL_GPL(phylink_create); 1937 1938 /** 1939 * phylink_destroy() - cleanup and destroy the phylink instance 1940 * @pl: a pointer to a &struct phylink returned from phylink_create() 1941 * 1942 * Destroy a phylink instance. Any PHY that has been attached must have been 1943 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1944 * 1945 * Note: the rtnl lock must not be held when calling this function. 1946 */ 1947 void phylink_destroy(struct phylink *pl) 1948 { 1949 sfp_bus_del_upstream(pl->sfp_bus); 1950 if (pl->link_gpio) 1951 gpiod_put(pl->link_gpio); 1952 1953 cancel_work_sync(&pl->resolve); 1954 kfree(pl); 1955 } 1956 EXPORT_SYMBOL_GPL(phylink_destroy); 1957 1958 /** 1959 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1960 * @pl: a pointer to a &struct phylink returned from phylink_create() 1961 * 1962 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1963 * no PHY is needed. 1964 * 1965 * Returns true if phylink will be expecting a PHY. 1966 */ 1967 bool phylink_expects_phy(struct phylink *pl) 1968 { 1969 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 1970 return false; 1971 return true; 1972 } 1973 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1974 1975 static void phylink_phy_change(struct phy_device *phydev, bool up) 1976 { 1977 struct phylink *pl = phydev->phylink; 1978 bool tx_pause, rx_pause; 1979 1980 phy_get_pause(phydev, &tx_pause, &rx_pause); 1981 1982 mutex_lock(&pl->state_mutex); 1983 pl->phy_state.speed = phydev->speed; 1984 pl->phy_state.duplex = phydev->duplex; 1985 pl->phy_state.rate_matching = phydev->rate_matching; 1986 pl->phy_state.pause = MLO_PAUSE_NONE; 1987 if (tx_pause) 1988 pl->phy_state.pause |= MLO_PAUSE_TX; 1989 if (rx_pause) 1990 pl->phy_state.pause |= MLO_PAUSE_RX; 1991 pl->phy_state.interface = phydev->interface; 1992 pl->phy_state.link = up; 1993 if (!up) 1994 pl->link_failed = true; 1995 1996 /* Get the LPI state from phylib */ 1997 pl->phy_enable_tx_lpi = phydev->enable_tx_lpi; 1998 pl->mac_tx_lpi_timer = phydev->eee_cfg.tx_lpi_timer; 1999 mutex_unlock(&pl->state_mutex); 2000 2001 phylink_run_resolve(pl); 2002 2003 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s/%slpi\n", 2004 up ? "up" : "down", 2005 phy_modes(phydev->interface), 2006 phy_speed_to_str(phydev->speed), 2007 phy_duplex_to_str(phydev->duplex), 2008 phy_rate_matching_to_str(phydev->rate_matching), 2009 phylink_pause_to_str(pl->phy_state.pause), 2010 phydev->enable_tx_lpi ? "" : "no"); 2011 } 2012 2013 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2014 unsigned long *supported, 2015 struct phylink_link_state *state) 2016 { 2017 DECLARE_PHY_INTERFACE_MASK(interfaces); 2018 2019 /* If the PHY provides a bitmap of the interfaces it will be using 2020 * depending on the negotiated media speeds, use this to validate 2021 * which ethtool link modes can be used. 2022 */ 2023 if (!phy_interface_empty(phy->possible_interfaces)) { 2024 /* We only care about the union of the PHY's interfaces and 2025 * those which the host supports. 2026 */ 2027 phy_interface_and(interfaces, phy->possible_interfaces, 2028 pl->config->supported_interfaces); 2029 2030 if (phy_interface_empty(interfaces)) { 2031 phylink_err(pl, "PHY has no common interfaces\n"); 2032 return -EINVAL; 2033 } 2034 2035 if (phy_on_sfp(phy)) { 2036 /* If the PHY is on a SFP, limit the interfaces to 2037 * those that can be used with a SFP module. 2038 */ 2039 phy_interface_and(interfaces, interfaces, 2040 phylink_sfp_interfaces); 2041 2042 if (phy_interface_empty(interfaces)) { 2043 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2044 return -EINVAL; 2045 } 2046 } 2047 2048 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2049 phydev_name(phy), 2050 (int)PHY_INTERFACE_MODE_MAX, 2051 phy->possible_interfaces, 2052 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2053 2054 return phylink_validate_mask(pl, phy, supported, state, 2055 interfaces); 2056 } 2057 2058 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2059 phydev_name(phy)); 2060 2061 /* Check whether we would use rate matching for the proposed interface 2062 * mode. 2063 */ 2064 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2065 2066 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2067 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2068 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2069 * their Serdes is either unnecessary or not reasonable. 2070 * 2071 * For these which switch interface modes, we really need to know which 2072 * interface modes the PHY supports to properly work out which ethtool 2073 * linkmodes can be supported. For now, as a work-around, we validate 2074 * against all interface modes, which may lead to more ethtool link 2075 * modes being advertised than are actually supported. 2076 */ 2077 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2078 state->interface != PHY_INTERFACE_MODE_RXAUI && 2079 state->interface != PHY_INTERFACE_MODE_XAUI && 2080 state->interface != PHY_INTERFACE_MODE_USXGMII) 2081 state->interface = PHY_INTERFACE_MODE_NA; 2082 2083 return phylink_validate(pl, supported, state); 2084 } 2085 2086 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2087 phy_interface_t interface) 2088 { 2089 struct phylink_link_state config; 2090 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2091 char *irq_str; 2092 int ret; 2093 2094 /* 2095 * This is the new way of dealing with flow control for PHYs, 2096 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2097 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 2098 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 2099 * capabilities and must NOT change the phy's pause settings directly. 2100 */ 2101 phy_support_asym_pause(phy); 2102 2103 memset(&config, 0, sizeof(config)); 2104 linkmode_copy(supported, phy->supported); 2105 linkmode_copy(config.advertising, phy->advertising); 2106 config.interface = interface; 2107 2108 ret = phylink_validate_phy(pl, phy, supported, &config); 2109 if (ret) { 2110 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2111 phy_modes(config.interface), 2112 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2113 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2114 ERR_PTR(ret)); 2115 return ret; 2116 } 2117 2118 phy->phylink = pl; 2119 phy->phy_link_change = phylink_phy_change; 2120 2121 irq_str = phy_attached_info_irq(phy); 2122 phylink_info(pl, 2123 "PHY [%s] driver [%s] (irq=%s)\n", 2124 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2125 kfree(irq_str); 2126 2127 mutex_lock(&pl->phydev_mutex); 2128 mutex_lock(&phy->lock); 2129 mutex_lock(&pl->state_mutex); 2130 pl->phydev = phy; 2131 pl->phy_state.interface = interface; 2132 pl->phy_state.pause = MLO_PAUSE_NONE; 2133 pl->phy_state.speed = SPEED_UNKNOWN; 2134 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2135 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2136 linkmode_copy(pl->supported, supported); 2137 linkmode_copy(pl->link_config.advertising, config.advertising); 2138 2139 /* Restrict the phy advertisement according to the MAC support. */ 2140 linkmode_copy(phy->advertising, config.advertising); 2141 2142 /* If the MAC supports phylink managed EEE, restrict the EEE 2143 * advertisement according to the MAC's LPI capabilities. 2144 */ 2145 if (pl->mac_supports_eee) { 2146 /* If EEE is enabled, then we need to call phy_support_eee() 2147 * to ensure that the advertising mask is appropriately set. 2148 * This also enables EEE at the PHY. 2149 */ 2150 if (pl->eee_cfg.eee_enabled) 2151 phy_support_eee(phy); 2152 2153 phy->eee_cfg.tx_lpi_enabled = pl->eee_cfg.tx_lpi_enabled; 2154 phy->eee_cfg.tx_lpi_timer = pl->eee_cfg.tx_lpi_timer; 2155 2156 /* Convert the MAC's LPI capabilities to linkmodes */ 2157 linkmode_zero(pl->supported_lpi); 2158 phylink_caps_to_linkmodes(pl->supported_lpi, 2159 pl->config->lpi_capabilities); 2160 2161 /* Restrict the PHYs EEE support/advertisement to the modes 2162 * that the MAC supports. 2163 */ 2164 linkmode_and(phy->advertising_eee, phy->advertising_eee, 2165 pl->supported_lpi); 2166 } else if (pl->mac_supports_eee_ops) { 2167 /* MAC supports phylink EEE, but wants EEE always disabled. */ 2168 phy_disable_eee(phy); 2169 } 2170 2171 mutex_unlock(&pl->state_mutex); 2172 mutex_unlock(&phy->lock); 2173 mutex_unlock(&pl->phydev_mutex); 2174 2175 phylink_dbg(pl, 2176 "phy: %s setting supported %*pb advertising %*pb\n", 2177 phy_modes(interface), 2178 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2179 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2180 2181 if (pl->config->mac_managed_pm) 2182 phy->mac_managed_pm = true; 2183 2184 /* Allow the MAC to stop its clock if the PHY has the capability */ 2185 pl->mac_tx_clk_stop = phy_eee_tx_clock_stop_capable(phy) > 0; 2186 2187 if (pl->mac_supports_eee_ops) { 2188 /* Explicitly configure whether the PHY is allowed to stop it's 2189 * receive clock. 2190 */ 2191 ret = phy_eee_rx_clock_stop(phy, 2192 pl->config->eee_rx_clk_stop_enable); 2193 if (ret == -EOPNOTSUPP) 2194 ret = 0; 2195 } 2196 2197 if (ret == 0 && phy_interrupt_is_valid(phy)) 2198 phy_request_interrupt(phy); 2199 2200 return ret; 2201 } 2202 2203 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2204 phy_interface_t interface) 2205 { 2206 u32 flags = 0; 2207 2208 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED)) 2209 return -EINVAL; 2210 2211 if (pl->phydev) 2212 return -EBUSY; 2213 2214 if (pl->config->mac_requires_rxc) 2215 flags |= PHY_F_RXC_ALWAYS_ON; 2216 2217 return phy_attach_direct(pl->netdev, phy, flags, interface); 2218 } 2219 2220 /** 2221 * phylink_connect_phy() - connect a PHY to the phylink instance 2222 * @pl: a pointer to a &struct phylink returned from phylink_create() 2223 * @phy: a pointer to a &struct phy_device. 2224 * 2225 * Connect @phy to the phylink instance specified by @pl by calling 2226 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2227 * capabilities, start the PHYLIB state machine and enable any interrupts 2228 * that the PHY supports. 2229 * 2230 * This updates the phylink's ethtool supported and advertising link mode 2231 * masks. 2232 * 2233 * Returns 0 on success or a negative errno. 2234 */ 2235 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2236 { 2237 int ret; 2238 2239 /* Use PHY device/driver interface */ 2240 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2241 pl->link_interface = phy->interface; 2242 pl->link_config.interface = pl->link_interface; 2243 } 2244 2245 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2246 if (ret < 0) 2247 return ret; 2248 2249 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2250 if (ret) 2251 phy_detach(phy); 2252 2253 return ret; 2254 } 2255 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2256 2257 /** 2258 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2259 * @pl: a pointer to a &struct phylink returned from phylink_create() 2260 * @dn: a pointer to a &struct device_node. 2261 * @flags: PHY-specific flags to communicate to the PHY device driver 2262 * 2263 * Connect the phy specified in the device node @dn to the phylink instance 2264 * specified by @pl. Actions specified in phylink_connect_phy() will be 2265 * performed. 2266 * 2267 * Returns 0 on success or a negative errno. 2268 */ 2269 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2270 u32 flags) 2271 { 2272 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2273 } 2274 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2275 2276 /** 2277 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2278 * @pl: a pointer to a &struct phylink returned from phylink_create() 2279 * @fwnode: a pointer to a &struct fwnode_handle. 2280 * @flags: PHY-specific flags to communicate to the PHY device driver 2281 * 2282 * Connect the phy specified @fwnode to the phylink instance specified 2283 * by @pl. 2284 * 2285 * Returns 0 on success or a negative errno. 2286 */ 2287 int phylink_fwnode_phy_connect(struct phylink *pl, 2288 const struct fwnode_handle *fwnode, 2289 u32 flags) 2290 { 2291 struct fwnode_handle *phy_fwnode; 2292 struct phy_device *phy_dev; 2293 int ret; 2294 2295 if (!phylink_expects_phy(pl)) 2296 return 0; 2297 2298 phy_fwnode = fwnode_get_phy_node(fwnode); 2299 if (IS_ERR(phy_fwnode)) { 2300 /* PHY mode requires a PHY to be specified. */ 2301 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2302 return -ENODEV; 2303 return 0; 2304 } 2305 2306 phy_dev = fwnode_phy_find_device(phy_fwnode); 2307 /* We're done with the phy_node handle */ 2308 fwnode_handle_put(phy_fwnode); 2309 if (!phy_dev) 2310 return -ENODEV; 2311 2312 /* Use PHY device/driver interface */ 2313 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2314 pl->link_interface = phy_dev->interface; 2315 pl->link_config.interface = pl->link_interface; 2316 } 2317 2318 if (pl->config->mac_requires_rxc) 2319 flags |= PHY_F_RXC_ALWAYS_ON; 2320 2321 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2322 pl->link_interface); 2323 phy_device_free(phy_dev); 2324 if (ret) 2325 return ret; 2326 2327 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2328 if (ret) 2329 phy_detach(phy_dev); 2330 2331 return ret; 2332 } 2333 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2334 2335 /** 2336 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2337 * instance. 2338 * @pl: a pointer to a &struct phylink returned from phylink_create() 2339 * 2340 * Disconnect any current PHY from the phylink instance described by @pl. 2341 */ 2342 void phylink_disconnect_phy(struct phylink *pl) 2343 { 2344 struct phy_device *phy; 2345 2346 ASSERT_RTNL(); 2347 2348 mutex_lock(&pl->phydev_mutex); 2349 phy = pl->phydev; 2350 if (phy) { 2351 mutex_lock(&phy->lock); 2352 mutex_lock(&pl->state_mutex); 2353 pl->phydev = NULL; 2354 pl->phy_enable_tx_lpi = false; 2355 pl->mac_tx_clk_stop = false; 2356 mutex_unlock(&pl->state_mutex); 2357 mutex_unlock(&phy->lock); 2358 } 2359 mutex_unlock(&pl->phydev_mutex); 2360 2361 if (phy) { 2362 flush_work(&pl->resolve); 2363 phy_disconnect(phy); 2364 } 2365 } 2366 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2367 2368 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2369 { 2370 if (!up) 2371 pl->link_failed = true; 2372 phylink_run_resolve(pl); 2373 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2374 } 2375 2376 /** 2377 * phylink_mac_change() - notify phylink of a change in MAC state 2378 * @pl: a pointer to a &struct phylink returned from phylink_create() 2379 * @up: indicates whether the link is currently up. 2380 * 2381 * The MAC driver should call this driver when the state of its link 2382 * changes (eg, link failure, new negotiation results, etc.) 2383 */ 2384 void phylink_mac_change(struct phylink *pl, bool up) 2385 { 2386 phylink_link_changed(pl, up, "mac"); 2387 } 2388 EXPORT_SYMBOL_GPL(phylink_mac_change); 2389 2390 /** 2391 * phylink_pcs_change() - notify phylink of a change to PCS link state 2392 * @pcs: pointer to &struct phylink_pcs 2393 * @up: indicates whether the link is currently up. 2394 * 2395 * The PCS driver should call this when the state of its link changes 2396 * (e.g. link failure, new negotiation results, etc.) Note: it should 2397 * not determine "up" by reading the BMSR. If in doubt about the link 2398 * state at interrupt time, then pass true if pcs_get_state() returns 2399 * the latched link-down state, otherwise pass false. 2400 */ 2401 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2402 { 2403 struct phylink *pl = pcs->phylink; 2404 2405 if (pl) 2406 phylink_link_changed(pl, up, "pcs"); 2407 } 2408 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2409 2410 static irqreturn_t phylink_link_handler(int irq, void *data) 2411 { 2412 struct phylink *pl = data; 2413 2414 phylink_run_resolve(pl); 2415 2416 return IRQ_HANDLED; 2417 } 2418 2419 /** 2420 * phylink_start() - start a phylink instance 2421 * @pl: a pointer to a &struct phylink returned from phylink_create() 2422 * 2423 * Start the phylink instance specified by @pl, configuring the MAC for the 2424 * desired link mode(s) and negotiation style. This should be called from the 2425 * network device driver's &struct net_device_ops ndo_open() method. 2426 */ 2427 void phylink_start(struct phylink *pl) 2428 { 2429 bool poll = false; 2430 2431 ASSERT_RTNL(); 2432 2433 phylink_info(pl, "configuring for %s/%s link mode\n", 2434 phylink_an_mode_str(pl->req_link_an_mode), 2435 phy_modes(pl->link_config.interface)); 2436 2437 /* Always set the carrier off */ 2438 if (pl->netdev) 2439 netif_carrier_off(pl->netdev); 2440 2441 pl->pcs_state = PCS_STATE_STARTING; 2442 2443 /* Apply the link configuration to the MAC when starting. This allows 2444 * a fixed-link to start with the correct parameters, and also 2445 * ensures that we set the appropriate advertisement for Serdes links. 2446 * 2447 * Restart autonegotiation if using 802.3z to ensure that the link 2448 * parameters are properly negotiated. This is necessary for DSA 2449 * switches using 802.3z negotiation to ensure they see our modes. 2450 */ 2451 phylink_mac_initial_config(pl, true); 2452 2453 pl->pcs_state = PCS_STATE_STARTED; 2454 2455 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2456 2457 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2458 int irq = gpiod_to_irq(pl->link_gpio); 2459 2460 if (irq > 0) { 2461 if (!request_irq(irq, phylink_link_handler, 2462 IRQF_TRIGGER_RISING | 2463 IRQF_TRIGGER_FALLING, 2464 "netdev link", pl)) 2465 pl->link_irq = irq; 2466 else 2467 irq = 0; 2468 } 2469 if (irq <= 0) 2470 poll = true; 2471 } 2472 2473 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2474 poll |= pl->config->poll_fixed_state; 2475 2476 if (poll) 2477 mod_timer(&pl->link_poll, jiffies + HZ); 2478 if (pl->phydev) 2479 phy_start(pl->phydev); 2480 if (pl->sfp_bus) 2481 sfp_upstream_start(pl->sfp_bus); 2482 } 2483 EXPORT_SYMBOL_GPL(phylink_start); 2484 2485 /** 2486 * phylink_stop() - stop a phylink instance 2487 * @pl: a pointer to a &struct phylink returned from phylink_create() 2488 * 2489 * Stop the phylink instance specified by @pl. This should be called from the 2490 * network device driver's &struct net_device_ops ndo_stop() method. The 2491 * network device's carrier state should not be changed prior to calling this 2492 * function. 2493 * 2494 * This will synchronously bring down the link if the link is not already 2495 * down (in other words, it will trigger a mac_link_down() method call.) 2496 */ 2497 void phylink_stop(struct phylink *pl) 2498 { 2499 ASSERT_RTNL(); 2500 2501 if (pl->sfp_bus) 2502 sfp_upstream_stop(pl->sfp_bus); 2503 if (pl->phydev) 2504 phy_stop(pl->phydev); 2505 timer_delete_sync(&pl->link_poll); 2506 if (pl->link_irq) { 2507 free_irq(pl->link_irq, pl); 2508 pl->link_irq = 0; 2509 } 2510 2511 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2512 2513 pl->pcs_state = PCS_STATE_DOWN; 2514 2515 phylink_pcs_disable(pl->pcs); 2516 } 2517 EXPORT_SYMBOL_GPL(phylink_stop); 2518 2519 /** 2520 * phylink_rx_clk_stop_block() - block PHY ability to stop receive clock in LPI 2521 * @pl: a pointer to a &struct phylink returned from phylink_create() 2522 * 2523 * Disable the PHY's ability to stop the receive clock while the receive path 2524 * is in EEE LPI state, until the number of calls to phylink_rx_clk_stop_block() 2525 * are balanced by calls to phylink_rx_clk_stop_unblock(). 2526 */ 2527 void phylink_rx_clk_stop_block(struct phylink *pl) 2528 { 2529 ASSERT_RTNL(); 2530 2531 if (pl->mac_rx_clk_stop_blocked == U8_MAX) { 2532 phylink_warn(pl, "%s called too many times - ignoring\n", 2533 __func__); 2534 dump_stack(); 2535 return; 2536 } 2537 2538 /* Disable PHY receive clock stop if this is the first time this 2539 * function has been called and clock-stop was previously enabled. 2540 */ 2541 if (pl->mac_rx_clk_stop_blocked++ == 0 && 2542 pl->mac_supports_eee_ops && pl->phydev && 2543 pl->config->eee_rx_clk_stop_enable) 2544 phy_eee_rx_clock_stop(pl->phydev, false); 2545 } 2546 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_block); 2547 2548 /** 2549 * phylink_rx_clk_stop_unblock() - unblock PHY ability to stop receive clock 2550 * @pl: a pointer to a &struct phylink returned from phylink_create() 2551 * 2552 * All calls to phylink_rx_clk_stop_block() must be balanced with a 2553 * corresponding call to phylink_rx_clk_stop_unblock() to restore the PHYs 2554 * ability to stop the receive clock when the receive path is in EEE LPI mode. 2555 */ 2556 void phylink_rx_clk_stop_unblock(struct phylink *pl) 2557 { 2558 ASSERT_RTNL(); 2559 2560 if (pl->mac_rx_clk_stop_blocked == 0) { 2561 phylink_warn(pl, "%s called too many times - ignoring\n", 2562 __func__); 2563 dump_stack(); 2564 return; 2565 } 2566 2567 /* Re-enable PHY receive clock stop if the number of unblocks matches 2568 * the number of calls to the block function above. 2569 */ 2570 if (--pl->mac_rx_clk_stop_blocked == 0 && 2571 pl->mac_supports_eee_ops && pl->phydev && 2572 pl->config->eee_rx_clk_stop_enable) 2573 phy_eee_rx_clock_stop(pl->phydev, true); 2574 } 2575 EXPORT_SYMBOL_GPL(phylink_rx_clk_stop_unblock); 2576 2577 static bool phylink_mac_supports_wol(struct phylink *pl) 2578 { 2579 return !!pl->mac_ops->mac_wol_set; 2580 } 2581 2582 static bool phylink_phy_supports_wol(struct phylink *pl, 2583 struct phy_device *phydev) 2584 { 2585 return phydev && (pl->config->wol_phy_legacy || phy_can_wakeup(phydev)); 2586 } 2587 2588 static bool phylink_phy_pm_speed_ctrl(struct phylink *pl) 2589 { 2590 return pl->config->wol_phy_speed_ctrl && !pl->wolopts_mac && 2591 pl->phydev && phy_may_wakeup(pl->phydev); 2592 } 2593 2594 /** 2595 * phylink_suspend() - handle a network device suspend event 2596 * @pl: a pointer to a &struct phylink returned from phylink_create() 2597 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2598 * 2599 * Handle a network device suspend event. There are several cases: 2600 * 2601 * - If Wake-on-Lan is not active, we can bring down the link between 2602 * the MAC and PHY by calling phylink_stop(). 2603 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2604 * can also bring down the link between the MAC and PHY. 2605 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2606 * still needs to receive packets, so we can not bring the link down. 2607 * 2608 * Note: when phylink managed Wake-on-Lan is in use, @mac_wol is ignored. 2609 * (struct phylink_mac_ops.mac_set_wol populated.) 2610 */ 2611 void phylink_suspend(struct phylink *pl, bool mac_wol) 2612 { 2613 ASSERT_RTNL(); 2614 2615 if (phylink_mac_supports_wol(pl)) 2616 mac_wol = !!pl->wolopts_mac; 2617 2618 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2619 /* Wake-on-Lan enabled, MAC handling */ 2620 mutex_lock(&pl->state_mutex); 2621 2622 /* Stop the resolver bringing the link up */ 2623 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2624 2625 pl->suspend_link_up = phylink_link_is_up(pl); 2626 if (pl->suspend_link_up) { 2627 /* Disable the carrier, to prevent transmit timeouts, 2628 * but one would hope all packets have been sent. This 2629 * also means phylink_resolve() will do nothing. 2630 */ 2631 if (pl->netdev) 2632 netif_carrier_off(pl->netdev); 2633 pl->old_link_state = false; 2634 } 2635 2636 /* We do not call mac_link_down() here as we want the 2637 * link to remain up to receive the WoL packets. 2638 */ 2639 mutex_unlock(&pl->state_mutex); 2640 } else { 2641 phylink_stop(pl); 2642 } 2643 2644 if (phylink_phy_pm_speed_ctrl(pl)) 2645 phylink_speed_down(pl, false); 2646 } 2647 EXPORT_SYMBOL_GPL(phylink_suspend); 2648 2649 /** 2650 * phylink_prepare_resume() - prepare to resume a network device 2651 * @pl: a pointer to a &struct phylink returned from phylink_create() 2652 * 2653 * Optional, but if called must be called prior to phylink_resume(). 2654 * 2655 * Prepare to resume a network device, preparing the PHY as necessary. 2656 */ 2657 void phylink_prepare_resume(struct phylink *pl) 2658 { 2659 struct phy_device *phydev = pl->phydev; 2660 2661 ASSERT_RTNL(); 2662 2663 /* IEEE 802.3 22.2.4.1.5 allows PHYs to stop their receive clock 2664 * when PDOWN is set. However, some MACs require RXC to be running 2665 * in order to resume. If the MAC requires RXC, and we have a PHY, 2666 * then resume the PHY. Note that 802.3 allows PHYs 500ms before 2667 * the clock meets requirements. We do not implement this delay. 2668 */ 2669 if (pl->config->mac_requires_rxc && phydev && phydev->suspended) 2670 phy_resume(phydev); 2671 } 2672 EXPORT_SYMBOL_GPL(phylink_prepare_resume); 2673 2674 /** 2675 * phylink_resume() - handle a network device resume event 2676 * @pl: a pointer to a &struct phylink returned from phylink_create() 2677 * 2678 * Undo the effects of phylink_suspend(), returning the link to an 2679 * operational state. 2680 */ 2681 void phylink_resume(struct phylink *pl) 2682 { 2683 ASSERT_RTNL(); 2684 2685 if (phylink_phy_pm_speed_ctrl(pl)) 2686 phylink_speed_up(pl); 2687 2688 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2689 /* Wake-on-Lan enabled, MAC handling */ 2690 2691 if (pl->suspend_link_up) { 2692 /* Call mac_link_down() so we keep the overall state 2693 * balanced. Do this under the state_mutex lock for 2694 * consistency. This will cause a "Link Down" message 2695 * to be printed during resume, which is harmless - 2696 * the true link state will be printed when we run a 2697 * resolve. 2698 */ 2699 mutex_lock(&pl->state_mutex); 2700 phylink_link_down(pl); 2701 mutex_unlock(&pl->state_mutex); 2702 } 2703 2704 /* Re-apply the link parameters so that all the settings get 2705 * restored to the MAC. 2706 */ 2707 phylink_mac_initial_config(pl, true); 2708 2709 /* Re-enable and re-resolve the link parameters */ 2710 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2711 } else { 2712 phylink_start(pl); 2713 } 2714 } 2715 EXPORT_SYMBOL_GPL(phylink_resume); 2716 2717 /** 2718 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2719 * @pl: a pointer to a &struct phylink returned from phylink_create() 2720 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2721 * 2722 * Read the wake on lan parameters from the PHY attached to the phylink 2723 * instance specified by @pl. If no PHY is currently attached, report no 2724 * support for wake on lan. 2725 */ 2726 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2727 { 2728 ASSERT_RTNL(); 2729 2730 wol->supported = 0; 2731 wol->wolopts = 0; 2732 2733 if (phylink_mac_supports_wol(pl)) { 2734 if (phylink_phy_supports_wol(pl, pl->phydev)) 2735 phy_ethtool_get_wol(pl->phydev, wol); 2736 2737 /* Where the MAC augments the WoL support, merge its support and 2738 * current configuration. 2739 */ 2740 if (~wol->wolopts & pl->wolopts_mac & WAKE_MAGICSECURE) 2741 memcpy(wol->sopass, pl->wol_sopass, 2742 sizeof(wol->sopass)); 2743 2744 wol->supported |= pl->config->wol_mac_support; 2745 wol->wolopts |= pl->wolopts_mac; 2746 } else { 2747 /* Legacy */ 2748 if (pl->phydev) 2749 phy_ethtool_get_wol(pl->phydev, wol); 2750 } 2751 } 2752 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2753 2754 /** 2755 * phylink_ethtool_set_wol() - set wake on lan parameters 2756 * @pl: a pointer to a &struct phylink returned from phylink_create() 2757 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2758 * 2759 * Set the wake on lan parameters for the PHY attached to the phylink 2760 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2761 * error. 2762 * 2763 * Returns zero on success or negative errno code. 2764 */ 2765 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2766 { 2767 struct ethtool_wolinfo w = { .cmd = ETHTOOL_GWOL }; 2768 int ret = -EOPNOTSUPP; 2769 bool changed; 2770 u32 wolopts; 2771 2772 ASSERT_RTNL(); 2773 2774 if (phylink_mac_supports_wol(pl)) { 2775 wolopts = wol->wolopts; 2776 2777 if (phylink_phy_supports_wol(pl, pl->phydev)) { 2778 ret = phy_ethtool_set_wol(pl->phydev, wol); 2779 if (ret != 0 && ret != -EOPNOTSUPP) 2780 return ret; 2781 2782 phy_ethtool_get_wol(pl->phydev, &w); 2783 2784 /* Any Wake-on-Lan modes which the PHY is handling 2785 * should not be passed on to the MAC. 2786 */ 2787 wolopts &= ~w.wolopts; 2788 } 2789 2790 wolopts &= pl->config->wol_mac_support; 2791 changed = pl->wolopts_mac != wolopts; 2792 if (wolopts & WAKE_MAGICSECURE) 2793 changed |= !!memcmp(wol->sopass, pl->wol_sopass, 2794 sizeof(wol->sopass)); 2795 memcpy(pl->wol_sopass, wol->sopass, sizeof(pl->wol_sopass)); 2796 2797 if (changed) { 2798 ret = pl->mac_ops->mac_wol_set(pl->config, wolopts, 2799 wol->sopass); 2800 if (!ret) 2801 pl->wolopts_mac = wolopts; 2802 } else { 2803 ret = 0; 2804 } 2805 } else { 2806 if (pl->phydev) 2807 ret = phy_ethtool_set_wol(pl->phydev, wol); 2808 } 2809 2810 return ret; 2811 } 2812 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2813 2814 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2815 const unsigned long *link_modes) 2816 { 2817 phy_interface_t interface; 2818 2819 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2820 if (interface == PHY_INTERFACE_MODE_NA) { 2821 phylink_err(pl, 2822 "selection of interface failed, advertisement %*pb\n", 2823 __ETHTOOL_LINK_MODE_MASK_NBITS, 2824 link_modes); 2825 return interface; 2826 } 2827 2828 if (!test_bit(interface, pl->config->supported_interfaces)) { 2829 phylink_err(pl, 2830 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2831 phy_modes(interface), interface, 2832 (int)PHY_INTERFACE_MODE_MAX, 2833 pl->config->supported_interfaces); 2834 return PHY_INTERFACE_MODE_NA; 2835 } 2836 2837 return interface; 2838 } 2839 2840 static phy_interface_t phylink_sfp_select_interface_speed(struct phylink *pl, 2841 u32 speed) 2842 { 2843 phy_interface_t best_interface = PHY_INTERFACE_MODE_NA; 2844 phy_interface_t interface; 2845 u32 max_speed; 2846 int i; 2847 2848 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) { 2849 interface = phylink_sfp_interface_preference[i]; 2850 if (!test_bit(interface, pl->sfp_interfaces)) 2851 continue; 2852 2853 max_speed = phylink_interface_max_speed(interface); 2854 2855 /* The logic here is: if speed == max_speed, then we've found 2856 * the best interface. Otherwise we find the interface that 2857 * can just support the requested speed. 2858 */ 2859 if (max_speed >= speed) 2860 best_interface = interface; 2861 2862 if (max_speed <= speed) 2863 break; 2864 } 2865 2866 if (best_interface == PHY_INTERFACE_MODE_NA) 2867 phylink_err(pl, "selection of interface failed, speed %u\n", 2868 speed); 2869 2870 return best_interface; 2871 } 2872 2873 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2874 { 2875 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2876 2877 linkmode_zero(mask); 2878 phylink_set_port_modes(mask); 2879 2880 linkmode_and(dst, dst, mask); 2881 linkmode_or(dst, dst, b); 2882 } 2883 2884 static void phylink_get_ksettings(const struct phylink_link_state *state, 2885 struct ethtool_link_ksettings *kset) 2886 { 2887 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2888 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2889 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2890 kset->base.speed = state->speed; 2891 kset->base.duplex = state->duplex; 2892 } 2893 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2894 state->advertising) ? 2895 AUTONEG_ENABLE : AUTONEG_DISABLE; 2896 } 2897 2898 /** 2899 * phylink_ethtool_ksettings_get() - get the current link settings 2900 * @pl: a pointer to a &struct phylink returned from phylink_create() 2901 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2902 * 2903 * Read the current link settings for the phylink instance specified by @pl. 2904 * This will be the link settings read from the MAC, PHY or fixed link 2905 * settings depending on the current negotiation mode. 2906 */ 2907 int phylink_ethtool_ksettings_get(struct phylink *pl, 2908 struct ethtool_link_ksettings *kset) 2909 { 2910 struct phylink_link_state link_state; 2911 2912 ASSERT_RTNL(); 2913 2914 if (pl->phydev) 2915 phy_ethtool_ksettings_get(pl->phydev, kset); 2916 else 2917 kset->base.port = pl->link_port; 2918 2919 linkmode_copy(kset->link_modes.supported, pl->supported); 2920 2921 switch (pl->act_link_an_mode) { 2922 case MLO_AN_FIXED: 2923 /* We are using fixed settings. Report these as the 2924 * current link settings - and note that these also 2925 * represent the supported speeds/duplex/pause modes. 2926 */ 2927 phylink_get_fixed_state(pl, &link_state); 2928 phylink_get_ksettings(&link_state, kset); 2929 break; 2930 2931 case MLO_AN_INBAND: 2932 /* If there is a phy attached, then use the reported 2933 * settings from the phy with no modification. 2934 */ 2935 if (pl->phydev) 2936 break; 2937 2938 phylink_mac_pcs_get_state(pl, &link_state); 2939 2940 /* The MAC is reporting the link results from its own PCS 2941 * layer via in-band status. Report these as the current 2942 * link settings. 2943 */ 2944 phylink_get_ksettings(&link_state, kset); 2945 break; 2946 } 2947 2948 return 0; 2949 } 2950 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2951 2952 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2953 phy_interface_t interface, 2954 unsigned long *adv) 2955 { 2956 unsigned int inband = phylink_inband_caps(pl, interface); 2957 unsigned int mask; 2958 2959 /* If the PCS doesn't implement inband support, be permissive. */ 2960 if (!inband) 2961 return true; 2962 2963 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2964 mask = LINK_INBAND_ENABLE; 2965 else 2966 mask = LINK_INBAND_DISABLE; 2967 2968 /* Check whether the PCS implements the required mode */ 2969 return !!(inband & mask); 2970 } 2971 2972 /** 2973 * phylink_ethtool_ksettings_set() - set the link settings 2974 * @pl: a pointer to a &struct phylink returned from phylink_create() 2975 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2976 */ 2977 int phylink_ethtool_ksettings_set(struct phylink *pl, 2978 const struct ethtool_link_ksettings *kset) 2979 { 2980 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2981 const struct link_capabilities *c; 2982 struct phylink_link_state config; 2983 2984 ASSERT_RTNL(); 2985 2986 if (pl->phydev) { 2987 struct ethtool_link_ksettings phy_kset = *kset; 2988 2989 linkmode_and(phy_kset.link_modes.advertising, 2990 phy_kset.link_modes.advertising, 2991 pl->supported); 2992 2993 /* We can rely on phylib for this update; we also do not need 2994 * to update the pl->link_config settings: 2995 * - the configuration returned via ksettings_get() will come 2996 * from phylib whenever a PHY is present. 2997 * - link_config.interface will be updated by the PHY calling 2998 * back via phylink_phy_change() and a subsequent resolve. 2999 * - initial link configuration for PHY mode comes from the 3000 * last phy state updated via phylink_phy_change(). 3001 * - other configuration changes (e.g. pause modes) are 3002 * performed directly via phylib. 3003 * - if in in-band mode with a PHY, the link configuration 3004 * is passed on the link from the PHY, and all of 3005 * link_config.{speed,duplex,an_enabled,pause} are not used. 3006 * - the only possible use would be link_config.advertising 3007 * pause modes when in 1000base-X mode with a PHY, but in 3008 * the presence of a PHY, this should not be changed as that 3009 * should be determined from the media side advertisement. 3010 */ 3011 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 3012 } 3013 3014 config = pl->link_config; 3015 /* Mask out unsupported advertisements */ 3016 linkmode_and(config.advertising, kset->link_modes.advertising, 3017 pl->supported); 3018 3019 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 3020 switch (kset->base.autoneg) { 3021 case AUTONEG_DISABLE: 3022 /* Autonegotiation disabled, select a suitable speed and 3023 * duplex. 3024 */ 3025 c = phy_caps_lookup(kset->base.speed, kset->base.duplex, 3026 pl->supported, false); 3027 if (!c) 3028 return -EINVAL; 3029 3030 /* If we have a fixed link, refuse to change link parameters. 3031 * If the link parameters match, accept them but do nothing. 3032 */ 3033 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3034 if (c->speed != pl->link_config.speed || 3035 c->duplex != pl->link_config.duplex) 3036 return -EINVAL; 3037 return 0; 3038 } 3039 3040 config.speed = c->speed; 3041 config.duplex = c->duplex; 3042 break; 3043 3044 case AUTONEG_ENABLE: 3045 /* If we have a fixed link, allow autonegotiation (since that 3046 * is our default case) but do not allow the advertisement to 3047 * be changed. If the advertisement matches, simply return. 3048 */ 3049 if (pl->req_link_an_mode == MLO_AN_FIXED) { 3050 if (!linkmode_equal(config.advertising, 3051 pl->link_config.advertising)) 3052 return -EINVAL; 3053 return 0; 3054 } 3055 3056 config.speed = SPEED_UNKNOWN; 3057 config.duplex = DUPLEX_UNKNOWN; 3058 break; 3059 3060 default: 3061 return -EINVAL; 3062 } 3063 3064 /* We have ruled out the case with a PHY attached, and the 3065 * fixed-link cases. All that is left are in-band links. 3066 */ 3067 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 3068 kset->base.autoneg == AUTONEG_ENABLE); 3069 3070 /* If this link is with an SFP, ensure that changes to advertised modes 3071 * also cause the associated interface to be selected such that the 3072 * link can be configured correctly. 3073 */ 3074 if (pl->sfp_bus) { 3075 if (kset->base.autoneg == AUTONEG_ENABLE) 3076 config.interface = 3077 phylink_sfp_select_interface(pl, 3078 config.advertising); 3079 else 3080 config.interface = 3081 phylink_sfp_select_interface_speed(pl, 3082 config.speed); 3083 if (config.interface == PHY_INTERFACE_MODE_NA) 3084 return -EINVAL; 3085 3086 /* Revalidate with the selected interface */ 3087 linkmode_copy(support, pl->supported); 3088 if (phylink_validate(pl, support, &config)) { 3089 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 3090 phylink_an_mode_str(pl->req_link_an_mode), 3091 phy_modes(config.interface), 3092 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3093 return -EINVAL; 3094 } 3095 } else { 3096 /* Validate without changing the current supported mask. */ 3097 linkmode_copy(support, pl->supported); 3098 if (phylink_validate(pl, support, &config)) 3099 return -EINVAL; 3100 } 3101 3102 /* If autonegotiation is enabled, we must have an advertisement */ 3103 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3104 config.advertising) && 3105 phylink_is_empty_linkmode(config.advertising)) 3106 return -EINVAL; 3107 3108 /* Validate the autonegotiation state. We don't have a PHY in this 3109 * situation, so the PCS is the media-facing entity. 3110 */ 3111 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 3112 config.advertising)) 3113 return -EINVAL; 3114 3115 mutex_lock(&pl->state_mutex); 3116 pl->link_config.speed = config.speed; 3117 pl->link_config.duplex = config.duplex; 3118 3119 if (pl->link_config.interface != config.interface) { 3120 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 3121 /* We need to force the link down, then change the interface */ 3122 if (pl->old_link_state) { 3123 phylink_link_down(pl); 3124 pl->old_link_state = false; 3125 } 3126 if (!test_bit(PHYLINK_DISABLE_STOPPED, 3127 &pl->phylink_disable_state)) 3128 phylink_major_config(pl, false, &config); 3129 pl->link_config.interface = config.interface; 3130 linkmode_copy(pl->link_config.advertising, config.advertising); 3131 } else if (!linkmode_equal(pl->link_config.advertising, 3132 config.advertising)) { 3133 linkmode_copy(pl->link_config.advertising, config.advertising); 3134 phylink_change_inband_advert(pl); 3135 } 3136 mutex_unlock(&pl->state_mutex); 3137 3138 return 0; 3139 } 3140 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 3141 3142 /** 3143 * phylink_ethtool_nway_reset() - restart negotiation 3144 * @pl: a pointer to a &struct phylink returned from phylink_create() 3145 * 3146 * Restart negotiation for the phylink instance specified by @pl. This will 3147 * cause any attached phy to restart negotiation with the link partner, and 3148 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 3149 * negotiation. 3150 * 3151 * Returns zero on success, or negative error code. 3152 */ 3153 int phylink_ethtool_nway_reset(struct phylink *pl) 3154 { 3155 int ret = 0; 3156 3157 ASSERT_RTNL(); 3158 3159 if (pl->phydev) 3160 ret = phy_restart_aneg(pl->phydev); 3161 phylink_pcs_an_restart(pl); 3162 3163 return ret; 3164 } 3165 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 3166 3167 /** 3168 * phylink_ethtool_get_pauseparam() - get the current pause parameters 3169 * @pl: a pointer to a &struct phylink returned from phylink_create() 3170 * @pause: a pointer to a &struct ethtool_pauseparam 3171 */ 3172 void phylink_ethtool_get_pauseparam(struct phylink *pl, 3173 struct ethtool_pauseparam *pause) 3174 { 3175 ASSERT_RTNL(); 3176 3177 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 3178 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 3179 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 3180 } 3181 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 3182 3183 /** 3184 * phylink_ethtool_set_pauseparam() - set the current pause parameters 3185 * @pl: a pointer to a &struct phylink returned from phylink_create() 3186 * @pause: a pointer to a &struct ethtool_pauseparam 3187 */ 3188 int phylink_ethtool_set_pauseparam(struct phylink *pl, 3189 struct ethtool_pauseparam *pause) 3190 { 3191 struct phylink_link_state *config = &pl->link_config; 3192 bool manual_changed; 3193 int pause_state; 3194 3195 ASSERT_RTNL(); 3196 3197 if (pl->req_link_an_mode == MLO_AN_FIXED) 3198 return -EOPNOTSUPP; 3199 3200 if (!phylink_test(pl->supported, Pause) && 3201 !phylink_test(pl->supported, Asym_Pause)) 3202 return -EOPNOTSUPP; 3203 3204 if (!phylink_test(pl->supported, Asym_Pause) && 3205 pause->rx_pause != pause->tx_pause) 3206 return -EINVAL; 3207 3208 pause_state = 0; 3209 if (pause->autoneg) 3210 pause_state |= MLO_PAUSE_AN; 3211 if (pause->rx_pause) 3212 pause_state |= MLO_PAUSE_RX; 3213 if (pause->tx_pause) 3214 pause_state |= MLO_PAUSE_TX; 3215 3216 mutex_lock(&pl->state_mutex); 3217 /* 3218 * See the comments for linkmode_set_pause(), wrt the deficiencies 3219 * with the current implementation. A solution to this issue would 3220 * be: 3221 * ethtool Local device 3222 * rx tx Pause AsymDir 3223 * 0 0 0 0 3224 * 1 0 1 1 3225 * 0 1 0 1 3226 * 1 1 1 1 3227 * and then use the ethtool rx/tx enablement status to mask the 3228 * rx/tx pause resolution. 3229 */ 3230 linkmode_set_pause(config->advertising, pause->tx_pause, 3231 pause->rx_pause); 3232 3233 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 3234 (!(pause_state & MLO_PAUSE_AN) && 3235 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 3236 3237 config->pause = pause_state; 3238 3239 /* Update our in-band advertisement, triggering a renegotiation if 3240 * the advertisement changed. 3241 */ 3242 if (!pl->phydev) 3243 phylink_change_inband_advert(pl); 3244 3245 mutex_unlock(&pl->state_mutex); 3246 3247 /* If we have a PHY, a change of the pause frame advertisement will 3248 * cause phylib to renegotiate (if AN is enabled) which will in turn 3249 * call our phylink_phy_change() and trigger a resolve. Note that 3250 * we can't hold our state mutex while calling phy_set_asym_pause(). 3251 */ 3252 if (pl->phydev) 3253 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3254 pause->tx_pause); 3255 3256 /* If the manual pause settings changed, make sure we trigger a 3257 * resolve to update their state; we can not guarantee that the 3258 * link will cycle. 3259 */ 3260 if (manual_changed) { 3261 pl->link_failed = true; 3262 phylink_run_resolve(pl); 3263 } 3264 3265 return 0; 3266 } 3267 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3268 3269 /** 3270 * phylink_get_eee_err() - read the energy efficient ethernet error 3271 * counter 3272 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3273 * 3274 * Read the Energy Efficient Ethernet error counter from the PHY associated 3275 * with the phylink instance specified by @pl. 3276 * 3277 * Returns positive error counter value, or negative error code. 3278 */ 3279 int phylink_get_eee_err(struct phylink *pl) 3280 { 3281 int ret = 0; 3282 3283 ASSERT_RTNL(); 3284 3285 if (pl->phydev) 3286 ret = phy_get_eee_err(pl->phydev); 3287 3288 return ret; 3289 } 3290 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3291 3292 /** 3293 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3294 * @pl: a pointer to a &struct phylink returned from phylink_create() 3295 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3296 */ 3297 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3298 { 3299 int ret = -EOPNOTSUPP; 3300 3301 ASSERT_RTNL(); 3302 3303 if (pl->mac_supports_eee_ops && !pl->mac_supports_eee) 3304 return ret; 3305 3306 if (pl->phydev) { 3307 ret = phy_ethtool_get_eee(pl->phydev, eee); 3308 /* Restrict supported linkmode mask */ 3309 if (ret == 0 && pl->mac_supports_eee_ops) 3310 linkmode_and(eee->supported, eee->supported, 3311 pl->supported_lpi); 3312 } 3313 3314 return ret; 3315 } 3316 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3317 3318 /** 3319 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3320 * @pl: a pointer to a &struct phylink returned from phylink_create() 3321 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3322 */ 3323 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3324 { 3325 bool mac_eee = pl->mac_supports_eee; 3326 int ret = -EOPNOTSUPP; 3327 3328 ASSERT_RTNL(); 3329 3330 phylink_dbg(pl, "mac %s phylink EEE%s, adv %*pbl, LPI%s timer %uus\n", 3331 mac_eee ? "supports" : "does not support", 3332 eee->eee_enabled ? ", enabled" : "", 3333 __ETHTOOL_LINK_MODE_MASK_NBITS, eee->advertised, 3334 eee->tx_lpi_enabled ? " enabled" : "", eee->tx_lpi_timer); 3335 3336 if (pl->mac_supports_eee_ops && !mac_eee) 3337 return ret; 3338 3339 if (pl->phydev) { 3340 /* Restrict advertisement mask */ 3341 if (pl->mac_supports_eee_ops) 3342 linkmode_and(eee->advertised, eee->advertised, 3343 pl->supported_lpi); 3344 ret = phy_ethtool_set_eee(pl->phydev, eee); 3345 if (ret == 0) 3346 eee_to_eeecfg(&pl->eee_cfg, eee); 3347 } 3348 3349 return ret; 3350 } 3351 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3352 3353 /* This emulates MII registers for a fixed-mode phy operating as per the 3354 * passed in state. "aneg" defines if we report negotiation is possible. 3355 * 3356 * FIXME: should deal with negotiation state too. 3357 */ 3358 static int phylink_mii_emul_read(unsigned int reg, 3359 struct phylink_link_state *state) 3360 { 3361 struct fixed_phy_status fs; 3362 unsigned long *lpa = state->lp_advertising; 3363 int val; 3364 3365 fs.link = state->link; 3366 fs.speed = state->speed; 3367 fs.duplex = state->duplex; 3368 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3369 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3370 3371 val = swphy_read_reg(reg, &fs); 3372 if (reg == MII_BMSR) { 3373 if (!state->an_complete) 3374 val &= ~BMSR_ANEGCOMPLETE; 3375 } 3376 return val; 3377 } 3378 3379 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3380 unsigned int reg) 3381 { 3382 struct phy_device *phydev = pl->phydev; 3383 int prtad, devad; 3384 3385 if (mdio_phy_id_is_c45(phy_id)) { 3386 prtad = mdio_phy_id_prtad(phy_id); 3387 devad = mdio_phy_id_devad(phy_id); 3388 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3389 reg); 3390 } 3391 3392 if (phydev->is_c45) { 3393 switch (reg) { 3394 case MII_BMCR: 3395 case MII_BMSR: 3396 case MII_PHYSID1: 3397 case MII_PHYSID2: 3398 devad = __ffs(phydev->c45_ids.mmds_present); 3399 break; 3400 case MII_ADVERTISE: 3401 case MII_LPA: 3402 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3403 return -EINVAL; 3404 devad = MDIO_MMD_AN; 3405 if (reg == MII_ADVERTISE) 3406 reg = MDIO_AN_ADVERTISE; 3407 else 3408 reg = MDIO_AN_LPA; 3409 break; 3410 default: 3411 return -EINVAL; 3412 } 3413 prtad = phy_id; 3414 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3415 reg); 3416 } 3417 3418 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3419 } 3420 3421 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3422 unsigned int reg, unsigned int val) 3423 { 3424 struct phy_device *phydev = pl->phydev; 3425 int prtad, devad; 3426 3427 if (mdio_phy_id_is_c45(phy_id)) { 3428 prtad = mdio_phy_id_prtad(phy_id); 3429 devad = mdio_phy_id_devad(phy_id); 3430 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3431 reg, val); 3432 } 3433 3434 if (phydev->is_c45) { 3435 switch (reg) { 3436 case MII_BMCR: 3437 case MII_BMSR: 3438 case MII_PHYSID1: 3439 case MII_PHYSID2: 3440 devad = __ffs(phydev->c45_ids.mmds_present); 3441 break; 3442 case MII_ADVERTISE: 3443 case MII_LPA: 3444 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3445 return -EINVAL; 3446 devad = MDIO_MMD_AN; 3447 if (reg == MII_ADVERTISE) 3448 reg = MDIO_AN_ADVERTISE; 3449 else 3450 reg = MDIO_AN_LPA; 3451 break; 3452 default: 3453 return -EINVAL; 3454 } 3455 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3456 reg, val); 3457 } 3458 3459 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3460 } 3461 3462 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3463 unsigned int reg) 3464 { 3465 struct phylink_link_state state; 3466 int val = 0xffff; 3467 3468 switch (pl->act_link_an_mode) { 3469 case MLO_AN_FIXED: 3470 if (phy_id == 0) { 3471 phylink_get_fixed_state(pl, &state); 3472 val = phylink_mii_emul_read(reg, &state); 3473 } 3474 break; 3475 3476 case MLO_AN_PHY: 3477 return -EOPNOTSUPP; 3478 3479 case MLO_AN_INBAND: 3480 if (phy_id == 0) { 3481 phylink_mac_pcs_get_state(pl, &state); 3482 val = phylink_mii_emul_read(reg, &state); 3483 } 3484 break; 3485 } 3486 3487 return val & 0xffff; 3488 } 3489 3490 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3491 unsigned int reg, unsigned int val) 3492 { 3493 switch (pl->act_link_an_mode) { 3494 case MLO_AN_FIXED: 3495 break; 3496 3497 case MLO_AN_PHY: 3498 return -EOPNOTSUPP; 3499 3500 case MLO_AN_INBAND: 3501 break; 3502 } 3503 3504 return 0; 3505 } 3506 3507 /** 3508 * phylink_mii_ioctl() - generic mii ioctl interface 3509 * @pl: a pointer to a &struct phylink returned from phylink_create() 3510 * @ifr: a pointer to a &struct ifreq for socket ioctls 3511 * @cmd: ioctl cmd to execute 3512 * 3513 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3514 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3515 * 3516 * Returns: zero on success or negative error code. 3517 * 3518 * %SIOCGMIIPHY: 3519 * read register from the current PHY. 3520 * %SIOCGMIIREG: 3521 * read register from the specified PHY. 3522 * %SIOCSMIIREG: 3523 * set a register on the specified PHY. 3524 */ 3525 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3526 { 3527 struct mii_ioctl_data *mii = if_mii(ifr); 3528 int ret; 3529 3530 ASSERT_RTNL(); 3531 3532 if (pl->phydev) { 3533 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3534 switch (cmd) { 3535 case SIOCGMIIPHY: 3536 mii->phy_id = pl->phydev->mdio.addr; 3537 fallthrough; 3538 3539 case SIOCGMIIREG: 3540 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3541 if (ret >= 0) { 3542 mii->val_out = ret; 3543 ret = 0; 3544 } 3545 break; 3546 3547 case SIOCSMIIREG: 3548 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3549 mii->val_in); 3550 break; 3551 3552 default: 3553 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3554 break; 3555 } 3556 } else { 3557 switch (cmd) { 3558 case SIOCGMIIPHY: 3559 mii->phy_id = 0; 3560 fallthrough; 3561 3562 case SIOCGMIIREG: 3563 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3564 if (ret >= 0) { 3565 mii->val_out = ret; 3566 ret = 0; 3567 } 3568 break; 3569 3570 case SIOCSMIIREG: 3571 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3572 mii->val_in); 3573 break; 3574 3575 default: 3576 ret = -EOPNOTSUPP; 3577 break; 3578 } 3579 } 3580 3581 return ret; 3582 } 3583 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3584 3585 /** 3586 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3587 * link partners 3588 * @pl: a pointer to a &struct phylink returned from phylink_create() 3589 * @sync: perform action synchronously 3590 * 3591 * If we have a PHY that is not part of a SFP module, then set the speed 3592 * as described in the phy_speed_down() function. Please see this function 3593 * for a description of the @sync parameter. 3594 * 3595 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3596 */ 3597 int phylink_speed_down(struct phylink *pl, bool sync) 3598 { 3599 int ret = 0; 3600 3601 ASSERT_RTNL(); 3602 3603 if (!pl->sfp_bus && pl->phydev) 3604 ret = phy_speed_down(pl->phydev, sync); 3605 3606 return ret; 3607 } 3608 EXPORT_SYMBOL_GPL(phylink_speed_down); 3609 3610 /** 3611 * phylink_speed_up() - restore the advertised speeds prior to the call to 3612 * phylink_speed_down() 3613 * @pl: a pointer to a &struct phylink returned from phylink_create() 3614 * 3615 * If we have a PHY that is not part of a SFP module, then restore the 3616 * PHY speeds as per phy_speed_up(). 3617 * 3618 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3619 */ 3620 int phylink_speed_up(struct phylink *pl) 3621 { 3622 int ret = 0; 3623 3624 ASSERT_RTNL(); 3625 3626 if (!pl->sfp_bus && pl->phydev) 3627 ret = phy_speed_up(pl->phydev); 3628 3629 return ret; 3630 } 3631 EXPORT_SYMBOL_GPL(phylink_speed_up); 3632 3633 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3634 { 3635 struct phylink *pl = upstream; 3636 3637 pl->netdev->sfp_bus = bus; 3638 } 3639 3640 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3641 { 3642 struct phylink *pl = upstream; 3643 3644 pl->netdev->sfp_bus = NULL; 3645 } 3646 3647 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3648 const unsigned long *intf) 3649 { 3650 phy_interface_t interface; 3651 size_t i; 3652 3653 interface = PHY_INTERFACE_MODE_NA; 3654 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3655 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3656 interface = phylink_sfp_interface_preference[i]; 3657 break; 3658 } 3659 3660 return interface; 3661 } 3662 3663 static void phylink_sfp_set_config(struct phylink *pl, unsigned long *supported, 3664 struct phylink_link_state *state, 3665 bool changed) 3666 { 3667 u8 mode = MLO_AN_INBAND; 3668 3669 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3670 phylink_an_mode_str(mode), phy_modes(state->interface), 3671 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3672 3673 if (!linkmode_equal(pl->supported, supported)) { 3674 linkmode_copy(pl->supported, supported); 3675 changed = true; 3676 } 3677 3678 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3679 linkmode_copy(pl->link_config.advertising, state->advertising); 3680 changed = true; 3681 } 3682 3683 if (pl->req_link_an_mode != mode || 3684 pl->link_config.interface != state->interface) { 3685 pl->req_link_an_mode = mode; 3686 pl->link_config.interface = state->interface; 3687 3688 changed = true; 3689 3690 phylink_info(pl, "switched to %s/%s link mode\n", 3691 phylink_an_mode_str(mode), 3692 phy_modes(state->interface)); 3693 } 3694 3695 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3696 &pl->phylink_disable_state)) 3697 phylink_mac_initial_config(pl, false); 3698 } 3699 3700 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3701 { 3702 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3703 struct phylink_link_state config; 3704 int ret; 3705 3706 /* We're not using pl->sfp_interfaces, so clear it. */ 3707 phy_interface_zero(pl->sfp_interfaces); 3708 linkmode_copy(support, phy->supported); 3709 3710 memset(&config, 0, sizeof(config)); 3711 linkmode_copy(config.advertising, phy->advertising); 3712 config.interface = PHY_INTERFACE_MODE_NA; 3713 config.speed = SPEED_UNKNOWN; 3714 config.duplex = DUPLEX_UNKNOWN; 3715 config.pause = MLO_PAUSE_AN; 3716 3717 /* Ignore errors if we're expecting a PHY to attach later */ 3718 ret = phylink_validate(pl, support, &config); 3719 if (ret) { 3720 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3721 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3722 ERR_PTR(ret)); 3723 return ret; 3724 } 3725 3726 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3727 if (config.interface == PHY_INTERFACE_MODE_NA) 3728 return -EINVAL; 3729 3730 /* Attach the PHY so that the PHY is present when we do the major 3731 * configuration step. 3732 */ 3733 ret = phylink_attach_phy(pl, phy, config.interface); 3734 if (ret < 0) 3735 return ret; 3736 3737 /* This will validate the configuration for us. */ 3738 ret = phylink_bringup_phy(pl, phy, config.interface); 3739 if (ret < 0) { 3740 phy_detach(phy); 3741 return ret; 3742 } 3743 3744 pl->link_port = pl->sfp_port; 3745 3746 phylink_sfp_set_config(pl, support, &config, true); 3747 3748 return 0; 3749 } 3750 3751 static int phylink_sfp_config_optical(struct phylink *pl) 3752 { 3753 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3754 struct phylink_link_state config; 3755 enum inband_type inband_type; 3756 phy_interface_t interface; 3757 int ret; 3758 3759 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3760 (int)PHY_INTERFACE_MODE_MAX, 3761 pl->config->supported_interfaces, 3762 (int)PHY_INTERFACE_MODE_MAX, 3763 pl->sfp_interfaces); 3764 3765 /* Find the union of the supported interfaces by the PCS/MAC and 3766 * the SFP module. 3767 */ 3768 phy_interface_and(pl->sfp_interfaces, pl->config->supported_interfaces, 3769 pl->sfp_interfaces); 3770 if (phy_interface_empty(pl->sfp_interfaces)) { 3771 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3772 return -EINVAL; 3773 } 3774 3775 memset(&config, 0, sizeof(config)); 3776 linkmode_copy(support, pl->sfp_support); 3777 linkmode_copy(config.advertising, pl->sfp_support); 3778 config.speed = SPEED_UNKNOWN; 3779 config.duplex = DUPLEX_UNKNOWN; 3780 config.pause = MLO_PAUSE_AN; 3781 3782 /* For all the interfaces that are supported, reduce the sfp_support 3783 * mask to only those link modes that can be supported. 3784 */ 3785 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3786 pl->sfp_interfaces); 3787 if (ret) { 3788 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3789 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3790 return ret; 3791 } 3792 3793 interface = phylink_choose_sfp_interface(pl, pl->sfp_interfaces); 3794 if (interface == PHY_INTERFACE_MODE_NA) { 3795 phylink_err(pl, "failed to select SFP interface\n"); 3796 return -EINVAL; 3797 } 3798 3799 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3800 phy_modes(interface)); 3801 3802 inband_type = phylink_get_inband_type(interface); 3803 if (inband_type == INBAND_NONE) { 3804 /* If this is the sole interface, and there is no inband 3805 * support, clear the advertising mask and Autoneg bit in 3806 * the support mask. Otherwise, just clear the Autoneg bit 3807 * in the advertising mask. 3808 */ 3809 if (phy_interface_weight(pl->sfp_interfaces) == 1) { 3810 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3811 pl->sfp_support); 3812 linkmode_zero(config.advertising); 3813 } else { 3814 linkmode_clear_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3815 config.advertising); 3816 } 3817 } 3818 3819 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3820 config.advertising)) { 3821 phylink_err(pl, "autoneg setting not compatible with PCS"); 3822 return -EINVAL; 3823 } 3824 3825 config.interface = interface; 3826 3827 /* Ignore errors if we're expecting a PHY to attach later */ 3828 ret = phylink_validate(pl, support, &config); 3829 if (ret) { 3830 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3831 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3832 ERR_PTR(ret)); 3833 return ret; 3834 } 3835 3836 pl->link_port = pl->sfp_port; 3837 3838 phylink_sfp_set_config(pl, pl->sfp_support, &config, false); 3839 3840 return 0; 3841 } 3842 3843 static int phylink_sfp_module_insert(void *upstream, 3844 const struct sfp_eeprom_id *id) 3845 { 3846 const struct sfp_module_caps *caps; 3847 struct phylink *pl = upstream; 3848 3849 ASSERT_RTNL(); 3850 3851 caps = sfp_get_module_caps(pl->sfp_bus); 3852 phy_interface_copy(pl->sfp_interfaces, caps->interfaces); 3853 linkmode_copy(pl->sfp_support, caps->link_modes); 3854 pl->sfp_may_have_phy = caps->may_have_phy; 3855 pl->sfp_port = caps->port; 3856 3857 /* If this module may have a PHY connecting later, defer until later */ 3858 if (pl->sfp_may_have_phy) 3859 return 0; 3860 3861 return phylink_sfp_config_optical(pl); 3862 } 3863 3864 static void phylink_sfp_module_remove(void *upstream) 3865 { 3866 struct phylink *pl = upstream; 3867 3868 phy_interface_zero(pl->sfp_interfaces); 3869 } 3870 3871 static int phylink_sfp_module_start(void *upstream) 3872 { 3873 struct phylink *pl = upstream; 3874 3875 /* If this SFP module has a PHY, start the PHY now. */ 3876 if (pl->phydev) { 3877 phy_start(pl->phydev); 3878 return 0; 3879 } 3880 3881 /* If the module may have a PHY but we didn't detect one we 3882 * need to configure the MAC here. 3883 */ 3884 if (!pl->sfp_may_have_phy) 3885 return 0; 3886 3887 return phylink_sfp_config_optical(pl); 3888 } 3889 3890 static void phylink_sfp_module_stop(void *upstream) 3891 { 3892 struct phylink *pl = upstream; 3893 3894 /* If this SFP module has a PHY, stop it. */ 3895 if (pl->phydev) 3896 phy_stop(pl->phydev); 3897 } 3898 3899 static void phylink_sfp_link_down(void *upstream) 3900 { 3901 struct phylink *pl = upstream; 3902 3903 ASSERT_RTNL(); 3904 3905 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3906 } 3907 3908 static void phylink_sfp_link_up(void *upstream) 3909 { 3910 struct phylink *pl = upstream; 3911 3912 ASSERT_RTNL(); 3913 3914 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3915 } 3916 3917 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3918 { 3919 struct phylink *pl = upstream; 3920 3921 if (!phy->drv) { 3922 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3923 phydev_name(phy), (unsigned long)phy->phy_id); 3924 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3925 return -EINVAL; 3926 } 3927 3928 /* 3929 * This is the new way of dealing with flow control for PHYs, 3930 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3931 * phy drivers should not set SUPPORTED_[Asym_]Pause"). MAC drivers 3932 * set their support using the MAC_SYM_PAUSE and MAC_ASYM_PAUSE 3933 * capabilities and must NOT change the phy's pause settings directly. 3934 */ 3935 phy_support_asym_pause(phy); 3936 3937 /* Set the PHY's host supported interfaces */ 3938 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3939 pl->config->supported_interfaces); 3940 3941 /* Do the initial configuration */ 3942 return phylink_sfp_config_phy(pl, phy); 3943 } 3944 3945 static void phylink_sfp_disconnect_phy(void *upstream, 3946 struct phy_device *phydev) 3947 { 3948 phylink_disconnect_phy(upstream); 3949 } 3950 3951 static const struct sfp_upstream_ops sfp_phylink_ops = { 3952 .attach = phylink_sfp_attach, 3953 .detach = phylink_sfp_detach, 3954 .module_insert = phylink_sfp_module_insert, 3955 .module_remove = phylink_sfp_module_remove, 3956 .module_start = phylink_sfp_module_start, 3957 .module_stop = phylink_sfp_module_stop, 3958 .link_up = phylink_sfp_link_up, 3959 .link_down = phylink_sfp_link_down, 3960 .connect_phy = phylink_sfp_connect_phy, 3961 .disconnect_phy = phylink_sfp_disconnect_phy, 3962 }; 3963 3964 /* Helpers for MAC drivers */ 3965 3966 static struct { 3967 int bit; 3968 int speed; 3969 } phylink_c73_priority_resolution[] = { 3970 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3971 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3972 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3973 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3974 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3975 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3976 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3977 /* 5GBASE-KR not supported */ 3978 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3979 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3980 }; 3981 3982 void phylink_resolve_c73(struct phylink_link_state *state) 3983 { 3984 int i; 3985 3986 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3987 int bit = phylink_c73_priority_resolution[i].bit; 3988 if (linkmode_test_bit(bit, state->advertising) && 3989 linkmode_test_bit(bit, state->lp_advertising)) 3990 break; 3991 } 3992 3993 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3994 state->speed = phylink_c73_priority_resolution[i].speed; 3995 state->duplex = DUPLEX_FULL; 3996 } else { 3997 /* negotiation failure */ 3998 state->link = false; 3999 } 4000 4001 phylink_resolve_an_pause(state); 4002 } 4003 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 4004 4005 static void phylink_decode_c37_word(struct phylink_link_state *state, 4006 uint16_t config_reg, int speed) 4007 { 4008 int fd_bit; 4009 4010 if (speed == SPEED_2500) 4011 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 4012 else 4013 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 4014 4015 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 4016 4017 if (linkmode_test_bit(fd_bit, state->advertising) && 4018 linkmode_test_bit(fd_bit, state->lp_advertising)) { 4019 state->speed = speed; 4020 state->duplex = DUPLEX_FULL; 4021 } else { 4022 /* negotiation failure */ 4023 state->link = false; 4024 } 4025 4026 phylink_resolve_an_pause(state); 4027 } 4028 4029 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 4030 uint16_t config_reg) 4031 { 4032 if (!(config_reg & LPA_SGMII_LINK)) { 4033 state->link = false; 4034 return; 4035 } 4036 4037 switch (config_reg & LPA_SGMII_SPD_MASK) { 4038 case LPA_SGMII_10: 4039 state->speed = SPEED_10; 4040 break; 4041 case LPA_SGMII_100: 4042 state->speed = SPEED_100; 4043 break; 4044 case LPA_SGMII_1000: 4045 state->speed = SPEED_1000; 4046 break; 4047 default: 4048 state->link = false; 4049 return; 4050 } 4051 if (config_reg & LPA_SGMII_FULL_DUPLEX) 4052 state->duplex = DUPLEX_FULL; 4053 else 4054 state->duplex = DUPLEX_HALF; 4055 } 4056 4057 /** 4058 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 4059 * @state: a pointer to a struct phylink_link_state. 4060 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 4061 * 4062 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 4063 * code word. Decode the USXGMII code word and populate the corresponding fields 4064 * (speed, duplex) into the phylink_link_state structure. 4065 */ 4066 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 4067 uint16_t lpa) 4068 { 4069 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4070 case MDIO_USXGMII_10: 4071 state->speed = SPEED_10; 4072 break; 4073 case MDIO_USXGMII_100: 4074 state->speed = SPEED_100; 4075 break; 4076 case MDIO_USXGMII_1000: 4077 state->speed = SPEED_1000; 4078 break; 4079 case MDIO_USXGMII_2500: 4080 state->speed = SPEED_2500; 4081 break; 4082 case MDIO_USXGMII_5000: 4083 state->speed = SPEED_5000; 4084 break; 4085 case MDIO_USXGMII_10G: 4086 state->speed = SPEED_10000; 4087 break; 4088 default: 4089 state->link = false; 4090 return; 4091 } 4092 4093 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4094 state->duplex = DUPLEX_FULL; 4095 else 4096 state->duplex = DUPLEX_HALF; 4097 } 4098 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 4099 4100 /** 4101 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 4102 * @state: a pointer to a struct phylink_link_state. 4103 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 4104 * 4105 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 4106 * code word. Decode the USGMII code word and populate the corresponding fields 4107 * (speed, duplex) into the phylink_link_state structure. The structure for this 4108 * word is the same as the USXGMII word, except it only supports speeds up to 4109 * 1Gbps. 4110 */ 4111 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 4112 uint16_t lpa) 4113 { 4114 switch (lpa & MDIO_USXGMII_SPD_MASK) { 4115 case MDIO_USXGMII_10: 4116 state->speed = SPEED_10; 4117 break; 4118 case MDIO_USXGMII_100: 4119 state->speed = SPEED_100; 4120 break; 4121 case MDIO_USXGMII_1000: 4122 state->speed = SPEED_1000; 4123 break; 4124 default: 4125 state->link = false; 4126 return; 4127 } 4128 4129 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 4130 state->duplex = DUPLEX_FULL; 4131 else 4132 state->duplex = DUPLEX_HALF; 4133 } 4134 4135 /** 4136 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 4137 * @state: a pointer to a &struct phylink_link_state. 4138 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4139 * @bmsr: The value of the %MII_BMSR register 4140 * @lpa: The value of the %MII_LPA register 4141 * 4142 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4143 * clause 37 negotiation and/or SGMII control. 4144 * 4145 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 4146 * the phylink @state structure. This is suitable to be used for implementing 4147 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 4148 * accessing @bmsr and @lpa cannot be done with MDIO directly. 4149 */ 4150 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 4151 unsigned int neg_mode, u16 bmsr, u16 lpa) 4152 { 4153 state->link = !!(bmsr & BMSR_LSTATUS); 4154 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 4155 4156 /* If the link is down, the advertisement data is undefined. */ 4157 if (!state->link) 4158 return; 4159 4160 switch (state->interface) { 4161 case PHY_INTERFACE_MODE_1000BASEX: 4162 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4163 phylink_decode_c37_word(state, lpa, SPEED_1000); 4164 } else { 4165 state->speed = SPEED_1000; 4166 state->duplex = DUPLEX_FULL; 4167 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4168 } 4169 break; 4170 4171 case PHY_INTERFACE_MODE_2500BASEX: 4172 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) { 4173 phylink_decode_c37_word(state, lpa, SPEED_2500); 4174 } else { 4175 state->speed = SPEED_2500; 4176 state->duplex = DUPLEX_FULL; 4177 state->pause |= MLO_PAUSE_TX | MLO_PAUSE_RX; 4178 } 4179 break; 4180 4181 case PHY_INTERFACE_MODE_SGMII: 4182 case PHY_INTERFACE_MODE_PSGMII: 4183 case PHY_INTERFACE_MODE_QSGMII: 4184 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4185 phylink_decode_sgmii_word(state, lpa); 4186 break; 4187 4188 case PHY_INTERFACE_MODE_QUSGMII: 4189 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4190 phylink_decode_usgmii_word(state, lpa); 4191 break; 4192 4193 default: 4194 state->link = false; 4195 break; 4196 } 4197 } 4198 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 4199 4200 /** 4201 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 4202 * @pcs: a pointer to a &struct mdio_device. 4203 * @neg_mode: link negotiation mode (PHYLINK_PCS_NEG_xxx) 4204 * @state: a pointer to a &struct phylink_link_state. 4205 * 4206 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4207 * clause 37 negotiation and/or SGMII control. 4208 * 4209 * Read the MAC PCS state from the MII device configured in @config and 4210 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 4211 * the phylink @state structure. This is suitable to be directly plugged 4212 * into the pcs_get_state() member of the struct phylink_pcs_ops 4213 * structure. 4214 */ 4215 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 4216 unsigned int neg_mode, 4217 struct phylink_link_state *state) 4218 { 4219 int bmsr, lpa; 4220 4221 bmsr = mdiodev_read(pcs, MII_BMSR); 4222 lpa = mdiodev_read(pcs, MII_LPA); 4223 if (bmsr < 0 || lpa < 0) { 4224 state->link = false; 4225 return; 4226 } 4227 4228 phylink_mii_c22_pcs_decode_state(state, neg_mode, bmsr, lpa); 4229 } 4230 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 4231 4232 /** 4233 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 4234 * advertisement 4235 * @interface: the PHY interface mode being configured 4236 * @advertising: the ethtool advertisement mask 4237 * 4238 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4239 * clause 37 negotiation and/or SGMII control. 4240 * 4241 * Encode the clause 37 PCS advertisement as specified by @interface and 4242 * @advertising. 4243 * 4244 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 4245 */ 4246 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 4247 const unsigned long *advertising) 4248 { 4249 u16 adv; 4250 4251 switch (interface) { 4252 case PHY_INTERFACE_MODE_1000BASEX: 4253 case PHY_INTERFACE_MODE_2500BASEX: 4254 adv = ADVERTISE_1000XFULL; 4255 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 4256 advertising)) 4257 adv |= ADVERTISE_1000XPAUSE; 4258 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 4259 advertising)) 4260 adv |= ADVERTISE_1000XPSE_ASYM; 4261 return adv; 4262 case PHY_INTERFACE_MODE_SGMII: 4263 case PHY_INTERFACE_MODE_PSGMII: 4264 case PHY_INTERFACE_MODE_QSGMII: 4265 return 0x0001; 4266 default: 4267 /* Nothing to do for other modes */ 4268 return -EINVAL; 4269 } 4270 } 4271 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 4272 4273 /** 4274 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 4275 * @pcs: a pointer to a &struct mdio_device. 4276 * @interface: the PHY interface mode being configured 4277 * @advertising: the ethtool advertisement mask 4278 * @neg_mode: PCS negotiation mode 4279 * 4280 * Configure a Clause 22 PCS PHY with the appropriate negotiation 4281 * parameters for the @mode, @interface and @advertising parameters. 4282 * Returns negative error number on failure, zero if the advertisement 4283 * has not changed, or positive if there is a change. 4284 */ 4285 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 4286 phy_interface_t interface, 4287 const unsigned long *advertising, 4288 unsigned int neg_mode) 4289 { 4290 bool changed = 0; 4291 u16 bmcr; 4292 int ret, adv; 4293 4294 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 4295 if (adv >= 0) { 4296 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 4297 MII_ADVERTISE, 0xffff, adv); 4298 if (ret < 0) 4299 return ret; 4300 changed = ret; 4301 } 4302 4303 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4304 bmcr = BMCR_ANENABLE; 4305 else 4306 bmcr = 0; 4307 4308 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4309 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4310 if (ret < 0) 4311 return ret; 4312 4313 return changed; 4314 } 4315 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4316 4317 /** 4318 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4319 * @pcs: a pointer to a &struct mdio_device. 4320 * 4321 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4322 * clause 37 negotiation. 4323 * 4324 * Restart the clause 37 negotiation with the link partner. This is 4325 * suitable to be directly plugged into the pcs_get_state() member 4326 * of the struct phylink_pcs_ops structure. 4327 */ 4328 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4329 { 4330 int val = mdiodev_read(pcs, MII_BMCR); 4331 4332 if (val >= 0) { 4333 val |= BMCR_ANRESTART; 4334 4335 mdiodev_write(pcs, MII_BMCR, val); 4336 } 4337 } 4338 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4339 4340 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4341 struct phylink_link_state *state) 4342 { 4343 struct mii_bus *bus = pcs->bus; 4344 int addr = pcs->addr; 4345 int stat; 4346 4347 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4348 if (stat < 0) { 4349 state->link = false; 4350 return; 4351 } 4352 4353 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4354 if (!state->link) 4355 return; 4356 4357 switch (state->interface) { 4358 case PHY_INTERFACE_MODE_10GBASER: 4359 state->speed = SPEED_10000; 4360 state->duplex = DUPLEX_FULL; 4361 break; 4362 4363 default: 4364 break; 4365 } 4366 } 4367 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4368 4369 /** 4370 * phylink_replay_link_begin() - begin replay of link callbacks for driver 4371 * which loses state 4372 * @pl: a pointer to a &struct phylink returned from phylink_create() 4373 * 4374 * Helper for MAC drivers which may perform a destructive reset at runtime. 4375 * Both the own driver's mac_link_down() method is called, as well as the 4376 * pcs_link_down() method of the split PCS (if any). 4377 * 4378 * This is similar to phylink_stop(), except it does not alter the state of 4379 * the phylib PHY (it is assumed that it is not affected by the MAC destructive 4380 * reset). 4381 */ 4382 void phylink_replay_link_begin(struct phylink *pl) 4383 { 4384 ASSERT_RTNL(); 4385 4386 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_REPLAY); 4387 } 4388 EXPORT_SYMBOL_GPL(phylink_replay_link_begin); 4389 4390 /** 4391 * phylink_replay_link_end() - end replay of link callbacks for driver 4392 * which lost state 4393 * @pl: a pointer to a &struct phylink returned from phylink_create() 4394 * 4395 * Helper for MAC drivers which may perform a destructive reset at runtime. 4396 * Both the own driver's mac_config() and mac_link_up() methods, as well as the 4397 * pcs_config() and pcs_link_up() method of the split PCS (if any), are called. 4398 * 4399 * This is similar to phylink_start(), except it does not alter the state of 4400 * the phylib PHY. 4401 * 4402 * One must call this method only within the same rtnl_lock() critical section 4403 * as a previous phylink_replay_link_start(). 4404 */ 4405 void phylink_replay_link_end(struct phylink *pl) 4406 { 4407 ASSERT_RTNL(); 4408 4409 if (WARN(!test_bit(PHYLINK_DISABLE_REPLAY, 4410 &pl->phylink_disable_state), 4411 "phylink_replay_link_end() called without a prior phylink_replay_link_begin()\n")) 4412 return; 4413 4414 pl->force_major_config = true; 4415 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_REPLAY); 4416 flush_work(&pl->resolve); 4417 } 4418 EXPORT_SYMBOL_GPL(phylink_replay_link_end); 4419 4420 static int __init phylink_init(void) 4421 { 4422 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4423 __set_bit(phylink_sfp_interface_preference[i], 4424 phylink_sfp_interfaces); 4425 4426 return 0; 4427 } 4428 4429 module_init(phylink_init); 4430 4431 MODULE_LICENSE("GPL v2"); 4432 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4433