1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 247 if (caps & MAC_10FD) { 248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 250 } 251 252 if (caps & MAC_100HD) { 253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 255 } 256 257 if (caps & MAC_100FD) { 258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 261 } 262 263 if (caps & MAC_1000HD) 264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 265 266 if (caps & MAC_1000FD) { 267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_2500FD) { 274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 276 } 277 278 if (caps & MAC_5000FD) 279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 280 281 if (caps & MAC_10000FD) { 282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 291 } 292 293 if (caps & MAC_25000FD) { 294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_40000FD) { 300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_50000FD) { 307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 314 linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 316 } 317 318 if (caps & MAC_56000FD) { 319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 323 } 324 325 if (caps & MAC_100000FD) { 326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 330 linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 340 linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 343 } 344 345 if (caps & MAC_200000FD) { 346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 349 linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 355 linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_400000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 364 linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 373 } 374 } 375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 376 377 static struct { 378 unsigned long mask; 379 int speed; 380 unsigned int duplex; 381 } phylink_caps_params[] = { 382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 395 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 396 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 397 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 398 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 399 }; 400 401 /** 402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 403 * @speed: the speed to search for 404 * @duplex: the duplex to search for 405 * 406 * Find the mac capability for a given speed and duplex. 407 * 408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 409 * there were no matches. 410 */ 411 static unsigned long phylink_cap_from_speed_duplex(int speed, 412 unsigned int duplex) 413 { 414 int i; 415 416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 417 if (speed == phylink_caps_params[i].speed && 418 duplex == phylink_caps_params[i].duplex) 419 return phylink_caps_params[i].mask; 420 } 421 422 return 0; 423 } 424 425 /** 426 * phylink_get_capabilities() - get capabilities for a given MAC 427 * @interface: phy interface mode defined by &typedef phy_interface_t 428 * @mac_capabilities: bitmask of MAC capabilities 429 * @rate_matching: type of rate matching being performed 430 * 431 * Get the MAC capabilities that are supported by the @interface mode and 432 * @mac_capabilities. 433 */ 434 unsigned long phylink_get_capabilities(phy_interface_t interface, 435 unsigned long mac_capabilities, 436 int rate_matching) 437 { 438 int max_speed = phylink_interface_max_speed(interface); 439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 440 unsigned long matched_caps = 0; 441 442 switch (interface) { 443 case PHY_INTERFACE_MODE_USXGMII: 444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 445 fallthrough; 446 447 case PHY_INTERFACE_MODE_RGMII_TXID: 448 case PHY_INTERFACE_MODE_RGMII_RXID: 449 case PHY_INTERFACE_MODE_RGMII_ID: 450 case PHY_INTERFACE_MODE_RGMII: 451 case PHY_INTERFACE_MODE_QSGMII: 452 case PHY_INTERFACE_MODE_QUSGMII: 453 case PHY_INTERFACE_MODE_SGMII: 454 case PHY_INTERFACE_MODE_GMII: 455 caps |= MAC_1000HD | MAC_1000FD; 456 fallthrough; 457 458 case PHY_INTERFACE_MODE_REVRMII: 459 case PHY_INTERFACE_MODE_RMII: 460 case PHY_INTERFACE_MODE_SMII: 461 case PHY_INTERFACE_MODE_REVMII: 462 case PHY_INTERFACE_MODE_MII: 463 caps |= MAC_10HD | MAC_10FD; 464 fallthrough; 465 466 case PHY_INTERFACE_MODE_100BASEX: 467 caps |= MAC_100HD | MAC_100FD; 468 break; 469 470 case PHY_INTERFACE_MODE_TBI: 471 case PHY_INTERFACE_MODE_MOCA: 472 case PHY_INTERFACE_MODE_RTBI: 473 case PHY_INTERFACE_MODE_1000BASEX: 474 caps |= MAC_1000HD; 475 fallthrough; 476 case PHY_INTERFACE_MODE_1000BASEKX: 477 case PHY_INTERFACE_MODE_TRGMII: 478 caps |= MAC_1000FD; 479 break; 480 481 case PHY_INTERFACE_MODE_2500BASEX: 482 caps |= MAC_2500FD; 483 break; 484 485 case PHY_INTERFACE_MODE_5GBASER: 486 caps |= MAC_5000FD; 487 break; 488 489 case PHY_INTERFACE_MODE_XGMII: 490 case PHY_INTERFACE_MODE_RXAUI: 491 case PHY_INTERFACE_MODE_XAUI: 492 case PHY_INTERFACE_MODE_10GBASER: 493 case PHY_INTERFACE_MODE_10GKR: 494 caps |= MAC_10000FD; 495 break; 496 497 case PHY_INTERFACE_MODE_25GBASER: 498 caps |= MAC_25000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_XLGMII: 502 caps |= MAC_40000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_INTERNAL: 506 caps |= ~0; 507 break; 508 509 case PHY_INTERFACE_MODE_NA: 510 case PHY_INTERFACE_MODE_MAX: 511 break; 512 } 513 514 switch (rate_matching) { 515 case RATE_MATCH_OPEN_LOOP: 516 /* TODO */ 517 fallthrough; 518 case RATE_MATCH_NONE: 519 matched_caps = 0; 520 break; 521 case RATE_MATCH_PAUSE: { 522 /* The MAC must support asymmetric pause towards the local 523 * device for this. We could allow just symmetric pause, but 524 * then we might have to renegotiate if the link partner 525 * doesn't support pause. This is because there's no way to 526 * accept pause frames without transmitting them if we only 527 * support symmetric pause. 528 */ 529 if (!(mac_capabilities & MAC_SYM_PAUSE) || 530 !(mac_capabilities & MAC_ASYM_PAUSE)) 531 break; 532 533 /* We can't adapt if the MAC doesn't support the interface's 534 * max speed at full duplex. 535 */ 536 if (mac_capabilities & 537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 538 /* Although a duplex-matching phy might exist, we 539 * conservatively remove these modes because the MAC 540 * will not be aware of the half-duplex nature of the 541 * link. 542 */ 543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 545 } 546 break; 547 } 548 case RATE_MATCH_CRS: 549 /* The MAC must support half duplex at the interface's max 550 * speed. 551 */ 552 if (mac_capabilities & 553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 555 matched_caps &= mac_capabilities; 556 } 557 break; 558 } 559 560 return (caps & mac_capabilities) | matched_caps; 561 } 562 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 563 564 /** 565 * phylink_validate_mask_caps() - Restrict link modes based on caps 566 * @supported: ethtool bitmask for supported link modes. 567 * @state: an (optional) pointer to a &struct phylink_link_state. 568 * @mac_capabilities: bitmask of MAC capabilities 569 * 570 * Calculate the supported link modes based on @mac_capabilities, and restrict 571 * @supported and @state based on that. Use this function if your capabiliies 572 * aren't constant, such as if they vary depending on the interface. 573 */ 574 void phylink_validate_mask_caps(unsigned long *supported, 575 struct phylink_link_state *state, 576 unsigned long mac_capabilities) 577 { 578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 579 unsigned long caps; 580 581 phylink_set_port_modes(mask); 582 phylink_set(mask, Autoneg); 583 caps = phylink_get_capabilities(state->interface, mac_capabilities, 584 state->rate_matching); 585 phylink_caps_to_linkmodes(mask, caps); 586 587 linkmode_and(supported, supported, mask); 588 if (state) 589 linkmode_and(state->advertising, state->advertising, mask); 590 } 591 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 592 593 /** 594 * phylink_generic_validate() - generic validate() callback implementation 595 * @config: a pointer to a &struct phylink_config. 596 * @supported: ethtool bitmask for supported link modes. 597 * @state: a pointer to a &struct phylink_link_state. 598 * 599 * Generic implementation of the validate() callback that MAC drivers can 600 * use when they pass the range of supported interfaces and MAC capabilities. 601 */ 602 void phylink_generic_validate(struct phylink_config *config, 603 unsigned long *supported, 604 struct phylink_link_state *state) 605 { 606 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 607 } 608 EXPORT_SYMBOL_GPL(phylink_generic_validate); 609 610 static int phylink_validate_mac_and_pcs(struct phylink *pl, 611 unsigned long *supported, 612 struct phylink_link_state *state) 613 { 614 struct phylink_pcs *pcs; 615 int ret; 616 617 /* Get the PCS for this interface mode */ 618 if (pl->using_mac_select_pcs) { 619 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 620 if (IS_ERR(pcs)) 621 return PTR_ERR(pcs); 622 } else { 623 pcs = pl->pcs; 624 } 625 626 if (pcs) { 627 /* The PCS, if present, must be setup before phylink_create() 628 * has been called. If the ops is not initialised, print an 629 * error and backtrace rather than oopsing the kernel. 630 */ 631 if (!pcs->ops) { 632 phylink_err(pl, "interface %s: uninitialised PCS\n", 633 phy_modes(state->interface)); 634 dump_stack(); 635 return -EINVAL; 636 } 637 638 /* Validate the link parameters with the PCS */ 639 if (pcs->ops->pcs_validate) { 640 ret = pcs->ops->pcs_validate(pcs, supported, state); 641 if (ret < 0 || phylink_is_empty_linkmode(supported)) 642 return -EINVAL; 643 644 /* Ensure the advertising mask is a subset of the 645 * supported mask. 646 */ 647 linkmode_and(state->advertising, state->advertising, 648 supported); 649 } 650 } 651 652 /* Then validate the link parameters with the MAC */ 653 pl->mac_ops->validate(pl->config, supported, state); 654 655 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 656 } 657 658 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 659 struct phylink_link_state *state, 660 const unsigned long *interfaces) 661 { 662 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 663 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 664 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 665 struct phylink_link_state t; 666 int intf; 667 668 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 669 if (test_bit(intf, interfaces)) { 670 linkmode_copy(s, supported); 671 672 t = *state; 673 t.interface = intf; 674 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 675 linkmode_or(all_s, all_s, s); 676 linkmode_or(all_adv, all_adv, t.advertising); 677 } 678 } 679 } 680 681 linkmode_copy(supported, all_s); 682 linkmode_copy(state->advertising, all_adv); 683 684 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 685 } 686 687 static int phylink_validate(struct phylink *pl, unsigned long *supported, 688 struct phylink_link_state *state) 689 { 690 const unsigned long *interfaces = pl->config->supported_interfaces; 691 692 if (!phy_interface_empty(interfaces)) { 693 if (state->interface == PHY_INTERFACE_MODE_NA) 694 return phylink_validate_mask(pl, supported, state, 695 interfaces); 696 697 if (!test_bit(state->interface, interfaces)) 698 return -EINVAL; 699 } 700 701 return phylink_validate_mac_and_pcs(pl, supported, state); 702 } 703 704 static int phylink_parse_fixedlink(struct phylink *pl, 705 struct fwnode_handle *fwnode) 706 { 707 struct fwnode_handle *fixed_node; 708 const struct phy_setting *s; 709 struct gpio_desc *desc; 710 u32 speed; 711 int ret; 712 713 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 714 if (fixed_node) { 715 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 716 717 pl->link_config.speed = speed; 718 pl->link_config.duplex = DUPLEX_HALF; 719 720 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 721 pl->link_config.duplex = DUPLEX_FULL; 722 723 /* We treat the "pause" and "asym-pause" terminology as 724 * defining the link partner's ability. 725 */ 726 if (fwnode_property_read_bool(fixed_node, "pause")) 727 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 728 pl->link_config.lp_advertising); 729 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 730 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 731 pl->link_config.lp_advertising); 732 733 if (ret == 0) { 734 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 735 GPIOD_IN, "?"); 736 737 if (!IS_ERR(desc)) 738 pl->link_gpio = desc; 739 else if (desc == ERR_PTR(-EPROBE_DEFER)) 740 ret = -EPROBE_DEFER; 741 } 742 fwnode_handle_put(fixed_node); 743 744 if (ret) 745 return ret; 746 } else { 747 u32 prop[5]; 748 749 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 750 NULL, 0); 751 if (ret != ARRAY_SIZE(prop)) { 752 phylink_err(pl, "broken fixed-link?\n"); 753 return -EINVAL; 754 } 755 756 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 757 prop, ARRAY_SIZE(prop)); 758 if (!ret) { 759 pl->link_config.duplex = prop[1] ? 760 DUPLEX_FULL : DUPLEX_HALF; 761 pl->link_config.speed = prop[2]; 762 if (prop[3]) 763 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 764 pl->link_config.lp_advertising); 765 if (prop[4]) 766 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 767 pl->link_config.lp_advertising); 768 } 769 } 770 771 if (pl->link_config.speed > SPEED_1000 && 772 pl->link_config.duplex != DUPLEX_FULL) 773 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 774 pl->link_config.speed); 775 776 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 777 linkmode_copy(pl->link_config.advertising, pl->supported); 778 phylink_validate(pl, pl->supported, &pl->link_config); 779 780 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 781 pl->supported, true); 782 linkmode_zero(pl->supported); 783 phylink_set(pl->supported, MII); 784 phylink_set(pl->supported, Pause); 785 phylink_set(pl->supported, Asym_Pause); 786 phylink_set(pl->supported, Autoneg); 787 if (s) { 788 __set_bit(s->bit, pl->supported); 789 __set_bit(s->bit, pl->link_config.lp_advertising); 790 } else { 791 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 792 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 793 pl->link_config.speed); 794 } 795 796 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 797 pl->supported); 798 799 pl->link_config.link = 1; 800 pl->link_config.an_complete = 1; 801 802 return 0; 803 } 804 805 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 806 { 807 struct fwnode_handle *dn; 808 const char *managed; 809 810 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 811 if (dn || fwnode_property_present(fwnode, "fixed-link")) 812 pl->cfg_link_an_mode = MLO_AN_FIXED; 813 fwnode_handle_put(dn); 814 815 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 816 strcmp(managed, "in-band-status") == 0) || 817 pl->config->ovr_an_inband) { 818 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 819 phylink_err(pl, 820 "can't use both fixed-link and in-band-status\n"); 821 return -EINVAL; 822 } 823 824 linkmode_zero(pl->supported); 825 phylink_set(pl->supported, MII); 826 phylink_set(pl->supported, Autoneg); 827 phylink_set(pl->supported, Asym_Pause); 828 phylink_set(pl->supported, Pause); 829 pl->link_config.an_enabled = true; 830 pl->cfg_link_an_mode = MLO_AN_INBAND; 831 832 switch (pl->link_config.interface) { 833 case PHY_INTERFACE_MODE_SGMII: 834 case PHY_INTERFACE_MODE_QSGMII: 835 case PHY_INTERFACE_MODE_QUSGMII: 836 case PHY_INTERFACE_MODE_RGMII: 837 case PHY_INTERFACE_MODE_RGMII_ID: 838 case PHY_INTERFACE_MODE_RGMII_RXID: 839 case PHY_INTERFACE_MODE_RGMII_TXID: 840 case PHY_INTERFACE_MODE_RTBI: 841 phylink_set(pl->supported, 10baseT_Half); 842 phylink_set(pl->supported, 10baseT_Full); 843 phylink_set(pl->supported, 100baseT_Half); 844 phylink_set(pl->supported, 100baseT_Full); 845 phylink_set(pl->supported, 1000baseT_Half); 846 phylink_set(pl->supported, 1000baseT_Full); 847 break; 848 849 case PHY_INTERFACE_MODE_1000BASEX: 850 phylink_set(pl->supported, 1000baseX_Full); 851 break; 852 853 case PHY_INTERFACE_MODE_2500BASEX: 854 phylink_set(pl->supported, 2500baseX_Full); 855 break; 856 857 case PHY_INTERFACE_MODE_5GBASER: 858 phylink_set(pl->supported, 5000baseT_Full); 859 break; 860 861 case PHY_INTERFACE_MODE_25GBASER: 862 phylink_set(pl->supported, 25000baseCR_Full); 863 phylink_set(pl->supported, 25000baseKR_Full); 864 phylink_set(pl->supported, 25000baseSR_Full); 865 fallthrough; 866 case PHY_INTERFACE_MODE_USXGMII: 867 case PHY_INTERFACE_MODE_10GKR: 868 case PHY_INTERFACE_MODE_10GBASER: 869 phylink_set(pl->supported, 10baseT_Half); 870 phylink_set(pl->supported, 10baseT_Full); 871 phylink_set(pl->supported, 100baseT_Half); 872 phylink_set(pl->supported, 100baseT_Full); 873 phylink_set(pl->supported, 1000baseT_Half); 874 phylink_set(pl->supported, 1000baseT_Full); 875 phylink_set(pl->supported, 1000baseX_Full); 876 phylink_set(pl->supported, 1000baseKX_Full); 877 phylink_set(pl->supported, 2500baseT_Full); 878 phylink_set(pl->supported, 2500baseX_Full); 879 phylink_set(pl->supported, 5000baseT_Full); 880 phylink_set(pl->supported, 10000baseT_Full); 881 phylink_set(pl->supported, 10000baseKR_Full); 882 phylink_set(pl->supported, 10000baseKX4_Full); 883 phylink_set(pl->supported, 10000baseCR_Full); 884 phylink_set(pl->supported, 10000baseSR_Full); 885 phylink_set(pl->supported, 10000baseLR_Full); 886 phylink_set(pl->supported, 10000baseLRM_Full); 887 phylink_set(pl->supported, 10000baseER_Full); 888 break; 889 890 case PHY_INTERFACE_MODE_XLGMII: 891 phylink_set(pl->supported, 25000baseCR_Full); 892 phylink_set(pl->supported, 25000baseKR_Full); 893 phylink_set(pl->supported, 25000baseSR_Full); 894 phylink_set(pl->supported, 40000baseKR4_Full); 895 phylink_set(pl->supported, 40000baseCR4_Full); 896 phylink_set(pl->supported, 40000baseSR4_Full); 897 phylink_set(pl->supported, 40000baseLR4_Full); 898 phylink_set(pl->supported, 50000baseCR2_Full); 899 phylink_set(pl->supported, 50000baseKR2_Full); 900 phylink_set(pl->supported, 50000baseSR2_Full); 901 phylink_set(pl->supported, 50000baseKR_Full); 902 phylink_set(pl->supported, 50000baseSR_Full); 903 phylink_set(pl->supported, 50000baseCR_Full); 904 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 905 phylink_set(pl->supported, 50000baseDR_Full); 906 phylink_set(pl->supported, 100000baseKR4_Full); 907 phylink_set(pl->supported, 100000baseSR4_Full); 908 phylink_set(pl->supported, 100000baseCR4_Full); 909 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 910 phylink_set(pl->supported, 100000baseKR2_Full); 911 phylink_set(pl->supported, 100000baseSR2_Full); 912 phylink_set(pl->supported, 100000baseCR2_Full); 913 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 914 phylink_set(pl->supported, 100000baseDR2_Full); 915 break; 916 917 default: 918 phylink_err(pl, 919 "incorrect link mode %s for in-band status\n", 920 phy_modes(pl->link_config.interface)); 921 return -EINVAL; 922 } 923 924 linkmode_copy(pl->link_config.advertising, pl->supported); 925 926 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 927 phylink_err(pl, 928 "failed to validate link configuration for in-band status\n"); 929 return -EINVAL; 930 } 931 932 /* Check if MAC/PCS also supports Autoneg. */ 933 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 934 } 935 936 return 0; 937 } 938 939 static void phylink_apply_manual_flow(struct phylink *pl, 940 struct phylink_link_state *state) 941 { 942 /* If autoneg is disabled, pause AN is also disabled */ 943 if (!state->an_enabled) 944 state->pause &= ~MLO_PAUSE_AN; 945 946 /* Manual configuration of pause modes */ 947 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 948 state->pause = pl->link_config.pause; 949 } 950 951 static void phylink_resolve_flow(struct phylink_link_state *state) 952 { 953 bool tx_pause, rx_pause; 954 955 state->pause = MLO_PAUSE_NONE; 956 if (state->duplex == DUPLEX_FULL) { 957 linkmode_resolve_pause(state->advertising, 958 state->lp_advertising, 959 &tx_pause, &rx_pause); 960 if (tx_pause) 961 state->pause |= MLO_PAUSE_TX; 962 if (rx_pause) 963 state->pause |= MLO_PAUSE_RX; 964 } 965 } 966 967 static void phylink_pcs_poll_stop(struct phylink *pl) 968 { 969 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 970 del_timer(&pl->link_poll); 971 } 972 973 static void phylink_pcs_poll_start(struct phylink *pl) 974 { 975 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 976 mod_timer(&pl->link_poll, jiffies + HZ); 977 } 978 979 static void phylink_mac_config(struct phylink *pl, 980 const struct phylink_link_state *state) 981 { 982 phylink_dbg(pl, 983 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 984 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 985 phy_modes(state->interface), 986 phy_speed_to_str(state->speed), 987 phy_duplex_to_str(state->duplex), 988 phy_rate_matching_to_str(state->rate_matching), 989 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 990 state->pause, state->link, state->an_enabled); 991 992 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 993 } 994 995 static void phylink_mac_pcs_an_restart(struct phylink *pl) 996 { 997 if (pl->link_config.an_enabled && 998 phy_interface_mode_is_8023z(pl->link_config.interface) && 999 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1000 if (pl->pcs) 1001 pl->pcs->ops->pcs_an_restart(pl->pcs); 1002 else if (pl->config->legacy_pre_march2020) 1003 pl->mac_ops->mac_an_restart(pl->config); 1004 } 1005 } 1006 1007 static void phylink_major_config(struct phylink *pl, bool restart, 1008 const struct phylink_link_state *state) 1009 { 1010 struct phylink_pcs *pcs = NULL; 1011 bool pcs_changed = false; 1012 int err; 1013 1014 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1015 1016 if (pl->using_mac_select_pcs) { 1017 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1018 if (IS_ERR(pcs)) { 1019 phylink_err(pl, 1020 "mac_select_pcs unexpectedly failed: %pe\n", 1021 pcs); 1022 return; 1023 } 1024 1025 pcs_changed = pcs && pl->pcs != pcs; 1026 } 1027 1028 phylink_pcs_poll_stop(pl); 1029 1030 if (pl->mac_ops->mac_prepare) { 1031 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1032 state->interface); 1033 if (err < 0) { 1034 phylink_err(pl, "mac_prepare failed: %pe\n", 1035 ERR_PTR(err)); 1036 return; 1037 } 1038 } 1039 1040 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1041 * for the change. 1042 */ 1043 if (pcs_changed) 1044 pl->pcs = pcs; 1045 1046 phylink_mac_config(pl, state); 1047 1048 if (pl->pcs) { 1049 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1050 state->interface, 1051 state->advertising, 1052 !!(pl->link_config.pause & 1053 MLO_PAUSE_AN)); 1054 if (err < 0) 1055 phylink_err(pl, "pcs_config failed: %pe\n", 1056 ERR_PTR(err)); 1057 if (err > 0) 1058 restart = true; 1059 } 1060 if (restart) 1061 phylink_mac_pcs_an_restart(pl); 1062 1063 if (pl->mac_ops->mac_finish) { 1064 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1065 state->interface); 1066 if (err < 0) 1067 phylink_err(pl, "mac_finish failed: %pe\n", 1068 ERR_PTR(err)); 1069 } 1070 1071 phylink_pcs_poll_start(pl); 1072 } 1073 1074 /* 1075 * Reconfigure for a change of inband advertisement. 1076 * If we have a separate PCS, we only need to call its pcs_config() method, 1077 * and then restart AN if it indicates something changed. Otherwise, we do 1078 * the full MAC reconfiguration. 1079 */ 1080 static int phylink_change_inband_advert(struct phylink *pl) 1081 { 1082 int ret; 1083 1084 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1085 return 0; 1086 1087 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1088 /* Legacy method */ 1089 phylink_mac_config(pl, &pl->link_config); 1090 phylink_mac_pcs_an_restart(pl); 1091 return 0; 1092 } 1093 1094 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1095 phylink_an_mode_str(pl->cur_link_an_mode), 1096 phy_modes(pl->link_config.interface), 1097 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1098 pl->link_config.pause); 1099 1100 /* Modern PCS-based method; update the advert at the PCS, and 1101 * restart negotiation if the pcs_config() helper indicates that 1102 * the programmed advertisement has changed. 1103 */ 1104 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1105 pl->link_config.interface, 1106 pl->link_config.advertising, 1107 !!(pl->link_config.pause & 1108 MLO_PAUSE_AN)); 1109 if (ret < 0) 1110 return ret; 1111 1112 if (ret > 0) 1113 phylink_mac_pcs_an_restart(pl); 1114 1115 return 0; 1116 } 1117 1118 static void phylink_mac_pcs_get_state(struct phylink *pl, 1119 struct phylink_link_state *state) 1120 { 1121 linkmode_copy(state->advertising, pl->link_config.advertising); 1122 linkmode_zero(state->lp_advertising); 1123 state->interface = pl->link_config.interface; 1124 state->an_enabled = pl->link_config.an_enabled; 1125 state->rate_matching = pl->link_config.rate_matching; 1126 if (state->an_enabled) { 1127 state->speed = SPEED_UNKNOWN; 1128 state->duplex = DUPLEX_UNKNOWN; 1129 state->pause = MLO_PAUSE_NONE; 1130 } else { 1131 state->speed = pl->link_config.speed; 1132 state->duplex = pl->link_config.duplex; 1133 state->pause = pl->link_config.pause; 1134 } 1135 state->an_complete = 0; 1136 state->link = 1; 1137 1138 if (pl->pcs) 1139 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1140 else if (pl->mac_ops->mac_pcs_get_state && 1141 pl->config->legacy_pre_march2020) 1142 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1143 else 1144 state->link = 0; 1145 } 1146 1147 /* The fixed state is... fixed except for the link state, 1148 * which may be determined by a GPIO or a callback. 1149 */ 1150 static void phylink_get_fixed_state(struct phylink *pl, 1151 struct phylink_link_state *state) 1152 { 1153 *state = pl->link_config; 1154 if (pl->config->get_fixed_state) 1155 pl->config->get_fixed_state(pl->config, state); 1156 else if (pl->link_gpio) 1157 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1158 1159 phylink_resolve_flow(state); 1160 } 1161 1162 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1163 { 1164 struct phylink_link_state link_state; 1165 1166 switch (pl->cur_link_an_mode) { 1167 case MLO_AN_PHY: 1168 link_state = pl->phy_state; 1169 break; 1170 1171 case MLO_AN_FIXED: 1172 phylink_get_fixed_state(pl, &link_state); 1173 break; 1174 1175 case MLO_AN_INBAND: 1176 link_state = pl->link_config; 1177 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1178 link_state.pause = MLO_PAUSE_NONE; 1179 break; 1180 1181 default: /* can't happen */ 1182 return; 1183 } 1184 1185 link_state.link = false; 1186 1187 phylink_apply_manual_flow(pl, &link_state); 1188 phylink_major_config(pl, force_restart, &link_state); 1189 } 1190 1191 static const char *phylink_pause_to_str(int pause) 1192 { 1193 switch (pause & MLO_PAUSE_TXRX_MASK) { 1194 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1195 return "rx/tx"; 1196 case MLO_PAUSE_TX: 1197 return "tx"; 1198 case MLO_PAUSE_RX: 1199 return "rx"; 1200 default: 1201 return "off"; 1202 } 1203 } 1204 1205 static void phylink_link_up(struct phylink *pl, 1206 struct phylink_link_state link_state) 1207 { 1208 struct net_device *ndev = pl->netdev; 1209 int speed, duplex; 1210 bool rx_pause; 1211 1212 speed = link_state.speed; 1213 duplex = link_state.duplex; 1214 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1215 1216 switch (link_state.rate_matching) { 1217 case RATE_MATCH_PAUSE: 1218 /* The PHY is doing rate matchion from the media rate (in 1219 * the link_state) to the interface speed, and will send 1220 * pause frames to the MAC to limit its transmission speed. 1221 */ 1222 speed = phylink_interface_max_speed(link_state.interface); 1223 duplex = DUPLEX_FULL; 1224 rx_pause = true; 1225 break; 1226 1227 case RATE_MATCH_CRS: 1228 /* The PHY is doing rate matchion from the media rate (in 1229 * the link_state) to the interface speed, and will cause 1230 * collisions to the MAC to limit its transmission speed. 1231 */ 1232 speed = phylink_interface_max_speed(link_state.interface); 1233 duplex = DUPLEX_HALF; 1234 break; 1235 } 1236 1237 pl->cur_interface = link_state.interface; 1238 1239 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1240 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1241 pl->cur_interface, speed, duplex); 1242 1243 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1244 pl->cur_interface, speed, duplex, 1245 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1246 1247 if (ndev) 1248 netif_carrier_on(ndev); 1249 1250 phylink_info(pl, 1251 "Link is Up - %s/%s - flow control %s\n", 1252 phy_speed_to_str(link_state.speed), 1253 phy_duplex_to_str(link_state.duplex), 1254 phylink_pause_to_str(link_state.pause)); 1255 } 1256 1257 static void phylink_link_down(struct phylink *pl) 1258 { 1259 struct net_device *ndev = pl->netdev; 1260 1261 if (ndev) 1262 netif_carrier_off(ndev); 1263 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1264 pl->cur_interface); 1265 phylink_info(pl, "Link is Down\n"); 1266 } 1267 1268 static void phylink_resolve(struct work_struct *w) 1269 { 1270 struct phylink *pl = container_of(w, struct phylink, resolve); 1271 struct phylink_link_state link_state; 1272 struct net_device *ndev = pl->netdev; 1273 bool mac_config = false; 1274 bool retrigger = false; 1275 bool cur_link_state; 1276 1277 mutex_lock(&pl->state_mutex); 1278 if (pl->netdev) 1279 cur_link_state = netif_carrier_ok(ndev); 1280 else 1281 cur_link_state = pl->old_link_state; 1282 1283 if (pl->phylink_disable_state) { 1284 pl->mac_link_dropped = false; 1285 link_state.link = false; 1286 } else if (pl->mac_link_dropped) { 1287 link_state.link = false; 1288 retrigger = true; 1289 } else { 1290 switch (pl->cur_link_an_mode) { 1291 case MLO_AN_PHY: 1292 link_state = pl->phy_state; 1293 phylink_apply_manual_flow(pl, &link_state); 1294 mac_config = link_state.link; 1295 break; 1296 1297 case MLO_AN_FIXED: 1298 phylink_get_fixed_state(pl, &link_state); 1299 mac_config = link_state.link; 1300 break; 1301 1302 case MLO_AN_INBAND: 1303 phylink_mac_pcs_get_state(pl, &link_state); 1304 1305 /* The PCS may have a latching link-fail indicator. 1306 * If the link was up, bring the link down and 1307 * re-trigger the resolve. Otherwise, re-read the 1308 * PCS state to get the current status of the link. 1309 */ 1310 if (!link_state.link) { 1311 if (cur_link_state) 1312 retrigger = true; 1313 else 1314 phylink_mac_pcs_get_state(pl, 1315 &link_state); 1316 } 1317 1318 /* If we have a phy, the "up" state is the union of 1319 * both the PHY and the MAC 1320 */ 1321 if (pl->phydev) 1322 link_state.link &= pl->phy_state.link; 1323 1324 /* Only update if the PHY link is up */ 1325 if (pl->phydev && pl->phy_state.link) { 1326 /* If the interface has changed, force a 1327 * link down event if the link isn't already 1328 * down, and re-resolve. 1329 */ 1330 if (link_state.interface != 1331 pl->phy_state.interface) { 1332 retrigger = true; 1333 link_state.link = false; 1334 } 1335 link_state.interface = pl->phy_state.interface; 1336 1337 /* If we are doing rate matching, then the 1338 * link speed/duplex comes from the PHY 1339 */ 1340 if (pl->phy_state.rate_matching) { 1341 link_state.rate_matching = 1342 pl->phy_state.rate_matching; 1343 link_state.speed = pl->phy_state.speed; 1344 link_state.duplex = 1345 pl->phy_state.duplex; 1346 } 1347 1348 /* If we have a PHY, we need to update with 1349 * the PHY flow control bits. 1350 */ 1351 link_state.pause = pl->phy_state.pause; 1352 mac_config = true; 1353 } 1354 phylink_apply_manual_flow(pl, &link_state); 1355 break; 1356 } 1357 } 1358 1359 if (mac_config) { 1360 if (link_state.interface != pl->link_config.interface) { 1361 /* The interface has changed, force the link down and 1362 * then reconfigure. 1363 */ 1364 if (cur_link_state) { 1365 phylink_link_down(pl); 1366 cur_link_state = false; 1367 } 1368 phylink_major_config(pl, false, &link_state); 1369 pl->link_config.interface = link_state.interface; 1370 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1371 /* The interface remains unchanged, only the speed, 1372 * duplex or pause settings have changed. Call the 1373 * old mac_config() method to configure the MAC/PCS 1374 * only if we do not have a legacy MAC driver. 1375 */ 1376 phylink_mac_config(pl, &link_state); 1377 } 1378 } 1379 1380 if (link_state.link != cur_link_state) { 1381 pl->old_link_state = link_state.link; 1382 if (!link_state.link) 1383 phylink_link_down(pl); 1384 else 1385 phylink_link_up(pl, link_state); 1386 } 1387 if (!link_state.link && retrigger) { 1388 pl->mac_link_dropped = false; 1389 queue_work(system_power_efficient_wq, &pl->resolve); 1390 } 1391 mutex_unlock(&pl->state_mutex); 1392 } 1393 1394 static void phylink_run_resolve(struct phylink *pl) 1395 { 1396 if (!pl->phylink_disable_state) 1397 queue_work(system_power_efficient_wq, &pl->resolve); 1398 } 1399 1400 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1401 { 1402 unsigned long state = pl->phylink_disable_state; 1403 1404 set_bit(bit, &pl->phylink_disable_state); 1405 if (state == 0) { 1406 queue_work(system_power_efficient_wq, &pl->resolve); 1407 flush_work(&pl->resolve); 1408 } 1409 } 1410 1411 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1412 { 1413 clear_bit(bit, &pl->phylink_disable_state); 1414 phylink_run_resolve(pl); 1415 } 1416 1417 static void phylink_fixed_poll(struct timer_list *t) 1418 { 1419 struct phylink *pl = container_of(t, struct phylink, link_poll); 1420 1421 mod_timer(t, jiffies + HZ); 1422 1423 phylink_run_resolve(pl); 1424 } 1425 1426 static const struct sfp_upstream_ops sfp_phylink_ops; 1427 1428 static int phylink_register_sfp(struct phylink *pl, 1429 struct fwnode_handle *fwnode) 1430 { 1431 struct sfp_bus *bus; 1432 int ret; 1433 1434 if (!fwnode) 1435 return 0; 1436 1437 bus = sfp_bus_find_fwnode(fwnode); 1438 if (IS_ERR(bus)) { 1439 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1440 return PTR_ERR(bus); 1441 } 1442 1443 pl->sfp_bus = bus; 1444 1445 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1446 sfp_bus_put(bus); 1447 1448 return ret; 1449 } 1450 1451 /** 1452 * phylink_create() - create a phylink instance 1453 * @config: a pointer to the target &struct phylink_config 1454 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1455 * interface 1456 * @iface: the desired link mode defined by &typedef phy_interface_t 1457 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1458 * 1459 * Create a new phylink instance, and parse the link parameters found in @np. 1460 * This will parse in-band modes, fixed-link or SFP configuration. 1461 * 1462 * Note: the rtnl lock must not be held when calling this function. 1463 * 1464 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1465 * must use IS_ERR() to check for errors from this function. 1466 */ 1467 struct phylink *phylink_create(struct phylink_config *config, 1468 struct fwnode_handle *fwnode, 1469 phy_interface_t iface, 1470 const struct phylink_mac_ops *mac_ops) 1471 { 1472 bool using_mac_select_pcs = false; 1473 struct phylink *pl; 1474 int ret; 1475 1476 if (mac_ops->mac_select_pcs && 1477 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1478 ERR_PTR(-EOPNOTSUPP)) 1479 using_mac_select_pcs = true; 1480 1481 /* Validate the supplied configuration */ 1482 if (using_mac_select_pcs && 1483 phy_interface_empty(config->supported_interfaces)) { 1484 dev_err(config->dev, 1485 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1486 return ERR_PTR(-EINVAL); 1487 } 1488 1489 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1490 if (!pl) 1491 return ERR_PTR(-ENOMEM); 1492 1493 mutex_init(&pl->state_mutex); 1494 INIT_WORK(&pl->resolve, phylink_resolve); 1495 1496 pl->config = config; 1497 if (config->type == PHYLINK_NETDEV) { 1498 pl->netdev = to_net_dev(config->dev); 1499 } else if (config->type == PHYLINK_DEV) { 1500 pl->dev = config->dev; 1501 } else { 1502 kfree(pl); 1503 return ERR_PTR(-EINVAL); 1504 } 1505 1506 pl->using_mac_select_pcs = using_mac_select_pcs; 1507 pl->phy_state.interface = iface; 1508 pl->link_interface = iface; 1509 if (iface == PHY_INTERFACE_MODE_MOCA) 1510 pl->link_port = PORT_BNC; 1511 else 1512 pl->link_port = PORT_MII; 1513 pl->link_config.interface = iface; 1514 pl->link_config.pause = MLO_PAUSE_AN; 1515 pl->link_config.speed = SPEED_UNKNOWN; 1516 pl->link_config.duplex = DUPLEX_UNKNOWN; 1517 pl->link_config.an_enabled = true; 1518 pl->mac_ops = mac_ops; 1519 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1520 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1521 1522 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1523 linkmode_copy(pl->link_config.advertising, pl->supported); 1524 phylink_validate(pl, pl->supported, &pl->link_config); 1525 1526 ret = phylink_parse_mode(pl, fwnode); 1527 if (ret < 0) { 1528 kfree(pl); 1529 return ERR_PTR(ret); 1530 } 1531 1532 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1533 ret = phylink_parse_fixedlink(pl, fwnode); 1534 if (ret < 0) { 1535 kfree(pl); 1536 return ERR_PTR(ret); 1537 } 1538 } 1539 1540 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1541 1542 ret = phylink_register_sfp(pl, fwnode); 1543 if (ret < 0) { 1544 kfree(pl); 1545 return ERR_PTR(ret); 1546 } 1547 1548 return pl; 1549 } 1550 EXPORT_SYMBOL_GPL(phylink_create); 1551 1552 /** 1553 * phylink_destroy() - cleanup and destroy the phylink instance 1554 * @pl: a pointer to a &struct phylink returned from phylink_create() 1555 * 1556 * Destroy a phylink instance. Any PHY that has been attached must have been 1557 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1558 * 1559 * Note: the rtnl lock must not be held when calling this function. 1560 */ 1561 void phylink_destroy(struct phylink *pl) 1562 { 1563 sfp_bus_del_upstream(pl->sfp_bus); 1564 if (pl->link_gpio) 1565 gpiod_put(pl->link_gpio); 1566 1567 cancel_work_sync(&pl->resolve); 1568 kfree(pl); 1569 } 1570 EXPORT_SYMBOL_GPL(phylink_destroy); 1571 1572 static void phylink_phy_change(struct phy_device *phydev, bool up) 1573 { 1574 struct phylink *pl = phydev->phylink; 1575 bool tx_pause, rx_pause; 1576 1577 phy_get_pause(phydev, &tx_pause, &rx_pause); 1578 1579 mutex_lock(&pl->state_mutex); 1580 pl->phy_state.speed = phydev->speed; 1581 pl->phy_state.duplex = phydev->duplex; 1582 pl->phy_state.rate_matching = phydev->rate_matching; 1583 pl->phy_state.pause = MLO_PAUSE_NONE; 1584 if (tx_pause) 1585 pl->phy_state.pause |= MLO_PAUSE_TX; 1586 if (rx_pause) 1587 pl->phy_state.pause |= MLO_PAUSE_RX; 1588 pl->phy_state.interface = phydev->interface; 1589 pl->phy_state.link = up; 1590 mutex_unlock(&pl->state_mutex); 1591 1592 phylink_run_resolve(pl); 1593 1594 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1595 phy_modes(phydev->interface), 1596 phy_speed_to_str(phydev->speed), 1597 phy_duplex_to_str(phydev->duplex), 1598 phy_rate_matching_to_str(phydev->rate_matching), 1599 phylink_pause_to_str(pl->phy_state.pause)); 1600 } 1601 1602 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1603 phy_interface_t interface) 1604 { 1605 struct phylink_link_state config; 1606 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1607 char *irq_str; 1608 int ret; 1609 1610 /* 1611 * This is the new way of dealing with flow control for PHYs, 1612 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1613 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1614 * using our validate call to the MAC, we rely upon the MAC 1615 * clearing the bits from both supported and advertising fields. 1616 */ 1617 phy_support_asym_pause(phy); 1618 1619 memset(&config, 0, sizeof(config)); 1620 linkmode_copy(supported, phy->supported); 1621 linkmode_copy(config.advertising, phy->advertising); 1622 1623 /* Clause 45 PHYs switch their Serdes lane between several different 1624 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1625 * speeds. We really need to know which interface modes the PHY and 1626 * MAC supports to properly work out which linkmodes can be supported. 1627 */ 1628 if (phy->is_c45 && 1629 interface != PHY_INTERFACE_MODE_RXAUI && 1630 interface != PHY_INTERFACE_MODE_XAUI && 1631 interface != PHY_INTERFACE_MODE_USXGMII) 1632 config.interface = PHY_INTERFACE_MODE_NA; 1633 else 1634 config.interface = interface; 1635 config.rate_matching = phy_get_rate_matching(phy, config.interface); 1636 1637 ret = phylink_validate(pl, supported, &config); 1638 if (ret) { 1639 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1640 phy_modes(config.interface), 1641 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1642 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1643 ERR_PTR(ret)); 1644 return ret; 1645 } 1646 1647 phy->phylink = pl; 1648 phy->phy_link_change = phylink_phy_change; 1649 1650 irq_str = phy_attached_info_irq(phy); 1651 phylink_info(pl, 1652 "PHY [%s] driver [%s] (irq=%s)\n", 1653 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1654 kfree(irq_str); 1655 1656 mutex_lock(&phy->lock); 1657 mutex_lock(&pl->state_mutex); 1658 pl->phydev = phy; 1659 pl->phy_state.interface = interface; 1660 pl->phy_state.pause = MLO_PAUSE_NONE; 1661 pl->phy_state.speed = SPEED_UNKNOWN; 1662 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1663 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1664 linkmode_copy(pl->supported, supported); 1665 linkmode_copy(pl->link_config.advertising, config.advertising); 1666 1667 /* Restrict the phy advertisement according to the MAC support. */ 1668 linkmode_copy(phy->advertising, config.advertising); 1669 mutex_unlock(&pl->state_mutex); 1670 mutex_unlock(&phy->lock); 1671 1672 phylink_dbg(pl, 1673 "phy: %s setting supported %*pb advertising %*pb\n", 1674 phy_modes(interface), 1675 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1676 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1677 1678 if (phy_interrupt_is_valid(phy)) 1679 phy_request_interrupt(phy); 1680 1681 return 0; 1682 } 1683 1684 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1685 phy_interface_t interface) 1686 { 1687 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1688 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1689 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1690 return -EINVAL; 1691 1692 if (pl->phydev) 1693 return -EBUSY; 1694 1695 return phy_attach_direct(pl->netdev, phy, 0, interface); 1696 } 1697 1698 /** 1699 * phylink_connect_phy() - connect a PHY to the phylink instance 1700 * @pl: a pointer to a &struct phylink returned from phylink_create() 1701 * @phy: a pointer to a &struct phy_device. 1702 * 1703 * Connect @phy to the phylink instance specified by @pl by calling 1704 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1705 * capabilities, start the PHYLIB state machine and enable any interrupts 1706 * that the PHY supports. 1707 * 1708 * This updates the phylink's ethtool supported and advertising link mode 1709 * masks. 1710 * 1711 * Returns 0 on success or a negative errno. 1712 */ 1713 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1714 { 1715 int ret; 1716 1717 /* Use PHY device/driver interface */ 1718 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1719 pl->link_interface = phy->interface; 1720 pl->link_config.interface = pl->link_interface; 1721 } 1722 1723 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1724 if (ret < 0) 1725 return ret; 1726 1727 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1728 if (ret) 1729 phy_detach(phy); 1730 1731 return ret; 1732 } 1733 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1734 1735 /** 1736 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1737 * @pl: a pointer to a &struct phylink returned from phylink_create() 1738 * @dn: a pointer to a &struct device_node. 1739 * @flags: PHY-specific flags to communicate to the PHY device driver 1740 * 1741 * Connect the phy specified in the device node @dn to the phylink instance 1742 * specified by @pl. Actions specified in phylink_connect_phy() will be 1743 * performed. 1744 * 1745 * Returns 0 on success or a negative errno. 1746 */ 1747 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1748 u32 flags) 1749 { 1750 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1751 } 1752 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1753 1754 /** 1755 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1756 * @pl: a pointer to a &struct phylink returned from phylink_create() 1757 * @fwnode: a pointer to a &struct fwnode_handle. 1758 * @flags: PHY-specific flags to communicate to the PHY device driver 1759 * 1760 * Connect the phy specified @fwnode to the phylink instance specified 1761 * by @pl. 1762 * 1763 * Returns 0 on success or a negative errno. 1764 */ 1765 int phylink_fwnode_phy_connect(struct phylink *pl, 1766 struct fwnode_handle *fwnode, 1767 u32 flags) 1768 { 1769 struct fwnode_handle *phy_fwnode; 1770 struct phy_device *phy_dev; 1771 int ret; 1772 1773 /* Fixed links and 802.3z are handled without needing a PHY */ 1774 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1775 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1776 phy_interface_mode_is_8023z(pl->link_interface))) 1777 return 0; 1778 1779 phy_fwnode = fwnode_get_phy_node(fwnode); 1780 if (IS_ERR(phy_fwnode)) { 1781 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1782 return -ENODEV; 1783 return 0; 1784 } 1785 1786 phy_dev = fwnode_phy_find_device(phy_fwnode); 1787 /* We're done with the phy_node handle */ 1788 fwnode_handle_put(phy_fwnode); 1789 if (!phy_dev) 1790 return -ENODEV; 1791 1792 /* Use PHY device/driver interface */ 1793 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1794 pl->link_interface = phy_dev->interface; 1795 pl->link_config.interface = pl->link_interface; 1796 } 1797 1798 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1799 pl->link_interface); 1800 if (ret) { 1801 phy_device_free(phy_dev); 1802 return ret; 1803 } 1804 1805 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1806 if (ret) 1807 phy_detach(phy_dev); 1808 1809 return ret; 1810 } 1811 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1812 1813 /** 1814 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1815 * instance. 1816 * @pl: a pointer to a &struct phylink returned from phylink_create() 1817 * 1818 * Disconnect any current PHY from the phylink instance described by @pl. 1819 */ 1820 void phylink_disconnect_phy(struct phylink *pl) 1821 { 1822 struct phy_device *phy; 1823 1824 ASSERT_RTNL(); 1825 1826 phy = pl->phydev; 1827 if (phy) { 1828 mutex_lock(&phy->lock); 1829 mutex_lock(&pl->state_mutex); 1830 pl->phydev = NULL; 1831 mutex_unlock(&pl->state_mutex); 1832 mutex_unlock(&phy->lock); 1833 flush_work(&pl->resolve); 1834 1835 phy_disconnect(phy); 1836 } 1837 } 1838 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1839 1840 /** 1841 * phylink_mac_change() - notify phylink of a change in MAC state 1842 * @pl: a pointer to a &struct phylink returned from phylink_create() 1843 * @up: indicates whether the link is currently up. 1844 * 1845 * The MAC driver should call this driver when the state of its link 1846 * changes (eg, link failure, new negotiation results, etc.) 1847 */ 1848 void phylink_mac_change(struct phylink *pl, bool up) 1849 { 1850 if (!up) 1851 pl->mac_link_dropped = true; 1852 phylink_run_resolve(pl); 1853 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1854 } 1855 EXPORT_SYMBOL_GPL(phylink_mac_change); 1856 1857 static irqreturn_t phylink_link_handler(int irq, void *data) 1858 { 1859 struct phylink *pl = data; 1860 1861 phylink_run_resolve(pl); 1862 1863 return IRQ_HANDLED; 1864 } 1865 1866 /** 1867 * phylink_start() - start a phylink instance 1868 * @pl: a pointer to a &struct phylink returned from phylink_create() 1869 * 1870 * Start the phylink instance specified by @pl, configuring the MAC for the 1871 * desired link mode(s) and negotiation style. This should be called from the 1872 * network device driver's &struct net_device_ops ndo_open() method. 1873 */ 1874 void phylink_start(struct phylink *pl) 1875 { 1876 bool poll = false; 1877 1878 ASSERT_RTNL(); 1879 1880 phylink_info(pl, "configuring for %s/%s link mode\n", 1881 phylink_an_mode_str(pl->cur_link_an_mode), 1882 phy_modes(pl->link_config.interface)); 1883 1884 /* Always set the carrier off */ 1885 if (pl->netdev) 1886 netif_carrier_off(pl->netdev); 1887 1888 /* Apply the link configuration to the MAC when starting. This allows 1889 * a fixed-link to start with the correct parameters, and also 1890 * ensures that we set the appropriate advertisement for Serdes links. 1891 * 1892 * Restart autonegotiation if using 802.3z to ensure that the link 1893 * parameters are properly negotiated. This is necessary for DSA 1894 * switches using 802.3z negotiation to ensure they see our modes. 1895 */ 1896 phylink_mac_initial_config(pl, true); 1897 1898 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1899 1900 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1901 int irq = gpiod_to_irq(pl->link_gpio); 1902 1903 if (irq > 0) { 1904 if (!request_irq(irq, phylink_link_handler, 1905 IRQF_TRIGGER_RISING | 1906 IRQF_TRIGGER_FALLING, 1907 "netdev link", pl)) 1908 pl->link_irq = irq; 1909 else 1910 irq = 0; 1911 } 1912 if (irq <= 0) 1913 poll = true; 1914 } 1915 1916 switch (pl->cfg_link_an_mode) { 1917 case MLO_AN_FIXED: 1918 poll |= pl->config->poll_fixed_state; 1919 break; 1920 case MLO_AN_INBAND: 1921 if (pl->pcs) 1922 poll |= pl->pcs->poll; 1923 break; 1924 } 1925 if (poll) 1926 mod_timer(&pl->link_poll, jiffies + HZ); 1927 if (pl->phydev) 1928 phy_start(pl->phydev); 1929 if (pl->sfp_bus) 1930 sfp_upstream_start(pl->sfp_bus); 1931 } 1932 EXPORT_SYMBOL_GPL(phylink_start); 1933 1934 /** 1935 * phylink_stop() - stop a phylink instance 1936 * @pl: a pointer to a &struct phylink returned from phylink_create() 1937 * 1938 * Stop the phylink instance specified by @pl. This should be called from the 1939 * network device driver's &struct net_device_ops ndo_stop() method. The 1940 * network device's carrier state should not be changed prior to calling this 1941 * function. 1942 * 1943 * This will synchronously bring down the link if the link is not already 1944 * down (in other words, it will trigger a mac_link_down() method call.) 1945 */ 1946 void phylink_stop(struct phylink *pl) 1947 { 1948 ASSERT_RTNL(); 1949 1950 if (pl->sfp_bus) 1951 sfp_upstream_stop(pl->sfp_bus); 1952 if (pl->phydev) 1953 phy_stop(pl->phydev); 1954 del_timer_sync(&pl->link_poll); 1955 if (pl->link_irq) { 1956 free_irq(pl->link_irq, pl); 1957 pl->link_irq = 0; 1958 } 1959 1960 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1961 } 1962 EXPORT_SYMBOL_GPL(phylink_stop); 1963 1964 /** 1965 * phylink_suspend() - handle a network device suspend event 1966 * @pl: a pointer to a &struct phylink returned from phylink_create() 1967 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1968 * 1969 * Handle a network device suspend event. There are several cases: 1970 * 1971 * - If Wake-on-Lan is not active, we can bring down the link between 1972 * the MAC and PHY by calling phylink_stop(). 1973 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1974 * can also bring down the link between the MAC and PHY. 1975 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1976 * still needs to receive packets, so we can not bring the link down. 1977 */ 1978 void phylink_suspend(struct phylink *pl, bool mac_wol) 1979 { 1980 ASSERT_RTNL(); 1981 1982 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1983 /* Wake-on-Lan enabled, MAC handling */ 1984 mutex_lock(&pl->state_mutex); 1985 1986 /* Stop the resolver bringing the link up */ 1987 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1988 1989 /* Disable the carrier, to prevent transmit timeouts, 1990 * but one would hope all packets have been sent. This 1991 * also means phylink_resolve() will do nothing. 1992 */ 1993 if (pl->netdev) 1994 netif_carrier_off(pl->netdev); 1995 else 1996 pl->old_link_state = false; 1997 1998 /* We do not call mac_link_down() here as we want the 1999 * link to remain up to receive the WoL packets. 2000 */ 2001 mutex_unlock(&pl->state_mutex); 2002 } else { 2003 phylink_stop(pl); 2004 } 2005 } 2006 EXPORT_SYMBOL_GPL(phylink_suspend); 2007 2008 /** 2009 * phylink_resume() - handle a network device resume event 2010 * @pl: a pointer to a &struct phylink returned from phylink_create() 2011 * 2012 * Undo the effects of phylink_suspend(), returning the link to an 2013 * operational state. 2014 */ 2015 void phylink_resume(struct phylink *pl) 2016 { 2017 ASSERT_RTNL(); 2018 2019 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2020 /* Wake-on-Lan enabled, MAC handling */ 2021 2022 /* Call mac_link_down() so we keep the overall state balanced. 2023 * Do this under the state_mutex lock for consistency. This 2024 * will cause a "Link Down" message to be printed during 2025 * resume, which is harmless - the true link state will be 2026 * printed when we run a resolve. 2027 */ 2028 mutex_lock(&pl->state_mutex); 2029 phylink_link_down(pl); 2030 mutex_unlock(&pl->state_mutex); 2031 2032 /* Re-apply the link parameters so that all the settings get 2033 * restored to the MAC. 2034 */ 2035 phylink_mac_initial_config(pl, true); 2036 2037 /* Re-enable and re-resolve the link parameters */ 2038 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2039 } else { 2040 phylink_start(pl); 2041 } 2042 } 2043 EXPORT_SYMBOL_GPL(phylink_resume); 2044 2045 /** 2046 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2047 * @pl: a pointer to a &struct phylink returned from phylink_create() 2048 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2049 * 2050 * Read the wake on lan parameters from the PHY attached to the phylink 2051 * instance specified by @pl. If no PHY is currently attached, report no 2052 * support for wake on lan. 2053 */ 2054 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2055 { 2056 ASSERT_RTNL(); 2057 2058 wol->supported = 0; 2059 wol->wolopts = 0; 2060 2061 if (pl->phydev) 2062 phy_ethtool_get_wol(pl->phydev, wol); 2063 } 2064 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2065 2066 /** 2067 * phylink_ethtool_set_wol() - set wake on lan parameters 2068 * @pl: a pointer to a &struct phylink returned from phylink_create() 2069 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2070 * 2071 * Set the wake on lan parameters for the PHY attached to the phylink 2072 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2073 * error. 2074 * 2075 * Returns zero on success or negative errno code. 2076 */ 2077 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2078 { 2079 int ret = -EOPNOTSUPP; 2080 2081 ASSERT_RTNL(); 2082 2083 if (pl->phydev) 2084 ret = phy_ethtool_set_wol(pl->phydev, wol); 2085 2086 return ret; 2087 } 2088 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2089 2090 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2091 { 2092 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2093 2094 linkmode_zero(mask); 2095 phylink_set_port_modes(mask); 2096 2097 linkmode_and(dst, dst, mask); 2098 linkmode_or(dst, dst, b); 2099 } 2100 2101 static void phylink_get_ksettings(const struct phylink_link_state *state, 2102 struct ethtool_link_ksettings *kset) 2103 { 2104 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2105 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2106 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2107 kset->base.speed = state->speed; 2108 kset->base.duplex = state->duplex; 2109 } 2110 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 2111 AUTONEG_DISABLE; 2112 } 2113 2114 /** 2115 * phylink_ethtool_ksettings_get() - get the current link settings 2116 * @pl: a pointer to a &struct phylink returned from phylink_create() 2117 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2118 * 2119 * Read the current link settings for the phylink instance specified by @pl. 2120 * This will be the link settings read from the MAC, PHY or fixed link 2121 * settings depending on the current negotiation mode. 2122 */ 2123 int phylink_ethtool_ksettings_get(struct phylink *pl, 2124 struct ethtool_link_ksettings *kset) 2125 { 2126 struct phylink_link_state link_state; 2127 2128 ASSERT_RTNL(); 2129 2130 if (pl->phydev) 2131 phy_ethtool_ksettings_get(pl->phydev, kset); 2132 else 2133 kset->base.port = pl->link_port; 2134 2135 linkmode_copy(kset->link_modes.supported, pl->supported); 2136 2137 switch (pl->cur_link_an_mode) { 2138 case MLO_AN_FIXED: 2139 /* We are using fixed settings. Report these as the 2140 * current link settings - and note that these also 2141 * represent the supported speeds/duplex/pause modes. 2142 */ 2143 phylink_get_fixed_state(pl, &link_state); 2144 phylink_get_ksettings(&link_state, kset); 2145 break; 2146 2147 case MLO_AN_INBAND: 2148 /* If there is a phy attached, then use the reported 2149 * settings from the phy with no modification. 2150 */ 2151 if (pl->phydev) 2152 break; 2153 2154 phylink_mac_pcs_get_state(pl, &link_state); 2155 2156 /* The MAC is reporting the link results from its own PCS 2157 * layer via in-band status. Report these as the current 2158 * link settings. 2159 */ 2160 phylink_get_ksettings(&link_state, kset); 2161 break; 2162 } 2163 2164 return 0; 2165 } 2166 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2167 2168 /** 2169 * phylink_ethtool_ksettings_set() - set the link settings 2170 * @pl: a pointer to a &struct phylink returned from phylink_create() 2171 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2172 */ 2173 int phylink_ethtool_ksettings_set(struct phylink *pl, 2174 const struct ethtool_link_ksettings *kset) 2175 { 2176 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2177 struct phylink_link_state config; 2178 const struct phy_setting *s; 2179 2180 ASSERT_RTNL(); 2181 2182 if (pl->phydev) { 2183 /* We can rely on phylib for this update; we also do not need 2184 * to update the pl->link_config settings: 2185 * - the configuration returned via ksettings_get() will come 2186 * from phylib whenever a PHY is present. 2187 * - link_config.interface will be updated by the PHY calling 2188 * back via phylink_phy_change() and a subsequent resolve. 2189 * - initial link configuration for PHY mode comes from the 2190 * last phy state updated via phylink_phy_change(). 2191 * - other configuration changes (e.g. pause modes) are 2192 * performed directly via phylib. 2193 * - if in in-band mode with a PHY, the link configuration 2194 * is passed on the link from the PHY, and all of 2195 * link_config.{speed,duplex,an_enabled,pause} are not used. 2196 * - the only possible use would be link_config.advertising 2197 * pause modes when in 1000base-X mode with a PHY, but in 2198 * the presence of a PHY, this should not be changed as that 2199 * should be determined from the media side advertisement. 2200 */ 2201 return phy_ethtool_ksettings_set(pl->phydev, kset); 2202 } 2203 2204 config = pl->link_config; 2205 2206 /* Mask out unsupported advertisements */ 2207 linkmode_and(config.advertising, kset->link_modes.advertising, 2208 pl->supported); 2209 2210 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2211 switch (kset->base.autoneg) { 2212 case AUTONEG_DISABLE: 2213 /* Autonegotiation disabled, select a suitable speed and 2214 * duplex. 2215 */ 2216 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2217 pl->supported, false); 2218 if (!s) 2219 return -EINVAL; 2220 2221 /* If we have a fixed link, refuse to change link parameters. 2222 * If the link parameters match, accept them but do nothing. 2223 */ 2224 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2225 if (s->speed != pl->link_config.speed || 2226 s->duplex != pl->link_config.duplex) 2227 return -EINVAL; 2228 return 0; 2229 } 2230 2231 config.speed = s->speed; 2232 config.duplex = s->duplex; 2233 break; 2234 2235 case AUTONEG_ENABLE: 2236 /* If we have a fixed link, allow autonegotiation (since that 2237 * is our default case) but do not allow the advertisement to 2238 * be changed. If the advertisement matches, simply return. 2239 */ 2240 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2241 if (!linkmode_equal(config.advertising, 2242 pl->link_config.advertising)) 2243 return -EINVAL; 2244 return 0; 2245 } 2246 2247 config.speed = SPEED_UNKNOWN; 2248 config.duplex = DUPLEX_UNKNOWN; 2249 break; 2250 2251 default: 2252 return -EINVAL; 2253 } 2254 2255 /* We have ruled out the case with a PHY attached, and the 2256 * fixed-link cases. All that is left are in-band links. 2257 */ 2258 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2259 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2260 config.an_enabled); 2261 2262 /* If this link is with an SFP, ensure that changes to advertised modes 2263 * also cause the associated interface to be selected such that the 2264 * link can be configured correctly. 2265 */ 2266 if (pl->sfp_bus) { 2267 config.interface = sfp_select_interface(pl->sfp_bus, 2268 config.advertising); 2269 if (config.interface == PHY_INTERFACE_MODE_NA) { 2270 phylink_err(pl, 2271 "selection of interface failed, advertisement %*pb\n", 2272 __ETHTOOL_LINK_MODE_MASK_NBITS, 2273 config.advertising); 2274 return -EINVAL; 2275 } 2276 2277 /* Revalidate with the selected interface */ 2278 linkmode_copy(support, pl->supported); 2279 if (phylink_validate(pl, support, &config)) { 2280 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2281 phylink_an_mode_str(pl->cur_link_an_mode), 2282 phy_modes(config.interface), 2283 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2284 return -EINVAL; 2285 } 2286 } else { 2287 /* Validate without changing the current supported mask. */ 2288 linkmode_copy(support, pl->supported); 2289 if (phylink_validate(pl, support, &config)) 2290 return -EINVAL; 2291 } 2292 2293 /* If autonegotiation is enabled, we must have an advertisement */ 2294 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2295 return -EINVAL; 2296 2297 mutex_lock(&pl->state_mutex); 2298 pl->link_config.speed = config.speed; 2299 pl->link_config.duplex = config.duplex; 2300 pl->link_config.an_enabled = config.an_enabled; 2301 2302 if (pl->link_config.interface != config.interface) { 2303 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2304 /* We need to force the link down, then change the interface */ 2305 if (pl->old_link_state) { 2306 phylink_link_down(pl); 2307 pl->old_link_state = false; 2308 } 2309 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2310 &pl->phylink_disable_state)) 2311 phylink_major_config(pl, false, &config); 2312 pl->link_config.interface = config.interface; 2313 linkmode_copy(pl->link_config.advertising, config.advertising); 2314 } else if (!linkmode_equal(pl->link_config.advertising, 2315 config.advertising)) { 2316 linkmode_copy(pl->link_config.advertising, config.advertising); 2317 phylink_change_inband_advert(pl); 2318 } 2319 mutex_unlock(&pl->state_mutex); 2320 2321 return 0; 2322 } 2323 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2324 2325 /** 2326 * phylink_ethtool_nway_reset() - restart negotiation 2327 * @pl: a pointer to a &struct phylink returned from phylink_create() 2328 * 2329 * Restart negotiation for the phylink instance specified by @pl. This will 2330 * cause any attached phy to restart negotiation with the link partner, and 2331 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2332 * negotiation. 2333 * 2334 * Returns zero on success, or negative error code. 2335 */ 2336 int phylink_ethtool_nway_reset(struct phylink *pl) 2337 { 2338 int ret = 0; 2339 2340 ASSERT_RTNL(); 2341 2342 if (pl->phydev) 2343 ret = phy_restart_aneg(pl->phydev); 2344 phylink_mac_pcs_an_restart(pl); 2345 2346 return ret; 2347 } 2348 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2349 2350 /** 2351 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2352 * @pl: a pointer to a &struct phylink returned from phylink_create() 2353 * @pause: a pointer to a &struct ethtool_pauseparam 2354 */ 2355 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2356 struct ethtool_pauseparam *pause) 2357 { 2358 ASSERT_RTNL(); 2359 2360 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2361 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2362 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2363 } 2364 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2365 2366 /** 2367 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2368 * @pl: a pointer to a &struct phylink returned from phylink_create() 2369 * @pause: a pointer to a &struct ethtool_pauseparam 2370 */ 2371 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2372 struct ethtool_pauseparam *pause) 2373 { 2374 struct phylink_link_state *config = &pl->link_config; 2375 bool manual_changed; 2376 int pause_state; 2377 2378 ASSERT_RTNL(); 2379 2380 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2381 return -EOPNOTSUPP; 2382 2383 if (!phylink_test(pl->supported, Pause) && 2384 !phylink_test(pl->supported, Asym_Pause)) 2385 return -EOPNOTSUPP; 2386 2387 if (!phylink_test(pl->supported, Asym_Pause) && 2388 pause->rx_pause != pause->tx_pause) 2389 return -EINVAL; 2390 2391 pause_state = 0; 2392 if (pause->autoneg) 2393 pause_state |= MLO_PAUSE_AN; 2394 if (pause->rx_pause) 2395 pause_state |= MLO_PAUSE_RX; 2396 if (pause->tx_pause) 2397 pause_state |= MLO_PAUSE_TX; 2398 2399 mutex_lock(&pl->state_mutex); 2400 /* 2401 * See the comments for linkmode_set_pause(), wrt the deficiencies 2402 * with the current implementation. A solution to this issue would 2403 * be: 2404 * ethtool Local device 2405 * rx tx Pause AsymDir 2406 * 0 0 0 0 2407 * 1 0 1 1 2408 * 0 1 0 1 2409 * 1 1 1 1 2410 * and then use the ethtool rx/tx enablement status to mask the 2411 * rx/tx pause resolution. 2412 */ 2413 linkmode_set_pause(config->advertising, pause->tx_pause, 2414 pause->rx_pause); 2415 2416 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2417 (!(pause_state & MLO_PAUSE_AN) && 2418 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2419 2420 config->pause = pause_state; 2421 2422 /* Update our in-band advertisement, triggering a renegotiation if 2423 * the advertisement changed. 2424 */ 2425 if (!pl->phydev) 2426 phylink_change_inband_advert(pl); 2427 2428 mutex_unlock(&pl->state_mutex); 2429 2430 /* If we have a PHY, a change of the pause frame advertisement will 2431 * cause phylib to renegotiate (if AN is enabled) which will in turn 2432 * call our phylink_phy_change() and trigger a resolve. Note that 2433 * we can't hold our state mutex while calling phy_set_asym_pause(). 2434 */ 2435 if (pl->phydev) 2436 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2437 pause->tx_pause); 2438 2439 /* If the manual pause settings changed, make sure we trigger a 2440 * resolve to update their state; we can not guarantee that the 2441 * link will cycle. 2442 */ 2443 if (manual_changed) { 2444 pl->mac_link_dropped = true; 2445 phylink_run_resolve(pl); 2446 } 2447 2448 return 0; 2449 } 2450 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2451 2452 /** 2453 * phylink_get_eee_err() - read the energy efficient ethernet error 2454 * counter 2455 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2456 * 2457 * Read the Energy Efficient Ethernet error counter from the PHY associated 2458 * with the phylink instance specified by @pl. 2459 * 2460 * Returns positive error counter value, or negative error code. 2461 */ 2462 int phylink_get_eee_err(struct phylink *pl) 2463 { 2464 int ret = 0; 2465 2466 ASSERT_RTNL(); 2467 2468 if (pl->phydev) 2469 ret = phy_get_eee_err(pl->phydev); 2470 2471 return ret; 2472 } 2473 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2474 2475 /** 2476 * phylink_init_eee() - init and check the EEE features 2477 * @pl: a pointer to a &struct phylink returned from phylink_create() 2478 * @clk_stop_enable: allow PHY to stop receive clock 2479 * 2480 * Must be called either with RTNL held or within mac_link_up() 2481 */ 2482 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2483 { 2484 int ret = -EOPNOTSUPP; 2485 2486 if (pl->phydev) 2487 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2488 2489 return ret; 2490 } 2491 EXPORT_SYMBOL_GPL(phylink_init_eee); 2492 2493 /** 2494 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2495 * @pl: a pointer to a &struct phylink returned from phylink_create() 2496 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2497 */ 2498 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2499 { 2500 int ret = -EOPNOTSUPP; 2501 2502 ASSERT_RTNL(); 2503 2504 if (pl->phydev) 2505 ret = phy_ethtool_get_eee(pl->phydev, eee); 2506 2507 return ret; 2508 } 2509 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2510 2511 /** 2512 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2513 * @pl: a pointer to a &struct phylink returned from phylink_create() 2514 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2515 */ 2516 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2517 { 2518 int ret = -EOPNOTSUPP; 2519 2520 ASSERT_RTNL(); 2521 2522 if (pl->phydev) 2523 ret = phy_ethtool_set_eee(pl->phydev, eee); 2524 2525 return ret; 2526 } 2527 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2528 2529 /* This emulates MII registers for a fixed-mode phy operating as per the 2530 * passed in state. "aneg" defines if we report negotiation is possible. 2531 * 2532 * FIXME: should deal with negotiation state too. 2533 */ 2534 static int phylink_mii_emul_read(unsigned int reg, 2535 struct phylink_link_state *state) 2536 { 2537 struct fixed_phy_status fs; 2538 unsigned long *lpa = state->lp_advertising; 2539 int val; 2540 2541 fs.link = state->link; 2542 fs.speed = state->speed; 2543 fs.duplex = state->duplex; 2544 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2545 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2546 2547 val = swphy_read_reg(reg, &fs); 2548 if (reg == MII_BMSR) { 2549 if (!state->an_complete) 2550 val &= ~BMSR_ANEGCOMPLETE; 2551 } 2552 return val; 2553 } 2554 2555 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2556 unsigned int reg) 2557 { 2558 struct phy_device *phydev = pl->phydev; 2559 int prtad, devad; 2560 2561 if (mdio_phy_id_is_c45(phy_id)) { 2562 prtad = mdio_phy_id_prtad(phy_id); 2563 devad = mdio_phy_id_devad(phy_id); 2564 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2565 reg); 2566 } 2567 2568 if (phydev->is_c45) { 2569 switch (reg) { 2570 case MII_BMCR: 2571 case MII_BMSR: 2572 case MII_PHYSID1: 2573 case MII_PHYSID2: 2574 devad = __ffs(phydev->c45_ids.mmds_present); 2575 break; 2576 case MII_ADVERTISE: 2577 case MII_LPA: 2578 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2579 return -EINVAL; 2580 devad = MDIO_MMD_AN; 2581 if (reg == MII_ADVERTISE) 2582 reg = MDIO_AN_ADVERTISE; 2583 else 2584 reg = MDIO_AN_LPA; 2585 break; 2586 default: 2587 return -EINVAL; 2588 } 2589 prtad = phy_id; 2590 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2591 reg); 2592 } 2593 2594 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2595 } 2596 2597 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2598 unsigned int reg, unsigned int val) 2599 { 2600 struct phy_device *phydev = pl->phydev; 2601 int prtad, devad; 2602 2603 if (mdio_phy_id_is_c45(phy_id)) { 2604 prtad = mdio_phy_id_prtad(phy_id); 2605 devad = mdio_phy_id_devad(phy_id); 2606 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2607 reg, val); 2608 } 2609 2610 if (phydev->is_c45) { 2611 switch (reg) { 2612 case MII_BMCR: 2613 case MII_BMSR: 2614 case MII_PHYSID1: 2615 case MII_PHYSID2: 2616 devad = __ffs(phydev->c45_ids.mmds_present); 2617 break; 2618 case MII_ADVERTISE: 2619 case MII_LPA: 2620 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2621 return -EINVAL; 2622 devad = MDIO_MMD_AN; 2623 if (reg == MII_ADVERTISE) 2624 reg = MDIO_AN_ADVERTISE; 2625 else 2626 reg = MDIO_AN_LPA; 2627 break; 2628 default: 2629 return -EINVAL; 2630 } 2631 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2632 reg, val); 2633 } 2634 2635 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2636 } 2637 2638 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2639 unsigned int reg) 2640 { 2641 struct phylink_link_state state; 2642 int val = 0xffff; 2643 2644 switch (pl->cur_link_an_mode) { 2645 case MLO_AN_FIXED: 2646 if (phy_id == 0) { 2647 phylink_get_fixed_state(pl, &state); 2648 val = phylink_mii_emul_read(reg, &state); 2649 } 2650 break; 2651 2652 case MLO_AN_PHY: 2653 return -EOPNOTSUPP; 2654 2655 case MLO_AN_INBAND: 2656 if (phy_id == 0) { 2657 phylink_mac_pcs_get_state(pl, &state); 2658 val = phylink_mii_emul_read(reg, &state); 2659 } 2660 break; 2661 } 2662 2663 return val & 0xffff; 2664 } 2665 2666 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2667 unsigned int reg, unsigned int val) 2668 { 2669 switch (pl->cur_link_an_mode) { 2670 case MLO_AN_FIXED: 2671 break; 2672 2673 case MLO_AN_PHY: 2674 return -EOPNOTSUPP; 2675 2676 case MLO_AN_INBAND: 2677 break; 2678 } 2679 2680 return 0; 2681 } 2682 2683 /** 2684 * phylink_mii_ioctl() - generic mii ioctl interface 2685 * @pl: a pointer to a &struct phylink returned from phylink_create() 2686 * @ifr: a pointer to a &struct ifreq for socket ioctls 2687 * @cmd: ioctl cmd to execute 2688 * 2689 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2690 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2691 * 2692 * Returns: zero on success or negative error code. 2693 * 2694 * %SIOCGMIIPHY: 2695 * read register from the current PHY. 2696 * %SIOCGMIIREG: 2697 * read register from the specified PHY. 2698 * %SIOCSMIIREG: 2699 * set a register on the specified PHY. 2700 */ 2701 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2702 { 2703 struct mii_ioctl_data *mii = if_mii(ifr); 2704 int ret; 2705 2706 ASSERT_RTNL(); 2707 2708 if (pl->phydev) { 2709 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2710 switch (cmd) { 2711 case SIOCGMIIPHY: 2712 mii->phy_id = pl->phydev->mdio.addr; 2713 fallthrough; 2714 2715 case SIOCGMIIREG: 2716 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2717 if (ret >= 0) { 2718 mii->val_out = ret; 2719 ret = 0; 2720 } 2721 break; 2722 2723 case SIOCSMIIREG: 2724 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2725 mii->val_in); 2726 break; 2727 2728 default: 2729 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2730 break; 2731 } 2732 } else { 2733 switch (cmd) { 2734 case SIOCGMIIPHY: 2735 mii->phy_id = 0; 2736 fallthrough; 2737 2738 case SIOCGMIIREG: 2739 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2740 if (ret >= 0) { 2741 mii->val_out = ret; 2742 ret = 0; 2743 } 2744 break; 2745 2746 case SIOCSMIIREG: 2747 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2748 mii->val_in); 2749 break; 2750 2751 default: 2752 ret = -EOPNOTSUPP; 2753 break; 2754 } 2755 } 2756 2757 return ret; 2758 } 2759 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2760 2761 /** 2762 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2763 * link partners 2764 * @pl: a pointer to a &struct phylink returned from phylink_create() 2765 * @sync: perform action synchronously 2766 * 2767 * If we have a PHY that is not part of a SFP module, then set the speed 2768 * as described in the phy_speed_down() function. Please see this function 2769 * for a description of the @sync parameter. 2770 * 2771 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2772 */ 2773 int phylink_speed_down(struct phylink *pl, bool sync) 2774 { 2775 int ret = 0; 2776 2777 ASSERT_RTNL(); 2778 2779 if (!pl->sfp_bus && pl->phydev) 2780 ret = phy_speed_down(pl->phydev, sync); 2781 2782 return ret; 2783 } 2784 EXPORT_SYMBOL_GPL(phylink_speed_down); 2785 2786 /** 2787 * phylink_speed_up() - restore the advertised speeds prior to the call to 2788 * phylink_speed_down() 2789 * @pl: a pointer to a &struct phylink returned from phylink_create() 2790 * 2791 * If we have a PHY that is not part of a SFP module, then restore the 2792 * PHY speeds as per phy_speed_up(). 2793 * 2794 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2795 */ 2796 int phylink_speed_up(struct phylink *pl) 2797 { 2798 int ret = 0; 2799 2800 ASSERT_RTNL(); 2801 2802 if (!pl->sfp_bus && pl->phydev) 2803 ret = phy_speed_up(pl->phydev); 2804 2805 return ret; 2806 } 2807 EXPORT_SYMBOL_GPL(phylink_speed_up); 2808 2809 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2810 { 2811 struct phylink *pl = upstream; 2812 2813 pl->netdev->sfp_bus = bus; 2814 } 2815 2816 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2817 { 2818 struct phylink *pl = upstream; 2819 2820 pl->netdev->sfp_bus = NULL; 2821 } 2822 2823 static const phy_interface_t phylink_sfp_interface_preference[] = { 2824 PHY_INTERFACE_MODE_25GBASER, 2825 PHY_INTERFACE_MODE_USXGMII, 2826 PHY_INTERFACE_MODE_10GBASER, 2827 PHY_INTERFACE_MODE_5GBASER, 2828 PHY_INTERFACE_MODE_2500BASEX, 2829 PHY_INTERFACE_MODE_SGMII, 2830 PHY_INTERFACE_MODE_1000BASEX, 2831 PHY_INTERFACE_MODE_100BASEX, 2832 }; 2833 2834 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2835 2836 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2837 const unsigned long *intf) 2838 { 2839 phy_interface_t interface; 2840 size_t i; 2841 2842 interface = PHY_INTERFACE_MODE_NA; 2843 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2844 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2845 interface = phylink_sfp_interface_preference[i]; 2846 break; 2847 } 2848 2849 return interface; 2850 } 2851 2852 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2853 unsigned long *supported, 2854 struct phylink_link_state *state) 2855 { 2856 bool changed = false; 2857 2858 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2859 phylink_an_mode_str(mode), phy_modes(state->interface), 2860 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2861 2862 if (!linkmode_equal(pl->supported, supported)) { 2863 linkmode_copy(pl->supported, supported); 2864 changed = true; 2865 } 2866 2867 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2868 linkmode_copy(pl->link_config.advertising, state->advertising); 2869 changed = true; 2870 } 2871 2872 if (pl->cur_link_an_mode != mode || 2873 pl->link_config.interface != state->interface) { 2874 pl->cur_link_an_mode = mode; 2875 pl->link_config.interface = state->interface; 2876 2877 changed = true; 2878 2879 phylink_info(pl, "switched to %s/%s link mode\n", 2880 phylink_an_mode_str(mode), 2881 phy_modes(state->interface)); 2882 } 2883 2884 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2885 &pl->phylink_disable_state)) 2886 phylink_mac_initial_config(pl, false); 2887 } 2888 2889 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2890 struct phy_device *phy) 2891 { 2892 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2893 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2894 struct phylink_link_state config; 2895 phy_interface_t iface; 2896 int ret; 2897 2898 linkmode_copy(support, phy->supported); 2899 2900 memset(&config, 0, sizeof(config)); 2901 linkmode_copy(config.advertising, phy->advertising); 2902 config.interface = PHY_INTERFACE_MODE_NA; 2903 config.speed = SPEED_UNKNOWN; 2904 config.duplex = DUPLEX_UNKNOWN; 2905 config.pause = MLO_PAUSE_AN; 2906 config.an_enabled = pl->link_config.an_enabled; 2907 2908 /* Ignore errors if we're expecting a PHY to attach later */ 2909 ret = phylink_validate(pl, support, &config); 2910 if (ret) { 2911 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2912 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2913 ERR_PTR(ret)); 2914 return ret; 2915 } 2916 2917 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2918 if (iface == PHY_INTERFACE_MODE_NA) { 2919 phylink_err(pl, 2920 "selection of interface failed, advertisement %*pb\n", 2921 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2922 return -EINVAL; 2923 } 2924 2925 config.interface = iface; 2926 linkmode_copy(support1, support); 2927 ret = phylink_validate(pl, support1, &config); 2928 if (ret) { 2929 phylink_err(pl, 2930 "validation of %s/%s with support %*pb failed: %pe\n", 2931 phylink_an_mode_str(mode), 2932 phy_modes(config.interface), 2933 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2934 ERR_PTR(ret)); 2935 return ret; 2936 } 2937 2938 pl->link_port = pl->sfp_port; 2939 2940 phylink_sfp_set_config(pl, mode, support, &config); 2941 2942 return 0; 2943 } 2944 2945 static int phylink_sfp_config_optical(struct phylink *pl) 2946 { 2947 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2948 DECLARE_PHY_INTERFACE_MASK(interfaces); 2949 struct phylink_link_state config; 2950 phy_interface_t interface; 2951 int ret; 2952 2953 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 2954 (int)PHY_INTERFACE_MODE_MAX, 2955 pl->config->supported_interfaces, 2956 (int)PHY_INTERFACE_MODE_MAX, 2957 pl->sfp_interfaces); 2958 2959 /* Find the union of the supported interfaces by the PCS/MAC and 2960 * the SFP module. 2961 */ 2962 phy_interface_and(interfaces, pl->config->supported_interfaces, 2963 pl->sfp_interfaces); 2964 if (phy_interface_empty(interfaces)) { 2965 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 2966 return -EINVAL; 2967 } 2968 2969 memset(&config, 0, sizeof(config)); 2970 linkmode_copy(support, pl->sfp_support); 2971 linkmode_copy(config.advertising, pl->sfp_support); 2972 config.speed = SPEED_UNKNOWN; 2973 config.duplex = DUPLEX_UNKNOWN; 2974 config.pause = MLO_PAUSE_AN; 2975 config.an_enabled = true; 2976 2977 /* For all the interfaces that are supported, reduce the sfp_support 2978 * mask to only those link modes that can be supported. 2979 */ 2980 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 2981 if (ret) { 2982 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 2983 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2984 return ret; 2985 } 2986 2987 interface = phylink_choose_sfp_interface(pl, interfaces); 2988 if (interface == PHY_INTERFACE_MODE_NA) { 2989 phylink_err(pl, "failed to select SFP interface\n"); 2990 return -EINVAL; 2991 } 2992 2993 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 2994 phy_modes(interface)); 2995 2996 config.interface = interface; 2997 2998 /* Ignore errors if we're expecting a PHY to attach later */ 2999 ret = phylink_validate(pl, support, &config); 3000 if (ret) { 3001 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3002 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3003 ERR_PTR(ret)); 3004 return ret; 3005 } 3006 3007 pl->link_port = pl->sfp_port; 3008 3009 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3010 3011 return 0; 3012 } 3013 3014 static int phylink_sfp_module_insert(void *upstream, 3015 const struct sfp_eeprom_id *id) 3016 { 3017 struct phylink *pl = upstream; 3018 3019 ASSERT_RTNL(); 3020 3021 linkmode_zero(pl->sfp_support); 3022 phy_interface_zero(pl->sfp_interfaces); 3023 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3024 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3025 3026 /* If this module may have a PHY connecting later, defer until later */ 3027 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3028 if (pl->sfp_may_have_phy) 3029 return 0; 3030 3031 return phylink_sfp_config_optical(pl); 3032 } 3033 3034 static int phylink_sfp_module_start(void *upstream) 3035 { 3036 struct phylink *pl = upstream; 3037 3038 /* If this SFP module has a PHY, start the PHY now. */ 3039 if (pl->phydev) { 3040 phy_start(pl->phydev); 3041 return 0; 3042 } 3043 3044 /* If the module may have a PHY but we didn't detect one we 3045 * need to configure the MAC here. 3046 */ 3047 if (!pl->sfp_may_have_phy) 3048 return 0; 3049 3050 return phylink_sfp_config_optical(pl); 3051 } 3052 3053 static void phylink_sfp_module_stop(void *upstream) 3054 { 3055 struct phylink *pl = upstream; 3056 3057 /* If this SFP module has a PHY, stop it. */ 3058 if (pl->phydev) 3059 phy_stop(pl->phydev); 3060 } 3061 3062 static void phylink_sfp_link_down(void *upstream) 3063 { 3064 struct phylink *pl = upstream; 3065 3066 ASSERT_RTNL(); 3067 3068 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3069 } 3070 3071 static void phylink_sfp_link_up(void *upstream) 3072 { 3073 struct phylink *pl = upstream; 3074 3075 ASSERT_RTNL(); 3076 3077 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3078 } 3079 3080 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3081 * or 802.3z control word, so inband will not work. 3082 */ 3083 static bool phylink_phy_no_inband(struct phy_device *phy) 3084 { 3085 return phy->is_c45 && 3086 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3087 } 3088 3089 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3090 { 3091 struct phylink *pl = upstream; 3092 phy_interface_t interface; 3093 u8 mode; 3094 int ret; 3095 3096 /* 3097 * This is the new way of dealing with flow control for PHYs, 3098 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3099 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3100 * using our validate call to the MAC, we rely upon the MAC 3101 * clearing the bits from both supported and advertising fields. 3102 */ 3103 phy_support_asym_pause(phy); 3104 3105 if (phylink_phy_no_inband(phy)) 3106 mode = MLO_AN_PHY; 3107 else 3108 mode = MLO_AN_INBAND; 3109 3110 /* Set the PHY's host supported interfaces */ 3111 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3112 pl->config->supported_interfaces); 3113 3114 /* Do the initial configuration */ 3115 ret = phylink_sfp_config_phy(pl, mode, phy); 3116 if (ret < 0) 3117 return ret; 3118 3119 interface = pl->link_config.interface; 3120 ret = phylink_attach_phy(pl, phy, interface); 3121 if (ret < 0) 3122 return ret; 3123 3124 ret = phylink_bringup_phy(pl, phy, interface); 3125 if (ret) 3126 phy_detach(phy); 3127 3128 return ret; 3129 } 3130 3131 static void phylink_sfp_disconnect_phy(void *upstream) 3132 { 3133 phylink_disconnect_phy(upstream); 3134 } 3135 3136 static const struct sfp_upstream_ops sfp_phylink_ops = { 3137 .attach = phylink_sfp_attach, 3138 .detach = phylink_sfp_detach, 3139 .module_insert = phylink_sfp_module_insert, 3140 .module_start = phylink_sfp_module_start, 3141 .module_stop = phylink_sfp_module_stop, 3142 .link_up = phylink_sfp_link_up, 3143 .link_down = phylink_sfp_link_down, 3144 .connect_phy = phylink_sfp_connect_phy, 3145 .disconnect_phy = phylink_sfp_disconnect_phy, 3146 }; 3147 3148 /* Helpers for MAC drivers */ 3149 3150 static void phylink_decode_c37_word(struct phylink_link_state *state, 3151 uint16_t config_reg, int speed) 3152 { 3153 bool tx_pause, rx_pause; 3154 int fd_bit; 3155 3156 if (speed == SPEED_2500) 3157 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3158 else 3159 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3160 3161 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3162 3163 if (linkmode_test_bit(fd_bit, state->advertising) && 3164 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3165 state->speed = speed; 3166 state->duplex = DUPLEX_FULL; 3167 } else { 3168 /* negotiation failure */ 3169 state->link = false; 3170 } 3171 3172 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3173 &tx_pause, &rx_pause); 3174 3175 if (tx_pause) 3176 state->pause |= MLO_PAUSE_TX; 3177 if (rx_pause) 3178 state->pause |= MLO_PAUSE_RX; 3179 } 3180 3181 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3182 uint16_t config_reg) 3183 { 3184 if (!(config_reg & LPA_SGMII_LINK)) { 3185 state->link = false; 3186 return; 3187 } 3188 3189 switch (config_reg & LPA_SGMII_SPD_MASK) { 3190 case LPA_SGMII_10: 3191 state->speed = SPEED_10; 3192 break; 3193 case LPA_SGMII_100: 3194 state->speed = SPEED_100; 3195 break; 3196 case LPA_SGMII_1000: 3197 state->speed = SPEED_1000; 3198 break; 3199 default: 3200 state->link = false; 3201 return; 3202 } 3203 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3204 state->duplex = DUPLEX_FULL; 3205 else 3206 state->duplex = DUPLEX_HALF; 3207 } 3208 3209 /** 3210 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3211 * @state: a pointer to a struct phylink_link_state. 3212 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3213 * 3214 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3215 * code word. Decode the USXGMII code word and populate the corresponding fields 3216 * (speed, duplex) into the phylink_link_state structure. 3217 */ 3218 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3219 uint16_t lpa) 3220 { 3221 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3222 case MDIO_USXGMII_10: 3223 state->speed = SPEED_10; 3224 break; 3225 case MDIO_USXGMII_100: 3226 state->speed = SPEED_100; 3227 break; 3228 case MDIO_USXGMII_1000: 3229 state->speed = SPEED_1000; 3230 break; 3231 case MDIO_USXGMII_2500: 3232 state->speed = SPEED_2500; 3233 break; 3234 case MDIO_USXGMII_5000: 3235 state->speed = SPEED_5000; 3236 break; 3237 case MDIO_USXGMII_10G: 3238 state->speed = SPEED_10000; 3239 break; 3240 default: 3241 state->link = false; 3242 return; 3243 } 3244 3245 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3246 state->duplex = DUPLEX_FULL; 3247 else 3248 state->duplex = DUPLEX_HALF; 3249 } 3250 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3251 3252 /** 3253 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3254 * @state: a pointer to a &struct phylink_link_state. 3255 * @bmsr: The value of the %MII_BMSR register 3256 * @lpa: The value of the %MII_LPA register 3257 * 3258 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3259 * clause 37 negotiation and/or SGMII control. 3260 * 3261 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3262 * the phylink @state structure. This is suitable to be used for implementing 3263 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3264 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3265 */ 3266 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3267 u16 bmsr, u16 lpa) 3268 { 3269 state->link = !!(bmsr & BMSR_LSTATUS); 3270 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3271 /* If there is no link or autonegotiation is disabled, the LP advertisement 3272 * data is not meaningful, so don't go any further. 3273 */ 3274 if (!state->link || !state->an_enabled) 3275 return; 3276 3277 switch (state->interface) { 3278 case PHY_INTERFACE_MODE_1000BASEX: 3279 phylink_decode_c37_word(state, lpa, SPEED_1000); 3280 break; 3281 3282 case PHY_INTERFACE_MODE_2500BASEX: 3283 phylink_decode_c37_word(state, lpa, SPEED_2500); 3284 break; 3285 3286 case PHY_INTERFACE_MODE_SGMII: 3287 case PHY_INTERFACE_MODE_QSGMII: 3288 case PHY_INTERFACE_MODE_QUSGMII: 3289 phylink_decode_sgmii_word(state, lpa); 3290 break; 3291 3292 default: 3293 state->link = false; 3294 break; 3295 } 3296 } 3297 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3298 3299 /** 3300 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3301 * @pcs: a pointer to a &struct mdio_device. 3302 * @state: a pointer to a &struct phylink_link_state. 3303 * 3304 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3305 * clause 37 negotiation and/or SGMII control. 3306 * 3307 * Read the MAC PCS state from the MII device configured in @config and 3308 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3309 * the phylink @state structure. This is suitable to be directly plugged 3310 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3311 * structure. 3312 */ 3313 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3314 struct phylink_link_state *state) 3315 { 3316 int bmsr, lpa; 3317 3318 bmsr = mdiodev_read(pcs, MII_BMSR); 3319 lpa = mdiodev_read(pcs, MII_LPA); 3320 if (bmsr < 0 || lpa < 0) { 3321 state->link = false; 3322 return; 3323 } 3324 3325 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3326 } 3327 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3328 3329 /** 3330 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3331 * advertisement 3332 * @interface: the PHY interface mode being configured 3333 * @advertising: the ethtool advertisement mask 3334 * 3335 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3336 * clause 37 negotiation and/or SGMII control. 3337 * 3338 * Encode the clause 37 PCS advertisement as specified by @interface and 3339 * @advertising. 3340 * 3341 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3342 */ 3343 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3344 const unsigned long *advertising) 3345 { 3346 u16 adv; 3347 3348 switch (interface) { 3349 case PHY_INTERFACE_MODE_1000BASEX: 3350 case PHY_INTERFACE_MODE_2500BASEX: 3351 adv = ADVERTISE_1000XFULL; 3352 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3353 advertising)) 3354 adv |= ADVERTISE_1000XPAUSE; 3355 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3356 advertising)) 3357 adv |= ADVERTISE_1000XPSE_ASYM; 3358 return adv; 3359 case PHY_INTERFACE_MODE_SGMII: 3360 case PHY_INTERFACE_MODE_QSGMII: 3361 return 0x0001; 3362 default: 3363 /* Nothing to do for other modes */ 3364 return -EINVAL; 3365 } 3366 } 3367 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3368 3369 /** 3370 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3371 * @pcs: a pointer to a &struct mdio_device. 3372 * @mode: link autonegotiation mode 3373 * @interface: the PHY interface mode being configured 3374 * @advertising: the ethtool advertisement mask 3375 * 3376 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3377 * parameters for the @mode, @interface and @advertising parameters. 3378 * Returns negative error number on failure, zero if the advertisement 3379 * has not changed, or positive if there is a change. 3380 */ 3381 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3382 phy_interface_t interface, 3383 const unsigned long *advertising) 3384 { 3385 bool changed = 0; 3386 u16 bmcr; 3387 int ret, adv; 3388 3389 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3390 if (adv >= 0) { 3391 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3392 MII_ADVERTISE, 0xffff, adv); 3393 if (ret < 0) 3394 return ret; 3395 changed = ret; 3396 } 3397 3398 /* Ensure ISOLATE bit is disabled */ 3399 if (mode == MLO_AN_INBAND && 3400 (interface == PHY_INTERFACE_MODE_SGMII || 3401 interface == PHY_INTERFACE_MODE_QSGMII || 3402 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3403 bmcr = BMCR_ANENABLE; 3404 else 3405 bmcr = 0; 3406 3407 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3408 if (ret < 0) 3409 return ret; 3410 3411 return changed; 3412 } 3413 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3414 3415 /** 3416 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3417 * @pcs: a pointer to a &struct mdio_device. 3418 * 3419 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3420 * clause 37 negotiation. 3421 * 3422 * Restart the clause 37 negotiation with the link partner. This is 3423 * suitable to be directly plugged into the mac_pcs_get_state() member 3424 * of the struct phylink_mac_ops structure. 3425 */ 3426 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3427 { 3428 int val = mdiodev_read(pcs, MII_BMCR); 3429 3430 if (val >= 0) { 3431 val |= BMCR_ANRESTART; 3432 3433 mdiodev_write(pcs, MII_BMCR, val); 3434 } 3435 } 3436 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3437 3438 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3439 struct phylink_link_state *state) 3440 { 3441 struct mii_bus *bus = pcs->bus; 3442 int addr = pcs->addr; 3443 int stat; 3444 3445 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3446 if (stat < 0) { 3447 state->link = false; 3448 return; 3449 } 3450 3451 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3452 if (!state->link) 3453 return; 3454 3455 switch (state->interface) { 3456 case PHY_INTERFACE_MODE_10GBASER: 3457 state->speed = SPEED_10000; 3458 state->duplex = DUPLEX_FULL; 3459 break; 3460 3461 default: 3462 break; 3463 } 3464 } 3465 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3466 3467 static int __init phylink_init(void) 3468 { 3469 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3470 __set_bit(phylink_sfp_interface_preference[i], 3471 phylink_sfp_interfaces); 3472 3473 return 0; 3474 } 3475 3476 module_init(phylink_init); 3477 3478 MODULE_LICENSE("GPL v2"); 3479