1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 const struct phylink_pcs_ops *pcs_ops; 47 struct phylink_config *config; 48 struct phylink_pcs *pcs; 49 struct device *dev; 50 unsigned int old_link_state:1; 51 52 unsigned long phylink_disable_state; /* bitmask of disables */ 53 struct phy_device *phydev; 54 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 55 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 56 u8 cur_link_an_mode; 57 u8 link_port; /* The current non-phy ethtool port */ 58 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 59 60 /* The link configuration settings */ 61 struct phylink_link_state link_config; 62 63 /* The current settings */ 64 phy_interface_t cur_interface; 65 66 struct gpio_desc *link_gpio; 67 unsigned int link_irq; 68 struct timer_list link_poll; 69 void (*get_fixed_state)(struct net_device *dev, 70 struct phylink_link_state *s); 71 72 struct mutex state_mutex; 73 struct phylink_link_state phy_state; 74 struct work_struct resolve; 75 76 bool mac_link_dropped; 77 bool using_mac_select_pcs; 78 79 struct sfp_bus *sfp_bus; 80 bool sfp_may_have_phy; 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 160 unsigned long caps) 161 { 162 if (caps & MAC_SYM_PAUSE) 163 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 164 165 if (caps & MAC_ASYM_PAUSE) 166 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 167 168 if (caps & MAC_10HD) 169 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 170 171 if (caps & MAC_10FD) 172 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 173 174 if (caps & MAC_100HD) { 175 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 176 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 177 } 178 179 if (caps & MAC_100FD) { 180 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 181 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 182 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 183 } 184 185 if (caps & MAC_1000HD) 186 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 187 188 if (caps & MAC_1000FD) { 189 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 190 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 191 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 192 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 193 } 194 195 if (caps & MAC_2500FD) { 196 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 197 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 198 } 199 200 if (caps & MAC_5000FD) 201 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 202 203 if (caps & MAC_10000FD) { 204 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 205 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 206 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 207 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 208 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 209 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 210 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 211 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 212 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 213 } 214 215 if (caps & MAC_25000FD) { 216 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 217 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 218 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 219 } 220 221 if (caps & MAC_40000FD) { 222 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 223 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 224 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 225 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 226 } 227 228 if (caps & MAC_50000FD) { 229 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 230 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 231 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 232 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 233 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 234 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 235 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 236 linkmodes); 237 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 238 } 239 240 if (caps & MAC_56000FD) { 241 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 242 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 243 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 244 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 245 } 246 247 if (caps & MAC_100000FD) { 248 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 249 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 250 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 251 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 252 linkmodes); 253 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 255 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 256 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 257 linkmodes); 258 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 261 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 262 linkmodes); 263 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 264 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 265 } 266 267 if (caps & MAC_200000FD) { 268 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 271 linkmodes); 272 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 273 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 274 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 276 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 277 linkmodes); 278 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 279 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 280 } 281 282 if (caps & MAC_400000FD) { 283 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 286 linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 292 linkmodes); 293 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 294 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 295 } 296 } 297 298 /** 299 * phylink_get_linkmodes() - get acceptable link modes 300 * @linkmodes: ethtool linkmode mask (must be already initialised) 301 * @interface: phy interface mode defined by &typedef phy_interface_t 302 * @mac_capabilities: bitmask of MAC capabilities 303 * 304 * Set all possible pause, speed and duplex linkmodes in @linkmodes that 305 * are supported by the @interface mode and @mac_capabilities. @linkmodes 306 * must have been initialised previously. 307 */ 308 void phylink_get_linkmodes(unsigned long *linkmodes, phy_interface_t interface, 309 unsigned long mac_capabilities) 310 { 311 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 312 313 switch (interface) { 314 case PHY_INTERFACE_MODE_USXGMII: 315 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 316 fallthrough; 317 318 case PHY_INTERFACE_MODE_RGMII_TXID: 319 case PHY_INTERFACE_MODE_RGMII_RXID: 320 case PHY_INTERFACE_MODE_RGMII_ID: 321 case PHY_INTERFACE_MODE_RGMII: 322 case PHY_INTERFACE_MODE_QSGMII: 323 case PHY_INTERFACE_MODE_SGMII: 324 case PHY_INTERFACE_MODE_GMII: 325 caps |= MAC_1000HD | MAC_1000FD; 326 fallthrough; 327 328 case PHY_INTERFACE_MODE_REVRMII: 329 case PHY_INTERFACE_MODE_RMII: 330 case PHY_INTERFACE_MODE_SMII: 331 case PHY_INTERFACE_MODE_REVMII: 332 case PHY_INTERFACE_MODE_MII: 333 caps |= MAC_10HD | MAC_10FD; 334 fallthrough; 335 336 case PHY_INTERFACE_MODE_100BASEX: 337 caps |= MAC_100HD | MAC_100FD; 338 break; 339 340 case PHY_INTERFACE_MODE_TBI: 341 case PHY_INTERFACE_MODE_MOCA: 342 case PHY_INTERFACE_MODE_RTBI: 343 case PHY_INTERFACE_MODE_1000BASEX: 344 caps |= MAC_1000HD; 345 fallthrough; 346 case PHY_INTERFACE_MODE_TRGMII: 347 caps |= MAC_1000FD; 348 break; 349 350 case PHY_INTERFACE_MODE_2500BASEX: 351 caps |= MAC_2500FD; 352 break; 353 354 case PHY_INTERFACE_MODE_5GBASER: 355 caps |= MAC_5000FD; 356 break; 357 358 case PHY_INTERFACE_MODE_XGMII: 359 case PHY_INTERFACE_MODE_RXAUI: 360 case PHY_INTERFACE_MODE_XAUI: 361 case PHY_INTERFACE_MODE_10GBASER: 362 case PHY_INTERFACE_MODE_10GKR: 363 caps |= MAC_10000FD; 364 break; 365 366 case PHY_INTERFACE_MODE_25GBASER: 367 caps |= MAC_25000FD; 368 break; 369 370 case PHY_INTERFACE_MODE_XLGMII: 371 caps |= MAC_40000FD; 372 break; 373 374 case PHY_INTERFACE_MODE_INTERNAL: 375 caps |= ~0; 376 break; 377 378 case PHY_INTERFACE_MODE_NA: 379 case PHY_INTERFACE_MODE_MAX: 380 break; 381 } 382 383 phylink_caps_to_linkmodes(linkmodes, caps & mac_capabilities); 384 } 385 EXPORT_SYMBOL_GPL(phylink_get_linkmodes); 386 387 /** 388 * phylink_generic_validate() - generic validate() callback implementation 389 * @config: a pointer to a &struct phylink_config. 390 * @supported: ethtool bitmask for supported link modes. 391 * @state: a pointer to a &struct phylink_link_state. 392 * 393 * Generic implementation of the validate() callback that MAC drivers can 394 * use when they pass the range of supported interfaces and MAC capabilities. 395 * This makes use of phylink_get_linkmodes(). 396 */ 397 void phylink_generic_validate(struct phylink_config *config, 398 unsigned long *supported, 399 struct phylink_link_state *state) 400 { 401 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 402 403 phylink_set_port_modes(mask); 404 phylink_set(mask, Autoneg); 405 phylink_get_linkmodes(mask, state->interface, config->mac_capabilities); 406 407 linkmode_and(supported, supported, mask); 408 linkmode_and(state->advertising, state->advertising, mask); 409 } 410 EXPORT_SYMBOL_GPL(phylink_generic_validate); 411 412 static int phylink_validate_mac_and_pcs(struct phylink *pl, 413 unsigned long *supported, 414 struct phylink_link_state *state) 415 { 416 struct phylink_pcs *pcs; 417 int ret; 418 419 /* Get the PCS for this interface mode */ 420 if (pl->using_mac_select_pcs) { 421 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 422 if (IS_ERR(pcs)) 423 return PTR_ERR(pcs); 424 } else { 425 pcs = pl->pcs; 426 } 427 428 if (pcs) { 429 /* The PCS, if present, must be setup before phylink_create() 430 * has been called. If the ops is not initialised, print an 431 * error and backtrace rather than oopsing the kernel. 432 */ 433 if (!pcs->ops) { 434 phylink_err(pl, "interface %s: uninitialised PCS\n", 435 phy_modes(state->interface)); 436 dump_stack(); 437 return -EINVAL; 438 } 439 440 /* Validate the link parameters with the PCS */ 441 if (pcs->ops->pcs_validate) { 442 ret = pcs->ops->pcs_validate(pcs, supported, state); 443 if (ret < 0 || phylink_is_empty_linkmode(supported)) 444 return -EINVAL; 445 446 /* Ensure the advertising mask is a subset of the 447 * supported mask. 448 */ 449 linkmode_and(state->advertising, state->advertising, 450 supported); 451 } 452 } 453 454 /* Then validate the link parameters with the MAC */ 455 pl->mac_ops->validate(pl->config, supported, state); 456 457 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 458 } 459 460 static int phylink_validate_any(struct phylink *pl, unsigned long *supported, 461 struct phylink_link_state *state) 462 { 463 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 464 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 465 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 466 struct phylink_link_state t; 467 int intf; 468 469 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 470 if (test_bit(intf, pl->config->supported_interfaces)) { 471 linkmode_copy(s, supported); 472 473 t = *state; 474 t.interface = intf; 475 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 476 linkmode_or(all_s, all_s, s); 477 linkmode_or(all_adv, all_adv, t.advertising); 478 } 479 } 480 } 481 482 linkmode_copy(supported, all_s); 483 linkmode_copy(state->advertising, all_adv); 484 485 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 486 } 487 488 static int phylink_validate(struct phylink *pl, unsigned long *supported, 489 struct phylink_link_state *state) 490 { 491 if (!phy_interface_empty(pl->config->supported_interfaces)) { 492 if (state->interface == PHY_INTERFACE_MODE_NA) 493 return phylink_validate_any(pl, supported, state); 494 495 if (!test_bit(state->interface, 496 pl->config->supported_interfaces)) 497 return -EINVAL; 498 } 499 500 return phylink_validate_mac_and_pcs(pl, supported, state); 501 } 502 503 static int phylink_parse_fixedlink(struct phylink *pl, 504 struct fwnode_handle *fwnode) 505 { 506 struct fwnode_handle *fixed_node; 507 const struct phy_setting *s; 508 struct gpio_desc *desc; 509 u32 speed; 510 int ret; 511 512 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 513 if (fixed_node) { 514 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 515 516 pl->link_config.speed = speed; 517 pl->link_config.duplex = DUPLEX_HALF; 518 519 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 520 pl->link_config.duplex = DUPLEX_FULL; 521 522 /* We treat the "pause" and "asym-pause" terminology as 523 * defining the link partner's ability. 524 */ 525 if (fwnode_property_read_bool(fixed_node, "pause")) 526 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 527 pl->link_config.lp_advertising); 528 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 529 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 530 pl->link_config.lp_advertising); 531 532 if (ret == 0) { 533 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 534 GPIOD_IN, "?"); 535 536 if (!IS_ERR(desc)) 537 pl->link_gpio = desc; 538 else if (desc == ERR_PTR(-EPROBE_DEFER)) 539 ret = -EPROBE_DEFER; 540 } 541 fwnode_handle_put(fixed_node); 542 543 if (ret) 544 return ret; 545 } else { 546 u32 prop[5]; 547 548 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 549 NULL, 0); 550 if (ret != ARRAY_SIZE(prop)) { 551 phylink_err(pl, "broken fixed-link?\n"); 552 return -EINVAL; 553 } 554 555 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 556 prop, ARRAY_SIZE(prop)); 557 if (!ret) { 558 pl->link_config.duplex = prop[1] ? 559 DUPLEX_FULL : DUPLEX_HALF; 560 pl->link_config.speed = prop[2]; 561 if (prop[3]) 562 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 563 pl->link_config.lp_advertising); 564 if (prop[4]) 565 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 566 pl->link_config.lp_advertising); 567 } 568 } 569 570 if (pl->link_config.speed > SPEED_1000 && 571 pl->link_config.duplex != DUPLEX_FULL) 572 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 573 pl->link_config.speed); 574 575 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 576 linkmode_copy(pl->link_config.advertising, pl->supported); 577 phylink_validate(pl, pl->supported, &pl->link_config); 578 579 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 580 pl->supported, true); 581 linkmode_zero(pl->supported); 582 phylink_set(pl->supported, MII); 583 phylink_set(pl->supported, Pause); 584 phylink_set(pl->supported, Asym_Pause); 585 phylink_set(pl->supported, Autoneg); 586 if (s) { 587 __set_bit(s->bit, pl->supported); 588 __set_bit(s->bit, pl->link_config.lp_advertising); 589 } else { 590 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 591 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 592 pl->link_config.speed); 593 } 594 595 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 596 pl->supported); 597 598 pl->link_config.link = 1; 599 pl->link_config.an_complete = 1; 600 601 return 0; 602 } 603 604 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 605 { 606 struct fwnode_handle *dn; 607 const char *managed; 608 609 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 610 if (dn || fwnode_property_present(fwnode, "fixed-link")) 611 pl->cfg_link_an_mode = MLO_AN_FIXED; 612 fwnode_handle_put(dn); 613 614 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 615 strcmp(managed, "in-band-status") == 0) || 616 pl->config->ovr_an_inband) { 617 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 618 phylink_err(pl, 619 "can't use both fixed-link and in-band-status\n"); 620 return -EINVAL; 621 } 622 623 linkmode_zero(pl->supported); 624 phylink_set(pl->supported, MII); 625 phylink_set(pl->supported, Autoneg); 626 phylink_set(pl->supported, Asym_Pause); 627 phylink_set(pl->supported, Pause); 628 pl->link_config.an_enabled = true; 629 pl->cfg_link_an_mode = MLO_AN_INBAND; 630 631 switch (pl->link_config.interface) { 632 case PHY_INTERFACE_MODE_SGMII: 633 case PHY_INTERFACE_MODE_QSGMII: 634 phylink_set(pl->supported, 10baseT_Half); 635 phylink_set(pl->supported, 10baseT_Full); 636 phylink_set(pl->supported, 100baseT_Half); 637 phylink_set(pl->supported, 100baseT_Full); 638 phylink_set(pl->supported, 1000baseT_Half); 639 phylink_set(pl->supported, 1000baseT_Full); 640 break; 641 642 case PHY_INTERFACE_MODE_1000BASEX: 643 phylink_set(pl->supported, 1000baseX_Full); 644 break; 645 646 case PHY_INTERFACE_MODE_2500BASEX: 647 phylink_set(pl->supported, 2500baseX_Full); 648 break; 649 650 case PHY_INTERFACE_MODE_5GBASER: 651 phylink_set(pl->supported, 5000baseT_Full); 652 break; 653 654 case PHY_INTERFACE_MODE_25GBASER: 655 phylink_set(pl->supported, 25000baseCR_Full); 656 phylink_set(pl->supported, 25000baseKR_Full); 657 phylink_set(pl->supported, 25000baseSR_Full); 658 fallthrough; 659 case PHY_INTERFACE_MODE_USXGMII: 660 case PHY_INTERFACE_MODE_10GKR: 661 case PHY_INTERFACE_MODE_10GBASER: 662 phylink_set(pl->supported, 10baseT_Half); 663 phylink_set(pl->supported, 10baseT_Full); 664 phylink_set(pl->supported, 100baseT_Half); 665 phylink_set(pl->supported, 100baseT_Full); 666 phylink_set(pl->supported, 1000baseT_Half); 667 phylink_set(pl->supported, 1000baseT_Full); 668 phylink_set(pl->supported, 1000baseX_Full); 669 phylink_set(pl->supported, 1000baseKX_Full); 670 phylink_set(pl->supported, 2500baseT_Full); 671 phylink_set(pl->supported, 2500baseX_Full); 672 phylink_set(pl->supported, 5000baseT_Full); 673 phylink_set(pl->supported, 10000baseT_Full); 674 phylink_set(pl->supported, 10000baseKR_Full); 675 phylink_set(pl->supported, 10000baseKX4_Full); 676 phylink_set(pl->supported, 10000baseCR_Full); 677 phylink_set(pl->supported, 10000baseSR_Full); 678 phylink_set(pl->supported, 10000baseLR_Full); 679 phylink_set(pl->supported, 10000baseLRM_Full); 680 phylink_set(pl->supported, 10000baseER_Full); 681 break; 682 683 case PHY_INTERFACE_MODE_XLGMII: 684 phylink_set(pl->supported, 25000baseCR_Full); 685 phylink_set(pl->supported, 25000baseKR_Full); 686 phylink_set(pl->supported, 25000baseSR_Full); 687 phylink_set(pl->supported, 40000baseKR4_Full); 688 phylink_set(pl->supported, 40000baseCR4_Full); 689 phylink_set(pl->supported, 40000baseSR4_Full); 690 phylink_set(pl->supported, 40000baseLR4_Full); 691 phylink_set(pl->supported, 50000baseCR2_Full); 692 phylink_set(pl->supported, 50000baseKR2_Full); 693 phylink_set(pl->supported, 50000baseSR2_Full); 694 phylink_set(pl->supported, 50000baseKR_Full); 695 phylink_set(pl->supported, 50000baseSR_Full); 696 phylink_set(pl->supported, 50000baseCR_Full); 697 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 698 phylink_set(pl->supported, 50000baseDR_Full); 699 phylink_set(pl->supported, 100000baseKR4_Full); 700 phylink_set(pl->supported, 100000baseSR4_Full); 701 phylink_set(pl->supported, 100000baseCR4_Full); 702 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 703 phylink_set(pl->supported, 100000baseKR2_Full); 704 phylink_set(pl->supported, 100000baseSR2_Full); 705 phylink_set(pl->supported, 100000baseCR2_Full); 706 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 707 phylink_set(pl->supported, 100000baseDR2_Full); 708 break; 709 710 default: 711 phylink_err(pl, 712 "incorrect link mode %s for in-band status\n", 713 phy_modes(pl->link_config.interface)); 714 return -EINVAL; 715 } 716 717 linkmode_copy(pl->link_config.advertising, pl->supported); 718 719 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 720 phylink_err(pl, 721 "failed to validate link configuration for in-band status\n"); 722 return -EINVAL; 723 } 724 725 /* Check if MAC/PCS also supports Autoneg. */ 726 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 727 } 728 729 return 0; 730 } 731 732 static void phylink_apply_manual_flow(struct phylink *pl, 733 struct phylink_link_state *state) 734 { 735 /* If autoneg is disabled, pause AN is also disabled */ 736 if (!state->an_enabled) 737 state->pause &= ~MLO_PAUSE_AN; 738 739 /* Manual configuration of pause modes */ 740 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 741 state->pause = pl->link_config.pause; 742 } 743 744 static void phylink_resolve_flow(struct phylink_link_state *state) 745 { 746 bool tx_pause, rx_pause; 747 748 state->pause = MLO_PAUSE_NONE; 749 if (state->duplex == DUPLEX_FULL) { 750 linkmode_resolve_pause(state->advertising, 751 state->lp_advertising, 752 &tx_pause, &rx_pause); 753 if (tx_pause) 754 state->pause |= MLO_PAUSE_TX; 755 if (rx_pause) 756 state->pause |= MLO_PAUSE_RX; 757 } 758 } 759 760 static void phylink_mac_config(struct phylink *pl, 761 const struct phylink_link_state *state) 762 { 763 phylink_dbg(pl, 764 "%s: mode=%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 765 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 766 phy_modes(state->interface), 767 phy_speed_to_str(state->speed), 768 phy_duplex_to_str(state->duplex), 769 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 770 state->pause, state->link, state->an_enabled); 771 772 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 773 } 774 775 static void phylink_mac_pcs_an_restart(struct phylink *pl) 776 { 777 if (pl->link_config.an_enabled && 778 phy_interface_mode_is_8023z(pl->link_config.interface) && 779 phylink_autoneg_inband(pl->cur_link_an_mode)) { 780 if (pl->pcs_ops) 781 pl->pcs_ops->pcs_an_restart(pl->pcs); 782 else if (pl->config->legacy_pre_march2020) 783 pl->mac_ops->mac_an_restart(pl->config); 784 } 785 } 786 787 static void phylink_major_config(struct phylink *pl, bool restart, 788 const struct phylink_link_state *state) 789 { 790 struct phylink_pcs *pcs = NULL; 791 int err; 792 793 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 794 795 if (pl->using_mac_select_pcs) { 796 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 797 if (IS_ERR(pcs)) { 798 phylink_err(pl, 799 "mac_select_pcs unexpectedly failed: %pe\n", 800 pcs); 801 return; 802 } 803 } 804 805 if (pl->mac_ops->mac_prepare) { 806 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 807 state->interface); 808 if (err < 0) { 809 phylink_err(pl, "mac_prepare failed: %pe\n", 810 ERR_PTR(err)); 811 return; 812 } 813 } 814 815 /* If we have a new PCS, switch to the new PCS after preparing the MAC 816 * for the change. 817 */ 818 if (pcs) { 819 pl->pcs = pcs; 820 pl->pcs_ops = pcs->ops; 821 822 if (!pl->phylink_disable_state && 823 pl->cfg_link_an_mode == MLO_AN_INBAND) { 824 if (pcs->poll) 825 mod_timer(&pl->link_poll, jiffies + HZ); 826 else 827 del_timer(&pl->link_poll); 828 } 829 } 830 831 phylink_mac_config(pl, state); 832 833 if (pl->pcs_ops) { 834 err = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 835 state->interface, 836 state->advertising, 837 !!(pl->link_config.pause & 838 MLO_PAUSE_AN)); 839 if (err < 0) 840 phylink_err(pl, "pcs_config failed: %pe\n", 841 ERR_PTR(err)); 842 if (err > 0) 843 restart = true; 844 } 845 if (restart) 846 phylink_mac_pcs_an_restart(pl); 847 848 if (pl->mac_ops->mac_finish) { 849 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 850 state->interface); 851 if (err < 0) 852 phylink_err(pl, "mac_finish failed: %pe\n", 853 ERR_PTR(err)); 854 } 855 } 856 857 /* 858 * Reconfigure for a change of inband advertisement. 859 * If we have a separate PCS, we only need to call its pcs_config() method, 860 * and then restart AN if it indicates something changed. Otherwise, we do 861 * the full MAC reconfiguration. 862 */ 863 static int phylink_change_inband_advert(struct phylink *pl) 864 { 865 int ret; 866 867 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 868 return 0; 869 870 if (!pl->pcs_ops && pl->config->legacy_pre_march2020) { 871 /* Legacy method */ 872 phylink_mac_config(pl, &pl->link_config); 873 phylink_mac_pcs_an_restart(pl); 874 return 0; 875 } 876 877 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 878 phylink_an_mode_str(pl->cur_link_an_mode), 879 phy_modes(pl->link_config.interface), 880 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 881 pl->link_config.pause); 882 883 /* Modern PCS-based method; update the advert at the PCS, and 884 * restart negotiation if the pcs_config() helper indicates that 885 * the programmed advertisement has changed. 886 */ 887 ret = pl->pcs_ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 888 pl->link_config.interface, 889 pl->link_config.advertising, 890 !!(pl->link_config.pause & MLO_PAUSE_AN)); 891 if (ret < 0) 892 return ret; 893 894 if (ret > 0) 895 phylink_mac_pcs_an_restart(pl); 896 897 return 0; 898 } 899 900 static void phylink_mac_pcs_get_state(struct phylink *pl, 901 struct phylink_link_state *state) 902 { 903 linkmode_copy(state->advertising, pl->link_config.advertising); 904 linkmode_zero(state->lp_advertising); 905 state->interface = pl->link_config.interface; 906 state->an_enabled = pl->link_config.an_enabled; 907 if (state->an_enabled) { 908 state->speed = SPEED_UNKNOWN; 909 state->duplex = DUPLEX_UNKNOWN; 910 state->pause = MLO_PAUSE_NONE; 911 } else { 912 state->speed = pl->link_config.speed; 913 state->duplex = pl->link_config.duplex; 914 state->pause = pl->link_config.pause; 915 } 916 state->an_complete = 0; 917 state->link = 1; 918 919 if (pl->pcs_ops) 920 pl->pcs_ops->pcs_get_state(pl->pcs, state); 921 else if (pl->mac_ops->mac_pcs_get_state && 922 pl->config->legacy_pre_march2020) 923 pl->mac_ops->mac_pcs_get_state(pl->config, state); 924 else 925 state->link = 0; 926 } 927 928 /* The fixed state is... fixed except for the link state, 929 * which may be determined by a GPIO or a callback. 930 */ 931 static void phylink_get_fixed_state(struct phylink *pl, 932 struct phylink_link_state *state) 933 { 934 *state = pl->link_config; 935 if (pl->config->get_fixed_state) 936 pl->config->get_fixed_state(pl->config, state); 937 else if (pl->link_gpio) 938 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 939 940 phylink_resolve_flow(state); 941 } 942 943 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 944 { 945 struct phylink_link_state link_state; 946 947 switch (pl->cur_link_an_mode) { 948 case MLO_AN_PHY: 949 link_state = pl->phy_state; 950 break; 951 952 case MLO_AN_FIXED: 953 phylink_get_fixed_state(pl, &link_state); 954 break; 955 956 case MLO_AN_INBAND: 957 link_state = pl->link_config; 958 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 959 link_state.pause = MLO_PAUSE_NONE; 960 break; 961 962 default: /* can't happen */ 963 return; 964 } 965 966 link_state.link = false; 967 968 phylink_apply_manual_flow(pl, &link_state); 969 phylink_major_config(pl, force_restart, &link_state); 970 } 971 972 static const char *phylink_pause_to_str(int pause) 973 { 974 switch (pause & MLO_PAUSE_TXRX_MASK) { 975 case MLO_PAUSE_TX | MLO_PAUSE_RX: 976 return "rx/tx"; 977 case MLO_PAUSE_TX: 978 return "tx"; 979 case MLO_PAUSE_RX: 980 return "rx"; 981 default: 982 return "off"; 983 } 984 } 985 986 static void phylink_link_up(struct phylink *pl, 987 struct phylink_link_state link_state) 988 { 989 struct net_device *ndev = pl->netdev; 990 991 pl->cur_interface = link_state.interface; 992 993 if (pl->pcs_ops && pl->pcs_ops->pcs_link_up) 994 pl->pcs_ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 995 pl->cur_interface, 996 link_state.speed, link_state.duplex); 997 998 pl->mac_ops->mac_link_up(pl->config, pl->phydev, 999 pl->cur_link_an_mode, pl->cur_interface, 1000 link_state.speed, link_state.duplex, 1001 !!(link_state.pause & MLO_PAUSE_TX), 1002 !!(link_state.pause & MLO_PAUSE_RX)); 1003 1004 if (ndev) 1005 netif_carrier_on(ndev); 1006 1007 phylink_info(pl, 1008 "Link is Up - %s/%s - flow control %s\n", 1009 phy_speed_to_str(link_state.speed), 1010 phy_duplex_to_str(link_state.duplex), 1011 phylink_pause_to_str(link_state.pause)); 1012 } 1013 1014 static void phylink_link_down(struct phylink *pl) 1015 { 1016 struct net_device *ndev = pl->netdev; 1017 1018 if (ndev) 1019 netif_carrier_off(ndev); 1020 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1021 pl->cur_interface); 1022 phylink_info(pl, "Link is Down\n"); 1023 } 1024 1025 static void phylink_resolve(struct work_struct *w) 1026 { 1027 struct phylink *pl = container_of(w, struct phylink, resolve); 1028 struct phylink_link_state link_state; 1029 struct net_device *ndev = pl->netdev; 1030 bool mac_config = false; 1031 bool retrigger = false; 1032 bool cur_link_state; 1033 1034 mutex_lock(&pl->state_mutex); 1035 if (pl->netdev) 1036 cur_link_state = netif_carrier_ok(ndev); 1037 else 1038 cur_link_state = pl->old_link_state; 1039 1040 if (pl->phylink_disable_state) { 1041 pl->mac_link_dropped = false; 1042 link_state.link = false; 1043 } else if (pl->mac_link_dropped) { 1044 link_state.link = false; 1045 retrigger = true; 1046 } else { 1047 switch (pl->cur_link_an_mode) { 1048 case MLO_AN_PHY: 1049 link_state = pl->phy_state; 1050 phylink_apply_manual_flow(pl, &link_state); 1051 mac_config = link_state.link; 1052 break; 1053 1054 case MLO_AN_FIXED: 1055 phylink_get_fixed_state(pl, &link_state); 1056 mac_config = link_state.link; 1057 break; 1058 1059 case MLO_AN_INBAND: 1060 phylink_mac_pcs_get_state(pl, &link_state); 1061 1062 /* The PCS may have a latching link-fail indicator. 1063 * If the link was up, bring the link down and 1064 * re-trigger the resolve. Otherwise, re-read the 1065 * PCS state to get the current status of the link. 1066 */ 1067 if (!link_state.link) { 1068 if (cur_link_state) 1069 retrigger = true; 1070 else 1071 phylink_mac_pcs_get_state(pl, 1072 &link_state); 1073 } 1074 1075 /* If we have a phy, the "up" state is the union of 1076 * both the PHY and the MAC 1077 */ 1078 if (pl->phydev) 1079 link_state.link &= pl->phy_state.link; 1080 1081 /* Only update if the PHY link is up */ 1082 if (pl->phydev && pl->phy_state.link) { 1083 /* If the interface has changed, force a 1084 * link down event if the link isn't already 1085 * down, and re-resolve. 1086 */ 1087 if (link_state.interface != 1088 pl->phy_state.interface) { 1089 retrigger = true; 1090 link_state.link = false; 1091 } 1092 link_state.interface = pl->phy_state.interface; 1093 1094 /* If we have a PHY, we need to update with 1095 * the PHY flow control bits. 1096 */ 1097 link_state.pause = pl->phy_state.pause; 1098 mac_config = true; 1099 } 1100 phylink_apply_manual_flow(pl, &link_state); 1101 break; 1102 } 1103 } 1104 1105 if (mac_config) { 1106 if (link_state.interface != pl->link_config.interface) { 1107 /* The interface has changed, force the link down and 1108 * then reconfigure. 1109 */ 1110 if (cur_link_state) { 1111 phylink_link_down(pl); 1112 cur_link_state = false; 1113 } 1114 phylink_major_config(pl, false, &link_state); 1115 pl->link_config.interface = link_state.interface; 1116 } else if (!pl->pcs_ops && pl->config->legacy_pre_march2020) { 1117 /* The interface remains unchanged, only the speed, 1118 * duplex or pause settings have changed. Call the 1119 * old mac_config() method to configure the MAC/PCS 1120 * only if we do not have a legacy MAC driver. 1121 */ 1122 phylink_mac_config(pl, &link_state); 1123 } 1124 } 1125 1126 if (link_state.link != cur_link_state) { 1127 pl->old_link_state = link_state.link; 1128 if (!link_state.link) 1129 phylink_link_down(pl); 1130 else 1131 phylink_link_up(pl, link_state); 1132 } 1133 if (!link_state.link && retrigger) { 1134 pl->mac_link_dropped = false; 1135 queue_work(system_power_efficient_wq, &pl->resolve); 1136 } 1137 mutex_unlock(&pl->state_mutex); 1138 } 1139 1140 static void phylink_run_resolve(struct phylink *pl) 1141 { 1142 if (!pl->phylink_disable_state) 1143 queue_work(system_power_efficient_wq, &pl->resolve); 1144 } 1145 1146 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1147 { 1148 unsigned long state = pl->phylink_disable_state; 1149 1150 set_bit(bit, &pl->phylink_disable_state); 1151 if (state == 0) { 1152 queue_work(system_power_efficient_wq, &pl->resolve); 1153 flush_work(&pl->resolve); 1154 } 1155 } 1156 1157 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1158 { 1159 clear_bit(bit, &pl->phylink_disable_state); 1160 phylink_run_resolve(pl); 1161 } 1162 1163 static void phylink_fixed_poll(struct timer_list *t) 1164 { 1165 struct phylink *pl = container_of(t, struct phylink, link_poll); 1166 1167 mod_timer(t, jiffies + HZ); 1168 1169 phylink_run_resolve(pl); 1170 } 1171 1172 static const struct sfp_upstream_ops sfp_phylink_ops; 1173 1174 static int phylink_register_sfp(struct phylink *pl, 1175 struct fwnode_handle *fwnode) 1176 { 1177 struct sfp_bus *bus; 1178 int ret; 1179 1180 if (!fwnode) 1181 return 0; 1182 1183 bus = sfp_bus_find_fwnode(fwnode); 1184 if (IS_ERR(bus)) { 1185 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1186 return PTR_ERR(bus); 1187 } 1188 1189 pl->sfp_bus = bus; 1190 1191 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1192 sfp_bus_put(bus); 1193 1194 return ret; 1195 } 1196 1197 /** 1198 * phylink_create() - create a phylink instance 1199 * @config: a pointer to the target &struct phylink_config 1200 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1201 * interface 1202 * @iface: the desired link mode defined by &typedef phy_interface_t 1203 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1204 * 1205 * Create a new phylink instance, and parse the link parameters found in @np. 1206 * This will parse in-band modes, fixed-link or SFP configuration. 1207 * 1208 * Note: the rtnl lock must not be held when calling this function. 1209 * 1210 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1211 * must use IS_ERR() to check for errors from this function. 1212 */ 1213 struct phylink *phylink_create(struct phylink_config *config, 1214 struct fwnode_handle *fwnode, 1215 phy_interface_t iface, 1216 const struct phylink_mac_ops *mac_ops) 1217 { 1218 bool using_mac_select_pcs = false; 1219 struct phylink *pl; 1220 int ret; 1221 1222 if (mac_ops->mac_select_pcs && 1223 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1224 ERR_PTR(-EOPNOTSUPP)) 1225 using_mac_select_pcs = true; 1226 1227 /* Validate the supplied configuration */ 1228 if (using_mac_select_pcs && 1229 phy_interface_empty(config->supported_interfaces)) { 1230 dev_err(config->dev, 1231 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1232 return ERR_PTR(-EINVAL); 1233 } 1234 1235 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1236 if (!pl) 1237 return ERR_PTR(-ENOMEM); 1238 1239 mutex_init(&pl->state_mutex); 1240 INIT_WORK(&pl->resolve, phylink_resolve); 1241 1242 pl->config = config; 1243 if (config->type == PHYLINK_NETDEV) { 1244 pl->netdev = to_net_dev(config->dev); 1245 } else if (config->type == PHYLINK_DEV) { 1246 pl->dev = config->dev; 1247 } else { 1248 kfree(pl); 1249 return ERR_PTR(-EINVAL); 1250 } 1251 1252 pl->using_mac_select_pcs = using_mac_select_pcs; 1253 pl->phy_state.interface = iface; 1254 pl->link_interface = iface; 1255 if (iface == PHY_INTERFACE_MODE_MOCA) 1256 pl->link_port = PORT_BNC; 1257 else 1258 pl->link_port = PORT_MII; 1259 pl->link_config.interface = iface; 1260 pl->link_config.pause = MLO_PAUSE_AN; 1261 pl->link_config.speed = SPEED_UNKNOWN; 1262 pl->link_config.duplex = DUPLEX_UNKNOWN; 1263 pl->link_config.an_enabled = true; 1264 pl->mac_ops = mac_ops; 1265 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1266 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1267 1268 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1269 linkmode_copy(pl->link_config.advertising, pl->supported); 1270 phylink_validate(pl, pl->supported, &pl->link_config); 1271 1272 ret = phylink_parse_mode(pl, fwnode); 1273 if (ret < 0) { 1274 kfree(pl); 1275 return ERR_PTR(ret); 1276 } 1277 1278 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1279 ret = phylink_parse_fixedlink(pl, fwnode); 1280 if (ret < 0) { 1281 kfree(pl); 1282 return ERR_PTR(ret); 1283 } 1284 } 1285 1286 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1287 1288 ret = phylink_register_sfp(pl, fwnode); 1289 if (ret < 0) { 1290 kfree(pl); 1291 return ERR_PTR(ret); 1292 } 1293 1294 return pl; 1295 } 1296 EXPORT_SYMBOL_GPL(phylink_create); 1297 1298 /** 1299 * phylink_destroy() - cleanup and destroy the phylink instance 1300 * @pl: a pointer to a &struct phylink returned from phylink_create() 1301 * 1302 * Destroy a phylink instance. Any PHY that has been attached must have been 1303 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1304 * 1305 * Note: the rtnl lock must not be held when calling this function. 1306 */ 1307 void phylink_destroy(struct phylink *pl) 1308 { 1309 sfp_bus_del_upstream(pl->sfp_bus); 1310 if (pl->link_gpio) 1311 gpiod_put(pl->link_gpio); 1312 1313 cancel_work_sync(&pl->resolve); 1314 kfree(pl); 1315 } 1316 EXPORT_SYMBOL_GPL(phylink_destroy); 1317 1318 static void phylink_phy_change(struct phy_device *phydev, bool up) 1319 { 1320 struct phylink *pl = phydev->phylink; 1321 bool tx_pause, rx_pause; 1322 1323 phy_get_pause(phydev, &tx_pause, &rx_pause); 1324 1325 mutex_lock(&pl->state_mutex); 1326 pl->phy_state.speed = phydev->speed; 1327 pl->phy_state.duplex = phydev->duplex; 1328 pl->phy_state.pause = MLO_PAUSE_NONE; 1329 if (tx_pause) 1330 pl->phy_state.pause |= MLO_PAUSE_TX; 1331 if (rx_pause) 1332 pl->phy_state.pause |= MLO_PAUSE_RX; 1333 pl->phy_state.interface = phydev->interface; 1334 pl->phy_state.link = up; 1335 mutex_unlock(&pl->state_mutex); 1336 1337 phylink_run_resolve(pl); 1338 1339 phylink_dbg(pl, "phy link %s %s/%s/%s/%s\n", up ? "up" : "down", 1340 phy_modes(phydev->interface), 1341 phy_speed_to_str(phydev->speed), 1342 phy_duplex_to_str(phydev->duplex), 1343 phylink_pause_to_str(pl->phy_state.pause)); 1344 } 1345 1346 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1347 phy_interface_t interface) 1348 { 1349 struct phylink_link_state config; 1350 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1351 char *irq_str; 1352 int ret; 1353 1354 /* 1355 * This is the new way of dealing with flow control for PHYs, 1356 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1357 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1358 * using our validate call to the MAC, we rely upon the MAC 1359 * clearing the bits from both supported and advertising fields. 1360 */ 1361 phy_support_asym_pause(phy); 1362 1363 memset(&config, 0, sizeof(config)); 1364 linkmode_copy(supported, phy->supported); 1365 linkmode_copy(config.advertising, phy->advertising); 1366 1367 /* Clause 45 PHYs switch their Serdes lane between several different 1368 * modes, normally 10GBASE-R, SGMII. Some use 2500BASE-X for 2.5G 1369 * speeds. We really need to know which interface modes the PHY and 1370 * MAC supports to properly work out which linkmodes can be supported. 1371 */ 1372 if (phy->is_c45 && 1373 interface != PHY_INTERFACE_MODE_RXAUI && 1374 interface != PHY_INTERFACE_MODE_XAUI && 1375 interface != PHY_INTERFACE_MODE_USXGMII) 1376 config.interface = PHY_INTERFACE_MODE_NA; 1377 else 1378 config.interface = interface; 1379 1380 ret = phylink_validate(pl, supported, &config); 1381 if (ret) { 1382 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1383 phy_modes(config.interface), 1384 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1385 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1386 ERR_PTR(ret)); 1387 return ret; 1388 } 1389 1390 phy->phylink = pl; 1391 phy->phy_link_change = phylink_phy_change; 1392 1393 irq_str = phy_attached_info_irq(phy); 1394 phylink_info(pl, 1395 "PHY [%s] driver [%s] (irq=%s)\n", 1396 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1397 kfree(irq_str); 1398 1399 mutex_lock(&phy->lock); 1400 mutex_lock(&pl->state_mutex); 1401 pl->phydev = phy; 1402 pl->phy_state.interface = interface; 1403 pl->phy_state.pause = MLO_PAUSE_NONE; 1404 pl->phy_state.speed = SPEED_UNKNOWN; 1405 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1406 linkmode_copy(pl->supported, supported); 1407 linkmode_copy(pl->link_config.advertising, config.advertising); 1408 1409 /* Restrict the phy advertisement according to the MAC support. */ 1410 linkmode_copy(phy->advertising, config.advertising); 1411 mutex_unlock(&pl->state_mutex); 1412 mutex_unlock(&phy->lock); 1413 1414 phylink_dbg(pl, 1415 "phy: %s setting supported %*pb advertising %*pb\n", 1416 phy_modes(interface), 1417 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1418 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1419 1420 if (phy_interrupt_is_valid(phy)) 1421 phy_request_interrupt(phy); 1422 1423 return 0; 1424 } 1425 1426 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1427 phy_interface_t interface) 1428 { 1429 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1430 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1431 phy_interface_mode_is_8023z(interface)))) 1432 return -EINVAL; 1433 1434 if (pl->phydev) 1435 return -EBUSY; 1436 1437 return phy_attach_direct(pl->netdev, phy, 0, interface); 1438 } 1439 1440 /** 1441 * phylink_connect_phy() - connect a PHY to the phylink instance 1442 * @pl: a pointer to a &struct phylink returned from phylink_create() 1443 * @phy: a pointer to a &struct phy_device. 1444 * 1445 * Connect @phy to the phylink instance specified by @pl by calling 1446 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1447 * capabilities, start the PHYLIB state machine and enable any interrupts 1448 * that the PHY supports. 1449 * 1450 * This updates the phylink's ethtool supported and advertising link mode 1451 * masks. 1452 * 1453 * Returns 0 on success or a negative errno. 1454 */ 1455 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1456 { 1457 int ret; 1458 1459 /* Use PHY device/driver interface */ 1460 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1461 pl->link_interface = phy->interface; 1462 pl->link_config.interface = pl->link_interface; 1463 } 1464 1465 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1466 if (ret < 0) 1467 return ret; 1468 1469 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1470 if (ret) 1471 phy_detach(phy); 1472 1473 return ret; 1474 } 1475 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1476 1477 /** 1478 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1479 * @pl: a pointer to a &struct phylink returned from phylink_create() 1480 * @dn: a pointer to a &struct device_node. 1481 * @flags: PHY-specific flags to communicate to the PHY device driver 1482 * 1483 * Connect the phy specified in the device node @dn to the phylink instance 1484 * specified by @pl. Actions specified in phylink_connect_phy() will be 1485 * performed. 1486 * 1487 * Returns 0 on success or a negative errno. 1488 */ 1489 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1490 u32 flags) 1491 { 1492 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1493 } 1494 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1495 1496 /** 1497 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1498 * @pl: a pointer to a &struct phylink returned from phylink_create() 1499 * @fwnode: a pointer to a &struct fwnode_handle. 1500 * @flags: PHY-specific flags to communicate to the PHY device driver 1501 * 1502 * Connect the phy specified @fwnode to the phylink instance specified 1503 * by @pl. 1504 * 1505 * Returns 0 on success or a negative errno. 1506 */ 1507 int phylink_fwnode_phy_connect(struct phylink *pl, 1508 struct fwnode_handle *fwnode, 1509 u32 flags) 1510 { 1511 struct fwnode_handle *phy_fwnode; 1512 struct phy_device *phy_dev; 1513 int ret; 1514 1515 /* Fixed links and 802.3z are handled without needing a PHY */ 1516 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1517 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1518 phy_interface_mode_is_8023z(pl->link_interface))) 1519 return 0; 1520 1521 phy_fwnode = fwnode_get_phy_node(fwnode); 1522 if (IS_ERR(phy_fwnode)) { 1523 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1524 return -ENODEV; 1525 return 0; 1526 } 1527 1528 phy_dev = fwnode_phy_find_device(phy_fwnode); 1529 /* We're done with the phy_node handle */ 1530 fwnode_handle_put(phy_fwnode); 1531 if (!phy_dev) 1532 return -ENODEV; 1533 1534 /* Use PHY device/driver interface */ 1535 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1536 pl->link_interface = phy_dev->interface; 1537 pl->link_config.interface = pl->link_interface; 1538 } 1539 1540 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1541 pl->link_interface); 1542 if (ret) { 1543 phy_device_free(phy_dev); 1544 return ret; 1545 } 1546 1547 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1548 if (ret) 1549 phy_detach(phy_dev); 1550 1551 return ret; 1552 } 1553 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1554 1555 /** 1556 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1557 * instance. 1558 * @pl: a pointer to a &struct phylink returned from phylink_create() 1559 * 1560 * Disconnect any current PHY from the phylink instance described by @pl. 1561 */ 1562 void phylink_disconnect_phy(struct phylink *pl) 1563 { 1564 struct phy_device *phy; 1565 1566 ASSERT_RTNL(); 1567 1568 phy = pl->phydev; 1569 if (phy) { 1570 mutex_lock(&phy->lock); 1571 mutex_lock(&pl->state_mutex); 1572 pl->phydev = NULL; 1573 mutex_unlock(&pl->state_mutex); 1574 mutex_unlock(&phy->lock); 1575 flush_work(&pl->resolve); 1576 1577 phy_disconnect(phy); 1578 } 1579 } 1580 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1581 1582 /** 1583 * phylink_mac_change() - notify phylink of a change in MAC state 1584 * @pl: a pointer to a &struct phylink returned from phylink_create() 1585 * @up: indicates whether the link is currently up. 1586 * 1587 * The MAC driver should call this driver when the state of its link 1588 * changes (eg, link failure, new negotiation results, etc.) 1589 */ 1590 void phylink_mac_change(struct phylink *pl, bool up) 1591 { 1592 if (!up) 1593 pl->mac_link_dropped = true; 1594 phylink_run_resolve(pl); 1595 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1596 } 1597 EXPORT_SYMBOL_GPL(phylink_mac_change); 1598 1599 static irqreturn_t phylink_link_handler(int irq, void *data) 1600 { 1601 struct phylink *pl = data; 1602 1603 phylink_run_resolve(pl); 1604 1605 return IRQ_HANDLED; 1606 } 1607 1608 /** 1609 * phylink_start() - start a phylink instance 1610 * @pl: a pointer to a &struct phylink returned from phylink_create() 1611 * 1612 * Start the phylink instance specified by @pl, configuring the MAC for the 1613 * desired link mode(s) and negotiation style. This should be called from the 1614 * network device driver's &struct net_device_ops ndo_open() method. 1615 */ 1616 void phylink_start(struct phylink *pl) 1617 { 1618 bool poll = false; 1619 1620 ASSERT_RTNL(); 1621 1622 phylink_info(pl, "configuring for %s/%s link mode\n", 1623 phylink_an_mode_str(pl->cur_link_an_mode), 1624 phy_modes(pl->link_config.interface)); 1625 1626 /* Always set the carrier off */ 1627 if (pl->netdev) 1628 netif_carrier_off(pl->netdev); 1629 1630 /* Apply the link configuration to the MAC when starting. This allows 1631 * a fixed-link to start with the correct parameters, and also 1632 * ensures that we set the appropriate advertisement for Serdes links. 1633 * 1634 * Restart autonegotiation if using 802.3z to ensure that the link 1635 * parameters are properly negotiated. This is necessary for DSA 1636 * switches using 802.3z negotiation to ensure they see our modes. 1637 */ 1638 phylink_mac_initial_config(pl, true); 1639 1640 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1641 1642 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1643 int irq = gpiod_to_irq(pl->link_gpio); 1644 1645 if (irq > 0) { 1646 if (!request_irq(irq, phylink_link_handler, 1647 IRQF_TRIGGER_RISING | 1648 IRQF_TRIGGER_FALLING, 1649 "netdev link", pl)) 1650 pl->link_irq = irq; 1651 else 1652 irq = 0; 1653 } 1654 if (irq <= 0) 1655 poll = true; 1656 } 1657 1658 switch (pl->cfg_link_an_mode) { 1659 case MLO_AN_FIXED: 1660 poll |= pl->config->poll_fixed_state; 1661 break; 1662 case MLO_AN_INBAND: 1663 if (pl->pcs) 1664 poll |= pl->pcs->poll; 1665 break; 1666 } 1667 if (poll) 1668 mod_timer(&pl->link_poll, jiffies + HZ); 1669 if (pl->phydev) 1670 phy_start(pl->phydev); 1671 if (pl->sfp_bus) 1672 sfp_upstream_start(pl->sfp_bus); 1673 } 1674 EXPORT_SYMBOL_GPL(phylink_start); 1675 1676 /** 1677 * phylink_stop() - stop a phylink instance 1678 * @pl: a pointer to a &struct phylink returned from phylink_create() 1679 * 1680 * Stop the phylink instance specified by @pl. This should be called from the 1681 * network device driver's &struct net_device_ops ndo_stop() method. The 1682 * network device's carrier state should not be changed prior to calling this 1683 * function. 1684 * 1685 * This will synchronously bring down the link if the link is not already 1686 * down (in other words, it will trigger a mac_link_down() method call.) 1687 */ 1688 void phylink_stop(struct phylink *pl) 1689 { 1690 ASSERT_RTNL(); 1691 1692 if (pl->sfp_bus) 1693 sfp_upstream_stop(pl->sfp_bus); 1694 if (pl->phydev) 1695 phy_stop(pl->phydev); 1696 del_timer_sync(&pl->link_poll); 1697 if (pl->link_irq) { 1698 free_irq(pl->link_irq, pl); 1699 pl->link_irq = 0; 1700 } 1701 1702 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1703 } 1704 EXPORT_SYMBOL_GPL(phylink_stop); 1705 1706 /** 1707 * phylink_suspend() - handle a network device suspend event 1708 * @pl: a pointer to a &struct phylink returned from phylink_create() 1709 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1710 * 1711 * Handle a network device suspend event. There are several cases: 1712 * 1713 * - If Wake-on-Lan is not active, we can bring down the link between 1714 * the MAC and PHY by calling phylink_stop(). 1715 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1716 * can also bring down the link between the MAC and PHY. 1717 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1718 * still needs to receive packets, so we can not bring the link down. 1719 */ 1720 void phylink_suspend(struct phylink *pl, bool mac_wol) 1721 { 1722 ASSERT_RTNL(); 1723 1724 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1725 /* Wake-on-Lan enabled, MAC handling */ 1726 mutex_lock(&pl->state_mutex); 1727 1728 /* Stop the resolver bringing the link up */ 1729 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 1730 1731 /* Disable the carrier, to prevent transmit timeouts, 1732 * but one would hope all packets have been sent. This 1733 * also means phylink_resolve() will do nothing. 1734 */ 1735 if (pl->netdev) 1736 netif_carrier_off(pl->netdev); 1737 else 1738 pl->old_link_state = false; 1739 1740 /* We do not call mac_link_down() here as we want the 1741 * link to remain up to receive the WoL packets. 1742 */ 1743 mutex_unlock(&pl->state_mutex); 1744 } else { 1745 phylink_stop(pl); 1746 } 1747 } 1748 EXPORT_SYMBOL_GPL(phylink_suspend); 1749 1750 /** 1751 * phylink_resume() - handle a network device resume event 1752 * @pl: a pointer to a &struct phylink returned from phylink_create() 1753 * 1754 * Undo the effects of phylink_suspend(), returning the link to an 1755 * operational state. 1756 */ 1757 void phylink_resume(struct phylink *pl) 1758 { 1759 ASSERT_RTNL(); 1760 1761 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 1762 /* Wake-on-Lan enabled, MAC handling */ 1763 1764 /* Call mac_link_down() so we keep the overall state balanced. 1765 * Do this under the state_mutex lock for consistency. This 1766 * will cause a "Link Down" message to be printed during 1767 * resume, which is harmless - the true link state will be 1768 * printed when we run a resolve. 1769 */ 1770 mutex_lock(&pl->state_mutex); 1771 phylink_link_down(pl); 1772 mutex_unlock(&pl->state_mutex); 1773 1774 /* Re-apply the link parameters so that all the settings get 1775 * restored to the MAC. 1776 */ 1777 phylink_mac_initial_config(pl, true); 1778 1779 /* Re-enable and re-resolve the link parameters */ 1780 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 1781 } else { 1782 phylink_start(pl); 1783 } 1784 } 1785 EXPORT_SYMBOL_GPL(phylink_resume); 1786 1787 /** 1788 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 1789 * @pl: a pointer to a &struct phylink returned from phylink_create() 1790 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 1791 * 1792 * Read the wake on lan parameters from the PHY attached to the phylink 1793 * instance specified by @pl. If no PHY is currently attached, report no 1794 * support for wake on lan. 1795 */ 1796 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1797 { 1798 ASSERT_RTNL(); 1799 1800 wol->supported = 0; 1801 wol->wolopts = 0; 1802 1803 if (pl->phydev) 1804 phy_ethtool_get_wol(pl->phydev, wol); 1805 } 1806 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 1807 1808 /** 1809 * phylink_ethtool_set_wol() - set wake on lan parameters 1810 * @pl: a pointer to a &struct phylink returned from phylink_create() 1811 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 1812 * 1813 * Set the wake on lan parameters for the PHY attached to the phylink 1814 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 1815 * error. 1816 * 1817 * Returns zero on success or negative errno code. 1818 */ 1819 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 1820 { 1821 int ret = -EOPNOTSUPP; 1822 1823 ASSERT_RTNL(); 1824 1825 if (pl->phydev) 1826 ret = phy_ethtool_set_wol(pl->phydev, wol); 1827 1828 return ret; 1829 } 1830 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 1831 1832 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 1833 { 1834 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 1835 1836 linkmode_zero(mask); 1837 phylink_set_port_modes(mask); 1838 1839 linkmode_and(dst, dst, mask); 1840 linkmode_or(dst, dst, b); 1841 } 1842 1843 static void phylink_get_ksettings(const struct phylink_link_state *state, 1844 struct ethtool_link_ksettings *kset) 1845 { 1846 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 1847 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 1848 kset->base.speed = state->speed; 1849 kset->base.duplex = state->duplex; 1850 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 1851 AUTONEG_DISABLE; 1852 } 1853 1854 /** 1855 * phylink_ethtool_ksettings_get() - get the current link settings 1856 * @pl: a pointer to a &struct phylink returned from phylink_create() 1857 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 1858 * 1859 * Read the current link settings for the phylink instance specified by @pl. 1860 * This will be the link settings read from the MAC, PHY or fixed link 1861 * settings depending on the current negotiation mode. 1862 */ 1863 int phylink_ethtool_ksettings_get(struct phylink *pl, 1864 struct ethtool_link_ksettings *kset) 1865 { 1866 struct phylink_link_state link_state; 1867 1868 ASSERT_RTNL(); 1869 1870 if (pl->phydev) 1871 phy_ethtool_ksettings_get(pl->phydev, kset); 1872 else 1873 kset->base.port = pl->link_port; 1874 1875 linkmode_copy(kset->link_modes.supported, pl->supported); 1876 1877 switch (pl->cur_link_an_mode) { 1878 case MLO_AN_FIXED: 1879 /* We are using fixed settings. Report these as the 1880 * current link settings - and note that these also 1881 * represent the supported speeds/duplex/pause modes. 1882 */ 1883 phylink_get_fixed_state(pl, &link_state); 1884 phylink_get_ksettings(&link_state, kset); 1885 break; 1886 1887 case MLO_AN_INBAND: 1888 /* If there is a phy attached, then use the reported 1889 * settings from the phy with no modification. 1890 */ 1891 if (pl->phydev) 1892 break; 1893 1894 phylink_mac_pcs_get_state(pl, &link_state); 1895 1896 /* The MAC is reporting the link results from its own PCS 1897 * layer via in-band status. Report these as the current 1898 * link settings. 1899 */ 1900 phylink_get_ksettings(&link_state, kset); 1901 break; 1902 } 1903 1904 return 0; 1905 } 1906 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 1907 1908 /** 1909 * phylink_ethtool_ksettings_set() - set the link settings 1910 * @pl: a pointer to a &struct phylink returned from phylink_create() 1911 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 1912 */ 1913 int phylink_ethtool_ksettings_set(struct phylink *pl, 1914 const struct ethtool_link_ksettings *kset) 1915 { 1916 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 1917 struct phylink_link_state config; 1918 const struct phy_setting *s; 1919 1920 ASSERT_RTNL(); 1921 1922 if (pl->phydev) { 1923 /* We can rely on phylib for this update; we also do not need 1924 * to update the pl->link_config settings: 1925 * - the configuration returned via ksettings_get() will come 1926 * from phylib whenever a PHY is present. 1927 * - link_config.interface will be updated by the PHY calling 1928 * back via phylink_phy_change() and a subsequent resolve. 1929 * - initial link configuration for PHY mode comes from the 1930 * last phy state updated via phylink_phy_change(). 1931 * - other configuration changes (e.g. pause modes) are 1932 * performed directly via phylib. 1933 * - if in in-band mode with a PHY, the link configuration 1934 * is passed on the link from the PHY, and all of 1935 * link_config.{speed,duplex,an_enabled,pause} are not used. 1936 * - the only possible use would be link_config.advertising 1937 * pause modes when in 1000base-X mode with a PHY, but in 1938 * the presence of a PHY, this should not be changed as that 1939 * should be determined from the media side advertisement. 1940 */ 1941 return phy_ethtool_ksettings_set(pl->phydev, kset); 1942 } 1943 1944 config = pl->link_config; 1945 1946 /* Mask out unsupported advertisements */ 1947 linkmode_and(config.advertising, kset->link_modes.advertising, 1948 pl->supported); 1949 1950 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 1951 switch (kset->base.autoneg) { 1952 case AUTONEG_DISABLE: 1953 /* Autonegotiation disabled, select a suitable speed and 1954 * duplex. 1955 */ 1956 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 1957 pl->supported, false); 1958 if (!s) 1959 return -EINVAL; 1960 1961 /* If we have a fixed link, refuse to change link parameters. 1962 * If the link parameters match, accept them but do nothing. 1963 */ 1964 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1965 if (s->speed != pl->link_config.speed || 1966 s->duplex != pl->link_config.duplex) 1967 return -EINVAL; 1968 return 0; 1969 } 1970 1971 config.speed = s->speed; 1972 config.duplex = s->duplex; 1973 break; 1974 1975 case AUTONEG_ENABLE: 1976 /* If we have a fixed link, allow autonegotiation (since that 1977 * is our default case) but do not allow the advertisement to 1978 * be changed. If the advertisement matches, simply return. 1979 */ 1980 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 1981 if (!linkmode_equal(config.advertising, 1982 pl->link_config.advertising)) 1983 return -EINVAL; 1984 return 0; 1985 } 1986 1987 config.speed = SPEED_UNKNOWN; 1988 config.duplex = DUPLEX_UNKNOWN; 1989 break; 1990 1991 default: 1992 return -EINVAL; 1993 } 1994 1995 /* We have ruled out the case with a PHY attached, and the 1996 * fixed-link cases. All that is left are in-band links. 1997 */ 1998 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 1999 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2000 config.an_enabled); 2001 2002 /* If this link is with an SFP, ensure that changes to advertised modes 2003 * also cause the associated interface to be selected such that the 2004 * link can be configured correctly. 2005 */ 2006 if (pl->sfp_bus) { 2007 config.interface = sfp_select_interface(pl->sfp_bus, 2008 config.advertising); 2009 if (config.interface == PHY_INTERFACE_MODE_NA) { 2010 phylink_err(pl, 2011 "selection of interface failed, advertisement %*pb\n", 2012 __ETHTOOL_LINK_MODE_MASK_NBITS, 2013 config.advertising); 2014 return -EINVAL; 2015 } 2016 2017 /* Revalidate with the selected interface */ 2018 linkmode_copy(support, pl->supported); 2019 if (phylink_validate(pl, support, &config)) { 2020 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2021 phylink_an_mode_str(pl->cur_link_an_mode), 2022 phy_modes(config.interface), 2023 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2024 return -EINVAL; 2025 } 2026 } else { 2027 /* Validate without changing the current supported mask. */ 2028 linkmode_copy(support, pl->supported); 2029 if (phylink_validate(pl, support, &config)) 2030 return -EINVAL; 2031 } 2032 2033 /* If autonegotiation is enabled, we must have an advertisement */ 2034 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2035 return -EINVAL; 2036 2037 mutex_lock(&pl->state_mutex); 2038 pl->link_config.speed = config.speed; 2039 pl->link_config.duplex = config.duplex; 2040 pl->link_config.an_enabled = config.an_enabled; 2041 2042 if (pl->link_config.interface != config.interface) { 2043 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2044 /* We need to force the link down, then change the interface */ 2045 if (pl->old_link_state) { 2046 phylink_link_down(pl); 2047 pl->old_link_state = false; 2048 } 2049 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2050 &pl->phylink_disable_state)) 2051 phylink_major_config(pl, false, &config); 2052 pl->link_config.interface = config.interface; 2053 linkmode_copy(pl->link_config.advertising, config.advertising); 2054 } else if (!linkmode_equal(pl->link_config.advertising, 2055 config.advertising)) { 2056 linkmode_copy(pl->link_config.advertising, config.advertising); 2057 phylink_change_inband_advert(pl); 2058 } 2059 mutex_unlock(&pl->state_mutex); 2060 2061 return 0; 2062 } 2063 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2064 2065 /** 2066 * phylink_ethtool_nway_reset() - restart negotiation 2067 * @pl: a pointer to a &struct phylink returned from phylink_create() 2068 * 2069 * Restart negotiation for the phylink instance specified by @pl. This will 2070 * cause any attached phy to restart negotiation with the link partner, and 2071 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2072 * negotiation. 2073 * 2074 * Returns zero on success, or negative error code. 2075 */ 2076 int phylink_ethtool_nway_reset(struct phylink *pl) 2077 { 2078 int ret = 0; 2079 2080 ASSERT_RTNL(); 2081 2082 if (pl->phydev) 2083 ret = phy_restart_aneg(pl->phydev); 2084 phylink_mac_pcs_an_restart(pl); 2085 2086 return ret; 2087 } 2088 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2089 2090 /** 2091 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2092 * @pl: a pointer to a &struct phylink returned from phylink_create() 2093 * @pause: a pointer to a &struct ethtool_pauseparam 2094 */ 2095 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2096 struct ethtool_pauseparam *pause) 2097 { 2098 ASSERT_RTNL(); 2099 2100 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2101 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2102 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2103 } 2104 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2105 2106 /** 2107 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2108 * @pl: a pointer to a &struct phylink returned from phylink_create() 2109 * @pause: a pointer to a &struct ethtool_pauseparam 2110 */ 2111 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2112 struct ethtool_pauseparam *pause) 2113 { 2114 struct phylink_link_state *config = &pl->link_config; 2115 bool manual_changed; 2116 int pause_state; 2117 2118 ASSERT_RTNL(); 2119 2120 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2121 return -EOPNOTSUPP; 2122 2123 if (!phylink_test(pl->supported, Pause) && 2124 !phylink_test(pl->supported, Asym_Pause)) 2125 return -EOPNOTSUPP; 2126 2127 if (!phylink_test(pl->supported, Asym_Pause) && 2128 pause->rx_pause != pause->tx_pause) 2129 return -EINVAL; 2130 2131 pause_state = 0; 2132 if (pause->autoneg) 2133 pause_state |= MLO_PAUSE_AN; 2134 if (pause->rx_pause) 2135 pause_state |= MLO_PAUSE_RX; 2136 if (pause->tx_pause) 2137 pause_state |= MLO_PAUSE_TX; 2138 2139 mutex_lock(&pl->state_mutex); 2140 /* 2141 * See the comments for linkmode_set_pause(), wrt the deficiencies 2142 * with the current implementation. A solution to this issue would 2143 * be: 2144 * ethtool Local device 2145 * rx tx Pause AsymDir 2146 * 0 0 0 0 2147 * 1 0 1 1 2148 * 0 1 0 1 2149 * 1 1 1 1 2150 * and then use the ethtool rx/tx enablement status to mask the 2151 * rx/tx pause resolution. 2152 */ 2153 linkmode_set_pause(config->advertising, pause->tx_pause, 2154 pause->rx_pause); 2155 2156 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2157 (!(pause_state & MLO_PAUSE_AN) && 2158 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2159 2160 config->pause = pause_state; 2161 2162 /* Update our in-band advertisement, triggering a renegotiation if 2163 * the advertisement changed. 2164 */ 2165 if (!pl->phydev) 2166 phylink_change_inband_advert(pl); 2167 2168 mutex_unlock(&pl->state_mutex); 2169 2170 /* If we have a PHY, a change of the pause frame advertisement will 2171 * cause phylib to renegotiate (if AN is enabled) which will in turn 2172 * call our phylink_phy_change() and trigger a resolve. Note that 2173 * we can't hold our state mutex while calling phy_set_asym_pause(). 2174 */ 2175 if (pl->phydev) 2176 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2177 pause->tx_pause); 2178 2179 /* If the manual pause settings changed, make sure we trigger a 2180 * resolve to update their state; we can not guarantee that the 2181 * link will cycle. 2182 */ 2183 if (manual_changed) { 2184 pl->mac_link_dropped = true; 2185 phylink_run_resolve(pl); 2186 } 2187 2188 return 0; 2189 } 2190 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2191 2192 /** 2193 * phylink_get_eee_err() - read the energy efficient ethernet error 2194 * counter 2195 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2196 * 2197 * Read the Energy Efficient Ethernet error counter from the PHY associated 2198 * with the phylink instance specified by @pl. 2199 * 2200 * Returns positive error counter value, or negative error code. 2201 */ 2202 int phylink_get_eee_err(struct phylink *pl) 2203 { 2204 int ret = 0; 2205 2206 ASSERT_RTNL(); 2207 2208 if (pl->phydev) 2209 ret = phy_get_eee_err(pl->phydev); 2210 2211 return ret; 2212 } 2213 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2214 2215 /** 2216 * phylink_init_eee() - init and check the EEE features 2217 * @pl: a pointer to a &struct phylink returned from phylink_create() 2218 * @clk_stop_enable: allow PHY to stop receive clock 2219 * 2220 * Must be called either with RTNL held or within mac_link_up() 2221 */ 2222 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2223 { 2224 int ret = -EOPNOTSUPP; 2225 2226 if (pl->phydev) 2227 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2228 2229 return ret; 2230 } 2231 EXPORT_SYMBOL_GPL(phylink_init_eee); 2232 2233 /** 2234 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2235 * @pl: a pointer to a &struct phylink returned from phylink_create() 2236 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2237 */ 2238 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2239 { 2240 int ret = -EOPNOTSUPP; 2241 2242 ASSERT_RTNL(); 2243 2244 if (pl->phydev) 2245 ret = phy_ethtool_get_eee(pl->phydev, eee); 2246 2247 return ret; 2248 } 2249 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2250 2251 /** 2252 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2253 * @pl: a pointer to a &struct phylink returned from phylink_create() 2254 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2255 */ 2256 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2257 { 2258 int ret = -EOPNOTSUPP; 2259 2260 ASSERT_RTNL(); 2261 2262 if (pl->phydev) 2263 ret = phy_ethtool_set_eee(pl->phydev, eee); 2264 2265 return ret; 2266 } 2267 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2268 2269 /* This emulates MII registers for a fixed-mode phy operating as per the 2270 * passed in state. "aneg" defines if we report negotiation is possible. 2271 * 2272 * FIXME: should deal with negotiation state too. 2273 */ 2274 static int phylink_mii_emul_read(unsigned int reg, 2275 struct phylink_link_state *state) 2276 { 2277 struct fixed_phy_status fs; 2278 unsigned long *lpa = state->lp_advertising; 2279 int val; 2280 2281 fs.link = state->link; 2282 fs.speed = state->speed; 2283 fs.duplex = state->duplex; 2284 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2285 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2286 2287 val = swphy_read_reg(reg, &fs); 2288 if (reg == MII_BMSR) { 2289 if (!state->an_complete) 2290 val &= ~BMSR_ANEGCOMPLETE; 2291 } 2292 return val; 2293 } 2294 2295 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2296 unsigned int reg) 2297 { 2298 struct phy_device *phydev = pl->phydev; 2299 int prtad, devad; 2300 2301 if (mdio_phy_id_is_c45(phy_id)) { 2302 prtad = mdio_phy_id_prtad(phy_id); 2303 devad = mdio_phy_id_devad(phy_id); 2304 devad = mdiobus_c45_addr(devad, reg); 2305 } else if (phydev->is_c45) { 2306 switch (reg) { 2307 case MII_BMCR: 2308 case MII_BMSR: 2309 case MII_PHYSID1: 2310 case MII_PHYSID2: 2311 devad = __ffs(phydev->c45_ids.mmds_present); 2312 break; 2313 case MII_ADVERTISE: 2314 case MII_LPA: 2315 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2316 return -EINVAL; 2317 devad = MDIO_MMD_AN; 2318 if (reg == MII_ADVERTISE) 2319 reg = MDIO_AN_ADVERTISE; 2320 else 2321 reg = MDIO_AN_LPA; 2322 break; 2323 default: 2324 return -EINVAL; 2325 } 2326 prtad = phy_id; 2327 devad = mdiobus_c45_addr(devad, reg); 2328 } else { 2329 prtad = phy_id; 2330 devad = reg; 2331 } 2332 return mdiobus_read(pl->phydev->mdio.bus, prtad, devad); 2333 } 2334 2335 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2336 unsigned int reg, unsigned int val) 2337 { 2338 struct phy_device *phydev = pl->phydev; 2339 int prtad, devad; 2340 2341 if (mdio_phy_id_is_c45(phy_id)) { 2342 prtad = mdio_phy_id_prtad(phy_id); 2343 devad = mdio_phy_id_devad(phy_id); 2344 devad = mdiobus_c45_addr(devad, reg); 2345 } else if (phydev->is_c45) { 2346 switch (reg) { 2347 case MII_BMCR: 2348 case MII_BMSR: 2349 case MII_PHYSID1: 2350 case MII_PHYSID2: 2351 devad = __ffs(phydev->c45_ids.mmds_present); 2352 break; 2353 case MII_ADVERTISE: 2354 case MII_LPA: 2355 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2356 return -EINVAL; 2357 devad = MDIO_MMD_AN; 2358 if (reg == MII_ADVERTISE) 2359 reg = MDIO_AN_ADVERTISE; 2360 else 2361 reg = MDIO_AN_LPA; 2362 break; 2363 default: 2364 return -EINVAL; 2365 } 2366 prtad = phy_id; 2367 devad = mdiobus_c45_addr(devad, reg); 2368 } else { 2369 prtad = phy_id; 2370 devad = reg; 2371 } 2372 2373 return mdiobus_write(phydev->mdio.bus, prtad, devad, val); 2374 } 2375 2376 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2377 unsigned int reg) 2378 { 2379 struct phylink_link_state state; 2380 int val = 0xffff; 2381 2382 switch (pl->cur_link_an_mode) { 2383 case MLO_AN_FIXED: 2384 if (phy_id == 0) { 2385 phylink_get_fixed_state(pl, &state); 2386 val = phylink_mii_emul_read(reg, &state); 2387 } 2388 break; 2389 2390 case MLO_AN_PHY: 2391 return -EOPNOTSUPP; 2392 2393 case MLO_AN_INBAND: 2394 if (phy_id == 0) { 2395 phylink_mac_pcs_get_state(pl, &state); 2396 val = phylink_mii_emul_read(reg, &state); 2397 } 2398 break; 2399 } 2400 2401 return val & 0xffff; 2402 } 2403 2404 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2405 unsigned int reg, unsigned int val) 2406 { 2407 switch (pl->cur_link_an_mode) { 2408 case MLO_AN_FIXED: 2409 break; 2410 2411 case MLO_AN_PHY: 2412 return -EOPNOTSUPP; 2413 2414 case MLO_AN_INBAND: 2415 break; 2416 } 2417 2418 return 0; 2419 } 2420 2421 /** 2422 * phylink_mii_ioctl() - generic mii ioctl interface 2423 * @pl: a pointer to a &struct phylink returned from phylink_create() 2424 * @ifr: a pointer to a &struct ifreq for socket ioctls 2425 * @cmd: ioctl cmd to execute 2426 * 2427 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2428 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2429 * 2430 * Returns: zero on success or negative error code. 2431 * 2432 * %SIOCGMIIPHY: 2433 * read register from the current PHY. 2434 * %SIOCGMIIREG: 2435 * read register from the specified PHY. 2436 * %SIOCSMIIREG: 2437 * set a register on the specified PHY. 2438 */ 2439 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2440 { 2441 struct mii_ioctl_data *mii = if_mii(ifr); 2442 int ret; 2443 2444 ASSERT_RTNL(); 2445 2446 if (pl->phydev) { 2447 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2448 switch (cmd) { 2449 case SIOCGMIIPHY: 2450 mii->phy_id = pl->phydev->mdio.addr; 2451 fallthrough; 2452 2453 case SIOCGMIIREG: 2454 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2455 if (ret >= 0) { 2456 mii->val_out = ret; 2457 ret = 0; 2458 } 2459 break; 2460 2461 case SIOCSMIIREG: 2462 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2463 mii->val_in); 2464 break; 2465 2466 default: 2467 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2468 break; 2469 } 2470 } else { 2471 switch (cmd) { 2472 case SIOCGMIIPHY: 2473 mii->phy_id = 0; 2474 fallthrough; 2475 2476 case SIOCGMIIREG: 2477 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2478 if (ret >= 0) { 2479 mii->val_out = ret; 2480 ret = 0; 2481 } 2482 break; 2483 2484 case SIOCSMIIREG: 2485 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2486 mii->val_in); 2487 break; 2488 2489 default: 2490 ret = -EOPNOTSUPP; 2491 break; 2492 } 2493 } 2494 2495 return ret; 2496 } 2497 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2498 2499 /** 2500 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2501 * link partners 2502 * @pl: a pointer to a &struct phylink returned from phylink_create() 2503 * @sync: perform action synchronously 2504 * 2505 * If we have a PHY that is not part of a SFP module, then set the speed 2506 * as described in the phy_speed_down() function. Please see this function 2507 * for a description of the @sync parameter. 2508 * 2509 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2510 */ 2511 int phylink_speed_down(struct phylink *pl, bool sync) 2512 { 2513 int ret = 0; 2514 2515 ASSERT_RTNL(); 2516 2517 if (!pl->sfp_bus && pl->phydev) 2518 ret = phy_speed_down(pl->phydev, sync); 2519 2520 return ret; 2521 } 2522 EXPORT_SYMBOL_GPL(phylink_speed_down); 2523 2524 /** 2525 * phylink_speed_up() - restore the advertised speeds prior to the call to 2526 * phylink_speed_down() 2527 * @pl: a pointer to a &struct phylink returned from phylink_create() 2528 * 2529 * If we have a PHY that is not part of a SFP module, then restore the 2530 * PHY speeds as per phy_speed_up(). 2531 * 2532 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2533 */ 2534 int phylink_speed_up(struct phylink *pl) 2535 { 2536 int ret = 0; 2537 2538 ASSERT_RTNL(); 2539 2540 if (!pl->sfp_bus && pl->phydev) 2541 ret = phy_speed_up(pl->phydev); 2542 2543 return ret; 2544 } 2545 EXPORT_SYMBOL_GPL(phylink_speed_up); 2546 2547 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2548 { 2549 struct phylink *pl = upstream; 2550 2551 pl->netdev->sfp_bus = bus; 2552 } 2553 2554 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2555 { 2556 struct phylink *pl = upstream; 2557 2558 pl->netdev->sfp_bus = NULL; 2559 } 2560 2561 static int phylink_sfp_config(struct phylink *pl, u8 mode, 2562 const unsigned long *supported, 2563 const unsigned long *advertising) 2564 { 2565 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2566 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2567 struct phylink_link_state config; 2568 phy_interface_t iface; 2569 bool changed; 2570 int ret; 2571 2572 linkmode_copy(support, supported); 2573 2574 memset(&config, 0, sizeof(config)); 2575 linkmode_copy(config.advertising, advertising); 2576 config.interface = PHY_INTERFACE_MODE_NA; 2577 config.speed = SPEED_UNKNOWN; 2578 config.duplex = DUPLEX_UNKNOWN; 2579 config.pause = MLO_PAUSE_AN; 2580 config.an_enabled = pl->link_config.an_enabled; 2581 2582 /* Ignore errors if we're expecting a PHY to attach later */ 2583 ret = phylink_validate(pl, support, &config); 2584 if (ret) { 2585 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2586 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2587 ERR_PTR(ret)); 2588 return ret; 2589 } 2590 2591 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2592 if (iface == PHY_INTERFACE_MODE_NA) { 2593 phylink_err(pl, 2594 "selection of interface failed, advertisement %*pb\n", 2595 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2596 return -EINVAL; 2597 } 2598 2599 config.interface = iface; 2600 linkmode_copy(support1, support); 2601 ret = phylink_validate(pl, support1, &config); 2602 if (ret) { 2603 phylink_err(pl, 2604 "validation of %s/%s with support %*pb failed: %pe\n", 2605 phylink_an_mode_str(mode), 2606 phy_modes(config.interface), 2607 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2608 ERR_PTR(ret)); 2609 return ret; 2610 } 2611 2612 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2613 phylink_an_mode_str(mode), phy_modes(config.interface), 2614 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2615 2616 if (phy_interface_mode_is_8023z(iface) && pl->phydev) 2617 return -EINVAL; 2618 2619 changed = !linkmode_equal(pl->supported, support) || 2620 !linkmode_equal(pl->link_config.advertising, 2621 config.advertising); 2622 if (changed) { 2623 linkmode_copy(pl->supported, support); 2624 linkmode_copy(pl->link_config.advertising, config.advertising); 2625 } 2626 2627 if (pl->cur_link_an_mode != mode || 2628 pl->link_config.interface != config.interface) { 2629 pl->link_config.interface = config.interface; 2630 pl->cur_link_an_mode = mode; 2631 2632 changed = true; 2633 2634 phylink_info(pl, "switched to %s/%s link mode\n", 2635 phylink_an_mode_str(mode), 2636 phy_modes(config.interface)); 2637 } 2638 2639 pl->link_port = pl->sfp_port; 2640 2641 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2642 &pl->phylink_disable_state)) 2643 phylink_mac_initial_config(pl, false); 2644 2645 return ret; 2646 } 2647 2648 static int phylink_sfp_module_insert(void *upstream, 2649 const struct sfp_eeprom_id *id) 2650 { 2651 struct phylink *pl = upstream; 2652 unsigned long *support = pl->sfp_support; 2653 2654 ASSERT_RTNL(); 2655 2656 linkmode_zero(support); 2657 sfp_parse_support(pl->sfp_bus, id, support); 2658 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, support); 2659 2660 /* If this module may have a PHY connecting later, defer until later */ 2661 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 2662 if (pl->sfp_may_have_phy) 2663 return 0; 2664 2665 return phylink_sfp_config(pl, MLO_AN_INBAND, support, support); 2666 } 2667 2668 static int phylink_sfp_module_start(void *upstream) 2669 { 2670 struct phylink *pl = upstream; 2671 2672 /* If this SFP module has a PHY, start the PHY now. */ 2673 if (pl->phydev) { 2674 phy_start(pl->phydev); 2675 return 0; 2676 } 2677 2678 /* If the module may have a PHY but we didn't detect one we 2679 * need to configure the MAC here. 2680 */ 2681 if (!pl->sfp_may_have_phy) 2682 return 0; 2683 2684 return phylink_sfp_config(pl, MLO_AN_INBAND, 2685 pl->sfp_support, pl->sfp_support); 2686 } 2687 2688 static void phylink_sfp_module_stop(void *upstream) 2689 { 2690 struct phylink *pl = upstream; 2691 2692 /* If this SFP module has a PHY, stop it. */ 2693 if (pl->phydev) 2694 phy_stop(pl->phydev); 2695 } 2696 2697 static void phylink_sfp_link_down(void *upstream) 2698 { 2699 struct phylink *pl = upstream; 2700 2701 ASSERT_RTNL(); 2702 2703 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 2704 } 2705 2706 static void phylink_sfp_link_up(void *upstream) 2707 { 2708 struct phylink *pl = upstream; 2709 2710 ASSERT_RTNL(); 2711 2712 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 2713 } 2714 2715 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 2716 * or 802.3z control word, so inband will not work. 2717 */ 2718 static bool phylink_phy_no_inband(struct phy_device *phy) 2719 { 2720 return phy->is_c45 && 2721 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 2722 } 2723 2724 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 2725 { 2726 struct phylink *pl = upstream; 2727 phy_interface_t interface; 2728 u8 mode; 2729 int ret; 2730 2731 /* 2732 * This is the new way of dealing with flow control for PHYs, 2733 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2734 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2735 * using our validate call to the MAC, we rely upon the MAC 2736 * clearing the bits from both supported and advertising fields. 2737 */ 2738 phy_support_asym_pause(phy); 2739 2740 if (phylink_phy_no_inband(phy)) 2741 mode = MLO_AN_PHY; 2742 else 2743 mode = MLO_AN_INBAND; 2744 2745 /* Do the initial configuration */ 2746 ret = phylink_sfp_config(pl, mode, phy->supported, phy->advertising); 2747 if (ret < 0) 2748 return ret; 2749 2750 interface = pl->link_config.interface; 2751 ret = phylink_attach_phy(pl, phy, interface); 2752 if (ret < 0) 2753 return ret; 2754 2755 ret = phylink_bringup_phy(pl, phy, interface); 2756 if (ret) 2757 phy_detach(phy); 2758 2759 return ret; 2760 } 2761 2762 static void phylink_sfp_disconnect_phy(void *upstream) 2763 { 2764 phylink_disconnect_phy(upstream); 2765 } 2766 2767 static const struct sfp_upstream_ops sfp_phylink_ops = { 2768 .attach = phylink_sfp_attach, 2769 .detach = phylink_sfp_detach, 2770 .module_insert = phylink_sfp_module_insert, 2771 .module_start = phylink_sfp_module_start, 2772 .module_stop = phylink_sfp_module_stop, 2773 .link_up = phylink_sfp_link_up, 2774 .link_down = phylink_sfp_link_down, 2775 .connect_phy = phylink_sfp_connect_phy, 2776 .disconnect_phy = phylink_sfp_disconnect_phy, 2777 }; 2778 2779 /* Helpers for MAC drivers */ 2780 2781 static void phylink_decode_c37_word(struct phylink_link_state *state, 2782 uint16_t config_reg, int speed) 2783 { 2784 bool tx_pause, rx_pause; 2785 int fd_bit; 2786 2787 if (speed == SPEED_2500) 2788 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 2789 else 2790 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 2791 2792 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 2793 2794 if (linkmode_test_bit(fd_bit, state->advertising) && 2795 linkmode_test_bit(fd_bit, state->lp_advertising)) { 2796 state->speed = speed; 2797 state->duplex = DUPLEX_FULL; 2798 } else { 2799 /* negotiation failure */ 2800 state->link = false; 2801 } 2802 2803 linkmode_resolve_pause(state->advertising, state->lp_advertising, 2804 &tx_pause, &rx_pause); 2805 2806 if (tx_pause) 2807 state->pause |= MLO_PAUSE_TX; 2808 if (rx_pause) 2809 state->pause |= MLO_PAUSE_RX; 2810 } 2811 2812 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 2813 uint16_t config_reg) 2814 { 2815 if (!(config_reg & LPA_SGMII_LINK)) { 2816 state->link = false; 2817 return; 2818 } 2819 2820 switch (config_reg & LPA_SGMII_SPD_MASK) { 2821 case LPA_SGMII_10: 2822 state->speed = SPEED_10; 2823 break; 2824 case LPA_SGMII_100: 2825 state->speed = SPEED_100; 2826 break; 2827 case LPA_SGMII_1000: 2828 state->speed = SPEED_1000; 2829 break; 2830 default: 2831 state->link = false; 2832 return; 2833 } 2834 if (config_reg & LPA_SGMII_FULL_DUPLEX) 2835 state->duplex = DUPLEX_FULL; 2836 else 2837 state->duplex = DUPLEX_HALF; 2838 } 2839 2840 /** 2841 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 2842 * @state: a pointer to a struct phylink_link_state. 2843 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 2844 * 2845 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 2846 * code word. Decode the USXGMII code word and populate the corresponding fields 2847 * (speed, duplex) into the phylink_link_state structure. 2848 */ 2849 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 2850 uint16_t lpa) 2851 { 2852 switch (lpa & MDIO_USXGMII_SPD_MASK) { 2853 case MDIO_USXGMII_10: 2854 state->speed = SPEED_10; 2855 break; 2856 case MDIO_USXGMII_100: 2857 state->speed = SPEED_100; 2858 break; 2859 case MDIO_USXGMII_1000: 2860 state->speed = SPEED_1000; 2861 break; 2862 case MDIO_USXGMII_2500: 2863 state->speed = SPEED_2500; 2864 break; 2865 case MDIO_USXGMII_5000: 2866 state->speed = SPEED_5000; 2867 break; 2868 case MDIO_USXGMII_10G: 2869 state->speed = SPEED_10000; 2870 break; 2871 default: 2872 state->link = false; 2873 return; 2874 } 2875 2876 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 2877 state->duplex = DUPLEX_FULL; 2878 else 2879 state->duplex = DUPLEX_HALF; 2880 } 2881 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 2882 2883 /** 2884 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 2885 * @state: a pointer to a &struct phylink_link_state. 2886 * @bmsr: The value of the %MII_BMSR register 2887 * @lpa: The value of the %MII_LPA register 2888 * 2889 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2890 * clause 37 negotiation and/or SGMII control. 2891 * 2892 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 2893 * the phylink @state structure. This is suitable to be used for implementing 2894 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 2895 * accessing @bmsr and @lpa cannot be done with MDIO directly. 2896 */ 2897 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 2898 u16 bmsr, u16 lpa) 2899 { 2900 state->link = !!(bmsr & BMSR_LSTATUS); 2901 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 2902 /* If there is no link or autonegotiation is disabled, the LP advertisement 2903 * data is not meaningful, so don't go any further. 2904 */ 2905 if (!state->link || !state->an_enabled) 2906 return; 2907 2908 switch (state->interface) { 2909 case PHY_INTERFACE_MODE_1000BASEX: 2910 phylink_decode_c37_word(state, lpa, SPEED_1000); 2911 break; 2912 2913 case PHY_INTERFACE_MODE_2500BASEX: 2914 phylink_decode_c37_word(state, lpa, SPEED_2500); 2915 break; 2916 2917 case PHY_INTERFACE_MODE_SGMII: 2918 case PHY_INTERFACE_MODE_QSGMII: 2919 phylink_decode_sgmii_word(state, lpa); 2920 break; 2921 2922 default: 2923 state->link = false; 2924 break; 2925 } 2926 } 2927 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 2928 2929 /** 2930 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 2931 * @pcs: a pointer to a &struct mdio_device. 2932 * @state: a pointer to a &struct phylink_link_state. 2933 * 2934 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2935 * clause 37 negotiation and/or SGMII control. 2936 * 2937 * Read the MAC PCS state from the MII device configured in @config and 2938 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 2939 * the phylink @state structure. This is suitable to be directly plugged 2940 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 2941 * structure. 2942 */ 2943 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 2944 struct phylink_link_state *state) 2945 { 2946 int bmsr, lpa; 2947 2948 bmsr = mdiodev_read(pcs, MII_BMSR); 2949 lpa = mdiodev_read(pcs, MII_LPA); 2950 if (bmsr < 0 || lpa < 0) { 2951 state->link = false; 2952 return; 2953 } 2954 2955 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 2956 } 2957 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 2958 2959 /** 2960 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 2961 * advertisement 2962 * @interface: the PHY interface mode being configured 2963 * @advertising: the ethtool advertisement mask 2964 * 2965 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 2966 * clause 37 negotiation and/or SGMII control. 2967 * 2968 * Encode the clause 37 PCS advertisement as specified by @interface and 2969 * @advertising. 2970 * 2971 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 2972 */ 2973 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 2974 const unsigned long *advertising) 2975 { 2976 u16 adv; 2977 2978 switch (interface) { 2979 case PHY_INTERFACE_MODE_1000BASEX: 2980 case PHY_INTERFACE_MODE_2500BASEX: 2981 adv = ADVERTISE_1000XFULL; 2982 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 2983 advertising)) 2984 adv |= ADVERTISE_1000XPAUSE; 2985 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 2986 advertising)) 2987 adv |= ADVERTISE_1000XPSE_ASYM; 2988 return adv; 2989 case PHY_INTERFACE_MODE_SGMII: 2990 return 0x0001; 2991 default: 2992 /* Nothing to do for other modes */ 2993 return -EINVAL; 2994 } 2995 } 2996 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 2997 2998 /** 2999 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3000 * @pcs: a pointer to a &struct mdio_device. 3001 * @mode: link autonegotiation mode 3002 * @interface: the PHY interface mode being configured 3003 * @advertising: the ethtool advertisement mask 3004 * 3005 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3006 * parameters for the @mode, @interface and @advertising parameters. 3007 * Returns negative error number on failure, zero if the advertisement 3008 * has not changed, or positive if there is a change. 3009 */ 3010 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3011 phy_interface_t interface, 3012 const unsigned long *advertising) 3013 { 3014 bool changed = 0; 3015 u16 bmcr; 3016 int ret, adv; 3017 3018 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3019 if (adv >= 0) { 3020 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3021 MII_ADVERTISE, 0xffff, adv); 3022 if (ret < 0) 3023 return ret; 3024 changed = ret; 3025 } 3026 3027 /* Ensure ISOLATE bit is disabled */ 3028 if (mode == MLO_AN_INBAND && 3029 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising)) 3030 bmcr = BMCR_ANENABLE; 3031 else 3032 bmcr = 0; 3033 3034 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3035 if (ret < 0) 3036 return ret; 3037 3038 return changed; 3039 } 3040 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3041 3042 /** 3043 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3044 * @pcs: a pointer to a &struct mdio_device. 3045 * 3046 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3047 * clause 37 negotiation. 3048 * 3049 * Restart the clause 37 negotiation with the link partner. This is 3050 * suitable to be directly plugged into the mac_pcs_get_state() member 3051 * of the struct phylink_mac_ops structure. 3052 */ 3053 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3054 { 3055 int val = mdiodev_read(pcs, MII_BMCR); 3056 3057 if (val >= 0) { 3058 val |= BMCR_ANRESTART; 3059 3060 mdiodev_write(pcs, MII_BMCR, val); 3061 } 3062 } 3063 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3064 3065 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3066 struct phylink_link_state *state) 3067 { 3068 struct mii_bus *bus = pcs->bus; 3069 int addr = pcs->addr; 3070 int stat; 3071 3072 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3073 if (stat < 0) { 3074 state->link = false; 3075 return; 3076 } 3077 3078 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3079 if (!state->link) 3080 return; 3081 3082 switch (state->interface) { 3083 case PHY_INTERFACE_MODE_10GBASER: 3084 state->speed = SPEED_10000; 3085 state->duplex = DUPLEX_FULL; 3086 break; 3087 3088 default: 3089 break; 3090 } 3091 } 3092 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3093 3094 MODULE_LICENSE("GPL v2"); 3095