1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 return SPEED_2500; 235 236 case PHY_INTERFACE_MODE_5GBASER: 237 return SPEED_5000; 238 239 case PHY_INTERFACE_MODE_XGMII: 240 case PHY_INTERFACE_MODE_RXAUI: 241 case PHY_INTERFACE_MODE_XAUI: 242 case PHY_INTERFACE_MODE_10GBASER: 243 case PHY_INTERFACE_MODE_10GKR: 244 case PHY_INTERFACE_MODE_USXGMII: 245 return SPEED_10000; 246 247 case PHY_INTERFACE_MODE_25GBASER: 248 return SPEED_25000; 249 250 case PHY_INTERFACE_MODE_XLGMII: 251 return SPEED_40000; 252 253 case PHY_INTERFACE_MODE_INTERNAL: 254 case PHY_INTERFACE_MODE_NA: 255 case PHY_INTERFACE_MODE_MAX: 256 /* No idea! Garbage in, unknown out */ 257 return SPEED_UNKNOWN; 258 } 259 260 /* If we get here, someone forgot to add an interface mode above */ 261 WARN_ON_ONCE(1); 262 return SPEED_UNKNOWN; 263 } 264 265 /** 266 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 267 * @linkmodes: ethtool linkmode mask (must be already initialised) 268 * @caps: bitmask of MAC capabilities 269 * 270 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 271 * supported by the @caps. @linkmodes must have been initialised previously. 272 */ 273 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 274 unsigned long caps) 275 { 276 if (caps & MAC_SYM_PAUSE) 277 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 278 279 if (caps & MAC_ASYM_PAUSE) 280 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 281 282 if (caps & MAC_10HD) { 283 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 286 } 287 288 if (caps & MAC_10FD) { 289 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 292 } 293 294 if (caps & MAC_100HD) { 295 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 297 } 298 299 if (caps & MAC_100FD) { 300 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 303 } 304 305 if (caps & MAC_1000HD) 306 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 307 308 if (caps & MAC_1000FD) { 309 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 313 } 314 315 if (caps & MAC_2500FD) { 316 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 318 } 319 320 if (caps & MAC_5000FD) 321 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 322 323 if (caps & MAC_10000FD) { 324 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_25000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 339 } 340 341 if (caps & MAC_40000FD) { 342 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 343 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 346 } 347 348 if (caps & MAC_50000FD) { 349 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 356 linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_56000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 365 } 366 367 if (caps & MAC_100000FD) { 368 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 372 linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 377 linkmodes); 378 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 382 linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_200000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 391 linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 400 } 401 402 if (caps & MAC_400000FD) { 403 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 406 linkmodes); 407 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 412 linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 415 } 416 } 417 418 static struct { 419 unsigned long mask; 420 int speed; 421 unsigned int duplex; 422 } phylink_caps_params[] = { 423 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 424 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 425 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 426 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 427 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 428 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 429 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 430 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 431 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 432 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 433 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 434 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 435 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 436 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 437 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 438 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 439 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 440 }; 441 442 /** 443 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 444 * @config: pointer to a &struct phylink_config 445 * @max_speed: maximum speed 446 * 447 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 448 * Any further motifications of config.mac_capabilities will override this. 449 */ 450 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 451 { 452 int i; 453 454 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 455 phylink_caps_params[i].speed > max_speed; i++) 456 config->mac_capabilities &= ~phylink_caps_params[i].mask; 457 } 458 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 459 460 /** 461 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 462 * @speed: the speed to search for 463 * @duplex: the duplex to search for 464 * 465 * Find the mac capability for a given speed and duplex. 466 * 467 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 468 * there were no matches. 469 */ 470 static unsigned long phylink_cap_from_speed_duplex(int speed, 471 unsigned int duplex) 472 { 473 int i; 474 475 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 476 if (speed == phylink_caps_params[i].speed && 477 duplex == phylink_caps_params[i].duplex) 478 return phylink_caps_params[i].mask; 479 } 480 481 return 0; 482 } 483 484 /** 485 * phylink_get_capabilities() - get capabilities for a given MAC 486 * @interface: phy interface mode defined by &typedef phy_interface_t 487 * @mac_capabilities: bitmask of MAC capabilities 488 * @rate_matching: type of rate matching being performed 489 * 490 * Get the MAC capabilities that are supported by the @interface mode and 491 * @mac_capabilities. 492 */ 493 static unsigned long phylink_get_capabilities(phy_interface_t interface, 494 unsigned long mac_capabilities, 495 int rate_matching) 496 { 497 int max_speed = phylink_interface_max_speed(interface); 498 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 499 unsigned long matched_caps = 0; 500 501 switch (interface) { 502 case PHY_INTERFACE_MODE_USXGMII: 503 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 504 fallthrough; 505 506 case PHY_INTERFACE_MODE_RGMII_TXID: 507 case PHY_INTERFACE_MODE_RGMII_RXID: 508 case PHY_INTERFACE_MODE_RGMII_ID: 509 case PHY_INTERFACE_MODE_RGMII: 510 case PHY_INTERFACE_MODE_PSGMII: 511 case PHY_INTERFACE_MODE_QSGMII: 512 case PHY_INTERFACE_MODE_QUSGMII: 513 case PHY_INTERFACE_MODE_SGMII: 514 case PHY_INTERFACE_MODE_GMII: 515 caps |= MAC_1000HD | MAC_1000FD; 516 fallthrough; 517 518 case PHY_INTERFACE_MODE_REVRMII: 519 case PHY_INTERFACE_MODE_RMII: 520 case PHY_INTERFACE_MODE_SMII: 521 case PHY_INTERFACE_MODE_REVMII: 522 case PHY_INTERFACE_MODE_MII: 523 caps |= MAC_10HD | MAC_10FD; 524 fallthrough; 525 526 case PHY_INTERFACE_MODE_100BASEX: 527 caps |= MAC_100HD | MAC_100FD; 528 break; 529 530 case PHY_INTERFACE_MODE_TBI: 531 case PHY_INTERFACE_MODE_MOCA: 532 case PHY_INTERFACE_MODE_RTBI: 533 case PHY_INTERFACE_MODE_1000BASEX: 534 caps |= MAC_1000HD; 535 fallthrough; 536 case PHY_INTERFACE_MODE_1000BASEKX: 537 case PHY_INTERFACE_MODE_TRGMII: 538 caps |= MAC_1000FD; 539 break; 540 541 case PHY_INTERFACE_MODE_2500BASEX: 542 caps |= MAC_2500FD; 543 break; 544 545 case PHY_INTERFACE_MODE_5GBASER: 546 caps |= MAC_5000FD; 547 break; 548 549 case PHY_INTERFACE_MODE_XGMII: 550 case PHY_INTERFACE_MODE_RXAUI: 551 case PHY_INTERFACE_MODE_XAUI: 552 case PHY_INTERFACE_MODE_10GBASER: 553 case PHY_INTERFACE_MODE_10GKR: 554 caps |= MAC_10000FD; 555 break; 556 557 case PHY_INTERFACE_MODE_25GBASER: 558 caps |= MAC_25000FD; 559 break; 560 561 case PHY_INTERFACE_MODE_XLGMII: 562 caps |= MAC_40000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_INTERNAL: 566 caps |= ~0; 567 break; 568 569 case PHY_INTERFACE_MODE_NA: 570 case PHY_INTERFACE_MODE_MAX: 571 break; 572 } 573 574 switch (rate_matching) { 575 case RATE_MATCH_OPEN_LOOP: 576 /* TODO */ 577 fallthrough; 578 case RATE_MATCH_NONE: 579 matched_caps = 0; 580 break; 581 case RATE_MATCH_PAUSE: { 582 /* The MAC must support asymmetric pause towards the local 583 * device for this. We could allow just symmetric pause, but 584 * then we might have to renegotiate if the link partner 585 * doesn't support pause. This is because there's no way to 586 * accept pause frames without transmitting them if we only 587 * support symmetric pause. 588 */ 589 if (!(mac_capabilities & MAC_SYM_PAUSE) || 590 !(mac_capabilities & MAC_ASYM_PAUSE)) 591 break; 592 593 /* We can't adapt if the MAC doesn't support the interface's 594 * max speed at full duplex. 595 */ 596 if (mac_capabilities & 597 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 598 /* Although a duplex-matching phy might exist, we 599 * conservatively remove these modes because the MAC 600 * will not be aware of the half-duplex nature of the 601 * link. 602 */ 603 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 604 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 605 } 606 break; 607 } 608 case RATE_MATCH_CRS: 609 /* The MAC must support half duplex at the interface's max 610 * speed. 611 */ 612 if (mac_capabilities & 613 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 614 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 615 matched_caps &= mac_capabilities; 616 } 617 break; 618 } 619 620 return (caps & mac_capabilities) | matched_caps; 621 } 622 623 /** 624 * phylink_validate_mask_caps() - Restrict link modes based on caps 625 * @supported: ethtool bitmask for supported link modes. 626 * @state: pointer to a &struct phylink_link_state. 627 * @mac_capabilities: bitmask of MAC capabilities 628 * 629 * Calculate the supported link modes based on @mac_capabilities, and restrict 630 * @supported and @state based on that. Use this function if your capabiliies 631 * aren't constant, such as if they vary depending on the interface. 632 */ 633 static void phylink_validate_mask_caps(unsigned long *supported, 634 struct phylink_link_state *state, 635 unsigned long mac_capabilities) 636 { 637 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 638 unsigned long caps; 639 640 phylink_set_port_modes(mask); 641 phylink_set(mask, Autoneg); 642 caps = phylink_get_capabilities(state->interface, mac_capabilities, 643 state->rate_matching); 644 phylink_caps_to_linkmodes(mask, caps); 645 646 linkmode_and(supported, supported, mask); 647 linkmode_and(state->advertising, state->advertising, mask); 648 } 649 650 static int phylink_validate_mac_and_pcs(struct phylink *pl, 651 unsigned long *supported, 652 struct phylink_link_state *state) 653 { 654 unsigned long capabilities; 655 struct phylink_pcs *pcs; 656 int ret; 657 658 /* Get the PCS for this interface mode */ 659 if (pl->using_mac_select_pcs) { 660 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 661 if (IS_ERR(pcs)) 662 return PTR_ERR(pcs); 663 } else { 664 pcs = pl->pcs; 665 } 666 667 if (pcs) { 668 /* The PCS, if present, must be setup before phylink_create() 669 * has been called. If the ops is not initialised, print an 670 * error and backtrace rather than oopsing the kernel. 671 */ 672 if (!pcs->ops) { 673 phylink_err(pl, "interface %s: uninitialised PCS\n", 674 phy_modes(state->interface)); 675 dump_stack(); 676 return -EINVAL; 677 } 678 679 /* Validate the link parameters with the PCS */ 680 if (pcs->ops->pcs_validate) { 681 ret = pcs->ops->pcs_validate(pcs, supported, state); 682 if (ret < 0 || phylink_is_empty_linkmode(supported)) 683 return -EINVAL; 684 685 /* Ensure the advertising mask is a subset of the 686 * supported mask. 687 */ 688 linkmode_and(state->advertising, state->advertising, 689 supported); 690 } 691 } 692 693 /* Then validate the link parameters with the MAC */ 694 if (pl->mac_ops->mac_get_caps) 695 capabilities = pl->mac_ops->mac_get_caps(pl->config, 696 state->interface); 697 else 698 capabilities = pl->config->mac_capabilities; 699 700 phylink_validate_mask_caps(supported, state, capabilities); 701 702 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 703 } 704 705 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 706 const unsigned long *supported, 707 const struct phylink_link_state *state, 708 phy_interface_t interface, 709 unsigned long *accum_supported, 710 unsigned long *accum_advertising) 711 { 712 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 713 struct phylink_link_state tmp_state; 714 715 linkmode_copy(tmp_supported, supported); 716 717 tmp_state = *state; 718 tmp_state.interface = interface; 719 720 if (phy) 721 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 722 723 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 724 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 725 interface, phy_modes(interface), 726 phy_rate_matching_to_str(tmp_state.rate_matching), 727 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 728 729 linkmode_or(accum_supported, accum_supported, tmp_supported); 730 linkmode_or(accum_advertising, accum_advertising, 731 tmp_state.advertising); 732 } 733 } 734 735 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 736 unsigned long *supported, 737 struct phylink_link_state *state, 738 const unsigned long *interfaces) 739 { 740 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 741 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 742 int interface; 743 744 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 745 phylink_validate_one(pl, phy, supported, state, interface, 746 all_s, all_adv); 747 748 linkmode_copy(supported, all_s); 749 linkmode_copy(state->advertising, all_adv); 750 751 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 752 } 753 754 static int phylink_validate(struct phylink *pl, unsigned long *supported, 755 struct phylink_link_state *state) 756 { 757 const unsigned long *interfaces = pl->config->supported_interfaces; 758 759 if (state->interface == PHY_INTERFACE_MODE_NA) 760 return phylink_validate_mask(pl, NULL, supported, state, 761 interfaces); 762 763 if (!test_bit(state->interface, interfaces)) 764 return -EINVAL; 765 766 return phylink_validate_mac_and_pcs(pl, supported, state); 767 } 768 769 static int phylink_parse_fixedlink(struct phylink *pl, 770 const struct fwnode_handle *fwnode) 771 { 772 struct fwnode_handle *fixed_node; 773 bool pause, asym_pause, autoneg; 774 const struct phy_setting *s; 775 struct gpio_desc *desc; 776 u32 speed; 777 int ret; 778 779 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 780 if (fixed_node) { 781 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 782 783 pl->link_config.speed = speed; 784 pl->link_config.duplex = DUPLEX_HALF; 785 786 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 787 pl->link_config.duplex = DUPLEX_FULL; 788 789 /* We treat the "pause" and "asym-pause" terminology as 790 * defining the link partner's ability. 791 */ 792 if (fwnode_property_read_bool(fixed_node, "pause")) 793 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 794 pl->link_config.lp_advertising); 795 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 796 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 797 pl->link_config.lp_advertising); 798 799 if (ret == 0) { 800 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 801 GPIOD_IN, "?"); 802 803 if (!IS_ERR(desc)) 804 pl->link_gpio = desc; 805 else if (desc == ERR_PTR(-EPROBE_DEFER)) 806 ret = -EPROBE_DEFER; 807 } 808 fwnode_handle_put(fixed_node); 809 810 if (ret) 811 return ret; 812 } else { 813 u32 prop[5]; 814 815 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 816 NULL, 0); 817 if (ret != ARRAY_SIZE(prop)) { 818 phylink_err(pl, "broken fixed-link?\n"); 819 return -EINVAL; 820 } 821 822 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 823 prop, ARRAY_SIZE(prop)); 824 if (!ret) { 825 pl->link_config.duplex = prop[1] ? 826 DUPLEX_FULL : DUPLEX_HALF; 827 pl->link_config.speed = prop[2]; 828 if (prop[3]) 829 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 830 pl->link_config.lp_advertising); 831 if (prop[4]) 832 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 833 pl->link_config.lp_advertising); 834 } 835 } 836 837 if (pl->link_config.speed > SPEED_1000 && 838 pl->link_config.duplex != DUPLEX_FULL) 839 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 840 pl->link_config.speed); 841 842 linkmode_fill(pl->supported); 843 linkmode_copy(pl->link_config.advertising, pl->supported); 844 phylink_validate(pl, pl->supported, &pl->link_config); 845 846 pause = phylink_test(pl->supported, Pause); 847 asym_pause = phylink_test(pl->supported, Asym_Pause); 848 autoneg = phylink_test(pl->supported, Autoneg); 849 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 850 pl->supported, true); 851 linkmode_zero(pl->supported); 852 phylink_set(pl->supported, MII); 853 854 if (pause) 855 phylink_set(pl->supported, Pause); 856 857 if (asym_pause) 858 phylink_set(pl->supported, Asym_Pause); 859 860 if (autoneg) 861 phylink_set(pl->supported, Autoneg); 862 863 if (s) { 864 __set_bit(s->bit, pl->supported); 865 __set_bit(s->bit, pl->link_config.lp_advertising); 866 } else { 867 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 868 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 869 pl->link_config.speed); 870 } 871 872 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 873 pl->supported); 874 875 pl->link_config.link = 1; 876 pl->link_config.an_complete = 1; 877 878 return 0; 879 } 880 881 static int phylink_parse_mode(struct phylink *pl, 882 const struct fwnode_handle *fwnode) 883 { 884 struct fwnode_handle *dn; 885 const char *managed; 886 887 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 888 if (dn || fwnode_property_present(fwnode, "fixed-link")) 889 pl->cfg_link_an_mode = MLO_AN_FIXED; 890 fwnode_handle_put(dn); 891 892 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 893 strcmp(managed, "in-band-status") == 0) || 894 pl->config->ovr_an_inband) { 895 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 896 phylink_err(pl, 897 "can't use both fixed-link and in-band-status\n"); 898 return -EINVAL; 899 } 900 901 linkmode_zero(pl->supported); 902 phylink_set(pl->supported, MII); 903 phylink_set(pl->supported, Autoneg); 904 phylink_set(pl->supported, Asym_Pause); 905 phylink_set(pl->supported, Pause); 906 pl->cfg_link_an_mode = MLO_AN_INBAND; 907 908 switch (pl->link_config.interface) { 909 case PHY_INTERFACE_MODE_SGMII: 910 case PHY_INTERFACE_MODE_PSGMII: 911 case PHY_INTERFACE_MODE_QSGMII: 912 case PHY_INTERFACE_MODE_QUSGMII: 913 case PHY_INTERFACE_MODE_RGMII: 914 case PHY_INTERFACE_MODE_RGMII_ID: 915 case PHY_INTERFACE_MODE_RGMII_RXID: 916 case PHY_INTERFACE_MODE_RGMII_TXID: 917 case PHY_INTERFACE_MODE_RTBI: 918 phylink_set(pl->supported, 10baseT_Half); 919 phylink_set(pl->supported, 10baseT_Full); 920 phylink_set(pl->supported, 100baseT_Half); 921 phylink_set(pl->supported, 100baseT_Full); 922 phylink_set(pl->supported, 1000baseT_Half); 923 phylink_set(pl->supported, 1000baseT_Full); 924 break; 925 926 case PHY_INTERFACE_MODE_1000BASEX: 927 phylink_set(pl->supported, 1000baseX_Full); 928 break; 929 930 case PHY_INTERFACE_MODE_2500BASEX: 931 phylink_set(pl->supported, 2500baseX_Full); 932 break; 933 934 case PHY_INTERFACE_MODE_5GBASER: 935 phylink_set(pl->supported, 5000baseT_Full); 936 break; 937 938 case PHY_INTERFACE_MODE_25GBASER: 939 phylink_set(pl->supported, 25000baseCR_Full); 940 phylink_set(pl->supported, 25000baseKR_Full); 941 phylink_set(pl->supported, 25000baseSR_Full); 942 fallthrough; 943 case PHY_INTERFACE_MODE_USXGMII: 944 case PHY_INTERFACE_MODE_10GKR: 945 case PHY_INTERFACE_MODE_10GBASER: 946 phylink_set(pl->supported, 10baseT_Half); 947 phylink_set(pl->supported, 10baseT_Full); 948 phylink_set(pl->supported, 100baseT_Half); 949 phylink_set(pl->supported, 100baseT_Full); 950 phylink_set(pl->supported, 1000baseT_Half); 951 phylink_set(pl->supported, 1000baseT_Full); 952 phylink_set(pl->supported, 1000baseX_Full); 953 phylink_set(pl->supported, 1000baseKX_Full); 954 phylink_set(pl->supported, 2500baseT_Full); 955 phylink_set(pl->supported, 2500baseX_Full); 956 phylink_set(pl->supported, 5000baseT_Full); 957 phylink_set(pl->supported, 10000baseT_Full); 958 phylink_set(pl->supported, 10000baseKR_Full); 959 phylink_set(pl->supported, 10000baseKX4_Full); 960 phylink_set(pl->supported, 10000baseCR_Full); 961 phylink_set(pl->supported, 10000baseSR_Full); 962 phylink_set(pl->supported, 10000baseLR_Full); 963 phylink_set(pl->supported, 10000baseLRM_Full); 964 phylink_set(pl->supported, 10000baseER_Full); 965 break; 966 967 case PHY_INTERFACE_MODE_XLGMII: 968 phylink_set(pl->supported, 25000baseCR_Full); 969 phylink_set(pl->supported, 25000baseKR_Full); 970 phylink_set(pl->supported, 25000baseSR_Full); 971 phylink_set(pl->supported, 40000baseKR4_Full); 972 phylink_set(pl->supported, 40000baseCR4_Full); 973 phylink_set(pl->supported, 40000baseSR4_Full); 974 phylink_set(pl->supported, 40000baseLR4_Full); 975 phylink_set(pl->supported, 50000baseCR2_Full); 976 phylink_set(pl->supported, 50000baseKR2_Full); 977 phylink_set(pl->supported, 50000baseSR2_Full); 978 phylink_set(pl->supported, 50000baseKR_Full); 979 phylink_set(pl->supported, 50000baseSR_Full); 980 phylink_set(pl->supported, 50000baseCR_Full); 981 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 982 phylink_set(pl->supported, 50000baseDR_Full); 983 phylink_set(pl->supported, 100000baseKR4_Full); 984 phylink_set(pl->supported, 100000baseSR4_Full); 985 phylink_set(pl->supported, 100000baseCR4_Full); 986 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 987 phylink_set(pl->supported, 100000baseKR2_Full); 988 phylink_set(pl->supported, 100000baseSR2_Full); 989 phylink_set(pl->supported, 100000baseCR2_Full); 990 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 991 phylink_set(pl->supported, 100000baseDR2_Full); 992 break; 993 994 default: 995 phylink_err(pl, 996 "incorrect link mode %s for in-band status\n", 997 phy_modes(pl->link_config.interface)); 998 return -EINVAL; 999 } 1000 1001 linkmode_copy(pl->link_config.advertising, pl->supported); 1002 1003 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 1004 phylink_err(pl, 1005 "failed to validate link configuration for in-band status\n"); 1006 return -EINVAL; 1007 } 1008 } 1009 1010 return 0; 1011 } 1012 1013 static void phylink_apply_manual_flow(struct phylink *pl, 1014 struct phylink_link_state *state) 1015 { 1016 /* If autoneg is disabled, pause AN is also disabled */ 1017 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1018 state->advertising)) 1019 state->pause &= ~MLO_PAUSE_AN; 1020 1021 /* Manual configuration of pause modes */ 1022 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 1023 state->pause = pl->link_config.pause; 1024 } 1025 1026 static void phylink_resolve_an_pause(struct phylink_link_state *state) 1027 { 1028 bool tx_pause, rx_pause; 1029 1030 if (state->duplex == DUPLEX_FULL) { 1031 linkmode_resolve_pause(state->advertising, 1032 state->lp_advertising, 1033 &tx_pause, &rx_pause); 1034 if (tx_pause) 1035 state->pause |= MLO_PAUSE_TX; 1036 if (rx_pause) 1037 state->pause |= MLO_PAUSE_RX; 1038 } 1039 } 1040 1041 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1042 phy_interface_t interface) 1043 { 1044 if (pcs && pcs->ops->pcs_pre_config) 1045 pcs->ops->pcs_pre_config(pcs, interface); 1046 } 1047 1048 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1049 phy_interface_t interface) 1050 { 1051 int err = 0; 1052 1053 if (pcs && pcs->ops->pcs_post_config) 1054 err = pcs->ops->pcs_post_config(pcs, interface); 1055 1056 return err; 1057 } 1058 1059 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1060 { 1061 if (pcs && pcs->ops->pcs_disable) 1062 pcs->ops->pcs_disable(pcs); 1063 } 1064 1065 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1066 { 1067 int err = 0; 1068 1069 if (pcs && pcs->ops->pcs_enable) 1070 err = pcs->ops->pcs_enable(pcs); 1071 1072 return err; 1073 } 1074 1075 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1076 const struct phylink_link_state *state, 1077 bool permit_pause_to_mac) 1078 { 1079 if (!pcs) 1080 return 0; 1081 1082 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1083 state->advertising, permit_pause_to_mac); 1084 } 1085 1086 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1087 phy_interface_t interface, int speed, 1088 int duplex) 1089 { 1090 if (pcs && pcs->ops->pcs_link_up) 1091 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1092 } 1093 1094 static void phylink_pcs_poll_stop(struct phylink *pl) 1095 { 1096 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1097 del_timer(&pl->link_poll); 1098 } 1099 1100 static void phylink_pcs_poll_start(struct phylink *pl) 1101 { 1102 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1103 mod_timer(&pl->link_poll, jiffies + HZ); 1104 } 1105 1106 static void phylink_mac_config(struct phylink *pl, 1107 const struct phylink_link_state *state) 1108 { 1109 struct phylink_link_state st = *state; 1110 1111 /* Stop drivers incorrectly using these */ 1112 linkmode_zero(st.lp_advertising); 1113 st.speed = SPEED_UNKNOWN; 1114 st.duplex = DUPLEX_UNKNOWN; 1115 st.an_complete = false; 1116 st.link = false; 1117 1118 phylink_dbg(pl, 1119 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1120 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1121 phy_modes(st.interface), 1122 phy_rate_matching_to_str(st.rate_matching), 1123 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1124 st.pause); 1125 1126 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1127 } 1128 1129 static void phylink_pcs_an_restart(struct phylink *pl) 1130 { 1131 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1132 pl->link_config.advertising) && 1133 phy_interface_mode_is_8023z(pl->link_config.interface) && 1134 phylink_autoneg_inband(pl->cur_link_an_mode)) 1135 pl->pcs->ops->pcs_an_restart(pl->pcs); 1136 } 1137 1138 static void phylink_major_config(struct phylink *pl, bool restart, 1139 const struct phylink_link_state *state) 1140 { 1141 struct phylink_pcs *pcs = NULL; 1142 bool pcs_changed = false; 1143 unsigned int rate_kbd; 1144 unsigned int neg_mode; 1145 int err; 1146 1147 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1148 1149 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1150 state->interface, 1151 state->advertising); 1152 1153 if (pl->using_mac_select_pcs) { 1154 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1155 if (IS_ERR(pcs)) { 1156 phylink_err(pl, 1157 "mac_select_pcs unexpectedly failed: %pe\n", 1158 pcs); 1159 return; 1160 } 1161 1162 pcs_changed = pcs && pl->pcs != pcs; 1163 } 1164 1165 phylink_pcs_poll_stop(pl); 1166 1167 if (pl->mac_ops->mac_prepare) { 1168 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1169 state->interface); 1170 if (err < 0) { 1171 phylink_err(pl, "mac_prepare failed: %pe\n", 1172 ERR_PTR(err)); 1173 return; 1174 } 1175 } 1176 1177 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1178 * for the change. 1179 */ 1180 if (pcs_changed) { 1181 phylink_pcs_disable(pl->pcs); 1182 1183 if (pl->pcs) 1184 pl->pcs->phylink = NULL; 1185 1186 pcs->phylink = pl; 1187 1188 pl->pcs = pcs; 1189 } 1190 1191 if (pl->pcs) 1192 phylink_pcs_pre_config(pl->pcs, state->interface); 1193 1194 phylink_mac_config(pl, state); 1195 1196 if (pl->pcs) 1197 phylink_pcs_post_config(pl->pcs, state->interface); 1198 1199 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1200 phylink_pcs_enable(pl->pcs); 1201 1202 neg_mode = pl->cur_link_an_mode; 1203 if (pl->pcs && pl->pcs->neg_mode) 1204 neg_mode = pl->pcs_neg_mode; 1205 1206 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1207 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1208 if (err < 0) 1209 phylink_err(pl, "pcs_config failed: %pe\n", 1210 ERR_PTR(err)); 1211 else if (err > 0) 1212 restart = true; 1213 1214 if (restart) 1215 phylink_pcs_an_restart(pl); 1216 1217 if (pl->mac_ops->mac_finish) { 1218 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1219 state->interface); 1220 if (err < 0) 1221 phylink_err(pl, "mac_finish failed: %pe\n", 1222 ERR_PTR(err)); 1223 } 1224 1225 if (pl->sfp_bus) { 1226 rate_kbd = phylink_interface_signal_rate(state->interface); 1227 if (rate_kbd) 1228 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1229 } 1230 1231 phylink_pcs_poll_start(pl); 1232 } 1233 1234 /* 1235 * Reconfigure for a change of inband advertisement. 1236 * If we have a separate PCS, we only need to call its pcs_config() method, 1237 * and then restart AN if it indicates something changed. Otherwise, we do 1238 * the full MAC reconfiguration. 1239 */ 1240 static int phylink_change_inband_advert(struct phylink *pl) 1241 { 1242 unsigned int neg_mode; 1243 int ret; 1244 1245 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1246 return 0; 1247 1248 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1249 phylink_an_mode_str(pl->cur_link_an_mode), 1250 phy_modes(pl->link_config.interface), 1251 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1252 pl->link_config.pause); 1253 1254 /* Recompute the PCS neg mode */ 1255 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1256 pl->link_config.interface, 1257 pl->link_config.advertising); 1258 1259 neg_mode = pl->cur_link_an_mode; 1260 if (pl->pcs->neg_mode) 1261 neg_mode = pl->pcs_neg_mode; 1262 1263 /* Modern PCS-based method; update the advert at the PCS, and 1264 * restart negotiation if the pcs_config() helper indicates that 1265 * the programmed advertisement has changed. 1266 */ 1267 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1268 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1269 if (ret < 0) 1270 return ret; 1271 1272 if (ret > 0) 1273 phylink_pcs_an_restart(pl); 1274 1275 return 0; 1276 } 1277 1278 static void phylink_mac_pcs_get_state(struct phylink *pl, 1279 struct phylink_link_state *state) 1280 { 1281 linkmode_copy(state->advertising, pl->link_config.advertising); 1282 linkmode_zero(state->lp_advertising); 1283 state->interface = pl->link_config.interface; 1284 state->rate_matching = pl->link_config.rate_matching; 1285 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1286 state->advertising)) { 1287 state->speed = SPEED_UNKNOWN; 1288 state->duplex = DUPLEX_UNKNOWN; 1289 state->pause = MLO_PAUSE_NONE; 1290 } else { 1291 state->speed = pl->link_config.speed; 1292 state->duplex = pl->link_config.duplex; 1293 state->pause = pl->link_config.pause; 1294 } 1295 state->an_complete = 0; 1296 state->link = 1; 1297 1298 if (pl->pcs) 1299 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1300 else 1301 state->link = 0; 1302 } 1303 1304 /* The fixed state is... fixed except for the link state, 1305 * which may be determined by a GPIO or a callback. 1306 */ 1307 static void phylink_get_fixed_state(struct phylink *pl, 1308 struct phylink_link_state *state) 1309 { 1310 *state = pl->link_config; 1311 if (pl->config->get_fixed_state) 1312 pl->config->get_fixed_state(pl->config, state); 1313 else if (pl->link_gpio) 1314 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1315 1316 state->pause = MLO_PAUSE_NONE; 1317 phylink_resolve_an_pause(state); 1318 } 1319 1320 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1321 { 1322 struct phylink_link_state link_state; 1323 1324 switch (pl->cur_link_an_mode) { 1325 case MLO_AN_PHY: 1326 link_state = pl->phy_state; 1327 break; 1328 1329 case MLO_AN_FIXED: 1330 phylink_get_fixed_state(pl, &link_state); 1331 break; 1332 1333 case MLO_AN_INBAND: 1334 link_state = pl->link_config; 1335 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1336 link_state.pause = MLO_PAUSE_NONE; 1337 break; 1338 1339 default: /* can't happen */ 1340 return; 1341 } 1342 1343 link_state.link = false; 1344 1345 phylink_apply_manual_flow(pl, &link_state); 1346 phylink_major_config(pl, force_restart, &link_state); 1347 } 1348 1349 static const char *phylink_pause_to_str(int pause) 1350 { 1351 switch (pause & MLO_PAUSE_TXRX_MASK) { 1352 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1353 return "rx/tx"; 1354 case MLO_PAUSE_TX: 1355 return "tx"; 1356 case MLO_PAUSE_RX: 1357 return "rx"; 1358 default: 1359 return "off"; 1360 } 1361 } 1362 1363 static void phylink_link_up(struct phylink *pl, 1364 struct phylink_link_state link_state) 1365 { 1366 struct net_device *ndev = pl->netdev; 1367 unsigned int neg_mode; 1368 int speed, duplex; 1369 bool rx_pause; 1370 1371 speed = link_state.speed; 1372 duplex = link_state.duplex; 1373 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1374 1375 switch (link_state.rate_matching) { 1376 case RATE_MATCH_PAUSE: 1377 /* The PHY is doing rate matchion from the media rate (in 1378 * the link_state) to the interface speed, and will send 1379 * pause frames to the MAC to limit its transmission speed. 1380 */ 1381 speed = phylink_interface_max_speed(link_state.interface); 1382 duplex = DUPLEX_FULL; 1383 rx_pause = true; 1384 break; 1385 1386 case RATE_MATCH_CRS: 1387 /* The PHY is doing rate matchion from the media rate (in 1388 * the link_state) to the interface speed, and will cause 1389 * collisions to the MAC to limit its transmission speed. 1390 */ 1391 speed = phylink_interface_max_speed(link_state.interface); 1392 duplex = DUPLEX_HALF; 1393 break; 1394 } 1395 1396 pl->cur_interface = link_state.interface; 1397 1398 neg_mode = pl->cur_link_an_mode; 1399 if (pl->pcs && pl->pcs->neg_mode) 1400 neg_mode = pl->pcs_neg_mode; 1401 1402 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1403 duplex); 1404 1405 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1406 pl->cur_interface, speed, duplex, 1407 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1408 1409 if (ndev) 1410 netif_carrier_on(ndev); 1411 1412 phylink_info(pl, 1413 "Link is Up - %s/%s - flow control %s\n", 1414 phy_speed_to_str(link_state.speed), 1415 phy_duplex_to_str(link_state.duplex), 1416 phylink_pause_to_str(link_state.pause)); 1417 } 1418 1419 static void phylink_link_down(struct phylink *pl) 1420 { 1421 struct net_device *ndev = pl->netdev; 1422 1423 if (ndev) 1424 netif_carrier_off(ndev); 1425 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1426 pl->cur_interface); 1427 phylink_info(pl, "Link is Down\n"); 1428 } 1429 1430 static void phylink_resolve(struct work_struct *w) 1431 { 1432 struct phylink *pl = container_of(w, struct phylink, resolve); 1433 struct phylink_link_state link_state; 1434 struct net_device *ndev = pl->netdev; 1435 bool mac_config = false; 1436 bool retrigger = false; 1437 bool cur_link_state; 1438 1439 mutex_lock(&pl->state_mutex); 1440 if (pl->netdev) 1441 cur_link_state = netif_carrier_ok(ndev); 1442 else 1443 cur_link_state = pl->old_link_state; 1444 1445 if (pl->phylink_disable_state) { 1446 pl->mac_link_dropped = false; 1447 link_state.link = false; 1448 } else if (pl->mac_link_dropped) { 1449 link_state.link = false; 1450 retrigger = true; 1451 } else { 1452 switch (pl->cur_link_an_mode) { 1453 case MLO_AN_PHY: 1454 link_state = pl->phy_state; 1455 phylink_apply_manual_flow(pl, &link_state); 1456 mac_config = link_state.link; 1457 break; 1458 1459 case MLO_AN_FIXED: 1460 phylink_get_fixed_state(pl, &link_state); 1461 mac_config = link_state.link; 1462 break; 1463 1464 case MLO_AN_INBAND: 1465 phylink_mac_pcs_get_state(pl, &link_state); 1466 1467 /* The PCS may have a latching link-fail indicator. 1468 * If the link was up, bring the link down and 1469 * re-trigger the resolve. Otherwise, re-read the 1470 * PCS state to get the current status of the link. 1471 */ 1472 if (!link_state.link) { 1473 if (cur_link_state) 1474 retrigger = true; 1475 else 1476 phylink_mac_pcs_get_state(pl, 1477 &link_state); 1478 } 1479 1480 /* If we have a phy, the "up" state is the union of 1481 * both the PHY and the MAC 1482 */ 1483 if (pl->phydev) 1484 link_state.link &= pl->phy_state.link; 1485 1486 /* Only update if the PHY link is up */ 1487 if (pl->phydev && pl->phy_state.link) { 1488 /* If the interface has changed, force a 1489 * link down event if the link isn't already 1490 * down, and re-resolve. 1491 */ 1492 if (link_state.interface != 1493 pl->phy_state.interface) { 1494 retrigger = true; 1495 link_state.link = false; 1496 } 1497 link_state.interface = pl->phy_state.interface; 1498 1499 /* If we are doing rate matching, then the 1500 * link speed/duplex comes from the PHY 1501 */ 1502 if (pl->phy_state.rate_matching) { 1503 link_state.rate_matching = 1504 pl->phy_state.rate_matching; 1505 link_state.speed = pl->phy_state.speed; 1506 link_state.duplex = 1507 pl->phy_state.duplex; 1508 } 1509 1510 /* If we have a PHY, we need to update with 1511 * the PHY flow control bits. 1512 */ 1513 link_state.pause = pl->phy_state.pause; 1514 mac_config = true; 1515 } 1516 phylink_apply_manual_flow(pl, &link_state); 1517 break; 1518 } 1519 } 1520 1521 if (mac_config) { 1522 if (link_state.interface != pl->link_config.interface) { 1523 /* The interface has changed, force the link down and 1524 * then reconfigure. 1525 */ 1526 if (cur_link_state) { 1527 phylink_link_down(pl); 1528 cur_link_state = false; 1529 } 1530 phylink_major_config(pl, false, &link_state); 1531 pl->link_config.interface = link_state.interface; 1532 } 1533 } 1534 1535 if (link_state.link != cur_link_state) { 1536 pl->old_link_state = link_state.link; 1537 if (!link_state.link) 1538 phylink_link_down(pl); 1539 else 1540 phylink_link_up(pl, link_state); 1541 } 1542 if (!link_state.link && retrigger) { 1543 pl->mac_link_dropped = false; 1544 queue_work(system_power_efficient_wq, &pl->resolve); 1545 } 1546 mutex_unlock(&pl->state_mutex); 1547 } 1548 1549 static void phylink_run_resolve(struct phylink *pl) 1550 { 1551 if (!pl->phylink_disable_state) 1552 queue_work(system_power_efficient_wq, &pl->resolve); 1553 } 1554 1555 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1556 { 1557 unsigned long state = pl->phylink_disable_state; 1558 1559 set_bit(bit, &pl->phylink_disable_state); 1560 if (state == 0) { 1561 queue_work(system_power_efficient_wq, &pl->resolve); 1562 flush_work(&pl->resolve); 1563 } 1564 } 1565 1566 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1567 { 1568 clear_bit(bit, &pl->phylink_disable_state); 1569 phylink_run_resolve(pl); 1570 } 1571 1572 static void phylink_fixed_poll(struct timer_list *t) 1573 { 1574 struct phylink *pl = container_of(t, struct phylink, link_poll); 1575 1576 mod_timer(t, jiffies + HZ); 1577 1578 phylink_run_resolve(pl); 1579 } 1580 1581 static const struct sfp_upstream_ops sfp_phylink_ops; 1582 1583 static int phylink_register_sfp(struct phylink *pl, 1584 const struct fwnode_handle *fwnode) 1585 { 1586 struct sfp_bus *bus; 1587 int ret; 1588 1589 if (!fwnode) 1590 return 0; 1591 1592 bus = sfp_bus_find_fwnode(fwnode); 1593 if (IS_ERR(bus)) { 1594 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1595 return PTR_ERR(bus); 1596 } 1597 1598 pl->sfp_bus = bus; 1599 1600 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1601 sfp_bus_put(bus); 1602 1603 return ret; 1604 } 1605 1606 /** 1607 * phylink_create() - create a phylink instance 1608 * @config: a pointer to the target &struct phylink_config 1609 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1610 * interface 1611 * @iface: the desired link mode defined by &typedef phy_interface_t 1612 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1613 * 1614 * Create a new phylink instance, and parse the link parameters found in @np. 1615 * This will parse in-band modes, fixed-link or SFP configuration. 1616 * 1617 * Note: the rtnl lock must not be held when calling this function. 1618 * 1619 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1620 * must use IS_ERR() to check for errors from this function. 1621 */ 1622 struct phylink *phylink_create(struct phylink_config *config, 1623 const struct fwnode_handle *fwnode, 1624 phy_interface_t iface, 1625 const struct phylink_mac_ops *mac_ops) 1626 { 1627 bool using_mac_select_pcs = false; 1628 struct phylink *pl; 1629 int ret; 1630 1631 /* Validate the supplied configuration */ 1632 if (phy_interface_empty(config->supported_interfaces)) { 1633 dev_err(config->dev, 1634 "phylink: error: empty supported_interfaces\n"); 1635 return ERR_PTR(-EINVAL); 1636 } 1637 1638 if (mac_ops->mac_select_pcs && 1639 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1640 ERR_PTR(-EOPNOTSUPP)) 1641 using_mac_select_pcs = true; 1642 1643 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1644 if (!pl) 1645 return ERR_PTR(-ENOMEM); 1646 1647 mutex_init(&pl->state_mutex); 1648 INIT_WORK(&pl->resolve, phylink_resolve); 1649 1650 pl->config = config; 1651 if (config->type == PHYLINK_NETDEV) { 1652 pl->netdev = to_net_dev(config->dev); 1653 netif_carrier_off(pl->netdev); 1654 } else if (config->type == PHYLINK_DEV) { 1655 pl->dev = config->dev; 1656 } else { 1657 kfree(pl); 1658 return ERR_PTR(-EINVAL); 1659 } 1660 1661 pl->using_mac_select_pcs = using_mac_select_pcs; 1662 pl->phy_state.interface = iface; 1663 pl->link_interface = iface; 1664 if (iface == PHY_INTERFACE_MODE_MOCA) 1665 pl->link_port = PORT_BNC; 1666 else 1667 pl->link_port = PORT_MII; 1668 pl->link_config.interface = iface; 1669 pl->link_config.pause = MLO_PAUSE_AN; 1670 pl->link_config.speed = SPEED_UNKNOWN; 1671 pl->link_config.duplex = DUPLEX_UNKNOWN; 1672 pl->pcs_state = PCS_STATE_DOWN; 1673 pl->mac_ops = mac_ops; 1674 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1675 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1676 1677 linkmode_fill(pl->supported); 1678 linkmode_copy(pl->link_config.advertising, pl->supported); 1679 phylink_validate(pl, pl->supported, &pl->link_config); 1680 1681 ret = phylink_parse_mode(pl, fwnode); 1682 if (ret < 0) { 1683 kfree(pl); 1684 return ERR_PTR(ret); 1685 } 1686 1687 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1688 ret = phylink_parse_fixedlink(pl, fwnode); 1689 if (ret < 0) { 1690 kfree(pl); 1691 return ERR_PTR(ret); 1692 } 1693 } 1694 1695 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1696 1697 ret = phylink_register_sfp(pl, fwnode); 1698 if (ret < 0) { 1699 kfree(pl); 1700 return ERR_PTR(ret); 1701 } 1702 1703 return pl; 1704 } 1705 EXPORT_SYMBOL_GPL(phylink_create); 1706 1707 /** 1708 * phylink_destroy() - cleanup and destroy the phylink instance 1709 * @pl: a pointer to a &struct phylink returned from phylink_create() 1710 * 1711 * Destroy a phylink instance. Any PHY that has been attached must have been 1712 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1713 * 1714 * Note: the rtnl lock must not be held when calling this function. 1715 */ 1716 void phylink_destroy(struct phylink *pl) 1717 { 1718 sfp_bus_del_upstream(pl->sfp_bus); 1719 if (pl->link_gpio) 1720 gpiod_put(pl->link_gpio); 1721 1722 cancel_work_sync(&pl->resolve); 1723 kfree(pl); 1724 } 1725 EXPORT_SYMBOL_GPL(phylink_destroy); 1726 1727 /** 1728 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1729 * @pl: a pointer to a &struct phylink returned from phylink_create() 1730 * 1731 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1732 * no PHY is needed. 1733 * 1734 * Returns true if phylink will be expecting a PHY. 1735 */ 1736 bool phylink_expects_phy(struct phylink *pl) 1737 { 1738 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1739 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1740 phy_interface_mode_is_8023z(pl->link_config.interface))) 1741 return false; 1742 return true; 1743 } 1744 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1745 1746 static void phylink_phy_change(struct phy_device *phydev, bool up) 1747 { 1748 struct phylink *pl = phydev->phylink; 1749 bool tx_pause, rx_pause; 1750 1751 phy_get_pause(phydev, &tx_pause, &rx_pause); 1752 1753 mutex_lock(&pl->state_mutex); 1754 pl->phy_state.speed = phydev->speed; 1755 pl->phy_state.duplex = phydev->duplex; 1756 pl->phy_state.rate_matching = phydev->rate_matching; 1757 pl->phy_state.pause = MLO_PAUSE_NONE; 1758 if (tx_pause) 1759 pl->phy_state.pause |= MLO_PAUSE_TX; 1760 if (rx_pause) 1761 pl->phy_state.pause |= MLO_PAUSE_RX; 1762 pl->phy_state.interface = phydev->interface; 1763 pl->phy_state.link = up; 1764 mutex_unlock(&pl->state_mutex); 1765 1766 phylink_run_resolve(pl); 1767 1768 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1769 phy_modes(phydev->interface), 1770 phy_speed_to_str(phydev->speed), 1771 phy_duplex_to_str(phydev->duplex), 1772 phy_rate_matching_to_str(phydev->rate_matching), 1773 phylink_pause_to_str(pl->phy_state.pause)); 1774 } 1775 1776 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1777 unsigned long *supported, 1778 struct phylink_link_state *state) 1779 { 1780 DECLARE_PHY_INTERFACE_MASK(interfaces); 1781 1782 /* If the PHY provides a bitmap of the interfaces it will be using 1783 * depending on the negotiated media speeds, use this to validate 1784 * which ethtool link modes can be used. 1785 */ 1786 if (!phy_interface_empty(phy->possible_interfaces)) { 1787 /* We only care about the union of the PHY's interfaces and 1788 * those which the host supports. 1789 */ 1790 phy_interface_and(interfaces, phy->possible_interfaces, 1791 pl->config->supported_interfaces); 1792 1793 if (phy_interface_empty(interfaces)) { 1794 phylink_err(pl, "PHY has no common interfaces\n"); 1795 return -EINVAL; 1796 } 1797 1798 if (phy_on_sfp(phy)) { 1799 /* If the PHY is on a SFP, limit the interfaces to 1800 * those that can be used with a SFP module. 1801 */ 1802 phy_interface_and(interfaces, interfaces, 1803 phylink_sfp_interfaces); 1804 1805 if (phy_interface_empty(interfaces)) { 1806 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1807 return -EINVAL; 1808 } 1809 } 1810 1811 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1812 phydev_name(phy), 1813 (int)PHY_INTERFACE_MODE_MAX, 1814 phy->possible_interfaces, 1815 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1816 1817 return phylink_validate_mask(pl, phy, supported, state, 1818 interfaces); 1819 } 1820 1821 /* Check whether we would use rate matching for the proposed interface 1822 * mode. 1823 */ 1824 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1825 1826 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1827 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1828 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1829 * their Serdes is either unnecessary or not reasonable. 1830 * 1831 * For these which switch interface modes, we really need to know which 1832 * interface modes the PHY supports to properly work out which ethtool 1833 * linkmodes can be supported. For now, as a work-around, we validate 1834 * against all interface modes, which may lead to more ethtool link 1835 * modes being advertised than are actually supported. 1836 */ 1837 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1838 state->interface != PHY_INTERFACE_MODE_RXAUI && 1839 state->interface != PHY_INTERFACE_MODE_XAUI && 1840 state->interface != PHY_INTERFACE_MODE_USXGMII) 1841 state->interface = PHY_INTERFACE_MODE_NA; 1842 1843 return phylink_validate(pl, supported, state); 1844 } 1845 1846 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1847 phy_interface_t interface) 1848 { 1849 struct phylink_link_state config; 1850 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1851 char *irq_str; 1852 int ret; 1853 1854 /* 1855 * This is the new way of dealing with flow control for PHYs, 1856 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1857 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1858 * using our validate call to the MAC, we rely upon the MAC 1859 * clearing the bits from both supported and advertising fields. 1860 */ 1861 phy_support_asym_pause(phy); 1862 1863 memset(&config, 0, sizeof(config)); 1864 linkmode_copy(supported, phy->supported); 1865 linkmode_copy(config.advertising, phy->advertising); 1866 config.interface = interface; 1867 1868 ret = phylink_validate_phy(pl, phy, supported, &config); 1869 if (ret) { 1870 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1871 phy_modes(config.interface), 1872 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1873 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1874 ERR_PTR(ret)); 1875 return ret; 1876 } 1877 1878 phy->phylink = pl; 1879 phy->phy_link_change = phylink_phy_change; 1880 1881 irq_str = phy_attached_info_irq(phy); 1882 phylink_info(pl, 1883 "PHY [%s] driver [%s] (irq=%s)\n", 1884 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1885 kfree(irq_str); 1886 1887 mutex_lock(&phy->lock); 1888 mutex_lock(&pl->state_mutex); 1889 pl->phydev = phy; 1890 pl->phy_state.interface = interface; 1891 pl->phy_state.pause = MLO_PAUSE_NONE; 1892 pl->phy_state.speed = SPEED_UNKNOWN; 1893 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1894 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1895 linkmode_copy(pl->supported, supported); 1896 linkmode_copy(pl->link_config.advertising, config.advertising); 1897 1898 /* Restrict the phy advertisement according to the MAC support. */ 1899 linkmode_copy(phy->advertising, config.advertising); 1900 mutex_unlock(&pl->state_mutex); 1901 mutex_unlock(&phy->lock); 1902 1903 phylink_dbg(pl, 1904 "phy: %s setting supported %*pb advertising %*pb\n", 1905 phy_modes(interface), 1906 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1907 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1908 1909 if (phy_interrupt_is_valid(phy)) 1910 phy_request_interrupt(phy); 1911 1912 if (pl->config->mac_managed_pm) 1913 phy->mac_managed_pm = true; 1914 1915 return 0; 1916 } 1917 1918 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1919 phy_interface_t interface) 1920 { 1921 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1922 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1923 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1924 return -EINVAL; 1925 1926 if (pl->phydev) 1927 return -EBUSY; 1928 1929 return phy_attach_direct(pl->netdev, phy, 0, interface); 1930 } 1931 1932 /** 1933 * phylink_connect_phy() - connect a PHY to the phylink instance 1934 * @pl: a pointer to a &struct phylink returned from phylink_create() 1935 * @phy: a pointer to a &struct phy_device. 1936 * 1937 * Connect @phy to the phylink instance specified by @pl by calling 1938 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1939 * capabilities, start the PHYLIB state machine and enable any interrupts 1940 * that the PHY supports. 1941 * 1942 * This updates the phylink's ethtool supported and advertising link mode 1943 * masks. 1944 * 1945 * Returns 0 on success or a negative errno. 1946 */ 1947 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1948 { 1949 int ret; 1950 1951 /* Use PHY device/driver interface */ 1952 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1953 pl->link_interface = phy->interface; 1954 pl->link_config.interface = pl->link_interface; 1955 } 1956 1957 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1958 if (ret < 0) 1959 return ret; 1960 1961 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1962 if (ret) 1963 phy_detach(phy); 1964 1965 return ret; 1966 } 1967 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1968 1969 /** 1970 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1971 * @pl: a pointer to a &struct phylink returned from phylink_create() 1972 * @dn: a pointer to a &struct device_node. 1973 * @flags: PHY-specific flags to communicate to the PHY device driver 1974 * 1975 * Connect the phy specified in the device node @dn to the phylink instance 1976 * specified by @pl. Actions specified in phylink_connect_phy() will be 1977 * performed. 1978 * 1979 * Returns 0 on success or a negative errno. 1980 */ 1981 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1982 u32 flags) 1983 { 1984 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1985 } 1986 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1987 1988 /** 1989 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1990 * @pl: a pointer to a &struct phylink returned from phylink_create() 1991 * @fwnode: a pointer to a &struct fwnode_handle. 1992 * @flags: PHY-specific flags to communicate to the PHY device driver 1993 * 1994 * Connect the phy specified @fwnode to the phylink instance specified 1995 * by @pl. 1996 * 1997 * Returns 0 on success or a negative errno. 1998 */ 1999 int phylink_fwnode_phy_connect(struct phylink *pl, 2000 const struct fwnode_handle *fwnode, 2001 u32 flags) 2002 { 2003 struct fwnode_handle *phy_fwnode; 2004 struct phy_device *phy_dev; 2005 int ret; 2006 2007 /* Fixed links and 802.3z are handled without needing a PHY */ 2008 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2009 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2010 phy_interface_mode_is_8023z(pl->link_interface))) 2011 return 0; 2012 2013 phy_fwnode = fwnode_get_phy_node(fwnode); 2014 if (IS_ERR(phy_fwnode)) { 2015 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2016 return -ENODEV; 2017 return 0; 2018 } 2019 2020 phy_dev = fwnode_phy_find_device(phy_fwnode); 2021 /* We're done with the phy_node handle */ 2022 fwnode_handle_put(phy_fwnode); 2023 if (!phy_dev) 2024 return -ENODEV; 2025 2026 /* Use PHY device/driver interface */ 2027 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2028 pl->link_interface = phy_dev->interface; 2029 pl->link_config.interface = pl->link_interface; 2030 } 2031 2032 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2033 pl->link_interface); 2034 phy_device_free(phy_dev); 2035 if (ret) 2036 return ret; 2037 2038 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2039 if (ret) 2040 phy_detach(phy_dev); 2041 2042 return ret; 2043 } 2044 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2045 2046 /** 2047 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2048 * instance. 2049 * @pl: a pointer to a &struct phylink returned from phylink_create() 2050 * 2051 * Disconnect any current PHY from the phylink instance described by @pl. 2052 */ 2053 void phylink_disconnect_phy(struct phylink *pl) 2054 { 2055 struct phy_device *phy; 2056 2057 ASSERT_RTNL(); 2058 2059 phy = pl->phydev; 2060 if (phy) { 2061 mutex_lock(&phy->lock); 2062 mutex_lock(&pl->state_mutex); 2063 pl->phydev = NULL; 2064 mutex_unlock(&pl->state_mutex); 2065 mutex_unlock(&phy->lock); 2066 flush_work(&pl->resolve); 2067 2068 phy_disconnect(phy); 2069 } 2070 } 2071 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2072 2073 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2074 { 2075 if (!up) 2076 pl->mac_link_dropped = true; 2077 phylink_run_resolve(pl); 2078 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2079 } 2080 2081 /** 2082 * phylink_mac_change() - notify phylink of a change in MAC state 2083 * @pl: a pointer to a &struct phylink returned from phylink_create() 2084 * @up: indicates whether the link is currently up. 2085 * 2086 * The MAC driver should call this driver when the state of its link 2087 * changes (eg, link failure, new negotiation results, etc.) 2088 */ 2089 void phylink_mac_change(struct phylink *pl, bool up) 2090 { 2091 phylink_link_changed(pl, up, "mac"); 2092 } 2093 EXPORT_SYMBOL_GPL(phylink_mac_change); 2094 2095 /** 2096 * phylink_pcs_change() - notify phylink of a change to PCS link state 2097 * @pcs: pointer to &struct phylink_pcs 2098 * @up: indicates whether the link is currently up. 2099 * 2100 * The PCS driver should call this when the state of its link changes 2101 * (e.g. link failure, new negotiation results, etc.) Note: it should 2102 * not determine "up" by reading the BMSR. If in doubt about the link 2103 * state at interrupt time, then pass true if pcs_get_state() returns 2104 * the latched link-down state, otherwise pass false. 2105 */ 2106 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2107 { 2108 struct phylink *pl = pcs->phylink; 2109 2110 if (pl) 2111 phylink_link_changed(pl, up, "pcs"); 2112 } 2113 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2114 2115 static irqreturn_t phylink_link_handler(int irq, void *data) 2116 { 2117 struct phylink *pl = data; 2118 2119 phylink_run_resolve(pl); 2120 2121 return IRQ_HANDLED; 2122 } 2123 2124 /** 2125 * phylink_start() - start a phylink instance 2126 * @pl: a pointer to a &struct phylink returned from phylink_create() 2127 * 2128 * Start the phylink instance specified by @pl, configuring the MAC for the 2129 * desired link mode(s) and negotiation style. This should be called from the 2130 * network device driver's &struct net_device_ops ndo_open() method. 2131 */ 2132 void phylink_start(struct phylink *pl) 2133 { 2134 bool poll = false; 2135 2136 ASSERT_RTNL(); 2137 2138 phylink_info(pl, "configuring for %s/%s link mode\n", 2139 phylink_an_mode_str(pl->cur_link_an_mode), 2140 phy_modes(pl->link_config.interface)); 2141 2142 /* Always set the carrier off */ 2143 if (pl->netdev) 2144 netif_carrier_off(pl->netdev); 2145 2146 pl->pcs_state = PCS_STATE_STARTING; 2147 2148 /* Apply the link configuration to the MAC when starting. This allows 2149 * a fixed-link to start with the correct parameters, and also 2150 * ensures that we set the appropriate advertisement for Serdes links. 2151 * 2152 * Restart autonegotiation if using 802.3z to ensure that the link 2153 * parameters are properly negotiated. This is necessary for DSA 2154 * switches using 802.3z negotiation to ensure they see our modes. 2155 */ 2156 phylink_mac_initial_config(pl, true); 2157 2158 pl->pcs_state = PCS_STATE_STARTED; 2159 2160 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2161 2162 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2163 int irq = gpiod_to_irq(pl->link_gpio); 2164 2165 if (irq > 0) { 2166 if (!request_irq(irq, phylink_link_handler, 2167 IRQF_TRIGGER_RISING | 2168 IRQF_TRIGGER_FALLING, 2169 "netdev link", pl)) 2170 pl->link_irq = irq; 2171 else 2172 irq = 0; 2173 } 2174 if (irq <= 0) 2175 poll = true; 2176 } 2177 2178 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2179 poll |= pl->config->poll_fixed_state; 2180 2181 if (poll) 2182 mod_timer(&pl->link_poll, jiffies + HZ); 2183 if (pl->phydev) 2184 phy_start(pl->phydev); 2185 if (pl->sfp_bus) 2186 sfp_upstream_start(pl->sfp_bus); 2187 } 2188 EXPORT_SYMBOL_GPL(phylink_start); 2189 2190 /** 2191 * phylink_stop() - stop a phylink instance 2192 * @pl: a pointer to a &struct phylink returned from phylink_create() 2193 * 2194 * Stop the phylink instance specified by @pl. This should be called from the 2195 * network device driver's &struct net_device_ops ndo_stop() method. The 2196 * network device's carrier state should not be changed prior to calling this 2197 * function. 2198 * 2199 * This will synchronously bring down the link if the link is not already 2200 * down (in other words, it will trigger a mac_link_down() method call.) 2201 */ 2202 void phylink_stop(struct phylink *pl) 2203 { 2204 ASSERT_RTNL(); 2205 2206 if (pl->sfp_bus) 2207 sfp_upstream_stop(pl->sfp_bus); 2208 if (pl->phydev) 2209 phy_stop(pl->phydev); 2210 del_timer_sync(&pl->link_poll); 2211 if (pl->link_irq) { 2212 free_irq(pl->link_irq, pl); 2213 pl->link_irq = 0; 2214 } 2215 2216 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2217 2218 pl->pcs_state = PCS_STATE_DOWN; 2219 2220 phylink_pcs_disable(pl->pcs); 2221 } 2222 EXPORT_SYMBOL_GPL(phylink_stop); 2223 2224 /** 2225 * phylink_suspend() - handle a network device suspend event 2226 * @pl: a pointer to a &struct phylink returned from phylink_create() 2227 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2228 * 2229 * Handle a network device suspend event. There are several cases: 2230 * 2231 * - If Wake-on-Lan is not active, we can bring down the link between 2232 * the MAC and PHY by calling phylink_stop(). 2233 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2234 * can also bring down the link between the MAC and PHY. 2235 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2236 * still needs to receive packets, so we can not bring the link down. 2237 */ 2238 void phylink_suspend(struct phylink *pl, bool mac_wol) 2239 { 2240 ASSERT_RTNL(); 2241 2242 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2243 /* Wake-on-Lan enabled, MAC handling */ 2244 mutex_lock(&pl->state_mutex); 2245 2246 /* Stop the resolver bringing the link up */ 2247 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2248 2249 /* Disable the carrier, to prevent transmit timeouts, 2250 * but one would hope all packets have been sent. This 2251 * also means phylink_resolve() will do nothing. 2252 */ 2253 if (pl->netdev) 2254 netif_carrier_off(pl->netdev); 2255 else 2256 pl->old_link_state = false; 2257 2258 /* We do not call mac_link_down() here as we want the 2259 * link to remain up to receive the WoL packets. 2260 */ 2261 mutex_unlock(&pl->state_mutex); 2262 } else { 2263 phylink_stop(pl); 2264 } 2265 } 2266 EXPORT_SYMBOL_GPL(phylink_suspend); 2267 2268 /** 2269 * phylink_resume() - handle a network device resume event 2270 * @pl: a pointer to a &struct phylink returned from phylink_create() 2271 * 2272 * Undo the effects of phylink_suspend(), returning the link to an 2273 * operational state. 2274 */ 2275 void phylink_resume(struct phylink *pl) 2276 { 2277 ASSERT_RTNL(); 2278 2279 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2280 /* Wake-on-Lan enabled, MAC handling */ 2281 2282 /* Call mac_link_down() so we keep the overall state balanced. 2283 * Do this under the state_mutex lock for consistency. This 2284 * will cause a "Link Down" message to be printed during 2285 * resume, which is harmless - the true link state will be 2286 * printed when we run a resolve. 2287 */ 2288 mutex_lock(&pl->state_mutex); 2289 phylink_link_down(pl); 2290 mutex_unlock(&pl->state_mutex); 2291 2292 /* Re-apply the link parameters so that all the settings get 2293 * restored to the MAC. 2294 */ 2295 phylink_mac_initial_config(pl, true); 2296 2297 /* Re-enable and re-resolve the link parameters */ 2298 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2299 } else { 2300 phylink_start(pl); 2301 } 2302 } 2303 EXPORT_SYMBOL_GPL(phylink_resume); 2304 2305 /** 2306 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2307 * @pl: a pointer to a &struct phylink returned from phylink_create() 2308 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2309 * 2310 * Read the wake on lan parameters from the PHY attached to the phylink 2311 * instance specified by @pl. If no PHY is currently attached, report no 2312 * support for wake on lan. 2313 */ 2314 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2315 { 2316 ASSERT_RTNL(); 2317 2318 wol->supported = 0; 2319 wol->wolopts = 0; 2320 2321 if (pl->phydev) 2322 phy_ethtool_get_wol(pl->phydev, wol); 2323 } 2324 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2325 2326 /** 2327 * phylink_ethtool_set_wol() - set wake on lan parameters 2328 * @pl: a pointer to a &struct phylink returned from phylink_create() 2329 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2330 * 2331 * Set the wake on lan parameters for the PHY attached to the phylink 2332 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2333 * error. 2334 * 2335 * Returns zero on success or negative errno code. 2336 */ 2337 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2338 { 2339 int ret = -EOPNOTSUPP; 2340 2341 ASSERT_RTNL(); 2342 2343 if (pl->phydev) 2344 ret = phy_ethtool_set_wol(pl->phydev, wol); 2345 2346 return ret; 2347 } 2348 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2349 2350 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2351 { 2352 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2353 2354 linkmode_zero(mask); 2355 phylink_set_port_modes(mask); 2356 2357 linkmode_and(dst, dst, mask); 2358 linkmode_or(dst, dst, b); 2359 } 2360 2361 static void phylink_get_ksettings(const struct phylink_link_state *state, 2362 struct ethtool_link_ksettings *kset) 2363 { 2364 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2365 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2366 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2367 kset->base.speed = state->speed; 2368 kset->base.duplex = state->duplex; 2369 } 2370 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2371 state->advertising) ? 2372 AUTONEG_ENABLE : AUTONEG_DISABLE; 2373 } 2374 2375 /** 2376 * phylink_ethtool_ksettings_get() - get the current link settings 2377 * @pl: a pointer to a &struct phylink returned from phylink_create() 2378 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2379 * 2380 * Read the current link settings for the phylink instance specified by @pl. 2381 * This will be the link settings read from the MAC, PHY or fixed link 2382 * settings depending on the current negotiation mode. 2383 */ 2384 int phylink_ethtool_ksettings_get(struct phylink *pl, 2385 struct ethtool_link_ksettings *kset) 2386 { 2387 struct phylink_link_state link_state; 2388 2389 ASSERT_RTNL(); 2390 2391 if (pl->phydev) 2392 phy_ethtool_ksettings_get(pl->phydev, kset); 2393 else 2394 kset->base.port = pl->link_port; 2395 2396 linkmode_copy(kset->link_modes.supported, pl->supported); 2397 2398 switch (pl->cur_link_an_mode) { 2399 case MLO_AN_FIXED: 2400 /* We are using fixed settings. Report these as the 2401 * current link settings - and note that these also 2402 * represent the supported speeds/duplex/pause modes. 2403 */ 2404 phylink_get_fixed_state(pl, &link_state); 2405 phylink_get_ksettings(&link_state, kset); 2406 break; 2407 2408 case MLO_AN_INBAND: 2409 /* If there is a phy attached, then use the reported 2410 * settings from the phy with no modification. 2411 */ 2412 if (pl->phydev) 2413 break; 2414 2415 phylink_mac_pcs_get_state(pl, &link_state); 2416 2417 /* The MAC is reporting the link results from its own PCS 2418 * layer via in-band status. Report these as the current 2419 * link settings. 2420 */ 2421 phylink_get_ksettings(&link_state, kset); 2422 break; 2423 } 2424 2425 return 0; 2426 } 2427 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2428 2429 /** 2430 * phylink_ethtool_ksettings_set() - set the link settings 2431 * @pl: a pointer to a &struct phylink returned from phylink_create() 2432 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2433 */ 2434 int phylink_ethtool_ksettings_set(struct phylink *pl, 2435 const struct ethtool_link_ksettings *kset) 2436 { 2437 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2438 struct phylink_link_state config; 2439 const struct phy_setting *s; 2440 2441 ASSERT_RTNL(); 2442 2443 if (pl->phydev) { 2444 struct ethtool_link_ksettings phy_kset = *kset; 2445 2446 linkmode_and(phy_kset.link_modes.advertising, 2447 phy_kset.link_modes.advertising, 2448 pl->supported); 2449 2450 /* We can rely on phylib for this update; we also do not need 2451 * to update the pl->link_config settings: 2452 * - the configuration returned via ksettings_get() will come 2453 * from phylib whenever a PHY is present. 2454 * - link_config.interface will be updated by the PHY calling 2455 * back via phylink_phy_change() and a subsequent resolve. 2456 * - initial link configuration for PHY mode comes from the 2457 * last phy state updated via phylink_phy_change(). 2458 * - other configuration changes (e.g. pause modes) are 2459 * performed directly via phylib. 2460 * - if in in-band mode with a PHY, the link configuration 2461 * is passed on the link from the PHY, and all of 2462 * link_config.{speed,duplex,an_enabled,pause} are not used. 2463 * - the only possible use would be link_config.advertising 2464 * pause modes when in 1000base-X mode with a PHY, but in 2465 * the presence of a PHY, this should not be changed as that 2466 * should be determined from the media side advertisement. 2467 */ 2468 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2469 } 2470 2471 config = pl->link_config; 2472 /* Mask out unsupported advertisements */ 2473 linkmode_and(config.advertising, kset->link_modes.advertising, 2474 pl->supported); 2475 2476 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2477 switch (kset->base.autoneg) { 2478 case AUTONEG_DISABLE: 2479 /* Autonegotiation disabled, select a suitable speed and 2480 * duplex. 2481 */ 2482 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2483 pl->supported, false); 2484 if (!s) 2485 return -EINVAL; 2486 2487 /* If we have a fixed link, refuse to change link parameters. 2488 * If the link parameters match, accept them but do nothing. 2489 */ 2490 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2491 if (s->speed != pl->link_config.speed || 2492 s->duplex != pl->link_config.duplex) 2493 return -EINVAL; 2494 return 0; 2495 } 2496 2497 config.speed = s->speed; 2498 config.duplex = s->duplex; 2499 break; 2500 2501 case AUTONEG_ENABLE: 2502 /* If we have a fixed link, allow autonegotiation (since that 2503 * is our default case) but do not allow the advertisement to 2504 * be changed. If the advertisement matches, simply return. 2505 */ 2506 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2507 if (!linkmode_equal(config.advertising, 2508 pl->link_config.advertising)) 2509 return -EINVAL; 2510 return 0; 2511 } 2512 2513 config.speed = SPEED_UNKNOWN; 2514 config.duplex = DUPLEX_UNKNOWN; 2515 break; 2516 2517 default: 2518 return -EINVAL; 2519 } 2520 2521 /* We have ruled out the case with a PHY attached, and the 2522 * fixed-link cases. All that is left are in-band links. 2523 */ 2524 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2525 kset->base.autoneg == AUTONEG_ENABLE); 2526 2527 /* If this link is with an SFP, ensure that changes to advertised modes 2528 * also cause the associated interface to be selected such that the 2529 * link can be configured correctly. 2530 */ 2531 if (pl->sfp_bus) { 2532 config.interface = sfp_select_interface(pl->sfp_bus, 2533 config.advertising); 2534 if (config.interface == PHY_INTERFACE_MODE_NA) { 2535 phylink_err(pl, 2536 "selection of interface failed, advertisement %*pb\n", 2537 __ETHTOOL_LINK_MODE_MASK_NBITS, 2538 config.advertising); 2539 return -EINVAL; 2540 } 2541 2542 /* Revalidate with the selected interface */ 2543 linkmode_copy(support, pl->supported); 2544 if (phylink_validate(pl, support, &config)) { 2545 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2546 phylink_an_mode_str(pl->cur_link_an_mode), 2547 phy_modes(config.interface), 2548 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2549 return -EINVAL; 2550 } 2551 } else { 2552 /* Validate without changing the current supported mask. */ 2553 linkmode_copy(support, pl->supported); 2554 if (phylink_validate(pl, support, &config)) 2555 return -EINVAL; 2556 } 2557 2558 /* If autonegotiation is enabled, we must have an advertisement */ 2559 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2560 config.advertising) && 2561 phylink_is_empty_linkmode(config.advertising)) 2562 return -EINVAL; 2563 2564 mutex_lock(&pl->state_mutex); 2565 pl->link_config.speed = config.speed; 2566 pl->link_config.duplex = config.duplex; 2567 2568 if (pl->link_config.interface != config.interface) { 2569 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2570 /* We need to force the link down, then change the interface */ 2571 if (pl->old_link_state) { 2572 phylink_link_down(pl); 2573 pl->old_link_state = false; 2574 } 2575 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2576 &pl->phylink_disable_state)) 2577 phylink_major_config(pl, false, &config); 2578 pl->link_config.interface = config.interface; 2579 linkmode_copy(pl->link_config.advertising, config.advertising); 2580 } else if (!linkmode_equal(pl->link_config.advertising, 2581 config.advertising)) { 2582 linkmode_copy(pl->link_config.advertising, config.advertising); 2583 phylink_change_inband_advert(pl); 2584 } 2585 mutex_unlock(&pl->state_mutex); 2586 2587 return 0; 2588 } 2589 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2590 2591 /** 2592 * phylink_ethtool_nway_reset() - restart negotiation 2593 * @pl: a pointer to a &struct phylink returned from phylink_create() 2594 * 2595 * Restart negotiation for the phylink instance specified by @pl. This will 2596 * cause any attached phy to restart negotiation with the link partner, and 2597 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2598 * negotiation. 2599 * 2600 * Returns zero on success, or negative error code. 2601 */ 2602 int phylink_ethtool_nway_reset(struct phylink *pl) 2603 { 2604 int ret = 0; 2605 2606 ASSERT_RTNL(); 2607 2608 if (pl->phydev) 2609 ret = phy_restart_aneg(pl->phydev); 2610 phylink_pcs_an_restart(pl); 2611 2612 return ret; 2613 } 2614 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2615 2616 /** 2617 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2618 * @pl: a pointer to a &struct phylink returned from phylink_create() 2619 * @pause: a pointer to a &struct ethtool_pauseparam 2620 */ 2621 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2622 struct ethtool_pauseparam *pause) 2623 { 2624 ASSERT_RTNL(); 2625 2626 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2627 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2628 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2629 } 2630 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2631 2632 /** 2633 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2634 * @pl: a pointer to a &struct phylink returned from phylink_create() 2635 * @pause: a pointer to a &struct ethtool_pauseparam 2636 */ 2637 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2638 struct ethtool_pauseparam *pause) 2639 { 2640 struct phylink_link_state *config = &pl->link_config; 2641 bool manual_changed; 2642 int pause_state; 2643 2644 ASSERT_RTNL(); 2645 2646 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2647 return -EOPNOTSUPP; 2648 2649 if (!phylink_test(pl->supported, Pause) && 2650 !phylink_test(pl->supported, Asym_Pause)) 2651 return -EOPNOTSUPP; 2652 2653 if (!phylink_test(pl->supported, Asym_Pause) && 2654 pause->rx_pause != pause->tx_pause) 2655 return -EINVAL; 2656 2657 pause_state = 0; 2658 if (pause->autoneg) 2659 pause_state |= MLO_PAUSE_AN; 2660 if (pause->rx_pause) 2661 pause_state |= MLO_PAUSE_RX; 2662 if (pause->tx_pause) 2663 pause_state |= MLO_PAUSE_TX; 2664 2665 mutex_lock(&pl->state_mutex); 2666 /* 2667 * See the comments for linkmode_set_pause(), wrt the deficiencies 2668 * with the current implementation. A solution to this issue would 2669 * be: 2670 * ethtool Local device 2671 * rx tx Pause AsymDir 2672 * 0 0 0 0 2673 * 1 0 1 1 2674 * 0 1 0 1 2675 * 1 1 1 1 2676 * and then use the ethtool rx/tx enablement status to mask the 2677 * rx/tx pause resolution. 2678 */ 2679 linkmode_set_pause(config->advertising, pause->tx_pause, 2680 pause->rx_pause); 2681 2682 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2683 (!(pause_state & MLO_PAUSE_AN) && 2684 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2685 2686 config->pause = pause_state; 2687 2688 /* Update our in-band advertisement, triggering a renegotiation if 2689 * the advertisement changed. 2690 */ 2691 if (!pl->phydev) 2692 phylink_change_inband_advert(pl); 2693 2694 mutex_unlock(&pl->state_mutex); 2695 2696 /* If we have a PHY, a change of the pause frame advertisement will 2697 * cause phylib to renegotiate (if AN is enabled) which will in turn 2698 * call our phylink_phy_change() and trigger a resolve. Note that 2699 * we can't hold our state mutex while calling phy_set_asym_pause(). 2700 */ 2701 if (pl->phydev) 2702 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2703 pause->tx_pause); 2704 2705 /* If the manual pause settings changed, make sure we trigger a 2706 * resolve to update their state; we can not guarantee that the 2707 * link will cycle. 2708 */ 2709 if (manual_changed) { 2710 pl->mac_link_dropped = true; 2711 phylink_run_resolve(pl); 2712 } 2713 2714 return 0; 2715 } 2716 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2717 2718 /** 2719 * phylink_get_eee_err() - read the energy efficient ethernet error 2720 * counter 2721 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2722 * 2723 * Read the Energy Efficient Ethernet error counter from the PHY associated 2724 * with the phylink instance specified by @pl. 2725 * 2726 * Returns positive error counter value, or negative error code. 2727 */ 2728 int phylink_get_eee_err(struct phylink *pl) 2729 { 2730 int ret = 0; 2731 2732 ASSERT_RTNL(); 2733 2734 if (pl->phydev) 2735 ret = phy_get_eee_err(pl->phydev); 2736 2737 return ret; 2738 } 2739 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2740 2741 /** 2742 * phylink_init_eee() - init and check the EEE features 2743 * @pl: a pointer to a &struct phylink returned from phylink_create() 2744 * @clk_stop_enable: allow PHY to stop receive clock 2745 * 2746 * Must be called either with RTNL held or within mac_link_up() 2747 */ 2748 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2749 { 2750 int ret = -EOPNOTSUPP; 2751 2752 if (pl->phydev) 2753 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2754 2755 return ret; 2756 } 2757 EXPORT_SYMBOL_GPL(phylink_init_eee); 2758 2759 /** 2760 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2761 * @pl: a pointer to a &struct phylink returned from phylink_create() 2762 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2763 */ 2764 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2765 { 2766 int ret = -EOPNOTSUPP; 2767 2768 ASSERT_RTNL(); 2769 2770 if (pl->phydev) 2771 ret = phy_ethtool_get_eee(pl->phydev, eee); 2772 2773 return ret; 2774 } 2775 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2776 2777 /** 2778 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2779 * @pl: a pointer to a &struct phylink returned from phylink_create() 2780 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2781 */ 2782 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2783 { 2784 int ret = -EOPNOTSUPP; 2785 2786 ASSERT_RTNL(); 2787 2788 if (pl->phydev) 2789 ret = phy_ethtool_set_eee(pl->phydev, eee); 2790 2791 return ret; 2792 } 2793 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2794 2795 /* This emulates MII registers for a fixed-mode phy operating as per the 2796 * passed in state. "aneg" defines if we report negotiation is possible. 2797 * 2798 * FIXME: should deal with negotiation state too. 2799 */ 2800 static int phylink_mii_emul_read(unsigned int reg, 2801 struct phylink_link_state *state) 2802 { 2803 struct fixed_phy_status fs; 2804 unsigned long *lpa = state->lp_advertising; 2805 int val; 2806 2807 fs.link = state->link; 2808 fs.speed = state->speed; 2809 fs.duplex = state->duplex; 2810 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2811 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2812 2813 val = swphy_read_reg(reg, &fs); 2814 if (reg == MII_BMSR) { 2815 if (!state->an_complete) 2816 val &= ~BMSR_ANEGCOMPLETE; 2817 } 2818 return val; 2819 } 2820 2821 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2822 unsigned int reg) 2823 { 2824 struct phy_device *phydev = pl->phydev; 2825 int prtad, devad; 2826 2827 if (mdio_phy_id_is_c45(phy_id)) { 2828 prtad = mdio_phy_id_prtad(phy_id); 2829 devad = mdio_phy_id_devad(phy_id); 2830 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2831 reg); 2832 } 2833 2834 if (phydev->is_c45) { 2835 switch (reg) { 2836 case MII_BMCR: 2837 case MII_BMSR: 2838 case MII_PHYSID1: 2839 case MII_PHYSID2: 2840 devad = __ffs(phydev->c45_ids.mmds_present); 2841 break; 2842 case MII_ADVERTISE: 2843 case MII_LPA: 2844 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2845 return -EINVAL; 2846 devad = MDIO_MMD_AN; 2847 if (reg == MII_ADVERTISE) 2848 reg = MDIO_AN_ADVERTISE; 2849 else 2850 reg = MDIO_AN_LPA; 2851 break; 2852 default: 2853 return -EINVAL; 2854 } 2855 prtad = phy_id; 2856 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2857 reg); 2858 } 2859 2860 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2861 } 2862 2863 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2864 unsigned int reg, unsigned int val) 2865 { 2866 struct phy_device *phydev = pl->phydev; 2867 int prtad, devad; 2868 2869 if (mdio_phy_id_is_c45(phy_id)) { 2870 prtad = mdio_phy_id_prtad(phy_id); 2871 devad = mdio_phy_id_devad(phy_id); 2872 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2873 reg, val); 2874 } 2875 2876 if (phydev->is_c45) { 2877 switch (reg) { 2878 case MII_BMCR: 2879 case MII_BMSR: 2880 case MII_PHYSID1: 2881 case MII_PHYSID2: 2882 devad = __ffs(phydev->c45_ids.mmds_present); 2883 break; 2884 case MII_ADVERTISE: 2885 case MII_LPA: 2886 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2887 return -EINVAL; 2888 devad = MDIO_MMD_AN; 2889 if (reg == MII_ADVERTISE) 2890 reg = MDIO_AN_ADVERTISE; 2891 else 2892 reg = MDIO_AN_LPA; 2893 break; 2894 default: 2895 return -EINVAL; 2896 } 2897 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2898 reg, val); 2899 } 2900 2901 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2902 } 2903 2904 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2905 unsigned int reg) 2906 { 2907 struct phylink_link_state state; 2908 int val = 0xffff; 2909 2910 switch (pl->cur_link_an_mode) { 2911 case MLO_AN_FIXED: 2912 if (phy_id == 0) { 2913 phylink_get_fixed_state(pl, &state); 2914 val = phylink_mii_emul_read(reg, &state); 2915 } 2916 break; 2917 2918 case MLO_AN_PHY: 2919 return -EOPNOTSUPP; 2920 2921 case MLO_AN_INBAND: 2922 if (phy_id == 0) { 2923 phylink_mac_pcs_get_state(pl, &state); 2924 val = phylink_mii_emul_read(reg, &state); 2925 } 2926 break; 2927 } 2928 2929 return val & 0xffff; 2930 } 2931 2932 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2933 unsigned int reg, unsigned int val) 2934 { 2935 switch (pl->cur_link_an_mode) { 2936 case MLO_AN_FIXED: 2937 break; 2938 2939 case MLO_AN_PHY: 2940 return -EOPNOTSUPP; 2941 2942 case MLO_AN_INBAND: 2943 break; 2944 } 2945 2946 return 0; 2947 } 2948 2949 /** 2950 * phylink_mii_ioctl() - generic mii ioctl interface 2951 * @pl: a pointer to a &struct phylink returned from phylink_create() 2952 * @ifr: a pointer to a &struct ifreq for socket ioctls 2953 * @cmd: ioctl cmd to execute 2954 * 2955 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2956 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2957 * 2958 * Returns: zero on success or negative error code. 2959 * 2960 * %SIOCGMIIPHY: 2961 * read register from the current PHY. 2962 * %SIOCGMIIREG: 2963 * read register from the specified PHY. 2964 * %SIOCSMIIREG: 2965 * set a register on the specified PHY. 2966 */ 2967 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2968 { 2969 struct mii_ioctl_data *mii = if_mii(ifr); 2970 int ret; 2971 2972 ASSERT_RTNL(); 2973 2974 if (pl->phydev) { 2975 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2976 switch (cmd) { 2977 case SIOCGMIIPHY: 2978 mii->phy_id = pl->phydev->mdio.addr; 2979 fallthrough; 2980 2981 case SIOCGMIIREG: 2982 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2983 if (ret >= 0) { 2984 mii->val_out = ret; 2985 ret = 0; 2986 } 2987 break; 2988 2989 case SIOCSMIIREG: 2990 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2991 mii->val_in); 2992 break; 2993 2994 default: 2995 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2996 break; 2997 } 2998 } else { 2999 switch (cmd) { 3000 case SIOCGMIIPHY: 3001 mii->phy_id = 0; 3002 fallthrough; 3003 3004 case SIOCGMIIREG: 3005 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3006 if (ret >= 0) { 3007 mii->val_out = ret; 3008 ret = 0; 3009 } 3010 break; 3011 3012 case SIOCSMIIREG: 3013 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3014 mii->val_in); 3015 break; 3016 3017 default: 3018 ret = -EOPNOTSUPP; 3019 break; 3020 } 3021 } 3022 3023 return ret; 3024 } 3025 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3026 3027 /** 3028 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3029 * link partners 3030 * @pl: a pointer to a &struct phylink returned from phylink_create() 3031 * @sync: perform action synchronously 3032 * 3033 * If we have a PHY that is not part of a SFP module, then set the speed 3034 * as described in the phy_speed_down() function. Please see this function 3035 * for a description of the @sync parameter. 3036 * 3037 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3038 */ 3039 int phylink_speed_down(struct phylink *pl, bool sync) 3040 { 3041 int ret = 0; 3042 3043 ASSERT_RTNL(); 3044 3045 if (!pl->sfp_bus && pl->phydev) 3046 ret = phy_speed_down(pl->phydev, sync); 3047 3048 return ret; 3049 } 3050 EXPORT_SYMBOL_GPL(phylink_speed_down); 3051 3052 /** 3053 * phylink_speed_up() - restore the advertised speeds prior to the call to 3054 * phylink_speed_down() 3055 * @pl: a pointer to a &struct phylink returned from phylink_create() 3056 * 3057 * If we have a PHY that is not part of a SFP module, then restore the 3058 * PHY speeds as per phy_speed_up(). 3059 * 3060 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3061 */ 3062 int phylink_speed_up(struct phylink *pl) 3063 { 3064 int ret = 0; 3065 3066 ASSERT_RTNL(); 3067 3068 if (!pl->sfp_bus && pl->phydev) 3069 ret = phy_speed_up(pl->phydev); 3070 3071 return ret; 3072 } 3073 EXPORT_SYMBOL_GPL(phylink_speed_up); 3074 3075 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3076 { 3077 struct phylink *pl = upstream; 3078 3079 pl->netdev->sfp_bus = bus; 3080 } 3081 3082 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3083 { 3084 struct phylink *pl = upstream; 3085 3086 pl->netdev->sfp_bus = NULL; 3087 } 3088 3089 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3090 const unsigned long *intf) 3091 { 3092 phy_interface_t interface; 3093 size_t i; 3094 3095 interface = PHY_INTERFACE_MODE_NA; 3096 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3097 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3098 interface = phylink_sfp_interface_preference[i]; 3099 break; 3100 } 3101 3102 return interface; 3103 } 3104 3105 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3106 unsigned long *supported, 3107 struct phylink_link_state *state) 3108 { 3109 bool changed = false; 3110 3111 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3112 phylink_an_mode_str(mode), phy_modes(state->interface), 3113 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3114 3115 if (!linkmode_equal(pl->supported, supported)) { 3116 linkmode_copy(pl->supported, supported); 3117 changed = true; 3118 } 3119 3120 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3121 linkmode_copy(pl->link_config.advertising, state->advertising); 3122 changed = true; 3123 } 3124 3125 if (pl->cur_link_an_mode != mode || 3126 pl->link_config.interface != state->interface) { 3127 pl->cur_link_an_mode = mode; 3128 pl->link_config.interface = state->interface; 3129 3130 changed = true; 3131 3132 phylink_info(pl, "switched to %s/%s link mode\n", 3133 phylink_an_mode_str(mode), 3134 phy_modes(state->interface)); 3135 } 3136 3137 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3138 &pl->phylink_disable_state)) 3139 phylink_mac_initial_config(pl, false); 3140 } 3141 3142 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3143 struct phy_device *phy) 3144 { 3145 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3146 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3147 struct phylink_link_state config; 3148 phy_interface_t iface; 3149 int ret; 3150 3151 linkmode_copy(support, phy->supported); 3152 3153 memset(&config, 0, sizeof(config)); 3154 linkmode_copy(config.advertising, phy->advertising); 3155 config.interface = PHY_INTERFACE_MODE_NA; 3156 config.speed = SPEED_UNKNOWN; 3157 config.duplex = DUPLEX_UNKNOWN; 3158 config.pause = MLO_PAUSE_AN; 3159 3160 /* Ignore errors if we're expecting a PHY to attach later */ 3161 ret = phylink_validate(pl, support, &config); 3162 if (ret) { 3163 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3164 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3165 ERR_PTR(ret)); 3166 return ret; 3167 } 3168 3169 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3170 if (iface == PHY_INTERFACE_MODE_NA) { 3171 phylink_err(pl, 3172 "selection of interface failed, advertisement %*pb\n", 3173 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3174 return -EINVAL; 3175 } 3176 3177 config.interface = iface; 3178 linkmode_copy(support1, support); 3179 ret = phylink_validate(pl, support1, &config); 3180 if (ret) { 3181 phylink_err(pl, 3182 "validation of %s/%s with support %*pb failed: %pe\n", 3183 phylink_an_mode_str(mode), 3184 phy_modes(config.interface), 3185 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3186 ERR_PTR(ret)); 3187 return ret; 3188 } 3189 3190 pl->link_port = pl->sfp_port; 3191 3192 phylink_sfp_set_config(pl, mode, support, &config); 3193 3194 return 0; 3195 } 3196 3197 static int phylink_sfp_config_optical(struct phylink *pl) 3198 { 3199 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3200 DECLARE_PHY_INTERFACE_MASK(interfaces); 3201 struct phylink_link_state config; 3202 phy_interface_t interface; 3203 int ret; 3204 3205 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3206 (int)PHY_INTERFACE_MODE_MAX, 3207 pl->config->supported_interfaces, 3208 (int)PHY_INTERFACE_MODE_MAX, 3209 pl->sfp_interfaces); 3210 3211 /* Find the union of the supported interfaces by the PCS/MAC and 3212 * the SFP module. 3213 */ 3214 phy_interface_and(interfaces, pl->config->supported_interfaces, 3215 pl->sfp_interfaces); 3216 if (phy_interface_empty(interfaces)) { 3217 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3218 return -EINVAL; 3219 } 3220 3221 memset(&config, 0, sizeof(config)); 3222 linkmode_copy(support, pl->sfp_support); 3223 linkmode_copy(config.advertising, pl->sfp_support); 3224 config.speed = SPEED_UNKNOWN; 3225 config.duplex = DUPLEX_UNKNOWN; 3226 config.pause = MLO_PAUSE_AN; 3227 3228 /* For all the interfaces that are supported, reduce the sfp_support 3229 * mask to only those link modes that can be supported. 3230 */ 3231 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3232 interfaces); 3233 if (ret) { 3234 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3235 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3236 return ret; 3237 } 3238 3239 interface = phylink_choose_sfp_interface(pl, interfaces); 3240 if (interface == PHY_INTERFACE_MODE_NA) { 3241 phylink_err(pl, "failed to select SFP interface\n"); 3242 return -EINVAL; 3243 } 3244 3245 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3246 phy_modes(interface)); 3247 3248 config.interface = interface; 3249 3250 /* Ignore errors if we're expecting a PHY to attach later */ 3251 ret = phylink_validate(pl, support, &config); 3252 if (ret) { 3253 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3254 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3255 ERR_PTR(ret)); 3256 return ret; 3257 } 3258 3259 pl->link_port = pl->sfp_port; 3260 3261 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3262 3263 return 0; 3264 } 3265 3266 static int phylink_sfp_module_insert(void *upstream, 3267 const struct sfp_eeprom_id *id) 3268 { 3269 struct phylink *pl = upstream; 3270 3271 ASSERT_RTNL(); 3272 3273 linkmode_zero(pl->sfp_support); 3274 phy_interface_zero(pl->sfp_interfaces); 3275 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3276 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3277 3278 /* If this module may have a PHY connecting later, defer until later */ 3279 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3280 if (pl->sfp_may_have_phy) 3281 return 0; 3282 3283 return phylink_sfp_config_optical(pl); 3284 } 3285 3286 static int phylink_sfp_module_start(void *upstream) 3287 { 3288 struct phylink *pl = upstream; 3289 3290 /* If this SFP module has a PHY, start the PHY now. */ 3291 if (pl->phydev) { 3292 phy_start(pl->phydev); 3293 return 0; 3294 } 3295 3296 /* If the module may have a PHY but we didn't detect one we 3297 * need to configure the MAC here. 3298 */ 3299 if (!pl->sfp_may_have_phy) 3300 return 0; 3301 3302 return phylink_sfp_config_optical(pl); 3303 } 3304 3305 static void phylink_sfp_module_stop(void *upstream) 3306 { 3307 struct phylink *pl = upstream; 3308 3309 /* If this SFP module has a PHY, stop it. */ 3310 if (pl->phydev) 3311 phy_stop(pl->phydev); 3312 } 3313 3314 static void phylink_sfp_link_down(void *upstream) 3315 { 3316 struct phylink *pl = upstream; 3317 3318 ASSERT_RTNL(); 3319 3320 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3321 } 3322 3323 static void phylink_sfp_link_up(void *upstream) 3324 { 3325 struct phylink *pl = upstream; 3326 3327 ASSERT_RTNL(); 3328 3329 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3330 } 3331 3332 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3333 * or 802.3z control word, so inband will not work. 3334 */ 3335 static bool phylink_phy_no_inband(struct phy_device *phy) 3336 { 3337 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3338 0xae025150, 0xfffffff0); 3339 } 3340 3341 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3342 { 3343 struct phylink *pl = upstream; 3344 phy_interface_t interface; 3345 u8 mode; 3346 int ret; 3347 3348 /* 3349 * This is the new way of dealing with flow control for PHYs, 3350 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3351 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3352 * using our validate call to the MAC, we rely upon the MAC 3353 * clearing the bits from both supported and advertising fields. 3354 */ 3355 phy_support_asym_pause(phy); 3356 3357 if (phylink_phy_no_inband(phy)) 3358 mode = MLO_AN_PHY; 3359 else 3360 mode = MLO_AN_INBAND; 3361 3362 /* Set the PHY's host supported interfaces */ 3363 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3364 pl->config->supported_interfaces); 3365 3366 /* Do the initial configuration */ 3367 ret = phylink_sfp_config_phy(pl, mode, phy); 3368 if (ret < 0) 3369 return ret; 3370 3371 interface = pl->link_config.interface; 3372 ret = phylink_attach_phy(pl, phy, interface); 3373 if (ret < 0) 3374 return ret; 3375 3376 ret = phylink_bringup_phy(pl, phy, interface); 3377 if (ret) 3378 phy_detach(phy); 3379 3380 return ret; 3381 } 3382 3383 static void phylink_sfp_disconnect_phy(void *upstream) 3384 { 3385 phylink_disconnect_phy(upstream); 3386 } 3387 3388 static const struct sfp_upstream_ops sfp_phylink_ops = { 3389 .attach = phylink_sfp_attach, 3390 .detach = phylink_sfp_detach, 3391 .module_insert = phylink_sfp_module_insert, 3392 .module_start = phylink_sfp_module_start, 3393 .module_stop = phylink_sfp_module_stop, 3394 .link_up = phylink_sfp_link_up, 3395 .link_down = phylink_sfp_link_down, 3396 .connect_phy = phylink_sfp_connect_phy, 3397 .disconnect_phy = phylink_sfp_disconnect_phy, 3398 }; 3399 3400 /* Helpers for MAC drivers */ 3401 3402 static struct { 3403 int bit; 3404 int speed; 3405 } phylink_c73_priority_resolution[] = { 3406 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3407 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3408 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3409 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3410 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3411 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3412 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3413 /* 5GBASE-KR not supported */ 3414 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3415 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3416 }; 3417 3418 void phylink_resolve_c73(struct phylink_link_state *state) 3419 { 3420 int i; 3421 3422 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3423 int bit = phylink_c73_priority_resolution[i].bit; 3424 if (linkmode_test_bit(bit, state->advertising) && 3425 linkmode_test_bit(bit, state->lp_advertising)) 3426 break; 3427 } 3428 3429 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3430 state->speed = phylink_c73_priority_resolution[i].speed; 3431 state->duplex = DUPLEX_FULL; 3432 } else { 3433 /* negotiation failure */ 3434 state->link = false; 3435 } 3436 3437 phylink_resolve_an_pause(state); 3438 } 3439 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3440 3441 static void phylink_decode_c37_word(struct phylink_link_state *state, 3442 uint16_t config_reg, int speed) 3443 { 3444 int fd_bit; 3445 3446 if (speed == SPEED_2500) 3447 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3448 else 3449 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3450 3451 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3452 3453 if (linkmode_test_bit(fd_bit, state->advertising) && 3454 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3455 state->speed = speed; 3456 state->duplex = DUPLEX_FULL; 3457 } else { 3458 /* negotiation failure */ 3459 state->link = false; 3460 } 3461 3462 phylink_resolve_an_pause(state); 3463 } 3464 3465 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3466 uint16_t config_reg) 3467 { 3468 if (!(config_reg & LPA_SGMII_LINK)) { 3469 state->link = false; 3470 return; 3471 } 3472 3473 switch (config_reg & LPA_SGMII_SPD_MASK) { 3474 case LPA_SGMII_10: 3475 state->speed = SPEED_10; 3476 break; 3477 case LPA_SGMII_100: 3478 state->speed = SPEED_100; 3479 break; 3480 case LPA_SGMII_1000: 3481 state->speed = SPEED_1000; 3482 break; 3483 default: 3484 state->link = false; 3485 return; 3486 } 3487 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3488 state->duplex = DUPLEX_FULL; 3489 else 3490 state->duplex = DUPLEX_HALF; 3491 } 3492 3493 /** 3494 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3495 * @state: a pointer to a struct phylink_link_state. 3496 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3497 * 3498 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3499 * code word. Decode the USXGMII code word and populate the corresponding fields 3500 * (speed, duplex) into the phylink_link_state structure. 3501 */ 3502 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3503 uint16_t lpa) 3504 { 3505 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3506 case MDIO_USXGMII_10: 3507 state->speed = SPEED_10; 3508 break; 3509 case MDIO_USXGMII_100: 3510 state->speed = SPEED_100; 3511 break; 3512 case MDIO_USXGMII_1000: 3513 state->speed = SPEED_1000; 3514 break; 3515 case MDIO_USXGMII_2500: 3516 state->speed = SPEED_2500; 3517 break; 3518 case MDIO_USXGMII_5000: 3519 state->speed = SPEED_5000; 3520 break; 3521 case MDIO_USXGMII_10G: 3522 state->speed = SPEED_10000; 3523 break; 3524 default: 3525 state->link = false; 3526 return; 3527 } 3528 3529 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3530 state->duplex = DUPLEX_FULL; 3531 else 3532 state->duplex = DUPLEX_HALF; 3533 } 3534 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3535 3536 /** 3537 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3538 * @state: a pointer to a struct phylink_link_state. 3539 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3540 * 3541 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3542 * code word. Decode the USGMII code word and populate the corresponding fields 3543 * (speed, duplex) into the phylink_link_state structure. The structure for this 3544 * word is the same as the USXGMII word, except it only supports speeds up to 3545 * 1Gbps. 3546 */ 3547 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3548 uint16_t lpa) 3549 { 3550 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3551 case MDIO_USXGMII_10: 3552 state->speed = SPEED_10; 3553 break; 3554 case MDIO_USXGMII_100: 3555 state->speed = SPEED_100; 3556 break; 3557 case MDIO_USXGMII_1000: 3558 state->speed = SPEED_1000; 3559 break; 3560 default: 3561 state->link = false; 3562 return; 3563 } 3564 3565 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3566 state->duplex = DUPLEX_FULL; 3567 else 3568 state->duplex = DUPLEX_HALF; 3569 } 3570 3571 /** 3572 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3573 * @state: a pointer to a &struct phylink_link_state. 3574 * @bmsr: The value of the %MII_BMSR register 3575 * @lpa: The value of the %MII_LPA register 3576 * 3577 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3578 * clause 37 negotiation and/or SGMII control. 3579 * 3580 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3581 * the phylink @state structure. This is suitable to be used for implementing 3582 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3583 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3584 */ 3585 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3586 u16 bmsr, u16 lpa) 3587 { 3588 state->link = !!(bmsr & BMSR_LSTATUS); 3589 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3590 /* If there is no link or autonegotiation is disabled, the LP advertisement 3591 * data is not meaningful, so don't go any further. 3592 */ 3593 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3594 state->advertising)) 3595 return; 3596 3597 switch (state->interface) { 3598 case PHY_INTERFACE_MODE_1000BASEX: 3599 phylink_decode_c37_word(state, lpa, SPEED_1000); 3600 break; 3601 3602 case PHY_INTERFACE_MODE_2500BASEX: 3603 phylink_decode_c37_word(state, lpa, SPEED_2500); 3604 break; 3605 3606 case PHY_INTERFACE_MODE_SGMII: 3607 case PHY_INTERFACE_MODE_QSGMII: 3608 phylink_decode_sgmii_word(state, lpa); 3609 break; 3610 case PHY_INTERFACE_MODE_QUSGMII: 3611 phylink_decode_usgmii_word(state, lpa); 3612 break; 3613 3614 default: 3615 state->link = false; 3616 break; 3617 } 3618 } 3619 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3620 3621 /** 3622 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3623 * @pcs: a pointer to a &struct mdio_device. 3624 * @state: a pointer to a &struct phylink_link_state. 3625 * 3626 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3627 * clause 37 negotiation and/or SGMII control. 3628 * 3629 * Read the MAC PCS state from the MII device configured in @config and 3630 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3631 * the phylink @state structure. This is suitable to be directly plugged 3632 * into the pcs_get_state() member of the struct phylink_pcs_ops 3633 * structure. 3634 */ 3635 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3636 struct phylink_link_state *state) 3637 { 3638 int bmsr, lpa; 3639 3640 bmsr = mdiodev_read(pcs, MII_BMSR); 3641 lpa = mdiodev_read(pcs, MII_LPA); 3642 if (bmsr < 0 || lpa < 0) { 3643 state->link = false; 3644 return; 3645 } 3646 3647 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3648 } 3649 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3650 3651 /** 3652 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3653 * advertisement 3654 * @interface: the PHY interface mode being configured 3655 * @advertising: the ethtool advertisement mask 3656 * 3657 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3658 * clause 37 negotiation and/or SGMII control. 3659 * 3660 * Encode the clause 37 PCS advertisement as specified by @interface and 3661 * @advertising. 3662 * 3663 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3664 */ 3665 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3666 const unsigned long *advertising) 3667 { 3668 u16 adv; 3669 3670 switch (interface) { 3671 case PHY_INTERFACE_MODE_1000BASEX: 3672 case PHY_INTERFACE_MODE_2500BASEX: 3673 adv = ADVERTISE_1000XFULL; 3674 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3675 advertising)) 3676 adv |= ADVERTISE_1000XPAUSE; 3677 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3678 advertising)) 3679 adv |= ADVERTISE_1000XPSE_ASYM; 3680 return adv; 3681 case PHY_INTERFACE_MODE_SGMII: 3682 case PHY_INTERFACE_MODE_QSGMII: 3683 return 0x0001; 3684 default: 3685 /* Nothing to do for other modes */ 3686 return -EINVAL; 3687 } 3688 } 3689 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3690 3691 /** 3692 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3693 * @pcs: a pointer to a &struct mdio_device. 3694 * @interface: the PHY interface mode being configured 3695 * @advertising: the ethtool advertisement mask 3696 * @neg_mode: PCS negotiation mode 3697 * 3698 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3699 * parameters for the @mode, @interface and @advertising parameters. 3700 * Returns negative error number on failure, zero if the advertisement 3701 * has not changed, or positive if there is a change. 3702 */ 3703 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3704 phy_interface_t interface, 3705 const unsigned long *advertising, 3706 unsigned int neg_mode) 3707 { 3708 bool changed = 0; 3709 u16 bmcr; 3710 int ret, adv; 3711 3712 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3713 if (adv >= 0) { 3714 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3715 MII_ADVERTISE, 0xffff, adv); 3716 if (ret < 0) 3717 return ret; 3718 changed = ret; 3719 } 3720 3721 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3722 bmcr = BMCR_ANENABLE; 3723 else 3724 bmcr = 0; 3725 3726 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3727 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3728 if (ret < 0) 3729 return ret; 3730 3731 return changed; 3732 } 3733 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3734 3735 /** 3736 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3737 * @pcs: a pointer to a &struct mdio_device. 3738 * 3739 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3740 * clause 37 negotiation. 3741 * 3742 * Restart the clause 37 negotiation with the link partner. This is 3743 * suitable to be directly plugged into the pcs_get_state() member 3744 * of the struct phylink_pcs_ops structure. 3745 */ 3746 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3747 { 3748 int val = mdiodev_read(pcs, MII_BMCR); 3749 3750 if (val >= 0) { 3751 val |= BMCR_ANRESTART; 3752 3753 mdiodev_write(pcs, MII_BMCR, val); 3754 } 3755 } 3756 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3757 3758 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3759 struct phylink_link_state *state) 3760 { 3761 struct mii_bus *bus = pcs->bus; 3762 int addr = pcs->addr; 3763 int stat; 3764 3765 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3766 if (stat < 0) { 3767 state->link = false; 3768 return; 3769 } 3770 3771 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3772 if (!state->link) 3773 return; 3774 3775 switch (state->interface) { 3776 case PHY_INTERFACE_MODE_10GBASER: 3777 state->speed = SPEED_10000; 3778 state->duplex = DUPLEX_FULL; 3779 break; 3780 3781 default: 3782 break; 3783 } 3784 } 3785 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3786 3787 static int __init phylink_init(void) 3788 { 3789 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3790 __set_bit(phylink_sfp_interface_preference[i], 3791 phylink_sfp_interfaces); 3792 3793 return 0; 3794 } 3795 3796 module_init(phylink_init); 3797 3798 MODULE_LICENSE("GPL v2"); 3799 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3800