1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 static const phy_interface_t phylink_sfp_interface_preference[] = { 125 PHY_INTERFACE_MODE_25GBASER, 126 PHY_INTERFACE_MODE_USXGMII, 127 PHY_INTERFACE_MODE_10GBASER, 128 PHY_INTERFACE_MODE_5GBASER, 129 PHY_INTERFACE_MODE_2500BASEX, 130 PHY_INTERFACE_MODE_SGMII, 131 PHY_INTERFACE_MODE_1000BASEX, 132 PHY_INTERFACE_MODE_100BASEX, 133 }; 134 135 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 136 137 /** 138 * phylink_set_port_modes() - set the port type modes in the ethtool mask 139 * @mask: ethtool link mode mask 140 * 141 * Sets all the port type modes in the ethtool mask. MAC drivers should 142 * use this in their 'validate' callback. 143 */ 144 void phylink_set_port_modes(unsigned long *mask) 145 { 146 phylink_set(mask, TP); 147 phylink_set(mask, AUI); 148 phylink_set(mask, MII); 149 phylink_set(mask, FIBRE); 150 phylink_set(mask, BNC); 151 phylink_set(mask, Backplane); 152 } 153 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 154 155 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 156 { 157 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 158 159 phylink_set_port_modes(tmp); 160 phylink_set(tmp, Autoneg); 161 phylink_set(tmp, Pause); 162 phylink_set(tmp, Asym_Pause); 163 164 return linkmode_subset(linkmode, tmp); 165 } 166 167 static const char *phylink_an_mode_str(unsigned int mode) 168 { 169 static const char *modestr[] = { 170 [MLO_AN_PHY] = "phy", 171 [MLO_AN_FIXED] = "fixed", 172 [MLO_AN_INBAND] = "inband", 173 }; 174 175 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 176 } 177 178 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 179 { 180 switch (interface) { 181 case PHY_INTERFACE_MODE_SGMII: 182 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 183 return 1250; 184 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 185 return 3125; 186 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 187 return 5156; 188 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 189 return 10313; 190 default: 191 return 0; 192 } 193 } 194 195 /** 196 * phylink_interface_max_speed() - get the maximum speed of a phy interface 197 * @interface: phy interface mode defined by &typedef phy_interface_t 198 * 199 * Determine the maximum speed of a phy interface. This is intended to help 200 * determine the correct speed to pass to the MAC when the phy is performing 201 * rate matching. 202 * 203 * Return: The maximum speed of @interface 204 */ 205 static int phylink_interface_max_speed(phy_interface_t interface) 206 { 207 switch (interface) { 208 case PHY_INTERFACE_MODE_100BASEX: 209 case PHY_INTERFACE_MODE_REVRMII: 210 case PHY_INTERFACE_MODE_RMII: 211 case PHY_INTERFACE_MODE_SMII: 212 case PHY_INTERFACE_MODE_REVMII: 213 case PHY_INTERFACE_MODE_MII: 214 return SPEED_100; 215 216 case PHY_INTERFACE_MODE_TBI: 217 case PHY_INTERFACE_MODE_MOCA: 218 case PHY_INTERFACE_MODE_RTBI: 219 case PHY_INTERFACE_MODE_1000BASEX: 220 case PHY_INTERFACE_MODE_1000BASEKX: 221 case PHY_INTERFACE_MODE_TRGMII: 222 case PHY_INTERFACE_MODE_RGMII_TXID: 223 case PHY_INTERFACE_MODE_RGMII_RXID: 224 case PHY_INTERFACE_MODE_RGMII_ID: 225 case PHY_INTERFACE_MODE_RGMII: 226 case PHY_INTERFACE_MODE_PSGMII: 227 case PHY_INTERFACE_MODE_QSGMII: 228 case PHY_INTERFACE_MODE_QUSGMII: 229 case PHY_INTERFACE_MODE_SGMII: 230 case PHY_INTERFACE_MODE_GMII: 231 return SPEED_1000; 232 233 case PHY_INTERFACE_MODE_2500BASEX: 234 case PHY_INTERFACE_MODE_10G_QXGMII: 235 return SPEED_2500; 236 237 case PHY_INTERFACE_MODE_5GBASER: 238 return SPEED_5000; 239 240 case PHY_INTERFACE_MODE_XGMII: 241 case PHY_INTERFACE_MODE_RXAUI: 242 case PHY_INTERFACE_MODE_XAUI: 243 case PHY_INTERFACE_MODE_10GBASER: 244 case PHY_INTERFACE_MODE_10GKR: 245 case PHY_INTERFACE_MODE_USXGMII: 246 return SPEED_10000; 247 248 case PHY_INTERFACE_MODE_25GBASER: 249 return SPEED_25000; 250 251 case PHY_INTERFACE_MODE_XLGMII: 252 return SPEED_40000; 253 254 case PHY_INTERFACE_MODE_INTERNAL: 255 case PHY_INTERFACE_MODE_NA: 256 case PHY_INTERFACE_MODE_MAX: 257 /* No idea! Garbage in, unknown out */ 258 return SPEED_UNKNOWN; 259 } 260 261 /* If we get here, someone forgot to add an interface mode above */ 262 WARN_ON_ONCE(1); 263 return SPEED_UNKNOWN; 264 } 265 266 /** 267 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 268 * @linkmodes: ethtool linkmode mask (must be already initialised) 269 * @caps: bitmask of MAC capabilities 270 * 271 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 272 * supported by the @caps. @linkmodes must have been initialised previously. 273 */ 274 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 275 unsigned long caps) 276 { 277 if (caps & MAC_SYM_PAUSE) 278 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 279 280 if (caps & MAC_ASYM_PAUSE) 281 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 282 283 if (caps & MAC_10HD) { 284 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 287 } 288 289 if (caps & MAC_10FD) { 290 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 291 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 292 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 293 } 294 295 if (caps & MAC_100HD) { 296 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 297 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 298 } 299 300 if (caps & MAC_100FD) { 301 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_1000HD) 307 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 308 309 if (caps & MAC_1000FD) { 310 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 314 } 315 316 if (caps & MAC_2500FD) { 317 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 318 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 319 } 320 321 if (caps & MAC_5000FD) 322 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 323 324 if (caps & MAC_10000FD) { 325 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 326 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 334 } 335 336 if (caps & MAC_25000FD) { 337 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 340 } 341 342 if (caps & MAC_40000FD) { 343 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 347 } 348 349 if (caps & MAC_50000FD) { 350 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 355 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 357 linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 359 } 360 361 if (caps & MAC_56000FD) { 362 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 366 } 367 368 if (caps & MAC_100000FD) { 369 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 373 linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 378 linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 383 linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 385 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 386 } 387 388 if (caps & MAC_200000FD) { 389 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 392 linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 397 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 398 linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 401 } 402 403 if (caps & MAC_400000FD) { 404 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 405 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 406 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 407 linkmodes); 408 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 411 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 412 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 413 linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 415 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 416 } 417 } 418 419 static struct { 420 unsigned long mask; 421 int speed; 422 unsigned int duplex; 423 } phylink_caps_params[] = { 424 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 425 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 426 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 427 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 428 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 429 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 430 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 431 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 432 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 433 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 434 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 435 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 436 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 437 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 438 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 439 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 440 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 441 }; 442 443 /** 444 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 445 * @config: pointer to a &struct phylink_config 446 * @max_speed: maximum speed 447 * 448 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 449 * Any further motifications of config.mac_capabilities will override this. 450 */ 451 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 452 { 453 int i; 454 455 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 456 phylink_caps_params[i].speed > max_speed; i++) 457 config->mac_capabilities &= ~phylink_caps_params[i].mask; 458 } 459 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 460 461 /** 462 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 463 * @speed: the speed to search for 464 * @duplex: the duplex to search for 465 * 466 * Find the mac capability for a given speed and duplex. 467 * 468 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 469 * there were no matches. 470 */ 471 static unsigned long phylink_cap_from_speed_duplex(int speed, 472 unsigned int duplex) 473 { 474 int i; 475 476 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 477 if (speed == phylink_caps_params[i].speed && 478 duplex == phylink_caps_params[i].duplex) 479 return phylink_caps_params[i].mask; 480 } 481 482 return 0; 483 } 484 485 /** 486 * phylink_get_capabilities() - get capabilities for a given MAC 487 * @interface: phy interface mode defined by &typedef phy_interface_t 488 * @mac_capabilities: bitmask of MAC capabilities 489 * @rate_matching: type of rate matching being performed 490 * 491 * Get the MAC capabilities that are supported by the @interface mode and 492 * @mac_capabilities. 493 */ 494 static unsigned long phylink_get_capabilities(phy_interface_t interface, 495 unsigned long mac_capabilities, 496 int rate_matching) 497 { 498 int max_speed = phylink_interface_max_speed(interface); 499 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 500 unsigned long matched_caps = 0; 501 502 switch (interface) { 503 case PHY_INTERFACE_MODE_USXGMII: 504 caps |= MAC_10000FD | MAC_5000FD; 505 fallthrough; 506 507 case PHY_INTERFACE_MODE_10G_QXGMII: 508 caps |= MAC_2500FD; 509 fallthrough; 510 511 case PHY_INTERFACE_MODE_RGMII_TXID: 512 case PHY_INTERFACE_MODE_RGMII_RXID: 513 case PHY_INTERFACE_MODE_RGMII_ID: 514 case PHY_INTERFACE_MODE_RGMII: 515 case PHY_INTERFACE_MODE_PSGMII: 516 case PHY_INTERFACE_MODE_QSGMII: 517 case PHY_INTERFACE_MODE_QUSGMII: 518 case PHY_INTERFACE_MODE_SGMII: 519 case PHY_INTERFACE_MODE_GMII: 520 caps |= MAC_1000HD | MAC_1000FD; 521 fallthrough; 522 523 case PHY_INTERFACE_MODE_REVRMII: 524 case PHY_INTERFACE_MODE_RMII: 525 case PHY_INTERFACE_MODE_SMII: 526 case PHY_INTERFACE_MODE_REVMII: 527 case PHY_INTERFACE_MODE_MII: 528 caps |= MAC_10HD | MAC_10FD; 529 fallthrough; 530 531 case PHY_INTERFACE_MODE_100BASEX: 532 caps |= MAC_100HD | MAC_100FD; 533 break; 534 535 case PHY_INTERFACE_MODE_TBI: 536 case PHY_INTERFACE_MODE_MOCA: 537 case PHY_INTERFACE_MODE_RTBI: 538 case PHY_INTERFACE_MODE_1000BASEX: 539 caps |= MAC_1000HD; 540 fallthrough; 541 case PHY_INTERFACE_MODE_1000BASEKX: 542 case PHY_INTERFACE_MODE_TRGMII: 543 caps |= MAC_1000FD; 544 break; 545 546 case PHY_INTERFACE_MODE_2500BASEX: 547 caps |= MAC_2500FD; 548 break; 549 550 case PHY_INTERFACE_MODE_5GBASER: 551 caps |= MAC_5000FD; 552 break; 553 554 case PHY_INTERFACE_MODE_XGMII: 555 case PHY_INTERFACE_MODE_RXAUI: 556 case PHY_INTERFACE_MODE_XAUI: 557 case PHY_INTERFACE_MODE_10GBASER: 558 case PHY_INTERFACE_MODE_10GKR: 559 caps |= MAC_10000FD; 560 break; 561 562 case PHY_INTERFACE_MODE_25GBASER: 563 caps |= MAC_25000FD; 564 break; 565 566 case PHY_INTERFACE_MODE_XLGMII: 567 caps |= MAC_40000FD; 568 break; 569 570 case PHY_INTERFACE_MODE_INTERNAL: 571 caps |= ~0; 572 break; 573 574 case PHY_INTERFACE_MODE_NA: 575 case PHY_INTERFACE_MODE_MAX: 576 break; 577 } 578 579 switch (rate_matching) { 580 case RATE_MATCH_OPEN_LOOP: 581 /* TODO */ 582 fallthrough; 583 case RATE_MATCH_NONE: 584 matched_caps = 0; 585 break; 586 case RATE_MATCH_PAUSE: { 587 /* The MAC must support asymmetric pause towards the local 588 * device for this. We could allow just symmetric pause, but 589 * then we might have to renegotiate if the link partner 590 * doesn't support pause. This is because there's no way to 591 * accept pause frames without transmitting them if we only 592 * support symmetric pause. 593 */ 594 if (!(mac_capabilities & MAC_SYM_PAUSE) || 595 !(mac_capabilities & MAC_ASYM_PAUSE)) 596 break; 597 598 /* We can't adapt if the MAC doesn't support the interface's 599 * max speed at full duplex. 600 */ 601 if (mac_capabilities & 602 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 603 /* Although a duplex-matching phy might exist, we 604 * conservatively remove these modes because the MAC 605 * will not be aware of the half-duplex nature of the 606 * link. 607 */ 608 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 609 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 610 } 611 break; 612 } 613 case RATE_MATCH_CRS: 614 /* The MAC must support half duplex at the interface's max 615 * speed. 616 */ 617 if (mac_capabilities & 618 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 619 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 620 matched_caps &= mac_capabilities; 621 } 622 break; 623 } 624 625 return (caps & mac_capabilities) | matched_caps; 626 } 627 628 /** 629 * phylink_validate_mask_caps() - Restrict link modes based on caps 630 * @supported: ethtool bitmask for supported link modes. 631 * @state: pointer to a &struct phylink_link_state. 632 * @mac_capabilities: bitmask of MAC capabilities 633 * 634 * Calculate the supported link modes based on @mac_capabilities, and restrict 635 * @supported and @state based on that. Use this function if your capabiliies 636 * aren't constant, such as if they vary depending on the interface. 637 */ 638 static void phylink_validate_mask_caps(unsigned long *supported, 639 struct phylink_link_state *state, 640 unsigned long mac_capabilities) 641 { 642 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 643 unsigned long caps; 644 645 phylink_set_port_modes(mask); 646 phylink_set(mask, Autoneg); 647 caps = phylink_get_capabilities(state->interface, mac_capabilities, 648 state->rate_matching); 649 phylink_caps_to_linkmodes(mask, caps); 650 651 linkmode_and(supported, supported, mask); 652 linkmode_and(state->advertising, state->advertising, mask); 653 } 654 655 static int phylink_validate_mac_and_pcs(struct phylink *pl, 656 unsigned long *supported, 657 struct phylink_link_state *state) 658 { 659 unsigned long capabilities; 660 struct phylink_pcs *pcs; 661 int ret; 662 663 /* Get the PCS for this interface mode */ 664 if (pl->using_mac_select_pcs) { 665 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 666 if (IS_ERR(pcs)) 667 return PTR_ERR(pcs); 668 } else { 669 pcs = pl->pcs; 670 } 671 672 if (pcs) { 673 /* The PCS, if present, must be setup before phylink_create() 674 * has been called. If the ops is not initialised, print an 675 * error and backtrace rather than oopsing the kernel. 676 */ 677 if (!pcs->ops) { 678 phylink_err(pl, "interface %s: uninitialised PCS\n", 679 phy_modes(state->interface)); 680 dump_stack(); 681 return -EINVAL; 682 } 683 684 /* Validate the link parameters with the PCS */ 685 if (pcs->ops->pcs_validate) { 686 ret = pcs->ops->pcs_validate(pcs, supported, state); 687 if (ret < 0 || phylink_is_empty_linkmode(supported)) 688 return -EINVAL; 689 690 /* Ensure the advertising mask is a subset of the 691 * supported mask. 692 */ 693 linkmode_and(state->advertising, state->advertising, 694 supported); 695 } 696 } 697 698 /* Then validate the link parameters with the MAC */ 699 if (pl->mac_ops->mac_get_caps) 700 capabilities = pl->mac_ops->mac_get_caps(pl->config, 701 state->interface); 702 else 703 capabilities = pl->config->mac_capabilities; 704 705 phylink_validate_mask_caps(supported, state, capabilities); 706 707 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 708 } 709 710 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 711 const unsigned long *supported, 712 const struct phylink_link_state *state, 713 phy_interface_t interface, 714 unsigned long *accum_supported, 715 unsigned long *accum_advertising) 716 { 717 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 718 struct phylink_link_state tmp_state; 719 720 linkmode_copy(tmp_supported, supported); 721 722 tmp_state = *state; 723 tmp_state.interface = interface; 724 725 if (phy) 726 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 727 728 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 729 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 730 interface, phy_modes(interface), 731 phy_rate_matching_to_str(tmp_state.rate_matching), 732 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 733 734 linkmode_or(accum_supported, accum_supported, tmp_supported); 735 linkmode_or(accum_advertising, accum_advertising, 736 tmp_state.advertising); 737 } 738 } 739 740 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 741 unsigned long *supported, 742 struct phylink_link_state *state, 743 const unsigned long *interfaces) 744 { 745 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 746 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 747 int interface; 748 749 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 750 phylink_validate_one(pl, phy, supported, state, interface, 751 all_s, all_adv); 752 753 linkmode_copy(supported, all_s); 754 linkmode_copy(state->advertising, all_adv); 755 756 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 757 } 758 759 static int phylink_validate(struct phylink *pl, unsigned long *supported, 760 struct phylink_link_state *state) 761 { 762 const unsigned long *interfaces = pl->config->supported_interfaces; 763 764 if (state->interface == PHY_INTERFACE_MODE_NA) 765 return phylink_validate_mask(pl, NULL, supported, state, 766 interfaces); 767 768 if (!test_bit(state->interface, interfaces)) 769 return -EINVAL; 770 771 return phylink_validate_mac_and_pcs(pl, supported, state); 772 } 773 774 static int phylink_parse_fixedlink(struct phylink *pl, 775 const struct fwnode_handle *fwnode) 776 { 777 struct fwnode_handle *fixed_node; 778 bool pause, asym_pause, autoneg; 779 const struct phy_setting *s; 780 struct gpio_desc *desc; 781 u32 speed; 782 int ret; 783 784 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 785 if (fixed_node) { 786 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 787 788 pl->link_config.speed = speed; 789 pl->link_config.duplex = DUPLEX_HALF; 790 791 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 792 pl->link_config.duplex = DUPLEX_FULL; 793 794 /* We treat the "pause" and "asym-pause" terminology as 795 * defining the link partner's ability. 796 */ 797 if (fwnode_property_read_bool(fixed_node, "pause")) 798 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 799 pl->link_config.lp_advertising); 800 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 801 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 802 pl->link_config.lp_advertising); 803 804 if (ret == 0) { 805 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 806 GPIOD_IN, "?"); 807 808 if (!IS_ERR(desc)) 809 pl->link_gpio = desc; 810 else if (desc == ERR_PTR(-EPROBE_DEFER)) 811 ret = -EPROBE_DEFER; 812 } 813 fwnode_handle_put(fixed_node); 814 815 if (ret) 816 return ret; 817 } else { 818 u32 prop[5]; 819 820 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 821 NULL, 0); 822 if (ret != ARRAY_SIZE(prop)) { 823 phylink_err(pl, "broken fixed-link?\n"); 824 return -EINVAL; 825 } 826 827 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 828 prop, ARRAY_SIZE(prop)); 829 if (!ret) { 830 pl->link_config.duplex = prop[1] ? 831 DUPLEX_FULL : DUPLEX_HALF; 832 pl->link_config.speed = prop[2]; 833 if (prop[3]) 834 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 835 pl->link_config.lp_advertising); 836 if (prop[4]) 837 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 838 pl->link_config.lp_advertising); 839 } 840 } 841 842 if (pl->link_config.speed > SPEED_1000 && 843 pl->link_config.duplex != DUPLEX_FULL) 844 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 845 pl->link_config.speed); 846 847 linkmode_fill(pl->supported); 848 linkmode_copy(pl->link_config.advertising, pl->supported); 849 phylink_validate(pl, pl->supported, &pl->link_config); 850 851 pause = phylink_test(pl->supported, Pause); 852 asym_pause = phylink_test(pl->supported, Asym_Pause); 853 autoneg = phylink_test(pl->supported, Autoneg); 854 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 855 pl->supported, true); 856 linkmode_zero(pl->supported); 857 phylink_set(pl->supported, MII); 858 859 if (pause) 860 phylink_set(pl->supported, Pause); 861 862 if (asym_pause) 863 phylink_set(pl->supported, Asym_Pause); 864 865 if (autoneg) 866 phylink_set(pl->supported, Autoneg); 867 868 if (s) { 869 __set_bit(s->bit, pl->supported); 870 __set_bit(s->bit, pl->link_config.lp_advertising); 871 } else { 872 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 873 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 874 pl->link_config.speed); 875 } 876 877 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 878 pl->supported); 879 880 pl->link_config.link = 1; 881 pl->link_config.an_complete = 1; 882 883 return 0; 884 } 885 886 static int phylink_parse_mode(struct phylink *pl, 887 const struct fwnode_handle *fwnode) 888 { 889 struct fwnode_handle *dn; 890 const char *managed; 891 unsigned long caps; 892 893 if (pl->config->default_an_inband) 894 pl->cfg_link_an_mode = MLO_AN_INBAND; 895 896 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 897 if (dn || fwnode_property_present(fwnode, "fixed-link")) 898 pl->cfg_link_an_mode = MLO_AN_FIXED; 899 fwnode_handle_put(dn); 900 901 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 902 strcmp(managed, "in-band-status") == 0)) { 903 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 904 phylink_err(pl, 905 "can't use both fixed-link and in-band-status\n"); 906 return -EINVAL; 907 } 908 909 pl->cfg_link_an_mode = MLO_AN_INBAND; 910 } 911 912 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 913 linkmode_zero(pl->supported); 914 phylink_set(pl->supported, MII); 915 phylink_set(pl->supported, Autoneg); 916 phylink_set(pl->supported, Asym_Pause); 917 phylink_set(pl->supported, Pause); 918 919 switch (pl->link_config.interface) { 920 case PHY_INTERFACE_MODE_SGMII: 921 case PHY_INTERFACE_MODE_PSGMII: 922 case PHY_INTERFACE_MODE_QSGMII: 923 case PHY_INTERFACE_MODE_QUSGMII: 924 case PHY_INTERFACE_MODE_RGMII: 925 case PHY_INTERFACE_MODE_RGMII_ID: 926 case PHY_INTERFACE_MODE_RGMII_RXID: 927 case PHY_INTERFACE_MODE_RGMII_TXID: 928 case PHY_INTERFACE_MODE_RTBI: 929 case PHY_INTERFACE_MODE_1000BASEX: 930 case PHY_INTERFACE_MODE_2500BASEX: 931 case PHY_INTERFACE_MODE_5GBASER: 932 case PHY_INTERFACE_MODE_25GBASER: 933 case PHY_INTERFACE_MODE_USXGMII: 934 case PHY_INTERFACE_MODE_10G_QXGMII: 935 case PHY_INTERFACE_MODE_10GKR: 936 case PHY_INTERFACE_MODE_10GBASER: 937 case PHY_INTERFACE_MODE_XLGMII: 938 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 939 caps = phylink_get_capabilities(pl->link_config.interface, caps, 940 RATE_MATCH_NONE); 941 phylink_caps_to_linkmodes(pl->supported, caps); 942 break; 943 944 default: 945 phylink_err(pl, 946 "incorrect link mode %s for in-band status\n", 947 phy_modes(pl->link_config.interface)); 948 return -EINVAL; 949 } 950 951 linkmode_copy(pl->link_config.advertising, pl->supported); 952 953 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 954 phylink_err(pl, 955 "failed to validate link configuration for in-band status\n"); 956 return -EINVAL; 957 } 958 } 959 960 return 0; 961 } 962 963 static void phylink_apply_manual_flow(struct phylink *pl, 964 struct phylink_link_state *state) 965 { 966 /* If autoneg is disabled, pause AN is also disabled */ 967 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 968 state->advertising)) 969 state->pause &= ~MLO_PAUSE_AN; 970 971 /* Manual configuration of pause modes */ 972 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 973 state->pause = pl->link_config.pause; 974 } 975 976 static void phylink_resolve_an_pause(struct phylink_link_state *state) 977 { 978 bool tx_pause, rx_pause; 979 980 if (state->duplex == DUPLEX_FULL) { 981 linkmode_resolve_pause(state->advertising, 982 state->lp_advertising, 983 &tx_pause, &rx_pause); 984 if (tx_pause) 985 state->pause |= MLO_PAUSE_TX; 986 if (rx_pause) 987 state->pause |= MLO_PAUSE_RX; 988 } 989 } 990 991 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 992 phy_interface_t interface) 993 { 994 if (pcs && pcs->ops->pcs_pre_config) 995 pcs->ops->pcs_pre_config(pcs, interface); 996 } 997 998 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 999 phy_interface_t interface) 1000 { 1001 int err = 0; 1002 1003 if (pcs && pcs->ops->pcs_post_config) 1004 err = pcs->ops->pcs_post_config(pcs, interface); 1005 1006 return err; 1007 } 1008 1009 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1010 { 1011 if (pcs && pcs->ops->pcs_disable) 1012 pcs->ops->pcs_disable(pcs); 1013 } 1014 1015 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1016 { 1017 int err = 0; 1018 1019 if (pcs && pcs->ops->pcs_enable) 1020 err = pcs->ops->pcs_enable(pcs); 1021 1022 return err; 1023 } 1024 1025 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1026 const struct phylink_link_state *state, 1027 bool permit_pause_to_mac) 1028 { 1029 if (!pcs) 1030 return 0; 1031 1032 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1033 state->advertising, permit_pause_to_mac); 1034 } 1035 1036 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1037 phy_interface_t interface, int speed, 1038 int duplex) 1039 { 1040 if (pcs && pcs->ops->pcs_link_up) 1041 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1042 } 1043 1044 static void phylink_pcs_poll_stop(struct phylink *pl) 1045 { 1046 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1047 del_timer(&pl->link_poll); 1048 } 1049 1050 static void phylink_pcs_poll_start(struct phylink *pl) 1051 { 1052 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1053 mod_timer(&pl->link_poll, jiffies + HZ); 1054 } 1055 1056 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1057 { 1058 int ret = 0; 1059 1060 /* Signal to PCS driver that MAC requires RX clock for init */ 1061 if (pl->config->mac_requires_rxc) 1062 pcs->rxc_always_on = true; 1063 1064 if (pcs->ops->pcs_pre_init) 1065 ret = pcs->ops->pcs_pre_init(pcs); 1066 1067 return ret; 1068 } 1069 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1070 1071 static void phylink_mac_config(struct phylink *pl, 1072 const struct phylink_link_state *state) 1073 { 1074 struct phylink_link_state st = *state; 1075 1076 /* Stop drivers incorrectly using these */ 1077 linkmode_zero(st.lp_advertising); 1078 st.speed = SPEED_UNKNOWN; 1079 st.duplex = DUPLEX_UNKNOWN; 1080 st.an_complete = false; 1081 st.link = false; 1082 1083 phylink_dbg(pl, 1084 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1085 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1086 phy_modes(st.interface), 1087 phy_rate_matching_to_str(st.rate_matching), 1088 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1089 st.pause); 1090 1091 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1092 } 1093 1094 static void phylink_pcs_an_restart(struct phylink *pl) 1095 { 1096 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1097 pl->link_config.advertising) && 1098 phy_interface_mode_is_8023z(pl->link_config.interface) && 1099 phylink_autoneg_inband(pl->cur_link_an_mode)) 1100 pl->pcs->ops->pcs_an_restart(pl->pcs); 1101 } 1102 1103 /** 1104 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1105 * @mode: one of %MLO_AN_FIXED, %MLO_AN_PHY, %MLO_AN_INBAND. 1106 * @interface: interface mode to be used 1107 * @advertising: adertisement ethtool link mode mask 1108 * 1109 * Determines the negotiation mode to be used by the PCS, and returns 1110 * one of: 1111 * 1112 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1113 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1114 * will be used. 1115 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1116 * disabled 1117 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1118 * 1119 * Note: this is for cases where the PCS itself is involved in negotiation 1120 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1121 */ 1122 static unsigned int phylink_pcs_neg_mode(unsigned int mode, 1123 phy_interface_t interface, 1124 const unsigned long *advertising) 1125 { 1126 unsigned int neg_mode; 1127 1128 switch (interface) { 1129 case PHY_INTERFACE_MODE_SGMII: 1130 case PHY_INTERFACE_MODE_QSGMII: 1131 case PHY_INTERFACE_MODE_QUSGMII: 1132 case PHY_INTERFACE_MODE_USXGMII: 1133 case PHY_INTERFACE_MODE_10G_QXGMII: 1134 /* These protocols are designed for use with a PHY which 1135 * communicates its negotiation result back to the MAC via 1136 * inband communication. Note: there exist PHYs that run 1137 * with SGMII but do not send the inband data. 1138 */ 1139 if (!phylink_autoneg_inband(mode)) 1140 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1141 else 1142 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1143 break; 1144 1145 case PHY_INTERFACE_MODE_1000BASEX: 1146 case PHY_INTERFACE_MODE_2500BASEX: 1147 /* 1000base-X is designed for use media-side for Fibre 1148 * connections, and thus the Autoneg bit needs to be 1149 * taken into account. We also do this for 2500base-X 1150 * as well, but drivers may not support this, so may 1151 * need to override this. 1152 */ 1153 if (!phylink_autoneg_inband(mode)) 1154 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1155 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1156 advertising)) 1157 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1158 else 1159 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1160 break; 1161 1162 default: 1163 neg_mode = PHYLINK_PCS_NEG_NONE; 1164 break; 1165 } 1166 1167 return neg_mode; 1168 } 1169 1170 static void phylink_major_config(struct phylink *pl, bool restart, 1171 const struct phylink_link_state *state) 1172 { 1173 struct phylink_pcs *pcs = NULL; 1174 bool pcs_changed = false; 1175 unsigned int rate_kbd; 1176 unsigned int neg_mode; 1177 int err; 1178 1179 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1180 1181 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1182 state->interface, 1183 state->advertising); 1184 1185 if (pl->using_mac_select_pcs) { 1186 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1187 if (IS_ERR(pcs)) { 1188 phylink_err(pl, 1189 "mac_select_pcs unexpectedly failed: %pe\n", 1190 pcs); 1191 return; 1192 } 1193 1194 pcs_changed = pcs && pl->pcs != pcs; 1195 } 1196 1197 phylink_pcs_poll_stop(pl); 1198 1199 if (pl->mac_ops->mac_prepare) { 1200 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1201 state->interface); 1202 if (err < 0) { 1203 phylink_err(pl, "mac_prepare failed: %pe\n", 1204 ERR_PTR(err)); 1205 return; 1206 } 1207 } 1208 1209 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1210 * for the change. 1211 */ 1212 if (pcs_changed) { 1213 phylink_pcs_disable(pl->pcs); 1214 1215 if (pl->pcs) 1216 pl->pcs->phylink = NULL; 1217 1218 pcs->phylink = pl; 1219 1220 pl->pcs = pcs; 1221 } 1222 1223 if (pl->pcs) 1224 phylink_pcs_pre_config(pl->pcs, state->interface); 1225 1226 phylink_mac_config(pl, state); 1227 1228 if (pl->pcs) 1229 phylink_pcs_post_config(pl->pcs, state->interface); 1230 1231 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1232 phylink_pcs_enable(pl->pcs); 1233 1234 neg_mode = pl->cur_link_an_mode; 1235 if (pl->pcs && pl->pcs->neg_mode) 1236 neg_mode = pl->pcs_neg_mode; 1237 1238 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1239 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1240 if (err < 0) 1241 phylink_err(pl, "pcs_config failed: %pe\n", 1242 ERR_PTR(err)); 1243 else if (err > 0) 1244 restart = true; 1245 1246 if (restart) 1247 phylink_pcs_an_restart(pl); 1248 1249 if (pl->mac_ops->mac_finish) { 1250 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1251 state->interface); 1252 if (err < 0) 1253 phylink_err(pl, "mac_finish failed: %pe\n", 1254 ERR_PTR(err)); 1255 } 1256 1257 if (pl->sfp_bus) { 1258 rate_kbd = phylink_interface_signal_rate(state->interface); 1259 if (rate_kbd) 1260 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1261 } 1262 1263 phylink_pcs_poll_start(pl); 1264 } 1265 1266 /* 1267 * Reconfigure for a change of inband advertisement. 1268 * If we have a separate PCS, we only need to call its pcs_config() method, 1269 * and then restart AN if it indicates something changed. Otherwise, we do 1270 * the full MAC reconfiguration. 1271 */ 1272 static int phylink_change_inband_advert(struct phylink *pl) 1273 { 1274 unsigned int neg_mode; 1275 int ret; 1276 1277 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1278 return 0; 1279 1280 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1281 phylink_an_mode_str(pl->cur_link_an_mode), 1282 phy_modes(pl->link_config.interface), 1283 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1284 pl->link_config.pause); 1285 1286 /* Recompute the PCS neg mode */ 1287 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1288 pl->link_config.interface, 1289 pl->link_config.advertising); 1290 1291 neg_mode = pl->cur_link_an_mode; 1292 if (pl->pcs->neg_mode) 1293 neg_mode = pl->pcs_neg_mode; 1294 1295 /* Modern PCS-based method; update the advert at the PCS, and 1296 * restart negotiation if the pcs_config() helper indicates that 1297 * the programmed advertisement has changed. 1298 */ 1299 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1300 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1301 if (ret < 0) 1302 return ret; 1303 1304 if (ret > 0) 1305 phylink_pcs_an_restart(pl); 1306 1307 return 0; 1308 } 1309 1310 static void phylink_mac_pcs_get_state(struct phylink *pl, 1311 struct phylink_link_state *state) 1312 { 1313 linkmode_copy(state->advertising, pl->link_config.advertising); 1314 linkmode_zero(state->lp_advertising); 1315 state->interface = pl->link_config.interface; 1316 state->rate_matching = pl->link_config.rate_matching; 1317 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1318 state->advertising)) { 1319 state->speed = SPEED_UNKNOWN; 1320 state->duplex = DUPLEX_UNKNOWN; 1321 state->pause = MLO_PAUSE_NONE; 1322 } else { 1323 state->speed = pl->link_config.speed; 1324 state->duplex = pl->link_config.duplex; 1325 state->pause = pl->link_config.pause; 1326 } 1327 state->an_complete = 0; 1328 state->link = 1; 1329 1330 if (pl->pcs) 1331 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1332 else 1333 state->link = 0; 1334 } 1335 1336 /* The fixed state is... fixed except for the link state, 1337 * which may be determined by a GPIO or a callback. 1338 */ 1339 static void phylink_get_fixed_state(struct phylink *pl, 1340 struct phylink_link_state *state) 1341 { 1342 *state = pl->link_config; 1343 if (pl->config->get_fixed_state) 1344 pl->config->get_fixed_state(pl->config, state); 1345 else if (pl->link_gpio) 1346 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1347 1348 state->pause = MLO_PAUSE_NONE; 1349 phylink_resolve_an_pause(state); 1350 } 1351 1352 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1353 { 1354 struct phylink_link_state link_state; 1355 1356 switch (pl->cur_link_an_mode) { 1357 case MLO_AN_PHY: 1358 link_state = pl->phy_state; 1359 break; 1360 1361 case MLO_AN_FIXED: 1362 phylink_get_fixed_state(pl, &link_state); 1363 break; 1364 1365 case MLO_AN_INBAND: 1366 link_state = pl->link_config; 1367 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1368 link_state.pause = MLO_PAUSE_NONE; 1369 break; 1370 1371 default: /* can't happen */ 1372 return; 1373 } 1374 1375 link_state.link = false; 1376 1377 phylink_apply_manual_flow(pl, &link_state); 1378 phylink_major_config(pl, force_restart, &link_state); 1379 } 1380 1381 static const char *phylink_pause_to_str(int pause) 1382 { 1383 switch (pause & MLO_PAUSE_TXRX_MASK) { 1384 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1385 return "rx/tx"; 1386 case MLO_PAUSE_TX: 1387 return "tx"; 1388 case MLO_PAUSE_RX: 1389 return "rx"; 1390 default: 1391 return "off"; 1392 } 1393 } 1394 1395 static void phylink_link_up(struct phylink *pl, 1396 struct phylink_link_state link_state) 1397 { 1398 struct net_device *ndev = pl->netdev; 1399 unsigned int neg_mode; 1400 int speed, duplex; 1401 bool rx_pause; 1402 1403 speed = link_state.speed; 1404 duplex = link_state.duplex; 1405 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1406 1407 switch (link_state.rate_matching) { 1408 case RATE_MATCH_PAUSE: 1409 /* The PHY is doing rate matchion from the media rate (in 1410 * the link_state) to the interface speed, and will send 1411 * pause frames to the MAC to limit its transmission speed. 1412 */ 1413 speed = phylink_interface_max_speed(link_state.interface); 1414 duplex = DUPLEX_FULL; 1415 rx_pause = true; 1416 break; 1417 1418 case RATE_MATCH_CRS: 1419 /* The PHY is doing rate matchion from the media rate (in 1420 * the link_state) to the interface speed, and will cause 1421 * collisions to the MAC to limit its transmission speed. 1422 */ 1423 speed = phylink_interface_max_speed(link_state.interface); 1424 duplex = DUPLEX_HALF; 1425 break; 1426 } 1427 1428 pl->cur_interface = link_state.interface; 1429 1430 neg_mode = pl->cur_link_an_mode; 1431 if (pl->pcs && pl->pcs->neg_mode) 1432 neg_mode = pl->pcs_neg_mode; 1433 1434 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1435 duplex); 1436 1437 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1438 pl->cur_interface, speed, duplex, 1439 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1440 1441 if (ndev) 1442 netif_carrier_on(ndev); 1443 1444 phylink_info(pl, 1445 "Link is Up - %s/%s - flow control %s\n", 1446 phy_speed_to_str(link_state.speed), 1447 phy_duplex_to_str(link_state.duplex), 1448 phylink_pause_to_str(link_state.pause)); 1449 } 1450 1451 static void phylink_link_down(struct phylink *pl) 1452 { 1453 struct net_device *ndev = pl->netdev; 1454 1455 if (ndev) 1456 netif_carrier_off(ndev); 1457 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1458 pl->cur_interface); 1459 phylink_info(pl, "Link is Down\n"); 1460 } 1461 1462 static void phylink_resolve(struct work_struct *w) 1463 { 1464 struct phylink *pl = container_of(w, struct phylink, resolve); 1465 struct phylink_link_state link_state; 1466 struct net_device *ndev = pl->netdev; 1467 bool mac_config = false; 1468 bool retrigger = false; 1469 bool cur_link_state; 1470 1471 mutex_lock(&pl->state_mutex); 1472 if (pl->netdev) 1473 cur_link_state = netif_carrier_ok(ndev); 1474 else 1475 cur_link_state = pl->old_link_state; 1476 1477 if (pl->phylink_disable_state) { 1478 pl->mac_link_dropped = false; 1479 link_state.link = false; 1480 } else if (pl->mac_link_dropped) { 1481 link_state.link = false; 1482 retrigger = true; 1483 } else { 1484 switch (pl->cur_link_an_mode) { 1485 case MLO_AN_PHY: 1486 link_state = pl->phy_state; 1487 phylink_apply_manual_flow(pl, &link_state); 1488 mac_config = link_state.link; 1489 break; 1490 1491 case MLO_AN_FIXED: 1492 phylink_get_fixed_state(pl, &link_state); 1493 mac_config = link_state.link; 1494 break; 1495 1496 case MLO_AN_INBAND: 1497 phylink_mac_pcs_get_state(pl, &link_state); 1498 1499 /* The PCS may have a latching link-fail indicator. 1500 * If the link was up, bring the link down and 1501 * re-trigger the resolve. Otherwise, re-read the 1502 * PCS state to get the current status of the link. 1503 */ 1504 if (!link_state.link) { 1505 if (cur_link_state) 1506 retrigger = true; 1507 else 1508 phylink_mac_pcs_get_state(pl, 1509 &link_state); 1510 } 1511 1512 /* If we have a phy, the "up" state is the union of 1513 * both the PHY and the MAC 1514 */ 1515 if (pl->phydev) 1516 link_state.link &= pl->phy_state.link; 1517 1518 /* Only update if the PHY link is up */ 1519 if (pl->phydev && pl->phy_state.link) { 1520 /* If the interface has changed, force a 1521 * link down event if the link isn't already 1522 * down, and re-resolve. 1523 */ 1524 if (link_state.interface != 1525 pl->phy_state.interface) { 1526 retrigger = true; 1527 link_state.link = false; 1528 } 1529 link_state.interface = pl->phy_state.interface; 1530 1531 /* If we are doing rate matching, then the 1532 * link speed/duplex comes from the PHY 1533 */ 1534 if (pl->phy_state.rate_matching) { 1535 link_state.rate_matching = 1536 pl->phy_state.rate_matching; 1537 link_state.speed = pl->phy_state.speed; 1538 link_state.duplex = 1539 pl->phy_state.duplex; 1540 } 1541 1542 /* If we have a PHY, we need to update with 1543 * the PHY flow control bits. 1544 */ 1545 link_state.pause = pl->phy_state.pause; 1546 mac_config = true; 1547 } 1548 phylink_apply_manual_flow(pl, &link_state); 1549 break; 1550 } 1551 } 1552 1553 if (mac_config) { 1554 if (link_state.interface != pl->link_config.interface) { 1555 /* The interface has changed, force the link down and 1556 * then reconfigure. 1557 */ 1558 if (cur_link_state) { 1559 phylink_link_down(pl); 1560 cur_link_state = false; 1561 } 1562 phylink_major_config(pl, false, &link_state); 1563 pl->link_config.interface = link_state.interface; 1564 } 1565 } 1566 1567 if (link_state.link != cur_link_state) { 1568 pl->old_link_state = link_state.link; 1569 if (!link_state.link) 1570 phylink_link_down(pl); 1571 else 1572 phylink_link_up(pl, link_state); 1573 } 1574 if (!link_state.link && retrigger) { 1575 pl->mac_link_dropped = false; 1576 queue_work(system_power_efficient_wq, &pl->resolve); 1577 } 1578 mutex_unlock(&pl->state_mutex); 1579 } 1580 1581 static void phylink_run_resolve(struct phylink *pl) 1582 { 1583 if (!pl->phylink_disable_state) 1584 queue_work(system_power_efficient_wq, &pl->resolve); 1585 } 1586 1587 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1588 { 1589 unsigned long state = pl->phylink_disable_state; 1590 1591 set_bit(bit, &pl->phylink_disable_state); 1592 if (state == 0) { 1593 queue_work(system_power_efficient_wq, &pl->resolve); 1594 flush_work(&pl->resolve); 1595 } 1596 } 1597 1598 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1599 { 1600 clear_bit(bit, &pl->phylink_disable_state); 1601 phylink_run_resolve(pl); 1602 } 1603 1604 static void phylink_fixed_poll(struct timer_list *t) 1605 { 1606 struct phylink *pl = container_of(t, struct phylink, link_poll); 1607 1608 mod_timer(t, jiffies + HZ); 1609 1610 phylink_run_resolve(pl); 1611 } 1612 1613 static const struct sfp_upstream_ops sfp_phylink_ops; 1614 1615 static int phylink_register_sfp(struct phylink *pl, 1616 const struct fwnode_handle *fwnode) 1617 { 1618 struct sfp_bus *bus; 1619 int ret; 1620 1621 if (!fwnode) 1622 return 0; 1623 1624 bus = sfp_bus_find_fwnode(fwnode); 1625 if (IS_ERR(bus)) { 1626 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1627 return PTR_ERR(bus); 1628 } 1629 1630 pl->sfp_bus = bus; 1631 1632 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1633 sfp_bus_put(bus); 1634 1635 return ret; 1636 } 1637 1638 /** 1639 * phylink_create() - create a phylink instance 1640 * @config: a pointer to the target &struct phylink_config 1641 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1642 * interface 1643 * @iface: the desired link mode defined by &typedef phy_interface_t 1644 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1645 * 1646 * Create a new phylink instance, and parse the link parameters found in @np. 1647 * This will parse in-band modes, fixed-link or SFP configuration. 1648 * 1649 * Note: the rtnl lock must not be held when calling this function. 1650 * 1651 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1652 * must use IS_ERR() to check for errors from this function. 1653 */ 1654 struct phylink *phylink_create(struct phylink_config *config, 1655 const struct fwnode_handle *fwnode, 1656 phy_interface_t iface, 1657 const struct phylink_mac_ops *mac_ops) 1658 { 1659 bool using_mac_select_pcs = false; 1660 struct phylink *pl; 1661 int ret; 1662 1663 /* Validate the supplied configuration */ 1664 if (phy_interface_empty(config->supported_interfaces)) { 1665 dev_err(config->dev, 1666 "phylink: error: empty supported_interfaces\n"); 1667 return ERR_PTR(-EINVAL); 1668 } 1669 1670 if (mac_ops->mac_select_pcs && 1671 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1672 ERR_PTR(-EOPNOTSUPP)) 1673 using_mac_select_pcs = true; 1674 1675 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1676 if (!pl) 1677 return ERR_PTR(-ENOMEM); 1678 1679 mutex_init(&pl->state_mutex); 1680 INIT_WORK(&pl->resolve, phylink_resolve); 1681 1682 pl->config = config; 1683 if (config->type == PHYLINK_NETDEV) { 1684 pl->netdev = to_net_dev(config->dev); 1685 netif_carrier_off(pl->netdev); 1686 } else if (config->type == PHYLINK_DEV) { 1687 pl->dev = config->dev; 1688 } else { 1689 kfree(pl); 1690 return ERR_PTR(-EINVAL); 1691 } 1692 1693 pl->using_mac_select_pcs = using_mac_select_pcs; 1694 pl->phy_state.interface = iface; 1695 pl->link_interface = iface; 1696 if (iface == PHY_INTERFACE_MODE_MOCA) 1697 pl->link_port = PORT_BNC; 1698 else 1699 pl->link_port = PORT_MII; 1700 pl->link_config.interface = iface; 1701 pl->link_config.pause = MLO_PAUSE_AN; 1702 pl->link_config.speed = SPEED_UNKNOWN; 1703 pl->link_config.duplex = DUPLEX_UNKNOWN; 1704 pl->pcs_state = PCS_STATE_DOWN; 1705 pl->mac_ops = mac_ops; 1706 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1707 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1708 1709 linkmode_fill(pl->supported); 1710 linkmode_copy(pl->link_config.advertising, pl->supported); 1711 phylink_validate(pl, pl->supported, &pl->link_config); 1712 1713 ret = phylink_parse_mode(pl, fwnode); 1714 if (ret < 0) { 1715 kfree(pl); 1716 return ERR_PTR(ret); 1717 } 1718 1719 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1720 ret = phylink_parse_fixedlink(pl, fwnode); 1721 if (ret < 0) { 1722 kfree(pl); 1723 return ERR_PTR(ret); 1724 } 1725 } 1726 1727 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1728 1729 ret = phylink_register_sfp(pl, fwnode); 1730 if (ret < 0) { 1731 kfree(pl); 1732 return ERR_PTR(ret); 1733 } 1734 1735 return pl; 1736 } 1737 EXPORT_SYMBOL_GPL(phylink_create); 1738 1739 /** 1740 * phylink_destroy() - cleanup and destroy the phylink instance 1741 * @pl: a pointer to a &struct phylink returned from phylink_create() 1742 * 1743 * Destroy a phylink instance. Any PHY that has been attached must have been 1744 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1745 * 1746 * Note: the rtnl lock must not be held when calling this function. 1747 */ 1748 void phylink_destroy(struct phylink *pl) 1749 { 1750 sfp_bus_del_upstream(pl->sfp_bus); 1751 if (pl->link_gpio) 1752 gpiod_put(pl->link_gpio); 1753 1754 cancel_work_sync(&pl->resolve); 1755 kfree(pl); 1756 } 1757 EXPORT_SYMBOL_GPL(phylink_destroy); 1758 1759 /** 1760 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1761 * @pl: a pointer to a &struct phylink returned from phylink_create() 1762 * 1763 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1764 * no PHY is needed. 1765 * 1766 * Returns true if phylink will be expecting a PHY. 1767 */ 1768 bool phylink_expects_phy(struct phylink *pl) 1769 { 1770 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1771 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1772 phy_interface_mode_is_8023z(pl->link_config.interface))) 1773 return false; 1774 return true; 1775 } 1776 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1777 1778 static void phylink_phy_change(struct phy_device *phydev, bool up) 1779 { 1780 struct phylink *pl = phydev->phylink; 1781 bool tx_pause, rx_pause; 1782 1783 phy_get_pause(phydev, &tx_pause, &rx_pause); 1784 1785 mutex_lock(&pl->state_mutex); 1786 pl->phy_state.speed = phydev->speed; 1787 pl->phy_state.duplex = phydev->duplex; 1788 pl->phy_state.rate_matching = phydev->rate_matching; 1789 pl->phy_state.pause = MLO_PAUSE_NONE; 1790 if (tx_pause) 1791 pl->phy_state.pause |= MLO_PAUSE_TX; 1792 if (rx_pause) 1793 pl->phy_state.pause |= MLO_PAUSE_RX; 1794 pl->phy_state.interface = phydev->interface; 1795 pl->phy_state.link = up; 1796 mutex_unlock(&pl->state_mutex); 1797 1798 phylink_run_resolve(pl); 1799 1800 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1801 phy_modes(phydev->interface), 1802 phy_speed_to_str(phydev->speed), 1803 phy_duplex_to_str(phydev->duplex), 1804 phy_rate_matching_to_str(phydev->rate_matching), 1805 phylink_pause_to_str(pl->phy_state.pause)); 1806 } 1807 1808 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 1809 unsigned long *supported, 1810 struct phylink_link_state *state) 1811 { 1812 DECLARE_PHY_INTERFACE_MASK(interfaces); 1813 1814 /* If the PHY provides a bitmap of the interfaces it will be using 1815 * depending on the negotiated media speeds, use this to validate 1816 * which ethtool link modes can be used. 1817 */ 1818 if (!phy_interface_empty(phy->possible_interfaces)) { 1819 /* We only care about the union of the PHY's interfaces and 1820 * those which the host supports. 1821 */ 1822 phy_interface_and(interfaces, phy->possible_interfaces, 1823 pl->config->supported_interfaces); 1824 1825 if (phy_interface_empty(interfaces)) { 1826 phylink_err(pl, "PHY has no common interfaces\n"); 1827 return -EINVAL; 1828 } 1829 1830 if (phy_on_sfp(phy)) { 1831 /* If the PHY is on a SFP, limit the interfaces to 1832 * those that can be used with a SFP module. 1833 */ 1834 phy_interface_and(interfaces, interfaces, 1835 phylink_sfp_interfaces); 1836 1837 if (phy_interface_empty(interfaces)) { 1838 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 1839 return -EINVAL; 1840 } 1841 } 1842 1843 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 1844 phydev_name(phy), 1845 (int)PHY_INTERFACE_MODE_MAX, 1846 phy->possible_interfaces, 1847 (int)PHY_INTERFACE_MODE_MAX, interfaces); 1848 1849 return phylink_validate_mask(pl, phy, supported, state, 1850 interfaces); 1851 } 1852 1853 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 1854 phydev_name(phy)); 1855 1856 /* Check whether we would use rate matching for the proposed interface 1857 * mode. 1858 */ 1859 state->rate_matching = phy_get_rate_matching(phy, state->interface); 1860 1861 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1862 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1863 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1864 * their Serdes is either unnecessary or not reasonable. 1865 * 1866 * For these which switch interface modes, we really need to know which 1867 * interface modes the PHY supports to properly work out which ethtool 1868 * linkmodes can be supported. For now, as a work-around, we validate 1869 * against all interface modes, which may lead to more ethtool link 1870 * modes being advertised than are actually supported. 1871 */ 1872 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 1873 state->interface != PHY_INTERFACE_MODE_RXAUI && 1874 state->interface != PHY_INTERFACE_MODE_XAUI && 1875 state->interface != PHY_INTERFACE_MODE_USXGMII) 1876 state->interface = PHY_INTERFACE_MODE_NA; 1877 1878 return phylink_validate(pl, supported, state); 1879 } 1880 1881 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1882 phy_interface_t interface) 1883 { 1884 struct phylink_link_state config; 1885 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1886 char *irq_str; 1887 int ret; 1888 1889 /* 1890 * This is the new way of dealing with flow control for PHYs, 1891 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1892 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1893 * using our validate call to the MAC, we rely upon the MAC 1894 * clearing the bits from both supported and advertising fields. 1895 */ 1896 phy_support_asym_pause(phy); 1897 1898 memset(&config, 0, sizeof(config)); 1899 linkmode_copy(supported, phy->supported); 1900 linkmode_copy(config.advertising, phy->advertising); 1901 config.interface = interface; 1902 1903 ret = phylink_validate_phy(pl, phy, supported, &config); 1904 if (ret) { 1905 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1906 phy_modes(config.interface), 1907 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1908 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1909 ERR_PTR(ret)); 1910 return ret; 1911 } 1912 1913 phy->phylink = pl; 1914 phy->phy_link_change = phylink_phy_change; 1915 1916 irq_str = phy_attached_info_irq(phy); 1917 phylink_info(pl, 1918 "PHY [%s] driver [%s] (irq=%s)\n", 1919 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1920 kfree(irq_str); 1921 1922 mutex_lock(&phy->lock); 1923 mutex_lock(&pl->state_mutex); 1924 pl->phydev = phy; 1925 pl->phy_state.interface = interface; 1926 pl->phy_state.pause = MLO_PAUSE_NONE; 1927 pl->phy_state.speed = SPEED_UNKNOWN; 1928 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1929 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1930 linkmode_copy(pl->supported, supported); 1931 linkmode_copy(pl->link_config.advertising, config.advertising); 1932 1933 /* Restrict the phy advertisement according to the MAC support. */ 1934 linkmode_copy(phy->advertising, config.advertising); 1935 mutex_unlock(&pl->state_mutex); 1936 mutex_unlock(&phy->lock); 1937 1938 phylink_dbg(pl, 1939 "phy: %s setting supported %*pb advertising %*pb\n", 1940 phy_modes(interface), 1941 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1942 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1943 1944 if (phy_interrupt_is_valid(phy)) 1945 phy_request_interrupt(phy); 1946 1947 if (pl->config->mac_managed_pm) 1948 phy->mac_managed_pm = true; 1949 1950 return 0; 1951 } 1952 1953 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1954 phy_interface_t interface) 1955 { 1956 u32 flags = 0; 1957 1958 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1959 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1960 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1961 return -EINVAL; 1962 1963 if (pl->phydev) 1964 return -EBUSY; 1965 1966 if (pl->config->mac_requires_rxc) 1967 flags |= PHY_F_RXC_ALWAYS_ON; 1968 1969 return phy_attach_direct(pl->netdev, phy, flags, interface); 1970 } 1971 1972 /** 1973 * phylink_connect_phy() - connect a PHY to the phylink instance 1974 * @pl: a pointer to a &struct phylink returned from phylink_create() 1975 * @phy: a pointer to a &struct phy_device. 1976 * 1977 * Connect @phy to the phylink instance specified by @pl by calling 1978 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1979 * capabilities, start the PHYLIB state machine and enable any interrupts 1980 * that the PHY supports. 1981 * 1982 * This updates the phylink's ethtool supported and advertising link mode 1983 * masks. 1984 * 1985 * Returns 0 on success or a negative errno. 1986 */ 1987 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1988 { 1989 int ret; 1990 1991 /* Use PHY device/driver interface */ 1992 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1993 pl->link_interface = phy->interface; 1994 pl->link_config.interface = pl->link_interface; 1995 } 1996 1997 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1998 if (ret < 0) 1999 return ret; 2000 2001 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2002 if (ret) 2003 phy_detach(phy); 2004 2005 return ret; 2006 } 2007 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2008 2009 /** 2010 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2011 * @pl: a pointer to a &struct phylink returned from phylink_create() 2012 * @dn: a pointer to a &struct device_node. 2013 * @flags: PHY-specific flags to communicate to the PHY device driver 2014 * 2015 * Connect the phy specified in the device node @dn to the phylink instance 2016 * specified by @pl. Actions specified in phylink_connect_phy() will be 2017 * performed. 2018 * 2019 * Returns 0 on success or a negative errno. 2020 */ 2021 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2022 u32 flags) 2023 { 2024 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2025 } 2026 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2027 2028 /** 2029 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2030 * @pl: a pointer to a &struct phylink returned from phylink_create() 2031 * @fwnode: a pointer to a &struct fwnode_handle. 2032 * @flags: PHY-specific flags to communicate to the PHY device driver 2033 * 2034 * Connect the phy specified @fwnode to the phylink instance specified 2035 * by @pl. 2036 * 2037 * Returns 0 on success or a negative errno. 2038 */ 2039 int phylink_fwnode_phy_connect(struct phylink *pl, 2040 const struct fwnode_handle *fwnode, 2041 u32 flags) 2042 { 2043 struct fwnode_handle *phy_fwnode; 2044 struct phy_device *phy_dev; 2045 int ret; 2046 2047 /* Fixed links and 802.3z are handled without needing a PHY */ 2048 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2049 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2050 phy_interface_mode_is_8023z(pl->link_interface))) 2051 return 0; 2052 2053 phy_fwnode = fwnode_get_phy_node(fwnode); 2054 if (IS_ERR(phy_fwnode)) { 2055 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2056 return -ENODEV; 2057 return 0; 2058 } 2059 2060 phy_dev = fwnode_phy_find_device(phy_fwnode); 2061 /* We're done with the phy_node handle */ 2062 fwnode_handle_put(phy_fwnode); 2063 if (!phy_dev) 2064 return -ENODEV; 2065 2066 /* Use PHY device/driver interface */ 2067 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2068 pl->link_interface = phy_dev->interface; 2069 pl->link_config.interface = pl->link_interface; 2070 } 2071 2072 if (pl->config->mac_requires_rxc) 2073 flags |= PHY_F_RXC_ALWAYS_ON; 2074 2075 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2076 pl->link_interface); 2077 phy_device_free(phy_dev); 2078 if (ret) 2079 return ret; 2080 2081 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2082 if (ret) 2083 phy_detach(phy_dev); 2084 2085 return ret; 2086 } 2087 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2088 2089 /** 2090 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2091 * instance. 2092 * @pl: a pointer to a &struct phylink returned from phylink_create() 2093 * 2094 * Disconnect any current PHY from the phylink instance described by @pl. 2095 */ 2096 void phylink_disconnect_phy(struct phylink *pl) 2097 { 2098 struct phy_device *phy; 2099 2100 ASSERT_RTNL(); 2101 2102 phy = pl->phydev; 2103 if (phy) { 2104 mutex_lock(&phy->lock); 2105 mutex_lock(&pl->state_mutex); 2106 pl->phydev = NULL; 2107 mutex_unlock(&pl->state_mutex); 2108 mutex_unlock(&phy->lock); 2109 flush_work(&pl->resolve); 2110 2111 phy_disconnect(phy); 2112 } 2113 } 2114 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2115 2116 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2117 { 2118 if (!up) 2119 pl->mac_link_dropped = true; 2120 phylink_run_resolve(pl); 2121 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2122 } 2123 2124 /** 2125 * phylink_mac_change() - notify phylink of a change in MAC state 2126 * @pl: a pointer to a &struct phylink returned from phylink_create() 2127 * @up: indicates whether the link is currently up. 2128 * 2129 * The MAC driver should call this driver when the state of its link 2130 * changes (eg, link failure, new negotiation results, etc.) 2131 */ 2132 void phylink_mac_change(struct phylink *pl, bool up) 2133 { 2134 phylink_link_changed(pl, up, "mac"); 2135 } 2136 EXPORT_SYMBOL_GPL(phylink_mac_change); 2137 2138 /** 2139 * phylink_pcs_change() - notify phylink of a change to PCS link state 2140 * @pcs: pointer to &struct phylink_pcs 2141 * @up: indicates whether the link is currently up. 2142 * 2143 * The PCS driver should call this when the state of its link changes 2144 * (e.g. link failure, new negotiation results, etc.) Note: it should 2145 * not determine "up" by reading the BMSR. If in doubt about the link 2146 * state at interrupt time, then pass true if pcs_get_state() returns 2147 * the latched link-down state, otherwise pass false. 2148 */ 2149 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2150 { 2151 struct phylink *pl = pcs->phylink; 2152 2153 if (pl) 2154 phylink_link_changed(pl, up, "pcs"); 2155 } 2156 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2157 2158 static irqreturn_t phylink_link_handler(int irq, void *data) 2159 { 2160 struct phylink *pl = data; 2161 2162 phylink_run_resolve(pl); 2163 2164 return IRQ_HANDLED; 2165 } 2166 2167 /** 2168 * phylink_start() - start a phylink instance 2169 * @pl: a pointer to a &struct phylink returned from phylink_create() 2170 * 2171 * Start the phylink instance specified by @pl, configuring the MAC for the 2172 * desired link mode(s) and negotiation style. This should be called from the 2173 * network device driver's &struct net_device_ops ndo_open() method. 2174 */ 2175 void phylink_start(struct phylink *pl) 2176 { 2177 bool poll = false; 2178 2179 ASSERT_RTNL(); 2180 2181 phylink_info(pl, "configuring for %s/%s link mode\n", 2182 phylink_an_mode_str(pl->cur_link_an_mode), 2183 phy_modes(pl->link_config.interface)); 2184 2185 /* Always set the carrier off */ 2186 if (pl->netdev) 2187 netif_carrier_off(pl->netdev); 2188 2189 pl->pcs_state = PCS_STATE_STARTING; 2190 2191 /* Apply the link configuration to the MAC when starting. This allows 2192 * a fixed-link to start with the correct parameters, and also 2193 * ensures that we set the appropriate advertisement for Serdes links. 2194 * 2195 * Restart autonegotiation if using 802.3z to ensure that the link 2196 * parameters are properly negotiated. This is necessary for DSA 2197 * switches using 802.3z negotiation to ensure they see our modes. 2198 */ 2199 phylink_mac_initial_config(pl, true); 2200 2201 pl->pcs_state = PCS_STATE_STARTED; 2202 2203 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2204 2205 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2206 int irq = gpiod_to_irq(pl->link_gpio); 2207 2208 if (irq > 0) { 2209 if (!request_irq(irq, phylink_link_handler, 2210 IRQF_TRIGGER_RISING | 2211 IRQF_TRIGGER_FALLING, 2212 "netdev link", pl)) 2213 pl->link_irq = irq; 2214 else 2215 irq = 0; 2216 } 2217 if (irq <= 0) 2218 poll = true; 2219 } 2220 2221 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2222 poll |= pl->config->poll_fixed_state; 2223 2224 if (poll) 2225 mod_timer(&pl->link_poll, jiffies + HZ); 2226 if (pl->phydev) 2227 phy_start(pl->phydev); 2228 if (pl->sfp_bus) 2229 sfp_upstream_start(pl->sfp_bus); 2230 } 2231 EXPORT_SYMBOL_GPL(phylink_start); 2232 2233 /** 2234 * phylink_stop() - stop a phylink instance 2235 * @pl: a pointer to a &struct phylink returned from phylink_create() 2236 * 2237 * Stop the phylink instance specified by @pl. This should be called from the 2238 * network device driver's &struct net_device_ops ndo_stop() method. The 2239 * network device's carrier state should not be changed prior to calling this 2240 * function. 2241 * 2242 * This will synchronously bring down the link if the link is not already 2243 * down (in other words, it will trigger a mac_link_down() method call.) 2244 */ 2245 void phylink_stop(struct phylink *pl) 2246 { 2247 ASSERT_RTNL(); 2248 2249 if (pl->sfp_bus) 2250 sfp_upstream_stop(pl->sfp_bus); 2251 if (pl->phydev) 2252 phy_stop(pl->phydev); 2253 del_timer_sync(&pl->link_poll); 2254 if (pl->link_irq) { 2255 free_irq(pl->link_irq, pl); 2256 pl->link_irq = 0; 2257 } 2258 2259 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2260 2261 pl->pcs_state = PCS_STATE_DOWN; 2262 2263 phylink_pcs_disable(pl->pcs); 2264 } 2265 EXPORT_SYMBOL_GPL(phylink_stop); 2266 2267 /** 2268 * phylink_suspend() - handle a network device suspend event 2269 * @pl: a pointer to a &struct phylink returned from phylink_create() 2270 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2271 * 2272 * Handle a network device suspend event. There are several cases: 2273 * 2274 * - If Wake-on-Lan is not active, we can bring down the link between 2275 * the MAC and PHY by calling phylink_stop(). 2276 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2277 * can also bring down the link between the MAC and PHY. 2278 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2279 * still needs to receive packets, so we can not bring the link down. 2280 */ 2281 void phylink_suspend(struct phylink *pl, bool mac_wol) 2282 { 2283 ASSERT_RTNL(); 2284 2285 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2286 /* Wake-on-Lan enabled, MAC handling */ 2287 mutex_lock(&pl->state_mutex); 2288 2289 /* Stop the resolver bringing the link up */ 2290 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2291 2292 /* Disable the carrier, to prevent transmit timeouts, 2293 * but one would hope all packets have been sent. This 2294 * also means phylink_resolve() will do nothing. 2295 */ 2296 if (pl->netdev) 2297 netif_carrier_off(pl->netdev); 2298 else 2299 pl->old_link_state = false; 2300 2301 /* We do not call mac_link_down() here as we want the 2302 * link to remain up to receive the WoL packets. 2303 */ 2304 mutex_unlock(&pl->state_mutex); 2305 } else { 2306 phylink_stop(pl); 2307 } 2308 } 2309 EXPORT_SYMBOL_GPL(phylink_suspend); 2310 2311 /** 2312 * phylink_resume() - handle a network device resume event 2313 * @pl: a pointer to a &struct phylink returned from phylink_create() 2314 * 2315 * Undo the effects of phylink_suspend(), returning the link to an 2316 * operational state. 2317 */ 2318 void phylink_resume(struct phylink *pl) 2319 { 2320 ASSERT_RTNL(); 2321 2322 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2323 /* Wake-on-Lan enabled, MAC handling */ 2324 2325 /* Call mac_link_down() so we keep the overall state balanced. 2326 * Do this under the state_mutex lock for consistency. This 2327 * will cause a "Link Down" message to be printed during 2328 * resume, which is harmless - the true link state will be 2329 * printed when we run a resolve. 2330 */ 2331 mutex_lock(&pl->state_mutex); 2332 phylink_link_down(pl); 2333 mutex_unlock(&pl->state_mutex); 2334 2335 /* Re-apply the link parameters so that all the settings get 2336 * restored to the MAC. 2337 */ 2338 phylink_mac_initial_config(pl, true); 2339 2340 /* Re-enable and re-resolve the link parameters */ 2341 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2342 } else { 2343 phylink_start(pl); 2344 } 2345 } 2346 EXPORT_SYMBOL_GPL(phylink_resume); 2347 2348 /** 2349 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2350 * @pl: a pointer to a &struct phylink returned from phylink_create() 2351 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2352 * 2353 * Read the wake on lan parameters from the PHY attached to the phylink 2354 * instance specified by @pl. If no PHY is currently attached, report no 2355 * support for wake on lan. 2356 */ 2357 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2358 { 2359 ASSERT_RTNL(); 2360 2361 wol->supported = 0; 2362 wol->wolopts = 0; 2363 2364 if (pl->phydev) 2365 phy_ethtool_get_wol(pl->phydev, wol); 2366 } 2367 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2368 2369 /** 2370 * phylink_ethtool_set_wol() - set wake on lan parameters 2371 * @pl: a pointer to a &struct phylink returned from phylink_create() 2372 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2373 * 2374 * Set the wake on lan parameters for the PHY attached to the phylink 2375 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2376 * error. 2377 * 2378 * Returns zero on success or negative errno code. 2379 */ 2380 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2381 { 2382 int ret = -EOPNOTSUPP; 2383 2384 ASSERT_RTNL(); 2385 2386 if (pl->phydev) 2387 ret = phy_ethtool_set_wol(pl->phydev, wol); 2388 2389 return ret; 2390 } 2391 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2392 2393 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2394 { 2395 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2396 2397 linkmode_zero(mask); 2398 phylink_set_port_modes(mask); 2399 2400 linkmode_and(dst, dst, mask); 2401 linkmode_or(dst, dst, b); 2402 } 2403 2404 static void phylink_get_ksettings(const struct phylink_link_state *state, 2405 struct ethtool_link_ksettings *kset) 2406 { 2407 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2408 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2409 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2410 kset->base.speed = state->speed; 2411 kset->base.duplex = state->duplex; 2412 } 2413 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2414 state->advertising) ? 2415 AUTONEG_ENABLE : AUTONEG_DISABLE; 2416 } 2417 2418 /** 2419 * phylink_ethtool_ksettings_get() - get the current link settings 2420 * @pl: a pointer to a &struct phylink returned from phylink_create() 2421 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2422 * 2423 * Read the current link settings for the phylink instance specified by @pl. 2424 * This will be the link settings read from the MAC, PHY or fixed link 2425 * settings depending on the current negotiation mode. 2426 */ 2427 int phylink_ethtool_ksettings_get(struct phylink *pl, 2428 struct ethtool_link_ksettings *kset) 2429 { 2430 struct phylink_link_state link_state; 2431 2432 ASSERT_RTNL(); 2433 2434 if (pl->phydev) 2435 phy_ethtool_ksettings_get(pl->phydev, kset); 2436 else 2437 kset->base.port = pl->link_port; 2438 2439 linkmode_copy(kset->link_modes.supported, pl->supported); 2440 2441 switch (pl->cur_link_an_mode) { 2442 case MLO_AN_FIXED: 2443 /* We are using fixed settings. Report these as the 2444 * current link settings - and note that these also 2445 * represent the supported speeds/duplex/pause modes. 2446 */ 2447 phylink_get_fixed_state(pl, &link_state); 2448 phylink_get_ksettings(&link_state, kset); 2449 break; 2450 2451 case MLO_AN_INBAND: 2452 /* If there is a phy attached, then use the reported 2453 * settings from the phy with no modification. 2454 */ 2455 if (pl->phydev) 2456 break; 2457 2458 phylink_mac_pcs_get_state(pl, &link_state); 2459 2460 /* The MAC is reporting the link results from its own PCS 2461 * layer via in-band status. Report these as the current 2462 * link settings. 2463 */ 2464 phylink_get_ksettings(&link_state, kset); 2465 break; 2466 } 2467 2468 return 0; 2469 } 2470 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2471 2472 /** 2473 * phylink_ethtool_ksettings_set() - set the link settings 2474 * @pl: a pointer to a &struct phylink returned from phylink_create() 2475 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2476 */ 2477 int phylink_ethtool_ksettings_set(struct phylink *pl, 2478 const struct ethtool_link_ksettings *kset) 2479 { 2480 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2481 struct phylink_link_state config; 2482 const struct phy_setting *s; 2483 2484 ASSERT_RTNL(); 2485 2486 if (pl->phydev) { 2487 struct ethtool_link_ksettings phy_kset = *kset; 2488 2489 linkmode_and(phy_kset.link_modes.advertising, 2490 phy_kset.link_modes.advertising, 2491 pl->supported); 2492 2493 /* We can rely on phylib for this update; we also do not need 2494 * to update the pl->link_config settings: 2495 * - the configuration returned via ksettings_get() will come 2496 * from phylib whenever a PHY is present. 2497 * - link_config.interface will be updated by the PHY calling 2498 * back via phylink_phy_change() and a subsequent resolve. 2499 * - initial link configuration for PHY mode comes from the 2500 * last phy state updated via phylink_phy_change(). 2501 * - other configuration changes (e.g. pause modes) are 2502 * performed directly via phylib. 2503 * - if in in-band mode with a PHY, the link configuration 2504 * is passed on the link from the PHY, and all of 2505 * link_config.{speed,duplex,an_enabled,pause} are not used. 2506 * - the only possible use would be link_config.advertising 2507 * pause modes when in 1000base-X mode with a PHY, but in 2508 * the presence of a PHY, this should not be changed as that 2509 * should be determined from the media side advertisement. 2510 */ 2511 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2512 } 2513 2514 config = pl->link_config; 2515 /* Mask out unsupported advertisements */ 2516 linkmode_and(config.advertising, kset->link_modes.advertising, 2517 pl->supported); 2518 2519 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2520 switch (kset->base.autoneg) { 2521 case AUTONEG_DISABLE: 2522 /* Autonegotiation disabled, select a suitable speed and 2523 * duplex. 2524 */ 2525 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2526 pl->supported, false); 2527 if (!s) 2528 return -EINVAL; 2529 2530 /* If we have a fixed link, refuse to change link parameters. 2531 * If the link parameters match, accept them but do nothing. 2532 */ 2533 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2534 if (s->speed != pl->link_config.speed || 2535 s->duplex != pl->link_config.duplex) 2536 return -EINVAL; 2537 return 0; 2538 } 2539 2540 config.speed = s->speed; 2541 config.duplex = s->duplex; 2542 break; 2543 2544 case AUTONEG_ENABLE: 2545 /* If we have a fixed link, allow autonegotiation (since that 2546 * is our default case) but do not allow the advertisement to 2547 * be changed. If the advertisement matches, simply return. 2548 */ 2549 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2550 if (!linkmode_equal(config.advertising, 2551 pl->link_config.advertising)) 2552 return -EINVAL; 2553 return 0; 2554 } 2555 2556 config.speed = SPEED_UNKNOWN; 2557 config.duplex = DUPLEX_UNKNOWN; 2558 break; 2559 2560 default: 2561 return -EINVAL; 2562 } 2563 2564 /* We have ruled out the case with a PHY attached, and the 2565 * fixed-link cases. All that is left are in-band links. 2566 */ 2567 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2568 kset->base.autoneg == AUTONEG_ENABLE); 2569 2570 /* If this link is with an SFP, ensure that changes to advertised modes 2571 * also cause the associated interface to be selected such that the 2572 * link can be configured correctly. 2573 */ 2574 if (pl->sfp_bus) { 2575 config.interface = sfp_select_interface(pl->sfp_bus, 2576 config.advertising); 2577 if (config.interface == PHY_INTERFACE_MODE_NA) { 2578 phylink_err(pl, 2579 "selection of interface failed, advertisement %*pb\n", 2580 __ETHTOOL_LINK_MODE_MASK_NBITS, 2581 config.advertising); 2582 return -EINVAL; 2583 } 2584 2585 /* Revalidate with the selected interface */ 2586 linkmode_copy(support, pl->supported); 2587 if (phylink_validate(pl, support, &config)) { 2588 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2589 phylink_an_mode_str(pl->cur_link_an_mode), 2590 phy_modes(config.interface), 2591 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2592 return -EINVAL; 2593 } 2594 } else { 2595 /* Validate without changing the current supported mask. */ 2596 linkmode_copy(support, pl->supported); 2597 if (phylink_validate(pl, support, &config)) 2598 return -EINVAL; 2599 } 2600 2601 /* If autonegotiation is enabled, we must have an advertisement */ 2602 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2603 config.advertising) && 2604 phylink_is_empty_linkmode(config.advertising)) 2605 return -EINVAL; 2606 2607 mutex_lock(&pl->state_mutex); 2608 pl->link_config.speed = config.speed; 2609 pl->link_config.duplex = config.duplex; 2610 2611 if (pl->link_config.interface != config.interface) { 2612 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2613 /* We need to force the link down, then change the interface */ 2614 if (pl->old_link_state) { 2615 phylink_link_down(pl); 2616 pl->old_link_state = false; 2617 } 2618 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2619 &pl->phylink_disable_state)) 2620 phylink_major_config(pl, false, &config); 2621 pl->link_config.interface = config.interface; 2622 linkmode_copy(pl->link_config.advertising, config.advertising); 2623 } else if (!linkmode_equal(pl->link_config.advertising, 2624 config.advertising)) { 2625 linkmode_copy(pl->link_config.advertising, config.advertising); 2626 phylink_change_inband_advert(pl); 2627 } 2628 mutex_unlock(&pl->state_mutex); 2629 2630 return 0; 2631 } 2632 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2633 2634 /** 2635 * phylink_ethtool_nway_reset() - restart negotiation 2636 * @pl: a pointer to a &struct phylink returned from phylink_create() 2637 * 2638 * Restart negotiation for the phylink instance specified by @pl. This will 2639 * cause any attached phy to restart negotiation with the link partner, and 2640 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2641 * negotiation. 2642 * 2643 * Returns zero on success, or negative error code. 2644 */ 2645 int phylink_ethtool_nway_reset(struct phylink *pl) 2646 { 2647 int ret = 0; 2648 2649 ASSERT_RTNL(); 2650 2651 if (pl->phydev) 2652 ret = phy_restart_aneg(pl->phydev); 2653 phylink_pcs_an_restart(pl); 2654 2655 return ret; 2656 } 2657 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2658 2659 /** 2660 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2661 * @pl: a pointer to a &struct phylink returned from phylink_create() 2662 * @pause: a pointer to a &struct ethtool_pauseparam 2663 */ 2664 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2665 struct ethtool_pauseparam *pause) 2666 { 2667 ASSERT_RTNL(); 2668 2669 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2670 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2671 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2672 } 2673 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2674 2675 /** 2676 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2677 * @pl: a pointer to a &struct phylink returned from phylink_create() 2678 * @pause: a pointer to a &struct ethtool_pauseparam 2679 */ 2680 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2681 struct ethtool_pauseparam *pause) 2682 { 2683 struct phylink_link_state *config = &pl->link_config; 2684 bool manual_changed; 2685 int pause_state; 2686 2687 ASSERT_RTNL(); 2688 2689 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2690 return -EOPNOTSUPP; 2691 2692 if (!phylink_test(pl->supported, Pause) && 2693 !phylink_test(pl->supported, Asym_Pause)) 2694 return -EOPNOTSUPP; 2695 2696 if (!phylink_test(pl->supported, Asym_Pause) && 2697 pause->rx_pause != pause->tx_pause) 2698 return -EINVAL; 2699 2700 pause_state = 0; 2701 if (pause->autoneg) 2702 pause_state |= MLO_PAUSE_AN; 2703 if (pause->rx_pause) 2704 pause_state |= MLO_PAUSE_RX; 2705 if (pause->tx_pause) 2706 pause_state |= MLO_PAUSE_TX; 2707 2708 mutex_lock(&pl->state_mutex); 2709 /* 2710 * See the comments for linkmode_set_pause(), wrt the deficiencies 2711 * with the current implementation. A solution to this issue would 2712 * be: 2713 * ethtool Local device 2714 * rx tx Pause AsymDir 2715 * 0 0 0 0 2716 * 1 0 1 1 2717 * 0 1 0 1 2718 * 1 1 1 1 2719 * and then use the ethtool rx/tx enablement status to mask the 2720 * rx/tx pause resolution. 2721 */ 2722 linkmode_set_pause(config->advertising, pause->tx_pause, 2723 pause->rx_pause); 2724 2725 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2726 (!(pause_state & MLO_PAUSE_AN) && 2727 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2728 2729 config->pause = pause_state; 2730 2731 /* Update our in-band advertisement, triggering a renegotiation if 2732 * the advertisement changed. 2733 */ 2734 if (!pl->phydev) 2735 phylink_change_inband_advert(pl); 2736 2737 mutex_unlock(&pl->state_mutex); 2738 2739 /* If we have a PHY, a change of the pause frame advertisement will 2740 * cause phylib to renegotiate (if AN is enabled) which will in turn 2741 * call our phylink_phy_change() and trigger a resolve. Note that 2742 * we can't hold our state mutex while calling phy_set_asym_pause(). 2743 */ 2744 if (pl->phydev) 2745 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2746 pause->tx_pause); 2747 2748 /* If the manual pause settings changed, make sure we trigger a 2749 * resolve to update their state; we can not guarantee that the 2750 * link will cycle. 2751 */ 2752 if (manual_changed) { 2753 pl->mac_link_dropped = true; 2754 phylink_run_resolve(pl); 2755 } 2756 2757 return 0; 2758 } 2759 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2760 2761 /** 2762 * phylink_get_eee_err() - read the energy efficient ethernet error 2763 * counter 2764 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2765 * 2766 * Read the Energy Efficient Ethernet error counter from the PHY associated 2767 * with the phylink instance specified by @pl. 2768 * 2769 * Returns positive error counter value, or negative error code. 2770 */ 2771 int phylink_get_eee_err(struct phylink *pl) 2772 { 2773 int ret = 0; 2774 2775 ASSERT_RTNL(); 2776 2777 if (pl->phydev) 2778 ret = phy_get_eee_err(pl->phydev); 2779 2780 return ret; 2781 } 2782 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2783 2784 /** 2785 * phylink_init_eee() - init and check the EEE features 2786 * @pl: a pointer to a &struct phylink returned from phylink_create() 2787 * @clk_stop_enable: allow PHY to stop receive clock 2788 * 2789 * Must be called either with RTNL held or within mac_link_up() 2790 */ 2791 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2792 { 2793 int ret = -EOPNOTSUPP; 2794 2795 if (pl->phydev) 2796 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2797 2798 return ret; 2799 } 2800 EXPORT_SYMBOL_GPL(phylink_init_eee); 2801 2802 /** 2803 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2804 * @pl: a pointer to a &struct phylink returned from phylink_create() 2805 * @eee: a pointer to a &struct ethtool_keee for the read parameters 2806 */ 2807 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 2808 { 2809 int ret = -EOPNOTSUPP; 2810 2811 ASSERT_RTNL(); 2812 2813 if (pl->phydev) 2814 ret = phy_ethtool_get_eee(pl->phydev, eee); 2815 2816 return ret; 2817 } 2818 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2819 2820 /** 2821 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2822 * @pl: a pointer to a &struct phylink returned from phylink_create() 2823 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 2824 */ 2825 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 2826 { 2827 int ret = -EOPNOTSUPP; 2828 2829 ASSERT_RTNL(); 2830 2831 if (pl->phydev) 2832 ret = phy_ethtool_set_eee(pl->phydev, eee); 2833 2834 return ret; 2835 } 2836 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2837 2838 /* This emulates MII registers for a fixed-mode phy operating as per the 2839 * passed in state. "aneg" defines if we report negotiation is possible. 2840 * 2841 * FIXME: should deal with negotiation state too. 2842 */ 2843 static int phylink_mii_emul_read(unsigned int reg, 2844 struct phylink_link_state *state) 2845 { 2846 struct fixed_phy_status fs; 2847 unsigned long *lpa = state->lp_advertising; 2848 int val; 2849 2850 fs.link = state->link; 2851 fs.speed = state->speed; 2852 fs.duplex = state->duplex; 2853 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2854 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2855 2856 val = swphy_read_reg(reg, &fs); 2857 if (reg == MII_BMSR) { 2858 if (!state->an_complete) 2859 val &= ~BMSR_ANEGCOMPLETE; 2860 } 2861 return val; 2862 } 2863 2864 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2865 unsigned int reg) 2866 { 2867 struct phy_device *phydev = pl->phydev; 2868 int prtad, devad; 2869 2870 if (mdio_phy_id_is_c45(phy_id)) { 2871 prtad = mdio_phy_id_prtad(phy_id); 2872 devad = mdio_phy_id_devad(phy_id); 2873 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2874 reg); 2875 } 2876 2877 if (phydev->is_c45) { 2878 switch (reg) { 2879 case MII_BMCR: 2880 case MII_BMSR: 2881 case MII_PHYSID1: 2882 case MII_PHYSID2: 2883 devad = __ffs(phydev->c45_ids.mmds_present); 2884 break; 2885 case MII_ADVERTISE: 2886 case MII_LPA: 2887 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2888 return -EINVAL; 2889 devad = MDIO_MMD_AN; 2890 if (reg == MII_ADVERTISE) 2891 reg = MDIO_AN_ADVERTISE; 2892 else 2893 reg = MDIO_AN_LPA; 2894 break; 2895 default: 2896 return -EINVAL; 2897 } 2898 prtad = phy_id; 2899 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2900 reg); 2901 } 2902 2903 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2904 } 2905 2906 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2907 unsigned int reg, unsigned int val) 2908 { 2909 struct phy_device *phydev = pl->phydev; 2910 int prtad, devad; 2911 2912 if (mdio_phy_id_is_c45(phy_id)) { 2913 prtad = mdio_phy_id_prtad(phy_id); 2914 devad = mdio_phy_id_devad(phy_id); 2915 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2916 reg, val); 2917 } 2918 2919 if (phydev->is_c45) { 2920 switch (reg) { 2921 case MII_BMCR: 2922 case MII_BMSR: 2923 case MII_PHYSID1: 2924 case MII_PHYSID2: 2925 devad = __ffs(phydev->c45_ids.mmds_present); 2926 break; 2927 case MII_ADVERTISE: 2928 case MII_LPA: 2929 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2930 return -EINVAL; 2931 devad = MDIO_MMD_AN; 2932 if (reg == MII_ADVERTISE) 2933 reg = MDIO_AN_ADVERTISE; 2934 else 2935 reg = MDIO_AN_LPA; 2936 break; 2937 default: 2938 return -EINVAL; 2939 } 2940 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2941 reg, val); 2942 } 2943 2944 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2945 } 2946 2947 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2948 unsigned int reg) 2949 { 2950 struct phylink_link_state state; 2951 int val = 0xffff; 2952 2953 switch (pl->cur_link_an_mode) { 2954 case MLO_AN_FIXED: 2955 if (phy_id == 0) { 2956 phylink_get_fixed_state(pl, &state); 2957 val = phylink_mii_emul_read(reg, &state); 2958 } 2959 break; 2960 2961 case MLO_AN_PHY: 2962 return -EOPNOTSUPP; 2963 2964 case MLO_AN_INBAND: 2965 if (phy_id == 0) { 2966 phylink_mac_pcs_get_state(pl, &state); 2967 val = phylink_mii_emul_read(reg, &state); 2968 } 2969 break; 2970 } 2971 2972 return val & 0xffff; 2973 } 2974 2975 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2976 unsigned int reg, unsigned int val) 2977 { 2978 switch (pl->cur_link_an_mode) { 2979 case MLO_AN_FIXED: 2980 break; 2981 2982 case MLO_AN_PHY: 2983 return -EOPNOTSUPP; 2984 2985 case MLO_AN_INBAND: 2986 break; 2987 } 2988 2989 return 0; 2990 } 2991 2992 /** 2993 * phylink_mii_ioctl() - generic mii ioctl interface 2994 * @pl: a pointer to a &struct phylink returned from phylink_create() 2995 * @ifr: a pointer to a &struct ifreq for socket ioctls 2996 * @cmd: ioctl cmd to execute 2997 * 2998 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2999 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3000 * 3001 * Returns: zero on success or negative error code. 3002 * 3003 * %SIOCGMIIPHY: 3004 * read register from the current PHY. 3005 * %SIOCGMIIREG: 3006 * read register from the specified PHY. 3007 * %SIOCSMIIREG: 3008 * set a register on the specified PHY. 3009 */ 3010 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3011 { 3012 struct mii_ioctl_data *mii = if_mii(ifr); 3013 int ret; 3014 3015 ASSERT_RTNL(); 3016 3017 if (pl->phydev) { 3018 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3019 switch (cmd) { 3020 case SIOCGMIIPHY: 3021 mii->phy_id = pl->phydev->mdio.addr; 3022 fallthrough; 3023 3024 case SIOCGMIIREG: 3025 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3026 if (ret >= 0) { 3027 mii->val_out = ret; 3028 ret = 0; 3029 } 3030 break; 3031 3032 case SIOCSMIIREG: 3033 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3034 mii->val_in); 3035 break; 3036 3037 default: 3038 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3039 break; 3040 } 3041 } else { 3042 switch (cmd) { 3043 case SIOCGMIIPHY: 3044 mii->phy_id = 0; 3045 fallthrough; 3046 3047 case SIOCGMIIREG: 3048 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3049 if (ret >= 0) { 3050 mii->val_out = ret; 3051 ret = 0; 3052 } 3053 break; 3054 3055 case SIOCSMIIREG: 3056 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3057 mii->val_in); 3058 break; 3059 3060 default: 3061 ret = -EOPNOTSUPP; 3062 break; 3063 } 3064 } 3065 3066 return ret; 3067 } 3068 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3069 3070 /** 3071 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3072 * link partners 3073 * @pl: a pointer to a &struct phylink returned from phylink_create() 3074 * @sync: perform action synchronously 3075 * 3076 * If we have a PHY that is not part of a SFP module, then set the speed 3077 * as described in the phy_speed_down() function. Please see this function 3078 * for a description of the @sync parameter. 3079 * 3080 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3081 */ 3082 int phylink_speed_down(struct phylink *pl, bool sync) 3083 { 3084 int ret = 0; 3085 3086 ASSERT_RTNL(); 3087 3088 if (!pl->sfp_bus && pl->phydev) 3089 ret = phy_speed_down(pl->phydev, sync); 3090 3091 return ret; 3092 } 3093 EXPORT_SYMBOL_GPL(phylink_speed_down); 3094 3095 /** 3096 * phylink_speed_up() - restore the advertised speeds prior to the call to 3097 * phylink_speed_down() 3098 * @pl: a pointer to a &struct phylink returned from phylink_create() 3099 * 3100 * If we have a PHY that is not part of a SFP module, then restore the 3101 * PHY speeds as per phy_speed_up(). 3102 * 3103 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3104 */ 3105 int phylink_speed_up(struct phylink *pl) 3106 { 3107 int ret = 0; 3108 3109 ASSERT_RTNL(); 3110 3111 if (!pl->sfp_bus && pl->phydev) 3112 ret = phy_speed_up(pl->phydev); 3113 3114 return ret; 3115 } 3116 EXPORT_SYMBOL_GPL(phylink_speed_up); 3117 3118 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3119 { 3120 struct phylink *pl = upstream; 3121 3122 pl->netdev->sfp_bus = bus; 3123 } 3124 3125 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3126 { 3127 struct phylink *pl = upstream; 3128 3129 pl->netdev->sfp_bus = NULL; 3130 } 3131 3132 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3133 const unsigned long *intf) 3134 { 3135 phy_interface_t interface; 3136 size_t i; 3137 3138 interface = PHY_INTERFACE_MODE_NA; 3139 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3140 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3141 interface = phylink_sfp_interface_preference[i]; 3142 break; 3143 } 3144 3145 return interface; 3146 } 3147 3148 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3149 unsigned long *supported, 3150 struct phylink_link_state *state) 3151 { 3152 bool changed = false; 3153 3154 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3155 phylink_an_mode_str(mode), phy_modes(state->interface), 3156 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3157 3158 if (!linkmode_equal(pl->supported, supported)) { 3159 linkmode_copy(pl->supported, supported); 3160 changed = true; 3161 } 3162 3163 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3164 linkmode_copy(pl->link_config.advertising, state->advertising); 3165 changed = true; 3166 } 3167 3168 if (pl->cur_link_an_mode != mode || 3169 pl->link_config.interface != state->interface) { 3170 pl->cur_link_an_mode = mode; 3171 pl->link_config.interface = state->interface; 3172 3173 changed = true; 3174 3175 phylink_info(pl, "switched to %s/%s link mode\n", 3176 phylink_an_mode_str(mode), 3177 phy_modes(state->interface)); 3178 } 3179 3180 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3181 &pl->phylink_disable_state)) 3182 phylink_mac_initial_config(pl, false); 3183 } 3184 3185 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3186 struct phy_device *phy) 3187 { 3188 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3189 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3190 struct phylink_link_state config; 3191 phy_interface_t iface; 3192 int ret; 3193 3194 linkmode_copy(support, phy->supported); 3195 3196 memset(&config, 0, sizeof(config)); 3197 linkmode_copy(config.advertising, phy->advertising); 3198 config.interface = PHY_INTERFACE_MODE_NA; 3199 config.speed = SPEED_UNKNOWN; 3200 config.duplex = DUPLEX_UNKNOWN; 3201 config.pause = MLO_PAUSE_AN; 3202 3203 /* Ignore errors if we're expecting a PHY to attach later */ 3204 ret = phylink_validate(pl, support, &config); 3205 if (ret) { 3206 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3207 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3208 ERR_PTR(ret)); 3209 return ret; 3210 } 3211 3212 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3213 if (iface == PHY_INTERFACE_MODE_NA) { 3214 phylink_err(pl, 3215 "selection of interface failed, advertisement %*pb\n", 3216 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3217 return -EINVAL; 3218 } 3219 3220 config.interface = iface; 3221 linkmode_copy(support1, support); 3222 ret = phylink_validate(pl, support1, &config); 3223 if (ret) { 3224 phylink_err(pl, 3225 "validation of %s/%s with support %*pb failed: %pe\n", 3226 phylink_an_mode_str(mode), 3227 phy_modes(config.interface), 3228 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3229 ERR_PTR(ret)); 3230 return ret; 3231 } 3232 3233 pl->link_port = pl->sfp_port; 3234 3235 phylink_sfp_set_config(pl, mode, support, &config); 3236 3237 return 0; 3238 } 3239 3240 static int phylink_sfp_config_optical(struct phylink *pl) 3241 { 3242 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3243 DECLARE_PHY_INTERFACE_MASK(interfaces); 3244 struct phylink_link_state config; 3245 phy_interface_t interface; 3246 int ret; 3247 3248 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3249 (int)PHY_INTERFACE_MODE_MAX, 3250 pl->config->supported_interfaces, 3251 (int)PHY_INTERFACE_MODE_MAX, 3252 pl->sfp_interfaces); 3253 3254 /* Find the union of the supported interfaces by the PCS/MAC and 3255 * the SFP module. 3256 */ 3257 phy_interface_and(interfaces, pl->config->supported_interfaces, 3258 pl->sfp_interfaces); 3259 if (phy_interface_empty(interfaces)) { 3260 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3261 return -EINVAL; 3262 } 3263 3264 memset(&config, 0, sizeof(config)); 3265 linkmode_copy(support, pl->sfp_support); 3266 linkmode_copy(config.advertising, pl->sfp_support); 3267 config.speed = SPEED_UNKNOWN; 3268 config.duplex = DUPLEX_UNKNOWN; 3269 config.pause = MLO_PAUSE_AN; 3270 3271 /* For all the interfaces that are supported, reduce the sfp_support 3272 * mask to only those link modes that can be supported. 3273 */ 3274 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3275 interfaces); 3276 if (ret) { 3277 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3278 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3279 return ret; 3280 } 3281 3282 interface = phylink_choose_sfp_interface(pl, interfaces); 3283 if (interface == PHY_INTERFACE_MODE_NA) { 3284 phylink_err(pl, "failed to select SFP interface\n"); 3285 return -EINVAL; 3286 } 3287 3288 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3289 phy_modes(interface)); 3290 3291 config.interface = interface; 3292 3293 /* Ignore errors if we're expecting a PHY to attach later */ 3294 ret = phylink_validate(pl, support, &config); 3295 if (ret) { 3296 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3297 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3298 ERR_PTR(ret)); 3299 return ret; 3300 } 3301 3302 pl->link_port = pl->sfp_port; 3303 3304 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3305 3306 return 0; 3307 } 3308 3309 static int phylink_sfp_module_insert(void *upstream, 3310 const struct sfp_eeprom_id *id) 3311 { 3312 struct phylink *pl = upstream; 3313 3314 ASSERT_RTNL(); 3315 3316 linkmode_zero(pl->sfp_support); 3317 phy_interface_zero(pl->sfp_interfaces); 3318 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3319 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3320 3321 /* If this module may have a PHY connecting later, defer until later */ 3322 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3323 if (pl->sfp_may_have_phy) 3324 return 0; 3325 3326 return phylink_sfp_config_optical(pl); 3327 } 3328 3329 static int phylink_sfp_module_start(void *upstream) 3330 { 3331 struct phylink *pl = upstream; 3332 3333 /* If this SFP module has a PHY, start the PHY now. */ 3334 if (pl->phydev) { 3335 phy_start(pl->phydev); 3336 return 0; 3337 } 3338 3339 /* If the module may have a PHY but we didn't detect one we 3340 * need to configure the MAC here. 3341 */ 3342 if (!pl->sfp_may_have_phy) 3343 return 0; 3344 3345 return phylink_sfp_config_optical(pl); 3346 } 3347 3348 static void phylink_sfp_module_stop(void *upstream) 3349 { 3350 struct phylink *pl = upstream; 3351 3352 /* If this SFP module has a PHY, stop it. */ 3353 if (pl->phydev) 3354 phy_stop(pl->phydev); 3355 } 3356 3357 static void phylink_sfp_link_down(void *upstream) 3358 { 3359 struct phylink *pl = upstream; 3360 3361 ASSERT_RTNL(); 3362 3363 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3364 } 3365 3366 static void phylink_sfp_link_up(void *upstream) 3367 { 3368 struct phylink *pl = upstream; 3369 3370 ASSERT_RTNL(); 3371 3372 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3373 } 3374 3375 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3376 * or 802.3z control word, so inband will not work. 3377 */ 3378 static bool phylink_phy_no_inband(struct phy_device *phy) 3379 { 3380 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3381 0xae025150, 0xfffffff0); 3382 } 3383 3384 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3385 { 3386 struct phylink *pl = upstream; 3387 phy_interface_t interface; 3388 u8 mode; 3389 int ret; 3390 3391 /* 3392 * This is the new way of dealing with flow control for PHYs, 3393 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3394 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3395 * using our validate call to the MAC, we rely upon the MAC 3396 * clearing the bits from both supported and advertising fields. 3397 */ 3398 phy_support_asym_pause(phy); 3399 3400 if (phylink_phy_no_inband(phy)) 3401 mode = MLO_AN_PHY; 3402 else 3403 mode = MLO_AN_INBAND; 3404 3405 /* Set the PHY's host supported interfaces */ 3406 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3407 pl->config->supported_interfaces); 3408 3409 /* Do the initial configuration */ 3410 ret = phylink_sfp_config_phy(pl, mode, phy); 3411 if (ret < 0) 3412 return ret; 3413 3414 interface = pl->link_config.interface; 3415 ret = phylink_attach_phy(pl, phy, interface); 3416 if (ret < 0) 3417 return ret; 3418 3419 ret = phylink_bringup_phy(pl, phy, interface); 3420 if (ret) 3421 phy_detach(phy); 3422 3423 return ret; 3424 } 3425 3426 static void phylink_sfp_disconnect_phy(void *upstream) 3427 { 3428 phylink_disconnect_phy(upstream); 3429 } 3430 3431 static const struct sfp_upstream_ops sfp_phylink_ops = { 3432 .attach = phylink_sfp_attach, 3433 .detach = phylink_sfp_detach, 3434 .module_insert = phylink_sfp_module_insert, 3435 .module_start = phylink_sfp_module_start, 3436 .module_stop = phylink_sfp_module_stop, 3437 .link_up = phylink_sfp_link_up, 3438 .link_down = phylink_sfp_link_down, 3439 .connect_phy = phylink_sfp_connect_phy, 3440 .disconnect_phy = phylink_sfp_disconnect_phy, 3441 }; 3442 3443 /* Helpers for MAC drivers */ 3444 3445 static struct { 3446 int bit; 3447 int speed; 3448 } phylink_c73_priority_resolution[] = { 3449 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3450 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3451 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3452 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3453 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3454 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3455 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3456 /* 5GBASE-KR not supported */ 3457 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3458 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3459 }; 3460 3461 void phylink_resolve_c73(struct phylink_link_state *state) 3462 { 3463 int i; 3464 3465 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3466 int bit = phylink_c73_priority_resolution[i].bit; 3467 if (linkmode_test_bit(bit, state->advertising) && 3468 linkmode_test_bit(bit, state->lp_advertising)) 3469 break; 3470 } 3471 3472 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3473 state->speed = phylink_c73_priority_resolution[i].speed; 3474 state->duplex = DUPLEX_FULL; 3475 } else { 3476 /* negotiation failure */ 3477 state->link = false; 3478 } 3479 3480 phylink_resolve_an_pause(state); 3481 } 3482 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3483 3484 static void phylink_decode_c37_word(struct phylink_link_state *state, 3485 uint16_t config_reg, int speed) 3486 { 3487 int fd_bit; 3488 3489 if (speed == SPEED_2500) 3490 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3491 else 3492 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3493 3494 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3495 3496 if (linkmode_test_bit(fd_bit, state->advertising) && 3497 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3498 state->speed = speed; 3499 state->duplex = DUPLEX_FULL; 3500 } else { 3501 /* negotiation failure */ 3502 state->link = false; 3503 } 3504 3505 phylink_resolve_an_pause(state); 3506 } 3507 3508 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3509 uint16_t config_reg) 3510 { 3511 if (!(config_reg & LPA_SGMII_LINK)) { 3512 state->link = false; 3513 return; 3514 } 3515 3516 switch (config_reg & LPA_SGMII_SPD_MASK) { 3517 case LPA_SGMII_10: 3518 state->speed = SPEED_10; 3519 break; 3520 case LPA_SGMII_100: 3521 state->speed = SPEED_100; 3522 break; 3523 case LPA_SGMII_1000: 3524 state->speed = SPEED_1000; 3525 break; 3526 default: 3527 state->link = false; 3528 return; 3529 } 3530 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3531 state->duplex = DUPLEX_FULL; 3532 else 3533 state->duplex = DUPLEX_HALF; 3534 } 3535 3536 /** 3537 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3538 * @state: a pointer to a struct phylink_link_state. 3539 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3540 * 3541 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3542 * code word. Decode the USXGMII code word and populate the corresponding fields 3543 * (speed, duplex) into the phylink_link_state structure. 3544 */ 3545 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3546 uint16_t lpa) 3547 { 3548 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3549 case MDIO_USXGMII_10: 3550 state->speed = SPEED_10; 3551 break; 3552 case MDIO_USXGMII_100: 3553 state->speed = SPEED_100; 3554 break; 3555 case MDIO_USXGMII_1000: 3556 state->speed = SPEED_1000; 3557 break; 3558 case MDIO_USXGMII_2500: 3559 state->speed = SPEED_2500; 3560 break; 3561 case MDIO_USXGMII_5000: 3562 state->speed = SPEED_5000; 3563 break; 3564 case MDIO_USXGMII_10G: 3565 state->speed = SPEED_10000; 3566 break; 3567 default: 3568 state->link = false; 3569 return; 3570 } 3571 3572 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3573 state->duplex = DUPLEX_FULL; 3574 else 3575 state->duplex = DUPLEX_HALF; 3576 } 3577 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3578 3579 /** 3580 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3581 * @state: a pointer to a struct phylink_link_state. 3582 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3583 * 3584 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3585 * code word. Decode the USGMII code word and populate the corresponding fields 3586 * (speed, duplex) into the phylink_link_state structure. The structure for this 3587 * word is the same as the USXGMII word, except it only supports speeds up to 3588 * 1Gbps. 3589 */ 3590 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3591 uint16_t lpa) 3592 { 3593 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3594 case MDIO_USXGMII_10: 3595 state->speed = SPEED_10; 3596 break; 3597 case MDIO_USXGMII_100: 3598 state->speed = SPEED_100; 3599 break; 3600 case MDIO_USXGMII_1000: 3601 state->speed = SPEED_1000; 3602 break; 3603 default: 3604 state->link = false; 3605 return; 3606 } 3607 3608 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3609 state->duplex = DUPLEX_FULL; 3610 else 3611 state->duplex = DUPLEX_HALF; 3612 } 3613 3614 /** 3615 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3616 * @state: a pointer to a &struct phylink_link_state. 3617 * @bmsr: The value of the %MII_BMSR register 3618 * @lpa: The value of the %MII_LPA register 3619 * 3620 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3621 * clause 37 negotiation and/or SGMII control. 3622 * 3623 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3624 * the phylink @state structure. This is suitable to be used for implementing 3625 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3626 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3627 */ 3628 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3629 u16 bmsr, u16 lpa) 3630 { 3631 state->link = !!(bmsr & BMSR_LSTATUS); 3632 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3633 /* If there is no link or autonegotiation is disabled, the LP advertisement 3634 * data is not meaningful, so don't go any further. 3635 */ 3636 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3637 state->advertising)) 3638 return; 3639 3640 switch (state->interface) { 3641 case PHY_INTERFACE_MODE_1000BASEX: 3642 phylink_decode_c37_word(state, lpa, SPEED_1000); 3643 break; 3644 3645 case PHY_INTERFACE_MODE_2500BASEX: 3646 phylink_decode_c37_word(state, lpa, SPEED_2500); 3647 break; 3648 3649 case PHY_INTERFACE_MODE_SGMII: 3650 case PHY_INTERFACE_MODE_QSGMII: 3651 phylink_decode_sgmii_word(state, lpa); 3652 break; 3653 case PHY_INTERFACE_MODE_QUSGMII: 3654 phylink_decode_usgmii_word(state, lpa); 3655 break; 3656 3657 default: 3658 state->link = false; 3659 break; 3660 } 3661 } 3662 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3663 3664 /** 3665 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3666 * @pcs: a pointer to a &struct mdio_device. 3667 * @state: a pointer to a &struct phylink_link_state. 3668 * 3669 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3670 * clause 37 negotiation and/or SGMII control. 3671 * 3672 * Read the MAC PCS state from the MII device configured in @config and 3673 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3674 * the phylink @state structure. This is suitable to be directly plugged 3675 * into the pcs_get_state() member of the struct phylink_pcs_ops 3676 * structure. 3677 */ 3678 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3679 struct phylink_link_state *state) 3680 { 3681 int bmsr, lpa; 3682 3683 bmsr = mdiodev_read(pcs, MII_BMSR); 3684 lpa = mdiodev_read(pcs, MII_LPA); 3685 if (bmsr < 0 || lpa < 0) { 3686 state->link = false; 3687 return; 3688 } 3689 3690 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3691 } 3692 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3693 3694 /** 3695 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3696 * advertisement 3697 * @interface: the PHY interface mode being configured 3698 * @advertising: the ethtool advertisement mask 3699 * 3700 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3701 * clause 37 negotiation and/or SGMII control. 3702 * 3703 * Encode the clause 37 PCS advertisement as specified by @interface and 3704 * @advertising. 3705 * 3706 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3707 */ 3708 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3709 const unsigned long *advertising) 3710 { 3711 u16 adv; 3712 3713 switch (interface) { 3714 case PHY_INTERFACE_MODE_1000BASEX: 3715 case PHY_INTERFACE_MODE_2500BASEX: 3716 adv = ADVERTISE_1000XFULL; 3717 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3718 advertising)) 3719 adv |= ADVERTISE_1000XPAUSE; 3720 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3721 advertising)) 3722 adv |= ADVERTISE_1000XPSE_ASYM; 3723 return adv; 3724 case PHY_INTERFACE_MODE_SGMII: 3725 case PHY_INTERFACE_MODE_QSGMII: 3726 return 0x0001; 3727 default: 3728 /* Nothing to do for other modes */ 3729 return -EINVAL; 3730 } 3731 } 3732 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3733 3734 /** 3735 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3736 * @pcs: a pointer to a &struct mdio_device. 3737 * @interface: the PHY interface mode being configured 3738 * @advertising: the ethtool advertisement mask 3739 * @neg_mode: PCS negotiation mode 3740 * 3741 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3742 * parameters for the @mode, @interface and @advertising parameters. 3743 * Returns negative error number on failure, zero if the advertisement 3744 * has not changed, or positive if there is a change. 3745 */ 3746 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3747 phy_interface_t interface, 3748 const unsigned long *advertising, 3749 unsigned int neg_mode) 3750 { 3751 bool changed = 0; 3752 u16 bmcr; 3753 int ret, adv; 3754 3755 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3756 if (adv >= 0) { 3757 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3758 MII_ADVERTISE, 0xffff, adv); 3759 if (ret < 0) 3760 return ret; 3761 changed = ret; 3762 } 3763 3764 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3765 bmcr = BMCR_ANENABLE; 3766 else 3767 bmcr = 0; 3768 3769 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3770 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3771 if (ret < 0) 3772 return ret; 3773 3774 return changed; 3775 } 3776 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3777 3778 /** 3779 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3780 * @pcs: a pointer to a &struct mdio_device. 3781 * 3782 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3783 * clause 37 negotiation. 3784 * 3785 * Restart the clause 37 negotiation with the link partner. This is 3786 * suitable to be directly plugged into the pcs_get_state() member 3787 * of the struct phylink_pcs_ops structure. 3788 */ 3789 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3790 { 3791 int val = mdiodev_read(pcs, MII_BMCR); 3792 3793 if (val >= 0) { 3794 val |= BMCR_ANRESTART; 3795 3796 mdiodev_write(pcs, MII_BMCR, val); 3797 } 3798 } 3799 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3800 3801 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3802 struct phylink_link_state *state) 3803 { 3804 struct mii_bus *bus = pcs->bus; 3805 int addr = pcs->addr; 3806 int stat; 3807 3808 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3809 if (stat < 0) { 3810 state->link = false; 3811 return; 3812 } 3813 3814 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3815 if (!state->link) 3816 return; 3817 3818 switch (state->interface) { 3819 case PHY_INTERFACE_MODE_10GBASER: 3820 state->speed = SPEED_10000; 3821 state->duplex = DUPLEX_FULL; 3822 break; 3823 3824 default: 3825 break; 3826 } 3827 } 3828 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3829 3830 static int __init phylink_init(void) 3831 { 3832 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3833 __set_bit(phylink_sfp_interface_preference[i], 3834 phylink_sfp_interfaces); 3835 3836 return 0; 3837 } 3838 3839 module_init(phylink_init); 3840 3841 MODULE_LICENSE("GPL v2"); 3842 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3843