1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 }; 38 39 /** 40 * struct phylink - internal data type for phylink 41 */ 42 struct phylink { 43 /* private: */ 44 struct net_device *netdev; 45 const struct phylink_mac_ops *mac_ops; 46 struct phylink_config *config; 47 struct phylink_pcs *pcs; 48 struct device *dev; 49 unsigned int old_link_state:1; 50 51 unsigned long phylink_disable_state; /* bitmask of disables */ 52 struct phy_device *phydev; 53 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 54 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 55 u8 cur_link_an_mode; 56 u8 link_port; /* The current non-phy ethtool port */ 57 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 58 59 /* The link configuration settings */ 60 struct phylink_link_state link_config; 61 62 /* The current settings */ 63 phy_interface_t cur_interface; 64 65 struct gpio_desc *link_gpio; 66 unsigned int link_irq; 67 struct timer_list link_poll; 68 void (*get_fixed_state)(struct net_device *dev, 69 struct phylink_link_state *s); 70 71 struct mutex state_mutex; 72 struct phylink_link_state phy_state; 73 struct work_struct resolve; 74 75 bool mac_link_dropped; 76 bool using_mac_select_pcs; 77 78 struct sfp_bus *sfp_bus; 79 bool sfp_may_have_phy; 80 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 81 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 82 u8 sfp_port; 83 }; 84 85 #define phylink_printk(level, pl, fmt, ...) \ 86 do { \ 87 if ((pl)->config->type == PHYLINK_NETDEV) \ 88 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 89 else if ((pl)->config->type == PHYLINK_DEV) \ 90 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 91 } while (0) 92 93 #define phylink_err(pl, fmt, ...) \ 94 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 95 #define phylink_warn(pl, fmt, ...) \ 96 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 97 #define phylink_info(pl, fmt, ...) \ 98 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 99 #if defined(CONFIG_DYNAMIC_DEBUG) 100 #define phylink_dbg(pl, fmt, ...) \ 101 do { \ 102 if ((pl)->config->type == PHYLINK_NETDEV) \ 103 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 104 else if ((pl)->config->type == PHYLINK_DEV) \ 105 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 106 } while (0) 107 #elif defined(DEBUG) 108 #define phylink_dbg(pl, fmt, ...) \ 109 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 110 #else 111 #define phylink_dbg(pl, fmt, ...) \ 112 ({ \ 113 if (0) \ 114 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 115 }) 116 #endif 117 118 /** 119 * phylink_set_port_modes() - set the port type modes in the ethtool mask 120 * @mask: ethtool link mode mask 121 * 122 * Sets all the port type modes in the ethtool mask. MAC drivers should 123 * use this in their 'validate' callback. 124 */ 125 void phylink_set_port_modes(unsigned long *mask) 126 { 127 phylink_set(mask, TP); 128 phylink_set(mask, AUI); 129 phylink_set(mask, MII); 130 phylink_set(mask, FIBRE); 131 phylink_set(mask, BNC); 132 phylink_set(mask, Backplane); 133 } 134 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 135 136 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 137 { 138 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 139 140 phylink_set_port_modes(tmp); 141 phylink_set(tmp, Autoneg); 142 phylink_set(tmp, Pause); 143 phylink_set(tmp, Asym_Pause); 144 145 return linkmode_subset(linkmode, tmp); 146 } 147 148 static const char *phylink_an_mode_str(unsigned int mode) 149 { 150 static const char *modestr[] = { 151 [MLO_AN_PHY] = "phy", 152 [MLO_AN_FIXED] = "fixed", 153 [MLO_AN_INBAND] = "inband", 154 }; 155 156 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 157 } 158 159 /** 160 * phylink_interface_max_speed() - get the maximum speed of a phy interface 161 * @interface: phy interface mode defined by &typedef phy_interface_t 162 * 163 * Determine the maximum speed of a phy interface. This is intended to help 164 * determine the correct speed to pass to the MAC when the phy is performing 165 * rate matching. 166 * 167 * Return: The maximum speed of @interface 168 */ 169 static int phylink_interface_max_speed(phy_interface_t interface) 170 { 171 switch (interface) { 172 case PHY_INTERFACE_MODE_100BASEX: 173 case PHY_INTERFACE_MODE_REVRMII: 174 case PHY_INTERFACE_MODE_RMII: 175 case PHY_INTERFACE_MODE_SMII: 176 case PHY_INTERFACE_MODE_REVMII: 177 case PHY_INTERFACE_MODE_MII: 178 return SPEED_100; 179 180 case PHY_INTERFACE_MODE_TBI: 181 case PHY_INTERFACE_MODE_MOCA: 182 case PHY_INTERFACE_MODE_RTBI: 183 case PHY_INTERFACE_MODE_1000BASEX: 184 case PHY_INTERFACE_MODE_1000BASEKX: 185 case PHY_INTERFACE_MODE_TRGMII: 186 case PHY_INTERFACE_MODE_RGMII_TXID: 187 case PHY_INTERFACE_MODE_RGMII_RXID: 188 case PHY_INTERFACE_MODE_RGMII_ID: 189 case PHY_INTERFACE_MODE_RGMII: 190 case PHY_INTERFACE_MODE_QSGMII: 191 case PHY_INTERFACE_MODE_SGMII: 192 case PHY_INTERFACE_MODE_GMII: 193 return SPEED_1000; 194 195 case PHY_INTERFACE_MODE_2500BASEX: 196 return SPEED_2500; 197 198 case PHY_INTERFACE_MODE_5GBASER: 199 return SPEED_5000; 200 201 case PHY_INTERFACE_MODE_XGMII: 202 case PHY_INTERFACE_MODE_RXAUI: 203 case PHY_INTERFACE_MODE_XAUI: 204 case PHY_INTERFACE_MODE_10GBASER: 205 case PHY_INTERFACE_MODE_10GKR: 206 case PHY_INTERFACE_MODE_USXGMII: 207 case PHY_INTERFACE_MODE_QUSGMII: 208 return SPEED_10000; 209 210 case PHY_INTERFACE_MODE_25GBASER: 211 return SPEED_25000; 212 213 case PHY_INTERFACE_MODE_XLGMII: 214 return SPEED_40000; 215 216 case PHY_INTERFACE_MODE_INTERNAL: 217 case PHY_INTERFACE_MODE_NA: 218 case PHY_INTERFACE_MODE_MAX: 219 /* No idea! Garbage in, unknown out */ 220 return SPEED_UNKNOWN; 221 } 222 223 /* If we get here, someone forgot to add an interface mode above */ 224 WARN_ON_ONCE(1); 225 return SPEED_UNKNOWN; 226 } 227 228 /** 229 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 230 * @linkmodes: ethtool linkmode mask (must be already initialised) 231 * @caps: bitmask of MAC capabilities 232 * 233 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 234 * supported by the @caps. @linkmodes must have been initialised previously. 235 */ 236 void phylink_caps_to_linkmodes(unsigned long *linkmodes, unsigned long caps) 237 { 238 if (caps & MAC_SYM_PAUSE) 239 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 240 241 if (caps & MAC_ASYM_PAUSE) 242 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 243 244 if (caps & MAC_10HD) 245 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 246 247 if (caps & MAC_10FD) { 248 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 249 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 250 } 251 252 if (caps & MAC_100HD) { 253 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 254 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 255 } 256 257 if (caps & MAC_100FD) { 258 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 259 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 260 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 261 } 262 263 if (caps & MAC_1000HD) 264 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 265 266 if (caps & MAC_1000FD) { 267 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 268 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 269 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 270 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 271 } 272 273 if (caps & MAC_2500FD) { 274 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 275 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 276 } 277 278 if (caps & MAC_5000FD) 279 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 280 281 if (caps & MAC_10000FD) { 282 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 283 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 284 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 285 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 286 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 287 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 290 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 291 } 292 293 if (caps & MAC_25000FD) { 294 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 295 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 296 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 297 } 298 299 if (caps & MAC_40000FD) { 300 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 301 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 302 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 303 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 304 } 305 306 if (caps & MAC_50000FD) { 307 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 308 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 309 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 314 linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 316 } 317 318 if (caps & MAC_56000FD) { 319 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 320 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 321 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 323 } 324 325 if (caps & MAC_100000FD) { 326 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 327 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 328 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 329 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 330 linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 333 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 334 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 335 linkmodes); 336 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 340 linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 343 } 344 345 if (caps & MAC_200000FD) { 346 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 349 linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 353 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 354 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 355 linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 358 } 359 360 if (caps & MAC_400000FD) { 361 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 364 linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 369 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 370 linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 373 } 374 } 375 EXPORT_SYMBOL_GPL(phylink_caps_to_linkmodes); 376 377 static struct { 378 unsigned long mask; 379 int speed; 380 unsigned int duplex; 381 } phylink_caps_params[] = { 382 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 383 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 384 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 385 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 386 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 387 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 388 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 389 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 390 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 391 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 392 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 393 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 394 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 395 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 396 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 397 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 398 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 399 }; 400 401 /** 402 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 403 * @speed: the speed to search for 404 * @duplex: the duplex to search for 405 * 406 * Find the mac capability for a given speed and duplex. 407 * 408 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 409 * there were no matches. 410 */ 411 static unsigned long phylink_cap_from_speed_duplex(int speed, 412 unsigned int duplex) 413 { 414 int i; 415 416 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 417 if (speed == phylink_caps_params[i].speed && 418 duplex == phylink_caps_params[i].duplex) 419 return phylink_caps_params[i].mask; 420 } 421 422 return 0; 423 } 424 425 /** 426 * phylink_get_capabilities() - get capabilities for a given MAC 427 * @interface: phy interface mode defined by &typedef phy_interface_t 428 * @mac_capabilities: bitmask of MAC capabilities 429 * @rate_matching: type of rate matching being performed 430 * 431 * Get the MAC capabilities that are supported by the @interface mode and 432 * @mac_capabilities. 433 */ 434 unsigned long phylink_get_capabilities(phy_interface_t interface, 435 unsigned long mac_capabilities, 436 int rate_matching) 437 { 438 int max_speed = phylink_interface_max_speed(interface); 439 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 440 unsigned long matched_caps = 0; 441 442 switch (interface) { 443 case PHY_INTERFACE_MODE_USXGMII: 444 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 445 fallthrough; 446 447 case PHY_INTERFACE_MODE_RGMII_TXID: 448 case PHY_INTERFACE_MODE_RGMII_RXID: 449 case PHY_INTERFACE_MODE_RGMII_ID: 450 case PHY_INTERFACE_MODE_RGMII: 451 case PHY_INTERFACE_MODE_QSGMII: 452 case PHY_INTERFACE_MODE_QUSGMII: 453 case PHY_INTERFACE_MODE_SGMII: 454 case PHY_INTERFACE_MODE_GMII: 455 caps |= MAC_1000HD | MAC_1000FD; 456 fallthrough; 457 458 case PHY_INTERFACE_MODE_REVRMII: 459 case PHY_INTERFACE_MODE_RMII: 460 case PHY_INTERFACE_MODE_SMII: 461 case PHY_INTERFACE_MODE_REVMII: 462 case PHY_INTERFACE_MODE_MII: 463 caps |= MAC_10HD | MAC_10FD; 464 fallthrough; 465 466 case PHY_INTERFACE_MODE_100BASEX: 467 caps |= MAC_100HD | MAC_100FD; 468 break; 469 470 case PHY_INTERFACE_MODE_TBI: 471 case PHY_INTERFACE_MODE_MOCA: 472 case PHY_INTERFACE_MODE_RTBI: 473 case PHY_INTERFACE_MODE_1000BASEX: 474 caps |= MAC_1000HD; 475 fallthrough; 476 case PHY_INTERFACE_MODE_1000BASEKX: 477 case PHY_INTERFACE_MODE_TRGMII: 478 caps |= MAC_1000FD; 479 break; 480 481 case PHY_INTERFACE_MODE_2500BASEX: 482 caps |= MAC_2500FD; 483 break; 484 485 case PHY_INTERFACE_MODE_5GBASER: 486 caps |= MAC_5000FD; 487 break; 488 489 case PHY_INTERFACE_MODE_XGMII: 490 case PHY_INTERFACE_MODE_RXAUI: 491 case PHY_INTERFACE_MODE_XAUI: 492 case PHY_INTERFACE_MODE_10GBASER: 493 case PHY_INTERFACE_MODE_10GKR: 494 caps |= MAC_10000FD; 495 break; 496 497 case PHY_INTERFACE_MODE_25GBASER: 498 caps |= MAC_25000FD; 499 break; 500 501 case PHY_INTERFACE_MODE_XLGMII: 502 caps |= MAC_40000FD; 503 break; 504 505 case PHY_INTERFACE_MODE_INTERNAL: 506 caps |= ~0; 507 break; 508 509 case PHY_INTERFACE_MODE_NA: 510 case PHY_INTERFACE_MODE_MAX: 511 break; 512 } 513 514 switch (rate_matching) { 515 case RATE_MATCH_OPEN_LOOP: 516 /* TODO */ 517 fallthrough; 518 case RATE_MATCH_NONE: 519 matched_caps = 0; 520 break; 521 case RATE_MATCH_PAUSE: { 522 /* The MAC must support asymmetric pause towards the local 523 * device for this. We could allow just symmetric pause, but 524 * then we might have to renegotiate if the link partner 525 * doesn't support pause. This is because there's no way to 526 * accept pause frames without transmitting them if we only 527 * support symmetric pause. 528 */ 529 if (!(mac_capabilities & MAC_SYM_PAUSE) || 530 !(mac_capabilities & MAC_ASYM_PAUSE)) 531 break; 532 533 /* We can't adapt if the MAC doesn't support the interface's 534 * max speed at full duplex. 535 */ 536 if (mac_capabilities & 537 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 538 /* Although a duplex-matching phy might exist, we 539 * conservatively remove these modes because the MAC 540 * will not be aware of the half-duplex nature of the 541 * link. 542 */ 543 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 544 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 545 } 546 break; 547 } 548 case RATE_MATCH_CRS: 549 /* The MAC must support half duplex at the interface's max 550 * speed. 551 */ 552 if (mac_capabilities & 553 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 554 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 555 matched_caps &= mac_capabilities; 556 } 557 break; 558 } 559 560 return (caps & mac_capabilities) | matched_caps; 561 } 562 EXPORT_SYMBOL_GPL(phylink_get_capabilities); 563 564 /** 565 * phylink_validate_mask_caps() - Restrict link modes based on caps 566 * @supported: ethtool bitmask for supported link modes. 567 * @state: pointer to a &struct phylink_link_state. 568 * @mac_capabilities: bitmask of MAC capabilities 569 * 570 * Calculate the supported link modes based on @mac_capabilities, and restrict 571 * @supported and @state based on that. Use this function if your capabiliies 572 * aren't constant, such as if they vary depending on the interface. 573 */ 574 void phylink_validate_mask_caps(unsigned long *supported, 575 struct phylink_link_state *state, 576 unsigned long mac_capabilities) 577 { 578 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 579 unsigned long caps; 580 581 phylink_set_port_modes(mask); 582 phylink_set(mask, Autoneg); 583 caps = phylink_get_capabilities(state->interface, mac_capabilities, 584 state->rate_matching); 585 phylink_caps_to_linkmodes(mask, caps); 586 587 linkmode_and(supported, supported, mask); 588 linkmode_and(state->advertising, state->advertising, mask); 589 } 590 EXPORT_SYMBOL_GPL(phylink_validate_mask_caps); 591 592 /** 593 * phylink_generic_validate() - generic validate() callback implementation 594 * @config: a pointer to a &struct phylink_config. 595 * @supported: ethtool bitmask for supported link modes. 596 * @state: a pointer to a &struct phylink_link_state. 597 * 598 * Generic implementation of the validate() callback that MAC drivers can 599 * use when they pass the range of supported interfaces and MAC capabilities. 600 */ 601 void phylink_generic_validate(struct phylink_config *config, 602 unsigned long *supported, 603 struct phylink_link_state *state) 604 { 605 phylink_validate_mask_caps(supported, state, config->mac_capabilities); 606 } 607 EXPORT_SYMBOL_GPL(phylink_generic_validate); 608 609 static int phylink_validate_mac_and_pcs(struct phylink *pl, 610 unsigned long *supported, 611 struct phylink_link_state *state) 612 { 613 struct phylink_pcs *pcs; 614 int ret; 615 616 /* Get the PCS for this interface mode */ 617 if (pl->using_mac_select_pcs) { 618 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 619 if (IS_ERR(pcs)) 620 return PTR_ERR(pcs); 621 } else { 622 pcs = pl->pcs; 623 } 624 625 if (pcs) { 626 /* The PCS, if present, must be setup before phylink_create() 627 * has been called. If the ops is not initialised, print an 628 * error and backtrace rather than oopsing the kernel. 629 */ 630 if (!pcs->ops) { 631 phylink_err(pl, "interface %s: uninitialised PCS\n", 632 phy_modes(state->interface)); 633 dump_stack(); 634 return -EINVAL; 635 } 636 637 /* Validate the link parameters with the PCS */ 638 if (pcs->ops->pcs_validate) { 639 ret = pcs->ops->pcs_validate(pcs, supported, state); 640 if (ret < 0 || phylink_is_empty_linkmode(supported)) 641 return -EINVAL; 642 643 /* Ensure the advertising mask is a subset of the 644 * supported mask. 645 */ 646 linkmode_and(state->advertising, state->advertising, 647 supported); 648 } 649 } 650 651 /* Then validate the link parameters with the MAC */ 652 if (pl->mac_ops->validate) 653 pl->mac_ops->validate(pl->config, supported, state); 654 else 655 phylink_generic_validate(pl->config, supported, state); 656 657 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 658 } 659 660 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 661 struct phylink_link_state *state, 662 const unsigned long *interfaces) 663 { 664 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 665 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 666 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 667 struct phylink_link_state t; 668 int intf; 669 670 for (intf = 0; intf < PHY_INTERFACE_MODE_MAX; intf++) { 671 if (test_bit(intf, interfaces)) { 672 linkmode_copy(s, supported); 673 674 t = *state; 675 t.interface = intf; 676 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 677 linkmode_or(all_s, all_s, s); 678 linkmode_or(all_adv, all_adv, t.advertising); 679 } 680 } 681 } 682 683 linkmode_copy(supported, all_s); 684 linkmode_copy(state->advertising, all_adv); 685 686 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 687 } 688 689 static int phylink_validate(struct phylink *pl, unsigned long *supported, 690 struct phylink_link_state *state) 691 { 692 const unsigned long *interfaces = pl->config->supported_interfaces; 693 694 if (!phy_interface_empty(interfaces)) { 695 if (state->interface == PHY_INTERFACE_MODE_NA) 696 return phylink_validate_mask(pl, supported, state, 697 interfaces); 698 699 if (!test_bit(state->interface, interfaces)) 700 return -EINVAL; 701 } 702 703 return phylink_validate_mac_and_pcs(pl, supported, state); 704 } 705 706 static int phylink_parse_fixedlink(struct phylink *pl, 707 struct fwnode_handle *fwnode) 708 { 709 struct fwnode_handle *fixed_node; 710 const struct phy_setting *s; 711 struct gpio_desc *desc; 712 u32 speed; 713 int ret; 714 715 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 716 if (fixed_node) { 717 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 718 719 pl->link_config.speed = speed; 720 pl->link_config.duplex = DUPLEX_HALF; 721 722 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 723 pl->link_config.duplex = DUPLEX_FULL; 724 725 /* We treat the "pause" and "asym-pause" terminology as 726 * defining the link partner's ability. 727 */ 728 if (fwnode_property_read_bool(fixed_node, "pause")) 729 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 730 pl->link_config.lp_advertising); 731 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 732 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 733 pl->link_config.lp_advertising); 734 735 if (ret == 0) { 736 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 737 GPIOD_IN, "?"); 738 739 if (!IS_ERR(desc)) 740 pl->link_gpio = desc; 741 else if (desc == ERR_PTR(-EPROBE_DEFER)) 742 ret = -EPROBE_DEFER; 743 } 744 fwnode_handle_put(fixed_node); 745 746 if (ret) 747 return ret; 748 } else { 749 u32 prop[5]; 750 751 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 752 NULL, 0); 753 if (ret != ARRAY_SIZE(prop)) { 754 phylink_err(pl, "broken fixed-link?\n"); 755 return -EINVAL; 756 } 757 758 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 759 prop, ARRAY_SIZE(prop)); 760 if (!ret) { 761 pl->link_config.duplex = prop[1] ? 762 DUPLEX_FULL : DUPLEX_HALF; 763 pl->link_config.speed = prop[2]; 764 if (prop[3]) 765 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 766 pl->link_config.lp_advertising); 767 if (prop[4]) 768 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 769 pl->link_config.lp_advertising); 770 } 771 } 772 773 if (pl->link_config.speed > SPEED_1000 && 774 pl->link_config.duplex != DUPLEX_FULL) 775 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 776 pl->link_config.speed); 777 778 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 779 linkmode_copy(pl->link_config.advertising, pl->supported); 780 phylink_validate(pl, pl->supported, &pl->link_config); 781 782 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 783 pl->supported, true); 784 linkmode_zero(pl->supported); 785 phylink_set(pl->supported, MII); 786 phylink_set(pl->supported, Pause); 787 phylink_set(pl->supported, Asym_Pause); 788 phylink_set(pl->supported, Autoneg); 789 if (s) { 790 __set_bit(s->bit, pl->supported); 791 __set_bit(s->bit, pl->link_config.lp_advertising); 792 } else { 793 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 794 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 795 pl->link_config.speed); 796 } 797 798 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 799 pl->supported); 800 801 pl->link_config.link = 1; 802 pl->link_config.an_complete = 1; 803 804 return 0; 805 } 806 807 static int phylink_parse_mode(struct phylink *pl, struct fwnode_handle *fwnode) 808 { 809 struct fwnode_handle *dn; 810 const char *managed; 811 812 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 813 if (dn || fwnode_property_present(fwnode, "fixed-link")) 814 pl->cfg_link_an_mode = MLO_AN_FIXED; 815 fwnode_handle_put(dn); 816 817 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 818 strcmp(managed, "in-band-status") == 0) || 819 pl->config->ovr_an_inband) { 820 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 821 phylink_err(pl, 822 "can't use both fixed-link and in-band-status\n"); 823 return -EINVAL; 824 } 825 826 linkmode_zero(pl->supported); 827 phylink_set(pl->supported, MII); 828 phylink_set(pl->supported, Autoneg); 829 phylink_set(pl->supported, Asym_Pause); 830 phylink_set(pl->supported, Pause); 831 pl->link_config.an_enabled = true; 832 pl->cfg_link_an_mode = MLO_AN_INBAND; 833 834 switch (pl->link_config.interface) { 835 case PHY_INTERFACE_MODE_SGMII: 836 case PHY_INTERFACE_MODE_QSGMII: 837 case PHY_INTERFACE_MODE_QUSGMII: 838 case PHY_INTERFACE_MODE_RGMII: 839 case PHY_INTERFACE_MODE_RGMII_ID: 840 case PHY_INTERFACE_MODE_RGMII_RXID: 841 case PHY_INTERFACE_MODE_RGMII_TXID: 842 case PHY_INTERFACE_MODE_RTBI: 843 phylink_set(pl->supported, 10baseT_Half); 844 phylink_set(pl->supported, 10baseT_Full); 845 phylink_set(pl->supported, 100baseT_Half); 846 phylink_set(pl->supported, 100baseT_Full); 847 phylink_set(pl->supported, 1000baseT_Half); 848 phylink_set(pl->supported, 1000baseT_Full); 849 break; 850 851 case PHY_INTERFACE_MODE_1000BASEX: 852 phylink_set(pl->supported, 1000baseX_Full); 853 break; 854 855 case PHY_INTERFACE_MODE_2500BASEX: 856 phylink_set(pl->supported, 2500baseX_Full); 857 break; 858 859 case PHY_INTERFACE_MODE_5GBASER: 860 phylink_set(pl->supported, 5000baseT_Full); 861 break; 862 863 case PHY_INTERFACE_MODE_25GBASER: 864 phylink_set(pl->supported, 25000baseCR_Full); 865 phylink_set(pl->supported, 25000baseKR_Full); 866 phylink_set(pl->supported, 25000baseSR_Full); 867 fallthrough; 868 case PHY_INTERFACE_MODE_USXGMII: 869 case PHY_INTERFACE_MODE_10GKR: 870 case PHY_INTERFACE_MODE_10GBASER: 871 phylink_set(pl->supported, 10baseT_Half); 872 phylink_set(pl->supported, 10baseT_Full); 873 phylink_set(pl->supported, 100baseT_Half); 874 phylink_set(pl->supported, 100baseT_Full); 875 phylink_set(pl->supported, 1000baseT_Half); 876 phylink_set(pl->supported, 1000baseT_Full); 877 phylink_set(pl->supported, 1000baseX_Full); 878 phylink_set(pl->supported, 1000baseKX_Full); 879 phylink_set(pl->supported, 2500baseT_Full); 880 phylink_set(pl->supported, 2500baseX_Full); 881 phylink_set(pl->supported, 5000baseT_Full); 882 phylink_set(pl->supported, 10000baseT_Full); 883 phylink_set(pl->supported, 10000baseKR_Full); 884 phylink_set(pl->supported, 10000baseKX4_Full); 885 phylink_set(pl->supported, 10000baseCR_Full); 886 phylink_set(pl->supported, 10000baseSR_Full); 887 phylink_set(pl->supported, 10000baseLR_Full); 888 phylink_set(pl->supported, 10000baseLRM_Full); 889 phylink_set(pl->supported, 10000baseER_Full); 890 break; 891 892 case PHY_INTERFACE_MODE_XLGMII: 893 phylink_set(pl->supported, 25000baseCR_Full); 894 phylink_set(pl->supported, 25000baseKR_Full); 895 phylink_set(pl->supported, 25000baseSR_Full); 896 phylink_set(pl->supported, 40000baseKR4_Full); 897 phylink_set(pl->supported, 40000baseCR4_Full); 898 phylink_set(pl->supported, 40000baseSR4_Full); 899 phylink_set(pl->supported, 40000baseLR4_Full); 900 phylink_set(pl->supported, 50000baseCR2_Full); 901 phylink_set(pl->supported, 50000baseKR2_Full); 902 phylink_set(pl->supported, 50000baseSR2_Full); 903 phylink_set(pl->supported, 50000baseKR_Full); 904 phylink_set(pl->supported, 50000baseSR_Full); 905 phylink_set(pl->supported, 50000baseCR_Full); 906 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 907 phylink_set(pl->supported, 50000baseDR_Full); 908 phylink_set(pl->supported, 100000baseKR4_Full); 909 phylink_set(pl->supported, 100000baseSR4_Full); 910 phylink_set(pl->supported, 100000baseCR4_Full); 911 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 912 phylink_set(pl->supported, 100000baseKR2_Full); 913 phylink_set(pl->supported, 100000baseSR2_Full); 914 phylink_set(pl->supported, 100000baseCR2_Full); 915 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 916 phylink_set(pl->supported, 100000baseDR2_Full); 917 break; 918 919 default: 920 phylink_err(pl, 921 "incorrect link mode %s for in-band status\n", 922 phy_modes(pl->link_config.interface)); 923 return -EINVAL; 924 } 925 926 linkmode_copy(pl->link_config.advertising, pl->supported); 927 928 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 929 phylink_err(pl, 930 "failed to validate link configuration for in-band status\n"); 931 return -EINVAL; 932 } 933 934 /* Check if MAC/PCS also supports Autoneg. */ 935 pl->link_config.an_enabled = phylink_test(pl->supported, Autoneg); 936 } 937 938 return 0; 939 } 940 941 static void phylink_apply_manual_flow(struct phylink *pl, 942 struct phylink_link_state *state) 943 { 944 /* If autoneg is disabled, pause AN is also disabled */ 945 if (!state->an_enabled) 946 state->pause &= ~MLO_PAUSE_AN; 947 948 /* Manual configuration of pause modes */ 949 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 950 state->pause = pl->link_config.pause; 951 } 952 953 static void phylink_resolve_flow(struct phylink_link_state *state) 954 { 955 bool tx_pause, rx_pause; 956 957 state->pause = MLO_PAUSE_NONE; 958 if (state->duplex == DUPLEX_FULL) { 959 linkmode_resolve_pause(state->advertising, 960 state->lp_advertising, 961 &tx_pause, &rx_pause); 962 if (tx_pause) 963 state->pause |= MLO_PAUSE_TX; 964 if (rx_pause) 965 state->pause |= MLO_PAUSE_RX; 966 } 967 } 968 969 static void phylink_pcs_poll_stop(struct phylink *pl) 970 { 971 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 972 del_timer(&pl->link_poll); 973 } 974 975 static void phylink_pcs_poll_start(struct phylink *pl) 976 { 977 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 978 mod_timer(&pl->link_poll, jiffies + HZ); 979 } 980 981 static void phylink_mac_config(struct phylink *pl, 982 const struct phylink_link_state *state) 983 { 984 phylink_dbg(pl, 985 "%s: mode=%s/%s/%s/%s/%s adv=%*pb pause=%02x link=%u an=%u\n", 986 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 987 phy_modes(state->interface), 988 phy_speed_to_str(state->speed), 989 phy_duplex_to_str(state->duplex), 990 phy_rate_matching_to_str(state->rate_matching), 991 __ETHTOOL_LINK_MODE_MASK_NBITS, state->advertising, 992 state->pause, state->link, state->an_enabled); 993 994 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, state); 995 } 996 997 static void phylink_mac_pcs_an_restart(struct phylink *pl) 998 { 999 if (pl->link_config.an_enabled && 1000 phy_interface_mode_is_8023z(pl->link_config.interface) && 1001 phylink_autoneg_inband(pl->cur_link_an_mode)) { 1002 if (pl->pcs) 1003 pl->pcs->ops->pcs_an_restart(pl->pcs); 1004 else if (pl->config->legacy_pre_march2020) 1005 pl->mac_ops->mac_an_restart(pl->config); 1006 } 1007 } 1008 1009 static void phylink_major_config(struct phylink *pl, bool restart, 1010 const struct phylink_link_state *state) 1011 { 1012 struct phylink_pcs *pcs = NULL; 1013 bool pcs_changed = false; 1014 int err; 1015 1016 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1017 1018 if (pl->using_mac_select_pcs) { 1019 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1020 if (IS_ERR(pcs)) { 1021 phylink_err(pl, 1022 "mac_select_pcs unexpectedly failed: %pe\n", 1023 pcs); 1024 return; 1025 } 1026 1027 pcs_changed = pcs && pl->pcs != pcs; 1028 } 1029 1030 phylink_pcs_poll_stop(pl); 1031 1032 if (pl->mac_ops->mac_prepare) { 1033 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1034 state->interface); 1035 if (err < 0) { 1036 phylink_err(pl, "mac_prepare failed: %pe\n", 1037 ERR_PTR(err)); 1038 return; 1039 } 1040 } 1041 1042 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1043 * for the change. 1044 */ 1045 if (pcs_changed) 1046 pl->pcs = pcs; 1047 1048 phylink_mac_config(pl, state); 1049 1050 if (pl->pcs) { 1051 err = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1052 state->interface, 1053 state->advertising, 1054 !!(pl->link_config.pause & 1055 MLO_PAUSE_AN)); 1056 if (err < 0) 1057 phylink_err(pl, "pcs_config failed: %pe\n", 1058 ERR_PTR(err)); 1059 if (err > 0) 1060 restart = true; 1061 } 1062 if (restart) 1063 phylink_mac_pcs_an_restart(pl); 1064 1065 if (pl->mac_ops->mac_finish) { 1066 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1067 state->interface); 1068 if (err < 0) 1069 phylink_err(pl, "mac_finish failed: %pe\n", 1070 ERR_PTR(err)); 1071 } 1072 1073 phylink_pcs_poll_start(pl); 1074 } 1075 1076 /* 1077 * Reconfigure for a change of inband advertisement. 1078 * If we have a separate PCS, we only need to call its pcs_config() method, 1079 * and then restart AN if it indicates something changed. Otherwise, we do 1080 * the full MAC reconfiguration. 1081 */ 1082 static int phylink_change_inband_advert(struct phylink *pl) 1083 { 1084 int ret; 1085 1086 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1087 return 0; 1088 1089 if (!pl->pcs && pl->config->legacy_pre_march2020) { 1090 /* Legacy method */ 1091 phylink_mac_config(pl, &pl->link_config); 1092 phylink_mac_pcs_an_restart(pl); 1093 return 0; 1094 } 1095 1096 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1097 phylink_an_mode_str(pl->cur_link_an_mode), 1098 phy_modes(pl->link_config.interface), 1099 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1100 pl->link_config.pause); 1101 1102 /* Modern PCS-based method; update the advert at the PCS, and 1103 * restart negotiation if the pcs_config() helper indicates that 1104 * the programmed advertisement has changed. 1105 */ 1106 ret = pl->pcs->ops->pcs_config(pl->pcs, pl->cur_link_an_mode, 1107 pl->link_config.interface, 1108 pl->link_config.advertising, 1109 !!(pl->link_config.pause & 1110 MLO_PAUSE_AN)); 1111 if (ret < 0) 1112 return ret; 1113 1114 if (ret > 0) 1115 phylink_mac_pcs_an_restart(pl); 1116 1117 return 0; 1118 } 1119 1120 static void phylink_mac_pcs_get_state(struct phylink *pl, 1121 struct phylink_link_state *state) 1122 { 1123 linkmode_copy(state->advertising, pl->link_config.advertising); 1124 linkmode_zero(state->lp_advertising); 1125 state->interface = pl->link_config.interface; 1126 state->an_enabled = pl->link_config.an_enabled; 1127 state->rate_matching = pl->link_config.rate_matching; 1128 if (state->an_enabled) { 1129 state->speed = SPEED_UNKNOWN; 1130 state->duplex = DUPLEX_UNKNOWN; 1131 state->pause = MLO_PAUSE_NONE; 1132 } else { 1133 state->speed = pl->link_config.speed; 1134 state->duplex = pl->link_config.duplex; 1135 state->pause = pl->link_config.pause; 1136 } 1137 state->an_complete = 0; 1138 state->link = 1; 1139 1140 if (pl->pcs) 1141 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1142 else if (pl->mac_ops->mac_pcs_get_state && 1143 pl->config->legacy_pre_march2020) 1144 pl->mac_ops->mac_pcs_get_state(pl->config, state); 1145 else 1146 state->link = 0; 1147 } 1148 1149 /* The fixed state is... fixed except for the link state, 1150 * which may be determined by a GPIO or a callback. 1151 */ 1152 static void phylink_get_fixed_state(struct phylink *pl, 1153 struct phylink_link_state *state) 1154 { 1155 *state = pl->link_config; 1156 if (pl->config->get_fixed_state) 1157 pl->config->get_fixed_state(pl->config, state); 1158 else if (pl->link_gpio) 1159 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1160 1161 phylink_resolve_flow(state); 1162 } 1163 1164 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1165 { 1166 struct phylink_link_state link_state; 1167 1168 switch (pl->cur_link_an_mode) { 1169 case MLO_AN_PHY: 1170 link_state = pl->phy_state; 1171 break; 1172 1173 case MLO_AN_FIXED: 1174 phylink_get_fixed_state(pl, &link_state); 1175 break; 1176 1177 case MLO_AN_INBAND: 1178 link_state = pl->link_config; 1179 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1180 link_state.pause = MLO_PAUSE_NONE; 1181 break; 1182 1183 default: /* can't happen */ 1184 return; 1185 } 1186 1187 link_state.link = false; 1188 1189 phylink_apply_manual_flow(pl, &link_state); 1190 phylink_major_config(pl, force_restart, &link_state); 1191 } 1192 1193 static const char *phylink_pause_to_str(int pause) 1194 { 1195 switch (pause & MLO_PAUSE_TXRX_MASK) { 1196 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1197 return "rx/tx"; 1198 case MLO_PAUSE_TX: 1199 return "tx"; 1200 case MLO_PAUSE_RX: 1201 return "rx"; 1202 default: 1203 return "off"; 1204 } 1205 } 1206 1207 static void phylink_link_up(struct phylink *pl, 1208 struct phylink_link_state link_state) 1209 { 1210 struct net_device *ndev = pl->netdev; 1211 int speed, duplex; 1212 bool rx_pause; 1213 1214 speed = link_state.speed; 1215 duplex = link_state.duplex; 1216 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1217 1218 switch (link_state.rate_matching) { 1219 case RATE_MATCH_PAUSE: 1220 /* The PHY is doing rate matchion from the media rate (in 1221 * the link_state) to the interface speed, and will send 1222 * pause frames to the MAC to limit its transmission speed. 1223 */ 1224 speed = phylink_interface_max_speed(link_state.interface); 1225 duplex = DUPLEX_FULL; 1226 rx_pause = true; 1227 break; 1228 1229 case RATE_MATCH_CRS: 1230 /* The PHY is doing rate matchion from the media rate (in 1231 * the link_state) to the interface speed, and will cause 1232 * collisions to the MAC to limit its transmission speed. 1233 */ 1234 speed = phylink_interface_max_speed(link_state.interface); 1235 duplex = DUPLEX_HALF; 1236 break; 1237 } 1238 1239 pl->cur_interface = link_state.interface; 1240 1241 if (pl->pcs && pl->pcs->ops->pcs_link_up) 1242 pl->pcs->ops->pcs_link_up(pl->pcs, pl->cur_link_an_mode, 1243 pl->cur_interface, speed, duplex); 1244 1245 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1246 pl->cur_interface, speed, duplex, 1247 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1248 1249 if (ndev) 1250 netif_carrier_on(ndev); 1251 1252 phylink_info(pl, 1253 "Link is Up - %s/%s - flow control %s\n", 1254 phy_speed_to_str(link_state.speed), 1255 phy_duplex_to_str(link_state.duplex), 1256 phylink_pause_to_str(link_state.pause)); 1257 } 1258 1259 static void phylink_link_down(struct phylink *pl) 1260 { 1261 struct net_device *ndev = pl->netdev; 1262 1263 if (ndev) 1264 netif_carrier_off(ndev); 1265 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1266 pl->cur_interface); 1267 phylink_info(pl, "Link is Down\n"); 1268 } 1269 1270 static void phylink_resolve(struct work_struct *w) 1271 { 1272 struct phylink *pl = container_of(w, struct phylink, resolve); 1273 struct phylink_link_state link_state; 1274 struct net_device *ndev = pl->netdev; 1275 bool mac_config = false; 1276 bool retrigger = false; 1277 bool cur_link_state; 1278 1279 mutex_lock(&pl->state_mutex); 1280 if (pl->netdev) 1281 cur_link_state = netif_carrier_ok(ndev); 1282 else 1283 cur_link_state = pl->old_link_state; 1284 1285 if (pl->phylink_disable_state) { 1286 pl->mac_link_dropped = false; 1287 link_state.link = false; 1288 } else if (pl->mac_link_dropped) { 1289 link_state.link = false; 1290 retrigger = true; 1291 } else { 1292 switch (pl->cur_link_an_mode) { 1293 case MLO_AN_PHY: 1294 link_state = pl->phy_state; 1295 phylink_apply_manual_flow(pl, &link_state); 1296 mac_config = link_state.link; 1297 break; 1298 1299 case MLO_AN_FIXED: 1300 phylink_get_fixed_state(pl, &link_state); 1301 mac_config = link_state.link; 1302 break; 1303 1304 case MLO_AN_INBAND: 1305 phylink_mac_pcs_get_state(pl, &link_state); 1306 1307 /* The PCS may have a latching link-fail indicator. 1308 * If the link was up, bring the link down and 1309 * re-trigger the resolve. Otherwise, re-read the 1310 * PCS state to get the current status of the link. 1311 */ 1312 if (!link_state.link) { 1313 if (cur_link_state) 1314 retrigger = true; 1315 else 1316 phylink_mac_pcs_get_state(pl, 1317 &link_state); 1318 } 1319 1320 /* If we have a phy, the "up" state is the union of 1321 * both the PHY and the MAC 1322 */ 1323 if (pl->phydev) 1324 link_state.link &= pl->phy_state.link; 1325 1326 /* Only update if the PHY link is up */ 1327 if (pl->phydev && pl->phy_state.link) { 1328 /* If the interface has changed, force a 1329 * link down event if the link isn't already 1330 * down, and re-resolve. 1331 */ 1332 if (link_state.interface != 1333 pl->phy_state.interface) { 1334 retrigger = true; 1335 link_state.link = false; 1336 } 1337 link_state.interface = pl->phy_state.interface; 1338 1339 /* If we are doing rate matching, then the 1340 * link speed/duplex comes from the PHY 1341 */ 1342 if (pl->phy_state.rate_matching) { 1343 link_state.rate_matching = 1344 pl->phy_state.rate_matching; 1345 link_state.speed = pl->phy_state.speed; 1346 link_state.duplex = 1347 pl->phy_state.duplex; 1348 } 1349 1350 /* If we have a PHY, we need to update with 1351 * the PHY flow control bits. 1352 */ 1353 link_state.pause = pl->phy_state.pause; 1354 mac_config = true; 1355 } 1356 phylink_apply_manual_flow(pl, &link_state); 1357 break; 1358 } 1359 } 1360 1361 if (mac_config) { 1362 if (link_state.interface != pl->link_config.interface) { 1363 /* The interface has changed, force the link down and 1364 * then reconfigure. 1365 */ 1366 if (cur_link_state) { 1367 phylink_link_down(pl); 1368 cur_link_state = false; 1369 } 1370 phylink_major_config(pl, false, &link_state); 1371 pl->link_config.interface = link_state.interface; 1372 } else if (!pl->pcs && pl->config->legacy_pre_march2020) { 1373 /* The interface remains unchanged, only the speed, 1374 * duplex or pause settings have changed. Call the 1375 * old mac_config() method to configure the MAC/PCS 1376 * only if we do not have a legacy MAC driver. 1377 */ 1378 phylink_mac_config(pl, &link_state); 1379 } 1380 } 1381 1382 if (link_state.link != cur_link_state) { 1383 pl->old_link_state = link_state.link; 1384 if (!link_state.link) 1385 phylink_link_down(pl); 1386 else 1387 phylink_link_up(pl, link_state); 1388 } 1389 if (!link_state.link && retrigger) { 1390 pl->mac_link_dropped = false; 1391 queue_work(system_power_efficient_wq, &pl->resolve); 1392 } 1393 mutex_unlock(&pl->state_mutex); 1394 } 1395 1396 static void phylink_run_resolve(struct phylink *pl) 1397 { 1398 if (!pl->phylink_disable_state) 1399 queue_work(system_power_efficient_wq, &pl->resolve); 1400 } 1401 1402 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1403 { 1404 unsigned long state = pl->phylink_disable_state; 1405 1406 set_bit(bit, &pl->phylink_disable_state); 1407 if (state == 0) { 1408 queue_work(system_power_efficient_wq, &pl->resolve); 1409 flush_work(&pl->resolve); 1410 } 1411 } 1412 1413 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1414 { 1415 clear_bit(bit, &pl->phylink_disable_state); 1416 phylink_run_resolve(pl); 1417 } 1418 1419 static void phylink_fixed_poll(struct timer_list *t) 1420 { 1421 struct phylink *pl = container_of(t, struct phylink, link_poll); 1422 1423 mod_timer(t, jiffies + HZ); 1424 1425 phylink_run_resolve(pl); 1426 } 1427 1428 static const struct sfp_upstream_ops sfp_phylink_ops; 1429 1430 static int phylink_register_sfp(struct phylink *pl, 1431 struct fwnode_handle *fwnode) 1432 { 1433 struct sfp_bus *bus; 1434 int ret; 1435 1436 if (!fwnode) 1437 return 0; 1438 1439 bus = sfp_bus_find_fwnode(fwnode); 1440 if (IS_ERR(bus)) { 1441 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1442 return PTR_ERR(bus); 1443 } 1444 1445 pl->sfp_bus = bus; 1446 1447 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1448 sfp_bus_put(bus); 1449 1450 return ret; 1451 } 1452 1453 /** 1454 * phylink_create() - create a phylink instance 1455 * @config: a pointer to the target &struct phylink_config 1456 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1457 * interface 1458 * @iface: the desired link mode defined by &typedef phy_interface_t 1459 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1460 * 1461 * Create a new phylink instance, and parse the link parameters found in @np. 1462 * This will parse in-band modes, fixed-link or SFP configuration. 1463 * 1464 * Note: the rtnl lock must not be held when calling this function. 1465 * 1466 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1467 * must use IS_ERR() to check for errors from this function. 1468 */ 1469 struct phylink *phylink_create(struct phylink_config *config, 1470 struct fwnode_handle *fwnode, 1471 phy_interface_t iface, 1472 const struct phylink_mac_ops *mac_ops) 1473 { 1474 bool using_mac_select_pcs = false; 1475 struct phylink *pl; 1476 int ret; 1477 1478 if (mac_ops->mac_select_pcs && 1479 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1480 ERR_PTR(-EOPNOTSUPP)) 1481 using_mac_select_pcs = true; 1482 1483 /* Validate the supplied configuration */ 1484 if (using_mac_select_pcs && 1485 phy_interface_empty(config->supported_interfaces)) { 1486 dev_err(config->dev, 1487 "phylink: error: empty supported_interfaces but mac_select_pcs() method present\n"); 1488 return ERR_PTR(-EINVAL); 1489 } 1490 1491 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1492 if (!pl) 1493 return ERR_PTR(-ENOMEM); 1494 1495 mutex_init(&pl->state_mutex); 1496 INIT_WORK(&pl->resolve, phylink_resolve); 1497 1498 pl->config = config; 1499 if (config->type == PHYLINK_NETDEV) { 1500 pl->netdev = to_net_dev(config->dev); 1501 } else if (config->type == PHYLINK_DEV) { 1502 pl->dev = config->dev; 1503 } else { 1504 kfree(pl); 1505 return ERR_PTR(-EINVAL); 1506 } 1507 1508 pl->using_mac_select_pcs = using_mac_select_pcs; 1509 pl->phy_state.interface = iface; 1510 pl->link_interface = iface; 1511 if (iface == PHY_INTERFACE_MODE_MOCA) 1512 pl->link_port = PORT_BNC; 1513 else 1514 pl->link_port = PORT_MII; 1515 pl->link_config.interface = iface; 1516 pl->link_config.pause = MLO_PAUSE_AN; 1517 pl->link_config.speed = SPEED_UNKNOWN; 1518 pl->link_config.duplex = DUPLEX_UNKNOWN; 1519 pl->link_config.an_enabled = true; 1520 pl->mac_ops = mac_ops; 1521 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1522 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1523 1524 bitmap_fill(pl->supported, __ETHTOOL_LINK_MODE_MASK_NBITS); 1525 linkmode_copy(pl->link_config.advertising, pl->supported); 1526 phylink_validate(pl, pl->supported, &pl->link_config); 1527 1528 ret = phylink_parse_mode(pl, fwnode); 1529 if (ret < 0) { 1530 kfree(pl); 1531 return ERR_PTR(ret); 1532 } 1533 1534 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1535 ret = phylink_parse_fixedlink(pl, fwnode); 1536 if (ret < 0) { 1537 kfree(pl); 1538 return ERR_PTR(ret); 1539 } 1540 } 1541 1542 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1543 1544 ret = phylink_register_sfp(pl, fwnode); 1545 if (ret < 0) { 1546 kfree(pl); 1547 return ERR_PTR(ret); 1548 } 1549 1550 return pl; 1551 } 1552 EXPORT_SYMBOL_GPL(phylink_create); 1553 1554 /** 1555 * phylink_destroy() - cleanup and destroy the phylink instance 1556 * @pl: a pointer to a &struct phylink returned from phylink_create() 1557 * 1558 * Destroy a phylink instance. Any PHY that has been attached must have been 1559 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1560 * 1561 * Note: the rtnl lock must not be held when calling this function. 1562 */ 1563 void phylink_destroy(struct phylink *pl) 1564 { 1565 sfp_bus_del_upstream(pl->sfp_bus); 1566 if (pl->link_gpio) 1567 gpiod_put(pl->link_gpio); 1568 1569 cancel_work_sync(&pl->resolve); 1570 kfree(pl); 1571 } 1572 EXPORT_SYMBOL_GPL(phylink_destroy); 1573 1574 static void phylink_phy_change(struct phy_device *phydev, bool up) 1575 { 1576 struct phylink *pl = phydev->phylink; 1577 bool tx_pause, rx_pause; 1578 1579 phy_get_pause(phydev, &tx_pause, &rx_pause); 1580 1581 mutex_lock(&pl->state_mutex); 1582 pl->phy_state.speed = phydev->speed; 1583 pl->phy_state.duplex = phydev->duplex; 1584 pl->phy_state.rate_matching = phydev->rate_matching; 1585 pl->phy_state.pause = MLO_PAUSE_NONE; 1586 if (tx_pause) 1587 pl->phy_state.pause |= MLO_PAUSE_TX; 1588 if (rx_pause) 1589 pl->phy_state.pause |= MLO_PAUSE_RX; 1590 pl->phy_state.interface = phydev->interface; 1591 pl->phy_state.link = up; 1592 mutex_unlock(&pl->state_mutex); 1593 1594 phylink_run_resolve(pl); 1595 1596 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1597 phy_modes(phydev->interface), 1598 phy_speed_to_str(phydev->speed), 1599 phy_duplex_to_str(phydev->duplex), 1600 phy_rate_matching_to_str(phydev->rate_matching), 1601 phylink_pause_to_str(pl->phy_state.pause)); 1602 } 1603 1604 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1605 phy_interface_t interface) 1606 { 1607 struct phylink_link_state config; 1608 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1609 char *irq_str; 1610 int ret; 1611 1612 /* 1613 * This is the new way of dealing with flow control for PHYs, 1614 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1615 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1616 * using our validate call to the MAC, we rely upon the MAC 1617 * clearing the bits from both supported and advertising fields. 1618 */ 1619 phy_support_asym_pause(phy); 1620 1621 memset(&config, 0, sizeof(config)); 1622 linkmode_copy(supported, phy->supported); 1623 linkmode_copy(config.advertising, phy->advertising); 1624 1625 /* Check whether we would use rate matching for the proposed interface 1626 * mode. 1627 */ 1628 config.rate_matching = phy_get_rate_matching(phy, interface); 1629 1630 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1631 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1632 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1633 * their Serdes is either unnecessary or not reasonable. 1634 * 1635 * For these which switch interface modes, we really need to know which 1636 * interface modes the PHY supports to properly work out which ethtool 1637 * linkmodes can be supported. For now, as a work-around, we validate 1638 * against all interface modes, which may lead to more ethtool link 1639 * modes being advertised than are actually supported. 1640 */ 1641 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1642 interface != PHY_INTERFACE_MODE_RXAUI && 1643 interface != PHY_INTERFACE_MODE_XAUI && 1644 interface != PHY_INTERFACE_MODE_USXGMII) 1645 config.interface = PHY_INTERFACE_MODE_NA; 1646 else 1647 config.interface = interface; 1648 1649 ret = phylink_validate(pl, supported, &config); 1650 if (ret) { 1651 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1652 phy_modes(config.interface), 1653 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1654 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1655 ERR_PTR(ret)); 1656 return ret; 1657 } 1658 1659 phy->phylink = pl; 1660 phy->phy_link_change = phylink_phy_change; 1661 1662 irq_str = phy_attached_info_irq(phy); 1663 phylink_info(pl, 1664 "PHY [%s] driver [%s] (irq=%s)\n", 1665 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1666 kfree(irq_str); 1667 1668 mutex_lock(&phy->lock); 1669 mutex_lock(&pl->state_mutex); 1670 pl->phydev = phy; 1671 pl->phy_state.interface = interface; 1672 pl->phy_state.pause = MLO_PAUSE_NONE; 1673 pl->phy_state.speed = SPEED_UNKNOWN; 1674 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1675 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1676 linkmode_copy(pl->supported, supported); 1677 linkmode_copy(pl->link_config.advertising, config.advertising); 1678 1679 /* Restrict the phy advertisement according to the MAC support. */ 1680 linkmode_copy(phy->advertising, config.advertising); 1681 mutex_unlock(&pl->state_mutex); 1682 mutex_unlock(&phy->lock); 1683 1684 phylink_dbg(pl, 1685 "phy: %s setting supported %*pb advertising %*pb\n", 1686 phy_modes(interface), 1687 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1688 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1689 1690 if (phy_interrupt_is_valid(phy)) 1691 phy_request_interrupt(phy); 1692 1693 if (pl->config->mac_managed_pm) 1694 phy->mac_managed_pm = true; 1695 1696 return 0; 1697 } 1698 1699 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1700 phy_interface_t interface) 1701 { 1702 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1703 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1704 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1705 return -EINVAL; 1706 1707 if (pl->phydev) 1708 return -EBUSY; 1709 1710 return phy_attach_direct(pl->netdev, phy, 0, interface); 1711 } 1712 1713 /** 1714 * phylink_connect_phy() - connect a PHY to the phylink instance 1715 * @pl: a pointer to a &struct phylink returned from phylink_create() 1716 * @phy: a pointer to a &struct phy_device. 1717 * 1718 * Connect @phy to the phylink instance specified by @pl by calling 1719 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1720 * capabilities, start the PHYLIB state machine and enable any interrupts 1721 * that the PHY supports. 1722 * 1723 * This updates the phylink's ethtool supported and advertising link mode 1724 * masks. 1725 * 1726 * Returns 0 on success or a negative errno. 1727 */ 1728 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1729 { 1730 int ret; 1731 1732 /* Use PHY device/driver interface */ 1733 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1734 pl->link_interface = phy->interface; 1735 pl->link_config.interface = pl->link_interface; 1736 } 1737 1738 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1739 if (ret < 0) 1740 return ret; 1741 1742 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1743 if (ret) 1744 phy_detach(phy); 1745 1746 return ret; 1747 } 1748 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1749 1750 /** 1751 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1752 * @pl: a pointer to a &struct phylink returned from phylink_create() 1753 * @dn: a pointer to a &struct device_node. 1754 * @flags: PHY-specific flags to communicate to the PHY device driver 1755 * 1756 * Connect the phy specified in the device node @dn to the phylink instance 1757 * specified by @pl. Actions specified in phylink_connect_phy() will be 1758 * performed. 1759 * 1760 * Returns 0 on success or a negative errno. 1761 */ 1762 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1763 u32 flags) 1764 { 1765 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1766 } 1767 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1768 1769 /** 1770 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1771 * @pl: a pointer to a &struct phylink returned from phylink_create() 1772 * @fwnode: a pointer to a &struct fwnode_handle. 1773 * @flags: PHY-specific flags to communicate to the PHY device driver 1774 * 1775 * Connect the phy specified @fwnode to the phylink instance specified 1776 * by @pl. 1777 * 1778 * Returns 0 on success or a negative errno. 1779 */ 1780 int phylink_fwnode_phy_connect(struct phylink *pl, 1781 struct fwnode_handle *fwnode, 1782 u32 flags) 1783 { 1784 struct fwnode_handle *phy_fwnode; 1785 struct phy_device *phy_dev; 1786 int ret; 1787 1788 /* Fixed links and 802.3z are handled without needing a PHY */ 1789 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1790 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1791 phy_interface_mode_is_8023z(pl->link_interface))) 1792 return 0; 1793 1794 phy_fwnode = fwnode_get_phy_node(fwnode); 1795 if (IS_ERR(phy_fwnode)) { 1796 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1797 return -ENODEV; 1798 return 0; 1799 } 1800 1801 phy_dev = fwnode_phy_find_device(phy_fwnode); 1802 /* We're done with the phy_node handle */ 1803 fwnode_handle_put(phy_fwnode); 1804 if (!phy_dev) 1805 return -ENODEV; 1806 1807 /* Use PHY device/driver interface */ 1808 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1809 pl->link_interface = phy_dev->interface; 1810 pl->link_config.interface = pl->link_interface; 1811 } 1812 1813 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1814 pl->link_interface); 1815 phy_device_free(phy_dev); 1816 if (ret) 1817 return ret; 1818 1819 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1820 if (ret) 1821 phy_detach(phy_dev); 1822 1823 return ret; 1824 } 1825 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1826 1827 /** 1828 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1829 * instance. 1830 * @pl: a pointer to a &struct phylink returned from phylink_create() 1831 * 1832 * Disconnect any current PHY from the phylink instance described by @pl. 1833 */ 1834 void phylink_disconnect_phy(struct phylink *pl) 1835 { 1836 struct phy_device *phy; 1837 1838 ASSERT_RTNL(); 1839 1840 phy = pl->phydev; 1841 if (phy) { 1842 mutex_lock(&phy->lock); 1843 mutex_lock(&pl->state_mutex); 1844 pl->phydev = NULL; 1845 mutex_unlock(&pl->state_mutex); 1846 mutex_unlock(&phy->lock); 1847 flush_work(&pl->resolve); 1848 1849 phy_disconnect(phy); 1850 } 1851 } 1852 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1853 1854 /** 1855 * phylink_mac_change() - notify phylink of a change in MAC state 1856 * @pl: a pointer to a &struct phylink returned from phylink_create() 1857 * @up: indicates whether the link is currently up. 1858 * 1859 * The MAC driver should call this driver when the state of its link 1860 * changes (eg, link failure, new negotiation results, etc.) 1861 */ 1862 void phylink_mac_change(struct phylink *pl, bool up) 1863 { 1864 if (!up) 1865 pl->mac_link_dropped = true; 1866 phylink_run_resolve(pl); 1867 phylink_dbg(pl, "mac link %s\n", up ? "up" : "down"); 1868 } 1869 EXPORT_SYMBOL_GPL(phylink_mac_change); 1870 1871 static irqreturn_t phylink_link_handler(int irq, void *data) 1872 { 1873 struct phylink *pl = data; 1874 1875 phylink_run_resolve(pl); 1876 1877 return IRQ_HANDLED; 1878 } 1879 1880 /** 1881 * phylink_start() - start a phylink instance 1882 * @pl: a pointer to a &struct phylink returned from phylink_create() 1883 * 1884 * Start the phylink instance specified by @pl, configuring the MAC for the 1885 * desired link mode(s) and negotiation style. This should be called from the 1886 * network device driver's &struct net_device_ops ndo_open() method. 1887 */ 1888 void phylink_start(struct phylink *pl) 1889 { 1890 bool poll = false; 1891 1892 ASSERT_RTNL(); 1893 1894 phylink_info(pl, "configuring for %s/%s link mode\n", 1895 phylink_an_mode_str(pl->cur_link_an_mode), 1896 phy_modes(pl->link_config.interface)); 1897 1898 /* Always set the carrier off */ 1899 if (pl->netdev) 1900 netif_carrier_off(pl->netdev); 1901 1902 /* Apply the link configuration to the MAC when starting. This allows 1903 * a fixed-link to start with the correct parameters, and also 1904 * ensures that we set the appropriate advertisement for Serdes links. 1905 * 1906 * Restart autonegotiation if using 802.3z to ensure that the link 1907 * parameters are properly negotiated. This is necessary for DSA 1908 * switches using 802.3z negotiation to ensure they see our modes. 1909 */ 1910 phylink_mac_initial_config(pl, true); 1911 1912 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 1913 1914 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 1915 int irq = gpiod_to_irq(pl->link_gpio); 1916 1917 if (irq > 0) { 1918 if (!request_irq(irq, phylink_link_handler, 1919 IRQF_TRIGGER_RISING | 1920 IRQF_TRIGGER_FALLING, 1921 "netdev link", pl)) 1922 pl->link_irq = irq; 1923 else 1924 irq = 0; 1925 } 1926 if (irq <= 0) 1927 poll = true; 1928 } 1929 1930 switch (pl->cfg_link_an_mode) { 1931 case MLO_AN_FIXED: 1932 poll |= pl->config->poll_fixed_state; 1933 break; 1934 case MLO_AN_INBAND: 1935 if (pl->pcs) 1936 poll |= pl->pcs->poll; 1937 break; 1938 } 1939 if (poll) 1940 mod_timer(&pl->link_poll, jiffies + HZ); 1941 if (pl->phydev) 1942 phy_start(pl->phydev); 1943 if (pl->sfp_bus) 1944 sfp_upstream_start(pl->sfp_bus); 1945 } 1946 EXPORT_SYMBOL_GPL(phylink_start); 1947 1948 /** 1949 * phylink_stop() - stop a phylink instance 1950 * @pl: a pointer to a &struct phylink returned from phylink_create() 1951 * 1952 * Stop the phylink instance specified by @pl. This should be called from the 1953 * network device driver's &struct net_device_ops ndo_stop() method. The 1954 * network device's carrier state should not be changed prior to calling this 1955 * function. 1956 * 1957 * This will synchronously bring down the link if the link is not already 1958 * down (in other words, it will trigger a mac_link_down() method call.) 1959 */ 1960 void phylink_stop(struct phylink *pl) 1961 { 1962 ASSERT_RTNL(); 1963 1964 if (pl->sfp_bus) 1965 sfp_upstream_stop(pl->sfp_bus); 1966 if (pl->phydev) 1967 phy_stop(pl->phydev); 1968 del_timer_sync(&pl->link_poll); 1969 if (pl->link_irq) { 1970 free_irq(pl->link_irq, pl); 1971 pl->link_irq = 0; 1972 } 1973 1974 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 1975 } 1976 EXPORT_SYMBOL_GPL(phylink_stop); 1977 1978 /** 1979 * phylink_suspend() - handle a network device suspend event 1980 * @pl: a pointer to a &struct phylink returned from phylink_create() 1981 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 1982 * 1983 * Handle a network device suspend event. There are several cases: 1984 * 1985 * - If Wake-on-Lan is not active, we can bring down the link between 1986 * the MAC and PHY by calling phylink_stop(). 1987 * - If Wake-on-Lan is active, and being handled only by the PHY, we 1988 * can also bring down the link between the MAC and PHY. 1989 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 1990 * still needs to receive packets, so we can not bring the link down. 1991 */ 1992 void phylink_suspend(struct phylink *pl, bool mac_wol) 1993 { 1994 ASSERT_RTNL(); 1995 1996 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 1997 /* Wake-on-Lan enabled, MAC handling */ 1998 mutex_lock(&pl->state_mutex); 1999 2000 /* Stop the resolver bringing the link up */ 2001 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2002 2003 /* Disable the carrier, to prevent transmit timeouts, 2004 * but one would hope all packets have been sent. This 2005 * also means phylink_resolve() will do nothing. 2006 */ 2007 if (pl->netdev) 2008 netif_carrier_off(pl->netdev); 2009 else 2010 pl->old_link_state = false; 2011 2012 /* We do not call mac_link_down() here as we want the 2013 * link to remain up to receive the WoL packets. 2014 */ 2015 mutex_unlock(&pl->state_mutex); 2016 } else { 2017 phylink_stop(pl); 2018 } 2019 } 2020 EXPORT_SYMBOL_GPL(phylink_suspend); 2021 2022 /** 2023 * phylink_resume() - handle a network device resume event 2024 * @pl: a pointer to a &struct phylink returned from phylink_create() 2025 * 2026 * Undo the effects of phylink_suspend(), returning the link to an 2027 * operational state. 2028 */ 2029 void phylink_resume(struct phylink *pl) 2030 { 2031 ASSERT_RTNL(); 2032 2033 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2034 /* Wake-on-Lan enabled, MAC handling */ 2035 2036 /* Call mac_link_down() so we keep the overall state balanced. 2037 * Do this under the state_mutex lock for consistency. This 2038 * will cause a "Link Down" message to be printed during 2039 * resume, which is harmless - the true link state will be 2040 * printed when we run a resolve. 2041 */ 2042 mutex_lock(&pl->state_mutex); 2043 phylink_link_down(pl); 2044 mutex_unlock(&pl->state_mutex); 2045 2046 /* Re-apply the link parameters so that all the settings get 2047 * restored to the MAC. 2048 */ 2049 phylink_mac_initial_config(pl, true); 2050 2051 /* Re-enable and re-resolve the link parameters */ 2052 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2053 } else { 2054 phylink_start(pl); 2055 } 2056 } 2057 EXPORT_SYMBOL_GPL(phylink_resume); 2058 2059 /** 2060 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2061 * @pl: a pointer to a &struct phylink returned from phylink_create() 2062 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2063 * 2064 * Read the wake on lan parameters from the PHY attached to the phylink 2065 * instance specified by @pl. If no PHY is currently attached, report no 2066 * support for wake on lan. 2067 */ 2068 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2069 { 2070 ASSERT_RTNL(); 2071 2072 wol->supported = 0; 2073 wol->wolopts = 0; 2074 2075 if (pl->phydev) 2076 phy_ethtool_get_wol(pl->phydev, wol); 2077 } 2078 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2079 2080 /** 2081 * phylink_ethtool_set_wol() - set wake on lan parameters 2082 * @pl: a pointer to a &struct phylink returned from phylink_create() 2083 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2084 * 2085 * Set the wake on lan parameters for the PHY attached to the phylink 2086 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2087 * error. 2088 * 2089 * Returns zero on success or negative errno code. 2090 */ 2091 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2092 { 2093 int ret = -EOPNOTSUPP; 2094 2095 ASSERT_RTNL(); 2096 2097 if (pl->phydev) 2098 ret = phy_ethtool_set_wol(pl->phydev, wol); 2099 2100 return ret; 2101 } 2102 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2103 2104 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2105 { 2106 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2107 2108 linkmode_zero(mask); 2109 phylink_set_port_modes(mask); 2110 2111 linkmode_and(dst, dst, mask); 2112 linkmode_or(dst, dst, b); 2113 } 2114 2115 static void phylink_get_ksettings(const struct phylink_link_state *state, 2116 struct ethtool_link_ksettings *kset) 2117 { 2118 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2119 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2120 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2121 kset->base.speed = state->speed; 2122 kset->base.duplex = state->duplex; 2123 } 2124 kset->base.autoneg = state->an_enabled ? AUTONEG_ENABLE : 2125 AUTONEG_DISABLE; 2126 } 2127 2128 /** 2129 * phylink_ethtool_ksettings_get() - get the current link settings 2130 * @pl: a pointer to a &struct phylink returned from phylink_create() 2131 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2132 * 2133 * Read the current link settings for the phylink instance specified by @pl. 2134 * This will be the link settings read from the MAC, PHY or fixed link 2135 * settings depending on the current negotiation mode. 2136 */ 2137 int phylink_ethtool_ksettings_get(struct phylink *pl, 2138 struct ethtool_link_ksettings *kset) 2139 { 2140 struct phylink_link_state link_state; 2141 2142 ASSERT_RTNL(); 2143 2144 if (pl->phydev) 2145 phy_ethtool_ksettings_get(pl->phydev, kset); 2146 else 2147 kset->base.port = pl->link_port; 2148 2149 linkmode_copy(kset->link_modes.supported, pl->supported); 2150 2151 switch (pl->cur_link_an_mode) { 2152 case MLO_AN_FIXED: 2153 /* We are using fixed settings. Report these as the 2154 * current link settings - and note that these also 2155 * represent the supported speeds/duplex/pause modes. 2156 */ 2157 phylink_get_fixed_state(pl, &link_state); 2158 phylink_get_ksettings(&link_state, kset); 2159 break; 2160 2161 case MLO_AN_INBAND: 2162 /* If there is a phy attached, then use the reported 2163 * settings from the phy with no modification. 2164 */ 2165 if (pl->phydev) 2166 break; 2167 2168 phylink_mac_pcs_get_state(pl, &link_state); 2169 2170 /* The MAC is reporting the link results from its own PCS 2171 * layer via in-band status. Report these as the current 2172 * link settings. 2173 */ 2174 phylink_get_ksettings(&link_state, kset); 2175 break; 2176 } 2177 2178 return 0; 2179 } 2180 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2181 2182 /** 2183 * phylink_ethtool_ksettings_set() - set the link settings 2184 * @pl: a pointer to a &struct phylink returned from phylink_create() 2185 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2186 */ 2187 int phylink_ethtool_ksettings_set(struct phylink *pl, 2188 const struct ethtool_link_ksettings *kset) 2189 { 2190 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2191 struct phylink_link_state config; 2192 const struct phy_setting *s; 2193 2194 ASSERT_RTNL(); 2195 2196 if (pl->phydev) { 2197 /* We can rely on phylib for this update; we also do not need 2198 * to update the pl->link_config settings: 2199 * - the configuration returned via ksettings_get() will come 2200 * from phylib whenever a PHY is present. 2201 * - link_config.interface will be updated by the PHY calling 2202 * back via phylink_phy_change() and a subsequent resolve. 2203 * - initial link configuration for PHY mode comes from the 2204 * last phy state updated via phylink_phy_change(). 2205 * - other configuration changes (e.g. pause modes) are 2206 * performed directly via phylib. 2207 * - if in in-band mode with a PHY, the link configuration 2208 * is passed on the link from the PHY, and all of 2209 * link_config.{speed,duplex,an_enabled,pause} are not used. 2210 * - the only possible use would be link_config.advertising 2211 * pause modes when in 1000base-X mode with a PHY, but in 2212 * the presence of a PHY, this should not be changed as that 2213 * should be determined from the media side advertisement. 2214 */ 2215 return phy_ethtool_ksettings_set(pl->phydev, kset); 2216 } 2217 2218 config = pl->link_config; 2219 2220 /* Mask out unsupported advertisements */ 2221 linkmode_and(config.advertising, kset->link_modes.advertising, 2222 pl->supported); 2223 2224 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2225 switch (kset->base.autoneg) { 2226 case AUTONEG_DISABLE: 2227 /* Autonegotiation disabled, select a suitable speed and 2228 * duplex. 2229 */ 2230 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2231 pl->supported, false); 2232 if (!s) 2233 return -EINVAL; 2234 2235 /* If we have a fixed link, refuse to change link parameters. 2236 * If the link parameters match, accept them but do nothing. 2237 */ 2238 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2239 if (s->speed != pl->link_config.speed || 2240 s->duplex != pl->link_config.duplex) 2241 return -EINVAL; 2242 return 0; 2243 } 2244 2245 config.speed = s->speed; 2246 config.duplex = s->duplex; 2247 break; 2248 2249 case AUTONEG_ENABLE: 2250 /* If we have a fixed link, allow autonegotiation (since that 2251 * is our default case) but do not allow the advertisement to 2252 * be changed. If the advertisement matches, simply return. 2253 */ 2254 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2255 if (!linkmode_equal(config.advertising, 2256 pl->link_config.advertising)) 2257 return -EINVAL; 2258 return 0; 2259 } 2260 2261 config.speed = SPEED_UNKNOWN; 2262 config.duplex = DUPLEX_UNKNOWN; 2263 break; 2264 2265 default: 2266 return -EINVAL; 2267 } 2268 2269 /* We have ruled out the case with a PHY attached, and the 2270 * fixed-link cases. All that is left are in-band links. 2271 */ 2272 config.an_enabled = kset->base.autoneg == AUTONEG_ENABLE; 2273 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2274 config.an_enabled); 2275 2276 /* If this link is with an SFP, ensure that changes to advertised modes 2277 * also cause the associated interface to be selected such that the 2278 * link can be configured correctly. 2279 */ 2280 if (pl->sfp_bus) { 2281 config.interface = sfp_select_interface(pl->sfp_bus, 2282 config.advertising); 2283 if (config.interface == PHY_INTERFACE_MODE_NA) { 2284 phylink_err(pl, 2285 "selection of interface failed, advertisement %*pb\n", 2286 __ETHTOOL_LINK_MODE_MASK_NBITS, 2287 config.advertising); 2288 return -EINVAL; 2289 } 2290 2291 /* Revalidate with the selected interface */ 2292 linkmode_copy(support, pl->supported); 2293 if (phylink_validate(pl, support, &config)) { 2294 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2295 phylink_an_mode_str(pl->cur_link_an_mode), 2296 phy_modes(config.interface), 2297 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2298 return -EINVAL; 2299 } 2300 } else { 2301 /* Validate without changing the current supported mask. */ 2302 linkmode_copy(support, pl->supported); 2303 if (phylink_validate(pl, support, &config)) 2304 return -EINVAL; 2305 } 2306 2307 /* If autonegotiation is enabled, we must have an advertisement */ 2308 if (config.an_enabled && phylink_is_empty_linkmode(config.advertising)) 2309 return -EINVAL; 2310 2311 mutex_lock(&pl->state_mutex); 2312 pl->link_config.speed = config.speed; 2313 pl->link_config.duplex = config.duplex; 2314 pl->link_config.an_enabled = config.an_enabled; 2315 2316 if (pl->link_config.interface != config.interface) { 2317 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2318 /* We need to force the link down, then change the interface */ 2319 if (pl->old_link_state) { 2320 phylink_link_down(pl); 2321 pl->old_link_state = false; 2322 } 2323 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2324 &pl->phylink_disable_state)) 2325 phylink_major_config(pl, false, &config); 2326 pl->link_config.interface = config.interface; 2327 linkmode_copy(pl->link_config.advertising, config.advertising); 2328 } else if (!linkmode_equal(pl->link_config.advertising, 2329 config.advertising)) { 2330 linkmode_copy(pl->link_config.advertising, config.advertising); 2331 phylink_change_inband_advert(pl); 2332 } 2333 mutex_unlock(&pl->state_mutex); 2334 2335 return 0; 2336 } 2337 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2338 2339 /** 2340 * phylink_ethtool_nway_reset() - restart negotiation 2341 * @pl: a pointer to a &struct phylink returned from phylink_create() 2342 * 2343 * Restart negotiation for the phylink instance specified by @pl. This will 2344 * cause any attached phy to restart negotiation with the link partner, and 2345 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2346 * negotiation. 2347 * 2348 * Returns zero on success, or negative error code. 2349 */ 2350 int phylink_ethtool_nway_reset(struct phylink *pl) 2351 { 2352 int ret = 0; 2353 2354 ASSERT_RTNL(); 2355 2356 if (pl->phydev) 2357 ret = phy_restart_aneg(pl->phydev); 2358 phylink_mac_pcs_an_restart(pl); 2359 2360 return ret; 2361 } 2362 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2363 2364 /** 2365 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2366 * @pl: a pointer to a &struct phylink returned from phylink_create() 2367 * @pause: a pointer to a &struct ethtool_pauseparam 2368 */ 2369 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2370 struct ethtool_pauseparam *pause) 2371 { 2372 ASSERT_RTNL(); 2373 2374 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2375 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2376 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2377 } 2378 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2379 2380 /** 2381 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2382 * @pl: a pointer to a &struct phylink returned from phylink_create() 2383 * @pause: a pointer to a &struct ethtool_pauseparam 2384 */ 2385 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2386 struct ethtool_pauseparam *pause) 2387 { 2388 struct phylink_link_state *config = &pl->link_config; 2389 bool manual_changed; 2390 int pause_state; 2391 2392 ASSERT_RTNL(); 2393 2394 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2395 return -EOPNOTSUPP; 2396 2397 if (!phylink_test(pl->supported, Pause) && 2398 !phylink_test(pl->supported, Asym_Pause)) 2399 return -EOPNOTSUPP; 2400 2401 if (!phylink_test(pl->supported, Asym_Pause) && 2402 pause->rx_pause != pause->tx_pause) 2403 return -EINVAL; 2404 2405 pause_state = 0; 2406 if (pause->autoneg) 2407 pause_state |= MLO_PAUSE_AN; 2408 if (pause->rx_pause) 2409 pause_state |= MLO_PAUSE_RX; 2410 if (pause->tx_pause) 2411 pause_state |= MLO_PAUSE_TX; 2412 2413 mutex_lock(&pl->state_mutex); 2414 /* 2415 * See the comments for linkmode_set_pause(), wrt the deficiencies 2416 * with the current implementation. A solution to this issue would 2417 * be: 2418 * ethtool Local device 2419 * rx tx Pause AsymDir 2420 * 0 0 0 0 2421 * 1 0 1 1 2422 * 0 1 0 1 2423 * 1 1 1 1 2424 * and then use the ethtool rx/tx enablement status to mask the 2425 * rx/tx pause resolution. 2426 */ 2427 linkmode_set_pause(config->advertising, pause->tx_pause, 2428 pause->rx_pause); 2429 2430 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2431 (!(pause_state & MLO_PAUSE_AN) && 2432 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2433 2434 config->pause = pause_state; 2435 2436 /* Update our in-band advertisement, triggering a renegotiation if 2437 * the advertisement changed. 2438 */ 2439 if (!pl->phydev) 2440 phylink_change_inband_advert(pl); 2441 2442 mutex_unlock(&pl->state_mutex); 2443 2444 /* If we have a PHY, a change of the pause frame advertisement will 2445 * cause phylib to renegotiate (if AN is enabled) which will in turn 2446 * call our phylink_phy_change() and trigger a resolve. Note that 2447 * we can't hold our state mutex while calling phy_set_asym_pause(). 2448 */ 2449 if (pl->phydev) 2450 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2451 pause->tx_pause); 2452 2453 /* If the manual pause settings changed, make sure we trigger a 2454 * resolve to update their state; we can not guarantee that the 2455 * link will cycle. 2456 */ 2457 if (manual_changed) { 2458 pl->mac_link_dropped = true; 2459 phylink_run_resolve(pl); 2460 } 2461 2462 return 0; 2463 } 2464 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2465 2466 /** 2467 * phylink_get_eee_err() - read the energy efficient ethernet error 2468 * counter 2469 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2470 * 2471 * Read the Energy Efficient Ethernet error counter from the PHY associated 2472 * with the phylink instance specified by @pl. 2473 * 2474 * Returns positive error counter value, or negative error code. 2475 */ 2476 int phylink_get_eee_err(struct phylink *pl) 2477 { 2478 int ret = 0; 2479 2480 ASSERT_RTNL(); 2481 2482 if (pl->phydev) 2483 ret = phy_get_eee_err(pl->phydev); 2484 2485 return ret; 2486 } 2487 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2488 2489 /** 2490 * phylink_init_eee() - init and check the EEE features 2491 * @pl: a pointer to a &struct phylink returned from phylink_create() 2492 * @clk_stop_enable: allow PHY to stop receive clock 2493 * 2494 * Must be called either with RTNL held or within mac_link_up() 2495 */ 2496 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2497 { 2498 int ret = -EOPNOTSUPP; 2499 2500 if (pl->phydev) 2501 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2502 2503 return ret; 2504 } 2505 EXPORT_SYMBOL_GPL(phylink_init_eee); 2506 2507 /** 2508 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2509 * @pl: a pointer to a &struct phylink returned from phylink_create() 2510 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2511 */ 2512 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2513 { 2514 int ret = -EOPNOTSUPP; 2515 2516 ASSERT_RTNL(); 2517 2518 if (pl->phydev) 2519 ret = phy_ethtool_get_eee(pl->phydev, eee); 2520 2521 return ret; 2522 } 2523 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2524 2525 /** 2526 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2527 * @pl: a pointer to a &struct phylink returned from phylink_create() 2528 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2529 */ 2530 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2531 { 2532 int ret = -EOPNOTSUPP; 2533 2534 ASSERT_RTNL(); 2535 2536 if (pl->phydev) 2537 ret = phy_ethtool_set_eee(pl->phydev, eee); 2538 2539 return ret; 2540 } 2541 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2542 2543 /* This emulates MII registers for a fixed-mode phy operating as per the 2544 * passed in state. "aneg" defines if we report negotiation is possible. 2545 * 2546 * FIXME: should deal with negotiation state too. 2547 */ 2548 static int phylink_mii_emul_read(unsigned int reg, 2549 struct phylink_link_state *state) 2550 { 2551 struct fixed_phy_status fs; 2552 unsigned long *lpa = state->lp_advertising; 2553 int val; 2554 2555 fs.link = state->link; 2556 fs.speed = state->speed; 2557 fs.duplex = state->duplex; 2558 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2559 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2560 2561 val = swphy_read_reg(reg, &fs); 2562 if (reg == MII_BMSR) { 2563 if (!state->an_complete) 2564 val &= ~BMSR_ANEGCOMPLETE; 2565 } 2566 return val; 2567 } 2568 2569 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2570 unsigned int reg) 2571 { 2572 struct phy_device *phydev = pl->phydev; 2573 int prtad, devad; 2574 2575 if (mdio_phy_id_is_c45(phy_id)) { 2576 prtad = mdio_phy_id_prtad(phy_id); 2577 devad = mdio_phy_id_devad(phy_id); 2578 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2579 reg); 2580 } 2581 2582 if (phydev->is_c45) { 2583 switch (reg) { 2584 case MII_BMCR: 2585 case MII_BMSR: 2586 case MII_PHYSID1: 2587 case MII_PHYSID2: 2588 devad = __ffs(phydev->c45_ids.mmds_present); 2589 break; 2590 case MII_ADVERTISE: 2591 case MII_LPA: 2592 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2593 return -EINVAL; 2594 devad = MDIO_MMD_AN; 2595 if (reg == MII_ADVERTISE) 2596 reg = MDIO_AN_ADVERTISE; 2597 else 2598 reg = MDIO_AN_LPA; 2599 break; 2600 default: 2601 return -EINVAL; 2602 } 2603 prtad = phy_id; 2604 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2605 reg); 2606 } 2607 2608 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2609 } 2610 2611 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2612 unsigned int reg, unsigned int val) 2613 { 2614 struct phy_device *phydev = pl->phydev; 2615 int prtad, devad; 2616 2617 if (mdio_phy_id_is_c45(phy_id)) { 2618 prtad = mdio_phy_id_prtad(phy_id); 2619 devad = mdio_phy_id_devad(phy_id); 2620 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2621 reg, val); 2622 } 2623 2624 if (phydev->is_c45) { 2625 switch (reg) { 2626 case MII_BMCR: 2627 case MII_BMSR: 2628 case MII_PHYSID1: 2629 case MII_PHYSID2: 2630 devad = __ffs(phydev->c45_ids.mmds_present); 2631 break; 2632 case MII_ADVERTISE: 2633 case MII_LPA: 2634 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2635 return -EINVAL; 2636 devad = MDIO_MMD_AN; 2637 if (reg == MII_ADVERTISE) 2638 reg = MDIO_AN_ADVERTISE; 2639 else 2640 reg = MDIO_AN_LPA; 2641 break; 2642 default: 2643 return -EINVAL; 2644 } 2645 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2646 reg, val); 2647 } 2648 2649 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2650 } 2651 2652 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2653 unsigned int reg) 2654 { 2655 struct phylink_link_state state; 2656 int val = 0xffff; 2657 2658 switch (pl->cur_link_an_mode) { 2659 case MLO_AN_FIXED: 2660 if (phy_id == 0) { 2661 phylink_get_fixed_state(pl, &state); 2662 val = phylink_mii_emul_read(reg, &state); 2663 } 2664 break; 2665 2666 case MLO_AN_PHY: 2667 return -EOPNOTSUPP; 2668 2669 case MLO_AN_INBAND: 2670 if (phy_id == 0) { 2671 phylink_mac_pcs_get_state(pl, &state); 2672 val = phylink_mii_emul_read(reg, &state); 2673 } 2674 break; 2675 } 2676 2677 return val & 0xffff; 2678 } 2679 2680 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2681 unsigned int reg, unsigned int val) 2682 { 2683 switch (pl->cur_link_an_mode) { 2684 case MLO_AN_FIXED: 2685 break; 2686 2687 case MLO_AN_PHY: 2688 return -EOPNOTSUPP; 2689 2690 case MLO_AN_INBAND: 2691 break; 2692 } 2693 2694 return 0; 2695 } 2696 2697 /** 2698 * phylink_mii_ioctl() - generic mii ioctl interface 2699 * @pl: a pointer to a &struct phylink returned from phylink_create() 2700 * @ifr: a pointer to a &struct ifreq for socket ioctls 2701 * @cmd: ioctl cmd to execute 2702 * 2703 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2704 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2705 * 2706 * Returns: zero on success or negative error code. 2707 * 2708 * %SIOCGMIIPHY: 2709 * read register from the current PHY. 2710 * %SIOCGMIIREG: 2711 * read register from the specified PHY. 2712 * %SIOCSMIIREG: 2713 * set a register on the specified PHY. 2714 */ 2715 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2716 { 2717 struct mii_ioctl_data *mii = if_mii(ifr); 2718 int ret; 2719 2720 ASSERT_RTNL(); 2721 2722 if (pl->phydev) { 2723 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2724 switch (cmd) { 2725 case SIOCGMIIPHY: 2726 mii->phy_id = pl->phydev->mdio.addr; 2727 fallthrough; 2728 2729 case SIOCGMIIREG: 2730 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2731 if (ret >= 0) { 2732 mii->val_out = ret; 2733 ret = 0; 2734 } 2735 break; 2736 2737 case SIOCSMIIREG: 2738 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2739 mii->val_in); 2740 break; 2741 2742 default: 2743 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2744 break; 2745 } 2746 } else { 2747 switch (cmd) { 2748 case SIOCGMIIPHY: 2749 mii->phy_id = 0; 2750 fallthrough; 2751 2752 case SIOCGMIIREG: 2753 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2754 if (ret >= 0) { 2755 mii->val_out = ret; 2756 ret = 0; 2757 } 2758 break; 2759 2760 case SIOCSMIIREG: 2761 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2762 mii->val_in); 2763 break; 2764 2765 default: 2766 ret = -EOPNOTSUPP; 2767 break; 2768 } 2769 } 2770 2771 return ret; 2772 } 2773 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2774 2775 /** 2776 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2777 * link partners 2778 * @pl: a pointer to a &struct phylink returned from phylink_create() 2779 * @sync: perform action synchronously 2780 * 2781 * If we have a PHY that is not part of a SFP module, then set the speed 2782 * as described in the phy_speed_down() function. Please see this function 2783 * for a description of the @sync parameter. 2784 * 2785 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2786 */ 2787 int phylink_speed_down(struct phylink *pl, bool sync) 2788 { 2789 int ret = 0; 2790 2791 ASSERT_RTNL(); 2792 2793 if (!pl->sfp_bus && pl->phydev) 2794 ret = phy_speed_down(pl->phydev, sync); 2795 2796 return ret; 2797 } 2798 EXPORT_SYMBOL_GPL(phylink_speed_down); 2799 2800 /** 2801 * phylink_speed_up() - restore the advertised speeds prior to the call to 2802 * phylink_speed_down() 2803 * @pl: a pointer to a &struct phylink returned from phylink_create() 2804 * 2805 * If we have a PHY that is not part of a SFP module, then restore the 2806 * PHY speeds as per phy_speed_up(). 2807 * 2808 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2809 */ 2810 int phylink_speed_up(struct phylink *pl) 2811 { 2812 int ret = 0; 2813 2814 ASSERT_RTNL(); 2815 2816 if (!pl->sfp_bus && pl->phydev) 2817 ret = phy_speed_up(pl->phydev); 2818 2819 return ret; 2820 } 2821 EXPORT_SYMBOL_GPL(phylink_speed_up); 2822 2823 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2824 { 2825 struct phylink *pl = upstream; 2826 2827 pl->netdev->sfp_bus = bus; 2828 } 2829 2830 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 2831 { 2832 struct phylink *pl = upstream; 2833 2834 pl->netdev->sfp_bus = NULL; 2835 } 2836 2837 static const phy_interface_t phylink_sfp_interface_preference[] = { 2838 PHY_INTERFACE_MODE_25GBASER, 2839 PHY_INTERFACE_MODE_USXGMII, 2840 PHY_INTERFACE_MODE_10GBASER, 2841 PHY_INTERFACE_MODE_5GBASER, 2842 PHY_INTERFACE_MODE_2500BASEX, 2843 PHY_INTERFACE_MODE_SGMII, 2844 PHY_INTERFACE_MODE_1000BASEX, 2845 PHY_INTERFACE_MODE_100BASEX, 2846 }; 2847 2848 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 2849 2850 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 2851 const unsigned long *intf) 2852 { 2853 phy_interface_t interface; 2854 size_t i; 2855 2856 interface = PHY_INTERFACE_MODE_NA; 2857 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 2858 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 2859 interface = phylink_sfp_interface_preference[i]; 2860 break; 2861 } 2862 2863 return interface; 2864 } 2865 2866 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 2867 unsigned long *supported, 2868 struct phylink_link_state *state) 2869 { 2870 bool changed = false; 2871 2872 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 2873 phylink_an_mode_str(mode), phy_modes(state->interface), 2874 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 2875 2876 if (!linkmode_equal(pl->supported, supported)) { 2877 linkmode_copy(pl->supported, supported); 2878 changed = true; 2879 } 2880 2881 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 2882 linkmode_copy(pl->link_config.advertising, state->advertising); 2883 changed = true; 2884 } 2885 2886 if (pl->cur_link_an_mode != mode || 2887 pl->link_config.interface != state->interface) { 2888 pl->cur_link_an_mode = mode; 2889 pl->link_config.interface = state->interface; 2890 2891 changed = true; 2892 2893 phylink_info(pl, "switched to %s/%s link mode\n", 2894 phylink_an_mode_str(mode), 2895 phy_modes(state->interface)); 2896 } 2897 2898 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 2899 &pl->phylink_disable_state)) 2900 phylink_mac_initial_config(pl, false); 2901 } 2902 2903 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 2904 struct phy_device *phy) 2905 { 2906 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 2907 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2908 struct phylink_link_state config; 2909 phy_interface_t iface; 2910 int ret; 2911 2912 linkmode_copy(support, phy->supported); 2913 2914 memset(&config, 0, sizeof(config)); 2915 linkmode_copy(config.advertising, phy->advertising); 2916 config.interface = PHY_INTERFACE_MODE_NA; 2917 config.speed = SPEED_UNKNOWN; 2918 config.duplex = DUPLEX_UNKNOWN; 2919 config.pause = MLO_PAUSE_AN; 2920 config.an_enabled = pl->link_config.an_enabled; 2921 2922 /* Ignore errors if we're expecting a PHY to attach later */ 2923 ret = phylink_validate(pl, support, &config); 2924 if (ret) { 2925 phylink_err(pl, "validation with support %*pb failed: %pe\n", 2926 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2927 ERR_PTR(ret)); 2928 return ret; 2929 } 2930 2931 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 2932 if (iface == PHY_INTERFACE_MODE_NA) { 2933 phylink_err(pl, 2934 "selection of interface failed, advertisement %*pb\n", 2935 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 2936 return -EINVAL; 2937 } 2938 2939 config.interface = iface; 2940 linkmode_copy(support1, support); 2941 ret = phylink_validate(pl, support1, &config); 2942 if (ret) { 2943 phylink_err(pl, 2944 "validation of %s/%s with support %*pb failed: %pe\n", 2945 phylink_an_mode_str(mode), 2946 phy_modes(config.interface), 2947 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 2948 ERR_PTR(ret)); 2949 return ret; 2950 } 2951 2952 pl->link_port = pl->sfp_port; 2953 2954 phylink_sfp_set_config(pl, mode, support, &config); 2955 2956 return 0; 2957 } 2958 2959 static int phylink_sfp_config_optical(struct phylink *pl) 2960 { 2961 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2962 DECLARE_PHY_INTERFACE_MASK(interfaces); 2963 struct phylink_link_state config; 2964 phy_interface_t interface; 2965 int ret; 2966 2967 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 2968 (int)PHY_INTERFACE_MODE_MAX, 2969 pl->config->supported_interfaces, 2970 (int)PHY_INTERFACE_MODE_MAX, 2971 pl->sfp_interfaces); 2972 2973 /* Find the union of the supported interfaces by the PCS/MAC and 2974 * the SFP module. 2975 */ 2976 phy_interface_and(interfaces, pl->config->supported_interfaces, 2977 pl->sfp_interfaces); 2978 if (phy_interface_empty(interfaces)) { 2979 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 2980 return -EINVAL; 2981 } 2982 2983 memset(&config, 0, sizeof(config)); 2984 linkmode_copy(support, pl->sfp_support); 2985 linkmode_copy(config.advertising, pl->sfp_support); 2986 config.speed = SPEED_UNKNOWN; 2987 config.duplex = DUPLEX_UNKNOWN; 2988 config.pause = MLO_PAUSE_AN; 2989 config.an_enabled = true; 2990 2991 /* For all the interfaces that are supported, reduce the sfp_support 2992 * mask to only those link modes that can be supported. 2993 */ 2994 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 2995 if (ret) { 2996 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 2997 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2998 return ret; 2999 } 3000 3001 interface = phylink_choose_sfp_interface(pl, interfaces); 3002 if (interface == PHY_INTERFACE_MODE_NA) { 3003 phylink_err(pl, "failed to select SFP interface\n"); 3004 return -EINVAL; 3005 } 3006 3007 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3008 phy_modes(interface)); 3009 3010 config.interface = interface; 3011 3012 /* Ignore errors if we're expecting a PHY to attach later */ 3013 ret = phylink_validate(pl, support, &config); 3014 if (ret) { 3015 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3016 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3017 ERR_PTR(ret)); 3018 return ret; 3019 } 3020 3021 pl->link_port = pl->sfp_port; 3022 3023 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3024 3025 return 0; 3026 } 3027 3028 static int phylink_sfp_module_insert(void *upstream, 3029 const struct sfp_eeprom_id *id) 3030 { 3031 struct phylink *pl = upstream; 3032 3033 ASSERT_RTNL(); 3034 3035 linkmode_zero(pl->sfp_support); 3036 phy_interface_zero(pl->sfp_interfaces); 3037 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3038 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3039 3040 /* If this module may have a PHY connecting later, defer until later */ 3041 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3042 if (pl->sfp_may_have_phy) 3043 return 0; 3044 3045 return phylink_sfp_config_optical(pl); 3046 } 3047 3048 static int phylink_sfp_module_start(void *upstream) 3049 { 3050 struct phylink *pl = upstream; 3051 3052 /* If this SFP module has a PHY, start the PHY now. */ 3053 if (pl->phydev) { 3054 phy_start(pl->phydev); 3055 return 0; 3056 } 3057 3058 /* If the module may have a PHY but we didn't detect one we 3059 * need to configure the MAC here. 3060 */ 3061 if (!pl->sfp_may_have_phy) 3062 return 0; 3063 3064 return phylink_sfp_config_optical(pl); 3065 } 3066 3067 static void phylink_sfp_module_stop(void *upstream) 3068 { 3069 struct phylink *pl = upstream; 3070 3071 /* If this SFP module has a PHY, stop it. */ 3072 if (pl->phydev) 3073 phy_stop(pl->phydev); 3074 } 3075 3076 static void phylink_sfp_link_down(void *upstream) 3077 { 3078 struct phylink *pl = upstream; 3079 3080 ASSERT_RTNL(); 3081 3082 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3083 } 3084 3085 static void phylink_sfp_link_up(void *upstream) 3086 { 3087 struct phylink *pl = upstream; 3088 3089 ASSERT_RTNL(); 3090 3091 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3092 } 3093 3094 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3095 * or 802.3z control word, so inband will not work. 3096 */ 3097 static bool phylink_phy_no_inband(struct phy_device *phy) 3098 { 3099 return phy->is_c45 && 3100 (phy->c45_ids.device_ids[1] & 0xfffffff0) == 0xae025150; 3101 } 3102 3103 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3104 { 3105 struct phylink *pl = upstream; 3106 phy_interface_t interface; 3107 u8 mode; 3108 int ret; 3109 3110 /* 3111 * This is the new way of dealing with flow control for PHYs, 3112 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3113 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3114 * using our validate call to the MAC, we rely upon the MAC 3115 * clearing the bits from both supported and advertising fields. 3116 */ 3117 phy_support_asym_pause(phy); 3118 3119 if (phylink_phy_no_inband(phy)) 3120 mode = MLO_AN_PHY; 3121 else 3122 mode = MLO_AN_INBAND; 3123 3124 /* Set the PHY's host supported interfaces */ 3125 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3126 pl->config->supported_interfaces); 3127 3128 /* Do the initial configuration */ 3129 ret = phylink_sfp_config_phy(pl, mode, phy); 3130 if (ret < 0) 3131 return ret; 3132 3133 interface = pl->link_config.interface; 3134 ret = phylink_attach_phy(pl, phy, interface); 3135 if (ret < 0) 3136 return ret; 3137 3138 ret = phylink_bringup_phy(pl, phy, interface); 3139 if (ret) 3140 phy_detach(phy); 3141 3142 return ret; 3143 } 3144 3145 static void phylink_sfp_disconnect_phy(void *upstream) 3146 { 3147 phylink_disconnect_phy(upstream); 3148 } 3149 3150 static const struct sfp_upstream_ops sfp_phylink_ops = { 3151 .attach = phylink_sfp_attach, 3152 .detach = phylink_sfp_detach, 3153 .module_insert = phylink_sfp_module_insert, 3154 .module_start = phylink_sfp_module_start, 3155 .module_stop = phylink_sfp_module_stop, 3156 .link_up = phylink_sfp_link_up, 3157 .link_down = phylink_sfp_link_down, 3158 .connect_phy = phylink_sfp_connect_phy, 3159 .disconnect_phy = phylink_sfp_disconnect_phy, 3160 }; 3161 3162 /* Helpers for MAC drivers */ 3163 3164 static void phylink_decode_c37_word(struct phylink_link_state *state, 3165 uint16_t config_reg, int speed) 3166 { 3167 bool tx_pause, rx_pause; 3168 int fd_bit; 3169 3170 if (speed == SPEED_2500) 3171 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3172 else 3173 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3174 3175 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3176 3177 if (linkmode_test_bit(fd_bit, state->advertising) && 3178 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3179 state->speed = speed; 3180 state->duplex = DUPLEX_FULL; 3181 } else { 3182 /* negotiation failure */ 3183 state->link = false; 3184 } 3185 3186 linkmode_resolve_pause(state->advertising, state->lp_advertising, 3187 &tx_pause, &rx_pause); 3188 3189 if (tx_pause) 3190 state->pause |= MLO_PAUSE_TX; 3191 if (rx_pause) 3192 state->pause |= MLO_PAUSE_RX; 3193 } 3194 3195 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3196 uint16_t config_reg) 3197 { 3198 if (!(config_reg & LPA_SGMII_LINK)) { 3199 state->link = false; 3200 return; 3201 } 3202 3203 switch (config_reg & LPA_SGMII_SPD_MASK) { 3204 case LPA_SGMII_10: 3205 state->speed = SPEED_10; 3206 break; 3207 case LPA_SGMII_100: 3208 state->speed = SPEED_100; 3209 break; 3210 case LPA_SGMII_1000: 3211 state->speed = SPEED_1000; 3212 break; 3213 default: 3214 state->link = false; 3215 return; 3216 } 3217 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3218 state->duplex = DUPLEX_FULL; 3219 else 3220 state->duplex = DUPLEX_HALF; 3221 } 3222 3223 /** 3224 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3225 * @state: a pointer to a struct phylink_link_state. 3226 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3227 * 3228 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3229 * code word. Decode the USXGMII code word and populate the corresponding fields 3230 * (speed, duplex) into the phylink_link_state structure. 3231 */ 3232 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3233 uint16_t lpa) 3234 { 3235 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3236 case MDIO_USXGMII_10: 3237 state->speed = SPEED_10; 3238 break; 3239 case MDIO_USXGMII_100: 3240 state->speed = SPEED_100; 3241 break; 3242 case MDIO_USXGMII_1000: 3243 state->speed = SPEED_1000; 3244 break; 3245 case MDIO_USXGMII_2500: 3246 state->speed = SPEED_2500; 3247 break; 3248 case MDIO_USXGMII_5000: 3249 state->speed = SPEED_5000; 3250 break; 3251 case MDIO_USXGMII_10G: 3252 state->speed = SPEED_10000; 3253 break; 3254 default: 3255 state->link = false; 3256 return; 3257 } 3258 3259 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3260 state->duplex = DUPLEX_FULL; 3261 else 3262 state->duplex = DUPLEX_HALF; 3263 } 3264 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3265 3266 /** 3267 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3268 * @state: a pointer to a &struct phylink_link_state. 3269 * @bmsr: The value of the %MII_BMSR register 3270 * @lpa: The value of the %MII_LPA register 3271 * 3272 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3273 * clause 37 negotiation and/or SGMII control. 3274 * 3275 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3276 * the phylink @state structure. This is suitable to be used for implementing 3277 * the mac_pcs_get_state() member of the struct phylink_mac_ops structure if 3278 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3279 */ 3280 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3281 u16 bmsr, u16 lpa) 3282 { 3283 state->link = !!(bmsr & BMSR_LSTATUS); 3284 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3285 /* If there is no link or autonegotiation is disabled, the LP advertisement 3286 * data is not meaningful, so don't go any further. 3287 */ 3288 if (!state->link || !state->an_enabled) 3289 return; 3290 3291 switch (state->interface) { 3292 case PHY_INTERFACE_MODE_1000BASEX: 3293 phylink_decode_c37_word(state, lpa, SPEED_1000); 3294 break; 3295 3296 case PHY_INTERFACE_MODE_2500BASEX: 3297 phylink_decode_c37_word(state, lpa, SPEED_2500); 3298 break; 3299 3300 case PHY_INTERFACE_MODE_SGMII: 3301 case PHY_INTERFACE_MODE_QSGMII: 3302 case PHY_INTERFACE_MODE_QUSGMII: 3303 phylink_decode_sgmii_word(state, lpa); 3304 break; 3305 3306 default: 3307 state->link = false; 3308 break; 3309 } 3310 } 3311 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3312 3313 /** 3314 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3315 * @pcs: a pointer to a &struct mdio_device. 3316 * @state: a pointer to a &struct phylink_link_state. 3317 * 3318 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3319 * clause 37 negotiation and/or SGMII control. 3320 * 3321 * Read the MAC PCS state from the MII device configured in @config and 3322 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3323 * the phylink @state structure. This is suitable to be directly plugged 3324 * into the mac_pcs_get_state() member of the struct phylink_mac_ops 3325 * structure. 3326 */ 3327 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3328 struct phylink_link_state *state) 3329 { 3330 int bmsr, lpa; 3331 3332 bmsr = mdiodev_read(pcs, MII_BMSR); 3333 lpa = mdiodev_read(pcs, MII_LPA); 3334 if (bmsr < 0 || lpa < 0) { 3335 state->link = false; 3336 return; 3337 } 3338 3339 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3340 } 3341 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3342 3343 /** 3344 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3345 * advertisement 3346 * @interface: the PHY interface mode being configured 3347 * @advertising: the ethtool advertisement mask 3348 * 3349 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3350 * clause 37 negotiation and/or SGMII control. 3351 * 3352 * Encode the clause 37 PCS advertisement as specified by @interface and 3353 * @advertising. 3354 * 3355 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3356 */ 3357 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3358 const unsigned long *advertising) 3359 { 3360 u16 adv; 3361 3362 switch (interface) { 3363 case PHY_INTERFACE_MODE_1000BASEX: 3364 case PHY_INTERFACE_MODE_2500BASEX: 3365 adv = ADVERTISE_1000XFULL; 3366 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3367 advertising)) 3368 adv |= ADVERTISE_1000XPAUSE; 3369 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3370 advertising)) 3371 adv |= ADVERTISE_1000XPSE_ASYM; 3372 return adv; 3373 case PHY_INTERFACE_MODE_SGMII: 3374 case PHY_INTERFACE_MODE_QSGMII: 3375 return 0x0001; 3376 default: 3377 /* Nothing to do for other modes */ 3378 return -EINVAL; 3379 } 3380 } 3381 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3382 3383 /** 3384 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3385 * @pcs: a pointer to a &struct mdio_device. 3386 * @mode: link autonegotiation mode 3387 * @interface: the PHY interface mode being configured 3388 * @advertising: the ethtool advertisement mask 3389 * 3390 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3391 * parameters for the @mode, @interface and @advertising parameters. 3392 * Returns negative error number on failure, zero if the advertisement 3393 * has not changed, or positive if there is a change. 3394 */ 3395 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, unsigned int mode, 3396 phy_interface_t interface, 3397 const unsigned long *advertising) 3398 { 3399 bool changed = 0; 3400 u16 bmcr; 3401 int ret, adv; 3402 3403 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3404 if (adv >= 0) { 3405 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3406 MII_ADVERTISE, 0xffff, adv); 3407 if (ret < 0) 3408 return ret; 3409 changed = ret; 3410 } 3411 3412 /* Ensure ISOLATE bit is disabled */ 3413 if (mode == MLO_AN_INBAND && 3414 (interface == PHY_INTERFACE_MODE_SGMII || 3415 interface == PHY_INTERFACE_MODE_QSGMII || 3416 linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, advertising))) 3417 bmcr = BMCR_ANENABLE; 3418 else 3419 bmcr = 0; 3420 3421 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3422 if (ret < 0) 3423 return ret; 3424 3425 return changed; 3426 } 3427 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3428 3429 /** 3430 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3431 * @pcs: a pointer to a &struct mdio_device. 3432 * 3433 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3434 * clause 37 negotiation. 3435 * 3436 * Restart the clause 37 negotiation with the link partner. This is 3437 * suitable to be directly plugged into the mac_pcs_get_state() member 3438 * of the struct phylink_mac_ops structure. 3439 */ 3440 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3441 { 3442 int val = mdiodev_read(pcs, MII_BMCR); 3443 3444 if (val >= 0) { 3445 val |= BMCR_ANRESTART; 3446 3447 mdiodev_write(pcs, MII_BMCR, val); 3448 } 3449 } 3450 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3451 3452 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3453 struct phylink_link_state *state) 3454 { 3455 struct mii_bus *bus = pcs->bus; 3456 int addr = pcs->addr; 3457 int stat; 3458 3459 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3460 if (stat < 0) { 3461 state->link = false; 3462 return; 3463 } 3464 3465 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3466 if (!state->link) 3467 return; 3468 3469 switch (state->interface) { 3470 case PHY_INTERFACE_MODE_10GBASER: 3471 state->speed = SPEED_10000; 3472 state->duplex = DUPLEX_FULL; 3473 break; 3474 3475 default: 3476 break; 3477 } 3478 } 3479 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3480 3481 static int __init phylink_init(void) 3482 { 3483 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3484 __set_bit(phylink_sfp_interface_preference[i], 3485 phylink_sfp_interfaces); 3486 3487 return 0; 3488 } 3489 3490 module_init(phylink_init); 3491 3492 MODULE_LICENSE("GPL v2"); 3493