1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 cur_link_an_mode; 60 u8 link_port; /* The current non-phy ethtool port */ 61 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 62 63 /* The link configuration settings */ 64 struct phylink_link_state link_config; 65 66 /* The current settings */ 67 phy_interface_t cur_interface; 68 69 struct gpio_desc *link_gpio; 70 unsigned int link_irq; 71 struct timer_list link_poll; 72 void (*get_fixed_state)(struct net_device *dev, 73 struct phylink_link_state *s); 74 75 struct mutex state_mutex; 76 struct phylink_link_state phy_state; 77 struct work_struct resolve; 78 unsigned int pcs_neg_mode; 79 unsigned int pcs_state; 80 81 bool mac_link_dropped; 82 bool using_mac_select_pcs; 83 84 struct sfp_bus *sfp_bus; 85 bool sfp_may_have_phy; 86 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 87 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 88 u8 sfp_port; 89 }; 90 91 #define phylink_printk(level, pl, fmt, ...) \ 92 do { \ 93 if ((pl)->config->type == PHYLINK_NETDEV) \ 94 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 95 else if ((pl)->config->type == PHYLINK_DEV) \ 96 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 97 } while (0) 98 99 #define phylink_err(pl, fmt, ...) \ 100 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 101 #define phylink_warn(pl, fmt, ...) \ 102 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 103 #define phylink_info(pl, fmt, ...) \ 104 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 105 #if defined(CONFIG_DYNAMIC_DEBUG) 106 #define phylink_dbg(pl, fmt, ...) \ 107 do { \ 108 if ((pl)->config->type == PHYLINK_NETDEV) \ 109 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 110 else if ((pl)->config->type == PHYLINK_DEV) \ 111 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 112 } while (0) 113 #elif defined(DEBUG) 114 #define phylink_dbg(pl, fmt, ...) \ 115 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 116 #else 117 #define phylink_dbg(pl, fmt, ...) \ 118 ({ \ 119 if (0) \ 120 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 121 }) 122 #endif 123 124 /** 125 * phylink_set_port_modes() - set the port type modes in the ethtool mask 126 * @mask: ethtool link mode mask 127 * 128 * Sets all the port type modes in the ethtool mask. MAC drivers should 129 * use this in their 'validate' callback. 130 */ 131 void phylink_set_port_modes(unsigned long *mask) 132 { 133 phylink_set(mask, TP); 134 phylink_set(mask, AUI); 135 phylink_set(mask, MII); 136 phylink_set(mask, FIBRE); 137 phylink_set(mask, BNC); 138 phylink_set(mask, Backplane); 139 } 140 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 141 142 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 143 { 144 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 145 146 phylink_set_port_modes(tmp); 147 phylink_set(tmp, Autoneg); 148 phylink_set(tmp, Pause); 149 phylink_set(tmp, Asym_Pause); 150 151 return linkmode_subset(linkmode, tmp); 152 } 153 154 static const char *phylink_an_mode_str(unsigned int mode) 155 { 156 static const char *modestr[] = { 157 [MLO_AN_PHY] = "phy", 158 [MLO_AN_FIXED] = "fixed", 159 [MLO_AN_INBAND] = "inband", 160 }; 161 162 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 163 } 164 165 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 166 { 167 switch (interface) { 168 case PHY_INTERFACE_MODE_SGMII: 169 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 170 return 1250; 171 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 172 return 3125; 173 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 174 return 5156; 175 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 176 return 10313; 177 default: 178 return 0; 179 } 180 } 181 182 /** 183 * phylink_interface_max_speed() - get the maximum speed of a phy interface 184 * @interface: phy interface mode defined by &typedef phy_interface_t 185 * 186 * Determine the maximum speed of a phy interface. This is intended to help 187 * determine the correct speed to pass to the MAC when the phy is performing 188 * rate matching. 189 * 190 * Return: The maximum speed of @interface 191 */ 192 static int phylink_interface_max_speed(phy_interface_t interface) 193 { 194 switch (interface) { 195 case PHY_INTERFACE_MODE_100BASEX: 196 case PHY_INTERFACE_MODE_REVRMII: 197 case PHY_INTERFACE_MODE_RMII: 198 case PHY_INTERFACE_MODE_SMII: 199 case PHY_INTERFACE_MODE_REVMII: 200 case PHY_INTERFACE_MODE_MII: 201 return SPEED_100; 202 203 case PHY_INTERFACE_MODE_TBI: 204 case PHY_INTERFACE_MODE_MOCA: 205 case PHY_INTERFACE_MODE_RTBI: 206 case PHY_INTERFACE_MODE_1000BASEX: 207 case PHY_INTERFACE_MODE_1000BASEKX: 208 case PHY_INTERFACE_MODE_TRGMII: 209 case PHY_INTERFACE_MODE_RGMII_TXID: 210 case PHY_INTERFACE_MODE_RGMII_RXID: 211 case PHY_INTERFACE_MODE_RGMII_ID: 212 case PHY_INTERFACE_MODE_RGMII: 213 case PHY_INTERFACE_MODE_PSGMII: 214 case PHY_INTERFACE_MODE_QSGMII: 215 case PHY_INTERFACE_MODE_QUSGMII: 216 case PHY_INTERFACE_MODE_SGMII: 217 case PHY_INTERFACE_MODE_GMII: 218 return SPEED_1000; 219 220 case PHY_INTERFACE_MODE_2500BASEX: 221 return SPEED_2500; 222 223 case PHY_INTERFACE_MODE_5GBASER: 224 return SPEED_5000; 225 226 case PHY_INTERFACE_MODE_XGMII: 227 case PHY_INTERFACE_MODE_RXAUI: 228 case PHY_INTERFACE_MODE_XAUI: 229 case PHY_INTERFACE_MODE_10GBASER: 230 case PHY_INTERFACE_MODE_10GKR: 231 case PHY_INTERFACE_MODE_USXGMII: 232 return SPEED_10000; 233 234 case PHY_INTERFACE_MODE_25GBASER: 235 return SPEED_25000; 236 237 case PHY_INTERFACE_MODE_XLGMII: 238 return SPEED_40000; 239 240 case PHY_INTERFACE_MODE_INTERNAL: 241 case PHY_INTERFACE_MODE_NA: 242 case PHY_INTERFACE_MODE_MAX: 243 /* No idea! Garbage in, unknown out */ 244 return SPEED_UNKNOWN; 245 } 246 247 /* If we get here, someone forgot to add an interface mode above */ 248 WARN_ON_ONCE(1); 249 return SPEED_UNKNOWN; 250 } 251 252 /** 253 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 254 * @linkmodes: ethtool linkmode mask (must be already initialised) 255 * @caps: bitmask of MAC capabilities 256 * 257 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 258 * supported by the @caps. @linkmodes must have been initialised previously. 259 */ 260 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 261 unsigned long caps) 262 { 263 if (caps & MAC_SYM_PAUSE) 264 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 265 266 if (caps & MAC_ASYM_PAUSE) 267 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 268 269 if (caps & MAC_10HD) { 270 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 271 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 272 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 273 } 274 275 if (caps & MAC_10FD) { 276 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 277 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 278 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 279 } 280 281 if (caps & MAC_100HD) { 282 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 283 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 284 } 285 286 if (caps & MAC_100FD) { 287 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 288 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 289 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 290 } 291 292 if (caps & MAC_1000HD) 293 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 294 295 if (caps & MAC_1000FD) { 296 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 297 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 298 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 299 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 300 } 301 302 if (caps & MAC_2500FD) { 303 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 304 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 305 } 306 307 if (caps & MAC_5000FD) 308 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 309 310 if (caps & MAC_10000FD) { 311 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 312 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 313 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 314 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 315 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 317 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 318 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 319 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 320 } 321 322 if (caps & MAC_25000FD) { 323 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 324 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 325 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 326 } 327 328 if (caps & MAC_40000FD) { 329 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_50000FD) { 336 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 338 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 339 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 340 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 341 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 342 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 343 linkmodes); 344 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 345 } 346 347 if (caps & MAC_56000FD) { 348 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 352 } 353 354 if (caps & MAC_100000FD) { 355 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 356 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 359 linkmodes); 360 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 361 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 362 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 364 linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 366 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 367 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 368 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 369 linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 372 } 373 374 if (caps & MAC_200000FD) { 375 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 376 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 378 linkmodes); 379 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 380 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 381 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 384 linkmodes); 385 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 386 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 387 } 388 389 if (caps & MAC_400000FD) { 390 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 392 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 393 linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 397 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 399 linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 401 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 402 } 403 } 404 405 static struct { 406 unsigned long mask; 407 int speed; 408 unsigned int duplex; 409 } phylink_caps_params[] = { 410 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 411 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 412 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 413 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 414 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 415 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 416 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 417 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 418 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 419 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 420 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 421 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 422 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 423 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 424 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 425 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 426 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 427 }; 428 429 /** 430 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 431 * @config: pointer to a &struct phylink_config 432 * @max_speed: maximum speed 433 * 434 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 435 * Any further motifications of config.mac_capabilities will override this. 436 */ 437 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 438 { 439 int i; 440 441 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 442 phylink_caps_params[i].speed > max_speed; i++) 443 config->mac_capabilities &= ~phylink_caps_params[i].mask; 444 } 445 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 446 447 /** 448 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 449 * @speed: the speed to search for 450 * @duplex: the duplex to search for 451 * 452 * Find the mac capability for a given speed and duplex. 453 * 454 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 455 * there were no matches. 456 */ 457 static unsigned long phylink_cap_from_speed_duplex(int speed, 458 unsigned int duplex) 459 { 460 int i; 461 462 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 463 if (speed == phylink_caps_params[i].speed && 464 duplex == phylink_caps_params[i].duplex) 465 return phylink_caps_params[i].mask; 466 } 467 468 return 0; 469 } 470 471 /** 472 * phylink_get_capabilities() - get capabilities for a given MAC 473 * @interface: phy interface mode defined by &typedef phy_interface_t 474 * @mac_capabilities: bitmask of MAC capabilities 475 * @rate_matching: type of rate matching being performed 476 * 477 * Get the MAC capabilities that are supported by the @interface mode and 478 * @mac_capabilities. 479 */ 480 static unsigned long phylink_get_capabilities(phy_interface_t interface, 481 unsigned long mac_capabilities, 482 int rate_matching) 483 { 484 int max_speed = phylink_interface_max_speed(interface); 485 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 486 unsigned long matched_caps = 0; 487 488 switch (interface) { 489 case PHY_INTERFACE_MODE_USXGMII: 490 caps |= MAC_10000FD | MAC_5000FD | MAC_2500FD; 491 fallthrough; 492 493 case PHY_INTERFACE_MODE_RGMII_TXID: 494 case PHY_INTERFACE_MODE_RGMII_RXID: 495 case PHY_INTERFACE_MODE_RGMII_ID: 496 case PHY_INTERFACE_MODE_RGMII: 497 case PHY_INTERFACE_MODE_PSGMII: 498 case PHY_INTERFACE_MODE_QSGMII: 499 case PHY_INTERFACE_MODE_QUSGMII: 500 case PHY_INTERFACE_MODE_SGMII: 501 case PHY_INTERFACE_MODE_GMII: 502 caps |= MAC_1000HD | MAC_1000FD; 503 fallthrough; 504 505 case PHY_INTERFACE_MODE_REVRMII: 506 case PHY_INTERFACE_MODE_RMII: 507 case PHY_INTERFACE_MODE_SMII: 508 case PHY_INTERFACE_MODE_REVMII: 509 case PHY_INTERFACE_MODE_MII: 510 caps |= MAC_10HD | MAC_10FD; 511 fallthrough; 512 513 case PHY_INTERFACE_MODE_100BASEX: 514 caps |= MAC_100HD | MAC_100FD; 515 break; 516 517 case PHY_INTERFACE_MODE_TBI: 518 case PHY_INTERFACE_MODE_MOCA: 519 case PHY_INTERFACE_MODE_RTBI: 520 case PHY_INTERFACE_MODE_1000BASEX: 521 caps |= MAC_1000HD; 522 fallthrough; 523 case PHY_INTERFACE_MODE_1000BASEKX: 524 case PHY_INTERFACE_MODE_TRGMII: 525 caps |= MAC_1000FD; 526 break; 527 528 case PHY_INTERFACE_MODE_2500BASEX: 529 caps |= MAC_2500FD; 530 break; 531 532 case PHY_INTERFACE_MODE_5GBASER: 533 caps |= MAC_5000FD; 534 break; 535 536 case PHY_INTERFACE_MODE_XGMII: 537 case PHY_INTERFACE_MODE_RXAUI: 538 case PHY_INTERFACE_MODE_XAUI: 539 case PHY_INTERFACE_MODE_10GBASER: 540 case PHY_INTERFACE_MODE_10GKR: 541 caps |= MAC_10000FD; 542 break; 543 544 case PHY_INTERFACE_MODE_25GBASER: 545 caps |= MAC_25000FD; 546 break; 547 548 case PHY_INTERFACE_MODE_XLGMII: 549 caps |= MAC_40000FD; 550 break; 551 552 case PHY_INTERFACE_MODE_INTERNAL: 553 caps |= ~0; 554 break; 555 556 case PHY_INTERFACE_MODE_NA: 557 case PHY_INTERFACE_MODE_MAX: 558 break; 559 } 560 561 switch (rate_matching) { 562 case RATE_MATCH_OPEN_LOOP: 563 /* TODO */ 564 fallthrough; 565 case RATE_MATCH_NONE: 566 matched_caps = 0; 567 break; 568 case RATE_MATCH_PAUSE: { 569 /* The MAC must support asymmetric pause towards the local 570 * device for this. We could allow just symmetric pause, but 571 * then we might have to renegotiate if the link partner 572 * doesn't support pause. This is because there's no way to 573 * accept pause frames without transmitting them if we only 574 * support symmetric pause. 575 */ 576 if (!(mac_capabilities & MAC_SYM_PAUSE) || 577 !(mac_capabilities & MAC_ASYM_PAUSE)) 578 break; 579 580 /* We can't adapt if the MAC doesn't support the interface's 581 * max speed at full duplex. 582 */ 583 if (mac_capabilities & 584 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) { 585 /* Although a duplex-matching phy might exist, we 586 * conservatively remove these modes because the MAC 587 * will not be aware of the half-duplex nature of the 588 * link. 589 */ 590 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 591 matched_caps &= ~(MAC_1000HD | MAC_100HD | MAC_10HD); 592 } 593 break; 594 } 595 case RATE_MATCH_CRS: 596 /* The MAC must support half duplex at the interface's max 597 * speed. 598 */ 599 if (mac_capabilities & 600 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 601 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 602 matched_caps &= mac_capabilities; 603 } 604 break; 605 } 606 607 return (caps & mac_capabilities) | matched_caps; 608 } 609 610 /** 611 * phylink_validate_mask_caps() - Restrict link modes based on caps 612 * @supported: ethtool bitmask for supported link modes. 613 * @state: pointer to a &struct phylink_link_state. 614 * @mac_capabilities: bitmask of MAC capabilities 615 * 616 * Calculate the supported link modes based on @mac_capabilities, and restrict 617 * @supported and @state based on that. Use this function if your capabiliies 618 * aren't constant, such as if they vary depending on the interface. 619 */ 620 static void phylink_validate_mask_caps(unsigned long *supported, 621 struct phylink_link_state *state, 622 unsigned long mac_capabilities) 623 { 624 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 625 unsigned long caps; 626 627 phylink_set_port_modes(mask); 628 phylink_set(mask, Autoneg); 629 caps = phylink_get_capabilities(state->interface, mac_capabilities, 630 state->rate_matching); 631 phylink_caps_to_linkmodes(mask, caps); 632 633 linkmode_and(supported, supported, mask); 634 linkmode_and(state->advertising, state->advertising, mask); 635 } 636 637 static int phylink_validate_mac_and_pcs(struct phylink *pl, 638 unsigned long *supported, 639 struct phylink_link_state *state) 640 { 641 unsigned long capabilities; 642 struct phylink_pcs *pcs; 643 int ret; 644 645 /* Get the PCS for this interface mode */ 646 if (pl->using_mac_select_pcs) { 647 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 648 if (IS_ERR(pcs)) 649 return PTR_ERR(pcs); 650 } else { 651 pcs = pl->pcs; 652 } 653 654 if (pcs) { 655 /* The PCS, if present, must be setup before phylink_create() 656 * has been called. If the ops is not initialised, print an 657 * error and backtrace rather than oopsing the kernel. 658 */ 659 if (!pcs->ops) { 660 phylink_err(pl, "interface %s: uninitialised PCS\n", 661 phy_modes(state->interface)); 662 dump_stack(); 663 return -EINVAL; 664 } 665 666 /* Validate the link parameters with the PCS */ 667 if (pcs->ops->pcs_validate) { 668 ret = pcs->ops->pcs_validate(pcs, supported, state); 669 if (ret < 0 || phylink_is_empty_linkmode(supported)) 670 return -EINVAL; 671 672 /* Ensure the advertising mask is a subset of the 673 * supported mask. 674 */ 675 linkmode_and(state->advertising, state->advertising, 676 supported); 677 } 678 } 679 680 /* Then validate the link parameters with the MAC */ 681 if (pl->mac_ops->mac_get_caps) 682 capabilities = pl->mac_ops->mac_get_caps(pl->config, 683 state->interface); 684 else 685 capabilities = pl->config->mac_capabilities; 686 687 phylink_validate_mask_caps(supported, state, capabilities); 688 689 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 690 } 691 692 static int phylink_validate_mask(struct phylink *pl, unsigned long *supported, 693 struct phylink_link_state *state, 694 const unsigned long *interfaces) 695 { 696 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 697 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 698 __ETHTOOL_DECLARE_LINK_MODE_MASK(s); 699 struct phylink_link_state t; 700 int interface; 701 702 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) { 703 linkmode_copy(s, supported); 704 705 t = *state; 706 t.interface = interface; 707 if (!phylink_validate_mac_and_pcs(pl, s, &t)) { 708 linkmode_or(all_s, all_s, s); 709 linkmode_or(all_adv, all_adv, t.advertising); 710 } 711 } 712 713 linkmode_copy(supported, all_s); 714 linkmode_copy(state->advertising, all_adv); 715 716 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 717 } 718 719 static int phylink_validate(struct phylink *pl, unsigned long *supported, 720 struct phylink_link_state *state) 721 { 722 const unsigned long *interfaces = pl->config->supported_interfaces; 723 724 if (state->interface == PHY_INTERFACE_MODE_NA) 725 return phylink_validate_mask(pl, supported, state, interfaces); 726 727 if (!test_bit(state->interface, interfaces)) 728 return -EINVAL; 729 730 return phylink_validate_mac_and_pcs(pl, supported, state); 731 } 732 733 static int phylink_parse_fixedlink(struct phylink *pl, 734 const struct fwnode_handle *fwnode) 735 { 736 struct fwnode_handle *fixed_node; 737 bool pause, asym_pause, autoneg; 738 const struct phy_setting *s; 739 struct gpio_desc *desc; 740 u32 speed; 741 int ret; 742 743 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 744 if (fixed_node) { 745 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 746 747 pl->link_config.speed = speed; 748 pl->link_config.duplex = DUPLEX_HALF; 749 750 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 751 pl->link_config.duplex = DUPLEX_FULL; 752 753 /* We treat the "pause" and "asym-pause" terminology as 754 * defining the link partner's ability. 755 */ 756 if (fwnode_property_read_bool(fixed_node, "pause")) 757 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 758 pl->link_config.lp_advertising); 759 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 760 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 761 pl->link_config.lp_advertising); 762 763 if (ret == 0) { 764 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 765 GPIOD_IN, "?"); 766 767 if (!IS_ERR(desc)) 768 pl->link_gpio = desc; 769 else if (desc == ERR_PTR(-EPROBE_DEFER)) 770 ret = -EPROBE_DEFER; 771 } 772 fwnode_handle_put(fixed_node); 773 774 if (ret) 775 return ret; 776 } else { 777 u32 prop[5]; 778 779 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 780 NULL, 0); 781 if (ret != ARRAY_SIZE(prop)) { 782 phylink_err(pl, "broken fixed-link?\n"); 783 return -EINVAL; 784 } 785 786 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 787 prop, ARRAY_SIZE(prop)); 788 if (!ret) { 789 pl->link_config.duplex = prop[1] ? 790 DUPLEX_FULL : DUPLEX_HALF; 791 pl->link_config.speed = prop[2]; 792 if (prop[3]) 793 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 794 pl->link_config.lp_advertising); 795 if (prop[4]) 796 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 797 pl->link_config.lp_advertising); 798 } 799 } 800 801 if (pl->link_config.speed > SPEED_1000 && 802 pl->link_config.duplex != DUPLEX_FULL) 803 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 804 pl->link_config.speed); 805 806 linkmode_fill(pl->supported); 807 linkmode_copy(pl->link_config.advertising, pl->supported); 808 phylink_validate(pl, pl->supported, &pl->link_config); 809 810 pause = phylink_test(pl->supported, Pause); 811 asym_pause = phylink_test(pl->supported, Asym_Pause); 812 autoneg = phylink_test(pl->supported, Autoneg); 813 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 814 pl->supported, true); 815 linkmode_zero(pl->supported); 816 phylink_set(pl->supported, MII); 817 818 if (pause) 819 phylink_set(pl->supported, Pause); 820 821 if (asym_pause) 822 phylink_set(pl->supported, Asym_Pause); 823 824 if (autoneg) 825 phylink_set(pl->supported, Autoneg); 826 827 if (s) { 828 __set_bit(s->bit, pl->supported); 829 __set_bit(s->bit, pl->link_config.lp_advertising); 830 } else { 831 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 832 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 833 pl->link_config.speed); 834 } 835 836 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 837 pl->supported); 838 839 pl->link_config.link = 1; 840 pl->link_config.an_complete = 1; 841 842 return 0; 843 } 844 845 static int phylink_parse_mode(struct phylink *pl, 846 const struct fwnode_handle *fwnode) 847 { 848 struct fwnode_handle *dn; 849 const char *managed; 850 851 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 852 if (dn || fwnode_property_present(fwnode, "fixed-link")) 853 pl->cfg_link_an_mode = MLO_AN_FIXED; 854 fwnode_handle_put(dn); 855 856 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 857 strcmp(managed, "in-band-status") == 0) || 858 pl->config->ovr_an_inband) { 859 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 860 phylink_err(pl, 861 "can't use both fixed-link and in-band-status\n"); 862 return -EINVAL; 863 } 864 865 linkmode_zero(pl->supported); 866 phylink_set(pl->supported, MII); 867 phylink_set(pl->supported, Autoneg); 868 phylink_set(pl->supported, Asym_Pause); 869 phylink_set(pl->supported, Pause); 870 pl->cfg_link_an_mode = MLO_AN_INBAND; 871 872 switch (pl->link_config.interface) { 873 case PHY_INTERFACE_MODE_SGMII: 874 case PHY_INTERFACE_MODE_PSGMII: 875 case PHY_INTERFACE_MODE_QSGMII: 876 case PHY_INTERFACE_MODE_QUSGMII: 877 case PHY_INTERFACE_MODE_RGMII: 878 case PHY_INTERFACE_MODE_RGMII_ID: 879 case PHY_INTERFACE_MODE_RGMII_RXID: 880 case PHY_INTERFACE_MODE_RGMII_TXID: 881 case PHY_INTERFACE_MODE_RTBI: 882 phylink_set(pl->supported, 10baseT_Half); 883 phylink_set(pl->supported, 10baseT_Full); 884 phylink_set(pl->supported, 100baseT_Half); 885 phylink_set(pl->supported, 100baseT_Full); 886 phylink_set(pl->supported, 1000baseT_Half); 887 phylink_set(pl->supported, 1000baseT_Full); 888 break; 889 890 case PHY_INTERFACE_MODE_1000BASEX: 891 phylink_set(pl->supported, 1000baseX_Full); 892 break; 893 894 case PHY_INTERFACE_MODE_2500BASEX: 895 phylink_set(pl->supported, 2500baseX_Full); 896 break; 897 898 case PHY_INTERFACE_MODE_5GBASER: 899 phylink_set(pl->supported, 5000baseT_Full); 900 break; 901 902 case PHY_INTERFACE_MODE_25GBASER: 903 phylink_set(pl->supported, 25000baseCR_Full); 904 phylink_set(pl->supported, 25000baseKR_Full); 905 phylink_set(pl->supported, 25000baseSR_Full); 906 fallthrough; 907 case PHY_INTERFACE_MODE_USXGMII: 908 case PHY_INTERFACE_MODE_10GKR: 909 case PHY_INTERFACE_MODE_10GBASER: 910 phylink_set(pl->supported, 10baseT_Half); 911 phylink_set(pl->supported, 10baseT_Full); 912 phylink_set(pl->supported, 100baseT_Half); 913 phylink_set(pl->supported, 100baseT_Full); 914 phylink_set(pl->supported, 1000baseT_Half); 915 phylink_set(pl->supported, 1000baseT_Full); 916 phylink_set(pl->supported, 1000baseX_Full); 917 phylink_set(pl->supported, 1000baseKX_Full); 918 phylink_set(pl->supported, 2500baseT_Full); 919 phylink_set(pl->supported, 2500baseX_Full); 920 phylink_set(pl->supported, 5000baseT_Full); 921 phylink_set(pl->supported, 10000baseT_Full); 922 phylink_set(pl->supported, 10000baseKR_Full); 923 phylink_set(pl->supported, 10000baseKX4_Full); 924 phylink_set(pl->supported, 10000baseCR_Full); 925 phylink_set(pl->supported, 10000baseSR_Full); 926 phylink_set(pl->supported, 10000baseLR_Full); 927 phylink_set(pl->supported, 10000baseLRM_Full); 928 phylink_set(pl->supported, 10000baseER_Full); 929 break; 930 931 case PHY_INTERFACE_MODE_XLGMII: 932 phylink_set(pl->supported, 25000baseCR_Full); 933 phylink_set(pl->supported, 25000baseKR_Full); 934 phylink_set(pl->supported, 25000baseSR_Full); 935 phylink_set(pl->supported, 40000baseKR4_Full); 936 phylink_set(pl->supported, 40000baseCR4_Full); 937 phylink_set(pl->supported, 40000baseSR4_Full); 938 phylink_set(pl->supported, 40000baseLR4_Full); 939 phylink_set(pl->supported, 50000baseCR2_Full); 940 phylink_set(pl->supported, 50000baseKR2_Full); 941 phylink_set(pl->supported, 50000baseSR2_Full); 942 phylink_set(pl->supported, 50000baseKR_Full); 943 phylink_set(pl->supported, 50000baseSR_Full); 944 phylink_set(pl->supported, 50000baseCR_Full); 945 phylink_set(pl->supported, 50000baseLR_ER_FR_Full); 946 phylink_set(pl->supported, 50000baseDR_Full); 947 phylink_set(pl->supported, 100000baseKR4_Full); 948 phylink_set(pl->supported, 100000baseSR4_Full); 949 phylink_set(pl->supported, 100000baseCR4_Full); 950 phylink_set(pl->supported, 100000baseLR4_ER4_Full); 951 phylink_set(pl->supported, 100000baseKR2_Full); 952 phylink_set(pl->supported, 100000baseSR2_Full); 953 phylink_set(pl->supported, 100000baseCR2_Full); 954 phylink_set(pl->supported, 100000baseLR2_ER2_FR2_Full); 955 phylink_set(pl->supported, 100000baseDR2_Full); 956 break; 957 958 default: 959 phylink_err(pl, 960 "incorrect link mode %s for in-band status\n", 961 phy_modes(pl->link_config.interface)); 962 return -EINVAL; 963 } 964 965 linkmode_copy(pl->link_config.advertising, pl->supported); 966 967 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 968 phylink_err(pl, 969 "failed to validate link configuration for in-band status\n"); 970 return -EINVAL; 971 } 972 } 973 974 return 0; 975 } 976 977 static void phylink_apply_manual_flow(struct phylink *pl, 978 struct phylink_link_state *state) 979 { 980 /* If autoneg is disabled, pause AN is also disabled */ 981 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 982 state->advertising)) 983 state->pause &= ~MLO_PAUSE_AN; 984 985 /* Manual configuration of pause modes */ 986 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 987 state->pause = pl->link_config.pause; 988 } 989 990 static void phylink_resolve_an_pause(struct phylink_link_state *state) 991 { 992 bool tx_pause, rx_pause; 993 994 if (state->duplex == DUPLEX_FULL) { 995 linkmode_resolve_pause(state->advertising, 996 state->lp_advertising, 997 &tx_pause, &rx_pause); 998 if (tx_pause) 999 state->pause |= MLO_PAUSE_TX; 1000 if (rx_pause) 1001 state->pause |= MLO_PAUSE_RX; 1002 } 1003 } 1004 1005 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1006 phy_interface_t interface) 1007 { 1008 if (pcs && pcs->ops->pcs_pre_config) 1009 pcs->ops->pcs_pre_config(pcs, interface); 1010 } 1011 1012 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1013 phy_interface_t interface) 1014 { 1015 int err = 0; 1016 1017 if (pcs && pcs->ops->pcs_post_config) 1018 err = pcs->ops->pcs_post_config(pcs, interface); 1019 1020 return err; 1021 } 1022 1023 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1024 { 1025 if (pcs && pcs->ops->pcs_disable) 1026 pcs->ops->pcs_disable(pcs); 1027 } 1028 1029 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1030 { 1031 int err = 0; 1032 1033 if (pcs && pcs->ops->pcs_enable) 1034 err = pcs->ops->pcs_enable(pcs); 1035 1036 return err; 1037 } 1038 1039 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1040 const struct phylink_link_state *state, 1041 bool permit_pause_to_mac) 1042 { 1043 if (!pcs) 1044 return 0; 1045 1046 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1047 state->advertising, permit_pause_to_mac); 1048 } 1049 1050 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1051 phy_interface_t interface, int speed, 1052 int duplex) 1053 { 1054 if (pcs && pcs->ops->pcs_link_up) 1055 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1056 } 1057 1058 static void phylink_pcs_poll_stop(struct phylink *pl) 1059 { 1060 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1061 del_timer(&pl->link_poll); 1062 } 1063 1064 static void phylink_pcs_poll_start(struct phylink *pl) 1065 { 1066 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1067 mod_timer(&pl->link_poll, jiffies + HZ); 1068 } 1069 1070 static void phylink_mac_config(struct phylink *pl, 1071 const struct phylink_link_state *state) 1072 { 1073 struct phylink_link_state st = *state; 1074 1075 /* Stop drivers incorrectly using these */ 1076 linkmode_zero(st.lp_advertising); 1077 st.speed = SPEED_UNKNOWN; 1078 st.duplex = DUPLEX_UNKNOWN; 1079 st.an_complete = false; 1080 st.link = false; 1081 1082 phylink_dbg(pl, 1083 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1084 __func__, phylink_an_mode_str(pl->cur_link_an_mode), 1085 phy_modes(st.interface), 1086 phy_rate_matching_to_str(st.rate_matching), 1087 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1088 st.pause); 1089 1090 pl->mac_ops->mac_config(pl->config, pl->cur_link_an_mode, &st); 1091 } 1092 1093 static void phylink_pcs_an_restart(struct phylink *pl) 1094 { 1095 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1096 pl->link_config.advertising) && 1097 phy_interface_mode_is_8023z(pl->link_config.interface) && 1098 phylink_autoneg_inband(pl->cur_link_an_mode)) 1099 pl->pcs->ops->pcs_an_restart(pl->pcs); 1100 } 1101 1102 static void phylink_major_config(struct phylink *pl, bool restart, 1103 const struct phylink_link_state *state) 1104 { 1105 struct phylink_pcs *pcs = NULL; 1106 bool pcs_changed = false; 1107 unsigned int rate_kbd; 1108 unsigned int neg_mode; 1109 int err; 1110 1111 phylink_dbg(pl, "major config %s\n", phy_modes(state->interface)); 1112 1113 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1114 state->interface, 1115 state->advertising); 1116 1117 if (pl->using_mac_select_pcs) { 1118 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1119 if (IS_ERR(pcs)) { 1120 phylink_err(pl, 1121 "mac_select_pcs unexpectedly failed: %pe\n", 1122 pcs); 1123 return; 1124 } 1125 1126 pcs_changed = pcs && pl->pcs != pcs; 1127 } 1128 1129 phylink_pcs_poll_stop(pl); 1130 1131 if (pl->mac_ops->mac_prepare) { 1132 err = pl->mac_ops->mac_prepare(pl->config, pl->cur_link_an_mode, 1133 state->interface); 1134 if (err < 0) { 1135 phylink_err(pl, "mac_prepare failed: %pe\n", 1136 ERR_PTR(err)); 1137 return; 1138 } 1139 } 1140 1141 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1142 * for the change. 1143 */ 1144 if (pcs_changed) { 1145 phylink_pcs_disable(pl->pcs); 1146 1147 if (pl->pcs) 1148 pl->pcs->phylink = NULL; 1149 1150 pcs->phylink = pl; 1151 1152 pl->pcs = pcs; 1153 } 1154 1155 if (pl->pcs) 1156 phylink_pcs_pre_config(pl->pcs, state->interface); 1157 1158 phylink_mac_config(pl, state); 1159 1160 if (pl->pcs) 1161 phylink_pcs_post_config(pl->pcs, state->interface); 1162 1163 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1164 phylink_pcs_enable(pl->pcs); 1165 1166 neg_mode = pl->cur_link_an_mode; 1167 if (pl->pcs && pl->pcs->neg_mode) 1168 neg_mode = pl->pcs_neg_mode; 1169 1170 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1171 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1172 if (err < 0) 1173 phylink_err(pl, "pcs_config failed: %pe\n", 1174 ERR_PTR(err)); 1175 else if (err > 0) 1176 restart = true; 1177 1178 if (restart) 1179 phylink_pcs_an_restart(pl); 1180 1181 if (pl->mac_ops->mac_finish) { 1182 err = pl->mac_ops->mac_finish(pl->config, pl->cur_link_an_mode, 1183 state->interface); 1184 if (err < 0) 1185 phylink_err(pl, "mac_finish failed: %pe\n", 1186 ERR_PTR(err)); 1187 } 1188 1189 if (pl->sfp_bus) { 1190 rate_kbd = phylink_interface_signal_rate(state->interface); 1191 if (rate_kbd) 1192 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1193 } 1194 1195 phylink_pcs_poll_start(pl); 1196 } 1197 1198 /* 1199 * Reconfigure for a change of inband advertisement. 1200 * If we have a separate PCS, we only need to call its pcs_config() method, 1201 * and then restart AN if it indicates something changed. Otherwise, we do 1202 * the full MAC reconfiguration. 1203 */ 1204 static int phylink_change_inband_advert(struct phylink *pl) 1205 { 1206 unsigned int neg_mode; 1207 int ret; 1208 1209 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1210 return 0; 1211 1212 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1213 phylink_an_mode_str(pl->cur_link_an_mode), 1214 phy_modes(pl->link_config.interface), 1215 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1216 pl->link_config.pause); 1217 1218 /* Recompute the PCS neg mode */ 1219 pl->pcs_neg_mode = phylink_pcs_neg_mode(pl->cur_link_an_mode, 1220 pl->link_config.interface, 1221 pl->link_config.advertising); 1222 1223 neg_mode = pl->cur_link_an_mode; 1224 if (pl->pcs->neg_mode) 1225 neg_mode = pl->pcs_neg_mode; 1226 1227 /* Modern PCS-based method; update the advert at the PCS, and 1228 * restart negotiation if the pcs_config() helper indicates that 1229 * the programmed advertisement has changed. 1230 */ 1231 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1232 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1233 if (ret < 0) 1234 return ret; 1235 1236 if (ret > 0) 1237 phylink_pcs_an_restart(pl); 1238 1239 return 0; 1240 } 1241 1242 static void phylink_mac_pcs_get_state(struct phylink *pl, 1243 struct phylink_link_state *state) 1244 { 1245 linkmode_copy(state->advertising, pl->link_config.advertising); 1246 linkmode_zero(state->lp_advertising); 1247 state->interface = pl->link_config.interface; 1248 state->rate_matching = pl->link_config.rate_matching; 1249 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1250 state->advertising)) { 1251 state->speed = SPEED_UNKNOWN; 1252 state->duplex = DUPLEX_UNKNOWN; 1253 state->pause = MLO_PAUSE_NONE; 1254 } else { 1255 state->speed = pl->link_config.speed; 1256 state->duplex = pl->link_config.duplex; 1257 state->pause = pl->link_config.pause; 1258 } 1259 state->an_complete = 0; 1260 state->link = 1; 1261 1262 if (pl->pcs) 1263 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1264 else 1265 state->link = 0; 1266 } 1267 1268 /* The fixed state is... fixed except for the link state, 1269 * which may be determined by a GPIO or a callback. 1270 */ 1271 static void phylink_get_fixed_state(struct phylink *pl, 1272 struct phylink_link_state *state) 1273 { 1274 *state = pl->link_config; 1275 if (pl->config->get_fixed_state) 1276 pl->config->get_fixed_state(pl->config, state); 1277 else if (pl->link_gpio) 1278 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1279 1280 state->pause = MLO_PAUSE_NONE; 1281 phylink_resolve_an_pause(state); 1282 } 1283 1284 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1285 { 1286 struct phylink_link_state link_state; 1287 1288 switch (pl->cur_link_an_mode) { 1289 case MLO_AN_PHY: 1290 link_state = pl->phy_state; 1291 break; 1292 1293 case MLO_AN_FIXED: 1294 phylink_get_fixed_state(pl, &link_state); 1295 break; 1296 1297 case MLO_AN_INBAND: 1298 link_state = pl->link_config; 1299 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1300 link_state.pause = MLO_PAUSE_NONE; 1301 break; 1302 1303 default: /* can't happen */ 1304 return; 1305 } 1306 1307 link_state.link = false; 1308 1309 phylink_apply_manual_flow(pl, &link_state); 1310 phylink_major_config(pl, force_restart, &link_state); 1311 } 1312 1313 static const char *phylink_pause_to_str(int pause) 1314 { 1315 switch (pause & MLO_PAUSE_TXRX_MASK) { 1316 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1317 return "rx/tx"; 1318 case MLO_PAUSE_TX: 1319 return "tx"; 1320 case MLO_PAUSE_RX: 1321 return "rx"; 1322 default: 1323 return "off"; 1324 } 1325 } 1326 1327 static void phylink_link_up(struct phylink *pl, 1328 struct phylink_link_state link_state) 1329 { 1330 struct net_device *ndev = pl->netdev; 1331 unsigned int neg_mode; 1332 int speed, duplex; 1333 bool rx_pause; 1334 1335 speed = link_state.speed; 1336 duplex = link_state.duplex; 1337 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1338 1339 switch (link_state.rate_matching) { 1340 case RATE_MATCH_PAUSE: 1341 /* The PHY is doing rate matchion from the media rate (in 1342 * the link_state) to the interface speed, and will send 1343 * pause frames to the MAC to limit its transmission speed. 1344 */ 1345 speed = phylink_interface_max_speed(link_state.interface); 1346 duplex = DUPLEX_FULL; 1347 rx_pause = true; 1348 break; 1349 1350 case RATE_MATCH_CRS: 1351 /* The PHY is doing rate matchion from the media rate (in 1352 * the link_state) to the interface speed, and will cause 1353 * collisions to the MAC to limit its transmission speed. 1354 */ 1355 speed = phylink_interface_max_speed(link_state.interface); 1356 duplex = DUPLEX_HALF; 1357 break; 1358 } 1359 1360 pl->cur_interface = link_state.interface; 1361 1362 neg_mode = pl->cur_link_an_mode; 1363 if (pl->pcs && pl->pcs->neg_mode) 1364 neg_mode = pl->pcs_neg_mode; 1365 1366 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1367 duplex); 1368 1369 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->cur_link_an_mode, 1370 pl->cur_interface, speed, duplex, 1371 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1372 1373 if (ndev) 1374 netif_carrier_on(ndev); 1375 1376 phylink_info(pl, 1377 "Link is Up - %s/%s - flow control %s\n", 1378 phy_speed_to_str(link_state.speed), 1379 phy_duplex_to_str(link_state.duplex), 1380 phylink_pause_to_str(link_state.pause)); 1381 } 1382 1383 static void phylink_link_down(struct phylink *pl) 1384 { 1385 struct net_device *ndev = pl->netdev; 1386 1387 if (ndev) 1388 netif_carrier_off(ndev); 1389 pl->mac_ops->mac_link_down(pl->config, pl->cur_link_an_mode, 1390 pl->cur_interface); 1391 phylink_info(pl, "Link is Down\n"); 1392 } 1393 1394 static void phylink_resolve(struct work_struct *w) 1395 { 1396 struct phylink *pl = container_of(w, struct phylink, resolve); 1397 struct phylink_link_state link_state; 1398 struct net_device *ndev = pl->netdev; 1399 bool mac_config = false; 1400 bool retrigger = false; 1401 bool cur_link_state; 1402 1403 mutex_lock(&pl->state_mutex); 1404 if (pl->netdev) 1405 cur_link_state = netif_carrier_ok(ndev); 1406 else 1407 cur_link_state = pl->old_link_state; 1408 1409 if (pl->phylink_disable_state) { 1410 pl->mac_link_dropped = false; 1411 link_state.link = false; 1412 } else if (pl->mac_link_dropped) { 1413 link_state.link = false; 1414 retrigger = true; 1415 } else { 1416 switch (pl->cur_link_an_mode) { 1417 case MLO_AN_PHY: 1418 link_state = pl->phy_state; 1419 phylink_apply_manual_flow(pl, &link_state); 1420 mac_config = link_state.link; 1421 break; 1422 1423 case MLO_AN_FIXED: 1424 phylink_get_fixed_state(pl, &link_state); 1425 mac_config = link_state.link; 1426 break; 1427 1428 case MLO_AN_INBAND: 1429 phylink_mac_pcs_get_state(pl, &link_state); 1430 1431 /* The PCS may have a latching link-fail indicator. 1432 * If the link was up, bring the link down and 1433 * re-trigger the resolve. Otherwise, re-read the 1434 * PCS state to get the current status of the link. 1435 */ 1436 if (!link_state.link) { 1437 if (cur_link_state) 1438 retrigger = true; 1439 else 1440 phylink_mac_pcs_get_state(pl, 1441 &link_state); 1442 } 1443 1444 /* If we have a phy, the "up" state is the union of 1445 * both the PHY and the MAC 1446 */ 1447 if (pl->phydev) 1448 link_state.link &= pl->phy_state.link; 1449 1450 /* Only update if the PHY link is up */ 1451 if (pl->phydev && pl->phy_state.link) { 1452 /* If the interface has changed, force a 1453 * link down event if the link isn't already 1454 * down, and re-resolve. 1455 */ 1456 if (link_state.interface != 1457 pl->phy_state.interface) { 1458 retrigger = true; 1459 link_state.link = false; 1460 } 1461 link_state.interface = pl->phy_state.interface; 1462 1463 /* If we are doing rate matching, then the 1464 * link speed/duplex comes from the PHY 1465 */ 1466 if (pl->phy_state.rate_matching) { 1467 link_state.rate_matching = 1468 pl->phy_state.rate_matching; 1469 link_state.speed = pl->phy_state.speed; 1470 link_state.duplex = 1471 pl->phy_state.duplex; 1472 } 1473 1474 /* If we have a PHY, we need to update with 1475 * the PHY flow control bits. 1476 */ 1477 link_state.pause = pl->phy_state.pause; 1478 mac_config = true; 1479 } 1480 phylink_apply_manual_flow(pl, &link_state); 1481 break; 1482 } 1483 } 1484 1485 if (mac_config) { 1486 if (link_state.interface != pl->link_config.interface) { 1487 /* The interface has changed, force the link down and 1488 * then reconfigure. 1489 */ 1490 if (cur_link_state) { 1491 phylink_link_down(pl); 1492 cur_link_state = false; 1493 } 1494 phylink_major_config(pl, false, &link_state); 1495 pl->link_config.interface = link_state.interface; 1496 } 1497 } 1498 1499 if (link_state.link != cur_link_state) { 1500 pl->old_link_state = link_state.link; 1501 if (!link_state.link) 1502 phylink_link_down(pl); 1503 else 1504 phylink_link_up(pl, link_state); 1505 } 1506 if (!link_state.link && retrigger) { 1507 pl->mac_link_dropped = false; 1508 queue_work(system_power_efficient_wq, &pl->resolve); 1509 } 1510 mutex_unlock(&pl->state_mutex); 1511 } 1512 1513 static void phylink_run_resolve(struct phylink *pl) 1514 { 1515 if (!pl->phylink_disable_state) 1516 queue_work(system_power_efficient_wq, &pl->resolve); 1517 } 1518 1519 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1520 { 1521 unsigned long state = pl->phylink_disable_state; 1522 1523 set_bit(bit, &pl->phylink_disable_state); 1524 if (state == 0) { 1525 queue_work(system_power_efficient_wq, &pl->resolve); 1526 flush_work(&pl->resolve); 1527 } 1528 } 1529 1530 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1531 { 1532 clear_bit(bit, &pl->phylink_disable_state); 1533 phylink_run_resolve(pl); 1534 } 1535 1536 static void phylink_fixed_poll(struct timer_list *t) 1537 { 1538 struct phylink *pl = container_of(t, struct phylink, link_poll); 1539 1540 mod_timer(t, jiffies + HZ); 1541 1542 phylink_run_resolve(pl); 1543 } 1544 1545 static const struct sfp_upstream_ops sfp_phylink_ops; 1546 1547 static int phylink_register_sfp(struct phylink *pl, 1548 const struct fwnode_handle *fwnode) 1549 { 1550 struct sfp_bus *bus; 1551 int ret; 1552 1553 if (!fwnode) 1554 return 0; 1555 1556 bus = sfp_bus_find_fwnode(fwnode); 1557 if (IS_ERR(bus)) { 1558 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1559 return PTR_ERR(bus); 1560 } 1561 1562 pl->sfp_bus = bus; 1563 1564 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1565 sfp_bus_put(bus); 1566 1567 return ret; 1568 } 1569 1570 /** 1571 * phylink_create() - create a phylink instance 1572 * @config: a pointer to the target &struct phylink_config 1573 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1574 * interface 1575 * @iface: the desired link mode defined by &typedef phy_interface_t 1576 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1577 * 1578 * Create a new phylink instance, and parse the link parameters found in @np. 1579 * This will parse in-band modes, fixed-link or SFP configuration. 1580 * 1581 * Note: the rtnl lock must not be held when calling this function. 1582 * 1583 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1584 * must use IS_ERR() to check for errors from this function. 1585 */ 1586 struct phylink *phylink_create(struct phylink_config *config, 1587 const struct fwnode_handle *fwnode, 1588 phy_interface_t iface, 1589 const struct phylink_mac_ops *mac_ops) 1590 { 1591 bool using_mac_select_pcs = false; 1592 struct phylink *pl; 1593 int ret; 1594 1595 /* Validate the supplied configuration */ 1596 if (phy_interface_empty(config->supported_interfaces)) { 1597 dev_err(config->dev, 1598 "phylink: error: empty supported_interfaces\n"); 1599 return ERR_PTR(-EINVAL); 1600 } 1601 1602 if (mac_ops->mac_select_pcs && 1603 mac_ops->mac_select_pcs(config, PHY_INTERFACE_MODE_NA) != 1604 ERR_PTR(-EOPNOTSUPP)) 1605 using_mac_select_pcs = true; 1606 1607 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1608 if (!pl) 1609 return ERR_PTR(-ENOMEM); 1610 1611 mutex_init(&pl->state_mutex); 1612 INIT_WORK(&pl->resolve, phylink_resolve); 1613 1614 pl->config = config; 1615 if (config->type == PHYLINK_NETDEV) { 1616 pl->netdev = to_net_dev(config->dev); 1617 netif_carrier_off(pl->netdev); 1618 } else if (config->type == PHYLINK_DEV) { 1619 pl->dev = config->dev; 1620 } else { 1621 kfree(pl); 1622 return ERR_PTR(-EINVAL); 1623 } 1624 1625 pl->using_mac_select_pcs = using_mac_select_pcs; 1626 pl->phy_state.interface = iface; 1627 pl->link_interface = iface; 1628 if (iface == PHY_INTERFACE_MODE_MOCA) 1629 pl->link_port = PORT_BNC; 1630 else 1631 pl->link_port = PORT_MII; 1632 pl->link_config.interface = iface; 1633 pl->link_config.pause = MLO_PAUSE_AN; 1634 pl->link_config.speed = SPEED_UNKNOWN; 1635 pl->link_config.duplex = DUPLEX_UNKNOWN; 1636 pl->pcs_state = PCS_STATE_DOWN; 1637 pl->mac_ops = mac_ops; 1638 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1639 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1640 1641 linkmode_fill(pl->supported); 1642 linkmode_copy(pl->link_config.advertising, pl->supported); 1643 phylink_validate(pl, pl->supported, &pl->link_config); 1644 1645 ret = phylink_parse_mode(pl, fwnode); 1646 if (ret < 0) { 1647 kfree(pl); 1648 return ERR_PTR(ret); 1649 } 1650 1651 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1652 ret = phylink_parse_fixedlink(pl, fwnode); 1653 if (ret < 0) { 1654 kfree(pl); 1655 return ERR_PTR(ret); 1656 } 1657 } 1658 1659 pl->cur_link_an_mode = pl->cfg_link_an_mode; 1660 1661 ret = phylink_register_sfp(pl, fwnode); 1662 if (ret < 0) { 1663 kfree(pl); 1664 return ERR_PTR(ret); 1665 } 1666 1667 return pl; 1668 } 1669 EXPORT_SYMBOL_GPL(phylink_create); 1670 1671 /** 1672 * phylink_destroy() - cleanup and destroy the phylink instance 1673 * @pl: a pointer to a &struct phylink returned from phylink_create() 1674 * 1675 * Destroy a phylink instance. Any PHY that has been attached must have been 1676 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1677 * 1678 * Note: the rtnl lock must not be held when calling this function. 1679 */ 1680 void phylink_destroy(struct phylink *pl) 1681 { 1682 sfp_bus_del_upstream(pl->sfp_bus); 1683 if (pl->link_gpio) 1684 gpiod_put(pl->link_gpio); 1685 1686 cancel_work_sync(&pl->resolve); 1687 kfree(pl); 1688 } 1689 EXPORT_SYMBOL_GPL(phylink_destroy); 1690 1691 /** 1692 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1693 * @pl: a pointer to a &struct phylink returned from phylink_create() 1694 * 1695 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1696 * no PHY is needed. 1697 * 1698 * Returns true if phylink will be expecting a PHY. 1699 */ 1700 bool phylink_expects_phy(struct phylink *pl) 1701 { 1702 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1703 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1704 phy_interface_mode_is_8023z(pl->link_config.interface))) 1705 return false; 1706 return true; 1707 } 1708 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1709 1710 static void phylink_phy_change(struct phy_device *phydev, bool up) 1711 { 1712 struct phylink *pl = phydev->phylink; 1713 bool tx_pause, rx_pause; 1714 1715 phy_get_pause(phydev, &tx_pause, &rx_pause); 1716 1717 mutex_lock(&pl->state_mutex); 1718 pl->phy_state.speed = phydev->speed; 1719 pl->phy_state.duplex = phydev->duplex; 1720 pl->phy_state.rate_matching = phydev->rate_matching; 1721 pl->phy_state.pause = MLO_PAUSE_NONE; 1722 if (tx_pause) 1723 pl->phy_state.pause |= MLO_PAUSE_TX; 1724 if (rx_pause) 1725 pl->phy_state.pause |= MLO_PAUSE_RX; 1726 pl->phy_state.interface = phydev->interface; 1727 pl->phy_state.link = up; 1728 mutex_unlock(&pl->state_mutex); 1729 1730 phylink_run_resolve(pl); 1731 1732 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 1733 phy_modes(phydev->interface), 1734 phy_speed_to_str(phydev->speed), 1735 phy_duplex_to_str(phydev->duplex), 1736 phy_rate_matching_to_str(phydev->rate_matching), 1737 phylink_pause_to_str(pl->phy_state.pause)); 1738 } 1739 1740 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 1741 phy_interface_t interface) 1742 { 1743 struct phylink_link_state config; 1744 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 1745 char *irq_str; 1746 int ret; 1747 1748 /* 1749 * This is the new way of dealing with flow control for PHYs, 1750 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 1751 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 1752 * using our validate call to the MAC, we rely upon the MAC 1753 * clearing the bits from both supported and advertising fields. 1754 */ 1755 phy_support_asym_pause(phy); 1756 1757 memset(&config, 0, sizeof(config)); 1758 linkmode_copy(supported, phy->supported); 1759 linkmode_copy(config.advertising, phy->advertising); 1760 1761 /* Check whether we would use rate matching for the proposed interface 1762 * mode. 1763 */ 1764 config.rate_matching = phy_get_rate_matching(phy, interface); 1765 1766 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 1767 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 1768 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 1769 * their Serdes is either unnecessary or not reasonable. 1770 * 1771 * For these which switch interface modes, we really need to know which 1772 * interface modes the PHY supports to properly work out which ethtool 1773 * linkmodes can be supported. For now, as a work-around, we validate 1774 * against all interface modes, which may lead to more ethtool link 1775 * modes being advertised than are actually supported. 1776 */ 1777 if (phy->is_c45 && config.rate_matching == RATE_MATCH_NONE && 1778 interface != PHY_INTERFACE_MODE_RXAUI && 1779 interface != PHY_INTERFACE_MODE_XAUI && 1780 interface != PHY_INTERFACE_MODE_USXGMII) 1781 config.interface = PHY_INTERFACE_MODE_NA; 1782 else 1783 config.interface = interface; 1784 1785 ret = phylink_validate(pl, supported, &config); 1786 if (ret) { 1787 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 1788 phy_modes(config.interface), 1789 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 1790 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 1791 ERR_PTR(ret)); 1792 return ret; 1793 } 1794 1795 phy->phylink = pl; 1796 phy->phy_link_change = phylink_phy_change; 1797 1798 irq_str = phy_attached_info_irq(phy); 1799 phylink_info(pl, 1800 "PHY [%s] driver [%s] (irq=%s)\n", 1801 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 1802 kfree(irq_str); 1803 1804 mutex_lock(&phy->lock); 1805 mutex_lock(&pl->state_mutex); 1806 pl->phydev = phy; 1807 pl->phy_state.interface = interface; 1808 pl->phy_state.pause = MLO_PAUSE_NONE; 1809 pl->phy_state.speed = SPEED_UNKNOWN; 1810 pl->phy_state.duplex = DUPLEX_UNKNOWN; 1811 pl->phy_state.rate_matching = RATE_MATCH_NONE; 1812 linkmode_copy(pl->supported, supported); 1813 linkmode_copy(pl->link_config.advertising, config.advertising); 1814 1815 /* Restrict the phy advertisement according to the MAC support. */ 1816 linkmode_copy(phy->advertising, config.advertising); 1817 mutex_unlock(&pl->state_mutex); 1818 mutex_unlock(&phy->lock); 1819 1820 phylink_dbg(pl, 1821 "phy: %s setting supported %*pb advertising %*pb\n", 1822 phy_modes(interface), 1823 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 1824 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 1825 1826 if (phy_interrupt_is_valid(phy)) 1827 phy_request_interrupt(phy); 1828 1829 if (pl->config->mac_managed_pm) 1830 phy->mac_managed_pm = true; 1831 1832 return 0; 1833 } 1834 1835 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 1836 phy_interface_t interface) 1837 { 1838 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 1839 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1840 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 1841 return -EINVAL; 1842 1843 if (pl->phydev) 1844 return -EBUSY; 1845 1846 return phy_attach_direct(pl->netdev, phy, 0, interface); 1847 } 1848 1849 /** 1850 * phylink_connect_phy() - connect a PHY to the phylink instance 1851 * @pl: a pointer to a &struct phylink returned from phylink_create() 1852 * @phy: a pointer to a &struct phy_device. 1853 * 1854 * Connect @phy to the phylink instance specified by @pl by calling 1855 * phy_attach_direct(). Configure the @phy according to the MAC driver's 1856 * capabilities, start the PHYLIB state machine and enable any interrupts 1857 * that the PHY supports. 1858 * 1859 * This updates the phylink's ethtool supported and advertising link mode 1860 * masks. 1861 * 1862 * Returns 0 on success or a negative errno. 1863 */ 1864 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 1865 { 1866 int ret; 1867 1868 /* Use PHY device/driver interface */ 1869 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1870 pl->link_interface = phy->interface; 1871 pl->link_config.interface = pl->link_interface; 1872 } 1873 1874 ret = phylink_attach_phy(pl, phy, pl->link_interface); 1875 if (ret < 0) 1876 return ret; 1877 1878 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 1879 if (ret) 1880 phy_detach(phy); 1881 1882 return ret; 1883 } 1884 EXPORT_SYMBOL_GPL(phylink_connect_phy); 1885 1886 /** 1887 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 1888 * @pl: a pointer to a &struct phylink returned from phylink_create() 1889 * @dn: a pointer to a &struct device_node. 1890 * @flags: PHY-specific flags to communicate to the PHY device driver 1891 * 1892 * Connect the phy specified in the device node @dn to the phylink instance 1893 * specified by @pl. Actions specified in phylink_connect_phy() will be 1894 * performed. 1895 * 1896 * Returns 0 on success or a negative errno. 1897 */ 1898 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 1899 u32 flags) 1900 { 1901 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 1902 } 1903 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 1904 1905 /** 1906 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 1907 * @pl: a pointer to a &struct phylink returned from phylink_create() 1908 * @fwnode: a pointer to a &struct fwnode_handle. 1909 * @flags: PHY-specific flags to communicate to the PHY device driver 1910 * 1911 * Connect the phy specified @fwnode to the phylink instance specified 1912 * by @pl. 1913 * 1914 * Returns 0 on success or a negative errno. 1915 */ 1916 int phylink_fwnode_phy_connect(struct phylink *pl, 1917 const struct fwnode_handle *fwnode, 1918 u32 flags) 1919 { 1920 struct fwnode_handle *phy_fwnode; 1921 struct phy_device *phy_dev; 1922 int ret; 1923 1924 /* Fixed links and 802.3z are handled without needing a PHY */ 1925 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1926 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1927 phy_interface_mode_is_8023z(pl->link_interface))) 1928 return 0; 1929 1930 phy_fwnode = fwnode_get_phy_node(fwnode); 1931 if (IS_ERR(phy_fwnode)) { 1932 if (pl->cfg_link_an_mode == MLO_AN_PHY) 1933 return -ENODEV; 1934 return 0; 1935 } 1936 1937 phy_dev = fwnode_phy_find_device(phy_fwnode); 1938 /* We're done with the phy_node handle */ 1939 fwnode_handle_put(phy_fwnode); 1940 if (!phy_dev) 1941 return -ENODEV; 1942 1943 /* Use PHY device/driver interface */ 1944 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 1945 pl->link_interface = phy_dev->interface; 1946 pl->link_config.interface = pl->link_interface; 1947 } 1948 1949 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 1950 pl->link_interface); 1951 phy_device_free(phy_dev); 1952 if (ret) 1953 return ret; 1954 1955 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 1956 if (ret) 1957 phy_detach(phy_dev); 1958 1959 return ret; 1960 } 1961 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 1962 1963 /** 1964 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 1965 * instance. 1966 * @pl: a pointer to a &struct phylink returned from phylink_create() 1967 * 1968 * Disconnect any current PHY from the phylink instance described by @pl. 1969 */ 1970 void phylink_disconnect_phy(struct phylink *pl) 1971 { 1972 struct phy_device *phy; 1973 1974 ASSERT_RTNL(); 1975 1976 phy = pl->phydev; 1977 if (phy) { 1978 mutex_lock(&phy->lock); 1979 mutex_lock(&pl->state_mutex); 1980 pl->phydev = NULL; 1981 mutex_unlock(&pl->state_mutex); 1982 mutex_unlock(&phy->lock); 1983 flush_work(&pl->resolve); 1984 1985 phy_disconnect(phy); 1986 } 1987 } 1988 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 1989 1990 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 1991 { 1992 if (!up) 1993 pl->mac_link_dropped = true; 1994 phylink_run_resolve(pl); 1995 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 1996 } 1997 1998 /** 1999 * phylink_mac_change() - notify phylink of a change in MAC state 2000 * @pl: a pointer to a &struct phylink returned from phylink_create() 2001 * @up: indicates whether the link is currently up. 2002 * 2003 * The MAC driver should call this driver when the state of its link 2004 * changes (eg, link failure, new negotiation results, etc.) 2005 */ 2006 void phylink_mac_change(struct phylink *pl, bool up) 2007 { 2008 phylink_link_changed(pl, up, "mac"); 2009 } 2010 EXPORT_SYMBOL_GPL(phylink_mac_change); 2011 2012 /** 2013 * phylink_pcs_change() - notify phylink of a change to PCS link state 2014 * @pcs: pointer to &struct phylink_pcs 2015 * @up: indicates whether the link is currently up. 2016 * 2017 * The PCS driver should call this when the state of its link changes 2018 * (e.g. link failure, new negotiation results, etc.) Note: it should 2019 * not determine "up" by reading the BMSR. If in doubt about the link 2020 * state at interrupt time, then pass true if pcs_get_state() returns 2021 * the latched link-down state, otherwise pass false. 2022 */ 2023 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2024 { 2025 struct phylink *pl = pcs->phylink; 2026 2027 if (pl) 2028 phylink_link_changed(pl, up, "pcs"); 2029 } 2030 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2031 2032 static irqreturn_t phylink_link_handler(int irq, void *data) 2033 { 2034 struct phylink *pl = data; 2035 2036 phylink_run_resolve(pl); 2037 2038 return IRQ_HANDLED; 2039 } 2040 2041 /** 2042 * phylink_start() - start a phylink instance 2043 * @pl: a pointer to a &struct phylink returned from phylink_create() 2044 * 2045 * Start the phylink instance specified by @pl, configuring the MAC for the 2046 * desired link mode(s) and negotiation style. This should be called from the 2047 * network device driver's &struct net_device_ops ndo_open() method. 2048 */ 2049 void phylink_start(struct phylink *pl) 2050 { 2051 bool poll = false; 2052 2053 ASSERT_RTNL(); 2054 2055 phylink_info(pl, "configuring for %s/%s link mode\n", 2056 phylink_an_mode_str(pl->cur_link_an_mode), 2057 phy_modes(pl->link_config.interface)); 2058 2059 /* Always set the carrier off */ 2060 if (pl->netdev) 2061 netif_carrier_off(pl->netdev); 2062 2063 pl->pcs_state = PCS_STATE_STARTING; 2064 2065 /* Apply the link configuration to the MAC when starting. This allows 2066 * a fixed-link to start with the correct parameters, and also 2067 * ensures that we set the appropriate advertisement for Serdes links. 2068 * 2069 * Restart autonegotiation if using 802.3z to ensure that the link 2070 * parameters are properly negotiated. This is necessary for DSA 2071 * switches using 802.3z negotiation to ensure they see our modes. 2072 */ 2073 phylink_mac_initial_config(pl, true); 2074 2075 pl->pcs_state = PCS_STATE_STARTED; 2076 2077 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2078 2079 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2080 int irq = gpiod_to_irq(pl->link_gpio); 2081 2082 if (irq > 0) { 2083 if (!request_irq(irq, phylink_link_handler, 2084 IRQF_TRIGGER_RISING | 2085 IRQF_TRIGGER_FALLING, 2086 "netdev link", pl)) 2087 pl->link_irq = irq; 2088 else 2089 irq = 0; 2090 } 2091 if (irq <= 0) 2092 poll = true; 2093 } 2094 2095 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2096 poll |= pl->config->poll_fixed_state; 2097 2098 if (poll) 2099 mod_timer(&pl->link_poll, jiffies + HZ); 2100 if (pl->phydev) 2101 phy_start(pl->phydev); 2102 if (pl->sfp_bus) 2103 sfp_upstream_start(pl->sfp_bus); 2104 } 2105 EXPORT_SYMBOL_GPL(phylink_start); 2106 2107 /** 2108 * phylink_stop() - stop a phylink instance 2109 * @pl: a pointer to a &struct phylink returned from phylink_create() 2110 * 2111 * Stop the phylink instance specified by @pl. This should be called from the 2112 * network device driver's &struct net_device_ops ndo_stop() method. The 2113 * network device's carrier state should not be changed prior to calling this 2114 * function. 2115 * 2116 * This will synchronously bring down the link if the link is not already 2117 * down (in other words, it will trigger a mac_link_down() method call.) 2118 */ 2119 void phylink_stop(struct phylink *pl) 2120 { 2121 ASSERT_RTNL(); 2122 2123 if (pl->sfp_bus) 2124 sfp_upstream_stop(pl->sfp_bus); 2125 if (pl->phydev) 2126 phy_stop(pl->phydev); 2127 del_timer_sync(&pl->link_poll); 2128 if (pl->link_irq) { 2129 free_irq(pl->link_irq, pl); 2130 pl->link_irq = 0; 2131 } 2132 2133 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2134 2135 pl->pcs_state = PCS_STATE_DOWN; 2136 2137 phylink_pcs_disable(pl->pcs); 2138 } 2139 EXPORT_SYMBOL_GPL(phylink_stop); 2140 2141 /** 2142 * phylink_suspend() - handle a network device suspend event 2143 * @pl: a pointer to a &struct phylink returned from phylink_create() 2144 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2145 * 2146 * Handle a network device suspend event. There are several cases: 2147 * 2148 * - If Wake-on-Lan is not active, we can bring down the link between 2149 * the MAC and PHY by calling phylink_stop(). 2150 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2151 * can also bring down the link between the MAC and PHY. 2152 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2153 * still needs to receive packets, so we can not bring the link down. 2154 */ 2155 void phylink_suspend(struct phylink *pl, bool mac_wol) 2156 { 2157 ASSERT_RTNL(); 2158 2159 if (mac_wol && (!pl->netdev || pl->netdev->wol_enabled)) { 2160 /* Wake-on-Lan enabled, MAC handling */ 2161 mutex_lock(&pl->state_mutex); 2162 2163 /* Stop the resolver bringing the link up */ 2164 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2165 2166 /* Disable the carrier, to prevent transmit timeouts, 2167 * but one would hope all packets have been sent. This 2168 * also means phylink_resolve() will do nothing. 2169 */ 2170 if (pl->netdev) 2171 netif_carrier_off(pl->netdev); 2172 else 2173 pl->old_link_state = false; 2174 2175 /* We do not call mac_link_down() here as we want the 2176 * link to remain up to receive the WoL packets. 2177 */ 2178 mutex_unlock(&pl->state_mutex); 2179 } else { 2180 phylink_stop(pl); 2181 } 2182 } 2183 EXPORT_SYMBOL_GPL(phylink_suspend); 2184 2185 /** 2186 * phylink_resume() - handle a network device resume event 2187 * @pl: a pointer to a &struct phylink returned from phylink_create() 2188 * 2189 * Undo the effects of phylink_suspend(), returning the link to an 2190 * operational state. 2191 */ 2192 void phylink_resume(struct phylink *pl) 2193 { 2194 ASSERT_RTNL(); 2195 2196 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2197 /* Wake-on-Lan enabled, MAC handling */ 2198 2199 /* Call mac_link_down() so we keep the overall state balanced. 2200 * Do this under the state_mutex lock for consistency. This 2201 * will cause a "Link Down" message to be printed during 2202 * resume, which is harmless - the true link state will be 2203 * printed when we run a resolve. 2204 */ 2205 mutex_lock(&pl->state_mutex); 2206 phylink_link_down(pl); 2207 mutex_unlock(&pl->state_mutex); 2208 2209 /* Re-apply the link parameters so that all the settings get 2210 * restored to the MAC. 2211 */ 2212 phylink_mac_initial_config(pl, true); 2213 2214 /* Re-enable and re-resolve the link parameters */ 2215 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2216 } else { 2217 phylink_start(pl); 2218 } 2219 } 2220 EXPORT_SYMBOL_GPL(phylink_resume); 2221 2222 /** 2223 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2224 * @pl: a pointer to a &struct phylink returned from phylink_create() 2225 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2226 * 2227 * Read the wake on lan parameters from the PHY attached to the phylink 2228 * instance specified by @pl. If no PHY is currently attached, report no 2229 * support for wake on lan. 2230 */ 2231 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2232 { 2233 ASSERT_RTNL(); 2234 2235 wol->supported = 0; 2236 wol->wolopts = 0; 2237 2238 if (pl->phydev) 2239 phy_ethtool_get_wol(pl->phydev, wol); 2240 } 2241 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2242 2243 /** 2244 * phylink_ethtool_set_wol() - set wake on lan parameters 2245 * @pl: a pointer to a &struct phylink returned from phylink_create() 2246 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2247 * 2248 * Set the wake on lan parameters for the PHY attached to the phylink 2249 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2250 * error. 2251 * 2252 * Returns zero on success or negative errno code. 2253 */ 2254 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2255 { 2256 int ret = -EOPNOTSUPP; 2257 2258 ASSERT_RTNL(); 2259 2260 if (pl->phydev) 2261 ret = phy_ethtool_set_wol(pl->phydev, wol); 2262 2263 return ret; 2264 } 2265 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2266 2267 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2268 { 2269 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2270 2271 linkmode_zero(mask); 2272 phylink_set_port_modes(mask); 2273 2274 linkmode_and(dst, dst, mask); 2275 linkmode_or(dst, dst, b); 2276 } 2277 2278 static void phylink_get_ksettings(const struct phylink_link_state *state, 2279 struct ethtool_link_ksettings *kset) 2280 { 2281 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2282 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2283 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2284 kset->base.speed = state->speed; 2285 kset->base.duplex = state->duplex; 2286 } 2287 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2288 state->advertising) ? 2289 AUTONEG_ENABLE : AUTONEG_DISABLE; 2290 } 2291 2292 /** 2293 * phylink_ethtool_ksettings_get() - get the current link settings 2294 * @pl: a pointer to a &struct phylink returned from phylink_create() 2295 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2296 * 2297 * Read the current link settings for the phylink instance specified by @pl. 2298 * This will be the link settings read from the MAC, PHY or fixed link 2299 * settings depending on the current negotiation mode. 2300 */ 2301 int phylink_ethtool_ksettings_get(struct phylink *pl, 2302 struct ethtool_link_ksettings *kset) 2303 { 2304 struct phylink_link_state link_state; 2305 2306 ASSERT_RTNL(); 2307 2308 if (pl->phydev) 2309 phy_ethtool_ksettings_get(pl->phydev, kset); 2310 else 2311 kset->base.port = pl->link_port; 2312 2313 linkmode_copy(kset->link_modes.supported, pl->supported); 2314 2315 switch (pl->cur_link_an_mode) { 2316 case MLO_AN_FIXED: 2317 /* We are using fixed settings. Report these as the 2318 * current link settings - and note that these also 2319 * represent the supported speeds/duplex/pause modes. 2320 */ 2321 phylink_get_fixed_state(pl, &link_state); 2322 phylink_get_ksettings(&link_state, kset); 2323 break; 2324 2325 case MLO_AN_INBAND: 2326 /* If there is a phy attached, then use the reported 2327 * settings from the phy with no modification. 2328 */ 2329 if (pl->phydev) 2330 break; 2331 2332 phylink_mac_pcs_get_state(pl, &link_state); 2333 2334 /* The MAC is reporting the link results from its own PCS 2335 * layer via in-band status. Report these as the current 2336 * link settings. 2337 */ 2338 phylink_get_ksettings(&link_state, kset); 2339 break; 2340 } 2341 2342 return 0; 2343 } 2344 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2345 2346 /** 2347 * phylink_ethtool_ksettings_set() - set the link settings 2348 * @pl: a pointer to a &struct phylink returned from phylink_create() 2349 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2350 */ 2351 int phylink_ethtool_ksettings_set(struct phylink *pl, 2352 const struct ethtool_link_ksettings *kset) 2353 { 2354 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2355 struct phylink_link_state config; 2356 const struct phy_setting *s; 2357 2358 ASSERT_RTNL(); 2359 2360 if (pl->phydev) { 2361 struct ethtool_link_ksettings phy_kset = *kset; 2362 2363 linkmode_and(phy_kset.link_modes.advertising, 2364 phy_kset.link_modes.advertising, 2365 pl->supported); 2366 2367 /* We can rely on phylib for this update; we also do not need 2368 * to update the pl->link_config settings: 2369 * - the configuration returned via ksettings_get() will come 2370 * from phylib whenever a PHY is present. 2371 * - link_config.interface will be updated by the PHY calling 2372 * back via phylink_phy_change() and a subsequent resolve. 2373 * - initial link configuration for PHY mode comes from the 2374 * last phy state updated via phylink_phy_change(). 2375 * - other configuration changes (e.g. pause modes) are 2376 * performed directly via phylib. 2377 * - if in in-band mode with a PHY, the link configuration 2378 * is passed on the link from the PHY, and all of 2379 * link_config.{speed,duplex,an_enabled,pause} are not used. 2380 * - the only possible use would be link_config.advertising 2381 * pause modes when in 1000base-X mode with a PHY, but in 2382 * the presence of a PHY, this should not be changed as that 2383 * should be determined from the media side advertisement. 2384 */ 2385 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2386 } 2387 2388 config = pl->link_config; 2389 /* Mask out unsupported advertisements */ 2390 linkmode_and(config.advertising, kset->link_modes.advertising, 2391 pl->supported); 2392 2393 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2394 switch (kset->base.autoneg) { 2395 case AUTONEG_DISABLE: 2396 /* Autonegotiation disabled, select a suitable speed and 2397 * duplex. 2398 */ 2399 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2400 pl->supported, false); 2401 if (!s) 2402 return -EINVAL; 2403 2404 /* If we have a fixed link, refuse to change link parameters. 2405 * If the link parameters match, accept them but do nothing. 2406 */ 2407 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2408 if (s->speed != pl->link_config.speed || 2409 s->duplex != pl->link_config.duplex) 2410 return -EINVAL; 2411 return 0; 2412 } 2413 2414 config.speed = s->speed; 2415 config.duplex = s->duplex; 2416 break; 2417 2418 case AUTONEG_ENABLE: 2419 /* If we have a fixed link, allow autonegotiation (since that 2420 * is our default case) but do not allow the advertisement to 2421 * be changed. If the advertisement matches, simply return. 2422 */ 2423 if (pl->cur_link_an_mode == MLO_AN_FIXED) { 2424 if (!linkmode_equal(config.advertising, 2425 pl->link_config.advertising)) 2426 return -EINVAL; 2427 return 0; 2428 } 2429 2430 config.speed = SPEED_UNKNOWN; 2431 config.duplex = DUPLEX_UNKNOWN; 2432 break; 2433 2434 default: 2435 return -EINVAL; 2436 } 2437 2438 /* We have ruled out the case with a PHY attached, and the 2439 * fixed-link cases. All that is left are in-band links. 2440 */ 2441 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2442 kset->base.autoneg == AUTONEG_ENABLE); 2443 2444 /* If this link is with an SFP, ensure that changes to advertised modes 2445 * also cause the associated interface to be selected such that the 2446 * link can be configured correctly. 2447 */ 2448 if (pl->sfp_bus) { 2449 config.interface = sfp_select_interface(pl->sfp_bus, 2450 config.advertising); 2451 if (config.interface == PHY_INTERFACE_MODE_NA) { 2452 phylink_err(pl, 2453 "selection of interface failed, advertisement %*pb\n", 2454 __ETHTOOL_LINK_MODE_MASK_NBITS, 2455 config.advertising); 2456 return -EINVAL; 2457 } 2458 2459 /* Revalidate with the selected interface */ 2460 linkmode_copy(support, pl->supported); 2461 if (phylink_validate(pl, support, &config)) { 2462 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2463 phylink_an_mode_str(pl->cur_link_an_mode), 2464 phy_modes(config.interface), 2465 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2466 return -EINVAL; 2467 } 2468 } else { 2469 /* Validate without changing the current supported mask. */ 2470 linkmode_copy(support, pl->supported); 2471 if (phylink_validate(pl, support, &config)) 2472 return -EINVAL; 2473 } 2474 2475 /* If autonegotiation is enabled, we must have an advertisement */ 2476 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2477 config.advertising) && 2478 phylink_is_empty_linkmode(config.advertising)) 2479 return -EINVAL; 2480 2481 mutex_lock(&pl->state_mutex); 2482 pl->link_config.speed = config.speed; 2483 pl->link_config.duplex = config.duplex; 2484 2485 if (pl->link_config.interface != config.interface) { 2486 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2487 /* We need to force the link down, then change the interface */ 2488 if (pl->old_link_state) { 2489 phylink_link_down(pl); 2490 pl->old_link_state = false; 2491 } 2492 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2493 &pl->phylink_disable_state)) 2494 phylink_major_config(pl, false, &config); 2495 pl->link_config.interface = config.interface; 2496 linkmode_copy(pl->link_config.advertising, config.advertising); 2497 } else if (!linkmode_equal(pl->link_config.advertising, 2498 config.advertising)) { 2499 linkmode_copy(pl->link_config.advertising, config.advertising); 2500 phylink_change_inband_advert(pl); 2501 } 2502 mutex_unlock(&pl->state_mutex); 2503 2504 return 0; 2505 } 2506 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2507 2508 /** 2509 * phylink_ethtool_nway_reset() - restart negotiation 2510 * @pl: a pointer to a &struct phylink returned from phylink_create() 2511 * 2512 * Restart negotiation for the phylink instance specified by @pl. This will 2513 * cause any attached phy to restart negotiation with the link partner, and 2514 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2515 * negotiation. 2516 * 2517 * Returns zero on success, or negative error code. 2518 */ 2519 int phylink_ethtool_nway_reset(struct phylink *pl) 2520 { 2521 int ret = 0; 2522 2523 ASSERT_RTNL(); 2524 2525 if (pl->phydev) 2526 ret = phy_restart_aneg(pl->phydev); 2527 phylink_pcs_an_restart(pl); 2528 2529 return ret; 2530 } 2531 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2532 2533 /** 2534 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2535 * @pl: a pointer to a &struct phylink returned from phylink_create() 2536 * @pause: a pointer to a &struct ethtool_pauseparam 2537 */ 2538 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2539 struct ethtool_pauseparam *pause) 2540 { 2541 ASSERT_RTNL(); 2542 2543 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2544 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2545 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2546 } 2547 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2548 2549 /** 2550 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2551 * @pl: a pointer to a &struct phylink returned from phylink_create() 2552 * @pause: a pointer to a &struct ethtool_pauseparam 2553 */ 2554 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2555 struct ethtool_pauseparam *pause) 2556 { 2557 struct phylink_link_state *config = &pl->link_config; 2558 bool manual_changed; 2559 int pause_state; 2560 2561 ASSERT_RTNL(); 2562 2563 if (pl->cur_link_an_mode == MLO_AN_FIXED) 2564 return -EOPNOTSUPP; 2565 2566 if (!phylink_test(pl->supported, Pause) && 2567 !phylink_test(pl->supported, Asym_Pause)) 2568 return -EOPNOTSUPP; 2569 2570 if (!phylink_test(pl->supported, Asym_Pause) && 2571 pause->rx_pause != pause->tx_pause) 2572 return -EINVAL; 2573 2574 pause_state = 0; 2575 if (pause->autoneg) 2576 pause_state |= MLO_PAUSE_AN; 2577 if (pause->rx_pause) 2578 pause_state |= MLO_PAUSE_RX; 2579 if (pause->tx_pause) 2580 pause_state |= MLO_PAUSE_TX; 2581 2582 mutex_lock(&pl->state_mutex); 2583 /* 2584 * See the comments for linkmode_set_pause(), wrt the deficiencies 2585 * with the current implementation. A solution to this issue would 2586 * be: 2587 * ethtool Local device 2588 * rx tx Pause AsymDir 2589 * 0 0 0 0 2590 * 1 0 1 1 2591 * 0 1 0 1 2592 * 1 1 1 1 2593 * and then use the ethtool rx/tx enablement status to mask the 2594 * rx/tx pause resolution. 2595 */ 2596 linkmode_set_pause(config->advertising, pause->tx_pause, 2597 pause->rx_pause); 2598 2599 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2600 (!(pause_state & MLO_PAUSE_AN) && 2601 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2602 2603 config->pause = pause_state; 2604 2605 /* Update our in-band advertisement, triggering a renegotiation if 2606 * the advertisement changed. 2607 */ 2608 if (!pl->phydev) 2609 phylink_change_inband_advert(pl); 2610 2611 mutex_unlock(&pl->state_mutex); 2612 2613 /* If we have a PHY, a change of the pause frame advertisement will 2614 * cause phylib to renegotiate (if AN is enabled) which will in turn 2615 * call our phylink_phy_change() and trigger a resolve. Note that 2616 * we can't hold our state mutex while calling phy_set_asym_pause(). 2617 */ 2618 if (pl->phydev) 2619 phy_set_asym_pause(pl->phydev, pause->rx_pause, 2620 pause->tx_pause); 2621 2622 /* If the manual pause settings changed, make sure we trigger a 2623 * resolve to update their state; we can not guarantee that the 2624 * link will cycle. 2625 */ 2626 if (manual_changed) { 2627 pl->mac_link_dropped = true; 2628 phylink_run_resolve(pl); 2629 } 2630 2631 return 0; 2632 } 2633 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 2634 2635 /** 2636 * phylink_get_eee_err() - read the energy efficient ethernet error 2637 * counter 2638 * @pl: a pointer to a &struct phylink returned from phylink_create(). 2639 * 2640 * Read the Energy Efficient Ethernet error counter from the PHY associated 2641 * with the phylink instance specified by @pl. 2642 * 2643 * Returns positive error counter value, or negative error code. 2644 */ 2645 int phylink_get_eee_err(struct phylink *pl) 2646 { 2647 int ret = 0; 2648 2649 ASSERT_RTNL(); 2650 2651 if (pl->phydev) 2652 ret = phy_get_eee_err(pl->phydev); 2653 2654 return ret; 2655 } 2656 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 2657 2658 /** 2659 * phylink_init_eee() - init and check the EEE features 2660 * @pl: a pointer to a &struct phylink returned from phylink_create() 2661 * @clk_stop_enable: allow PHY to stop receive clock 2662 * 2663 * Must be called either with RTNL held or within mac_link_up() 2664 */ 2665 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 2666 { 2667 int ret = -EOPNOTSUPP; 2668 2669 if (pl->phydev) 2670 ret = phy_init_eee(pl->phydev, clk_stop_enable); 2671 2672 return ret; 2673 } 2674 EXPORT_SYMBOL_GPL(phylink_init_eee); 2675 2676 /** 2677 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 2678 * @pl: a pointer to a &struct phylink returned from phylink_create() 2679 * @eee: a pointer to a &struct ethtool_eee for the read parameters 2680 */ 2681 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_eee *eee) 2682 { 2683 int ret = -EOPNOTSUPP; 2684 2685 ASSERT_RTNL(); 2686 2687 if (pl->phydev) 2688 ret = phy_ethtool_get_eee(pl->phydev, eee); 2689 2690 return ret; 2691 } 2692 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 2693 2694 /** 2695 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 2696 * @pl: a pointer to a &struct phylink returned from phylink_create() 2697 * @eee: a pointer to a &struct ethtool_eee for the desired parameters 2698 */ 2699 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_eee *eee) 2700 { 2701 int ret = -EOPNOTSUPP; 2702 2703 ASSERT_RTNL(); 2704 2705 if (pl->phydev) 2706 ret = phy_ethtool_set_eee(pl->phydev, eee); 2707 2708 return ret; 2709 } 2710 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 2711 2712 /* This emulates MII registers for a fixed-mode phy operating as per the 2713 * passed in state. "aneg" defines if we report negotiation is possible. 2714 * 2715 * FIXME: should deal with negotiation state too. 2716 */ 2717 static int phylink_mii_emul_read(unsigned int reg, 2718 struct phylink_link_state *state) 2719 { 2720 struct fixed_phy_status fs; 2721 unsigned long *lpa = state->lp_advertising; 2722 int val; 2723 2724 fs.link = state->link; 2725 fs.speed = state->speed; 2726 fs.duplex = state->duplex; 2727 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 2728 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 2729 2730 val = swphy_read_reg(reg, &fs); 2731 if (reg == MII_BMSR) { 2732 if (!state->an_complete) 2733 val &= ~BMSR_ANEGCOMPLETE; 2734 } 2735 return val; 2736 } 2737 2738 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 2739 unsigned int reg) 2740 { 2741 struct phy_device *phydev = pl->phydev; 2742 int prtad, devad; 2743 2744 if (mdio_phy_id_is_c45(phy_id)) { 2745 prtad = mdio_phy_id_prtad(phy_id); 2746 devad = mdio_phy_id_devad(phy_id); 2747 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2748 reg); 2749 } 2750 2751 if (phydev->is_c45) { 2752 switch (reg) { 2753 case MII_BMCR: 2754 case MII_BMSR: 2755 case MII_PHYSID1: 2756 case MII_PHYSID2: 2757 devad = __ffs(phydev->c45_ids.mmds_present); 2758 break; 2759 case MII_ADVERTISE: 2760 case MII_LPA: 2761 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2762 return -EINVAL; 2763 devad = MDIO_MMD_AN; 2764 if (reg == MII_ADVERTISE) 2765 reg = MDIO_AN_ADVERTISE; 2766 else 2767 reg = MDIO_AN_LPA; 2768 break; 2769 default: 2770 return -EINVAL; 2771 } 2772 prtad = phy_id; 2773 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 2774 reg); 2775 } 2776 2777 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 2778 } 2779 2780 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 2781 unsigned int reg, unsigned int val) 2782 { 2783 struct phy_device *phydev = pl->phydev; 2784 int prtad, devad; 2785 2786 if (mdio_phy_id_is_c45(phy_id)) { 2787 prtad = mdio_phy_id_prtad(phy_id); 2788 devad = mdio_phy_id_devad(phy_id); 2789 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 2790 reg, val); 2791 } 2792 2793 if (phydev->is_c45) { 2794 switch (reg) { 2795 case MII_BMCR: 2796 case MII_BMSR: 2797 case MII_PHYSID1: 2798 case MII_PHYSID2: 2799 devad = __ffs(phydev->c45_ids.mmds_present); 2800 break; 2801 case MII_ADVERTISE: 2802 case MII_LPA: 2803 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 2804 return -EINVAL; 2805 devad = MDIO_MMD_AN; 2806 if (reg == MII_ADVERTISE) 2807 reg = MDIO_AN_ADVERTISE; 2808 else 2809 reg = MDIO_AN_LPA; 2810 break; 2811 default: 2812 return -EINVAL; 2813 } 2814 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 2815 reg, val); 2816 } 2817 2818 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 2819 } 2820 2821 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 2822 unsigned int reg) 2823 { 2824 struct phylink_link_state state; 2825 int val = 0xffff; 2826 2827 switch (pl->cur_link_an_mode) { 2828 case MLO_AN_FIXED: 2829 if (phy_id == 0) { 2830 phylink_get_fixed_state(pl, &state); 2831 val = phylink_mii_emul_read(reg, &state); 2832 } 2833 break; 2834 2835 case MLO_AN_PHY: 2836 return -EOPNOTSUPP; 2837 2838 case MLO_AN_INBAND: 2839 if (phy_id == 0) { 2840 phylink_mac_pcs_get_state(pl, &state); 2841 val = phylink_mii_emul_read(reg, &state); 2842 } 2843 break; 2844 } 2845 2846 return val & 0xffff; 2847 } 2848 2849 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 2850 unsigned int reg, unsigned int val) 2851 { 2852 switch (pl->cur_link_an_mode) { 2853 case MLO_AN_FIXED: 2854 break; 2855 2856 case MLO_AN_PHY: 2857 return -EOPNOTSUPP; 2858 2859 case MLO_AN_INBAND: 2860 break; 2861 } 2862 2863 return 0; 2864 } 2865 2866 /** 2867 * phylink_mii_ioctl() - generic mii ioctl interface 2868 * @pl: a pointer to a &struct phylink returned from phylink_create() 2869 * @ifr: a pointer to a &struct ifreq for socket ioctls 2870 * @cmd: ioctl cmd to execute 2871 * 2872 * Perform the specified MII ioctl on the PHY attached to the phylink instance 2873 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 2874 * 2875 * Returns: zero on success or negative error code. 2876 * 2877 * %SIOCGMIIPHY: 2878 * read register from the current PHY. 2879 * %SIOCGMIIREG: 2880 * read register from the specified PHY. 2881 * %SIOCSMIIREG: 2882 * set a register on the specified PHY. 2883 */ 2884 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 2885 { 2886 struct mii_ioctl_data *mii = if_mii(ifr); 2887 int ret; 2888 2889 ASSERT_RTNL(); 2890 2891 if (pl->phydev) { 2892 /* PHYs only exist for MLO_AN_PHY and SGMII */ 2893 switch (cmd) { 2894 case SIOCGMIIPHY: 2895 mii->phy_id = pl->phydev->mdio.addr; 2896 fallthrough; 2897 2898 case SIOCGMIIREG: 2899 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 2900 if (ret >= 0) { 2901 mii->val_out = ret; 2902 ret = 0; 2903 } 2904 break; 2905 2906 case SIOCSMIIREG: 2907 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 2908 mii->val_in); 2909 break; 2910 2911 default: 2912 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 2913 break; 2914 } 2915 } else { 2916 switch (cmd) { 2917 case SIOCGMIIPHY: 2918 mii->phy_id = 0; 2919 fallthrough; 2920 2921 case SIOCGMIIREG: 2922 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 2923 if (ret >= 0) { 2924 mii->val_out = ret; 2925 ret = 0; 2926 } 2927 break; 2928 2929 case SIOCSMIIREG: 2930 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 2931 mii->val_in); 2932 break; 2933 2934 default: 2935 ret = -EOPNOTSUPP; 2936 break; 2937 } 2938 } 2939 2940 return ret; 2941 } 2942 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 2943 2944 /** 2945 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 2946 * link partners 2947 * @pl: a pointer to a &struct phylink returned from phylink_create() 2948 * @sync: perform action synchronously 2949 * 2950 * If we have a PHY that is not part of a SFP module, then set the speed 2951 * as described in the phy_speed_down() function. Please see this function 2952 * for a description of the @sync parameter. 2953 * 2954 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 2955 */ 2956 int phylink_speed_down(struct phylink *pl, bool sync) 2957 { 2958 int ret = 0; 2959 2960 ASSERT_RTNL(); 2961 2962 if (!pl->sfp_bus && pl->phydev) 2963 ret = phy_speed_down(pl->phydev, sync); 2964 2965 return ret; 2966 } 2967 EXPORT_SYMBOL_GPL(phylink_speed_down); 2968 2969 /** 2970 * phylink_speed_up() - restore the advertised speeds prior to the call to 2971 * phylink_speed_down() 2972 * @pl: a pointer to a &struct phylink returned from phylink_create() 2973 * 2974 * If we have a PHY that is not part of a SFP module, then restore the 2975 * PHY speeds as per phy_speed_up(). 2976 * 2977 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 2978 */ 2979 int phylink_speed_up(struct phylink *pl) 2980 { 2981 int ret = 0; 2982 2983 ASSERT_RTNL(); 2984 2985 if (!pl->sfp_bus && pl->phydev) 2986 ret = phy_speed_up(pl->phydev); 2987 2988 return ret; 2989 } 2990 EXPORT_SYMBOL_GPL(phylink_speed_up); 2991 2992 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 2993 { 2994 struct phylink *pl = upstream; 2995 2996 pl->netdev->sfp_bus = bus; 2997 } 2998 2999 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3000 { 3001 struct phylink *pl = upstream; 3002 3003 pl->netdev->sfp_bus = NULL; 3004 } 3005 3006 static const phy_interface_t phylink_sfp_interface_preference[] = { 3007 PHY_INTERFACE_MODE_25GBASER, 3008 PHY_INTERFACE_MODE_USXGMII, 3009 PHY_INTERFACE_MODE_10GBASER, 3010 PHY_INTERFACE_MODE_5GBASER, 3011 PHY_INTERFACE_MODE_2500BASEX, 3012 PHY_INTERFACE_MODE_SGMII, 3013 PHY_INTERFACE_MODE_1000BASEX, 3014 PHY_INTERFACE_MODE_100BASEX, 3015 }; 3016 3017 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 3018 3019 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3020 const unsigned long *intf) 3021 { 3022 phy_interface_t interface; 3023 size_t i; 3024 3025 interface = PHY_INTERFACE_MODE_NA; 3026 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3027 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3028 interface = phylink_sfp_interface_preference[i]; 3029 break; 3030 } 3031 3032 return interface; 3033 } 3034 3035 static void phylink_sfp_set_config(struct phylink *pl, u8 mode, 3036 unsigned long *supported, 3037 struct phylink_link_state *state) 3038 { 3039 bool changed = false; 3040 3041 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3042 phylink_an_mode_str(mode), phy_modes(state->interface), 3043 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3044 3045 if (!linkmode_equal(pl->supported, supported)) { 3046 linkmode_copy(pl->supported, supported); 3047 changed = true; 3048 } 3049 3050 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3051 linkmode_copy(pl->link_config.advertising, state->advertising); 3052 changed = true; 3053 } 3054 3055 if (pl->cur_link_an_mode != mode || 3056 pl->link_config.interface != state->interface) { 3057 pl->cur_link_an_mode = mode; 3058 pl->link_config.interface = state->interface; 3059 3060 changed = true; 3061 3062 phylink_info(pl, "switched to %s/%s link mode\n", 3063 phylink_an_mode_str(mode), 3064 phy_modes(state->interface)); 3065 } 3066 3067 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3068 &pl->phylink_disable_state)) 3069 phylink_mac_initial_config(pl, false); 3070 } 3071 3072 static int phylink_sfp_config_phy(struct phylink *pl, u8 mode, 3073 struct phy_device *phy) 3074 { 3075 __ETHTOOL_DECLARE_LINK_MODE_MASK(support1); 3076 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3077 struct phylink_link_state config; 3078 phy_interface_t iface; 3079 int ret; 3080 3081 linkmode_copy(support, phy->supported); 3082 3083 memset(&config, 0, sizeof(config)); 3084 linkmode_copy(config.advertising, phy->advertising); 3085 config.interface = PHY_INTERFACE_MODE_NA; 3086 config.speed = SPEED_UNKNOWN; 3087 config.duplex = DUPLEX_UNKNOWN; 3088 config.pause = MLO_PAUSE_AN; 3089 3090 /* Ignore errors if we're expecting a PHY to attach later */ 3091 ret = phylink_validate(pl, support, &config); 3092 if (ret) { 3093 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3094 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3095 ERR_PTR(ret)); 3096 return ret; 3097 } 3098 3099 iface = sfp_select_interface(pl->sfp_bus, config.advertising); 3100 if (iface == PHY_INTERFACE_MODE_NA) { 3101 phylink_err(pl, 3102 "selection of interface failed, advertisement %*pb\n", 3103 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising); 3104 return -EINVAL; 3105 } 3106 3107 config.interface = iface; 3108 linkmode_copy(support1, support); 3109 ret = phylink_validate(pl, support1, &config); 3110 if (ret) { 3111 phylink_err(pl, 3112 "validation of %s/%s with support %*pb failed: %pe\n", 3113 phylink_an_mode_str(mode), 3114 phy_modes(config.interface), 3115 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3116 ERR_PTR(ret)); 3117 return ret; 3118 } 3119 3120 pl->link_port = pl->sfp_port; 3121 3122 phylink_sfp_set_config(pl, mode, support, &config); 3123 3124 return 0; 3125 } 3126 3127 static int phylink_sfp_config_optical(struct phylink *pl) 3128 { 3129 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3130 DECLARE_PHY_INTERFACE_MASK(interfaces); 3131 struct phylink_link_state config; 3132 phy_interface_t interface; 3133 int ret; 3134 3135 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3136 (int)PHY_INTERFACE_MODE_MAX, 3137 pl->config->supported_interfaces, 3138 (int)PHY_INTERFACE_MODE_MAX, 3139 pl->sfp_interfaces); 3140 3141 /* Find the union of the supported interfaces by the PCS/MAC and 3142 * the SFP module. 3143 */ 3144 phy_interface_and(interfaces, pl->config->supported_interfaces, 3145 pl->sfp_interfaces); 3146 if (phy_interface_empty(interfaces)) { 3147 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3148 return -EINVAL; 3149 } 3150 3151 memset(&config, 0, sizeof(config)); 3152 linkmode_copy(support, pl->sfp_support); 3153 linkmode_copy(config.advertising, pl->sfp_support); 3154 config.speed = SPEED_UNKNOWN; 3155 config.duplex = DUPLEX_UNKNOWN; 3156 config.pause = MLO_PAUSE_AN; 3157 3158 /* For all the interfaces that are supported, reduce the sfp_support 3159 * mask to only those link modes that can be supported. 3160 */ 3161 ret = phylink_validate_mask(pl, pl->sfp_support, &config, interfaces); 3162 if (ret) { 3163 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3164 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3165 return ret; 3166 } 3167 3168 interface = phylink_choose_sfp_interface(pl, interfaces); 3169 if (interface == PHY_INTERFACE_MODE_NA) { 3170 phylink_err(pl, "failed to select SFP interface\n"); 3171 return -EINVAL; 3172 } 3173 3174 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3175 phy_modes(interface)); 3176 3177 config.interface = interface; 3178 3179 /* Ignore errors if we're expecting a PHY to attach later */ 3180 ret = phylink_validate(pl, support, &config); 3181 if (ret) { 3182 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3183 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3184 ERR_PTR(ret)); 3185 return ret; 3186 } 3187 3188 pl->link_port = pl->sfp_port; 3189 3190 phylink_sfp_set_config(pl, MLO_AN_INBAND, pl->sfp_support, &config); 3191 3192 return 0; 3193 } 3194 3195 static int phylink_sfp_module_insert(void *upstream, 3196 const struct sfp_eeprom_id *id) 3197 { 3198 struct phylink *pl = upstream; 3199 3200 ASSERT_RTNL(); 3201 3202 linkmode_zero(pl->sfp_support); 3203 phy_interface_zero(pl->sfp_interfaces); 3204 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3205 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3206 3207 /* If this module may have a PHY connecting later, defer until later */ 3208 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3209 if (pl->sfp_may_have_phy) 3210 return 0; 3211 3212 return phylink_sfp_config_optical(pl); 3213 } 3214 3215 static int phylink_sfp_module_start(void *upstream) 3216 { 3217 struct phylink *pl = upstream; 3218 3219 /* If this SFP module has a PHY, start the PHY now. */ 3220 if (pl->phydev) { 3221 phy_start(pl->phydev); 3222 return 0; 3223 } 3224 3225 /* If the module may have a PHY but we didn't detect one we 3226 * need to configure the MAC here. 3227 */ 3228 if (!pl->sfp_may_have_phy) 3229 return 0; 3230 3231 return phylink_sfp_config_optical(pl); 3232 } 3233 3234 static void phylink_sfp_module_stop(void *upstream) 3235 { 3236 struct phylink *pl = upstream; 3237 3238 /* If this SFP module has a PHY, stop it. */ 3239 if (pl->phydev) 3240 phy_stop(pl->phydev); 3241 } 3242 3243 static void phylink_sfp_link_down(void *upstream) 3244 { 3245 struct phylink *pl = upstream; 3246 3247 ASSERT_RTNL(); 3248 3249 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3250 } 3251 3252 static void phylink_sfp_link_up(void *upstream) 3253 { 3254 struct phylink *pl = upstream; 3255 3256 ASSERT_RTNL(); 3257 3258 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3259 } 3260 3261 /* The Broadcom BCM84881 in the Methode DM7052 is unable to provide a SGMII 3262 * or 802.3z control word, so inband will not work. 3263 */ 3264 static bool phylink_phy_no_inband(struct phy_device *phy) 3265 { 3266 return phy->is_c45 && phy_id_compare(phy->c45_ids.device_ids[1], 3267 0xae025150, 0xfffffff0); 3268 } 3269 3270 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3271 { 3272 struct phylink *pl = upstream; 3273 phy_interface_t interface; 3274 u8 mode; 3275 int ret; 3276 3277 /* 3278 * This is the new way of dealing with flow control for PHYs, 3279 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3280 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3281 * using our validate call to the MAC, we rely upon the MAC 3282 * clearing the bits from both supported and advertising fields. 3283 */ 3284 phy_support_asym_pause(phy); 3285 3286 if (phylink_phy_no_inband(phy)) 3287 mode = MLO_AN_PHY; 3288 else 3289 mode = MLO_AN_INBAND; 3290 3291 /* Set the PHY's host supported interfaces */ 3292 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3293 pl->config->supported_interfaces); 3294 3295 /* Do the initial configuration */ 3296 ret = phylink_sfp_config_phy(pl, mode, phy); 3297 if (ret < 0) 3298 return ret; 3299 3300 interface = pl->link_config.interface; 3301 ret = phylink_attach_phy(pl, phy, interface); 3302 if (ret < 0) 3303 return ret; 3304 3305 ret = phylink_bringup_phy(pl, phy, interface); 3306 if (ret) 3307 phy_detach(phy); 3308 3309 return ret; 3310 } 3311 3312 static void phylink_sfp_disconnect_phy(void *upstream) 3313 { 3314 phylink_disconnect_phy(upstream); 3315 } 3316 3317 static const struct sfp_upstream_ops sfp_phylink_ops = { 3318 .attach = phylink_sfp_attach, 3319 .detach = phylink_sfp_detach, 3320 .module_insert = phylink_sfp_module_insert, 3321 .module_start = phylink_sfp_module_start, 3322 .module_stop = phylink_sfp_module_stop, 3323 .link_up = phylink_sfp_link_up, 3324 .link_down = phylink_sfp_link_down, 3325 .connect_phy = phylink_sfp_connect_phy, 3326 .disconnect_phy = phylink_sfp_disconnect_phy, 3327 }; 3328 3329 /* Helpers for MAC drivers */ 3330 3331 static struct { 3332 int bit; 3333 int speed; 3334 } phylink_c73_priority_resolution[] = { 3335 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3336 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3337 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3338 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3339 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3340 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3341 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3342 /* 5GBASE-KR not supported */ 3343 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3344 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3345 }; 3346 3347 void phylink_resolve_c73(struct phylink_link_state *state) 3348 { 3349 int i; 3350 3351 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3352 int bit = phylink_c73_priority_resolution[i].bit; 3353 if (linkmode_test_bit(bit, state->advertising) && 3354 linkmode_test_bit(bit, state->lp_advertising)) 3355 break; 3356 } 3357 3358 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3359 state->speed = phylink_c73_priority_resolution[i].speed; 3360 state->duplex = DUPLEX_FULL; 3361 } else { 3362 /* negotiation failure */ 3363 state->link = false; 3364 } 3365 3366 phylink_resolve_an_pause(state); 3367 } 3368 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3369 3370 static void phylink_decode_c37_word(struct phylink_link_state *state, 3371 uint16_t config_reg, int speed) 3372 { 3373 int fd_bit; 3374 3375 if (speed == SPEED_2500) 3376 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3377 else 3378 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3379 3380 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3381 3382 if (linkmode_test_bit(fd_bit, state->advertising) && 3383 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3384 state->speed = speed; 3385 state->duplex = DUPLEX_FULL; 3386 } else { 3387 /* negotiation failure */ 3388 state->link = false; 3389 } 3390 3391 phylink_resolve_an_pause(state); 3392 } 3393 3394 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3395 uint16_t config_reg) 3396 { 3397 if (!(config_reg & LPA_SGMII_LINK)) { 3398 state->link = false; 3399 return; 3400 } 3401 3402 switch (config_reg & LPA_SGMII_SPD_MASK) { 3403 case LPA_SGMII_10: 3404 state->speed = SPEED_10; 3405 break; 3406 case LPA_SGMII_100: 3407 state->speed = SPEED_100; 3408 break; 3409 case LPA_SGMII_1000: 3410 state->speed = SPEED_1000; 3411 break; 3412 default: 3413 state->link = false; 3414 return; 3415 } 3416 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3417 state->duplex = DUPLEX_FULL; 3418 else 3419 state->duplex = DUPLEX_HALF; 3420 } 3421 3422 /** 3423 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3424 * @state: a pointer to a struct phylink_link_state. 3425 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3426 * 3427 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3428 * code word. Decode the USXGMII code word and populate the corresponding fields 3429 * (speed, duplex) into the phylink_link_state structure. 3430 */ 3431 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3432 uint16_t lpa) 3433 { 3434 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3435 case MDIO_USXGMII_10: 3436 state->speed = SPEED_10; 3437 break; 3438 case MDIO_USXGMII_100: 3439 state->speed = SPEED_100; 3440 break; 3441 case MDIO_USXGMII_1000: 3442 state->speed = SPEED_1000; 3443 break; 3444 case MDIO_USXGMII_2500: 3445 state->speed = SPEED_2500; 3446 break; 3447 case MDIO_USXGMII_5000: 3448 state->speed = SPEED_5000; 3449 break; 3450 case MDIO_USXGMII_10G: 3451 state->speed = SPEED_10000; 3452 break; 3453 default: 3454 state->link = false; 3455 return; 3456 } 3457 3458 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3459 state->duplex = DUPLEX_FULL; 3460 else 3461 state->duplex = DUPLEX_HALF; 3462 } 3463 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3464 3465 /** 3466 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3467 * @state: a pointer to a struct phylink_link_state. 3468 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3469 * 3470 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3471 * code word. Decode the USGMII code word and populate the corresponding fields 3472 * (speed, duplex) into the phylink_link_state structure. The structure for this 3473 * word is the same as the USXGMII word, except it only supports speeds up to 3474 * 1Gbps. 3475 */ 3476 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3477 uint16_t lpa) 3478 { 3479 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3480 case MDIO_USXGMII_10: 3481 state->speed = SPEED_10; 3482 break; 3483 case MDIO_USXGMII_100: 3484 state->speed = SPEED_100; 3485 break; 3486 case MDIO_USXGMII_1000: 3487 state->speed = SPEED_1000; 3488 break; 3489 default: 3490 state->link = false; 3491 return; 3492 } 3493 3494 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3495 state->duplex = DUPLEX_FULL; 3496 else 3497 state->duplex = DUPLEX_HALF; 3498 } 3499 3500 /** 3501 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3502 * @state: a pointer to a &struct phylink_link_state. 3503 * @bmsr: The value of the %MII_BMSR register 3504 * @lpa: The value of the %MII_LPA register 3505 * 3506 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3507 * clause 37 negotiation and/or SGMII control. 3508 * 3509 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3510 * the phylink @state structure. This is suitable to be used for implementing 3511 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3512 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3513 */ 3514 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3515 u16 bmsr, u16 lpa) 3516 { 3517 state->link = !!(bmsr & BMSR_LSTATUS); 3518 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3519 /* If there is no link or autonegotiation is disabled, the LP advertisement 3520 * data is not meaningful, so don't go any further. 3521 */ 3522 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3523 state->advertising)) 3524 return; 3525 3526 switch (state->interface) { 3527 case PHY_INTERFACE_MODE_1000BASEX: 3528 phylink_decode_c37_word(state, lpa, SPEED_1000); 3529 break; 3530 3531 case PHY_INTERFACE_MODE_2500BASEX: 3532 phylink_decode_c37_word(state, lpa, SPEED_2500); 3533 break; 3534 3535 case PHY_INTERFACE_MODE_SGMII: 3536 case PHY_INTERFACE_MODE_QSGMII: 3537 phylink_decode_sgmii_word(state, lpa); 3538 break; 3539 case PHY_INTERFACE_MODE_QUSGMII: 3540 phylink_decode_usgmii_word(state, lpa); 3541 break; 3542 3543 default: 3544 state->link = false; 3545 break; 3546 } 3547 } 3548 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3549 3550 /** 3551 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3552 * @pcs: a pointer to a &struct mdio_device. 3553 * @state: a pointer to a &struct phylink_link_state. 3554 * 3555 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3556 * clause 37 negotiation and/or SGMII control. 3557 * 3558 * Read the MAC PCS state from the MII device configured in @config and 3559 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3560 * the phylink @state structure. This is suitable to be directly plugged 3561 * into the pcs_get_state() member of the struct phylink_pcs_ops 3562 * structure. 3563 */ 3564 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3565 struct phylink_link_state *state) 3566 { 3567 int bmsr, lpa; 3568 3569 bmsr = mdiodev_read(pcs, MII_BMSR); 3570 lpa = mdiodev_read(pcs, MII_LPA); 3571 if (bmsr < 0 || lpa < 0) { 3572 state->link = false; 3573 return; 3574 } 3575 3576 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3577 } 3578 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3579 3580 /** 3581 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3582 * advertisement 3583 * @interface: the PHY interface mode being configured 3584 * @advertising: the ethtool advertisement mask 3585 * 3586 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3587 * clause 37 negotiation and/or SGMII control. 3588 * 3589 * Encode the clause 37 PCS advertisement as specified by @interface and 3590 * @advertising. 3591 * 3592 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3593 */ 3594 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3595 const unsigned long *advertising) 3596 { 3597 u16 adv; 3598 3599 switch (interface) { 3600 case PHY_INTERFACE_MODE_1000BASEX: 3601 case PHY_INTERFACE_MODE_2500BASEX: 3602 adv = ADVERTISE_1000XFULL; 3603 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3604 advertising)) 3605 adv |= ADVERTISE_1000XPAUSE; 3606 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3607 advertising)) 3608 adv |= ADVERTISE_1000XPSE_ASYM; 3609 return adv; 3610 case PHY_INTERFACE_MODE_SGMII: 3611 case PHY_INTERFACE_MODE_QSGMII: 3612 return 0x0001; 3613 default: 3614 /* Nothing to do for other modes */ 3615 return -EINVAL; 3616 } 3617 } 3618 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3619 3620 /** 3621 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3622 * @pcs: a pointer to a &struct mdio_device. 3623 * @interface: the PHY interface mode being configured 3624 * @advertising: the ethtool advertisement mask 3625 * @neg_mode: PCS negotiation mode 3626 * 3627 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3628 * parameters for the @mode, @interface and @advertising parameters. 3629 * Returns negative error number on failure, zero if the advertisement 3630 * has not changed, or positive if there is a change. 3631 */ 3632 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3633 phy_interface_t interface, 3634 const unsigned long *advertising, 3635 unsigned int neg_mode) 3636 { 3637 bool changed = 0; 3638 u16 bmcr; 3639 int ret, adv; 3640 3641 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3642 if (adv >= 0) { 3643 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3644 MII_ADVERTISE, 0xffff, adv); 3645 if (ret < 0) 3646 return ret; 3647 changed = ret; 3648 } 3649 3650 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 3651 bmcr = BMCR_ANENABLE; 3652 else 3653 bmcr = 0; 3654 3655 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 3656 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 3657 if (ret < 0) 3658 return ret; 3659 3660 return changed; 3661 } 3662 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 3663 3664 /** 3665 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 3666 * @pcs: a pointer to a &struct mdio_device. 3667 * 3668 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3669 * clause 37 negotiation. 3670 * 3671 * Restart the clause 37 negotiation with the link partner. This is 3672 * suitable to be directly plugged into the pcs_get_state() member 3673 * of the struct phylink_pcs_ops structure. 3674 */ 3675 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 3676 { 3677 int val = mdiodev_read(pcs, MII_BMCR); 3678 3679 if (val >= 0) { 3680 val |= BMCR_ANRESTART; 3681 3682 mdiodev_write(pcs, MII_BMCR, val); 3683 } 3684 } 3685 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 3686 3687 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 3688 struct phylink_link_state *state) 3689 { 3690 struct mii_bus *bus = pcs->bus; 3691 int addr = pcs->addr; 3692 int stat; 3693 3694 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 3695 if (stat < 0) { 3696 state->link = false; 3697 return; 3698 } 3699 3700 state->link = !!(stat & MDIO_STAT1_LSTATUS); 3701 if (!state->link) 3702 return; 3703 3704 switch (state->interface) { 3705 case PHY_INTERFACE_MODE_10GBASER: 3706 state->speed = SPEED_10000; 3707 state->duplex = DUPLEX_FULL; 3708 break; 3709 3710 default: 3711 break; 3712 } 3713 } 3714 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 3715 3716 static int __init phylink_init(void) 3717 { 3718 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 3719 __set_bit(phylink_sfp_interface_preference[i], 3720 phylink_sfp_interfaces); 3721 3722 return 0; 3723 } 3724 3725 module_init(phylink_init); 3726 3727 MODULE_LICENSE("GPL v2"); 3728 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 3729