1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * phylink models the MAC to optional PHY connection, supporting 4 * technologies such as SFP cages where the PHY is hot-pluggable. 5 * 6 * Copyright (C) 2015 Russell King 7 */ 8 #include <linux/acpi.h> 9 #include <linux/ethtool.h> 10 #include <linux/export.h> 11 #include <linux/gpio/consumer.h> 12 #include <linux/netdevice.h> 13 #include <linux/of.h> 14 #include <linux/of_mdio.h> 15 #include <linux/phy.h> 16 #include <linux/phy_fixed.h> 17 #include <linux/phylink.h> 18 #include <linux/rtnetlink.h> 19 #include <linux/spinlock.h> 20 #include <linux/timer.h> 21 #include <linux/workqueue.h> 22 23 #include "sfp.h" 24 #include "swphy.h" 25 26 #define SUPPORTED_INTERFACES \ 27 (SUPPORTED_TP | SUPPORTED_MII | SUPPORTED_FIBRE | \ 28 SUPPORTED_BNC | SUPPORTED_AUI | SUPPORTED_Backplane) 29 #define ADVERTISED_INTERFACES \ 30 (ADVERTISED_TP | ADVERTISED_MII | ADVERTISED_FIBRE | \ 31 ADVERTISED_BNC | ADVERTISED_AUI | ADVERTISED_Backplane) 32 33 enum { 34 PHYLINK_DISABLE_STOPPED, 35 PHYLINK_DISABLE_LINK, 36 PHYLINK_DISABLE_MAC_WOL, 37 38 PCS_STATE_DOWN = 0, 39 PCS_STATE_STARTING, 40 PCS_STATE_STARTED, 41 }; 42 43 /** 44 * struct phylink - internal data type for phylink 45 */ 46 struct phylink { 47 /* private: */ 48 struct net_device *netdev; 49 const struct phylink_mac_ops *mac_ops; 50 struct phylink_config *config; 51 struct phylink_pcs *pcs; 52 struct device *dev; 53 unsigned int old_link_state:1; 54 55 unsigned long phylink_disable_state; /* bitmask of disables */ 56 struct phy_device *phydev; 57 phy_interface_t link_interface; /* PHY_INTERFACE_xxx */ 58 u8 cfg_link_an_mode; /* MLO_AN_xxx */ 59 u8 req_link_an_mode; /* Requested MLO_AN_xxx mode */ 60 u8 act_link_an_mode; /* Active MLO_AN_xxx mode */ 61 u8 link_port; /* The current non-phy ethtool port */ 62 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 63 64 /* The link configuration settings */ 65 struct phylink_link_state link_config; 66 67 /* The current settings */ 68 phy_interface_t cur_interface; 69 70 struct gpio_desc *link_gpio; 71 unsigned int link_irq; 72 struct timer_list link_poll; 73 void (*get_fixed_state)(struct net_device *dev, 74 struct phylink_link_state *s); 75 76 struct mutex state_mutex; 77 struct phylink_link_state phy_state; 78 unsigned int phy_ib_mode; 79 struct work_struct resolve; 80 unsigned int pcs_neg_mode; 81 unsigned int pcs_state; 82 83 bool link_failed; 84 85 struct sfp_bus *sfp_bus; 86 bool sfp_may_have_phy; 87 DECLARE_PHY_INTERFACE_MASK(sfp_interfaces); 88 __ETHTOOL_DECLARE_LINK_MODE_MASK(sfp_support); 89 u8 sfp_port; 90 }; 91 92 #define phylink_printk(level, pl, fmt, ...) \ 93 do { \ 94 if ((pl)->config->type == PHYLINK_NETDEV) \ 95 netdev_printk(level, (pl)->netdev, fmt, ##__VA_ARGS__); \ 96 else if ((pl)->config->type == PHYLINK_DEV) \ 97 dev_printk(level, (pl)->dev, fmt, ##__VA_ARGS__); \ 98 } while (0) 99 100 #define phylink_err(pl, fmt, ...) \ 101 phylink_printk(KERN_ERR, pl, fmt, ##__VA_ARGS__) 102 #define phylink_warn(pl, fmt, ...) \ 103 phylink_printk(KERN_WARNING, pl, fmt, ##__VA_ARGS__) 104 #define phylink_info(pl, fmt, ...) \ 105 phylink_printk(KERN_INFO, pl, fmt, ##__VA_ARGS__) 106 #if defined(CONFIG_DYNAMIC_DEBUG) 107 #define phylink_dbg(pl, fmt, ...) \ 108 do { \ 109 if ((pl)->config->type == PHYLINK_NETDEV) \ 110 netdev_dbg((pl)->netdev, fmt, ##__VA_ARGS__); \ 111 else if ((pl)->config->type == PHYLINK_DEV) \ 112 dev_dbg((pl)->dev, fmt, ##__VA_ARGS__); \ 113 } while (0) 114 #elif defined(DEBUG) 115 #define phylink_dbg(pl, fmt, ...) \ 116 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__) 117 #else 118 #define phylink_dbg(pl, fmt, ...) \ 119 ({ \ 120 if (0) \ 121 phylink_printk(KERN_DEBUG, pl, fmt, ##__VA_ARGS__); \ 122 }) 123 #endif 124 125 static const phy_interface_t phylink_sfp_interface_preference[] = { 126 PHY_INTERFACE_MODE_25GBASER, 127 PHY_INTERFACE_MODE_USXGMII, 128 PHY_INTERFACE_MODE_10GBASER, 129 PHY_INTERFACE_MODE_5GBASER, 130 PHY_INTERFACE_MODE_2500BASEX, 131 PHY_INTERFACE_MODE_SGMII, 132 PHY_INTERFACE_MODE_1000BASEX, 133 PHY_INTERFACE_MODE_100BASEX, 134 }; 135 136 static DECLARE_PHY_INTERFACE_MASK(phylink_sfp_interfaces); 137 138 /** 139 * phylink_set_port_modes() - set the port type modes in the ethtool mask 140 * @mask: ethtool link mode mask 141 * 142 * Sets all the port type modes in the ethtool mask. MAC drivers should 143 * use this in their 'validate' callback. 144 */ 145 void phylink_set_port_modes(unsigned long *mask) 146 { 147 phylink_set(mask, TP); 148 phylink_set(mask, AUI); 149 phylink_set(mask, MII); 150 phylink_set(mask, FIBRE); 151 phylink_set(mask, BNC); 152 phylink_set(mask, Backplane); 153 } 154 EXPORT_SYMBOL_GPL(phylink_set_port_modes); 155 156 static int phylink_is_empty_linkmode(const unsigned long *linkmode) 157 { 158 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp) = { 0, }; 159 160 phylink_set_port_modes(tmp); 161 phylink_set(tmp, Autoneg); 162 phylink_set(tmp, Pause); 163 phylink_set(tmp, Asym_Pause); 164 165 return linkmode_subset(linkmode, tmp); 166 } 167 168 static const char *phylink_an_mode_str(unsigned int mode) 169 { 170 static const char *modestr[] = { 171 [MLO_AN_PHY] = "phy", 172 [MLO_AN_FIXED] = "fixed", 173 [MLO_AN_INBAND] = "inband", 174 }; 175 176 return mode < ARRAY_SIZE(modestr) ? modestr[mode] : "unknown"; 177 } 178 179 static const char *phylink_pcs_mode_str(unsigned int mode) 180 { 181 if (!mode) 182 return "none"; 183 184 if (mode & PHYLINK_PCS_NEG_OUTBAND) 185 return "outband"; 186 187 if (mode & PHYLINK_PCS_NEG_INBAND) { 188 if (mode & PHYLINK_PCS_NEG_ENABLED) 189 return "inband,an-enabled"; 190 else 191 return "inband,an-disabled"; 192 } 193 194 return "unknown"; 195 } 196 197 static unsigned int phylink_interface_signal_rate(phy_interface_t interface) 198 { 199 switch (interface) { 200 case PHY_INTERFACE_MODE_SGMII: 201 case PHY_INTERFACE_MODE_1000BASEX: /* 1.25Mbd */ 202 return 1250; 203 case PHY_INTERFACE_MODE_2500BASEX: /* 3.125Mbd */ 204 return 3125; 205 case PHY_INTERFACE_MODE_5GBASER: /* 5.15625Mbd */ 206 return 5156; 207 case PHY_INTERFACE_MODE_10GBASER: /* 10.3125Mbd */ 208 return 10313; 209 default: 210 return 0; 211 } 212 } 213 214 /** 215 * phylink_interface_max_speed() - get the maximum speed of a phy interface 216 * @interface: phy interface mode defined by &typedef phy_interface_t 217 * 218 * Determine the maximum speed of a phy interface. This is intended to help 219 * determine the correct speed to pass to the MAC when the phy is performing 220 * rate matching. 221 * 222 * Return: The maximum speed of @interface 223 */ 224 static int phylink_interface_max_speed(phy_interface_t interface) 225 { 226 switch (interface) { 227 case PHY_INTERFACE_MODE_100BASEX: 228 case PHY_INTERFACE_MODE_REVRMII: 229 case PHY_INTERFACE_MODE_RMII: 230 case PHY_INTERFACE_MODE_SMII: 231 case PHY_INTERFACE_MODE_REVMII: 232 case PHY_INTERFACE_MODE_MII: 233 return SPEED_100; 234 235 case PHY_INTERFACE_MODE_TBI: 236 case PHY_INTERFACE_MODE_MOCA: 237 case PHY_INTERFACE_MODE_RTBI: 238 case PHY_INTERFACE_MODE_1000BASEX: 239 case PHY_INTERFACE_MODE_1000BASEKX: 240 case PHY_INTERFACE_MODE_TRGMII: 241 case PHY_INTERFACE_MODE_RGMII_TXID: 242 case PHY_INTERFACE_MODE_RGMII_RXID: 243 case PHY_INTERFACE_MODE_RGMII_ID: 244 case PHY_INTERFACE_MODE_RGMII: 245 case PHY_INTERFACE_MODE_PSGMII: 246 case PHY_INTERFACE_MODE_QSGMII: 247 case PHY_INTERFACE_MODE_QUSGMII: 248 case PHY_INTERFACE_MODE_SGMII: 249 case PHY_INTERFACE_MODE_GMII: 250 return SPEED_1000; 251 252 case PHY_INTERFACE_MODE_2500BASEX: 253 case PHY_INTERFACE_MODE_10G_QXGMII: 254 return SPEED_2500; 255 256 case PHY_INTERFACE_MODE_5GBASER: 257 return SPEED_5000; 258 259 case PHY_INTERFACE_MODE_XGMII: 260 case PHY_INTERFACE_MODE_RXAUI: 261 case PHY_INTERFACE_MODE_XAUI: 262 case PHY_INTERFACE_MODE_10GBASER: 263 case PHY_INTERFACE_MODE_10GKR: 264 case PHY_INTERFACE_MODE_USXGMII: 265 return SPEED_10000; 266 267 case PHY_INTERFACE_MODE_25GBASER: 268 return SPEED_25000; 269 270 case PHY_INTERFACE_MODE_XLGMII: 271 return SPEED_40000; 272 273 case PHY_INTERFACE_MODE_INTERNAL: 274 case PHY_INTERFACE_MODE_NA: 275 case PHY_INTERFACE_MODE_MAX: 276 /* No idea! Garbage in, unknown out */ 277 return SPEED_UNKNOWN; 278 } 279 280 /* If we get here, someone forgot to add an interface mode above */ 281 WARN_ON_ONCE(1); 282 return SPEED_UNKNOWN; 283 } 284 285 /** 286 * phylink_caps_to_linkmodes() - Convert capabilities to ethtool link modes 287 * @linkmodes: ethtool linkmode mask (must be already initialised) 288 * @caps: bitmask of MAC capabilities 289 * 290 * Set all possible pause, speed and duplex linkmodes in @linkmodes that are 291 * supported by the @caps. @linkmodes must have been initialised previously. 292 */ 293 static void phylink_caps_to_linkmodes(unsigned long *linkmodes, 294 unsigned long caps) 295 { 296 if (caps & MAC_SYM_PAUSE) 297 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, linkmodes); 298 299 if (caps & MAC_ASYM_PAUSE) 300 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, linkmodes); 301 302 if (caps & MAC_10HD) { 303 __set_bit(ETHTOOL_LINK_MODE_10baseT_Half_BIT, linkmodes); 304 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Half_BIT, linkmodes); 305 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_P2MP_Half_BIT, linkmodes); 306 } 307 308 if (caps & MAC_10FD) { 309 __set_bit(ETHTOOL_LINK_MODE_10baseT_Full_BIT, linkmodes); 310 __set_bit(ETHTOOL_LINK_MODE_10baseT1L_Full_BIT, linkmodes); 311 __set_bit(ETHTOOL_LINK_MODE_10baseT1S_Full_BIT, linkmodes); 312 } 313 314 if (caps & MAC_100HD) { 315 __set_bit(ETHTOOL_LINK_MODE_100baseT_Half_BIT, linkmodes); 316 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Half_BIT, linkmodes); 317 } 318 319 if (caps & MAC_100FD) { 320 __set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, linkmodes); 321 __set_bit(ETHTOOL_LINK_MODE_100baseT1_Full_BIT, linkmodes); 322 __set_bit(ETHTOOL_LINK_MODE_100baseFX_Full_BIT, linkmodes); 323 } 324 325 if (caps & MAC_1000HD) 326 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, linkmodes); 327 328 if (caps & MAC_1000FD) { 329 __set_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, linkmodes); 330 __set_bit(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, linkmodes); 331 __set_bit(ETHTOOL_LINK_MODE_1000baseX_Full_BIT, linkmodes); 332 __set_bit(ETHTOOL_LINK_MODE_1000baseT1_Full_BIT, linkmodes); 333 } 334 335 if (caps & MAC_2500FD) { 336 __set_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, linkmodes); 337 __set_bit(ETHTOOL_LINK_MODE_2500baseX_Full_BIT, linkmodes); 338 } 339 340 if (caps & MAC_5000FD) 341 __set_bit(ETHTOOL_LINK_MODE_5000baseT_Full_BIT, linkmodes); 342 343 if (caps & MAC_10000FD) { 344 __set_bit(ETHTOOL_LINK_MODE_10000baseT_Full_BIT, linkmodes); 345 __set_bit(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, linkmodes); 346 __set_bit(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, linkmodes); 347 __set_bit(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT, linkmodes); 348 __set_bit(ETHTOOL_LINK_MODE_10000baseCR_Full_BIT, linkmodes); 349 __set_bit(ETHTOOL_LINK_MODE_10000baseSR_Full_BIT, linkmodes); 350 __set_bit(ETHTOOL_LINK_MODE_10000baseLR_Full_BIT, linkmodes); 351 __set_bit(ETHTOOL_LINK_MODE_10000baseLRM_Full_BIT, linkmodes); 352 __set_bit(ETHTOOL_LINK_MODE_10000baseER_Full_BIT, linkmodes); 353 } 354 355 if (caps & MAC_25000FD) { 356 __set_bit(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, linkmodes); 357 __set_bit(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, linkmodes); 358 __set_bit(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, linkmodes); 359 } 360 361 if (caps & MAC_40000FD) { 362 __set_bit(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, linkmodes); 363 __set_bit(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, linkmodes); 364 __set_bit(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, linkmodes); 365 __set_bit(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, linkmodes); 366 } 367 368 if (caps & MAC_50000FD) { 369 __set_bit(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, linkmodes); 370 __set_bit(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, linkmodes); 371 __set_bit(ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, linkmodes); 372 __set_bit(ETHTOOL_LINK_MODE_50000baseKR_Full_BIT, linkmodes); 373 __set_bit(ETHTOOL_LINK_MODE_50000baseSR_Full_BIT, linkmodes); 374 __set_bit(ETHTOOL_LINK_MODE_50000baseCR_Full_BIT, linkmodes); 375 __set_bit(ETHTOOL_LINK_MODE_50000baseLR_ER_FR_Full_BIT, 376 linkmodes); 377 __set_bit(ETHTOOL_LINK_MODE_50000baseDR_Full_BIT, linkmodes); 378 } 379 380 if (caps & MAC_56000FD) { 381 __set_bit(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, linkmodes); 382 __set_bit(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, linkmodes); 383 __set_bit(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, linkmodes); 384 __set_bit(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, linkmodes); 385 } 386 387 if (caps & MAC_100000FD) { 388 __set_bit(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, linkmodes); 389 __set_bit(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, linkmodes); 390 __set_bit(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, linkmodes); 391 __set_bit(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 392 linkmodes); 393 __set_bit(ETHTOOL_LINK_MODE_100000baseKR2_Full_BIT, linkmodes); 394 __set_bit(ETHTOOL_LINK_MODE_100000baseSR2_Full_BIT, linkmodes); 395 __set_bit(ETHTOOL_LINK_MODE_100000baseCR2_Full_BIT, linkmodes); 396 __set_bit(ETHTOOL_LINK_MODE_100000baseLR2_ER2_FR2_Full_BIT, 397 linkmodes); 398 __set_bit(ETHTOOL_LINK_MODE_100000baseDR2_Full_BIT, linkmodes); 399 __set_bit(ETHTOOL_LINK_MODE_100000baseKR_Full_BIT, linkmodes); 400 __set_bit(ETHTOOL_LINK_MODE_100000baseSR_Full_BIT, linkmodes); 401 __set_bit(ETHTOOL_LINK_MODE_100000baseLR_ER_FR_Full_BIT, 402 linkmodes); 403 __set_bit(ETHTOOL_LINK_MODE_100000baseCR_Full_BIT, linkmodes); 404 __set_bit(ETHTOOL_LINK_MODE_100000baseDR_Full_BIT, linkmodes); 405 } 406 407 if (caps & MAC_200000FD) { 408 __set_bit(ETHTOOL_LINK_MODE_200000baseKR4_Full_BIT, linkmodes); 409 __set_bit(ETHTOOL_LINK_MODE_200000baseSR4_Full_BIT, linkmodes); 410 __set_bit(ETHTOOL_LINK_MODE_200000baseLR4_ER4_FR4_Full_BIT, 411 linkmodes); 412 __set_bit(ETHTOOL_LINK_MODE_200000baseDR4_Full_BIT, linkmodes); 413 __set_bit(ETHTOOL_LINK_MODE_200000baseCR4_Full_BIT, linkmodes); 414 __set_bit(ETHTOOL_LINK_MODE_200000baseKR2_Full_BIT, linkmodes); 415 __set_bit(ETHTOOL_LINK_MODE_200000baseSR2_Full_BIT, linkmodes); 416 __set_bit(ETHTOOL_LINK_MODE_200000baseLR2_ER2_FR2_Full_BIT, 417 linkmodes); 418 __set_bit(ETHTOOL_LINK_MODE_200000baseDR2_Full_BIT, linkmodes); 419 __set_bit(ETHTOOL_LINK_MODE_200000baseCR2_Full_BIT, linkmodes); 420 } 421 422 if (caps & MAC_400000FD) { 423 __set_bit(ETHTOOL_LINK_MODE_400000baseKR8_Full_BIT, linkmodes); 424 __set_bit(ETHTOOL_LINK_MODE_400000baseSR8_Full_BIT, linkmodes); 425 __set_bit(ETHTOOL_LINK_MODE_400000baseLR8_ER8_FR8_Full_BIT, 426 linkmodes); 427 __set_bit(ETHTOOL_LINK_MODE_400000baseDR8_Full_BIT, linkmodes); 428 __set_bit(ETHTOOL_LINK_MODE_400000baseCR8_Full_BIT, linkmodes); 429 __set_bit(ETHTOOL_LINK_MODE_400000baseKR4_Full_BIT, linkmodes); 430 __set_bit(ETHTOOL_LINK_MODE_400000baseSR4_Full_BIT, linkmodes); 431 __set_bit(ETHTOOL_LINK_MODE_400000baseLR4_ER4_FR4_Full_BIT, 432 linkmodes); 433 __set_bit(ETHTOOL_LINK_MODE_400000baseDR4_Full_BIT, linkmodes); 434 __set_bit(ETHTOOL_LINK_MODE_400000baseCR4_Full_BIT, linkmodes); 435 } 436 } 437 438 static struct { 439 unsigned long mask; 440 int speed; 441 unsigned int duplex; 442 } phylink_caps_params[] = { 443 { MAC_400000FD, SPEED_400000, DUPLEX_FULL }, 444 { MAC_200000FD, SPEED_200000, DUPLEX_FULL }, 445 { MAC_100000FD, SPEED_100000, DUPLEX_FULL }, 446 { MAC_56000FD, SPEED_56000, DUPLEX_FULL }, 447 { MAC_50000FD, SPEED_50000, DUPLEX_FULL }, 448 { MAC_40000FD, SPEED_40000, DUPLEX_FULL }, 449 { MAC_25000FD, SPEED_25000, DUPLEX_FULL }, 450 { MAC_20000FD, SPEED_20000, DUPLEX_FULL }, 451 { MAC_10000FD, SPEED_10000, DUPLEX_FULL }, 452 { MAC_5000FD, SPEED_5000, DUPLEX_FULL }, 453 { MAC_2500FD, SPEED_2500, DUPLEX_FULL }, 454 { MAC_1000FD, SPEED_1000, DUPLEX_FULL }, 455 { MAC_1000HD, SPEED_1000, DUPLEX_HALF }, 456 { MAC_100FD, SPEED_100, DUPLEX_FULL }, 457 { MAC_100HD, SPEED_100, DUPLEX_HALF }, 458 { MAC_10FD, SPEED_10, DUPLEX_FULL }, 459 { MAC_10HD, SPEED_10, DUPLEX_HALF }, 460 }; 461 462 /** 463 * phylink_limit_mac_speed - limit the phylink_config to a maximum speed 464 * @config: pointer to a &struct phylink_config 465 * @max_speed: maximum speed 466 * 467 * Mask off MAC capabilities for speeds higher than the @max_speed parameter. 468 * Any further motifications of config.mac_capabilities will override this. 469 */ 470 void phylink_limit_mac_speed(struct phylink_config *config, u32 max_speed) 471 { 472 int i; 473 474 for (i = 0; i < ARRAY_SIZE(phylink_caps_params) && 475 phylink_caps_params[i].speed > max_speed; i++) 476 config->mac_capabilities &= ~phylink_caps_params[i].mask; 477 } 478 EXPORT_SYMBOL_GPL(phylink_limit_mac_speed); 479 480 /** 481 * phylink_cap_from_speed_duplex - Get mac capability from speed/duplex 482 * @speed: the speed to search for 483 * @duplex: the duplex to search for 484 * 485 * Find the mac capability for a given speed and duplex. 486 * 487 * Return: A mask with the mac capability patching @speed and @duplex, or 0 if 488 * there were no matches. 489 */ 490 static unsigned long phylink_cap_from_speed_duplex(int speed, 491 unsigned int duplex) 492 { 493 int i; 494 495 for (i = 0; i < ARRAY_SIZE(phylink_caps_params); i++) { 496 if (speed == phylink_caps_params[i].speed && 497 duplex == phylink_caps_params[i].duplex) 498 return phylink_caps_params[i].mask; 499 } 500 501 return 0; 502 } 503 504 /** 505 * phylink_get_capabilities() - get capabilities for a given MAC 506 * @interface: phy interface mode defined by &typedef phy_interface_t 507 * @mac_capabilities: bitmask of MAC capabilities 508 * @rate_matching: type of rate matching being performed 509 * 510 * Get the MAC capabilities that are supported by the @interface mode and 511 * @mac_capabilities. 512 */ 513 static unsigned long phylink_get_capabilities(phy_interface_t interface, 514 unsigned long mac_capabilities, 515 int rate_matching) 516 { 517 int max_speed = phylink_interface_max_speed(interface); 518 unsigned long caps = MAC_SYM_PAUSE | MAC_ASYM_PAUSE; 519 unsigned long matched_caps = 0; 520 521 switch (interface) { 522 case PHY_INTERFACE_MODE_USXGMII: 523 caps |= MAC_10000FD | MAC_5000FD; 524 fallthrough; 525 526 case PHY_INTERFACE_MODE_10G_QXGMII: 527 caps |= MAC_2500FD; 528 fallthrough; 529 530 case PHY_INTERFACE_MODE_RGMII_TXID: 531 case PHY_INTERFACE_MODE_RGMII_RXID: 532 case PHY_INTERFACE_MODE_RGMII_ID: 533 case PHY_INTERFACE_MODE_RGMII: 534 case PHY_INTERFACE_MODE_PSGMII: 535 case PHY_INTERFACE_MODE_QSGMII: 536 case PHY_INTERFACE_MODE_QUSGMII: 537 case PHY_INTERFACE_MODE_SGMII: 538 case PHY_INTERFACE_MODE_GMII: 539 caps |= MAC_1000HD | MAC_1000FD; 540 fallthrough; 541 542 case PHY_INTERFACE_MODE_REVRMII: 543 case PHY_INTERFACE_MODE_RMII: 544 case PHY_INTERFACE_MODE_SMII: 545 case PHY_INTERFACE_MODE_REVMII: 546 case PHY_INTERFACE_MODE_MII: 547 caps |= MAC_10HD | MAC_10FD; 548 fallthrough; 549 550 case PHY_INTERFACE_MODE_100BASEX: 551 caps |= MAC_100HD | MAC_100FD; 552 break; 553 554 case PHY_INTERFACE_MODE_TBI: 555 case PHY_INTERFACE_MODE_MOCA: 556 case PHY_INTERFACE_MODE_RTBI: 557 case PHY_INTERFACE_MODE_1000BASEX: 558 caps |= MAC_1000HD; 559 fallthrough; 560 case PHY_INTERFACE_MODE_1000BASEKX: 561 case PHY_INTERFACE_MODE_TRGMII: 562 caps |= MAC_1000FD; 563 break; 564 565 case PHY_INTERFACE_MODE_2500BASEX: 566 caps |= MAC_2500FD; 567 break; 568 569 case PHY_INTERFACE_MODE_5GBASER: 570 caps |= MAC_5000FD; 571 break; 572 573 case PHY_INTERFACE_MODE_XGMII: 574 case PHY_INTERFACE_MODE_RXAUI: 575 case PHY_INTERFACE_MODE_XAUI: 576 case PHY_INTERFACE_MODE_10GBASER: 577 case PHY_INTERFACE_MODE_10GKR: 578 caps |= MAC_10000FD; 579 break; 580 581 case PHY_INTERFACE_MODE_25GBASER: 582 caps |= MAC_25000FD; 583 break; 584 585 case PHY_INTERFACE_MODE_XLGMII: 586 caps |= MAC_40000FD; 587 break; 588 589 case PHY_INTERFACE_MODE_INTERNAL: 590 caps |= ~0; 591 break; 592 593 case PHY_INTERFACE_MODE_NA: 594 case PHY_INTERFACE_MODE_MAX: 595 break; 596 } 597 598 switch (rate_matching) { 599 case RATE_MATCH_OPEN_LOOP: 600 /* TODO */ 601 fallthrough; 602 case RATE_MATCH_NONE: 603 matched_caps = 0; 604 break; 605 case RATE_MATCH_PAUSE: { 606 /* The MAC must support asymmetric pause towards the local 607 * device for this. We could allow just symmetric pause, but 608 * then we might have to renegotiate if the link partner 609 * doesn't support pause. This is because there's no way to 610 * accept pause frames without transmitting them if we only 611 * support symmetric pause. 612 */ 613 if (!(mac_capabilities & MAC_SYM_PAUSE) || 614 !(mac_capabilities & MAC_ASYM_PAUSE)) 615 break; 616 617 /* We can't adapt if the MAC doesn't support the interface's 618 * max speed at full duplex. 619 */ 620 if (mac_capabilities & 621 phylink_cap_from_speed_duplex(max_speed, DUPLEX_FULL)) 622 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 623 break; 624 } 625 case RATE_MATCH_CRS: 626 /* The MAC must support half duplex at the interface's max 627 * speed. 628 */ 629 if (mac_capabilities & 630 phylink_cap_from_speed_duplex(max_speed, DUPLEX_HALF)) { 631 matched_caps = GENMASK(__fls(caps), __fls(MAC_10HD)); 632 matched_caps &= mac_capabilities; 633 } 634 break; 635 } 636 637 return (caps & mac_capabilities) | matched_caps; 638 } 639 640 /** 641 * phylink_validate_mask_caps() - Restrict link modes based on caps 642 * @supported: ethtool bitmask for supported link modes. 643 * @state: pointer to a &struct phylink_link_state. 644 * @mac_capabilities: bitmask of MAC capabilities 645 * 646 * Calculate the supported link modes based on @mac_capabilities, and restrict 647 * @supported and @state based on that. Use this function if your capabiliies 648 * aren't constant, such as if they vary depending on the interface. 649 */ 650 static void phylink_validate_mask_caps(unsigned long *supported, 651 struct phylink_link_state *state, 652 unsigned long mac_capabilities) 653 { 654 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 655 unsigned long caps; 656 657 phylink_set_port_modes(mask); 658 phylink_set(mask, Autoneg); 659 caps = phylink_get_capabilities(state->interface, mac_capabilities, 660 state->rate_matching); 661 phylink_caps_to_linkmodes(mask, caps); 662 663 linkmode_and(supported, supported, mask); 664 linkmode_and(state->advertising, state->advertising, mask); 665 } 666 667 static int phylink_validate_mac_and_pcs(struct phylink *pl, 668 unsigned long *supported, 669 struct phylink_link_state *state) 670 { 671 struct phylink_pcs *pcs = NULL; 672 unsigned long capabilities; 673 int ret; 674 675 /* Get the PCS for this interface mode */ 676 if (pl->mac_ops->mac_select_pcs) { 677 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 678 if (IS_ERR(pcs)) 679 return PTR_ERR(pcs); 680 } 681 682 if (pcs) { 683 /* The PCS, if present, must be setup before phylink_create() 684 * has been called. If the ops is not initialised, print an 685 * error and backtrace rather than oopsing the kernel. 686 */ 687 if (!pcs->ops) { 688 phylink_err(pl, "interface %s: uninitialised PCS\n", 689 phy_modes(state->interface)); 690 dump_stack(); 691 return -EINVAL; 692 } 693 694 /* Ensure that this PCS supports the interface which the MAC 695 * returned it for. It is an error for the MAC to return a PCS 696 * that does not support the interface mode. 697 */ 698 if (!phy_interface_empty(pcs->supported_interfaces) && 699 !test_bit(state->interface, pcs->supported_interfaces)) { 700 phylink_err(pl, "MAC returned PCS which does not support %s\n", 701 phy_modes(state->interface)); 702 return -EINVAL; 703 } 704 705 /* Validate the link parameters with the PCS */ 706 if (pcs->ops->pcs_validate) { 707 ret = pcs->ops->pcs_validate(pcs, supported, state); 708 if (ret < 0 || phylink_is_empty_linkmode(supported)) 709 return -EINVAL; 710 711 /* Ensure the advertising mask is a subset of the 712 * supported mask. 713 */ 714 linkmode_and(state->advertising, state->advertising, 715 supported); 716 } 717 } 718 719 /* Then validate the link parameters with the MAC */ 720 if (pl->mac_ops->mac_get_caps) 721 capabilities = pl->mac_ops->mac_get_caps(pl->config, 722 state->interface); 723 else 724 capabilities = pl->config->mac_capabilities; 725 726 phylink_validate_mask_caps(supported, state, capabilities); 727 728 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 729 } 730 731 static void phylink_validate_one(struct phylink *pl, struct phy_device *phy, 732 const unsigned long *supported, 733 const struct phylink_link_state *state, 734 phy_interface_t interface, 735 unsigned long *accum_supported, 736 unsigned long *accum_advertising) 737 { 738 __ETHTOOL_DECLARE_LINK_MODE_MASK(tmp_supported); 739 struct phylink_link_state tmp_state; 740 741 linkmode_copy(tmp_supported, supported); 742 743 tmp_state = *state; 744 tmp_state.interface = interface; 745 746 if (phy) 747 tmp_state.rate_matching = phy_get_rate_matching(phy, interface); 748 749 if (!phylink_validate_mac_and_pcs(pl, tmp_supported, &tmp_state)) { 750 phylink_dbg(pl, " interface %u (%s) rate match %s supports %*pbl\n", 751 interface, phy_modes(interface), 752 phy_rate_matching_to_str(tmp_state.rate_matching), 753 __ETHTOOL_LINK_MODE_MASK_NBITS, tmp_supported); 754 755 linkmode_or(accum_supported, accum_supported, tmp_supported); 756 linkmode_or(accum_advertising, accum_advertising, 757 tmp_state.advertising); 758 } 759 } 760 761 static int phylink_validate_mask(struct phylink *pl, struct phy_device *phy, 762 unsigned long *supported, 763 struct phylink_link_state *state, 764 const unsigned long *interfaces) 765 { 766 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_adv) = { 0, }; 767 __ETHTOOL_DECLARE_LINK_MODE_MASK(all_s) = { 0, }; 768 int interface; 769 770 for_each_set_bit(interface, interfaces, PHY_INTERFACE_MODE_MAX) 771 phylink_validate_one(pl, phy, supported, state, interface, 772 all_s, all_adv); 773 774 linkmode_copy(supported, all_s); 775 linkmode_copy(state->advertising, all_adv); 776 777 return phylink_is_empty_linkmode(supported) ? -EINVAL : 0; 778 } 779 780 static int phylink_validate(struct phylink *pl, unsigned long *supported, 781 struct phylink_link_state *state) 782 { 783 const unsigned long *interfaces = pl->config->supported_interfaces; 784 785 if (state->interface == PHY_INTERFACE_MODE_NA) 786 return phylink_validate_mask(pl, NULL, supported, state, 787 interfaces); 788 789 if (!test_bit(state->interface, interfaces)) 790 return -EINVAL; 791 792 return phylink_validate_mac_and_pcs(pl, supported, state); 793 } 794 795 static int phylink_parse_fixedlink(struct phylink *pl, 796 const struct fwnode_handle *fwnode) 797 { 798 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; 799 struct fwnode_handle *fixed_node; 800 const struct phy_setting *s; 801 struct gpio_desc *desc; 802 u32 speed; 803 int ret; 804 805 fixed_node = fwnode_get_named_child_node(fwnode, "fixed-link"); 806 if (fixed_node) { 807 ret = fwnode_property_read_u32(fixed_node, "speed", &speed); 808 809 pl->link_config.speed = speed; 810 pl->link_config.duplex = DUPLEX_HALF; 811 812 if (fwnode_property_read_bool(fixed_node, "full-duplex")) 813 pl->link_config.duplex = DUPLEX_FULL; 814 815 /* We treat the "pause" and "asym-pause" terminology as 816 * defining the link partner's ability. 817 */ 818 if (fwnode_property_read_bool(fixed_node, "pause")) 819 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 820 pl->link_config.lp_advertising); 821 if (fwnode_property_read_bool(fixed_node, "asym-pause")) 822 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 823 pl->link_config.lp_advertising); 824 825 if (ret == 0) { 826 desc = fwnode_gpiod_get_index(fixed_node, "link", 0, 827 GPIOD_IN, "?"); 828 829 if (!IS_ERR(desc)) 830 pl->link_gpio = desc; 831 else if (desc == ERR_PTR(-EPROBE_DEFER)) 832 ret = -EPROBE_DEFER; 833 } 834 fwnode_handle_put(fixed_node); 835 836 if (ret) 837 return ret; 838 } else { 839 u32 prop[5]; 840 841 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 842 NULL, 0); 843 if (ret != ARRAY_SIZE(prop)) { 844 phylink_err(pl, "broken fixed-link?\n"); 845 return -EINVAL; 846 } 847 848 ret = fwnode_property_read_u32_array(fwnode, "fixed-link", 849 prop, ARRAY_SIZE(prop)); 850 if (!ret) { 851 pl->link_config.duplex = prop[1] ? 852 DUPLEX_FULL : DUPLEX_HALF; 853 pl->link_config.speed = prop[2]; 854 if (prop[3]) 855 __set_bit(ETHTOOL_LINK_MODE_Pause_BIT, 856 pl->link_config.lp_advertising); 857 if (prop[4]) 858 __set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 859 pl->link_config.lp_advertising); 860 } 861 } 862 863 if (pl->link_config.speed > SPEED_1000 && 864 pl->link_config.duplex != DUPLEX_FULL) 865 phylink_warn(pl, "fixed link specifies half duplex for %dMbps link?\n", 866 pl->link_config.speed); 867 868 linkmode_fill(pl->supported); 869 linkmode_copy(pl->link_config.advertising, pl->supported); 870 phylink_validate(pl, pl->supported, &pl->link_config); 871 872 s = phy_lookup_setting(pl->link_config.speed, pl->link_config.duplex, 873 pl->supported, true); 874 875 linkmode_set_bit(ETHTOOL_LINK_MODE_Pause_BIT, mask); 876 linkmode_set_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, mask); 877 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); 878 linkmode_and(pl->supported, pl->supported, mask); 879 880 phylink_set(pl->supported, MII); 881 882 if (s) { 883 __set_bit(s->bit, pl->supported); 884 __set_bit(s->bit, pl->link_config.lp_advertising); 885 } else { 886 phylink_warn(pl, "fixed link %s duplex %dMbps not recognised\n", 887 pl->link_config.duplex == DUPLEX_FULL ? "full" : "half", 888 pl->link_config.speed); 889 } 890 891 linkmode_and(pl->link_config.advertising, pl->link_config.advertising, 892 pl->supported); 893 894 pl->link_config.link = 1; 895 pl->link_config.an_complete = 1; 896 897 return 0; 898 } 899 900 static int phylink_parse_mode(struct phylink *pl, 901 const struct fwnode_handle *fwnode) 902 { 903 struct fwnode_handle *dn; 904 const char *managed; 905 unsigned long caps; 906 907 if (pl->config->default_an_inband) 908 pl->cfg_link_an_mode = MLO_AN_INBAND; 909 910 dn = fwnode_get_named_child_node(fwnode, "fixed-link"); 911 if (dn || fwnode_property_present(fwnode, "fixed-link")) 912 pl->cfg_link_an_mode = MLO_AN_FIXED; 913 fwnode_handle_put(dn); 914 915 if ((fwnode_property_read_string(fwnode, "managed", &managed) == 0 && 916 strcmp(managed, "in-band-status") == 0)) { 917 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 918 phylink_err(pl, 919 "can't use both fixed-link and in-band-status\n"); 920 return -EINVAL; 921 } 922 923 pl->cfg_link_an_mode = MLO_AN_INBAND; 924 } 925 926 if (pl->cfg_link_an_mode == MLO_AN_INBAND) { 927 linkmode_zero(pl->supported); 928 phylink_set(pl->supported, MII); 929 phylink_set(pl->supported, Autoneg); 930 phylink_set(pl->supported, Asym_Pause); 931 phylink_set(pl->supported, Pause); 932 933 switch (pl->link_config.interface) { 934 case PHY_INTERFACE_MODE_SGMII: 935 case PHY_INTERFACE_MODE_PSGMII: 936 case PHY_INTERFACE_MODE_QSGMII: 937 case PHY_INTERFACE_MODE_QUSGMII: 938 case PHY_INTERFACE_MODE_RGMII: 939 case PHY_INTERFACE_MODE_RGMII_ID: 940 case PHY_INTERFACE_MODE_RGMII_RXID: 941 case PHY_INTERFACE_MODE_RGMII_TXID: 942 case PHY_INTERFACE_MODE_RTBI: 943 case PHY_INTERFACE_MODE_1000BASEX: 944 case PHY_INTERFACE_MODE_2500BASEX: 945 case PHY_INTERFACE_MODE_5GBASER: 946 case PHY_INTERFACE_MODE_25GBASER: 947 case PHY_INTERFACE_MODE_USXGMII: 948 case PHY_INTERFACE_MODE_10G_QXGMII: 949 case PHY_INTERFACE_MODE_10GKR: 950 case PHY_INTERFACE_MODE_10GBASER: 951 case PHY_INTERFACE_MODE_XLGMII: 952 caps = ~(MAC_SYM_PAUSE | MAC_ASYM_PAUSE); 953 caps = phylink_get_capabilities(pl->link_config.interface, caps, 954 RATE_MATCH_NONE); 955 phylink_caps_to_linkmodes(pl->supported, caps); 956 break; 957 958 default: 959 phylink_err(pl, 960 "incorrect link mode %s for in-band status\n", 961 phy_modes(pl->link_config.interface)); 962 return -EINVAL; 963 } 964 965 linkmode_copy(pl->link_config.advertising, pl->supported); 966 967 if (phylink_validate(pl, pl->supported, &pl->link_config)) { 968 phylink_err(pl, 969 "failed to validate link configuration for in-band status\n"); 970 return -EINVAL; 971 } 972 } 973 974 return 0; 975 } 976 977 static void phylink_apply_manual_flow(struct phylink *pl, 978 struct phylink_link_state *state) 979 { 980 /* If autoneg is disabled, pause AN is also disabled */ 981 if (!linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 982 state->advertising)) 983 state->pause &= ~MLO_PAUSE_AN; 984 985 /* Manual configuration of pause modes */ 986 if (!(pl->link_config.pause & MLO_PAUSE_AN)) 987 state->pause = pl->link_config.pause; 988 } 989 990 static void phylink_resolve_an_pause(struct phylink_link_state *state) 991 { 992 bool tx_pause, rx_pause; 993 994 if (state->duplex == DUPLEX_FULL) { 995 linkmode_resolve_pause(state->advertising, 996 state->lp_advertising, 997 &tx_pause, &rx_pause); 998 if (tx_pause) 999 state->pause |= MLO_PAUSE_TX; 1000 if (rx_pause) 1001 state->pause |= MLO_PAUSE_RX; 1002 } 1003 } 1004 1005 static unsigned int phylink_pcs_inband_caps(struct phylink_pcs *pcs, 1006 phy_interface_t interface) 1007 { 1008 if (pcs && pcs->ops->pcs_inband_caps) 1009 return pcs->ops->pcs_inband_caps(pcs, interface); 1010 1011 return 0; 1012 } 1013 1014 static void phylink_pcs_pre_config(struct phylink_pcs *pcs, 1015 phy_interface_t interface) 1016 { 1017 if (pcs && pcs->ops->pcs_pre_config) 1018 pcs->ops->pcs_pre_config(pcs, interface); 1019 } 1020 1021 static int phylink_pcs_post_config(struct phylink_pcs *pcs, 1022 phy_interface_t interface) 1023 { 1024 int err = 0; 1025 1026 if (pcs && pcs->ops->pcs_post_config) 1027 err = pcs->ops->pcs_post_config(pcs, interface); 1028 1029 return err; 1030 } 1031 1032 static void phylink_pcs_disable(struct phylink_pcs *pcs) 1033 { 1034 if (pcs && pcs->ops->pcs_disable) 1035 pcs->ops->pcs_disable(pcs); 1036 } 1037 1038 static int phylink_pcs_enable(struct phylink_pcs *pcs) 1039 { 1040 int err = 0; 1041 1042 if (pcs && pcs->ops->pcs_enable) 1043 err = pcs->ops->pcs_enable(pcs); 1044 1045 return err; 1046 } 1047 1048 static int phylink_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode, 1049 const struct phylink_link_state *state, 1050 bool permit_pause_to_mac) 1051 { 1052 if (!pcs) 1053 return 0; 1054 1055 return pcs->ops->pcs_config(pcs, neg_mode, state->interface, 1056 state->advertising, permit_pause_to_mac); 1057 } 1058 1059 static void phylink_pcs_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, 1060 phy_interface_t interface, int speed, 1061 int duplex) 1062 { 1063 if (pcs && pcs->ops->pcs_link_up) 1064 pcs->ops->pcs_link_up(pcs, neg_mode, interface, speed, duplex); 1065 } 1066 1067 /* Query inband for a specific interface mode, asking the MAC for the 1068 * PCS which will be used to handle the interface mode. 1069 */ 1070 static unsigned int phylink_inband_caps(struct phylink *pl, 1071 phy_interface_t interface) 1072 { 1073 struct phylink_pcs *pcs; 1074 1075 if (!pl->mac_ops->mac_select_pcs) 1076 return 0; 1077 1078 pcs = pl->mac_ops->mac_select_pcs(pl->config, interface); 1079 if (!pcs) 1080 return 0; 1081 1082 return phylink_pcs_inband_caps(pcs, interface); 1083 } 1084 1085 static void phylink_pcs_poll_stop(struct phylink *pl) 1086 { 1087 if (pl->cfg_link_an_mode == MLO_AN_INBAND) 1088 del_timer(&pl->link_poll); 1089 } 1090 1091 static void phylink_pcs_poll_start(struct phylink *pl) 1092 { 1093 if (pl->pcs && pl->pcs->poll && pl->cfg_link_an_mode == MLO_AN_INBAND) 1094 mod_timer(&pl->link_poll, jiffies + HZ); 1095 } 1096 1097 int phylink_pcs_pre_init(struct phylink *pl, struct phylink_pcs *pcs) 1098 { 1099 int ret = 0; 1100 1101 /* Signal to PCS driver that MAC requires RX clock for init */ 1102 if (pl->config->mac_requires_rxc) 1103 pcs->rxc_always_on = true; 1104 1105 if (pcs->ops->pcs_pre_init) 1106 ret = pcs->ops->pcs_pre_init(pcs); 1107 1108 return ret; 1109 } 1110 EXPORT_SYMBOL_GPL(phylink_pcs_pre_init); 1111 1112 static void phylink_mac_config(struct phylink *pl, 1113 const struct phylink_link_state *state) 1114 { 1115 struct phylink_link_state st = *state; 1116 1117 /* Stop drivers incorrectly using these */ 1118 linkmode_zero(st.lp_advertising); 1119 st.speed = SPEED_UNKNOWN; 1120 st.duplex = DUPLEX_UNKNOWN; 1121 st.an_complete = false; 1122 st.link = false; 1123 1124 phylink_dbg(pl, 1125 "%s: mode=%s/%s/%s adv=%*pb pause=%02x\n", 1126 __func__, phylink_an_mode_str(pl->act_link_an_mode), 1127 phy_modes(st.interface), 1128 phy_rate_matching_to_str(st.rate_matching), 1129 __ETHTOOL_LINK_MODE_MASK_NBITS, st.advertising, 1130 st.pause); 1131 1132 pl->mac_ops->mac_config(pl->config, pl->act_link_an_mode, &st); 1133 } 1134 1135 static void phylink_pcs_an_restart(struct phylink *pl) 1136 { 1137 if (pl->pcs && linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1138 pl->link_config.advertising) && 1139 phy_interface_mode_is_8023z(pl->link_config.interface) && 1140 phylink_autoneg_inband(pl->act_link_an_mode)) 1141 pl->pcs->ops->pcs_an_restart(pl->pcs); 1142 } 1143 1144 /** 1145 * phylink_pcs_neg_mode() - helper to determine PCS inband mode 1146 * @pl: a pointer to a &struct phylink returned from phylink_create() 1147 * @pcs: a pointer to &struct phylink_pcs 1148 * @interface: interface mode to be used 1149 * @advertising: adertisement ethtool link mode mask 1150 * 1151 * Determines the negotiation mode to be used by the PCS, and returns 1152 * one of: 1153 * 1154 * - %PHYLINK_PCS_NEG_NONE: interface mode does not support inband 1155 * - %PHYLINK_PCS_NEG_OUTBAND: an out of band mode (e.g. reading the PHY) 1156 * will be used. 1157 * - %PHYLINK_PCS_NEG_INBAND_DISABLED: inband mode selected but autoneg 1158 * disabled 1159 * - %PHYLINK_PCS_NEG_INBAND_ENABLED: inband mode selected and autoneg enabled 1160 * 1161 * Note: this is for cases where the PCS itself is involved in negotiation 1162 * (e.g. Clause 37, SGMII and similar) not Clause 73. 1163 */ 1164 static void phylink_pcs_neg_mode(struct phylink *pl, struct phylink_pcs *pcs, 1165 phy_interface_t interface, 1166 const unsigned long *advertising) 1167 { 1168 unsigned int pcs_ib_caps = 0; 1169 unsigned int phy_ib_caps = 0; 1170 unsigned int neg_mode, mode; 1171 enum { 1172 INBAND_CISCO_SGMII, 1173 INBAND_BASEX, 1174 } type; 1175 1176 mode = pl->req_link_an_mode; 1177 1178 pl->phy_ib_mode = 0; 1179 1180 switch (interface) { 1181 case PHY_INTERFACE_MODE_SGMII: 1182 case PHY_INTERFACE_MODE_QSGMII: 1183 case PHY_INTERFACE_MODE_QUSGMII: 1184 case PHY_INTERFACE_MODE_USXGMII: 1185 case PHY_INTERFACE_MODE_10G_QXGMII: 1186 /* These protocols are designed for use with a PHY which 1187 * communicates its negotiation result back to the MAC via 1188 * inband communication. Note: there exist PHYs that run 1189 * with SGMII but do not send the inband data. 1190 */ 1191 type = INBAND_CISCO_SGMII; 1192 break; 1193 1194 case PHY_INTERFACE_MODE_1000BASEX: 1195 case PHY_INTERFACE_MODE_2500BASEX: 1196 /* 1000base-X is designed for use media-side for Fibre 1197 * connections, and thus the Autoneg bit needs to be 1198 * taken into account. We also do this for 2500base-X 1199 * as well, but drivers may not support this, so may 1200 * need to override this. 1201 */ 1202 type = INBAND_BASEX; 1203 break; 1204 1205 default: 1206 pl->pcs_neg_mode = PHYLINK_PCS_NEG_NONE; 1207 pl->act_link_an_mode = mode; 1208 return; 1209 } 1210 1211 if (pcs) 1212 pcs_ib_caps = phylink_pcs_inband_caps(pcs, interface); 1213 1214 if (pl->phydev) 1215 phy_ib_caps = phy_inband_caps(pl->phydev, interface); 1216 1217 phylink_dbg(pl, "interface %s inband modes: pcs=%02x phy=%02x\n", 1218 phy_modes(interface), pcs_ib_caps, phy_ib_caps); 1219 1220 if (!phylink_autoneg_inband(mode)) { 1221 bool pcs_ib_only = false; 1222 bool phy_ib_only = false; 1223 1224 if (pcs_ib_caps && pcs_ib_caps != LINK_INBAND_DISABLE) { 1225 /* PCS supports reporting in-band capabilities, and 1226 * supports more than disable mode. 1227 */ 1228 if (pcs_ib_caps & LINK_INBAND_DISABLE) 1229 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1230 else if (pcs_ib_caps & LINK_INBAND_ENABLE) 1231 pcs_ib_only = true; 1232 } 1233 1234 if (phy_ib_caps && phy_ib_caps != LINK_INBAND_DISABLE) { 1235 /* PHY supports in-band capabilities, and supports 1236 * more than disable mode. 1237 */ 1238 if (phy_ib_caps & LINK_INBAND_DISABLE) 1239 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1240 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1241 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1242 else if (phy_ib_caps & LINK_INBAND_ENABLE) 1243 phy_ib_only = true; 1244 } 1245 1246 /* If either the PCS or PHY requires inband to be enabled, 1247 * this is an invalid configuration. Provide a diagnostic 1248 * message for this case, but don't try to force the issue. 1249 */ 1250 if (pcs_ib_only || phy_ib_only) 1251 phylink_warn(pl, 1252 "firmware wants %s mode, but %s%s%s requires inband\n", 1253 phylink_an_mode_str(mode), 1254 pcs_ib_only ? "PCS" : "", 1255 pcs_ib_only && phy_ib_only ? " and " : "", 1256 phy_ib_only ? "PHY" : ""); 1257 1258 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1259 } else if (type == INBAND_CISCO_SGMII || pl->phydev) { 1260 /* For SGMII modes which are designed to be used with PHYs, or 1261 * Base-X with a PHY, we try to use in-band mode where-ever 1262 * possible. However, there are some PHYs e.g. BCM84881 which 1263 * do not support in-band. 1264 */ 1265 const unsigned int inband_ok = LINK_INBAND_ENABLE | 1266 LINK_INBAND_BYPASS; 1267 const unsigned int outband_ok = LINK_INBAND_DISABLE | 1268 LINK_INBAND_BYPASS; 1269 /* PCS PHY 1270 * D E D E 1271 * 0 0 0 0 no information inband enabled 1272 * 1 0 0 0 pcs doesn't support outband 1273 * 0 1 0 0 pcs required inband enabled 1274 * 1 1 0 0 pcs optional inband enabled 1275 * 0 0 1 0 phy doesn't support outband 1276 * 1 0 1 0 pcs+phy doesn't support outband 1277 * 0 1 1 0 pcs required, phy doesn't support, invalid 1278 * 1 1 1 0 pcs optional, phy doesn't support, outband 1279 * 0 0 0 1 phy required inband enabled 1280 * 1 0 0 1 pcs doesn't support, phy required, invalid 1281 * 0 1 0 1 pcs+phy required inband enabled 1282 * 1 1 0 1 pcs optional, phy required inband enabled 1283 * 0 0 1 1 phy optional inband enabled 1284 * 1 0 1 1 pcs doesn't support, phy optional, outband 1285 * 0 1 1 1 pcs required, phy optional inband enabled 1286 * 1 1 1 1 pcs+phy optional inband enabled 1287 */ 1288 if ((!pcs_ib_caps || pcs_ib_caps & inband_ok) && 1289 (!phy_ib_caps || phy_ib_caps & inband_ok)) { 1290 /* In-band supported or unknown at both ends. Enable 1291 * in-band mode with or without bypass at the PHY. 1292 */ 1293 if (phy_ib_caps & LINK_INBAND_ENABLE) 1294 pl->phy_ib_mode = LINK_INBAND_ENABLE; 1295 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1296 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1297 1298 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1299 } else if ((!pcs_ib_caps || pcs_ib_caps & outband_ok) && 1300 (!phy_ib_caps || phy_ib_caps & outband_ok)) { 1301 /* Either in-band not supported at at least one end. 1302 * In-band bypass at the other end is possible. 1303 */ 1304 if (phy_ib_caps & LINK_INBAND_DISABLE) 1305 pl->phy_ib_mode = LINK_INBAND_DISABLE; 1306 else if (phy_ib_caps & LINK_INBAND_BYPASS) 1307 pl->phy_ib_mode = LINK_INBAND_BYPASS; 1308 1309 neg_mode = PHYLINK_PCS_NEG_OUTBAND; 1310 if (pl->phydev) 1311 mode = MLO_AN_PHY; 1312 } else { 1313 /* invalid */ 1314 phylink_warn(pl, "%s: incompatible in-band capabilities, trying in-band", 1315 phy_modes(interface)); 1316 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1317 } 1318 } else { 1319 /* For Base-X without a PHY */ 1320 if (pcs_ib_caps == LINK_INBAND_DISABLE) 1321 /* If the PCS doesn't support inband, then inband must 1322 * be disabled. 1323 */ 1324 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1325 else if (pcs_ib_caps == LINK_INBAND_ENABLE) 1326 /* If the PCS requires inband, then inband must always 1327 * be enabled. 1328 */ 1329 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1330 else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1331 advertising)) 1332 neg_mode = PHYLINK_PCS_NEG_INBAND_ENABLED; 1333 else 1334 neg_mode = PHYLINK_PCS_NEG_INBAND_DISABLED; 1335 } 1336 1337 pl->pcs_neg_mode = neg_mode; 1338 pl->act_link_an_mode = mode; 1339 } 1340 1341 static void phylink_major_config(struct phylink *pl, bool restart, 1342 const struct phylink_link_state *state) 1343 { 1344 struct phylink_pcs *pcs = NULL; 1345 bool pcs_changed = false; 1346 unsigned int rate_kbd; 1347 unsigned int neg_mode; 1348 int err; 1349 1350 phylink_dbg(pl, "major config, requested %s/%s\n", 1351 phylink_an_mode_str(pl->req_link_an_mode), 1352 phy_modes(state->interface)); 1353 1354 if (pl->mac_ops->mac_select_pcs) { 1355 pcs = pl->mac_ops->mac_select_pcs(pl->config, state->interface); 1356 if (IS_ERR(pcs)) { 1357 phylink_err(pl, 1358 "mac_select_pcs unexpectedly failed: %pe\n", 1359 pcs); 1360 return; 1361 } 1362 1363 pcs_changed = pl->pcs != pcs; 1364 } 1365 1366 phylink_pcs_neg_mode(pl, pcs, state->interface, state->advertising); 1367 1368 phylink_dbg(pl, "major config, active %s/%s/%s\n", 1369 phylink_an_mode_str(pl->act_link_an_mode), 1370 phylink_pcs_mode_str(pl->pcs_neg_mode), 1371 phy_modes(state->interface)); 1372 1373 phylink_pcs_poll_stop(pl); 1374 1375 if (pl->mac_ops->mac_prepare) { 1376 err = pl->mac_ops->mac_prepare(pl->config, pl->act_link_an_mode, 1377 state->interface); 1378 if (err < 0) { 1379 phylink_err(pl, "mac_prepare failed: %pe\n", 1380 ERR_PTR(err)); 1381 return; 1382 } 1383 } 1384 1385 /* If we have a new PCS, switch to the new PCS after preparing the MAC 1386 * for the change. 1387 */ 1388 if (pcs_changed) { 1389 phylink_pcs_disable(pl->pcs); 1390 1391 if (pl->pcs) 1392 pl->pcs->phylink = NULL; 1393 1394 pcs->phylink = pl; 1395 1396 pl->pcs = pcs; 1397 } 1398 1399 if (pl->pcs) 1400 phylink_pcs_pre_config(pl->pcs, state->interface); 1401 1402 phylink_mac_config(pl, state); 1403 1404 if (pl->pcs) 1405 phylink_pcs_post_config(pl->pcs, state->interface); 1406 1407 if (pl->pcs_state == PCS_STATE_STARTING || pcs_changed) 1408 phylink_pcs_enable(pl->pcs); 1409 1410 neg_mode = pl->act_link_an_mode; 1411 if (pl->pcs && pl->pcs->neg_mode) 1412 neg_mode = pl->pcs_neg_mode; 1413 1414 err = phylink_pcs_config(pl->pcs, neg_mode, state, 1415 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1416 if (err < 0) 1417 phylink_err(pl, "pcs_config failed: %pe\n", 1418 ERR_PTR(err)); 1419 else if (err > 0) 1420 restart = true; 1421 1422 if (restart) 1423 phylink_pcs_an_restart(pl); 1424 1425 if (pl->mac_ops->mac_finish) { 1426 err = pl->mac_ops->mac_finish(pl->config, pl->act_link_an_mode, 1427 state->interface); 1428 if (err < 0) 1429 phylink_err(pl, "mac_finish failed: %pe\n", 1430 ERR_PTR(err)); 1431 } 1432 1433 if (pl->phydev && pl->phy_ib_mode) { 1434 err = phy_config_inband(pl->phydev, pl->phy_ib_mode); 1435 if (err < 0) 1436 phylink_err(pl, "phy_config_inband: %pe\n", 1437 ERR_PTR(err)); 1438 } 1439 1440 if (pl->sfp_bus) { 1441 rate_kbd = phylink_interface_signal_rate(state->interface); 1442 if (rate_kbd) 1443 sfp_upstream_set_signal_rate(pl->sfp_bus, rate_kbd); 1444 } 1445 1446 phylink_pcs_poll_start(pl); 1447 } 1448 1449 /* 1450 * Reconfigure for a change of inband advertisement. 1451 * If we have a separate PCS, we only need to call its pcs_config() method, 1452 * and then restart AN if it indicates something changed. Otherwise, we do 1453 * the full MAC reconfiguration. 1454 */ 1455 static int phylink_change_inband_advert(struct phylink *pl) 1456 { 1457 unsigned int neg_mode; 1458 int ret; 1459 1460 if (test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1461 return 0; 1462 1463 phylink_dbg(pl, "%s: mode=%s/%s adv=%*pb pause=%02x\n", __func__, 1464 phylink_an_mode_str(pl->req_link_an_mode), 1465 phy_modes(pl->link_config.interface), 1466 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->link_config.advertising, 1467 pl->link_config.pause); 1468 1469 /* Recompute the PCS neg mode */ 1470 phylink_pcs_neg_mode(pl, pl->pcs, pl->link_config.interface, 1471 pl->link_config.advertising); 1472 1473 neg_mode = pl->act_link_an_mode; 1474 if (pl->pcs->neg_mode) 1475 neg_mode = pl->pcs_neg_mode; 1476 1477 /* Modern PCS-based method; update the advert at the PCS, and 1478 * restart negotiation if the pcs_config() helper indicates that 1479 * the programmed advertisement has changed. 1480 */ 1481 ret = phylink_pcs_config(pl->pcs, neg_mode, &pl->link_config, 1482 !!(pl->link_config.pause & MLO_PAUSE_AN)); 1483 if (ret < 0) 1484 return ret; 1485 1486 if (ret > 0) 1487 phylink_pcs_an_restart(pl); 1488 1489 return 0; 1490 } 1491 1492 static void phylink_mac_pcs_get_state(struct phylink *pl, 1493 struct phylink_link_state *state) 1494 { 1495 linkmode_copy(state->advertising, pl->link_config.advertising); 1496 linkmode_zero(state->lp_advertising); 1497 state->interface = pl->link_config.interface; 1498 state->rate_matching = pl->link_config.rate_matching; 1499 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 1500 state->advertising)) { 1501 state->speed = SPEED_UNKNOWN; 1502 state->duplex = DUPLEX_UNKNOWN; 1503 state->pause = MLO_PAUSE_NONE; 1504 } else { 1505 state->speed = pl->link_config.speed; 1506 state->duplex = pl->link_config.duplex; 1507 state->pause = pl->link_config.pause; 1508 } 1509 state->an_complete = 0; 1510 state->link = 1; 1511 1512 if (pl->pcs) 1513 pl->pcs->ops->pcs_get_state(pl->pcs, state); 1514 else 1515 state->link = 0; 1516 } 1517 1518 /* The fixed state is... fixed except for the link state, 1519 * which may be determined by a GPIO or a callback. 1520 */ 1521 static void phylink_get_fixed_state(struct phylink *pl, 1522 struct phylink_link_state *state) 1523 { 1524 *state = pl->link_config; 1525 if (pl->config->get_fixed_state) 1526 pl->config->get_fixed_state(pl->config, state); 1527 else if (pl->link_gpio) 1528 state->link = !!gpiod_get_value_cansleep(pl->link_gpio); 1529 1530 state->pause = MLO_PAUSE_NONE; 1531 phylink_resolve_an_pause(state); 1532 } 1533 1534 static void phylink_mac_initial_config(struct phylink *pl, bool force_restart) 1535 { 1536 struct phylink_link_state link_state; 1537 1538 switch (pl->req_link_an_mode) { 1539 case MLO_AN_PHY: 1540 link_state = pl->phy_state; 1541 break; 1542 1543 case MLO_AN_FIXED: 1544 phylink_get_fixed_state(pl, &link_state); 1545 break; 1546 1547 case MLO_AN_INBAND: 1548 link_state = pl->link_config; 1549 if (link_state.interface == PHY_INTERFACE_MODE_SGMII) 1550 link_state.pause = MLO_PAUSE_NONE; 1551 break; 1552 1553 default: /* can't happen */ 1554 return; 1555 } 1556 1557 link_state.link = false; 1558 1559 phylink_apply_manual_flow(pl, &link_state); 1560 phylink_major_config(pl, force_restart, &link_state); 1561 } 1562 1563 static const char *phylink_pause_to_str(int pause) 1564 { 1565 switch (pause & MLO_PAUSE_TXRX_MASK) { 1566 case MLO_PAUSE_TX | MLO_PAUSE_RX: 1567 return "rx/tx"; 1568 case MLO_PAUSE_TX: 1569 return "tx"; 1570 case MLO_PAUSE_RX: 1571 return "rx"; 1572 default: 1573 return "off"; 1574 } 1575 } 1576 1577 static void phylink_link_up(struct phylink *pl, 1578 struct phylink_link_state link_state) 1579 { 1580 struct net_device *ndev = pl->netdev; 1581 unsigned int neg_mode; 1582 int speed, duplex; 1583 bool rx_pause; 1584 1585 speed = link_state.speed; 1586 duplex = link_state.duplex; 1587 rx_pause = !!(link_state.pause & MLO_PAUSE_RX); 1588 1589 switch (link_state.rate_matching) { 1590 case RATE_MATCH_PAUSE: 1591 /* The PHY is doing rate matchion from the media rate (in 1592 * the link_state) to the interface speed, and will send 1593 * pause frames to the MAC to limit its transmission speed. 1594 */ 1595 speed = phylink_interface_max_speed(link_state.interface); 1596 duplex = DUPLEX_FULL; 1597 rx_pause = true; 1598 break; 1599 1600 case RATE_MATCH_CRS: 1601 /* The PHY is doing rate matchion from the media rate (in 1602 * the link_state) to the interface speed, and will cause 1603 * collisions to the MAC to limit its transmission speed. 1604 */ 1605 speed = phylink_interface_max_speed(link_state.interface); 1606 duplex = DUPLEX_HALF; 1607 break; 1608 } 1609 1610 pl->cur_interface = link_state.interface; 1611 1612 neg_mode = pl->act_link_an_mode; 1613 if (pl->pcs && pl->pcs->neg_mode) 1614 neg_mode = pl->pcs_neg_mode; 1615 1616 phylink_pcs_link_up(pl->pcs, neg_mode, pl->cur_interface, speed, 1617 duplex); 1618 1619 pl->mac_ops->mac_link_up(pl->config, pl->phydev, pl->act_link_an_mode, 1620 pl->cur_interface, speed, duplex, 1621 !!(link_state.pause & MLO_PAUSE_TX), rx_pause); 1622 1623 if (ndev) 1624 netif_carrier_on(ndev); 1625 1626 phylink_info(pl, 1627 "Link is Up - %s/%s - flow control %s\n", 1628 phy_speed_to_str(link_state.speed), 1629 phy_duplex_to_str(link_state.duplex), 1630 phylink_pause_to_str(link_state.pause)); 1631 } 1632 1633 static void phylink_link_down(struct phylink *pl) 1634 { 1635 struct net_device *ndev = pl->netdev; 1636 1637 if (ndev) 1638 netif_carrier_off(ndev); 1639 pl->mac_ops->mac_link_down(pl->config, pl->act_link_an_mode, 1640 pl->cur_interface); 1641 phylink_info(pl, "Link is Down\n"); 1642 } 1643 1644 static void phylink_resolve(struct work_struct *w) 1645 { 1646 struct phylink *pl = container_of(w, struct phylink, resolve); 1647 struct phylink_link_state link_state; 1648 struct net_device *ndev = pl->netdev; 1649 bool mac_config = false; 1650 bool retrigger = false; 1651 bool cur_link_state; 1652 1653 mutex_lock(&pl->state_mutex); 1654 if (pl->netdev) 1655 cur_link_state = netif_carrier_ok(ndev); 1656 else 1657 cur_link_state = pl->old_link_state; 1658 1659 if (pl->phylink_disable_state) { 1660 pl->link_failed = false; 1661 link_state.link = false; 1662 } else if (pl->link_failed) { 1663 link_state.link = false; 1664 retrigger = true; 1665 } else if (pl->act_link_an_mode == MLO_AN_FIXED) { 1666 phylink_get_fixed_state(pl, &link_state); 1667 mac_config = link_state.link; 1668 } else if (pl->act_link_an_mode == MLO_AN_PHY) { 1669 link_state = pl->phy_state; 1670 mac_config = link_state.link; 1671 } else { 1672 phylink_mac_pcs_get_state(pl, &link_state); 1673 1674 /* The PCS may have a latching link-fail indicator. If the link 1675 * was up, bring the link down and re-trigger the resolve. 1676 * Otherwise, re-read the PCS state to get the current status 1677 * of the link. 1678 */ 1679 if (!link_state.link) { 1680 if (cur_link_state) 1681 retrigger = true; 1682 else 1683 phylink_mac_pcs_get_state(pl, &link_state); 1684 } 1685 1686 /* If we have a phy, the "up" state is the union of both the 1687 * PHY and the MAC 1688 */ 1689 if (pl->phydev) 1690 link_state.link &= pl->phy_state.link; 1691 1692 /* Only update if the PHY link is up */ 1693 if (pl->phydev && pl->phy_state.link) { 1694 /* If the interface has changed, force a link down 1695 * event if the link isn't already down, and re-resolve. 1696 */ 1697 if (link_state.interface != pl->phy_state.interface) { 1698 retrigger = true; 1699 link_state.link = false; 1700 } 1701 1702 link_state.interface = pl->phy_state.interface; 1703 1704 /* If we are doing rate matching, then the link 1705 * speed/duplex comes from the PHY 1706 */ 1707 if (pl->phy_state.rate_matching) { 1708 link_state.rate_matching = 1709 pl->phy_state.rate_matching; 1710 link_state.speed = pl->phy_state.speed; 1711 link_state.duplex = pl->phy_state.duplex; 1712 } 1713 1714 /* If we have a PHY, we need to update with the PHY 1715 * flow control bits. 1716 */ 1717 link_state.pause = pl->phy_state.pause; 1718 mac_config = true; 1719 } 1720 } 1721 1722 if (pl->act_link_an_mode != MLO_AN_FIXED) 1723 phylink_apply_manual_flow(pl, &link_state); 1724 1725 if (mac_config) { 1726 if (link_state.interface != pl->link_config.interface) { 1727 /* The interface has changed, force the link down and 1728 * then reconfigure. 1729 */ 1730 if (cur_link_state) { 1731 phylink_link_down(pl); 1732 cur_link_state = false; 1733 } 1734 phylink_major_config(pl, false, &link_state); 1735 pl->link_config.interface = link_state.interface; 1736 } 1737 } 1738 1739 if (link_state.link != cur_link_state) { 1740 pl->old_link_state = link_state.link; 1741 if (!link_state.link) 1742 phylink_link_down(pl); 1743 else 1744 phylink_link_up(pl, link_state); 1745 } 1746 if (!link_state.link && retrigger) { 1747 pl->link_failed = false; 1748 queue_work(system_power_efficient_wq, &pl->resolve); 1749 } 1750 mutex_unlock(&pl->state_mutex); 1751 } 1752 1753 static void phylink_run_resolve(struct phylink *pl) 1754 { 1755 if (!pl->phylink_disable_state) 1756 queue_work(system_power_efficient_wq, &pl->resolve); 1757 } 1758 1759 static void phylink_run_resolve_and_disable(struct phylink *pl, int bit) 1760 { 1761 unsigned long state = pl->phylink_disable_state; 1762 1763 set_bit(bit, &pl->phylink_disable_state); 1764 if (state == 0) { 1765 queue_work(system_power_efficient_wq, &pl->resolve); 1766 flush_work(&pl->resolve); 1767 } 1768 } 1769 1770 static void phylink_enable_and_run_resolve(struct phylink *pl, int bit) 1771 { 1772 clear_bit(bit, &pl->phylink_disable_state); 1773 phylink_run_resolve(pl); 1774 } 1775 1776 static void phylink_fixed_poll(struct timer_list *t) 1777 { 1778 struct phylink *pl = container_of(t, struct phylink, link_poll); 1779 1780 mod_timer(t, jiffies + HZ); 1781 1782 phylink_run_resolve(pl); 1783 } 1784 1785 static const struct sfp_upstream_ops sfp_phylink_ops; 1786 1787 static int phylink_register_sfp(struct phylink *pl, 1788 const struct fwnode_handle *fwnode) 1789 { 1790 struct sfp_bus *bus; 1791 int ret; 1792 1793 if (!fwnode) 1794 return 0; 1795 1796 bus = sfp_bus_find_fwnode(fwnode); 1797 if (IS_ERR(bus)) { 1798 phylink_err(pl, "unable to attach SFP bus: %pe\n", bus); 1799 return PTR_ERR(bus); 1800 } 1801 1802 pl->sfp_bus = bus; 1803 1804 ret = sfp_bus_add_upstream(bus, pl, &sfp_phylink_ops); 1805 sfp_bus_put(bus); 1806 1807 return ret; 1808 } 1809 1810 /** 1811 * phylink_set_fixed_link() - set the fixed link 1812 * @pl: a pointer to a &struct phylink returned from phylink_create() 1813 * @state: a pointer to a struct phylink_link_state. 1814 * 1815 * This function is used when the link parameters are known and do not change, 1816 * making it suitable for certain types of network connections. 1817 * 1818 * Returns: zero on success or negative error code. 1819 */ 1820 int phylink_set_fixed_link(struct phylink *pl, 1821 const struct phylink_link_state *state) 1822 { 1823 const struct phy_setting *s; 1824 unsigned long *adv; 1825 1826 if (pl->cfg_link_an_mode != MLO_AN_PHY || !state || 1827 !test_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state)) 1828 return -EINVAL; 1829 1830 s = phy_lookup_setting(state->speed, state->duplex, 1831 pl->supported, true); 1832 if (!s) 1833 return -EINVAL; 1834 1835 adv = pl->link_config.advertising; 1836 linkmode_zero(adv); 1837 linkmode_set_bit(s->bit, adv); 1838 linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv); 1839 1840 pl->link_config.speed = state->speed; 1841 pl->link_config.duplex = state->duplex; 1842 pl->link_config.link = 1; 1843 pl->link_config.an_complete = 1; 1844 1845 pl->cfg_link_an_mode = MLO_AN_FIXED; 1846 pl->req_link_an_mode = pl->cfg_link_an_mode; 1847 1848 return 0; 1849 } 1850 EXPORT_SYMBOL_GPL(phylink_set_fixed_link); 1851 1852 /** 1853 * phylink_create() - create a phylink instance 1854 * @config: a pointer to the target &struct phylink_config 1855 * @fwnode: a pointer to a &struct fwnode_handle describing the network 1856 * interface 1857 * @iface: the desired link mode defined by &typedef phy_interface_t 1858 * @mac_ops: a pointer to a &struct phylink_mac_ops for the MAC. 1859 * 1860 * Create a new phylink instance, and parse the link parameters found in @np. 1861 * This will parse in-band modes, fixed-link or SFP configuration. 1862 * 1863 * Note: the rtnl lock must not be held when calling this function. 1864 * 1865 * Returns a pointer to a &struct phylink, or an error-pointer value. Users 1866 * must use IS_ERR() to check for errors from this function. 1867 */ 1868 struct phylink *phylink_create(struct phylink_config *config, 1869 const struct fwnode_handle *fwnode, 1870 phy_interface_t iface, 1871 const struct phylink_mac_ops *mac_ops) 1872 { 1873 struct phylink *pl; 1874 int ret; 1875 1876 /* Validate the supplied configuration */ 1877 if (phy_interface_empty(config->supported_interfaces)) { 1878 dev_err(config->dev, 1879 "phylink: error: empty supported_interfaces\n"); 1880 return ERR_PTR(-EINVAL); 1881 } 1882 1883 pl = kzalloc(sizeof(*pl), GFP_KERNEL); 1884 if (!pl) 1885 return ERR_PTR(-ENOMEM); 1886 1887 mutex_init(&pl->state_mutex); 1888 INIT_WORK(&pl->resolve, phylink_resolve); 1889 1890 pl->config = config; 1891 if (config->type == PHYLINK_NETDEV) { 1892 pl->netdev = to_net_dev(config->dev); 1893 netif_carrier_off(pl->netdev); 1894 } else if (config->type == PHYLINK_DEV) { 1895 pl->dev = config->dev; 1896 } else { 1897 kfree(pl); 1898 return ERR_PTR(-EINVAL); 1899 } 1900 1901 pl->phy_state.interface = iface; 1902 pl->link_interface = iface; 1903 if (iface == PHY_INTERFACE_MODE_MOCA) 1904 pl->link_port = PORT_BNC; 1905 else 1906 pl->link_port = PORT_MII; 1907 pl->link_config.interface = iface; 1908 pl->link_config.pause = MLO_PAUSE_AN; 1909 pl->link_config.speed = SPEED_UNKNOWN; 1910 pl->link_config.duplex = DUPLEX_UNKNOWN; 1911 pl->pcs_state = PCS_STATE_DOWN; 1912 pl->mac_ops = mac_ops; 1913 __set_bit(PHYLINK_DISABLE_STOPPED, &pl->phylink_disable_state); 1914 timer_setup(&pl->link_poll, phylink_fixed_poll, 0); 1915 1916 linkmode_fill(pl->supported); 1917 linkmode_copy(pl->link_config.advertising, pl->supported); 1918 phylink_validate(pl, pl->supported, &pl->link_config); 1919 1920 ret = phylink_parse_mode(pl, fwnode); 1921 if (ret < 0) { 1922 kfree(pl); 1923 return ERR_PTR(ret); 1924 } 1925 1926 if (pl->cfg_link_an_mode == MLO_AN_FIXED) { 1927 ret = phylink_parse_fixedlink(pl, fwnode); 1928 if (ret < 0) { 1929 kfree(pl); 1930 return ERR_PTR(ret); 1931 } 1932 } 1933 1934 pl->req_link_an_mode = pl->cfg_link_an_mode; 1935 1936 ret = phylink_register_sfp(pl, fwnode); 1937 if (ret < 0) { 1938 kfree(pl); 1939 return ERR_PTR(ret); 1940 } 1941 1942 return pl; 1943 } 1944 EXPORT_SYMBOL_GPL(phylink_create); 1945 1946 /** 1947 * phylink_destroy() - cleanup and destroy the phylink instance 1948 * @pl: a pointer to a &struct phylink returned from phylink_create() 1949 * 1950 * Destroy a phylink instance. Any PHY that has been attached must have been 1951 * cleaned up via phylink_disconnect_phy() prior to calling this function. 1952 * 1953 * Note: the rtnl lock must not be held when calling this function. 1954 */ 1955 void phylink_destroy(struct phylink *pl) 1956 { 1957 sfp_bus_del_upstream(pl->sfp_bus); 1958 if (pl->link_gpio) 1959 gpiod_put(pl->link_gpio); 1960 1961 cancel_work_sync(&pl->resolve); 1962 kfree(pl); 1963 } 1964 EXPORT_SYMBOL_GPL(phylink_destroy); 1965 1966 /** 1967 * phylink_expects_phy() - Determine if phylink expects a phy to be attached 1968 * @pl: a pointer to a &struct phylink returned from phylink_create() 1969 * 1970 * When using fixed-link mode, or in-band mode with 1000base-X or 2500base-X, 1971 * no PHY is needed. 1972 * 1973 * Returns true if phylink will be expecting a PHY. 1974 */ 1975 bool phylink_expects_phy(struct phylink *pl) 1976 { 1977 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 1978 (pl->cfg_link_an_mode == MLO_AN_INBAND && 1979 phy_interface_mode_is_8023z(pl->link_config.interface))) 1980 return false; 1981 return true; 1982 } 1983 EXPORT_SYMBOL_GPL(phylink_expects_phy); 1984 1985 static void phylink_phy_change(struct phy_device *phydev, bool up) 1986 { 1987 struct phylink *pl = phydev->phylink; 1988 bool tx_pause, rx_pause; 1989 1990 phy_get_pause(phydev, &tx_pause, &rx_pause); 1991 1992 mutex_lock(&pl->state_mutex); 1993 pl->phy_state.speed = phydev->speed; 1994 pl->phy_state.duplex = phydev->duplex; 1995 pl->phy_state.rate_matching = phydev->rate_matching; 1996 pl->phy_state.pause = MLO_PAUSE_NONE; 1997 if (tx_pause) 1998 pl->phy_state.pause |= MLO_PAUSE_TX; 1999 if (rx_pause) 2000 pl->phy_state.pause |= MLO_PAUSE_RX; 2001 pl->phy_state.interface = phydev->interface; 2002 pl->phy_state.link = up; 2003 if (!up) 2004 pl->link_failed = true; 2005 mutex_unlock(&pl->state_mutex); 2006 2007 phylink_run_resolve(pl); 2008 2009 phylink_dbg(pl, "phy link %s %s/%s/%s/%s/%s\n", up ? "up" : "down", 2010 phy_modes(phydev->interface), 2011 phy_speed_to_str(phydev->speed), 2012 phy_duplex_to_str(phydev->duplex), 2013 phy_rate_matching_to_str(phydev->rate_matching), 2014 phylink_pause_to_str(pl->phy_state.pause)); 2015 } 2016 2017 static int phylink_validate_phy(struct phylink *pl, struct phy_device *phy, 2018 unsigned long *supported, 2019 struct phylink_link_state *state) 2020 { 2021 DECLARE_PHY_INTERFACE_MASK(interfaces); 2022 2023 /* If the PHY provides a bitmap of the interfaces it will be using 2024 * depending on the negotiated media speeds, use this to validate 2025 * which ethtool link modes can be used. 2026 */ 2027 if (!phy_interface_empty(phy->possible_interfaces)) { 2028 /* We only care about the union of the PHY's interfaces and 2029 * those which the host supports. 2030 */ 2031 phy_interface_and(interfaces, phy->possible_interfaces, 2032 pl->config->supported_interfaces); 2033 2034 if (phy_interface_empty(interfaces)) { 2035 phylink_err(pl, "PHY has no common interfaces\n"); 2036 return -EINVAL; 2037 } 2038 2039 if (phy_on_sfp(phy)) { 2040 /* If the PHY is on a SFP, limit the interfaces to 2041 * those that can be used with a SFP module. 2042 */ 2043 phy_interface_and(interfaces, interfaces, 2044 phylink_sfp_interfaces); 2045 2046 if (phy_interface_empty(interfaces)) { 2047 phylink_err(pl, "SFP PHY's possible interfaces becomes empty\n"); 2048 return -EINVAL; 2049 } 2050 } 2051 2052 phylink_dbg(pl, "PHY %s uses interfaces %*pbl, validating %*pbl\n", 2053 phydev_name(phy), 2054 (int)PHY_INTERFACE_MODE_MAX, 2055 phy->possible_interfaces, 2056 (int)PHY_INTERFACE_MODE_MAX, interfaces); 2057 2058 return phylink_validate_mask(pl, phy, supported, state, 2059 interfaces); 2060 } 2061 2062 phylink_dbg(pl, "PHY %s doesn't supply possible interfaces\n", 2063 phydev_name(phy)); 2064 2065 /* Check whether we would use rate matching for the proposed interface 2066 * mode. 2067 */ 2068 state->rate_matching = phy_get_rate_matching(phy, state->interface); 2069 2070 /* Clause 45 PHYs may switch their Serdes lane between, e.g. 10GBASE-R, 2071 * 5GBASE-R, 2500BASE-X and SGMII if they are not using rate matching. 2072 * For some interface modes (e.g. RXAUI, XAUI and USXGMII) switching 2073 * their Serdes is either unnecessary or not reasonable. 2074 * 2075 * For these which switch interface modes, we really need to know which 2076 * interface modes the PHY supports to properly work out which ethtool 2077 * linkmodes can be supported. For now, as a work-around, we validate 2078 * against all interface modes, which may lead to more ethtool link 2079 * modes being advertised than are actually supported. 2080 */ 2081 if (phy->is_c45 && state->rate_matching == RATE_MATCH_NONE && 2082 state->interface != PHY_INTERFACE_MODE_RXAUI && 2083 state->interface != PHY_INTERFACE_MODE_XAUI && 2084 state->interface != PHY_INTERFACE_MODE_USXGMII) 2085 state->interface = PHY_INTERFACE_MODE_NA; 2086 2087 return phylink_validate(pl, supported, state); 2088 } 2089 2090 static int phylink_bringup_phy(struct phylink *pl, struct phy_device *phy, 2091 phy_interface_t interface) 2092 { 2093 struct phylink_link_state config; 2094 __ETHTOOL_DECLARE_LINK_MODE_MASK(supported); 2095 char *irq_str; 2096 int ret; 2097 2098 /* 2099 * This is the new way of dealing with flow control for PHYs, 2100 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 2101 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 2102 * using our validate call to the MAC, we rely upon the MAC 2103 * clearing the bits from both supported and advertising fields. 2104 */ 2105 phy_support_asym_pause(phy); 2106 2107 memset(&config, 0, sizeof(config)); 2108 linkmode_copy(supported, phy->supported); 2109 linkmode_copy(config.advertising, phy->advertising); 2110 config.interface = interface; 2111 2112 ret = phylink_validate_phy(pl, phy, supported, &config); 2113 if (ret) { 2114 phylink_warn(pl, "validation of %s with support %*pb and advertisement %*pb failed: %pe\n", 2115 phy_modes(config.interface), 2116 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->supported, 2117 __ETHTOOL_LINK_MODE_MASK_NBITS, config.advertising, 2118 ERR_PTR(ret)); 2119 return ret; 2120 } 2121 2122 phy->phylink = pl; 2123 phy->phy_link_change = phylink_phy_change; 2124 2125 irq_str = phy_attached_info_irq(phy); 2126 phylink_info(pl, 2127 "PHY [%s] driver [%s] (irq=%s)\n", 2128 dev_name(&phy->mdio.dev), phy->drv->name, irq_str); 2129 kfree(irq_str); 2130 2131 mutex_lock(&phy->lock); 2132 mutex_lock(&pl->state_mutex); 2133 pl->phydev = phy; 2134 pl->phy_state.interface = interface; 2135 pl->phy_state.pause = MLO_PAUSE_NONE; 2136 pl->phy_state.speed = SPEED_UNKNOWN; 2137 pl->phy_state.duplex = DUPLEX_UNKNOWN; 2138 pl->phy_state.rate_matching = RATE_MATCH_NONE; 2139 linkmode_copy(pl->supported, supported); 2140 linkmode_copy(pl->link_config.advertising, config.advertising); 2141 2142 /* Restrict the phy advertisement according to the MAC support. */ 2143 linkmode_copy(phy->advertising, config.advertising); 2144 mutex_unlock(&pl->state_mutex); 2145 mutex_unlock(&phy->lock); 2146 2147 phylink_dbg(pl, 2148 "phy: %s setting supported %*pb advertising %*pb\n", 2149 phy_modes(interface), 2150 __ETHTOOL_LINK_MODE_MASK_NBITS, pl->supported, 2151 __ETHTOOL_LINK_MODE_MASK_NBITS, phy->advertising); 2152 2153 if (phy_interrupt_is_valid(phy)) 2154 phy_request_interrupt(phy); 2155 2156 if (pl->config->mac_managed_pm) 2157 phy->mac_managed_pm = true; 2158 2159 return 0; 2160 } 2161 2162 static int phylink_attach_phy(struct phylink *pl, struct phy_device *phy, 2163 phy_interface_t interface) 2164 { 2165 u32 flags = 0; 2166 2167 if (WARN_ON(pl->cfg_link_an_mode == MLO_AN_FIXED || 2168 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2169 phy_interface_mode_is_8023z(interface) && !pl->sfp_bus))) 2170 return -EINVAL; 2171 2172 if (pl->phydev) 2173 return -EBUSY; 2174 2175 if (pl->config->mac_requires_rxc) 2176 flags |= PHY_F_RXC_ALWAYS_ON; 2177 2178 return phy_attach_direct(pl->netdev, phy, flags, interface); 2179 } 2180 2181 /** 2182 * phylink_connect_phy() - connect a PHY to the phylink instance 2183 * @pl: a pointer to a &struct phylink returned from phylink_create() 2184 * @phy: a pointer to a &struct phy_device. 2185 * 2186 * Connect @phy to the phylink instance specified by @pl by calling 2187 * phy_attach_direct(). Configure the @phy according to the MAC driver's 2188 * capabilities, start the PHYLIB state machine and enable any interrupts 2189 * that the PHY supports. 2190 * 2191 * This updates the phylink's ethtool supported and advertising link mode 2192 * masks. 2193 * 2194 * Returns 0 on success or a negative errno. 2195 */ 2196 int phylink_connect_phy(struct phylink *pl, struct phy_device *phy) 2197 { 2198 int ret; 2199 2200 /* Use PHY device/driver interface */ 2201 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2202 pl->link_interface = phy->interface; 2203 pl->link_config.interface = pl->link_interface; 2204 } 2205 2206 ret = phylink_attach_phy(pl, phy, pl->link_interface); 2207 if (ret < 0) 2208 return ret; 2209 2210 ret = phylink_bringup_phy(pl, phy, pl->link_config.interface); 2211 if (ret) 2212 phy_detach(phy); 2213 2214 return ret; 2215 } 2216 EXPORT_SYMBOL_GPL(phylink_connect_phy); 2217 2218 /** 2219 * phylink_of_phy_connect() - connect the PHY specified in the DT mode. 2220 * @pl: a pointer to a &struct phylink returned from phylink_create() 2221 * @dn: a pointer to a &struct device_node. 2222 * @flags: PHY-specific flags to communicate to the PHY device driver 2223 * 2224 * Connect the phy specified in the device node @dn to the phylink instance 2225 * specified by @pl. Actions specified in phylink_connect_phy() will be 2226 * performed. 2227 * 2228 * Returns 0 on success or a negative errno. 2229 */ 2230 int phylink_of_phy_connect(struct phylink *pl, struct device_node *dn, 2231 u32 flags) 2232 { 2233 return phylink_fwnode_phy_connect(pl, of_fwnode_handle(dn), flags); 2234 } 2235 EXPORT_SYMBOL_GPL(phylink_of_phy_connect); 2236 2237 /** 2238 * phylink_fwnode_phy_connect() - connect the PHY specified in the fwnode. 2239 * @pl: a pointer to a &struct phylink returned from phylink_create() 2240 * @fwnode: a pointer to a &struct fwnode_handle. 2241 * @flags: PHY-specific flags to communicate to the PHY device driver 2242 * 2243 * Connect the phy specified @fwnode to the phylink instance specified 2244 * by @pl. 2245 * 2246 * Returns 0 on success or a negative errno. 2247 */ 2248 int phylink_fwnode_phy_connect(struct phylink *pl, 2249 const struct fwnode_handle *fwnode, 2250 u32 flags) 2251 { 2252 struct fwnode_handle *phy_fwnode; 2253 struct phy_device *phy_dev; 2254 int ret; 2255 2256 /* Fixed links and 802.3z are handled without needing a PHY */ 2257 if (pl->cfg_link_an_mode == MLO_AN_FIXED || 2258 (pl->cfg_link_an_mode == MLO_AN_INBAND && 2259 phy_interface_mode_is_8023z(pl->link_interface))) 2260 return 0; 2261 2262 phy_fwnode = fwnode_get_phy_node(fwnode); 2263 if (IS_ERR(phy_fwnode)) { 2264 if (pl->cfg_link_an_mode == MLO_AN_PHY) 2265 return -ENODEV; 2266 return 0; 2267 } 2268 2269 phy_dev = fwnode_phy_find_device(phy_fwnode); 2270 /* We're done with the phy_node handle */ 2271 fwnode_handle_put(phy_fwnode); 2272 if (!phy_dev) 2273 return -ENODEV; 2274 2275 /* Use PHY device/driver interface */ 2276 if (pl->link_interface == PHY_INTERFACE_MODE_NA) { 2277 pl->link_interface = phy_dev->interface; 2278 pl->link_config.interface = pl->link_interface; 2279 } 2280 2281 if (pl->config->mac_requires_rxc) 2282 flags |= PHY_F_RXC_ALWAYS_ON; 2283 2284 ret = phy_attach_direct(pl->netdev, phy_dev, flags, 2285 pl->link_interface); 2286 phy_device_free(phy_dev); 2287 if (ret) 2288 return ret; 2289 2290 ret = phylink_bringup_phy(pl, phy_dev, pl->link_config.interface); 2291 if (ret) 2292 phy_detach(phy_dev); 2293 2294 return ret; 2295 } 2296 EXPORT_SYMBOL_GPL(phylink_fwnode_phy_connect); 2297 2298 /** 2299 * phylink_disconnect_phy() - disconnect any PHY attached to the phylink 2300 * instance. 2301 * @pl: a pointer to a &struct phylink returned from phylink_create() 2302 * 2303 * Disconnect any current PHY from the phylink instance described by @pl. 2304 */ 2305 void phylink_disconnect_phy(struct phylink *pl) 2306 { 2307 struct phy_device *phy; 2308 2309 ASSERT_RTNL(); 2310 2311 phy = pl->phydev; 2312 if (phy) { 2313 mutex_lock(&phy->lock); 2314 mutex_lock(&pl->state_mutex); 2315 pl->phydev = NULL; 2316 mutex_unlock(&pl->state_mutex); 2317 mutex_unlock(&phy->lock); 2318 flush_work(&pl->resolve); 2319 2320 phy_disconnect(phy); 2321 } 2322 } 2323 EXPORT_SYMBOL_GPL(phylink_disconnect_phy); 2324 2325 static void phylink_link_changed(struct phylink *pl, bool up, const char *what) 2326 { 2327 if (!up) 2328 pl->link_failed = true; 2329 phylink_run_resolve(pl); 2330 phylink_dbg(pl, "%s link %s\n", what, up ? "up" : "down"); 2331 } 2332 2333 /** 2334 * phylink_mac_change() - notify phylink of a change in MAC state 2335 * @pl: a pointer to a &struct phylink returned from phylink_create() 2336 * @up: indicates whether the link is currently up. 2337 * 2338 * The MAC driver should call this driver when the state of its link 2339 * changes (eg, link failure, new negotiation results, etc.) 2340 */ 2341 void phylink_mac_change(struct phylink *pl, bool up) 2342 { 2343 phylink_link_changed(pl, up, "mac"); 2344 } 2345 EXPORT_SYMBOL_GPL(phylink_mac_change); 2346 2347 /** 2348 * phylink_pcs_change() - notify phylink of a change to PCS link state 2349 * @pcs: pointer to &struct phylink_pcs 2350 * @up: indicates whether the link is currently up. 2351 * 2352 * The PCS driver should call this when the state of its link changes 2353 * (e.g. link failure, new negotiation results, etc.) Note: it should 2354 * not determine "up" by reading the BMSR. If in doubt about the link 2355 * state at interrupt time, then pass true if pcs_get_state() returns 2356 * the latched link-down state, otherwise pass false. 2357 */ 2358 void phylink_pcs_change(struct phylink_pcs *pcs, bool up) 2359 { 2360 struct phylink *pl = pcs->phylink; 2361 2362 if (pl) 2363 phylink_link_changed(pl, up, "pcs"); 2364 } 2365 EXPORT_SYMBOL_GPL(phylink_pcs_change); 2366 2367 static irqreturn_t phylink_link_handler(int irq, void *data) 2368 { 2369 struct phylink *pl = data; 2370 2371 phylink_run_resolve(pl); 2372 2373 return IRQ_HANDLED; 2374 } 2375 2376 /** 2377 * phylink_start() - start a phylink instance 2378 * @pl: a pointer to a &struct phylink returned from phylink_create() 2379 * 2380 * Start the phylink instance specified by @pl, configuring the MAC for the 2381 * desired link mode(s) and negotiation style. This should be called from the 2382 * network device driver's &struct net_device_ops ndo_open() method. 2383 */ 2384 void phylink_start(struct phylink *pl) 2385 { 2386 bool poll = false; 2387 2388 ASSERT_RTNL(); 2389 2390 phylink_info(pl, "configuring for %s/%s link mode\n", 2391 phylink_an_mode_str(pl->req_link_an_mode), 2392 phy_modes(pl->link_config.interface)); 2393 2394 /* Always set the carrier off */ 2395 if (pl->netdev) 2396 netif_carrier_off(pl->netdev); 2397 2398 pl->pcs_state = PCS_STATE_STARTING; 2399 2400 /* Apply the link configuration to the MAC when starting. This allows 2401 * a fixed-link to start with the correct parameters, and also 2402 * ensures that we set the appropriate advertisement for Serdes links. 2403 * 2404 * Restart autonegotiation if using 802.3z to ensure that the link 2405 * parameters are properly negotiated. This is necessary for DSA 2406 * switches using 802.3z negotiation to ensure they see our modes. 2407 */ 2408 phylink_mac_initial_config(pl, true); 2409 2410 pl->pcs_state = PCS_STATE_STARTED; 2411 2412 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_STOPPED); 2413 2414 if (pl->cfg_link_an_mode == MLO_AN_FIXED && pl->link_gpio) { 2415 int irq = gpiod_to_irq(pl->link_gpio); 2416 2417 if (irq > 0) { 2418 if (!request_irq(irq, phylink_link_handler, 2419 IRQF_TRIGGER_RISING | 2420 IRQF_TRIGGER_FALLING, 2421 "netdev link", pl)) 2422 pl->link_irq = irq; 2423 else 2424 irq = 0; 2425 } 2426 if (irq <= 0) 2427 poll = true; 2428 } 2429 2430 if (pl->cfg_link_an_mode == MLO_AN_FIXED) 2431 poll |= pl->config->poll_fixed_state; 2432 2433 if (poll) 2434 mod_timer(&pl->link_poll, jiffies + HZ); 2435 if (pl->phydev) 2436 phy_start(pl->phydev); 2437 if (pl->sfp_bus) 2438 sfp_upstream_start(pl->sfp_bus); 2439 } 2440 EXPORT_SYMBOL_GPL(phylink_start); 2441 2442 /** 2443 * phylink_stop() - stop a phylink instance 2444 * @pl: a pointer to a &struct phylink returned from phylink_create() 2445 * 2446 * Stop the phylink instance specified by @pl. This should be called from the 2447 * network device driver's &struct net_device_ops ndo_stop() method. The 2448 * network device's carrier state should not be changed prior to calling this 2449 * function. 2450 * 2451 * This will synchronously bring down the link if the link is not already 2452 * down (in other words, it will trigger a mac_link_down() method call.) 2453 */ 2454 void phylink_stop(struct phylink *pl) 2455 { 2456 ASSERT_RTNL(); 2457 2458 if (pl->sfp_bus) 2459 sfp_upstream_stop(pl->sfp_bus); 2460 if (pl->phydev) 2461 phy_stop(pl->phydev); 2462 del_timer_sync(&pl->link_poll); 2463 if (pl->link_irq) { 2464 free_irq(pl->link_irq, pl); 2465 pl->link_irq = 0; 2466 } 2467 2468 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_STOPPED); 2469 2470 pl->pcs_state = PCS_STATE_DOWN; 2471 2472 phylink_pcs_disable(pl->pcs); 2473 } 2474 EXPORT_SYMBOL_GPL(phylink_stop); 2475 2476 /** 2477 * phylink_suspend() - handle a network device suspend event 2478 * @pl: a pointer to a &struct phylink returned from phylink_create() 2479 * @mac_wol: true if the MAC needs to receive packets for Wake-on-Lan 2480 * 2481 * Handle a network device suspend event. There are several cases: 2482 * 2483 * - If Wake-on-Lan is not active, we can bring down the link between 2484 * the MAC and PHY by calling phylink_stop(). 2485 * - If Wake-on-Lan is active, and being handled only by the PHY, we 2486 * can also bring down the link between the MAC and PHY. 2487 * - If Wake-on-Lan is active, but being handled by the MAC, the MAC 2488 * still needs to receive packets, so we can not bring the link down. 2489 */ 2490 void phylink_suspend(struct phylink *pl, bool mac_wol) 2491 { 2492 ASSERT_RTNL(); 2493 2494 if (mac_wol && (!pl->netdev || pl->netdev->ethtool->wol_enabled)) { 2495 /* Wake-on-Lan enabled, MAC handling */ 2496 mutex_lock(&pl->state_mutex); 2497 2498 /* Stop the resolver bringing the link up */ 2499 __set_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state); 2500 2501 /* Disable the carrier, to prevent transmit timeouts, 2502 * but one would hope all packets have been sent. This 2503 * also means phylink_resolve() will do nothing. 2504 */ 2505 if (pl->netdev) 2506 netif_carrier_off(pl->netdev); 2507 else 2508 pl->old_link_state = false; 2509 2510 /* We do not call mac_link_down() here as we want the 2511 * link to remain up to receive the WoL packets. 2512 */ 2513 mutex_unlock(&pl->state_mutex); 2514 } else { 2515 phylink_stop(pl); 2516 } 2517 } 2518 EXPORT_SYMBOL_GPL(phylink_suspend); 2519 2520 /** 2521 * phylink_resume() - handle a network device resume event 2522 * @pl: a pointer to a &struct phylink returned from phylink_create() 2523 * 2524 * Undo the effects of phylink_suspend(), returning the link to an 2525 * operational state. 2526 */ 2527 void phylink_resume(struct phylink *pl) 2528 { 2529 ASSERT_RTNL(); 2530 2531 if (test_bit(PHYLINK_DISABLE_MAC_WOL, &pl->phylink_disable_state)) { 2532 /* Wake-on-Lan enabled, MAC handling */ 2533 2534 /* Call mac_link_down() so we keep the overall state balanced. 2535 * Do this under the state_mutex lock for consistency. This 2536 * will cause a "Link Down" message to be printed during 2537 * resume, which is harmless - the true link state will be 2538 * printed when we run a resolve. 2539 */ 2540 mutex_lock(&pl->state_mutex); 2541 phylink_link_down(pl); 2542 mutex_unlock(&pl->state_mutex); 2543 2544 /* Re-apply the link parameters so that all the settings get 2545 * restored to the MAC. 2546 */ 2547 phylink_mac_initial_config(pl, true); 2548 2549 /* Re-enable and re-resolve the link parameters */ 2550 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_MAC_WOL); 2551 } else { 2552 phylink_start(pl); 2553 } 2554 } 2555 EXPORT_SYMBOL_GPL(phylink_resume); 2556 2557 /** 2558 * phylink_ethtool_get_wol() - get the wake on lan parameters for the PHY 2559 * @pl: a pointer to a &struct phylink returned from phylink_create() 2560 * @wol: a pointer to &struct ethtool_wolinfo to hold the read parameters 2561 * 2562 * Read the wake on lan parameters from the PHY attached to the phylink 2563 * instance specified by @pl. If no PHY is currently attached, report no 2564 * support for wake on lan. 2565 */ 2566 void phylink_ethtool_get_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2567 { 2568 ASSERT_RTNL(); 2569 2570 wol->supported = 0; 2571 wol->wolopts = 0; 2572 2573 if (pl->phydev) 2574 phy_ethtool_get_wol(pl->phydev, wol); 2575 } 2576 EXPORT_SYMBOL_GPL(phylink_ethtool_get_wol); 2577 2578 /** 2579 * phylink_ethtool_set_wol() - set wake on lan parameters 2580 * @pl: a pointer to a &struct phylink returned from phylink_create() 2581 * @wol: a pointer to &struct ethtool_wolinfo for the desired parameters 2582 * 2583 * Set the wake on lan parameters for the PHY attached to the phylink 2584 * instance specified by @pl. If no PHY is attached, returns %EOPNOTSUPP 2585 * error. 2586 * 2587 * Returns zero on success or negative errno code. 2588 */ 2589 int phylink_ethtool_set_wol(struct phylink *pl, struct ethtool_wolinfo *wol) 2590 { 2591 int ret = -EOPNOTSUPP; 2592 2593 ASSERT_RTNL(); 2594 2595 if (pl->phydev) 2596 ret = phy_ethtool_set_wol(pl->phydev, wol); 2597 2598 return ret; 2599 } 2600 EXPORT_SYMBOL_GPL(phylink_ethtool_set_wol); 2601 2602 static phy_interface_t phylink_sfp_select_interface(struct phylink *pl, 2603 const unsigned long *link_modes) 2604 { 2605 phy_interface_t interface; 2606 2607 interface = sfp_select_interface(pl->sfp_bus, link_modes); 2608 if (interface == PHY_INTERFACE_MODE_NA) { 2609 phylink_err(pl, 2610 "selection of interface failed, advertisement %*pb\n", 2611 __ETHTOOL_LINK_MODE_MASK_NBITS, 2612 link_modes); 2613 return interface; 2614 } 2615 2616 if (!test_bit(interface, pl->config->supported_interfaces)) { 2617 phylink_err(pl, 2618 "selection of interface failed, SFP selected %s (%u) but MAC supports %*pbl\n", 2619 phy_modes(interface), interface, 2620 (int)PHY_INTERFACE_MODE_MAX, 2621 pl->config->supported_interfaces); 2622 return PHY_INTERFACE_MODE_NA; 2623 } 2624 2625 return interface; 2626 } 2627 2628 static void phylink_merge_link_mode(unsigned long *dst, const unsigned long *b) 2629 { 2630 __ETHTOOL_DECLARE_LINK_MODE_MASK(mask); 2631 2632 linkmode_zero(mask); 2633 phylink_set_port_modes(mask); 2634 2635 linkmode_and(dst, dst, mask); 2636 linkmode_or(dst, dst, b); 2637 } 2638 2639 static void phylink_get_ksettings(const struct phylink_link_state *state, 2640 struct ethtool_link_ksettings *kset) 2641 { 2642 phylink_merge_link_mode(kset->link_modes.advertising, state->advertising); 2643 linkmode_copy(kset->link_modes.lp_advertising, state->lp_advertising); 2644 if (kset->base.rate_matching == RATE_MATCH_NONE) { 2645 kset->base.speed = state->speed; 2646 kset->base.duplex = state->duplex; 2647 } 2648 kset->base.autoneg = linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2649 state->advertising) ? 2650 AUTONEG_ENABLE : AUTONEG_DISABLE; 2651 } 2652 2653 /** 2654 * phylink_ethtool_ksettings_get() - get the current link settings 2655 * @pl: a pointer to a &struct phylink returned from phylink_create() 2656 * @kset: a pointer to a &struct ethtool_link_ksettings to hold link settings 2657 * 2658 * Read the current link settings for the phylink instance specified by @pl. 2659 * This will be the link settings read from the MAC, PHY or fixed link 2660 * settings depending on the current negotiation mode. 2661 */ 2662 int phylink_ethtool_ksettings_get(struct phylink *pl, 2663 struct ethtool_link_ksettings *kset) 2664 { 2665 struct phylink_link_state link_state; 2666 2667 ASSERT_RTNL(); 2668 2669 if (pl->phydev) 2670 phy_ethtool_ksettings_get(pl->phydev, kset); 2671 else 2672 kset->base.port = pl->link_port; 2673 2674 linkmode_copy(kset->link_modes.supported, pl->supported); 2675 2676 switch (pl->act_link_an_mode) { 2677 case MLO_AN_FIXED: 2678 /* We are using fixed settings. Report these as the 2679 * current link settings - and note that these also 2680 * represent the supported speeds/duplex/pause modes. 2681 */ 2682 phylink_get_fixed_state(pl, &link_state); 2683 phylink_get_ksettings(&link_state, kset); 2684 break; 2685 2686 case MLO_AN_INBAND: 2687 /* If there is a phy attached, then use the reported 2688 * settings from the phy with no modification. 2689 */ 2690 if (pl->phydev) 2691 break; 2692 2693 phylink_mac_pcs_get_state(pl, &link_state); 2694 2695 /* The MAC is reporting the link results from its own PCS 2696 * layer via in-band status. Report these as the current 2697 * link settings. 2698 */ 2699 phylink_get_ksettings(&link_state, kset); 2700 break; 2701 } 2702 2703 return 0; 2704 } 2705 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_get); 2706 2707 static bool phylink_validate_pcs_inband_autoneg(struct phylink *pl, 2708 phy_interface_t interface, 2709 unsigned long *adv) 2710 { 2711 unsigned int inband = phylink_inband_caps(pl, interface); 2712 unsigned int mask; 2713 2714 /* If the PCS doesn't implement inband support, be permissive. */ 2715 if (!inband) 2716 return true; 2717 2718 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, adv)) 2719 mask = LINK_INBAND_ENABLE; 2720 else 2721 mask = LINK_INBAND_DISABLE; 2722 2723 /* Check whether the PCS implements the required mode */ 2724 return !!(inband & mask); 2725 } 2726 2727 /** 2728 * phylink_ethtool_ksettings_set() - set the link settings 2729 * @pl: a pointer to a &struct phylink returned from phylink_create() 2730 * @kset: a pointer to a &struct ethtool_link_ksettings for the desired modes 2731 */ 2732 int phylink_ethtool_ksettings_set(struct phylink *pl, 2733 const struct ethtool_link_ksettings *kset) 2734 { 2735 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 2736 struct phylink_link_state config; 2737 const struct phy_setting *s; 2738 2739 ASSERT_RTNL(); 2740 2741 if (pl->phydev) { 2742 struct ethtool_link_ksettings phy_kset = *kset; 2743 2744 linkmode_and(phy_kset.link_modes.advertising, 2745 phy_kset.link_modes.advertising, 2746 pl->supported); 2747 2748 /* We can rely on phylib for this update; we also do not need 2749 * to update the pl->link_config settings: 2750 * - the configuration returned via ksettings_get() will come 2751 * from phylib whenever a PHY is present. 2752 * - link_config.interface will be updated by the PHY calling 2753 * back via phylink_phy_change() and a subsequent resolve. 2754 * - initial link configuration for PHY mode comes from the 2755 * last phy state updated via phylink_phy_change(). 2756 * - other configuration changes (e.g. pause modes) are 2757 * performed directly via phylib. 2758 * - if in in-band mode with a PHY, the link configuration 2759 * is passed on the link from the PHY, and all of 2760 * link_config.{speed,duplex,an_enabled,pause} are not used. 2761 * - the only possible use would be link_config.advertising 2762 * pause modes when in 1000base-X mode with a PHY, but in 2763 * the presence of a PHY, this should not be changed as that 2764 * should be determined from the media side advertisement. 2765 */ 2766 return phy_ethtool_ksettings_set(pl->phydev, &phy_kset); 2767 } 2768 2769 config = pl->link_config; 2770 /* Mask out unsupported advertisements */ 2771 linkmode_and(config.advertising, kset->link_modes.advertising, 2772 pl->supported); 2773 2774 /* FIXME: should we reject autoneg if phy/mac does not support it? */ 2775 switch (kset->base.autoneg) { 2776 case AUTONEG_DISABLE: 2777 /* Autonegotiation disabled, select a suitable speed and 2778 * duplex. 2779 */ 2780 s = phy_lookup_setting(kset->base.speed, kset->base.duplex, 2781 pl->supported, false); 2782 if (!s) 2783 return -EINVAL; 2784 2785 /* If we have a fixed link, refuse to change link parameters. 2786 * If the link parameters match, accept them but do nothing. 2787 */ 2788 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2789 if (s->speed != pl->link_config.speed || 2790 s->duplex != pl->link_config.duplex) 2791 return -EINVAL; 2792 return 0; 2793 } 2794 2795 config.speed = s->speed; 2796 config.duplex = s->duplex; 2797 break; 2798 2799 case AUTONEG_ENABLE: 2800 /* If we have a fixed link, allow autonegotiation (since that 2801 * is our default case) but do not allow the advertisement to 2802 * be changed. If the advertisement matches, simply return. 2803 */ 2804 if (pl->req_link_an_mode == MLO_AN_FIXED) { 2805 if (!linkmode_equal(config.advertising, 2806 pl->link_config.advertising)) 2807 return -EINVAL; 2808 return 0; 2809 } 2810 2811 config.speed = SPEED_UNKNOWN; 2812 config.duplex = DUPLEX_UNKNOWN; 2813 break; 2814 2815 default: 2816 return -EINVAL; 2817 } 2818 2819 /* We have ruled out the case with a PHY attached, and the 2820 * fixed-link cases. All that is left are in-band links. 2821 */ 2822 linkmode_mod_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, config.advertising, 2823 kset->base.autoneg == AUTONEG_ENABLE); 2824 2825 /* If this link is with an SFP, ensure that changes to advertised modes 2826 * also cause the associated interface to be selected such that the 2827 * link can be configured correctly. 2828 */ 2829 if (pl->sfp_bus) { 2830 config.interface = phylink_sfp_select_interface(pl, 2831 config.advertising); 2832 if (config.interface == PHY_INTERFACE_MODE_NA) 2833 return -EINVAL; 2834 2835 /* Revalidate with the selected interface */ 2836 linkmode_copy(support, pl->supported); 2837 if (phylink_validate(pl, support, &config)) { 2838 phylink_err(pl, "validation of %s/%s with support %*pb failed\n", 2839 phylink_an_mode_str(pl->req_link_an_mode), 2840 phy_modes(config.interface), 2841 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 2842 return -EINVAL; 2843 } 2844 } else { 2845 /* Validate without changing the current supported mask. */ 2846 linkmode_copy(support, pl->supported); 2847 if (phylink_validate(pl, support, &config)) 2848 return -EINVAL; 2849 } 2850 2851 /* If autonegotiation is enabled, we must have an advertisement */ 2852 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 2853 config.advertising) && 2854 phylink_is_empty_linkmode(config.advertising)) 2855 return -EINVAL; 2856 2857 /* Validate the autonegotiation state. We don't have a PHY in this 2858 * situation, so the PCS is the media-facing entity. 2859 */ 2860 if (!phylink_validate_pcs_inband_autoneg(pl, config.interface, 2861 config.advertising)) 2862 return -EINVAL; 2863 2864 mutex_lock(&pl->state_mutex); 2865 pl->link_config.speed = config.speed; 2866 pl->link_config.duplex = config.duplex; 2867 2868 if (pl->link_config.interface != config.interface) { 2869 /* The interface changed, e.g. 1000base-X <-> 2500base-X */ 2870 /* We need to force the link down, then change the interface */ 2871 if (pl->old_link_state) { 2872 phylink_link_down(pl); 2873 pl->old_link_state = false; 2874 } 2875 if (!test_bit(PHYLINK_DISABLE_STOPPED, 2876 &pl->phylink_disable_state)) 2877 phylink_major_config(pl, false, &config); 2878 pl->link_config.interface = config.interface; 2879 linkmode_copy(pl->link_config.advertising, config.advertising); 2880 } else if (!linkmode_equal(pl->link_config.advertising, 2881 config.advertising)) { 2882 linkmode_copy(pl->link_config.advertising, config.advertising); 2883 phylink_change_inband_advert(pl); 2884 } 2885 mutex_unlock(&pl->state_mutex); 2886 2887 return 0; 2888 } 2889 EXPORT_SYMBOL_GPL(phylink_ethtool_ksettings_set); 2890 2891 /** 2892 * phylink_ethtool_nway_reset() - restart negotiation 2893 * @pl: a pointer to a &struct phylink returned from phylink_create() 2894 * 2895 * Restart negotiation for the phylink instance specified by @pl. This will 2896 * cause any attached phy to restart negotiation with the link partner, and 2897 * if the MAC is in a BaseX mode, the MAC will also be requested to restart 2898 * negotiation. 2899 * 2900 * Returns zero on success, or negative error code. 2901 */ 2902 int phylink_ethtool_nway_reset(struct phylink *pl) 2903 { 2904 int ret = 0; 2905 2906 ASSERT_RTNL(); 2907 2908 if (pl->phydev) 2909 ret = phy_restart_aneg(pl->phydev); 2910 phylink_pcs_an_restart(pl); 2911 2912 return ret; 2913 } 2914 EXPORT_SYMBOL_GPL(phylink_ethtool_nway_reset); 2915 2916 /** 2917 * phylink_ethtool_get_pauseparam() - get the current pause parameters 2918 * @pl: a pointer to a &struct phylink returned from phylink_create() 2919 * @pause: a pointer to a &struct ethtool_pauseparam 2920 */ 2921 void phylink_ethtool_get_pauseparam(struct phylink *pl, 2922 struct ethtool_pauseparam *pause) 2923 { 2924 ASSERT_RTNL(); 2925 2926 pause->autoneg = !!(pl->link_config.pause & MLO_PAUSE_AN); 2927 pause->rx_pause = !!(pl->link_config.pause & MLO_PAUSE_RX); 2928 pause->tx_pause = !!(pl->link_config.pause & MLO_PAUSE_TX); 2929 } 2930 EXPORT_SYMBOL_GPL(phylink_ethtool_get_pauseparam); 2931 2932 /** 2933 * phylink_ethtool_set_pauseparam() - set the current pause parameters 2934 * @pl: a pointer to a &struct phylink returned from phylink_create() 2935 * @pause: a pointer to a &struct ethtool_pauseparam 2936 */ 2937 int phylink_ethtool_set_pauseparam(struct phylink *pl, 2938 struct ethtool_pauseparam *pause) 2939 { 2940 struct phylink_link_state *config = &pl->link_config; 2941 bool manual_changed; 2942 int pause_state; 2943 2944 ASSERT_RTNL(); 2945 2946 if (pl->req_link_an_mode == MLO_AN_FIXED) 2947 return -EOPNOTSUPP; 2948 2949 if (!phylink_test(pl->supported, Pause) && 2950 !phylink_test(pl->supported, Asym_Pause)) 2951 return -EOPNOTSUPP; 2952 2953 if (!phylink_test(pl->supported, Asym_Pause) && 2954 pause->rx_pause != pause->tx_pause) 2955 return -EINVAL; 2956 2957 pause_state = 0; 2958 if (pause->autoneg) 2959 pause_state |= MLO_PAUSE_AN; 2960 if (pause->rx_pause) 2961 pause_state |= MLO_PAUSE_RX; 2962 if (pause->tx_pause) 2963 pause_state |= MLO_PAUSE_TX; 2964 2965 mutex_lock(&pl->state_mutex); 2966 /* 2967 * See the comments for linkmode_set_pause(), wrt the deficiencies 2968 * with the current implementation. A solution to this issue would 2969 * be: 2970 * ethtool Local device 2971 * rx tx Pause AsymDir 2972 * 0 0 0 0 2973 * 1 0 1 1 2974 * 0 1 0 1 2975 * 1 1 1 1 2976 * and then use the ethtool rx/tx enablement status to mask the 2977 * rx/tx pause resolution. 2978 */ 2979 linkmode_set_pause(config->advertising, pause->tx_pause, 2980 pause->rx_pause); 2981 2982 manual_changed = (config->pause ^ pause_state) & MLO_PAUSE_AN || 2983 (!(pause_state & MLO_PAUSE_AN) && 2984 (config->pause ^ pause_state) & MLO_PAUSE_TXRX_MASK); 2985 2986 config->pause = pause_state; 2987 2988 /* Update our in-band advertisement, triggering a renegotiation if 2989 * the advertisement changed. 2990 */ 2991 if (!pl->phydev) 2992 phylink_change_inband_advert(pl); 2993 2994 mutex_unlock(&pl->state_mutex); 2995 2996 /* If we have a PHY, a change of the pause frame advertisement will 2997 * cause phylib to renegotiate (if AN is enabled) which will in turn 2998 * call our phylink_phy_change() and trigger a resolve. Note that 2999 * we can't hold our state mutex while calling phy_set_asym_pause(). 3000 */ 3001 if (pl->phydev) 3002 phy_set_asym_pause(pl->phydev, pause->rx_pause, 3003 pause->tx_pause); 3004 3005 /* If the manual pause settings changed, make sure we trigger a 3006 * resolve to update their state; we can not guarantee that the 3007 * link will cycle. 3008 */ 3009 if (manual_changed) { 3010 pl->link_failed = true; 3011 phylink_run_resolve(pl); 3012 } 3013 3014 return 0; 3015 } 3016 EXPORT_SYMBOL_GPL(phylink_ethtool_set_pauseparam); 3017 3018 /** 3019 * phylink_get_eee_err() - read the energy efficient ethernet error 3020 * counter 3021 * @pl: a pointer to a &struct phylink returned from phylink_create(). 3022 * 3023 * Read the Energy Efficient Ethernet error counter from the PHY associated 3024 * with the phylink instance specified by @pl. 3025 * 3026 * Returns positive error counter value, or negative error code. 3027 */ 3028 int phylink_get_eee_err(struct phylink *pl) 3029 { 3030 int ret = 0; 3031 3032 ASSERT_RTNL(); 3033 3034 if (pl->phydev) 3035 ret = phy_get_eee_err(pl->phydev); 3036 3037 return ret; 3038 } 3039 EXPORT_SYMBOL_GPL(phylink_get_eee_err); 3040 3041 /** 3042 * phylink_init_eee() - init and check the EEE features 3043 * @pl: a pointer to a &struct phylink returned from phylink_create() 3044 * @clk_stop_enable: allow PHY to stop receive clock 3045 * 3046 * Must be called either with RTNL held or within mac_link_up() 3047 */ 3048 int phylink_init_eee(struct phylink *pl, bool clk_stop_enable) 3049 { 3050 int ret = -EOPNOTSUPP; 3051 3052 if (pl->phydev) 3053 ret = phy_init_eee(pl->phydev, clk_stop_enable); 3054 3055 return ret; 3056 } 3057 EXPORT_SYMBOL_GPL(phylink_init_eee); 3058 3059 /** 3060 * phylink_ethtool_get_eee() - read the energy efficient ethernet parameters 3061 * @pl: a pointer to a &struct phylink returned from phylink_create() 3062 * @eee: a pointer to a &struct ethtool_keee for the read parameters 3063 */ 3064 int phylink_ethtool_get_eee(struct phylink *pl, struct ethtool_keee *eee) 3065 { 3066 int ret = -EOPNOTSUPP; 3067 3068 ASSERT_RTNL(); 3069 3070 if (pl->phydev) 3071 ret = phy_ethtool_get_eee(pl->phydev, eee); 3072 3073 return ret; 3074 } 3075 EXPORT_SYMBOL_GPL(phylink_ethtool_get_eee); 3076 3077 /** 3078 * phylink_ethtool_set_eee() - set the energy efficient ethernet parameters 3079 * @pl: a pointer to a &struct phylink returned from phylink_create() 3080 * @eee: a pointer to a &struct ethtool_keee for the desired parameters 3081 */ 3082 int phylink_ethtool_set_eee(struct phylink *pl, struct ethtool_keee *eee) 3083 { 3084 int ret = -EOPNOTSUPP; 3085 3086 ASSERT_RTNL(); 3087 3088 if (pl->phydev) 3089 ret = phy_ethtool_set_eee(pl->phydev, eee); 3090 3091 return ret; 3092 } 3093 EXPORT_SYMBOL_GPL(phylink_ethtool_set_eee); 3094 3095 /* This emulates MII registers for a fixed-mode phy operating as per the 3096 * passed in state. "aneg" defines if we report negotiation is possible. 3097 * 3098 * FIXME: should deal with negotiation state too. 3099 */ 3100 static int phylink_mii_emul_read(unsigned int reg, 3101 struct phylink_link_state *state) 3102 { 3103 struct fixed_phy_status fs; 3104 unsigned long *lpa = state->lp_advertising; 3105 int val; 3106 3107 fs.link = state->link; 3108 fs.speed = state->speed; 3109 fs.duplex = state->duplex; 3110 fs.pause = test_bit(ETHTOOL_LINK_MODE_Pause_BIT, lpa); 3111 fs.asym_pause = test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, lpa); 3112 3113 val = swphy_read_reg(reg, &fs); 3114 if (reg == MII_BMSR) { 3115 if (!state->an_complete) 3116 val &= ~BMSR_ANEGCOMPLETE; 3117 } 3118 return val; 3119 } 3120 3121 static int phylink_phy_read(struct phylink *pl, unsigned int phy_id, 3122 unsigned int reg) 3123 { 3124 struct phy_device *phydev = pl->phydev; 3125 int prtad, devad; 3126 3127 if (mdio_phy_id_is_c45(phy_id)) { 3128 prtad = mdio_phy_id_prtad(phy_id); 3129 devad = mdio_phy_id_devad(phy_id); 3130 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3131 reg); 3132 } 3133 3134 if (phydev->is_c45) { 3135 switch (reg) { 3136 case MII_BMCR: 3137 case MII_BMSR: 3138 case MII_PHYSID1: 3139 case MII_PHYSID2: 3140 devad = __ffs(phydev->c45_ids.mmds_present); 3141 break; 3142 case MII_ADVERTISE: 3143 case MII_LPA: 3144 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3145 return -EINVAL; 3146 devad = MDIO_MMD_AN; 3147 if (reg == MII_ADVERTISE) 3148 reg = MDIO_AN_ADVERTISE; 3149 else 3150 reg = MDIO_AN_LPA; 3151 break; 3152 default: 3153 return -EINVAL; 3154 } 3155 prtad = phy_id; 3156 return mdiobus_c45_read(pl->phydev->mdio.bus, prtad, devad, 3157 reg); 3158 } 3159 3160 return mdiobus_read(pl->phydev->mdio.bus, phy_id, reg); 3161 } 3162 3163 static int phylink_phy_write(struct phylink *pl, unsigned int phy_id, 3164 unsigned int reg, unsigned int val) 3165 { 3166 struct phy_device *phydev = pl->phydev; 3167 int prtad, devad; 3168 3169 if (mdio_phy_id_is_c45(phy_id)) { 3170 prtad = mdio_phy_id_prtad(phy_id); 3171 devad = mdio_phy_id_devad(phy_id); 3172 return mdiobus_c45_write(pl->phydev->mdio.bus, prtad, devad, 3173 reg, val); 3174 } 3175 3176 if (phydev->is_c45) { 3177 switch (reg) { 3178 case MII_BMCR: 3179 case MII_BMSR: 3180 case MII_PHYSID1: 3181 case MII_PHYSID2: 3182 devad = __ffs(phydev->c45_ids.mmds_present); 3183 break; 3184 case MII_ADVERTISE: 3185 case MII_LPA: 3186 if (!(phydev->c45_ids.mmds_present & MDIO_DEVS_AN)) 3187 return -EINVAL; 3188 devad = MDIO_MMD_AN; 3189 if (reg == MII_ADVERTISE) 3190 reg = MDIO_AN_ADVERTISE; 3191 else 3192 reg = MDIO_AN_LPA; 3193 break; 3194 default: 3195 return -EINVAL; 3196 } 3197 return mdiobus_c45_write(pl->phydev->mdio.bus, phy_id, devad, 3198 reg, val); 3199 } 3200 3201 return mdiobus_write(phydev->mdio.bus, phy_id, reg, val); 3202 } 3203 3204 static int phylink_mii_read(struct phylink *pl, unsigned int phy_id, 3205 unsigned int reg) 3206 { 3207 struct phylink_link_state state; 3208 int val = 0xffff; 3209 3210 switch (pl->act_link_an_mode) { 3211 case MLO_AN_FIXED: 3212 if (phy_id == 0) { 3213 phylink_get_fixed_state(pl, &state); 3214 val = phylink_mii_emul_read(reg, &state); 3215 } 3216 break; 3217 3218 case MLO_AN_PHY: 3219 return -EOPNOTSUPP; 3220 3221 case MLO_AN_INBAND: 3222 if (phy_id == 0) { 3223 phylink_mac_pcs_get_state(pl, &state); 3224 val = phylink_mii_emul_read(reg, &state); 3225 } 3226 break; 3227 } 3228 3229 return val & 0xffff; 3230 } 3231 3232 static int phylink_mii_write(struct phylink *pl, unsigned int phy_id, 3233 unsigned int reg, unsigned int val) 3234 { 3235 switch (pl->act_link_an_mode) { 3236 case MLO_AN_FIXED: 3237 break; 3238 3239 case MLO_AN_PHY: 3240 return -EOPNOTSUPP; 3241 3242 case MLO_AN_INBAND: 3243 break; 3244 } 3245 3246 return 0; 3247 } 3248 3249 /** 3250 * phylink_mii_ioctl() - generic mii ioctl interface 3251 * @pl: a pointer to a &struct phylink returned from phylink_create() 3252 * @ifr: a pointer to a &struct ifreq for socket ioctls 3253 * @cmd: ioctl cmd to execute 3254 * 3255 * Perform the specified MII ioctl on the PHY attached to the phylink instance 3256 * specified by @pl. If no PHY is attached, emulate the presence of the PHY. 3257 * 3258 * Returns: zero on success or negative error code. 3259 * 3260 * %SIOCGMIIPHY: 3261 * read register from the current PHY. 3262 * %SIOCGMIIREG: 3263 * read register from the specified PHY. 3264 * %SIOCSMIIREG: 3265 * set a register on the specified PHY. 3266 */ 3267 int phylink_mii_ioctl(struct phylink *pl, struct ifreq *ifr, int cmd) 3268 { 3269 struct mii_ioctl_data *mii = if_mii(ifr); 3270 int ret; 3271 3272 ASSERT_RTNL(); 3273 3274 if (pl->phydev) { 3275 /* PHYs only exist for MLO_AN_PHY and SGMII */ 3276 switch (cmd) { 3277 case SIOCGMIIPHY: 3278 mii->phy_id = pl->phydev->mdio.addr; 3279 fallthrough; 3280 3281 case SIOCGMIIREG: 3282 ret = phylink_phy_read(pl, mii->phy_id, mii->reg_num); 3283 if (ret >= 0) { 3284 mii->val_out = ret; 3285 ret = 0; 3286 } 3287 break; 3288 3289 case SIOCSMIIREG: 3290 ret = phylink_phy_write(pl, mii->phy_id, mii->reg_num, 3291 mii->val_in); 3292 break; 3293 3294 default: 3295 ret = phy_mii_ioctl(pl->phydev, ifr, cmd); 3296 break; 3297 } 3298 } else { 3299 switch (cmd) { 3300 case SIOCGMIIPHY: 3301 mii->phy_id = 0; 3302 fallthrough; 3303 3304 case SIOCGMIIREG: 3305 ret = phylink_mii_read(pl, mii->phy_id, mii->reg_num); 3306 if (ret >= 0) { 3307 mii->val_out = ret; 3308 ret = 0; 3309 } 3310 break; 3311 3312 case SIOCSMIIREG: 3313 ret = phylink_mii_write(pl, mii->phy_id, mii->reg_num, 3314 mii->val_in); 3315 break; 3316 3317 default: 3318 ret = -EOPNOTSUPP; 3319 break; 3320 } 3321 } 3322 3323 return ret; 3324 } 3325 EXPORT_SYMBOL_GPL(phylink_mii_ioctl); 3326 3327 /** 3328 * phylink_speed_down() - set the non-SFP PHY to lowest speed supported by both 3329 * link partners 3330 * @pl: a pointer to a &struct phylink returned from phylink_create() 3331 * @sync: perform action synchronously 3332 * 3333 * If we have a PHY that is not part of a SFP module, then set the speed 3334 * as described in the phy_speed_down() function. Please see this function 3335 * for a description of the @sync parameter. 3336 * 3337 * Returns zero if there is no PHY, otherwise as per phy_speed_down(). 3338 */ 3339 int phylink_speed_down(struct phylink *pl, bool sync) 3340 { 3341 int ret = 0; 3342 3343 ASSERT_RTNL(); 3344 3345 if (!pl->sfp_bus && pl->phydev) 3346 ret = phy_speed_down(pl->phydev, sync); 3347 3348 return ret; 3349 } 3350 EXPORT_SYMBOL_GPL(phylink_speed_down); 3351 3352 /** 3353 * phylink_speed_up() - restore the advertised speeds prior to the call to 3354 * phylink_speed_down() 3355 * @pl: a pointer to a &struct phylink returned from phylink_create() 3356 * 3357 * If we have a PHY that is not part of a SFP module, then restore the 3358 * PHY speeds as per phy_speed_up(). 3359 * 3360 * Returns zero if there is no PHY, otherwise as per phy_speed_up(). 3361 */ 3362 int phylink_speed_up(struct phylink *pl) 3363 { 3364 int ret = 0; 3365 3366 ASSERT_RTNL(); 3367 3368 if (!pl->sfp_bus && pl->phydev) 3369 ret = phy_speed_up(pl->phydev); 3370 3371 return ret; 3372 } 3373 EXPORT_SYMBOL_GPL(phylink_speed_up); 3374 3375 static void phylink_sfp_attach(void *upstream, struct sfp_bus *bus) 3376 { 3377 struct phylink *pl = upstream; 3378 3379 pl->netdev->sfp_bus = bus; 3380 } 3381 3382 static void phylink_sfp_detach(void *upstream, struct sfp_bus *bus) 3383 { 3384 struct phylink *pl = upstream; 3385 3386 pl->netdev->sfp_bus = NULL; 3387 } 3388 3389 static phy_interface_t phylink_choose_sfp_interface(struct phylink *pl, 3390 const unsigned long *intf) 3391 { 3392 phy_interface_t interface; 3393 size_t i; 3394 3395 interface = PHY_INTERFACE_MODE_NA; 3396 for (i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); i++) 3397 if (test_bit(phylink_sfp_interface_preference[i], intf)) { 3398 interface = phylink_sfp_interface_preference[i]; 3399 break; 3400 } 3401 3402 return interface; 3403 } 3404 3405 static void phylink_sfp_set_config(struct phylink *pl, 3406 unsigned long *supported, 3407 struct phylink_link_state *state) 3408 { 3409 u8 mode = MLO_AN_INBAND; 3410 bool changed = false; 3411 3412 phylink_dbg(pl, "requesting link mode %s/%s with support %*pb\n", 3413 phylink_an_mode_str(mode), phy_modes(state->interface), 3414 __ETHTOOL_LINK_MODE_MASK_NBITS, supported); 3415 3416 if (!linkmode_equal(pl->supported, supported)) { 3417 linkmode_copy(pl->supported, supported); 3418 changed = true; 3419 } 3420 3421 if (!linkmode_equal(pl->link_config.advertising, state->advertising)) { 3422 linkmode_copy(pl->link_config.advertising, state->advertising); 3423 changed = true; 3424 } 3425 3426 if (pl->req_link_an_mode != mode || 3427 pl->link_config.interface != state->interface) { 3428 pl->req_link_an_mode = mode; 3429 pl->link_config.interface = state->interface; 3430 3431 changed = true; 3432 3433 phylink_info(pl, "switched to %s/%s link mode\n", 3434 phylink_an_mode_str(mode), 3435 phy_modes(state->interface)); 3436 } 3437 3438 if (changed && !test_bit(PHYLINK_DISABLE_STOPPED, 3439 &pl->phylink_disable_state)) 3440 phylink_mac_initial_config(pl, false); 3441 } 3442 3443 static int phylink_sfp_config_phy(struct phylink *pl, struct phy_device *phy) 3444 { 3445 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3446 struct phylink_link_state config; 3447 int ret; 3448 3449 linkmode_copy(support, phy->supported); 3450 3451 memset(&config, 0, sizeof(config)); 3452 linkmode_copy(config.advertising, phy->advertising); 3453 config.interface = PHY_INTERFACE_MODE_NA; 3454 config.speed = SPEED_UNKNOWN; 3455 config.duplex = DUPLEX_UNKNOWN; 3456 config.pause = MLO_PAUSE_AN; 3457 3458 /* Ignore errors if we're expecting a PHY to attach later */ 3459 ret = phylink_validate(pl, support, &config); 3460 if (ret) { 3461 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3462 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3463 ERR_PTR(ret)); 3464 return ret; 3465 } 3466 3467 config.interface = phylink_sfp_select_interface(pl, config.advertising); 3468 if (config.interface == PHY_INTERFACE_MODE_NA) 3469 return -EINVAL; 3470 3471 /* Attach the PHY so that the PHY is present when we do the major 3472 * configuration step. 3473 */ 3474 ret = phylink_attach_phy(pl, phy, config.interface); 3475 if (ret < 0) 3476 return ret; 3477 3478 /* This will validate the configuration for us. */ 3479 ret = phylink_bringup_phy(pl, phy, config.interface); 3480 if (ret < 0) { 3481 phy_detach(phy); 3482 return ret; 3483 } 3484 3485 pl->link_port = pl->sfp_port; 3486 3487 phylink_sfp_set_config(pl, support, &config); 3488 3489 return 0; 3490 } 3491 3492 static int phylink_sfp_config_optical(struct phylink *pl) 3493 { 3494 __ETHTOOL_DECLARE_LINK_MODE_MASK(support); 3495 DECLARE_PHY_INTERFACE_MASK(interfaces); 3496 struct phylink_link_state config; 3497 phy_interface_t interface; 3498 int ret; 3499 3500 phylink_dbg(pl, "optical SFP: interfaces=[mac=%*pbl, sfp=%*pbl]\n", 3501 (int)PHY_INTERFACE_MODE_MAX, 3502 pl->config->supported_interfaces, 3503 (int)PHY_INTERFACE_MODE_MAX, 3504 pl->sfp_interfaces); 3505 3506 /* Find the union of the supported interfaces by the PCS/MAC and 3507 * the SFP module. 3508 */ 3509 phy_interface_and(interfaces, pl->config->supported_interfaces, 3510 pl->sfp_interfaces); 3511 if (phy_interface_empty(interfaces)) { 3512 phylink_err(pl, "unsupported SFP module: no common interface modes\n"); 3513 return -EINVAL; 3514 } 3515 3516 memset(&config, 0, sizeof(config)); 3517 linkmode_copy(support, pl->sfp_support); 3518 linkmode_copy(config.advertising, pl->sfp_support); 3519 config.speed = SPEED_UNKNOWN; 3520 config.duplex = DUPLEX_UNKNOWN; 3521 config.pause = MLO_PAUSE_AN; 3522 3523 /* For all the interfaces that are supported, reduce the sfp_support 3524 * mask to only those link modes that can be supported. 3525 */ 3526 ret = phylink_validate_mask(pl, NULL, pl->sfp_support, &config, 3527 interfaces); 3528 if (ret) { 3529 phylink_err(pl, "unsupported SFP module: validation with support %*pb failed\n", 3530 __ETHTOOL_LINK_MODE_MASK_NBITS, support); 3531 return ret; 3532 } 3533 3534 interface = phylink_choose_sfp_interface(pl, interfaces); 3535 if (interface == PHY_INTERFACE_MODE_NA) { 3536 phylink_err(pl, "failed to select SFP interface\n"); 3537 return -EINVAL; 3538 } 3539 3540 phylink_dbg(pl, "optical SFP: chosen %s interface\n", 3541 phy_modes(interface)); 3542 3543 if (!phylink_validate_pcs_inband_autoneg(pl, interface, 3544 config.advertising)) { 3545 phylink_err(pl, "autoneg setting not compatible with PCS"); 3546 return -EINVAL; 3547 } 3548 3549 config.interface = interface; 3550 3551 /* Ignore errors if we're expecting a PHY to attach later */ 3552 ret = phylink_validate(pl, support, &config); 3553 if (ret) { 3554 phylink_err(pl, "validation with support %*pb failed: %pe\n", 3555 __ETHTOOL_LINK_MODE_MASK_NBITS, support, 3556 ERR_PTR(ret)); 3557 return ret; 3558 } 3559 3560 pl->link_port = pl->sfp_port; 3561 3562 phylink_sfp_set_config(pl, pl->sfp_support, &config); 3563 3564 return 0; 3565 } 3566 3567 static int phylink_sfp_module_insert(void *upstream, 3568 const struct sfp_eeprom_id *id) 3569 { 3570 struct phylink *pl = upstream; 3571 3572 ASSERT_RTNL(); 3573 3574 linkmode_zero(pl->sfp_support); 3575 phy_interface_zero(pl->sfp_interfaces); 3576 sfp_parse_support(pl->sfp_bus, id, pl->sfp_support, pl->sfp_interfaces); 3577 pl->sfp_port = sfp_parse_port(pl->sfp_bus, id, pl->sfp_support); 3578 3579 /* If this module may have a PHY connecting later, defer until later */ 3580 pl->sfp_may_have_phy = sfp_may_have_phy(pl->sfp_bus, id); 3581 if (pl->sfp_may_have_phy) 3582 return 0; 3583 3584 return phylink_sfp_config_optical(pl); 3585 } 3586 3587 static int phylink_sfp_module_start(void *upstream) 3588 { 3589 struct phylink *pl = upstream; 3590 3591 /* If this SFP module has a PHY, start the PHY now. */ 3592 if (pl->phydev) { 3593 phy_start(pl->phydev); 3594 return 0; 3595 } 3596 3597 /* If the module may have a PHY but we didn't detect one we 3598 * need to configure the MAC here. 3599 */ 3600 if (!pl->sfp_may_have_phy) 3601 return 0; 3602 3603 return phylink_sfp_config_optical(pl); 3604 } 3605 3606 static void phylink_sfp_module_stop(void *upstream) 3607 { 3608 struct phylink *pl = upstream; 3609 3610 /* If this SFP module has a PHY, stop it. */ 3611 if (pl->phydev) 3612 phy_stop(pl->phydev); 3613 } 3614 3615 static void phylink_sfp_link_down(void *upstream) 3616 { 3617 struct phylink *pl = upstream; 3618 3619 ASSERT_RTNL(); 3620 3621 phylink_run_resolve_and_disable(pl, PHYLINK_DISABLE_LINK); 3622 } 3623 3624 static void phylink_sfp_link_up(void *upstream) 3625 { 3626 struct phylink *pl = upstream; 3627 3628 ASSERT_RTNL(); 3629 3630 phylink_enable_and_run_resolve(pl, PHYLINK_DISABLE_LINK); 3631 } 3632 3633 static int phylink_sfp_connect_phy(void *upstream, struct phy_device *phy) 3634 { 3635 struct phylink *pl = upstream; 3636 3637 if (!phy->drv) { 3638 phylink_err(pl, "PHY %s (id 0x%.8lx) has no driver loaded\n", 3639 phydev_name(phy), (unsigned long)phy->phy_id); 3640 phylink_err(pl, "Drivers which handle known common cases: CONFIG_BCM84881_PHY, CONFIG_MARVELL_PHY\n"); 3641 return -EINVAL; 3642 } 3643 3644 /* 3645 * This is the new way of dealing with flow control for PHYs, 3646 * as described by Timur Tabi in commit 529ed1275263 ("net: phy: 3647 * phy drivers should not set SUPPORTED_[Asym_]Pause") except 3648 * using our validate call to the MAC, we rely upon the MAC 3649 * clearing the bits from both supported and advertising fields. 3650 */ 3651 phy_support_asym_pause(phy); 3652 3653 /* Set the PHY's host supported interfaces */ 3654 phy_interface_and(phy->host_interfaces, phylink_sfp_interfaces, 3655 pl->config->supported_interfaces); 3656 3657 /* Do the initial configuration */ 3658 return phylink_sfp_config_phy(pl, phy); 3659 } 3660 3661 static void phylink_sfp_disconnect_phy(void *upstream, 3662 struct phy_device *phydev) 3663 { 3664 phylink_disconnect_phy(upstream); 3665 } 3666 3667 static const struct sfp_upstream_ops sfp_phylink_ops = { 3668 .attach = phylink_sfp_attach, 3669 .detach = phylink_sfp_detach, 3670 .module_insert = phylink_sfp_module_insert, 3671 .module_start = phylink_sfp_module_start, 3672 .module_stop = phylink_sfp_module_stop, 3673 .link_up = phylink_sfp_link_up, 3674 .link_down = phylink_sfp_link_down, 3675 .connect_phy = phylink_sfp_connect_phy, 3676 .disconnect_phy = phylink_sfp_disconnect_phy, 3677 }; 3678 3679 /* Helpers for MAC drivers */ 3680 3681 static struct { 3682 int bit; 3683 int speed; 3684 } phylink_c73_priority_resolution[] = { 3685 { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 }, 3686 { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 }, 3687 /* 100GBASE-KP4 and 100GBASE-CR10 not supported */ 3688 { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 }, 3689 { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 }, 3690 { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 }, 3691 { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 }, 3692 /* 5GBASE-KR not supported */ 3693 { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 }, 3694 { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 }, 3695 }; 3696 3697 void phylink_resolve_c73(struct phylink_link_state *state) 3698 { 3699 int i; 3700 3701 for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) { 3702 int bit = phylink_c73_priority_resolution[i].bit; 3703 if (linkmode_test_bit(bit, state->advertising) && 3704 linkmode_test_bit(bit, state->lp_advertising)) 3705 break; 3706 } 3707 3708 if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) { 3709 state->speed = phylink_c73_priority_resolution[i].speed; 3710 state->duplex = DUPLEX_FULL; 3711 } else { 3712 /* negotiation failure */ 3713 state->link = false; 3714 } 3715 3716 phylink_resolve_an_pause(state); 3717 } 3718 EXPORT_SYMBOL_GPL(phylink_resolve_c73); 3719 3720 static void phylink_decode_c37_word(struct phylink_link_state *state, 3721 uint16_t config_reg, int speed) 3722 { 3723 int fd_bit; 3724 3725 if (speed == SPEED_2500) 3726 fd_bit = ETHTOOL_LINK_MODE_2500baseX_Full_BIT; 3727 else 3728 fd_bit = ETHTOOL_LINK_MODE_1000baseX_Full_BIT; 3729 3730 mii_lpa_mod_linkmode_x(state->lp_advertising, config_reg, fd_bit); 3731 3732 if (linkmode_test_bit(fd_bit, state->advertising) && 3733 linkmode_test_bit(fd_bit, state->lp_advertising)) { 3734 state->speed = speed; 3735 state->duplex = DUPLEX_FULL; 3736 } else { 3737 /* negotiation failure */ 3738 state->link = false; 3739 } 3740 3741 phylink_resolve_an_pause(state); 3742 } 3743 3744 static void phylink_decode_sgmii_word(struct phylink_link_state *state, 3745 uint16_t config_reg) 3746 { 3747 if (!(config_reg & LPA_SGMII_LINK)) { 3748 state->link = false; 3749 return; 3750 } 3751 3752 switch (config_reg & LPA_SGMII_SPD_MASK) { 3753 case LPA_SGMII_10: 3754 state->speed = SPEED_10; 3755 break; 3756 case LPA_SGMII_100: 3757 state->speed = SPEED_100; 3758 break; 3759 case LPA_SGMII_1000: 3760 state->speed = SPEED_1000; 3761 break; 3762 default: 3763 state->link = false; 3764 return; 3765 } 3766 if (config_reg & LPA_SGMII_FULL_DUPLEX) 3767 state->duplex = DUPLEX_FULL; 3768 else 3769 state->duplex = DUPLEX_HALF; 3770 } 3771 3772 /** 3773 * phylink_decode_usxgmii_word() - decode the USXGMII word from a MAC PCS 3774 * @state: a pointer to a struct phylink_link_state. 3775 * @lpa: a 16 bit value which stores the USXGMII auto-negotiation word 3776 * 3777 * Helper for MAC PCS supporting the USXGMII protocol and the auto-negotiation 3778 * code word. Decode the USXGMII code word and populate the corresponding fields 3779 * (speed, duplex) into the phylink_link_state structure. 3780 */ 3781 void phylink_decode_usxgmii_word(struct phylink_link_state *state, 3782 uint16_t lpa) 3783 { 3784 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3785 case MDIO_USXGMII_10: 3786 state->speed = SPEED_10; 3787 break; 3788 case MDIO_USXGMII_100: 3789 state->speed = SPEED_100; 3790 break; 3791 case MDIO_USXGMII_1000: 3792 state->speed = SPEED_1000; 3793 break; 3794 case MDIO_USXGMII_2500: 3795 state->speed = SPEED_2500; 3796 break; 3797 case MDIO_USXGMII_5000: 3798 state->speed = SPEED_5000; 3799 break; 3800 case MDIO_USXGMII_10G: 3801 state->speed = SPEED_10000; 3802 break; 3803 default: 3804 state->link = false; 3805 return; 3806 } 3807 3808 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3809 state->duplex = DUPLEX_FULL; 3810 else 3811 state->duplex = DUPLEX_HALF; 3812 } 3813 EXPORT_SYMBOL_GPL(phylink_decode_usxgmii_word); 3814 3815 /** 3816 * phylink_decode_usgmii_word() - decode the USGMII word from a MAC PCS 3817 * @state: a pointer to a struct phylink_link_state. 3818 * @lpa: a 16 bit value which stores the USGMII auto-negotiation word 3819 * 3820 * Helper for MAC PCS supporting the USGMII protocol and the auto-negotiation 3821 * code word. Decode the USGMII code word and populate the corresponding fields 3822 * (speed, duplex) into the phylink_link_state structure. The structure for this 3823 * word is the same as the USXGMII word, except it only supports speeds up to 3824 * 1Gbps. 3825 */ 3826 static void phylink_decode_usgmii_word(struct phylink_link_state *state, 3827 uint16_t lpa) 3828 { 3829 switch (lpa & MDIO_USXGMII_SPD_MASK) { 3830 case MDIO_USXGMII_10: 3831 state->speed = SPEED_10; 3832 break; 3833 case MDIO_USXGMII_100: 3834 state->speed = SPEED_100; 3835 break; 3836 case MDIO_USXGMII_1000: 3837 state->speed = SPEED_1000; 3838 break; 3839 default: 3840 state->link = false; 3841 return; 3842 } 3843 3844 if (lpa & MDIO_USXGMII_FULL_DUPLEX) 3845 state->duplex = DUPLEX_FULL; 3846 else 3847 state->duplex = DUPLEX_HALF; 3848 } 3849 3850 /** 3851 * phylink_mii_c22_pcs_decode_state() - Decode MAC PCS state from MII registers 3852 * @state: a pointer to a &struct phylink_link_state. 3853 * @bmsr: The value of the %MII_BMSR register 3854 * @lpa: The value of the %MII_LPA register 3855 * 3856 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3857 * clause 37 negotiation and/or SGMII control. 3858 * 3859 * Parse the Clause 37 or Cisco SGMII link partner negotiation word into 3860 * the phylink @state structure. This is suitable to be used for implementing 3861 * the pcs_get_state() member of the struct phylink_pcs_ops structure if 3862 * accessing @bmsr and @lpa cannot be done with MDIO directly. 3863 */ 3864 void phylink_mii_c22_pcs_decode_state(struct phylink_link_state *state, 3865 u16 bmsr, u16 lpa) 3866 { 3867 state->link = !!(bmsr & BMSR_LSTATUS); 3868 state->an_complete = !!(bmsr & BMSR_ANEGCOMPLETE); 3869 /* If there is no link or autonegotiation is disabled, the LP advertisement 3870 * data is not meaningful, so don't go any further. 3871 */ 3872 if (!state->link || !linkmode_test_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, 3873 state->advertising)) 3874 return; 3875 3876 switch (state->interface) { 3877 case PHY_INTERFACE_MODE_1000BASEX: 3878 phylink_decode_c37_word(state, lpa, SPEED_1000); 3879 break; 3880 3881 case PHY_INTERFACE_MODE_2500BASEX: 3882 phylink_decode_c37_word(state, lpa, SPEED_2500); 3883 break; 3884 3885 case PHY_INTERFACE_MODE_SGMII: 3886 case PHY_INTERFACE_MODE_QSGMII: 3887 phylink_decode_sgmii_word(state, lpa); 3888 break; 3889 case PHY_INTERFACE_MODE_QUSGMII: 3890 phylink_decode_usgmii_word(state, lpa); 3891 break; 3892 3893 default: 3894 state->link = false; 3895 break; 3896 } 3897 } 3898 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_decode_state); 3899 3900 /** 3901 * phylink_mii_c22_pcs_get_state() - read the MAC PCS state 3902 * @pcs: a pointer to a &struct mdio_device. 3903 * @state: a pointer to a &struct phylink_link_state. 3904 * 3905 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3906 * clause 37 negotiation and/or SGMII control. 3907 * 3908 * Read the MAC PCS state from the MII device configured in @config and 3909 * parse the Clause 37 or Cisco SGMII link partner negotiation word into 3910 * the phylink @state structure. This is suitable to be directly plugged 3911 * into the pcs_get_state() member of the struct phylink_pcs_ops 3912 * structure. 3913 */ 3914 void phylink_mii_c22_pcs_get_state(struct mdio_device *pcs, 3915 struct phylink_link_state *state) 3916 { 3917 int bmsr, lpa; 3918 3919 bmsr = mdiodev_read(pcs, MII_BMSR); 3920 lpa = mdiodev_read(pcs, MII_LPA); 3921 if (bmsr < 0 || lpa < 0) { 3922 state->link = false; 3923 return; 3924 } 3925 3926 phylink_mii_c22_pcs_decode_state(state, bmsr, lpa); 3927 } 3928 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_get_state); 3929 3930 /** 3931 * phylink_mii_c22_pcs_encode_advertisement() - configure the clause 37 PCS 3932 * advertisement 3933 * @interface: the PHY interface mode being configured 3934 * @advertising: the ethtool advertisement mask 3935 * 3936 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 3937 * clause 37 negotiation and/or SGMII control. 3938 * 3939 * Encode the clause 37 PCS advertisement as specified by @interface and 3940 * @advertising. 3941 * 3942 * Return: The new value for @adv, or ``-EINVAL`` if it should not be changed. 3943 */ 3944 int phylink_mii_c22_pcs_encode_advertisement(phy_interface_t interface, 3945 const unsigned long *advertising) 3946 { 3947 u16 adv; 3948 3949 switch (interface) { 3950 case PHY_INTERFACE_MODE_1000BASEX: 3951 case PHY_INTERFACE_MODE_2500BASEX: 3952 adv = ADVERTISE_1000XFULL; 3953 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, 3954 advertising)) 3955 adv |= ADVERTISE_1000XPAUSE; 3956 if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, 3957 advertising)) 3958 adv |= ADVERTISE_1000XPSE_ASYM; 3959 return adv; 3960 case PHY_INTERFACE_MODE_SGMII: 3961 case PHY_INTERFACE_MODE_QSGMII: 3962 return 0x0001; 3963 default: 3964 /* Nothing to do for other modes */ 3965 return -EINVAL; 3966 } 3967 } 3968 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_encode_advertisement); 3969 3970 /** 3971 * phylink_mii_c22_pcs_config() - configure clause 22 PCS 3972 * @pcs: a pointer to a &struct mdio_device. 3973 * @interface: the PHY interface mode being configured 3974 * @advertising: the ethtool advertisement mask 3975 * @neg_mode: PCS negotiation mode 3976 * 3977 * Configure a Clause 22 PCS PHY with the appropriate negotiation 3978 * parameters for the @mode, @interface and @advertising parameters. 3979 * Returns negative error number on failure, zero if the advertisement 3980 * has not changed, or positive if there is a change. 3981 */ 3982 int phylink_mii_c22_pcs_config(struct mdio_device *pcs, 3983 phy_interface_t interface, 3984 const unsigned long *advertising, 3985 unsigned int neg_mode) 3986 { 3987 bool changed = 0; 3988 u16 bmcr; 3989 int ret, adv; 3990 3991 adv = phylink_mii_c22_pcs_encode_advertisement(interface, advertising); 3992 if (adv >= 0) { 3993 ret = mdiobus_modify_changed(pcs->bus, pcs->addr, 3994 MII_ADVERTISE, 0xffff, adv); 3995 if (ret < 0) 3996 return ret; 3997 changed = ret; 3998 } 3999 4000 if (neg_mode == PHYLINK_PCS_NEG_INBAND_ENABLED) 4001 bmcr = BMCR_ANENABLE; 4002 else 4003 bmcr = 0; 4004 4005 /* Configure the inband state. Ensure ISOLATE bit is disabled */ 4006 ret = mdiodev_modify(pcs, MII_BMCR, BMCR_ANENABLE | BMCR_ISOLATE, bmcr); 4007 if (ret < 0) 4008 return ret; 4009 4010 return changed; 4011 } 4012 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_config); 4013 4014 /** 4015 * phylink_mii_c22_pcs_an_restart() - restart 802.3z autonegotiation 4016 * @pcs: a pointer to a &struct mdio_device. 4017 * 4018 * Helper for MAC PCS supporting the 802.3 clause 22 register set for 4019 * clause 37 negotiation. 4020 * 4021 * Restart the clause 37 negotiation with the link partner. This is 4022 * suitable to be directly plugged into the pcs_get_state() member 4023 * of the struct phylink_pcs_ops structure. 4024 */ 4025 void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs) 4026 { 4027 int val = mdiodev_read(pcs, MII_BMCR); 4028 4029 if (val >= 0) { 4030 val |= BMCR_ANRESTART; 4031 4032 mdiodev_write(pcs, MII_BMCR, val); 4033 } 4034 } 4035 EXPORT_SYMBOL_GPL(phylink_mii_c22_pcs_an_restart); 4036 4037 void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs, 4038 struct phylink_link_state *state) 4039 { 4040 struct mii_bus *bus = pcs->bus; 4041 int addr = pcs->addr; 4042 int stat; 4043 4044 stat = mdiobus_c45_read(bus, addr, MDIO_MMD_PCS, MDIO_STAT1); 4045 if (stat < 0) { 4046 state->link = false; 4047 return; 4048 } 4049 4050 state->link = !!(stat & MDIO_STAT1_LSTATUS); 4051 if (!state->link) 4052 return; 4053 4054 switch (state->interface) { 4055 case PHY_INTERFACE_MODE_10GBASER: 4056 state->speed = SPEED_10000; 4057 state->duplex = DUPLEX_FULL; 4058 break; 4059 4060 default: 4061 break; 4062 } 4063 } 4064 EXPORT_SYMBOL_GPL(phylink_mii_c45_pcs_get_state); 4065 4066 static int __init phylink_init(void) 4067 { 4068 for (int i = 0; i < ARRAY_SIZE(phylink_sfp_interface_preference); ++i) 4069 __set_bit(phylink_sfp_interface_preference[i], 4070 phylink_sfp_interfaces); 4071 4072 return 0; 4073 } 4074 4075 module_init(phylink_init); 4076 4077 MODULE_LICENSE("GPL v2"); 4078 MODULE_DESCRIPTION("phylink models the MAC to optional PHY connection"); 4079